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review.trustedfirmware.org / sandbox / arthur / trustedfirmware-a / 9d068f66b15e644df4961b74b965323c20f21f14 / lib / cpus / aarch64
  1. 4353499 Fix MISRA defects in workaround and errata framework by Antonio Nino Diaz · 7 years ago
  2. 40daecc Fix MISRA defects in extension libs by Antonio Nino Diaz · 7 years ago
  3. 12af5ed Make errata reporting mandatory for CPU files by Soby Mathew · 7 years ago
  4. 6a655a8 ti: k3: common: Do not disable cache on TI K3 core powerdown by Andrew F. Davis · 7 years ago
  5. 66ec712 Fix the Cortex-ares errata reporting function name by Soby Mathew · 7 years ago
  6. 6cf8d65 cpus: denver: Implement static workaround for CVE-2018-3639 by Varun Wadekar · 7 years ago
  7. cf3ed0d cpus: denver: reset power state to 'C1' on boot by Varun Wadekar · 7 years ago
  8. 1593cae denver: use plat_my_core_pos() to get core position by Varun Wadekar · 7 years ago
  9. 7436d5d DSU erratum 936184 workaround: bug fix by John Tsichritzis · 7 years ago
  10. 7c3a0b0 Merge pull request #1388 from vwadekar/report-cve-2017-5715 by Dimitris Papastamos · 7 years ago
  11. 8335396 cpus: denver: report CVE_2017_5715 mitigation to higher layers by Varun Wadekar · 7 years ago
  12. 8a67718 DSU erratum 936184 workaround by John Tsichritzis · 7 years ago
  13. 46e8870 Add initial CPU support for Cortex-Helios by Joel Hutton · 8 years ago
  14. c84b6cb Add initial CPU support for Cortex-Deimos by Joel Hutton · 7 years ago
  15. a9203ed Add end_vector_entry assembler macro by Roberto Vargas · 7 years ago
  16. bd5a76a cpulib: Add ISBs or comment why they are unneeded by Dimitris Papastamos · 7 years ago
  17. 4069292 Fix MISRA Rule 5.7 Part 1 by Daniel Boulby · 7 years ago
  18. 608529a Merge pull request #1397 from dp-arm/dp/cortex-a76 by Dimitris Papastamos · 7 years ago
  19. d6b7980 Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76 by Dimitris Papastamos · 7 years ago
  20. 040b546 Implement Cortex-Ares 1043202 erratum workaround by Dimitris Papastamos · 7 years ago
  21. 08268e2 Add AMU support for Cortex-Ares by Dimitris Papastamos · 7 years ago
  22. abbffe9 Add support for Cortex-Ares and Cortex-A76 CPUs by Isla Mitchell · 8 years ago
  23. 2b91536 Fast path SMCCC_ARCH_WORKAROUND_1 calls from AArch32 by Dimitris Papastamos · 7 years ago
  24. fe007b2 Add support for dynamic mitigation for CVE-2018-3639 by Dimitris Papastamos · 7 years ago
  25. b8a25bb Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 7 years ago
  26. 2c3a107 Rename symbols and files relating to CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  27. b030146 Workaround for CVE-2017-5715 on NVIDIA Denver CPUs by Varun Wadekar · 8 years ago
  28. fe634fa Check presence of fix for errata 835769 in Cortex-A53 by Jonathan Wright · 7 years ago
  29. 9ec3921 Check presence of fix for errata 843419 in Cortex-A53 by Jonathan Wright · 7 years ago
  30. a205a56 Fixup `SMCCC_ARCH_FEATURES` semantics by Dimitris Papastamos · 7 years ago
  31. 3991a6a Use PFR0 to identify need for mitigation of CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  32. 714b21f MISRA fixes for Cortex A75 AMU implementation by Dimitris Papastamos · 7 years ago
  33. f06890e Refactor AMU support for Cortex A75 by Dimitris Papastamos · 7 years ago
  34. a2e702a Factor out CPU AMU helpers by Dimitris Papastamos · 7 years ago
  35. 9c00555 Merge pull request #1253 from dp-arm/dp/amu32 by davidcunado-arm · 8 years ago
  36. c70da54 AMU: Implement context save/restore for aarch32 by Joel Hutton · 8 years ago
  37. 1d6d47a Optimize SMCCC_ARCH_WORKAROUND_1 on Cortex A57/A72/A73 and A75 by Dimitris Papastamos · 8 years ago
  38. d9bd656 Optimize/cleanup BPIALL workaround by Dimitris Papastamos · 8 years ago
  39. d95eb47 Merge pull request #1228 from dp-arm/dp/cve_2017_5715 by davidcunado-arm · 8 years ago
  40. 0d3a27e Merge pull request #1200 from robertovargas-arm/bl2-el3 by davidcunado-arm · 8 years ago
  41. eec9e7d Print erratum application report for CVE-2017-5715 by Dimitris Papastamos · 8 years ago
  42. b1d27b4 bl2-el3: Add BL2_EL3 image by Roberto Vargas · 8 years ago
  43. 5f3c7ce Merge pull request #1197 from dp-arm/dp/amu by davidcunado-arm · 8 years ago
  44. 53bfb94 Add hooks to save/restore AMU context for Cortex A75 by Dimitris Papastamos · 8 years ago
  45. 780edd8 Use PFR0 to identify need for mitigation of CVE-2017-5915 by Dimitris Papastamos · 8 years ago
  46. a1781a2 Workaround for CVE-2017-5715 on Cortex A73 and A75 by Dimitris Papastamos · 8 years ago
  47. f62ad32 Workaround for CVE-2017-5715 on Cortex A57 and A72 by Dimitris Papastamos · 8 years ago
  48. 0319a97 Implement support for the Activity Monitor Unit on Cortex A75 by Dimitris Papastamos · 8 years ago
  49. 6de9b33 Cortex-A72: Implement workaround for erratum 859971 by Eleanor Bonnici · 8 years ago
  50. 45b52c2 Cortex-A57: Implement workaround for erratum 859972 by Eleanor Bonnici · 8 years ago
  51. 80bcf98 CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 8 years ago
  52. 2a4b4b7 Fix order of #includes by Isla Mitchell · 8 years ago
  53. a94cc37 Apply workarounds for A53 Cat A Errata 835769 and 843419 by Douglas Raillard · 8 years ago
  54. fb7d32e Unique names for defines in the CPU libraries by Varun Wadekar · 8 years ago
  55. d40ab48 Add support for Cortex-A75 and Cortex-A55 CPUs by David Wang · 9 years ago
  56. 22fa58c Use a callee-saved register to be AAPCS-compliant by dp-arm · 8 years ago
  57. 82cb2c1 Use SPDX license identifiers by dp-arm · 8 years ago
  58. 044bb2f Remove build option `ASM_ASSERTION` by Antonio Nino Diaz · 8 years ago
  59. b75dc0e Add workaround for ARM Cortex-A53 erratum 855873 by Andre Przywara · 9 years ago
  60. 28ee754 Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlat by davidcunado-arm · 8 years ago
  61. ccbec91 Apply workaround for errata 813419 of Cortex-A57 by Antonio Nino Diaz · 8 years ago
  62. 3eac92d cpus: denver: remove barrier from denver_enable_dco() by Varun Wadekar · 9 years ago
  63. 9f1c5dd cpus: denver: disable DCO operations from platform code by Varun Wadekar · 9 years ago
  64. e956e22 cpus: Add support for all Denver variants by Varun Wadekar · 10 years ago
  65. 10bcd76 Report errata workaround status to console by Jeenu Viswambharan · 9 years ago
  66. 3d8256b Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 9 years ago
  67. 55c70cb Correct system include order by David Cunado · 9 years ago
  68. 5dd9dbb Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 9 years ago
  69. 84629f2 bl31: Add error reporting registers by Naga Sureshkumar Relli · 9 years ago
  70. 2460ac1 Add support for ARM Cortex-A73 MPCore Processor by Yatharth Kochar · 9 years ago
  71. adeecf9 Add support for Cortex-A57 erratum 833471 workaround by Sandrine Bailleux · 9 years ago
  72. 0728886 Add support for Cortex-A57 erratum 826977 workaround by Sandrine Bailleux · 9 years ago
  73. 0b77197 Add support for Cortex-A57 erratum 829520 workaround by Sandrine Bailleux · 9 years ago
  74. a8b1c76 Add support for Cortex-A57 erratum 828024 workaround by Sandrine Bailleux · 9 years ago
  75. df22d60 Add support for Cortex-A57 erratum 826974 workaround by Sandrine Bailleux · 9 years ago
  76. 1319e7b Make cpu operations warning a VERBOSE print by Soby Mathew · 9 years ago
  77. c66fad9 Cortex-Axx: Unconditionally apply CPU reset operations by Sandrine Bailleux · 10 years ago
  78. 54035fc Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 10 years ago
  79. 820756e9 Add support for ARM Cortex-A35 processor by Sandrine Bailleux · 10 years ago
  80. 6b0d97b cortex_a53: Add A53 errata #826319, #836870 by Jimmy Huang · 10 years ago
  81. 3a8c55f Add "Project Denver" CPU support by Varun Wadekar · 10 years ago
  82. 6fa11a5 Fix recursive crash prints on FVP AEM model by Soby Mathew · 10 years ago
  83. 8b77962 Add support to indicate size and end of assembly functions by Kévin Petit · 10 years ago
  84. 27a51c7 Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support by danh-arm · 10 years ago
  85. 1ba93ae Add support for ARM Cortex-A72 processor by Vikram Kanigiri · 10 years ago
  86. 12e7c4a Initialise cpu ops after enabling data cache by Vikram Kanigiri · 11 years ago
  87. 683f788 Fix the Cortex-A57 reset handler register usage by Soby Mathew · 11 years ago
  88. 79a97b2 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 11 years ago
  89. 0999734 Invalidate the dcache after initializing cpu-ops by Soby Mathew · 11 years ago
  90. 5541bb3 Optimize Cortex-A57 cluster power down sequence on Juno by Soby Mathew · 11 years ago
  91. b1a9631 Optimize barrier usage during Cortex-A57 power down by Soby Mathew · 11 years ago
  92. 7395a72 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 11 years ago
  93. 8e85791 Add support for level specific cache maintenance operations by Soby Mathew · 11 years ago
  94. d9bdaf2 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 11 years ago
  95. d3f70af Add CPU specific crash reporting handlers by Soby Mathew · 11 years ago
  96. add4035 Add CPU specific power management operations by Soby Mathew · 11 years ago
  97. 24fb838 Add platform API for reset handling by Soby Mathew · 11 years ago
  98. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 11 years ago