Log - b1d27b484f4172542eca074fdac42ffd13736a0f - sandbox/arthur/trustedfirmware-a

b1d27b4 bl2-el3: Add BL2_EL3 image by Roberto Vargas · 8 years ago
22fa58c Use a callee-saved register to be AAPCS-compliant by dp-arm · 8 years ago
82cb2c1 Use SPDX license identifiers by dp-arm · 8 years ago
044bb2f Remove build option `ASM_ASSERTION` by Antonio Nino Diaz · 8 years ago
b75dc0e Add workaround for ARM Cortex-A53 erratum 855873 by Andre Przywara · 9 years ago
10bcd76 Report errata workaround status to console by Jeenu Viswambharan · 9 years ago
3d8256b Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 9 years ago
55c70cb Correct system include order by David Cunado · 9 years ago
5dd9dbb Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 9 years ago
1319e7b Make cpu operations warning a VERBOSE print by Soby Mathew · 9 years ago
54035fc Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 10 years ago
8b77962 Add support to indicate size and end of assembly functions by Kévin Petit · 10 years ago
12e7c4a Initialise cpu ops after enabling data cache by Vikram Kanigiri · 11 years ago
683f788 Fix the Cortex-A57 reset handler register usage by Soby Mathew · 11 years ago
79a97b2 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 11 years ago
0999734 Invalidate the dcache after initializing cpu-ops by Soby Mathew · 11 years ago
7395a72 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 11 years ago
d3f70af Add CPU specific crash reporting handlers by Soby Mathew · 11 years ago
add4035 Add CPU specific power management operations by Soby Mathew · 11 years ago
24fb838 Add platform API for reset handling by Soby Mathew · 11 years ago
9b47684 Introduce framework for CPU specific operations by Soby Mathew · 11 years ago