1. e34cc0c Changes to support updated register usage in SMCCC v1.2 by Madhukar Pappireddy · 6 years ago
  2. 0a12302 Add missing support for BL2_AT_EL3 in XIP memory by Lionel Debieve · 6 years ago
  3. c3e8b0b AArch32: Disable Secure Cycle Counter by Alexei Fedorov · 6 years ago
  4. d5dfdeb Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · 6 years ago
  5. c250cc3 SSBS: init SPSR register with default SSBS value by John Tsichritzis · 6 years ago
  6. 52e9108 console: update skeleton by Ambroise Vincent · 6 years ago
  7. e1abd56 arch: add some defines for generic timer registers by Yann Gautier · 6 years ago
  8. fbd8f6c aarch32: Allow compiling with soft-float toolchain by Manish Pandey · 6 years ago
  9. be3991c Console: remove deprecated finish_console_register by Ambroise Vincent · 6 years ago
  10. bd39370 Cortex-A53: Workarounds for 819472, 824069 and 827319 by Ambroise Vincent · 6 years ago
  11. c8b96e4 Merge pull request #1831 from antonio-nino-diaz-arm/an/sccd by Antonio Niño Díaz · 6 years ago
  12. 8f73663 plat/arm: Support for Cortex A5 in FVP Versatile Express platform by Usama Arif · 7 years ago
  13. a5aa25a Division functionality for cores that dont have divide hardware. by Usama Arif · 7 years ago
  14. ed4fc6f Disable processor Cycle Counting in Secure state by Antonio Nino Diaz · 6 years ago
  15. 29a2413 drivers: generic_delay_timer: Assert presence of Generic Timer by Antonio Nino Diaz · 6 years ago
  16. 2559b2c xlat v2: Dynamically detect need for CnP bit by Antonio Nino Diaz · 7 years ago
  17. 09d40e0 Sanitise includes across codebase by Antonio Nino Diaz · 7 years ago
  18. f5478de Reorganize architecture-dependent header files by Antonio Nino Diaz · 7 years ago