1. f1cbbd6 fix(bl1): invalidate SP in data cache during secure SMC by Harrison Mutai · 3 years, 3 months ago
  2. 6bc2438 aarch32: stop speculative execution past exception returns by Madhukar Pappireddy · 5 years ago
  3. 520f864 bl1-smc-handler: Ensure the lower-order 16 bits of SPSR are programmed by Bryan O'Donoghue · 6 years ago
  4. 09d40e0 Sanitise includes across codebase by Antonio Nino Diaz · 7 years ago
  5. 1a92a0e xlat v2: Support the EL2 translation regime by Antonio Nino Diaz · 7 years ago
  6. 085e80e Rename 'smcc' to 'smccc' by Antonio Nino Diaz · 7 years ago
  7. 3fe81dc aarch32: use lr as bl32 boot argument on aarch32 only systems by Etienne Carriere · 8 years ago
  8. a440900 AArch32: Add `TRUSTED_BOARD_BOOT` support by dp-arm · 8 years ago
  9. 82cb2c1 Use SPDX license identifiers by dp-arm · 8 years ago
  10. f3b4914 AArch32: Add generic changes in BL1 by Yatharth Kochar · 9 years ago