feat(board/rdn2): enable base element RAM RAS support on RD-N2 platform
To enable firmware first support for base element RAMs on RD-N2 platform
this patch adds following support
- Includes SDEI header to enable SDEI feature on RD-N2 platform.
- Add TZC configuration for CPER memory region for RD-N2 platform
variants. This region is marked for non-secure access as OSPM and
firmware need to access this region.
- Defines all base element RAM errors for RD-N2 platform variants.
- Defines a platform RAS event map and respective RAS config data
structure.
Signed-off-by: Omkar Anand Kulkarni <omkar.kulkarni@arm.com>
Change-Id: Ideaed598f4924f3b9836d4d7e9ef76b9b7580b48
diff --git a/plat/arm/board/rdn2/rdn2_plat.c b/plat/arm/board/rdn2/rdn2_plat.c
index a5564ce..e8a967e 100644
--- a/plat/arm/board/rdn2/rdn2_plat.c
+++ b/plat/arm/board/rdn2/rdn2_plat.c
@@ -8,6 +8,7 @@
#include <drivers/arm/gic600_multichip.h>
#include <plat/arm/common/plat_arm.h>
#include <plat/common/platform.h>
+#include <rdn2_ras.h>
#include <sgi_soc_platform_def_v2.h>
#include <sgi_plat.h>
@@ -134,5 +135,9 @@
#endif
sgi_bl31_common_platform_setup();
+
+#if RAS_FFH_SUPPORT
+ sgi_ras_platform_setup(&ras_config);
+#endif
}
#endif /* IMAGE_BL31 */