Change comments in assembler files to help ctags
Ctags seem to have a problem with generating tags for assembler symbols
when a comment immediately follows an assembly label.
This patch inserts a single space character between the label
definition and the following comments to help ctags.
The patch is generated by the command:
git ls-files -- \*.S | xargs sed -i 's/^\([^:]\+\):;/\1: ;/1'
Change-Id: If7a3c9d0f51207ea033cc8b8e1b34acaa0926475
diff --git a/lib/arch/aarch64/misc_helpers.S b/lib/arch/aarch64/misc_helpers.S
index 40545ba..37258e1 100644
--- a/lib/arch/aarch64/misc_helpers.S
+++ b/lib/arch/aarch64/misc_helpers.S
@@ -84,7 +84,7 @@
.section .text, "ax"
-save_regs:; .type save_regs, %function
+save_regs: ; .type save_regs, %function
sub sp, sp, #GPREGS_FP_OFF
stp x0, x1, [sp, #GPREGS_X0_OFF]
stp x2, x3, [sp, #GPREGS_X2_OFF]
@@ -107,7 +107,7 @@
ret
-restore_regs:; .type restore_regs, %function
+restore_regs: ; .type restore_regs, %function
ldr w9, [sp, #GPREGS_SPSR_OFF]
msr spsr_el3, x9
ldp x28, x9, [sp, #GPREGS_X28_OFF]
@@ -129,14 +129,14 @@
add sp, sp, #GPREGS_FP_OFF
ret
-get_afflvl_shift:; .type get_afflvl_shift, %function
+get_afflvl_shift: ; .type get_afflvl_shift, %function
cmp x0, #3
cinc x0, x0, eq
mov x1, #MPIDR_AFFLVL_SHIFT
lsl x0, x0, x1
ret
-mpidr_mask_lower_afflvls:; .type mpidr_mask_lower_afflvls, %function
+mpidr_mask_lower_afflvls: ; .type mpidr_mask_lower_afflvls, %function
cmp x1, #3
cinc x1, x1, eq
mov x2, #MPIDR_AFFLVL_SHIFT
@@ -149,17 +149,17 @@
* Asynchronous exception manipulation accessors
* -----------------------------------------------------
*/
-enable_irq:; .type enable_irq, %function
+enable_irq: ; .type enable_irq, %function
msr daifclr, #DAIF_IRQ_BIT
ret
-enable_fiq:; .type enable_fiq, %function
+enable_fiq: ; .type enable_fiq, %function
msr daifclr, #DAIF_FIQ_BIT
ret
-enable_serror:; .type enable_serror, %function
+enable_serror: ; .type enable_serror, %function
msr daifclr, #DAIF_ABT_BIT
ret
@@ -169,17 +169,17 @@
ret
-disable_irq:; .type disable_irq, %function
+disable_irq: ; .type disable_irq, %function
msr daifset, #DAIF_IRQ_BIT
ret
-disable_fiq:; .type disable_fiq, %function
+disable_fiq: ; .type disable_fiq, %function
msr daifset, #DAIF_FIQ_BIT
ret
-disable_serror:; .type disable_serror, %function
+disable_serror: ; .type disable_serror, %function
msr daifset, #DAIF_ABT_BIT
ret
@@ -189,17 +189,17 @@
ret
-read_daif:; .type read_daif, %function
+read_daif: ; .type read_daif, %function
mrs x0, daif
ret
-write_daif:; .type write_daif, %function
+write_daif: ; .type write_daif, %function
msr daif, x0
ret
-read_spsr:; .type read_spsr, %function
+read_spsr: ; .type read_spsr, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_spsr_el1
@@ -209,22 +209,22 @@
b.eq read_spsr_el3
-read_spsr_el1:; .type read_spsr_el1, %function
+read_spsr_el1: ; .type read_spsr_el1, %function
mrs x0, spsr_el1
ret
-read_spsr_el2:; .type read_spsr_el2, %function
+read_spsr_el2: ; .type read_spsr_el2, %function
mrs x0, spsr_el2
ret
-read_spsr_el3:; .type read_spsr_el3, %function
+read_spsr_el3: ; .type read_spsr_el3, %function
mrs x0, spsr_el3
ret
-write_spsr:; .type write_spsr, %function
+write_spsr: ; .type write_spsr, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_spsr_el1
@@ -234,25 +234,25 @@
b.eq write_spsr_el3
-write_spsr_el1:; .type write_spsr_el1, %function
+write_spsr_el1: ; .type write_spsr_el1, %function
msr spsr_el1, x0
isb
ret
-write_spsr_el2:; .type write_spsr_el2, %function
+write_spsr_el2: ; .type write_spsr_el2, %function
msr spsr_el2, x0
isb
ret
-write_spsr_el3:; .type write_spsr_el3, %function
+write_spsr_el3: ; .type write_spsr_el3, %function
msr spsr_el3, x0
isb
ret
-read_elr:; .type read_elr, %function
+read_elr: ; .type read_elr, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq read_elr_el1
@@ -262,22 +262,22 @@
b.eq read_elr_el3
-read_elr_el1:; .type read_elr_el1, %function
+read_elr_el1: ; .type read_elr_el1, %function
mrs x0, elr_el1
ret
-read_elr_el2:; .type read_elr_el2, %function
+read_elr_el2: ; .type read_elr_el2, %function
mrs x0, elr_el2
ret
-read_elr_el3:; .type read_elr_el3, %function
+read_elr_el3: ; .type read_elr_el3, %function
mrs x0, elr_el3
ret
-write_elr:; .type write_elr, %function
+write_elr: ; .type write_elr, %function
mrs x1, CurrentEl
cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq write_elr_el1
@@ -287,54 +287,54 @@
b.eq write_elr_el3
-write_elr_el1:; .type write_elr_el1, %function
+write_elr_el1: ; .type write_elr_el1, %function
msr elr_el1, x0
isb
ret
-write_elr_el2:; .type write_elr_el2, %function
+write_elr_el2: ; .type write_elr_el2, %function
msr elr_el2, x0
isb
ret
-write_elr_el3:; .type write_elr_el3, %function
+write_elr_el3: ; .type write_elr_el3, %function
msr elr_el3, x0
isb
ret
-dsb:; .type dsb, %function
+dsb: ; .type dsb, %function
dsb sy
ret
-isb:; .type isb, %function
+isb: ; .type isb, %function
isb
ret
-sev:; .type sev, %function
+sev: ; .type sev, %function
sev
ret
-wfe:; .type wfe, %function
+wfe: ; .type wfe, %function
wfe
ret
-wfi:; .type wfi, %function
+wfi: ; .type wfi, %function
wfi
ret
-eret:; .type eret, %function
+eret: ; .type eret, %function
eret
-smc:; .type smc, %function
+smc: ; .type smc, %function
smc #0
/* -----------------------------------------------------------------------