commit 4811168aafc8bdb5869d26744fa8636752b5ca32
author Joanna Farley <joanna.farley@arm.com> Tue Jan 05 07:57:15 2021 +0000
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> Tue Jan 05 07:57:15 2021 +0000
tree 53a2f92c566e7c7dcdf0eaf52848c51503b09429
parent a31de1e80d5d3ad50835352b63e1d556b27366fc
parent 47f2445ad651e9e37c69daccfc9fba298525ca3f

Merge "Plat AXG: Fix PLAT_MAX_PWR_LVL value" into integration

plat/amlogic/axg/include/platform_def.h

diff --git a/plat/amlogic/axg/include/platform_def.h b/plat/amlogic/axg/include/platform_def.h
index a47cf73..c97687e 100644
--- a/plat/amlogic/axg/include/platform_def.h
+++ b/plat/amlogic/axg/include/platform_def.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -24,7 +24,7 @@
 
 #define AML_PRIMARY_CPU			U(0)
 
-#define PLAT_MAX_PWR_LVL		MPIDR_AFFLVL1
+#define PLAT_MAX_PWR_LVL		MPIDR_AFFLVL2
 #define PLAT_NUM_PWR_DOMAINS		(PLATFORM_CLUSTER_COUNT + \
 					 PLATFORM_CORE_COUNT)