diff --git a/lib/el3_runtime/aarch64/context.S b/lib/el3_runtime/aarch64/context.S
index 63566da..0f2dfeb 100644
--- a/lib/el3_runtime/aarch64/context.S
+++ b/lib/el3_runtime/aarch64/context.S
@@ -17,10 +17,6 @@
 	.global	el2_sysregs_context_save_mte
 	.global	el2_sysregs_context_restore_mte
 #endif /* CTX_INCLUDE_MTE_REGS */
-#if ENABLE_FEAT_RAS
-	.global	el2_sysregs_context_save_ras
-	.global	el2_sysregs_context_restore_ras
-#endif /* ENABLE_FEAT_RAS */
 #endif /* CTX_INCLUDE_EL2_REGS */
 
 	.global	el1_sysregs_context_save
@@ -210,30 +206,6 @@
 endfunc el2_sysregs_context_restore_mte
 #endif /* CTX_INCLUDE_MTE_REGS */
 
-#if ENABLE_FEAT_RAS
-func el2_sysregs_context_save_ras
-	/*
-	 * VDISR_EL2 and VSESR_EL2 registers are saved only when
-	 * FEAT_RAS is supported.
-	 */
-	mrs	x11, vdisr_el2
-	mrs	x12, vsesr_el2
-	stp	x11, x12, [x0, #CTX_VDISR_EL2]
-	ret
-endfunc el2_sysregs_context_save_ras
-
-func el2_sysregs_context_restore_ras
-	/*
-	 * VDISR_EL2 and VSESR_EL2 registers are restored only when FEAT_RAS
-	 * is supported.
-	 */
-	ldp	x11, x12, [x0, #CTX_VDISR_EL2]
-	msr	vdisr_el2, x11
-	msr	vsesr_el2, x12
-	ret
-endfunc el2_sysregs_context_restore_ras
-#endif /* ENABLE_FEAT_RAS */
-
 #endif /* CTX_INCLUDE_EL2_REGS */
 
 /* ------------------------------------------------------------------
@@ -855,7 +827,12 @@
 1:
 #endif /* IMAGE_BL31 && DYNAMIC_WORKAROUND_CVE_2018_3639 */
 
-#if IMAGE_BL31 && ENABLE_FEAT_RAS
+/*
+ * This is a hot path, so we don't want to do some actual FEAT_RAS runtime
+ * detection here. The "esb" is a cheaper variant, so using "dsb" in the
+ * ENABLE_FEAT_RAS==2 case is not ideal, but won't hurt.
+ */
+#if IMAGE_BL31 && ENABLE_FEAT_RAS == 1
 	/* ----------------------------------------------------------
 	 * Issue Error Synchronization Barrier to synchronize SErrors
 	 * before exiting EL3. We're running with EAs unmasked, so
diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c
index 3ddf5fa..e107f5a 100644
--- a/lib/el3_runtime/aarch64/context_mgmt.c
+++ b/lib/el3_runtime/aarch64/context_mgmt.c
@@ -1012,9 +1012,13 @@
 			write_ctx_reg(el2_sysregs_ctx, CTX_TTBR1_EL2,
 				      read_ttbr1_el2());
 		}
-#if ENABLE_FEAT_RAS
-		el2_sysregs_context_save_ras(el2_sysregs_ctx);
-#endif
+
+		if (is_feat_ras_supported()) {
+			write_ctx_reg(el2_sysregs_ctx, CTX_VDISR_EL2,
+				      read_vdisr_el2());
+			write_ctx_reg(el2_sysregs_ctx, CTX_VSESR_EL2,
+				      read_vsesr_el2());
+		}
 
 		if (is_feat_nv2_supported()) {
 			write_ctx_reg(el2_sysregs_ctx, CTX_VNCR_EL2,
@@ -1095,9 +1099,11 @@
 			write_contextidr_el2(read_ctx_reg(el2_sysregs_ctx, CTX_CONTEXTIDR_EL2));
 			write_ttbr1_el2(read_ctx_reg(el2_sysregs_ctx, CTX_TTBR1_EL2));
 		}
-#if ENABLE_FEAT_RAS
-		el2_sysregs_context_restore_ras(el2_sysregs_ctx);
-#endif
+
+		if (is_feat_ras_supported()) {
+			write_vdisr_el2(read_ctx_reg(el2_sysregs_ctx, CTX_VDISR_EL2));
+			write_vsesr_el2(read_ctx_reg(el2_sysregs_ctx, CTX_VSESR_EL2));
+		}
 
 		if (is_feat_nv2_supported()) {
 			write_vncr_el2(read_ctx_reg(el2_sysregs_ctx, CTX_VNCR_EL2));