diff --git a/drivers/st/ddr/stm32mp1_ddr_helpers.c b/drivers/st/ddr/stm32mp1_ddr_helpers.c
index e50b27b..c66c9e7 100644
--- a/drivers/st/ddr/stm32mp1_ddr_helpers.c
+++ b/drivers/st/ddr/stm32mp1_ddr_helpers.c
@@ -11,7 +11,7 @@
 
 void ddr_enable_clock(void)
 {
-	mmio_setbits_32(RCC_BASE + RCC_DDRITFCR,
+	mmio_setbits_32(stm32mp_rcc_base() + RCC_DDRITFCR,
 			RCC_DDRITFCR_DDRC1EN |
 			RCC_DDRITFCR_DDRC2EN |
 			RCC_DDRITFCR_DDRPHYCEN |
diff --git a/drivers/st/ddr/stm32mp1_ram.c b/drivers/st/ddr/stm32mp1_ram.c
index 7b13385..59b4351 100644
--- a/drivers/st/ddr/stm32mp1_ram.c
+++ b/drivers/st/ddr/stm32mp1_ram.c
@@ -298,10 +298,10 @@
 
 	VERBOSE("STM32MP DDR probe\n");
 
-	priv->ctl = (struct stm32mp1_ddrctl *)DDRCTRL_BASE;
-	priv->phy = (struct stm32mp1_ddrphy *)DDRPHYC_BASE;
-	priv->pwr = PWR_BASE;
-	priv->rcc = RCC_BASE;
+	priv->ctl = (struct stm32mp1_ddrctl *)stm32mp_ddrctrl_base();
+	priv->phy = (struct stm32mp1_ddrphy *)stm32mp_ddrphyc_base();
+	priv->pwr = stm32mp_pwr_base();
+	priv->rcc = stm32mp_rcc_base();
 
 	priv->info.base = STM32MP_DDR_BASE;
 	priv->info.size = 0;
diff --git a/drivers/st/reset/stm32mp1_reset.c b/drivers/st/reset/stm32mp1_reset.c
index b9a7ac7..b2de760 100644
--- a/drivers/st/reset/stm32mp1_reset.c
+++ b/drivers/st/reset/stm32mp1_reset.c
@@ -20,9 +20,10 @@
 {
 	uint32_t offset = (id / (uint32_t)__LONG_BIT) * sizeof(uintptr_t);
 	uint32_t bit = id % (uint32_t)__LONG_BIT;
+	uintptr_t rcc_base = stm32mp_rcc_base();
 
-	mmio_write_32(RCC_BASE + offset, BIT(bit));
-	while ((mmio_read_32(RCC_BASE + offset) & BIT(bit)) == 0U) {
+	mmio_write_32(rcc_base + offset, BIT(bit));
+	while ((mmio_read_32(rcc_base + offset) & BIT(bit)) == 0U) {
 		;
 	}
 }
@@ -32,9 +33,10 @@
 	uint32_t offset = ((id / (uint32_t)__LONG_BIT) * sizeof(uintptr_t)) +
 			  RST_CLR_OFFSET;
 	uint32_t bit = id % (uint32_t)__LONG_BIT;
+	uintptr_t rcc_base = stm32mp_rcc_base();
 
-	mmio_write_32(RCC_BASE + offset, BIT(bit));
-	while ((mmio_read_32(RCC_BASE + offset) & BIT(bit)) != 0U) {
+	mmio_write_32(rcc_base + offset, BIT(bit));
+	while ((mmio_read_32(rcc_base + offset) & BIT(bit)) != 0U) {
 		;
 	}
 }