refactor(cm): move remaining EL2 save/restore into C
MTE and common system registers are the last remaining EL2 save/restores
in assembly. Convert them to C, like all the others.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: If690f792e70b97fd4b4cd5f43847a71719b128f1
diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c
index 9d717bb..0ac2d6e 100644
--- a/lib/el3_runtime/aarch64/context_mgmt.c
+++ b/lib/el3_runtime/aarch64/context_mgmt.c
@@ -971,6 +971,89 @@
}
}
+/* -----------------------------------------------------
+ * The following registers are not added:
+ * AMEVCNTVOFF0<n>_EL2
+ * AMEVCNTVOFF1<n>_EL2
+ * ICH_AP0R<n>_EL2
+ * ICH_AP1R<n>_EL2
+ * ICH_LR<n>_EL2
+ * -----------------------------------------------------
+ */
+static void el2_sysregs_context_save_common(el2_sysregs_t *ctx)
+{
+ write_ctx_reg(ctx, CTX_ACTLR_EL2, read_actlr_el2());
+ write_ctx_reg(ctx, CTX_AFSR0_EL2, read_afsr0_el2());
+ write_ctx_reg(ctx, CTX_AFSR1_EL2, read_afsr1_el2());
+ write_ctx_reg(ctx, CTX_AMAIR_EL2, read_amair_el2());
+ write_ctx_reg(ctx, CTX_CNTHCTL_EL2, read_cnthctl_el2());
+ write_ctx_reg(ctx, CTX_CNTVOFF_EL2, read_cntvoff_el2());
+ write_ctx_reg(ctx, CTX_CPTR_EL2, read_cptr_el2());
+ if (CTX_INCLUDE_AARCH32_REGS) {
+ write_ctx_reg(ctx, CTX_DBGVCR32_EL2, read_dbgvcr32_el2());
+ }
+ write_ctx_reg(ctx, CTX_ELR_EL2, read_elr_el2());
+ write_ctx_reg(ctx, CTX_ESR_EL2, read_esr_el2());
+ write_ctx_reg(ctx, CTX_FAR_EL2, read_far_el2());
+ write_ctx_reg(ctx, CTX_HACR_EL2, read_hacr_el2());
+ write_ctx_reg(ctx, CTX_HCR_EL2, read_hcr_el2());
+ write_ctx_reg(ctx, CTX_HPFAR_EL2, read_hpfar_el2());
+ write_ctx_reg(ctx, CTX_HSTR_EL2, read_hstr_el2());
+ write_ctx_reg(ctx, CTX_ICC_SRE_EL2, read_icc_sre_el2());
+ write_ctx_reg(ctx, CTX_ICH_HCR_EL2, read_ich_hcr_el2());
+ write_ctx_reg(ctx, CTX_ICH_VMCR_EL2, read_ich_vmcr_el2());
+ write_ctx_reg(ctx, CTX_MAIR_EL2, read_mair_el2());
+ write_ctx_reg(ctx, CTX_MDCR_EL2, read_mdcr_el2());
+ write_ctx_reg(ctx, CTX_SCTLR_EL2, read_sctlr_el2());
+ write_ctx_reg(ctx, CTX_SPSR_EL2, read_spsr_el2());
+ write_ctx_reg(ctx, CTX_SP_EL2, read_sp_el2());
+ write_ctx_reg(ctx, CTX_TCR_EL2, read_tcr_el2());
+ write_ctx_reg(ctx, CTX_TPIDR_EL2, read_tpidr_el2());
+ write_ctx_reg(ctx, CTX_TTBR0_EL2, read_ttbr0_el2());
+ write_ctx_reg(ctx, CTX_VBAR_EL2, read_vbar_el2());
+ write_ctx_reg(ctx, CTX_VMPIDR_EL2, read_vmpidr_el2());
+ write_ctx_reg(ctx, CTX_VPIDR_EL2, read_vpidr_el2());
+ write_ctx_reg(ctx, CTX_VTCR_EL2, read_vtcr_el2());
+ write_ctx_reg(ctx, CTX_VTTBR_EL2, read_vttbr_el2());
+}
+
+static void el2_sysregs_context_restore_common(el2_sysregs_t *ctx)
+{
+ write_actlr_el2(read_ctx_reg(ctx, CTX_ACTLR_EL2));
+ write_afsr0_el2(read_ctx_reg(ctx, CTX_AFSR0_EL2));
+ write_afsr1_el2(read_ctx_reg(ctx, CTX_AFSR1_EL2));
+ write_amair_el2(read_ctx_reg(ctx, CTX_AMAIR_EL2));
+ write_cnthctl_el2(read_ctx_reg(ctx, CTX_CNTHCTL_EL2));
+ write_cntvoff_el2(read_ctx_reg(ctx, CTX_CNTVOFF_EL2));
+ write_cptr_el2(read_ctx_reg(ctx, CTX_CPTR_EL2));
+ if (CTX_INCLUDE_AARCH32_REGS) {
+ write_dbgvcr32_el2(read_ctx_reg(ctx, CTX_DBGVCR32_EL2));
+ }
+ write_elr_el2(read_ctx_reg(ctx, CTX_ELR_EL2));
+ write_esr_el2(read_ctx_reg(ctx, CTX_ESR_EL2));
+ write_far_el2(read_ctx_reg(ctx, CTX_FAR_EL2));
+ write_hacr_el2(read_ctx_reg(ctx, CTX_HACR_EL2));
+ write_hcr_el2(read_ctx_reg(ctx, CTX_HCR_EL2));
+ write_hpfar_el2(read_ctx_reg(ctx, CTX_HPFAR_EL2));
+ write_hstr_el2(read_ctx_reg(ctx, CTX_HSTR_EL2));
+ write_icc_sre_el2(read_ctx_reg(ctx, CTX_ICC_SRE_EL2));
+ write_ich_hcr_el2(read_ctx_reg(ctx, CTX_ICH_HCR_EL2));
+ write_ich_vmcr_el2(read_ctx_reg(ctx, CTX_ICH_VMCR_EL2));
+ write_mair_el2(read_ctx_reg(ctx, CTX_MAIR_EL2));
+ write_mdcr_el2(read_ctx_reg(ctx, CTX_MDCR_EL2));
+ write_sctlr_el2(read_ctx_reg(ctx, CTX_SCTLR_EL2));
+ write_spsr_el2(read_ctx_reg(ctx, CTX_SPSR_EL2));
+ write_sp_el2(read_ctx_reg(ctx, CTX_SP_EL2));
+ write_tcr_el2(read_ctx_reg(ctx, CTX_TCR_EL2));
+ write_tpidr_el2(read_ctx_reg(ctx, CTX_TPIDR_EL2));
+ write_ttbr0_el2(read_ctx_reg(ctx, CTX_TTBR0_EL2));
+ write_vbar_el2(read_ctx_reg(ctx, CTX_VBAR_EL2));
+ write_vmpidr_el2(read_ctx_reg(ctx, CTX_VMPIDR_EL2));
+ write_vpidr_el2(read_ctx_reg(ctx, CTX_VPIDR_EL2));
+ write_vtcr_el2(read_ctx_reg(ctx, CTX_VTCR_EL2));
+ write_vttbr_el2(read_ctx_reg(ctx, CTX_VTTBR_EL2));
+}
+
/*******************************************************************************
* Save EL2 sysreg context
******************************************************************************/
@@ -994,7 +1077,7 @@
el2_sysregs_context_save_common(el2_sysregs_ctx);
#if CTX_INCLUDE_MTE_REGS
- el2_sysregs_context_save_mte(el2_sysregs_ctx);
+ write_ctx_reg(el2_sysregs_ctx, CTX_TFSR_EL2, read_tfsr_el2());
#endif
if (is_feat_mpam_supported()) {
el2_sysregs_context_save_mpam(el2_sysregs_ctx);
@@ -1083,7 +1166,7 @@
el2_sysregs_context_restore_common(el2_sysregs_ctx);
#if CTX_INCLUDE_MTE_REGS
- el2_sysregs_context_restore_mte(el2_sysregs_ctx);
+ write_tfsr_el2(read_ctx_reg(el2_sysregs_ctx, CTX_TFSR_EL2));
#endif
if (is_feat_mpam_supported()) {
el2_sysregs_context_restore_mpam(el2_sysregs_ctx);