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review.trustedfirmware.org / sandbox / pfalcon / trusted-firmware-a / 23e47ede20b80e9f6cea5a7232ed1915ffbc9496 / include
  1. 23e47ed Common driver for ARM Cache Coherent Interconnects by Vikram Kanigiri · 11 years ago
  2. a7e98ad Add macro to calculate number of elements in an array by Vikram Kanigiri · 10 years ago
  3. 8c32bc2 Export maximum affinity using PLATFORM_MAX_AFFLVL macro by Soby Mathew · 10 years ago
  4. 40febc3 TBB: add authentication module interface by Juan Castillo · 11 years ago
  5. e509d05 stdlib: add missing features to build PolarSSL by Juan Castillo · 11 years ago
  6. 6eadf76 TBB: add a platform specific function to validate the ROTPK by Juan Castillo · 11 years ago
  7. b7124ea TBB: add support to include certificates in a FIP image by Juan Castillo · 11 years ago
  8. 79a97b2 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 11 years ago
  9. f4f1ae7 Demonstrate model for routing IRQs to EL3 by Soby Mathew · 11 years ago
  10. e8ca7d1 Increment the PSCI VERSION to 1.0 by Soby Mathew · 11 years ago
  11. 90e8258 Implement PSCI_FEATURES API by Soby Mathew · 11 years ago
  12. 8991eed Rework the PSCI migrate APIs by Soby Mathew · 11 years ago
  13. 22f0897 Return success if an interrupt is seen during PSCI CPU_SUSPEND by Soby Mathew · 11 years ago
  14. 539dced Validate power_state and entrypoint when executing PSCI calls by Soby Mathew · 11 years ago
  15. 31244d7 Save 'power_state' early in PSCI CPU_SUSPEND call by Soby Mathew · 11 years ago
  16. e146f4c Remove `ns_entrypoint` and `mpidr` from parameters in pm_ops by Soby Mathew · 11 years ago
  17. 8c5fe0b Move bakery algorithm implementation out of coherent memory by Soby Mathew · 11 years ago
  18. 5b1cd43 Add macros for domain specific barriers. by Soby Mathew · 11 years ago
  19. 1c73ffb Merge pull request #235 from soby-mathew/sm/inv_cpu_ops by danh-arm · 11 years ago
  20. 0999734 Invalidate the dcache after initializing cpu-ops by Soby Mathew · 11 years ago
  21. 36e2fd0 Prevent optimisation of sysregs accessors calls by Sandrine Bailleux · 11 years ago
  22. 235585b Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · 11 years ago
  23. e73f4ef Merge pull request #219 from jcastillo-arm/jc/tf-issues/253 by danh-arm · 11 years ago
  24. eb57fa5 Improvements to ARM GIC driver by Juan Castillo · 11 years ago
  25. 7395a72 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 11 years ago
  26. d1d92a2 Merge pull request #215 from jcastillo-arm/jc/juno_mem_6 by danh-arm · 11 years ago
  27. 740134e Juno: Reserve some DDR-DRAM for secure use by Juan Castillo · 11 years ago
  28. d07baec Merge pull request #206 from soby-mathew/sm/reset_cntvoff by Andrew Thoelke · 11 years ago
  29. d0ecd97 Create BL stage specific translation tables by Soby Mathew · 11 years ago
  30. ae213ce Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · 11 years ago
  31. 14c0526 Reset CNTVOFF_EL2 register before exit into EL1 on warm boot by Soby Mathew · 11 years ago
  32. 4480425 Miscellaneous documentation fixes by Sandrine Bailleux · 11 years ago
  33. 01b916b Juno: Implement initial platform port by Sandrine Bailleux · 11 years ago
  34. d9bdaf2 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 11 years ago
  35. d3f70af Add CPU specific crash reporting handlers by Soby Mathew · 11 years ago
  36. add4035 Add CPU specific power management operations by Soby Mathew · 11 years ago
  37. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 11 years ago
  38. aecc084 Rework use of labels in assembly macros. by Soby Mathew · 11 years ago
  39. a4a8eae Miscellaneous PSCI code cleanups by Achin Gupta · 11 years ago
  40. 0a46e2c Add APIs to preserve highest affinity level in OFF state by Achin Gupta · 11 years ago
  41. 776b68a Add PSCI service specific per-CPU data by Achin Gupta · 11 years ago
  42. 04fafce Add macro to flush per-CPU data by Achin Gupta · 11 years ago
  43. d5f1309 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · 11 years ago
  44. 5a06bb7 Clarify platform porting interface to TSP by Dan Handley · 11 years ago
  45. da0af78 Move TSP private declarations into separate header by Dan Handley · 11 years ago
  46. 3279f62 Simplify interface to TZC-400 driver by Dan Handley · 11 years ago
  47. 935db69 Move IO storage source to drivers directory by Dan Handley · 11 years ago
  48. 6d16ce0 Remove redundant io_init() function by Dan Handley · 11 years ago
  49. cae3ef9 Remove platform dependency in CCI-400 driver by Dan Handley · 11 years ago
  50. 289c28a Add concept of console output log levels by Dan Handley · 11 years ago
  51. fdfabec Optimize EL3 register state stored in cpu_context structure by Soby Mathew · 11 years ago
  52. dd2bdee Merge pull request #177 from jcastillo-arm/jc/tf-issues/096 by danh-arm · 11 years ago
  53. 6397bf6 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 11 years ago
  54. 9fd4127 Merge pull request #170 from achingupta/ag/tf-issues#226 by danh-arm · 11 years ago
  55. d9b1128 Merge pull request #169 from achingupta/ag/tf-issues#198 by danh-arm · 11 years ago
  56. d3280be Rework incorrect use of assert() and panic() in codebase by Juan Castillo · 11 years ago
  57. 8c10690 Add CPUECTLR_EL1 and Snoop Control register to crash reporting by Soby Mathew · 11 years ago
  58. 626ed51 Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 11 years ago
  59. bc92012 Implement an assert() callable from assembly code by Soby Mathew · 11 years ago
  60. c67b09b Introduce crash console APIs for crash reporting by Soby Mathew · 11 years ago
  61. 462c835 Parametrize baudrate and UART clock during console_init() by Soby Mathew · 11 years ago
  62. fce5f75 Introduce asm console functions in TF by Soby Mathew · 11 years ago
  63. ec3c100 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 11 years ago
  64. aaa3e72 Add support for printing version at runtime by Juan Castillo · 11 years ago
  65. b79af93 Implement a leaner printf for Trusted Firmware by Soby Mathew · 11 years ago
  66. b51da82 Remove coherent stack usage from the warm boot path by Achin Gupta · 11 years ago
  67. afff8cb Make enablement of the MMU more flexible by Achin Gupta · 11 years ago
  68. a1a4417 Merge pull request #162 from jcastillo-arm/jc/tf-issues/194 by danh-arm · 11 years ago
  69. ab26147 Merge pull request #164 from sandrine-bailleux/sb/bl30-support-v2 by danh-arm · 11 years ago
  70. 93d81d6 Add support for BL3-0 image by Sandrine Bailleux · 11 years ago
  71. 6a22315 Merge pull request #157 from sandrine-bailleux/sb/tf-issue-109 by danh-arm · 11 years ago
  72. 3fc938b Merge pull request #146 from danh-arm/dh/refactor-fvp-gic by danh-arm · 11 years ago
  73. 0f21c54 Allow FP register context to be optional at build time by Juan Castillo · 11 years ago
  74. 1e8c5c4 Refactor fvp gic code to be a generic driver by Dan Handley · 11 years ago
  75. 6f3b195 Refactor fvp_config into common platform header by Dan Handley · 11 years ago
  76. 73ad257 Calculate TCR bits based on VA and PA by Lin Ma · 11 years ago
  77. 8f55dfb Remove concept of top/bottom image loading by Sandrine Bailleux · 11 years ago
  78. 5e0f9bd Merge pull request #154 from athoelke/at/inline-mmio by Andrew Thoelke · 11 years ago
  79. e73af8a Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2 by danh-arm · 11 years ago
  80. 7eea135 Merge pull request #147 from athoelke/at/remove-bakery-mpidr by danh-arm · 11 years ago
  81. 5e11375 Inline the mmio accessor functions by Andrew Thoelke · 11 years ago
  82. 4f2104f Remove all checkpatch errors from codebase by Juan Castillo · 11 years ago
  83. 634ec6c Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · 11 years ago
  84. 6c0b45d Correctly dimension the PSCI aff_map_node array by Andrew Thoelke · 11 years ago
  85. 167a935 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 11 years ago
  86. 5298f2c Merge pull request #138 from athoelke/at/cpu-context by danh-arm · 11 years ago
  87. ee94cc6 Remove early_exceptions from BL3-1 by Andrew Thoelke · 11 years ago
  88. aaba4f2 Move CPU context pointers into cpu_data by Andrew Thoelke · 11 years ago
  89. 5e91007 Per-cpu data cache restructuring by Andrew Thoelke · 11 years ago
  90. 30e3b31 Merge pull request #131 from athoelke/at/cm_get_context by danh-arm · 11 years ago
  91. 5c633bd Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · 11 years ago
  92. 08ab89d Provide cm_get/set_context() for current CPU by Andrew Thoelke · 11 years ago
  93. 5c3272a Make system register functions inline assembly by Andrew Thoelke · 11 years ago
  94. f984ce8 Enable mapping higher physical address by Lin Ma · 11 years ago
  95. 9865ac1 Further renames of platform porting functions by Dan Handley · 11 years ago
  96. 0ad4691 Remove FVP specific comments in platform.h by Dan Handley · 11 years ago
  97. dff8e47 Add enable mmu platform porting interfaces by Dan Handley · 11 years ago for-v0.4-rc0
  98. dec5e0d Move BL porting functions into platform.h by Dan Handley · 11 years ago
  99. 5f0cdb0 Split platform.h into separate headers by Dan Handley · 11 years ago
  100. 7a9a5f2 Remove unused data declarations by Dan Handley · 11 years ago