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review.trustedfirmware.org / sandbox / pfalcon / trusted-firmware-a / c8d64c54c9397f19555cb23b87c5170595ed5e7a / include / lib / aarch64
  1. c8d64c5 Fix declarations of cache maintenance functions by Antonio Nino Diaz · 9 years ago
  2. 0029624 Add PLAT_xxx_ADDR_SPACE_SIZE definitions by Antonio Nino Diaz · 9 years ago
  3. 939f66d Reset EL2 and EL3 configurable controls by David Cunado · 9 years ago
  4. 495f3d3 Reset debug registers MDCR-EL3/SDCR and MDCR_EL2/HDCR by David Cunado · 9 years ago
  5. b7b0787 Unify SCTLR initialization for AArch32 normal world by Soby Mathew · 9 years ago
  6. c1ff80b Support for Mediatek MT6795 SoC by Leon Chen · 9 years ago
  7. e871955 Automatically select initial xlation lookup level by Antonio Nino Diaz · 9 years ago
  8. 1ae0a49 AArch32: Add API to invoke runtime service handler by Soby Mathew · 9 years ago
  9. c45f627 Move SIZE_FROM_LOG2_WORDS macro to utils.h by Soby Mathew · 9 years ago
  10. cf0b149 Introduce PSCI Library Interface by Soby Mathew · 9 years ago
  11. 3ca9928 Refactor the xlat_tables library code by Soby Mathew · 9 years ago
  12. c291641 Merge pull request #577 from antonio-nino-diaz-arm/an/remove-xlat-helpers by danh-arm · 9 years ago
  13. f33fbb2 Remove xlat_helpers.c by Antonio Nino Diaz · 9 years ago
  14. 6b836cf Add ISR_EL1 to crash report by Gerald Lejeune · 9 years ago
  15. 4ca5753 Remove DAIF bits handling macros by Gerald Lejeune · 9 years ago
  16. 5f65497 Extend memory attributes to map non-cacheable memory by Sandrine Bailleux · 9 years ago
  17. 74eb26e ARM platforms: rationalise memory attributes of shared memory by Juan Castillo · 10 years ago
  18. 85d80e5 Initialize VTTBR_EL2 when bypassing EL2 by Sandrine Bailleux · 10 years ago
  19. df37373 Add ARM GICv3 driver without support for legacy operation by Achin Gupta · 10 years ago
  20. 6cd12da Add missing RES1 bit in SCTLR_EL1 by Vikram Kanigiri · 10 years ago
  21. 54dc71e Make generic code work in presence of system caches by Achin Gupta · 10 years ago
  22. ce4c820 Remove use of PLATFORM_CACHE_LINE_SIZE by Dan Handley · 10 years ago
  23. 874cd37 Merge pull request #280 from vwadekar/tlkd-fixed-v3 by danh-arm · 10 years ago
  24. 6e159e7 Translate secure/non-secure virtual addresses by Varun Wadekar · 10 years ago
  25. 4991ecd Use ARM CCI driver on FVP and Juno platforms by Vikram Kanigiri · 10 years ago
  26. 22f0897 Return success if an interrupt is seen during PSCI CPU_SUSPEND by Soby Mathew · 11 years ago
  27. 5b1cd43 Add macros for domain specific barriers. by Soby Mathew · 11 years ago
  28. 36e2fd0 Prevent optimisation of sysregs accessors calls by Sandrine Bailleux · 11 years ago
  29. 235585b Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · 11 years ago
  30. 7395a72 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 11 years ago
  31. d07baec Merge pull request #206 from soby-mathew/sm/reset_cntvoff by Andrew Thoelke · 11 years ago
  32. d0ecd97 Create BL stage specific translation tables by Soby Mathew · 11 years ago
  33. ae213ce Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · 11 years ago
  34. 14c0526 Reset CNTVOFF_EL2 register before exit into EL1 on warm boot by Soby Mathew · 11 years ago
  35. 01b916b Juno: Implement initial platform port by Sandrine Bailleux · 11 years ago
  36. d9bdaf2 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 11 years ago
  37. d3f70af Add CPU specific crash reporting handlers by Soby Mathew · 11 years ago
  38. add4035 Add CPU specific power management operations by Soby Mathew · 11 years ago
  39. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 11 years ago
  40. ec3c100 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 11 years ago
  41. afff8cb Make enablement of the MMU more flexible by Achin Gupta · 11 years ago
  42. 73ad257 Calculate TCR bits based on VA and PA by Lin Ma · 11 years ago
  43. 4f2104f Remove all checkpatch errors from codebase by Juan Castillo · 11 years ago
  44. 167a935 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 11 years ago
  45. 5c633bd Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · 11 years ago
  46. 5c3272a Make system register functions inline assembly by Andrew Thoelke · 11 years ago
  47. f984ce8 Enable mapping higher physical address by Lin Ma · 11 years ago
  48. dff8e47 Add enable mmu platform porting interfaces by Dan Handley · 11 years ago for-v0.4-rc0
  49. 5f0cdb0 Split platform.h into separate headers by Dan Handley · 11 years ago
  50. c6bc071 Remove extern keyword from function declarations by Dan Handley · 11 years ago
  51. fa9c08b Use secure timer to generate S-EL1 interrupts by Achin Gupta · 11 years ago
  52. c429b5e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 11 years ago
  53. 23ff9ba Introduce macros to manipulate the SPSR by Vikram Kanigiri · 11 years ago
  54. a43d431 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · 11 years ago
  55. b3254e8 Introduce IS_IN_ELX() macros by Sandrine Bailleux · 11 years ago
  56. 228a9f0 Remove unused or invalid asm helper functions by Andrew Thoelke · 11 years ago
  57. 2f5dcfe Replace disable_mmu with assembler version by Andrew Thoelke · 11 years ago
  58. 97043ac Reduce deep nesting of header files by Dan Handley · 11 years ago
  59. fb037bf Always use named structs in header files by Dan Handley · 11 years ago
  60. 5b827a8 Separate BL functions out of arch.h by Dan Handley · 11 years ago
  61. 4ecca33 Move include and source files to logical locations by Dan Handley · 11 years ago