blob: a4195c3a8c0e5eb1750ba88e342a6373f88c29b4 [file] [log] [blame]
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +02001/*
Soby Mathew2c2810f2024-11-15 17:11:24 +00002 * Copyright (c) 2018-2024, Arm Limited. All rights reserved.
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch_helpers.h>
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +02008#include <debug.h>
Antonio Nino Diaz09a00ef2019-01-11 13:12:58 +00009#include <drivers/arm/sp805.h>
10#include <drivers/console.h>
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020011#include <platform.h>
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020012#include <xlat_tables_v2.h>
13
14/*
15 * The following platform functions are all weakly defined. They provide typical
16 * implementations that may be re-used by multiple platforms but may also be
17 * overridden by a platform if required.
18 */
19
20#pragma weak tftf_platform_end
21#pragma weak tftf_platform_watchdog_set
22#pragma weak tftf_platform_watchdog_reset
23#pragma weak tftf_plat_configure_mmu
24#pragma weak tftf_plat_enable_mmu
25#pragma weak tftf_plat_reset
26#pragma weak plat_get_prot_regions
Soby Mathew2c2810f2024-11-15 17:11:24 +000027#pragma weak plat_pcie_get_info_table
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020028
29#if IMAGE_TFTF
30
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010031#define IMAGE_TEXT_BASE TFTF_BASE
32IMPORT_SYM(uintptr_t, __TEXT_END__, IMAGE_TEXT_END);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020033
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010034#define IMAGE_RODATA_BASE IMAGE_TEXT_END
35IMPORT_SYM(uintptr_t, __RODATA_END__, IMAGE_RODATA_END);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020036
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010037#define IMAGE_RW_BASE IMAGE_RODATA_END
38IMPORT_SYM(uintptr_t, __TFTF_END__, IMAGE_RW_END);
39
40IMPORT_SYM(uintptr_t, __COHERENT_RAM_START__, COHERENT_RAM_START);
41IMPORT_SYM(uintptr_t, __COHERENT_RAM_END__, COHERENT_RAM_END);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020042
43#elif IMAGE_NS_BL1U
44
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010045#define IMAGE_TEXT_BASE NS_BL1U_BASE
46IMPORT_SYM(uintptr_t, __TEXT_END__, IMAGE_TEXT_END);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020047
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010048#define IMAGE_RODATA_BASE IMAGE_TEXT_END
49IMPORT_SYM(uintptr_t, __RODATA_END__, IMAGE_RODATA_END);
50
51#define IMAGE_RW_BASE NS_BL1U_RW_BASE
52IMPORT_SYM(uintptr_t, __NS_BL1U_RAM_END__, IMAGE_RW_END);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020053
54#elif IMAGE_NS_BL2U
55
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010056#define IMAGE_TEXT_BASE NS_BL2U_BASE
57IMPORT_SYM(uintptr_t, __TEXT_END__, IMAGE_TEXT_END);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020058
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010059#define IMAGE_RODATA_BASE IMAGE_TEXT_END
60IMPORT_SYM(uintptr_t, __RODATA_END__, IMAGE_RODATA_END);
61
62#define IMAGE_RW_BASE IMAGE_RODATA_END
63IMPORT_SYM(uintptr_t, __NS_BL2U_END__, IMAGE_RW_END_UNALIGNED);
64#define IMAGE_RW_END round_up(IMAGE_RW_END_UNALIGNED, PAGE_SIZE)
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020065
66#endif
67
68void tftf_platform_end(void)
69{
70 /*
71 * Send EOT (End Of Transmission) on the UART.
72 * This can be used to shutdown a software model.
73 */
74 static const char ascii_eot = 4;
75 console_putc(ascii_eot);
76}
77
78void tftf_platform_watchdog_set(void)
79{
80 /* Placeholder function which should be redefined by each platform */
81}
82
83void tftf_platform_watchdog_reset(void)
84{
85 /* Placeholder function which should be redefined by each platform */
86}
87
88void tftf_plat_configure_mmu(void)
89{
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010090 /* Code */
91 mmap_add_region(IMAGE_TEXT_BASE, IMAGE_TEXT_BASE,
Alexei Fedorovdf954c92020-06-17 15:37:17 +010092 IMAGE_TEXT_END - IMAGE_TEXT_BASE, MT_CODE | MT_NS);
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010093
94 /* RO data */
95 mmap_add_region(IMAGE_RODATA_BASE, IMAGE_RODATA_BASE,
Alexei Fedorovdf954c92020-06-17 15:37:17 +010096 IMAGE_RODATA_END - IMAGE_RODATA_BASE, MT_RO_DATA | MT_NS);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020097
98 /* Data + BSS */
99 mmap_add_region(IMAGE_RW_BASE, IMAGE_RW_BASE,
Alexei Fedorovdf954c92020-06-17 15:37:17 +0100100 IMAGE_RW_END - IMAGE_RW_BASE, MT_RW_DATA | MT_NS);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200101
102#if IMAGE_TFTF
103 mmap_add_region(COHERENT_RAM_START, COHERENT_RAM_START,
104 COHERENT_RAM_END - COHERENT_RAM_START,
105 MT_DEVICE | MT_RW | MT_NS);
106#endif
107
108 mmap_add(tftf_platform_get_mmap());
109 init_xlat_tables();
110
111 tftf_plat_enable_mmu();
112}
113
114void tftf_plat_enable_mmu(void)
115{
Deepika Bhavnanic249d5e2020-02-06 16:29:45 -0600116#ifdef __aarch64__
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200117 if (IS_IN_EL1())
118 enable_mmu_el1(0);
119 else if (IS_IN_EL2())
120 enable_mmu_el2(0);
121 else
122 panic();
123#else
124 if (IS_IN_HYP())
125 enable_mmu_hyp(0);
126 else
127 enable_mmu_svc_mon(0);
128#endif
129}
130
131void tftf_plat_reset(void)
132{
133 /*
134 * SP805 peripheral interrupt is not serviced in TFTF. The reset signal
135 * generated by it is used to reset the platform.
136 */
137 sp805_wdog_start(1);
138
139 /*
140 * Reset might take some execution cycles, Depending on the ratio between
141 * CPU clock frequency and Watchdog clock frequency
142 */
143 while (1)
144 ;
145}
146
147const mem_region_t *plat_get_prot_regions(int *nelem)
148{
149 *nelem = 0;
150 return NULL;
151}
Soby Mathew2c2810f2024-11-15 17:11:24 +0000152
153const struct pcie_info_table *plat_pcie_get_info_table(void)
154{
155 return NULL;
156}