Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2018, Arm Limited. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef __PLATFORM_H__ |
| 8 | #define __PLATFORM_H__ |
| 9 | |
| 10 | #include <stdint.h> |
| 11 | #include <timer.h> |
| 12 | #include <xlat_tables_v2.h> |
| 13 | |
| 14 | #define PLAT_PSCI_DUMMY_STATE_ID 0xF |
| 15 | |
| 16 | #define PWR_STATE_INIT_INDEX (-1) |
| 17 | |
| 18 | #define INIT_PWR_LEVEL_INDEX(array_name) \ |
| 19 | do { \ |
| 20 | unsigned int var; \ |
| 21 | assert(ARRAY_SIZE(array_name) == (PLAT_MAX_PWR_LEVEL + 1)); \ |
| 22 | for (var = 0; var <= PLAT_MAX_PWR_LEVEL; var++) \ |
| 23 | array_name[var] = PWR_STATE_INIT_INDEX; \ |
| 24 | } while (0) |
| 25 | |
| 26 | /* |
| 27 | * The platform structure to represent the valid local power state |
| 28 | * properties for a particular affinity level. The platform needs to |
| 29 | * export the array of valid local low power states for each affinity level |
| 30 | * it supports which can be queried by TFTF tests to construct the required |
| 31 | * composite power state. |
| 32 | * |
| 33 | * TODO: Currently the power levels are identity mapped to affinity level in |
| 34 | * TFTF which need to be decoupled. |
| 35 | */ |
| 36 | typedef struct plat_state_prop { |
| 37 | /* |
| 38 | * This field has a value in the increasing order of the suspend |
| 39 | * depth. Deeper the suspend state, higher the value. |
| 40 | */ |
| 41 | unsigned int suspend_depth; |
| 42 | /* The local state ID for the idle state at this level. */ |
| 43 | unsigned int state_ID; |
| 44 | /* Flag which indicates whether is a retention or power down state */ |
| 45 | unsigned int is_pwrdown; |
| 46 | } plat_state_prop_t; |
| 47 | |
| 48 | void tftf_plat_arch_setup(void); |
| 49 | void tftf_early_platform_setup(void); |
| 50 | void tftf_platform_setup(void); |
| 51 | |
| 52 | void tftf_plat_enable_mmu(void); |
| 53 | void tftf_plat_configure_mmu(void); |
| 54 | |
| 55 | void tftf_platform_end(void); |
| 56 | void tftf_platform_watchdog_set(void); |
| 57 | void tftf_platform_watchdog_reset(void); |
| 58 | |
| 59 | /* Gets a handle for the initialised IO entity */ |
| 60 | void plat_get_nvm_handle(uintptr_t *handle); |
| 61 | |
| 62 | /* |
| 63 | * Returns the platform topology description array. The size of this |
| 64 | * array should be PLATFORM_NUM_AFFS - PLATFORM_CORE_COUNT + 1. |
| 65 | */ |
| 66 | const unsigned char *tftf_plat_get_pwr_domain_tree_desc(void); |
| 67 | |
| 68 | /* |
| 69 | * Function to query the MPIDR of a CPU identified by 'core_pos' which is |
| 70 | * the number returned by platform_get_core() API. |
| 71 | * In case the CPU is absent, then this API returns INVALID_MPID. This |
| 72 | * function will be queried only during topology setup in TFTF and thereafter |
| 73 | * the internal node data will be used to get the MPIDR corresponding |
| 74 | * to the 'core_pos'. |
| 75 | */ |
| 76 | uint64_t tftf_plat_get_mpidr(unsigned int core_pos); |
| 77 | |
| 78 | /* |
| 79 | * Get the state property array for all the valid states from platform for |
| 80 | * a specified 'level'. The array is expected to be NULL terminated after the |
| 81 | * last entry. |
| 82 | */ |
| 83 | const plat_state_prop_t *plat_get_state_prop(unsigned int level); |
| 84 | |
| 85 | /* |
| 86 | * Initialises state info data structures for generating various combinations |
| 87 | * of state ID's. It also calls tftf_detect_pstate_format() which detects the |
| 88 | * PSTATE format accepted by EL3 firmware. |
| 89 | * This function needs to be invoked once during cold boot prior to the |
| 90 | * invocation of any PSCI power state helper functions. |
| 91 | */ |
| 92 | void tftf_init_pstate_framework(void); |
| 93 | |
| 94 | /* |
| 95 | * This function is used to generate all possible combinations of composite |
| 96 | * state ID's possible for a given set of power states at each level. |
| 97 | * Ex: If a system implements 4 levels and each level has 3 local power states. |
| 98 | * Then, the total combinations of composite power down states possible are: |
| 99 | * 3 * 3 * 3 * 3 = 81 |
| 100 | * |
| 101 | * A single call to set_next_state_id_pointers(), sets pointer to pstate_id_idx |
| 102 | * at all levels for a possible combination out of 81. |
| 103 | * |
| 104 | * A caller can confirm when all combinations are completed by checking if |
| 105 | * pwr_lvel_state_indexes for power_level 0 is PWR_STATE_INIT_INDEX |
| 106 | */ |
| 107 | void tftf_set_next_state_id_idx(unsigned int power_level, |
| 108 | unsigned int pstate_id_idx[]); |
| 109 | |
| 110 | /* |
| 111 | * This function sets the index for the next state ID of the given power level |
| 112 | */ |
| 113 | void tftf_set_next_local_state_id_idx(unsigned int power_level, |
| 114 | unsigned int pstate_id_idx[]); |
| 115 | |
| 116 | /* |
| 117 | * This function sets the index corresponding to the deepest power state at |
| 118 | * a given power level. |
| 119 | */ |
| 120 | void tftf_set_deepest_pstate_idx(unsigned int power_level, |
| 121 | unsigned int pstate_id_idx[]); |
| 122 | |
| 123 | /* |
| 124 | * Helper function to get the state ID, state type, power level in power_state |
| 125 | * parameter of CPU_SUSPEND. The generated values are based on the |
| 126 | * pstate_id_idx values of a core. |
| 127 | * |
| 128 | * This helper expects a valid pstate_id_idx till the max valid levels |
| 129 | * and it detects the max valid level to be terminated by PWR_STATE_INIT value |
| 130 | * |
| 131 | * It returns the expected PSCI return value of a suspend request |
| 132 | */ |
| 133 | int tftf_get_pstate_vars(unsigned int *test_power_level, |
| 134 | unsigned int *test_suspend_type, |
| 135 | unsigned int *suspend_state_id, |
| 136 | unsigned int pstate_id_idx[]); |
| 137 | |
| 138 | /* |
| 139 | * This function gets the platform specific timer driver information and |
| 140 | * initialises platform specific drivers. |
| 141 | * Returns 0 on success. |
| 142 | */ |
| 143 | int plat_initialise_timer_ops(const plat_timer_t **timer_ops); |
| 144 | |
| 145 | struct mem_region { |
| 146 | uintptr_t addr; |
| 147 | size_t size; |
| 148 | }; |
| 149 | |
| 150 | typedef struct mem_region mem_region_t; |
| 151 | |
| 152 | /******************************************************************************* |
| 153 | * Optional functions. A default, weak implementation of those functions is |
| 154 | * provided, it may be overridden by platform code. |
| 155 | ******************************************************************************/ |
| 156 | unsigned int platform_get_core_pos(unsigned long mpid); |
| 157 | unsigned long platform_get_stack(unsigned long mpidr); |
| 158 | int plat_crash_console_init(void); |
| 159 | int plat_crash_console_putc(int c); |
| 160 | int plat_crash_console_flush(void); |
| 161 | /* |
| 162 | * plat_get_prot_regions: It returns a pointer to a |
| 163 | * set of regions used to test mem_protect_check. |
| 164 | * The number of elements are stored in the variable |
| 165 | * pointed by nelem. |
| 166 | */ |
| 167 | const mem_region_t *plat_get_prot_regions(int *nelem); |
| 168 | |
| 169 | void tftf_plat_reset(void); |
| 170 | |
| 171 | const mmap_region_t *tftf_platform_get_mmap(void); |
| 172 | |
| 173 | /* |
| 174 | * Return an IO device handle and specification which can be used |
| 175 | * to access an image. Use this to enforce platform load policy. |
| 176 | */ |
| 177 | int plat_get_image_source(unsigned int image_id, |
| 178 | uintptr_t *dev_handle, |
| 179 | uintptr_t *image_spec); |
| 180 | |
| 181 | void plat_fwu_io_setup(void); |
| 182 | |
| 183 | #endif /* __PLATFORM_H__ */ |