blob: 1fff22fea3bcfb9b4666759a380214cefd1b9f08 [file] [log] [blame]
Akshay Belsaree52f3112023-06-30 15:46:34 +05301..
2 Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved. !
3
4 SPDX-License-Identifier: BSD-3-Clause !
5
6
7Xilinx Versal
8=============
9
10- The TF-A Tests on Xilinx Versal platfrom runs from DDR.
11- Logs are available only on console and not saved in memory(No NVM support).
12- Versal Platform uses TTC Timer
13
14
15Build Command
16-------------
17For individual tests/test suite:
18
19.. code-block:: shell
20
21 make CROSS_COMPILE=aarch64-none-elf- PLAT=versal TESTS=<required tests> tftf
22
23For Versal Specific tests (includes AMD-Xilinx Tests cases + Standard Test Suite)
24
25.. code-block:: shell
26
27 make CROSS_COMPILE=aarch64-none-elf- PLAT=versal TESTS=versal tftf
28
29Execution on Target
30-------------------
31
32- The TF-A Tests uses the memory location of U-boot.
33- To package the tftf.elf in BOOT.BIN, the u-boot entry in bootgen.bif needs to be replaced with following
34
35.. code-block:: shell
36
37 the_ROM_image:
38 {
39 image {
40 { type=bootimage, file=project-spec/hw-description/vpl_gen_fixed.pdi }
41 { type=bootloader, file=plm.elf }
42 { core=psm, file=psmfw.elf }
43 }
44 image {
45 id = 0x1c000000, name=apu_subsystem
46 { type=raw, load=0x00001000, file=system-default.dtb }
47 { core=a72-0, exception_level=el-3, trustzone, file=bl31.elf }
48 { core=a72-0, file=tftf.elf }
49 }
50 }
51
52- The BOOT.BIN with TF-A Tests can now be used to run on the target.
53- The TF-A Tests will be executed after TF-A and the tests report will be available on the console.