Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 1 | /* |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 2 | * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #ifndef __PSCI_PRIVATE_H__ |
| 32 | #define __PSCI_PRIVATE_H__ |
| 33 | |
| 34 | #include <arch.h> |
| 35 | #include <bakery_lock.h> |
| 36 | #include <bl_common.h> |
| 37 | #include <psci.h> |
| 38 | |
| 39 | /* |
| 40 | * The following helper macros abstract the interface to the Bakery |
| 41 | * Lock API. |
| 42 | */ |
| 43 | #if USE_COHERENT_MEM |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 44 | #define psci_lock_init(pwr_map, idx) bakery_lock_init(&(pwr_map)[(idx)].lock) |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 45 | #define psci_lock_get(node) bakery_lock_get(&((node)->lock)) |
| 46 | #define psci_lock_release(node) bakery_lock_release(&((node)->lock)) |
| 47 | #else |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 48 | #define psci_lock_init(pwr_map, idx) \ |
| 49 | ((pwr_map)[(idx)].pwr_domain_index = (idx)) |
| 50 | #define psci_lock_get(node) \ |
| 51 | bakery_lock_get((node)->pwr_domain_index,\ |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 52 | CPU_DATA_PSCI_LOCK_OFFSET) |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 53 | #define psci_lock_release(node) \ |
| 54 | bakery_lock_release((node)->pwr_domain_index,\ |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 55 | CPU_DATA_PSCI_LOCK_OFFSET) |
| 56 | #endif |
| 57 | |
| 58 | /* |
| 59 | * The PSCI capability which are provided by the generic code but does not |
| 60 | * depend on the platform or spd capabilities. |
| 61 | */ |
| 62 | #define PSCI_GENERIC_CAP \ |
| 63 | (define_psci_cap(PSCI_VERSION) | \ |
| 64 | define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \ |
| 65 | define_psci_cap(PSCI_FEATURES)) |
| 66 | |
| 67 | /* |
| 68 | * The PSCI capabilities mask for 64 bit functions. |
| 69 | */ |
| 70 | #define PSCI_CAP_64BIT_MASK \ |
| 71 | (define_psci_cap(PSCI_CPU_SUSPEND_AARCH64) | \ |
| 72 | define_psci_cap(PSCI_CPU_ON_AARCH64) | \ |
| 73 | define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \ |
| 74 | define_psci_cap(PSCI_MIG_AARCH64) | \ |
| 75 | define_psci_cap(PSCI_MIG_INFO_UP_CPU_AARCH64) | \ |
| 76 | define_psci_cap(PSCI_SYSTEM_SUSPEND_AARCH64)) |
| 77 | |
| 78 | |
| 79 | /******************************************************************************* |
| 80 | * The following two data structures hold the topology tree which in turn tracks |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 81 | * the state of the all the power domain instances supported by the platform. |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 82 | ******************************************************************************/ |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 83 | typedef struct pwr_map_node { |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 84 | unsigned long mpidr; |
| 85 | unsigned char ref_count; |
| 86 | unsigned char state; |
| 87 | unsigned char level; |
| 88 | #if USE_COHERENT_MEM |
| 89 | bakery_lock_t lock; |
| 90 | #else |
| 91 | /* For indexing the bakery_info array in per CPU data */ |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 92 | unsigned char pwr_domain_index; |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 93 | #endif |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 94 | } pwr_map_node_t; |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 95 | |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 96 | typedef struct pwr_lvl_limits_node { |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 97 | int min; |
| 98 | int max; |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 99 | } pwr_lvl_limits_node_t; |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 100 | |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 101 | typedef pwr_map_node_t (*mpidr_pwr_map_nodes_t[MPIDR_MAX_AFFLVL + 1]); |
| 102 | typedef void (*pwrlvl_power_on_finisher_t)(pwr_map_node_t *mpidr_nodes[], |
| 103 | int pwrlvl); |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 104 | |
| 105 | /******************************************************************************* |
| 106 | * Data prototypes |
| 107 | ******************************************************************************/ |
| 108 | extern const plat_pm_ops_t *psci_plat_pm_ops; |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 109 | extern pwr_map_node_t psci_pwr_domain_map[PSCI_NUM_PWR_DOMAINS]; |
| 110 | extern pwr_lvl_limits_node_t psci_pwr_domain_map[MPIDR_MAX_AFFLVL + 1]; |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 111 | extern uint32_t psci_caps; |
| 112 | |
| 113 | /******************************************************************************* |
| 114 | * SPD's power management hooks registered with PSCI |
| 115 | ******************************************************************************/ |
| 116 | extern const spd_pm_ops_t *psci_spd_pm; |
| 117 | |
| 118 | /******************************************************************************* |
| 119 | * Function prototypes |
| 120 | ******************************************************************************/ |
| 121 | /* Private exported functions from psci_common.c */ |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 122 | unsigned short psci_get_state(pwr_map_node_t *node); |
| 123 | unsigned short psci_get_phys_state(pwr_map_node_t *node); |
| 124 | void psci_set_state(pwr_map_node_t *node, unsigned short state); |
| 125 | unsigned long mpidr_set_pwr_domain_inst(unsigned long, unsigned char, int); |
Soby Mathew | 12d0d00 | 2015-04-09 13:40:55 +0100 | [diff] [blame^] | 126 | int psci_validate_mpidr(unsigned long mpidr); |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 127 | int get_power_on_target_pwrlvl(void); |
| 128 | void psci_power_up_finish(int end_pwrlvl, |
| 129 | pwrlvl_power_on_finisher_t pon_handler); |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 130 | int psci_get_ns_ep_info(entry_point_info_t *ep, |
| 131 | uint64_t entrypoint, uint64_t context_id); |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 132 | int psci_check_pwrlvl_range(int start_pwrlvl, int end_pwrlvl); |
| 133 | void psci_do_state_coordination(uint32_t start_pwrlvl, |
| 134 | uint32_t end_pwrlvl, |
| 135 | pwr_map_node_t *mpidr_nodes[], |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 136 | uint32_t state); |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 137 | void psci_acquire_pwr_domain_locks(int start_pwrlvl, |
| 138 | int end_pwrlvl, |
| 139 | pwr_map_node_t *mpidr_nodes[]); |
| 140 | void psci_release_pwr_domain_locks(int start_pwrlvl, |
| 141 | int end_pwrlvl, |
| 142 | mpidr_pwr_map_nodes_t mpidr_nodes); |
| 143 | void psci_print_power_domain_map(void); |
| 144 | uint32_t psci_find_max_phys_off_pwrlvl(uint32_t start_pwrlvl, |
| 145 | uint32_t end_pwrlvl, |
| 146 | pwr_map_node_t *mpidr_nodes[]); |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 147 | unsigned int psci_is_last_on_cpu(void); |
| 148 | int psci_spd_migrate_info(uint64_t *mpidr); |
| 149 | |
| 150 | /* Private exported functions from psci_setup.c */ |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 151 | int psci_get_pwr_map_nodes(unsigned long mpidr, |
| 152 | int start_pwrlvl, |
| 153 | int end_pwrlvl, |
| 154 | pwr_map_node_t *mpidr_nodes[]); |
| 155 | pwr_map_node_t *psci_get_pwr_map_node(unsigned long, int); |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 156 | |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 157 | /* Private exported functions from psci_cpu_on.c */ |
| 158 | int psci_cpu_on_start(unsigned long target_cpu, |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 159 | entry_point_info_t *ep, |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 160 | int end_pwrlvl); |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 161 | |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 162 | void psci_cpu_on_finish(pwr_map_node_t *node[], int pwrlvl); |
Soby Mathew | 6590ce2 | 2015-06-30 11:00:24 +0100 | [diff] [blame] | 163 | |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 164 | /* Private exported functions from psci_cpu_off.c */ |
| 165 | int psci_do_cpu_off(int end_pwrlvl); |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 166 | |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 167 | /* Private exported functions from psci_cpu_suspend.c */ |
| 168 | void psci_cpu_suspend_start(entry_point_info_t *ep, |
| 169 | int end_pwrlvl); |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 170 | |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 171 | void psci_cpu_suspend_finish(pwr_map_node_t *node[], int pwrlvl); |
Soby Mathew | 6590ce2 | 2015-06-30 11:00:24 +0100 | [diff] [blame] | 172 | |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 173 | void psci_set_suspend_power_state(unsigned int power_state); |
| 174 | |
| 175 | /* Private exported functions from psci_helpers.S */ |
Soby Mathew | 4067dc3 | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 176 | void psci_do_pwrdown_cache_maintenance(uint32_t pwr_level); |
Soby Mathew | b48349e | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 177 | void psci_do_pwrup_cache_maintenance(void); |
| 178 | |
| 179 | /* Private exported functions from psci_system_off.c */ |
| 180 | void __dead2 psci_system_off(void); |
| 181 | void __dead2 psci_system_reset(void); |
| 182 | |
| 183 | #endif /* __PSCI_PRIVATE_H__ */ |