blob: 024e682bcdc15163cf924112bf79dd514159eb75 [file] [log] [blame]
Ryan Harkin25cff832014-01-13 12:37:03 +00001#
Ambroise Vincenta6ffd372019-07-17 11:17:28 +01002# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
Ryan Harkin25cff832014-01-13 12:37:03 +00003#
dp-arm82cb2c12017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Ryan Harkin25cff832014-01-13 12:37:03 +00005#
6
Soby Mathewa8af6a42016-04-07 17:40:04 +01007# Use the GICv3 driver on the FVP by default
8FVP_USE_GIC_DRIVER := FVP_GICV3
Jeenu Viswambharan11ad8f22016-11-15 13:53:57 +00009
Antonio Nino Diaz32cd95f2016-05-17 09:48:10 +010010# Use the SP804 timer instead of the generic one
11FVP_USE_SP804_TIMER := 0
12
Jeenu Viswambharan11ad8f22016-11-15 13:53:57 +000013# Default cluster count for FVP
14FVP_CLUSTER_COUNT := 2
15
Jeenu Viswambharanfe7210c2018-01-31 14:52:08 +000016# Default number of CPUs per cluster on FVP
17FVP_MAX_CPUS_PER_CLUSTER := 4
18
Jeenu Viswambharan11ad8f22016-11-15 13:53:57 +000019# Default number of threads per CPU on FVP
20FVP_MAX_PE_PER_CPU := 1
21
Soby Mathewce6d9642018-02-08 11:39:38 +000022FVP_DT_PREFIX := fvp-base-gicv3-psci
23
Antonio Nino Diaz32cd95f2016-05-17 09:48:10 +010024$(eval $(call assert_boolean,FVP_USE_SP804_TIMER))
25$(eval $(call add_define,FVP_USE_SP804_TIMER))
Achin Gupta27573c52015-11-03 14:18:34 +000026
27# The FVP platform depends on this macro to build with correct GIC driver.
28$(eval $(call add_define,FVP_USE_GIC_DRIVER))
29
Jeenu Viswambharan11ad8f22016-11-15 13:53:57 +000030# Pass FVP_CLUSTER_COUNT to the build system.
Soby Mathew01080472016-02-01 14:04:34 +000031$(eval $(call add_define,FVP_CLUSTER_COUNT))
Soby Mathew71237872016-03-24 10:12:42 +000032
Jeenu Viswambharanfe7210c2018-01-31 14:52:08 +000033# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system.
34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER))
35
Jeenu Viswambharan11ad8f22016-11-15 13:53:57 +000036# Pass FVP_MAX_PE_PER_CPU to the build system.
37$(eval $(call add_define,FVP_MAX_PE_PER_CPU))
38
Soby Mathew71237872016-03-24 10:12:42 +000039# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2,
40# choose the CCI driver , else the CCN driver
41ifeq ($(FVP_CLUSTER_COUNT), 0)
42$(error "Incorrect cluster count specified for FVP port")
43else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2))
44FVP_INTERCONNECT_DRIVER := FVP_CCI
45else
46FVP_INTERCONNECT_DRIVER := FVP_CCN
Soby Mathew01080472016-02-01 14:04:34 +000047endif
48
Soby Mathew71237872016-03-24 10:12:42 +000049$(eval $(call add_define,FVP_INTERCONNECT_DRIVER))
50
Alexei Fedorova6ea06f2020-03-23 18:45:17 +000051# Choose the GIC sources depending upon the how the FVP will be invoked
52ifeq (${FVP_USE_GIC_DRIVER},$(filter ${FVP_USE_GIC_DRIVER},FVP_GICV3 FVP_GIC600))
Alexei Fedorove6e10ec2020-04-07 11:48:00 +010053
54 # GIC500 is the default option in case GICV3_IMPL is not set
Alexei Fedorova6ea06f2020-03-23 18:45:17 +000055 ifeq (${FVP_USE_GIC_DRIVER}, FVP_GIC600)
56 GICV3_IMPL := GIC600
57 endif
58
Alexei Fedorova6ea06f2020-03-23 18:45:17 +000059GICV3_OVERRIDE_DISTIF_PWR_OPS := 1
60
61# Include GICv3 driver files
62include drivers/arm/gic/v3/gicv3.mk
63
64FVP_GIC_SOURCES := ${GICV3_SOURCES} \
Achin Gupta27573c52015-11-03 14:18:34 +000065 plat/common/plat_gicv3.c \
66 plat/arm/common/arm_gicv3.c
Jeenu Viswambharane1c59ab2016-12-06 16:15:22 +000067
laurenw-arm8370c8c2020-05-12 10:58:11 -050068 ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
69 FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c
70 endif
71
Achin Gupta27573c52015-11-03 14:18:34 +000072else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2)
Alexei Fedorove6e10ec2020-04-07 11:48:00 +010073
74# No GICv4 extension
75GIC_ENABLE_V4_EXTN := 0
76$(eval $(call add_define,GIC_ENABLE_V4_EXTN))
77
78# No support for extended PPI and SPI range
79GIC_EXT_INTID := 0
80$(eval $(call add_define,GIC_EXT_INTID))
81
Achin Gupta27573c52015-11-03 14:18:34 +000082FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
83 drivers/arm/gic/v2/gicv2_main.c \
84 drivers/arm/gic/v2/gicv2_helpers.c \
85 plat/common/plat_gicv2.c \
86 plat/arm/common/arm_gicv2.c
Soby Mathewce6d9642018-02-08 11:39:38 +000087
88FVP_DT_PREFIX := fvp-base-gicv2-psci
Achin Gupta27573c52015-11-03 14:18:34 +000089else
90$(error "Incorrect GIC driver chosen on FVP port")
91endif
92
Soby Mathew71237872016-03-24 10:12:42 +000093ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI)
Jeenu Viswambharan955242d2017-07-18 15:42:50 +010094FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c
Soby Mathew71237872016-03-24 10:12:42 +000095else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN)
96FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \
97 plat/arm/common/arm_ccn.c
98else
99$(error "Incorrect CCN driver chosen on FVP port")
100endif
Vikram Kanigiri6355f232016-02-15 11:54:14 +0000101
Soby Mathew57f78202016-02-26 14:23:19 +0000102FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
Vikram Kanigiria9cc84d2016-02-10 14:50:53 +0000103 plat/arm/board/fvp/fvp_security.c \
104 plat/arm/common/arm_tzc400.c
105
Vikram Kanigiri6355f232016-02-15 11:54:14 +0000106
Juan Castillo95cfd4a2015-04-14 12:49:03 +0100107PLAT_INCLUDES := -Iplat/arm/board/fvp/include
Sandrine Bailleux53514b22014-05-20 17:28:25 +0100108
Ryan Harkin25cff832014-01-13 12:37:03 +0000109
Soby Mathew3e4b8fd2016-04-08 16:42:58 +0100110PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c
Ryan Harkin25cff832014-01-13 12:37:03 +0000111
Soby Mathew877cf3f2016-07-11 14:13:56 +0100112FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
113
114ifeq (${ARCH}, aarch64)
John Tsichritzis076b5f02019-03-19 17:20:52 +0000115
John Tsichritzis629d04f2019-06-03 13:54:30 +0100116# select a different set of CPU files, depending on whether we compile for
117# hardware assisted coherency cores or not
John Tsichritzis076b5f02019-03-19 17:20:52 +0000118ifeq (${HW_ASSISTED_COHERENCY}, 0)
John Tsichritziscd3c5b42019-08-13 10:11:41 +0100119# Cores used without DSU
John Tsichritzis076b5f02019-03-19 17:20:52 +0000120 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \
Soby Mathew9b476842014-08-14 11:33:56 +0100121 lib/cpus/aarch64/cortex_a53.S \
122 lib/cpus/aarch64/cortex_a57.S \
Yatharth Kochar2460ac12016-02-09 12:00:03 +0000123 lib/cpus/aarch64/cortex_a72.S \
John Tsichritzis076b5f02019-03-19 17:20:52 +0000124 lib/cpus/aarch64/cortex_a73.S
125else
John Tsichritziscd3c5b42019-08-13 10:11:41 +0100126# Cores used with DSU only
John Tsichritzis629d04f2019-06-03 13:54:30 +0100127 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
John Tsichritziscd3c5b42019-08-13 10:11:41 +0100128 # AArch64-only cores
John Tsichritzis629d04f2019-06-03 13:54:30 +0100129 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \
130 lib/cpus/aarch64/cortex_a76ae.S \
Balint Dobszayf363deb2019-07-03 13:02:56 +0200131 lib/cpus/aarch64/cortex_a77.S \
Jimmy Brisson83c15842020-06-01 16:49:34 -0500132 lib/cpus/aarch64/cortex_a78.S \
John Tsichritzis629d04f2019-06-03 13:54:30 +0100133 lib/cpus/aarch64/neoverse_n1.S \
134 lib/cpus/aarch64/neoverse_e1.S \
Louis Mayencourt294f9ef2019-05-14 11:00:45 +0100135 lib/cpus/aarch64/neoverse_zeus.S \
Imre Kis6ad216d2019-07-18 14:30:03 +0200136 lib/cpus/aarch64/cortex_hercules_ae.S \
Jimmy Brissonf4744722019-12-09 14:02:22 -0600137 lib/cpus/aarch64/cortex_klein.S \
Jimmy Brissonda3b47e2020-01-08 13:52:51 -0600138 lib/cpus/aarch64/cortex_matterhorn.S \
Imre Kis78f02ae2019-07-22 14:36:30 +0200139 lib/cpus/aarch64/cortex_a65.S \
140 lib/cpus/aarch64/cortex_a65ae.S
John Tsichritzis629d04f2019-06-03 13:54:30 +0100141 endif
John Tsichritziscd3c5b42019-08-13 10:11:41 +0100142 # AArch64/AArch32 cores
143 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
144 lib/cpus/aarch64/cortex_a75.S
John Tsichritzis076b5f02019-03-19 17:20:52 +0000145endif
John Tsichritzisa4546e82018-10-08 17:09:43 +0100146
Yatharth Kochar03a30422016-07-12 15:47:03 +0100147else
148FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S
Soby Mathew877cf3f2016-07-11 14:13:56 +0100149endif
Sandrine Bailleuxb13ed5e2016-01-13 09:04:26 +0000150
Alexei Fedorov1461ad92019-05-09 12:14:40 +0100151BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
152 drivers/arm/sp805/sp805.c \
Alexei Fedorov1b597c22019-08-16 14:15:59 +0100153 drivers/delay_timer/delay_timer.c \
Aditya Angadib0c97da2019-04-16 11:29:14 +0530154 drivers/io/io_semihosting.c \
Dan Handley60eea552015-03-19 19:17:53 +0000155 lib/semihosting/semihosting.c \
Yatharth Kochar83fc4a92016-07-04 11:03:49 +0100156 lib/semihosting/${ARCH}/semihosting_call.S \
157 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
Dan Handley3fc41242015-04-27 19:17:18 +0100158 plat/arm/board/fvp/fvp_bl1_setup.c \
Ambroise Vincent37b70032019-07-04 14:58:45 +0100159 plat/arm/board/fvp/fvp_err.c \
Vikram Kanigiri6355f232016-02-15 11:54:14 +0000160 plat/arm/board/fvp/fvp_io_storage.c \
161 ${FVP_CPU_LIBS} \
162 ${FVP_INTERCONNECT_SOURCES}
163
Alexei Fedorov1b597c22019-08-16 14:15:59 +0100164ifeq (${FVP_USE_SP804_TIMER},1)
165BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
166else
167BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c
168endif
169
Dan Handley60eea552015-03-19 19:17:53 +0000170
Ambroise Vincent37b70032019-07-04 14:58:45 +0100171BL2_SOURCES += drivers/arm/sp805/sp805.c \
172 drivers/io/io_semihosting.c \
Roberto Vargas9d57a142018-08-06 13:35:31 +0100173 lib/utils/mem_region.c \
Dan Handley60eea552015-03-19 19:17:53 +0000174 lib/semihosting/semihosting.c \
Yatharth Kochar6fe8aa22016-07-04 11:26:14 +0100175 lib/semihosting/${ARCH}/semihosting_call.S \
Dan Handley3fc41242015-04-27 19:17:18 +0100176 plat/arm/board/fvp/fvp_bl2_setup.c \
Ambroise Vincent37b70032019-07-04 14:58:45 +0100177 plat/arm/board/fvp/fvp_err.c \
Dan Handley3fc41242015-04-27 19:17:18 +0100178 plat/arm/board/fvp/fvp_io_storage.c \
Roberto Vargas9d57a142018-08-06 13:35:31 +0100179 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigiria9cc84d2016-02-10 14:50:53 +0000180 ${FVP_SECURITY_SOURCES}
Dan Handley60eea552015-03-19 19:17:53 +0000181
Roberto Vargas9d57a142018-08-06 13:35:31 +0100182
183
Roberto Vargas81528db2017-11-17 13:22:18 +0000184ifeq (${BL2_AT_EL3},1)
185BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
186 plat/arm/board/fvp/fvp_bl2_el3_setup.c \
187 ${FVP_CPU_LIBS} \
188 ${FVP_INTERCONNECT_SOURCES}
189endif
190
Antonio Nino Diaz32cd95f2016-05-17 09:48:10 +0100191ifeq (${FVP_USE_SP804_TIMER},1)
192BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
Antonio Nino Diaz32cd95f2016-05-17 09:48:10 +0100193endif
194
Yatharth Kochardcda29f2015-10-14 15:28:11 +0100195BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \
Vikram Kanigiria9cc84d2016-02-10 14:50:53 +0000196 ${FVP_SECURITY_SOURCES}
Yatharth Kochardcda29f2015-10-14 15:28:11 +0100197
Alexei Fedorov1b597c22019-08-16 14:15:59 +0100198ifeq (${FVP_USE_SP804_TIMER},1)
199BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
200endif
201
Antonio Nino Diaz560293b2019-01-23 21:50:09 +0000202BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \
203 drivers/arm/smmu/smmu_v3.c \
Alexei Fedorov1b597c22019-08-16 14:15:59 +0100204 drivers/delay_timer/delay_timer.c \
Antonio Nino Diazaa7877c2018-10-10 11:14:44 +0100205 drivers/cfi/v2m/v2m_flash.c \
Roberto Vargas9d57a142018-08-06 13:35:31 +0100206 lib/utils/mem_region.c \
Jeenu Viswambharan955242d2017-07-18 15:42:50 +0100207 plat/arm/board/fvp/fvp_bl31_setup.c \
Madhukar Pappireddy12d13432020-04-16 17:54:25 -0500208 plat/arm/board/fvp/fvp_console.c \
Dan Handley3fc41242015-04-27 19:17:18 +0100209 plat/arm/board/fvp/fvp_pm.c \
Dan Handley3fc41242015-04-27 19:17:18 +0100210 plat/arm/board/fvp/fvp_topology.c \
211 plat/arm/board/fvp/aarch64/fvp_helpers.S \
Roberto Vargas9d57a142018-08-06 13:35:31 +0100212 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigiri6355f232016-02-15 11:54:14 +0000213 ${FVP_CPU_LIBS} \
Vikram Kanigiria9cc84d2016-02-10 14:50:53 +0000214 ${FVP_GIC_SOURCES} \
Vikram Kanigiri6355f232016-02-15 11:54:14 +0000215 ${FVP_INTERCONNECT_SOURCES} \
Vikram Kanigiria9cc84d2016-02-10 14:50:53 +0000216 ${FVP_SECURITY_SOURCES}
Juan Castillo6eadf762015-01-07 10:39:25 +0000217
Madhukar Pappireddy26d1e0c2020-01-27 13:37:51 -0600218# Support for fconf in BL31
219# Added separately from the above list for better readability
Madhukar Pappireddy493545b2020-03-13 13:00:17 -0500220ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),)
Madhukar Pappireddy26d1e0c2020-01-27 13:37:51 -0600221BL31_SOURCES += common/fdt_wrappers.c \
222 lib/fconf/fconf.c \
223 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
Madhukar Pappireddy493545b2020-03-13 13:00:17 -0500224endif
Madhukar Pappireddy26d1e0c2020-01-27 13:37:51 -0600225
Alexei Fedorov1b597c22019-08-16 14:15:59 +0100226ifeq (${FVP_USE_SP804_TIMER},1)
227BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
228else
229BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c
230endif
231
Soby Mathew09cc7a62018-02-27 11:17:14 +0000232# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env)
233ifdef UNIX_MK
Soby Mathewce6d9642018-02-08 11:39:38 +0000234FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts
Soby Mathew1d71ba12018-04-04 09:40:32 +0100235FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \
Louis Mayencourt25ac8792019-12-17 13:17:25 +0000236 ${PLAT}_fw_config.dts \
Soby Mathew1d71ba12018-04-04 09:40:32 +0100237 ${PLAT}_soc_fw_config.dts \
238 ${PLAT}_nt_fw_config.dts \
239 )
240
Louis Mayencourt25ac8792019-12-17 13:17:25 +0000241FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
Soby Mathew1d71ba12018-04-04 09:40:32 +0100242FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb
243FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
244
245ifeq (${SPD},tspd)
246FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts
247FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb
248
249# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
250$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config))
251endif
Soby Mathewce6d9642018-02-08 11:39:38 +0000252
Achin Gupta0cb64d02019-10-11 14:54:48 +0100253ifeq (${SPD},spmd)
254FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts
255FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_spmc_manifest.dtb
256
257# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
258$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config))
259endif
260
Soby Mathewce6d9642018-02-08 11:39:38 +0000261# Add the TB_FW_CONFIG to FIP and specify the same to certtool
262$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config))
Soby Mathew1d71ba12018-04-04 09:40:32 +0100263# Add the SOC_FW_CONFIG to FIP and specify the same to certtool
264$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config))
265# Add the NT_FW_CONFIG to FIP and specify the same to certtool
266$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config))
Soby Mathewce6d9642018-02-08 11:39:38 +0000267
268FDT_SOURCES += ${FVP_HW_CONFIG_DTS}
269$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS)))
270
271# Add the HW_CONFIG to FIP and specify the same to certtool
272$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config))
Soby Mathew09cc7a62018-02-27 11:17:14 +0000273endif
Soby Mathewce6d9642018-02-08 11:39:38 +0000274
Dimitris Papastamos3a6a9ad2017-11-14 13:27:41 +0000275# Enable Activity Monitor Unit extensions by default
276ENABLE_AMU := 1
277
Dimitris Papastamosee7cda32018-05-31 14:10:06 +0100278# Enable dynamic mitigation support by default
279DYNAMIC_WORKAROUND_CVE_2018_3639 := 1
280
Manish Pandey133a5c62019-11-06 13:17:46 +0000281# Enable reclaiming of BL31 initialisation code for secondary cores
Ambroise Vincenta6ffd372019-07-17 11:17:28 +0100282# stacks for FVP. However, don't enable reclaiming for clang.
Soby Mathewfc922ca2018-10-14 08:13:44 +0100283ifneq (${RESET_TO_BL31},1)
Ambroise Vincenta6ffd372019-07-17 11:17:28 +0100284ifeq ($(findstring clang,$(notdir $(CC))),)
Daniel Boulbycb4adb02018-09-18 11:52:49 +0100285RECLAIM_INIT_CODE := 1
Soby Mathewfc922ca2018-10-14 08:13:44 +0100286endif
Ambroise Vincenta6ffd372019-07-17 11:17:28 +0100287endif
Daniel Boulbycb4adb02018-09-18 11:52:49 +0100288
Dimitris Papastamos53bfb942017-12-11 11:45:35 +0000289ifeq (${ENABLE_AMU},1)
John Tsichritzis076b5f02019-03-19 17:20:52 +0000290BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \
Dimitris Papastamosa2e702a2018-02-14 10:00:06 +0000291 lib/cpus/aarch64/cpuamu_helpers.S
John Tsichritzis076b5f02019-03-19 17:20:52 +0000292
293ifeq (${HW_ASSISTED_COHERENCY}, 1)
294BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \
295 lib/cpus/aarch64/neoverse_n1_pubsub.c
296endif
Dimitris Papastamos53bfb942017-12-11 11:45:35 +0000297endif
298
Jeenu Viswambharana7055c52018-06-08 08:44:36 +0100299ifeq (${RAS_EXTENSION},1)
300BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c
301endif
302
Douglas Raillard51faada2017-02-24 18:14:15 +0000303ifneq (${ENABLE_STACK_PROTECTOR},0)
304PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c
305endif
306
dp-arma4409002017-02-15 11:07:55 +0000307ifeq (${ARCH},aarch32)
308 NEED_BL32 := yes
309endif
310
Antonio Nino Diaz3661d8e2019-01-23 16:23:07 +0000311# Enable the dynamic translation tables library.
312ifeq (${ARCH},aarch32)
313 ifeq (${RESET_TO_SP_MIN},1)
Masahiro Yamada1dc17562020-04-01 14:28:24 +0900314 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Antonio Nino Diaz3661d8e2019-01-23 16:23:07 +0000315 endif
Petre-Ionut Tudor60e8f3c2019-11-07 15:18:03 +0000316else # AArch64
Antonio Nino Diaz3661d8e2019-01-23 16:23:07 +0000317 ifeq (${RESET_TO_BL31},1)
Masahiro Yamada1dc17562020-04-01 14:28:24 +0900318 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Antonio Nino Diaz3661d8e2019-01-23 16:23:07 +0000319 endif
Antonio Nino Diaz819dcd72019-02-12 13:32:03 +0000320 ifeq (${SPD},trusty)
Masahiro Yamada1dc17562020-04-01 14:28:24 +0900321 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Antonio Nino Diaz819dcd72019-02-12 13:32:03 +0000322 endif
Antonio Nino Diaz3661d8e2019-01-23 16:23:07 +0000323endif
324
Petre-Ionut Tudor60e8f3c2019-11-07 15:18:03 +0000325ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
326 ifeq (${ARCH},aarch32)
Masahiro Yamada1dc17562020-04-01 14:28:24 +0900327 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudor60e8f3c2019-11-07 15:18:03 +0000328 else # AArch64
Masahiro Yamada1dc17562020-04-01 14:28:24 +0900329 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudor60e8f3c2019-11-07 15:18:03 +0000330 ifeq (${SPD},tspd)
Masahiro Yamada1dc17562020-04-01 14:28:24 +0900331 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudor60e8f3c2019-11-07 15:18:03 +0000332 endif
333 endif
334endif
335
Ambroise Vincent992f0912019-07-12 13:47:03 +0100336ifeq (${USE_DEBUGFS},1)
Masahiro Yamada1dc17562020-04-01 14:28:24 +0900337 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Ambroise Vincent992f0912019-07-12 13:47:03 +0100338endif
339
Soby Mathewa22dffc2017-10-05 12:27:33 +0100340# Add support for platform supplied linker script for BL31 build
341$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
342
Roberto Vargas76d26732018-01-16 10:35:23 +0000343ifneq (${BL2_AT_EL3}, 0)
344 override BL1_SOURCES =
345endif
346
Juan Castillo95cfd4a2015-04-14 12:49:03 +0100347include plat/arm/board/common/board_common.mk
Dan Handley60eea552015-03-19 19:17:53 +0000348include plat/arm/common/arm_common.mk
Soby Mathew6e79f9f2018-03-26 15:16:46 +0100349
Max Shvetsova6ffdde2019-12-06 11:50:12 +0000350ifeq (${TRUSTED_BOARD_BOOT}, 1)
351BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
352BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
Soby Mathew6e79f9f2018-03-26 15:16:46 +0100353# FVP being a development platform, enable capability to disable Authentication
Antonio Nino Diaz60e19f52018-09-25 11:37:23 +0100354# dynamically if TRUSTED_BOARD_BOOT is set.
Max Shvetsova6ffdde2019-12-06 11:50:12 +0000355DYN_DISABLE_AUTH := 1
Soby Mathew6e79f9f2018-03-26 15:16:46 +0100356endif