blob: e2cc794c4a94b772e81c97c167d65e9daf2f9717 [file] [log] [blame]
Paul Beesley8f62ca72019-03-13 13:58:02 +00001Glossary
2========
3
4This glossary provides definitions for terms and abbreviations used in the TF-A
5documentation.
6
7You can find additional definitions in the `Arm Glossary`_.
8
9.. glossary::
10 :sorted:
11
12 AArch32
13 32-bit execution state of the ARMv8 ISA
14
15 AArch64
16 64-bit execution state of the ARMv8 ISA
17
Chris Kay9cf75642021-08-17 16:24:57 +010018 AMU
19 Activity Monitor Unit, a hardware monitoring unit introduced by FEAT_AMUv1
20 that exposes CPU core runtime metrics as a set of counter registers.
21
Paul Beesley8f62ca72019-03-13 13:58:02 +000022 API
23 Application Programming Interface
24
Manish V Badarkhee008a292020-07-31 08:38:49 +010025 AT
26 Address Translation
27
Paul Beesleyff2d38c2019-10-17 13:19:02 +000028 BTI
29 Branch Target Identification. An Armv8.5 extension providing additional
30 control flow integrity around indirect branches and their targets.
31
Paul Beesley8f62ca72019-03-13 13:58:02 +000032 CoT
33 COT
34 Chain of Trust
35
36 CSS
37 Compute Sub-System
38
39 CVE
40 Common Vulnerabilities and Exposures. A CVE document is commonly used to
41 describe a publicly-known security vulnerability.
42
43 DS-5
44 Arm Development Studio 5
45
Paul Beesleyff2d38c2019-10-17 13:19:02 +000046 DSU
47 DynamIQ Shared Unit
48
Paul Beesley8f62ca72019-03-13 13:58:02 +000049 DT
50 Device Tree
51
Louis Mayencourt326150b2019-11-08 15:09:15 +000052 DTB
53 Device Tree Blob
54
Paul Beesley8f62ca72019-03-13 13:58:02 +000055 EL
56 Exception Level
57
58 EHF
59 Exception Handling Framework
60
Louis Mayencourt326150b2019-11-08 15:09:15 +000061 FCONF
62 Firmware Configuration Framework
63
Paul Beesley8f62ca72019-03-13 13:58:02 +000064 FDT
65 Flattened Device Tree
66
Olivier Deprez8a5bd3c2021-09-01 10:25:21 +020067 FF-A
68 Firmware Framework for Arm A-profile
J-Alves662af362020-05-07 18:42:25 +010069
Paul Beesley8f62ca72019-03-13 13:58:02 +000070 FIP
71 Firmware Image Package
72
73 FVP
74 Fixed Virtual Platform
75
76 FWU
77 FirmWare Update
78
79 GIC
80 Generic Interrupt Controller
81
82 ISA
83 Instruction Set Architecture
84
85 Linaro
86 A collaborative engineering organization consolidating
87 and optimizing open source software and tools for the Arm architecture.
88
Shruti Gupta20155112022-09-27 14:21:13 +010089 LSP
90 A logical secure partition managed by SPM
91
Paul Beesley8f62ca72019-03-13 13:58:02 +000092 MMU
93 Memory Management Unit
94
95 MPAM
96 Memory Partitioning And Monitoring. An optional Armv8.4 extension.
97
Chris Kay68120782021-05-05 13:38:30 +010098 MPMM
99 Maximum Power Mitigation Mechanism, an optional power management mechanism
100 supported by some Arm Armv9-A cores.
101
Paul Beesley8f62ca72019-03-13 13:58:02 +0000102 MPIDR
103 Multiprocessor Affinity Register
104
Paul Beesleyff2d38c2019-10-17 13:19:02 +0000105 MTE
106 Memory Tagging Extension. An optional Armv8.5 extension that enables
107 hardware-assisted memory tagging.
108
Paul Beesley8f62ca72019-03-13 13:58:02 +0000109 OEN
110 Owning Entity Number
111
112 OP-TEE
113 Open Portable Trusted Execution Environment. An example of a :term:`TEE`
114
115 OTE
116 Open-source Trusted Execution Environment
117
118 PDD
119 Platform Design Document
120
Paul Beesleyff2d38c2019-10-17 13:19:02 +0000121 PAUTH
122 Pointer Authentication. An optional extension introduced in Armv8.3.
123
Paul Beesley8f62ca72019-03-13 13:58:02 +0000124 PMF
125 Performance Measurement Framework
126
J-Alves662af362020-05-07 18:42:25 +0100127 PSA
128 Platform Security Architecture
129
Paul Beesley8f62ca72019-03-13 13:58:02 +0000130 PSCI
131 Power State Coordination Interface
132
133 RAS
134 Reliability, Availability, and Serviceability extensions. A mandatory
135 extension for the Armv8.2 architecture and later. An optional extension to
136 the base Armv8 architecture.
137
138 ROT
139 Root of Trust
140
141 SCMI
142 System Control and Management Interface
143
144 SCP
145 System Control Processor
146
147 SDEI
148 Software Delegated Exception Interface
149
150 SDS
151 Shared Data Storage
152
153 SEA
154 Synchronous External Abort
155
156 SiP
157 SIP
158 Silicon Provider
159
160 SMC
161 Secure Monitor Call
162
163 SMCCC
164 :term:`SMC` Calling Convention
165
166 SoC
167 System on Chip
168
169 SP
170 Secure Partition
171
Paul Beesley8f62ca72019-03-13 13:58:02 +0000172 SPD
173 Secure Payload Dispatcher
174
175 SPM
176 Secure Partition Manager
177
Paul Beesleyff2d38c2019-10-17 13:19:02 +0000178 SSBS
179 Speculative Store Bypass Safe. Introduced in Armv8.5, this configuration
180 bit can be set by software to allow or prevent the hardware from
181 performing speculative operations.
182
Paul Beesley8f62ca72019-03-13 13:58:02 +0000183 SVE
184 Scalable Vector Extension
185
186 TBB
187 Trusted Board Boot
188
189 TBBR
190 Trusted Board Boot Requirements
191
192 TEE
193 Trusted Execution Environment
194
195 TF-A
196 Trusted Firmware-A
197
198 TF-M
199 Trusted Firmware-M
200
201 TLB
202 Translation Lookaside Buffer
203
204 TLK
205 Trusted Little Kernel. A Trusted OS from NVIDIA.
206
Jimmy Brisson7dfb9912020-06-22 14:18:42 -0500207 TRNG
208 True Randon Number Generator (hardware based)
209
Paul Beesley8f62ca72019-03-13 13:58:02 +0000210 TSP
211 Test Secure Payload
212
213 TZC
214 TrustZone Controller
215
Paul Beesleyff2d38c2019-10-17 13:19:02 +0000216 UBSAN
217 Undefined Behavior Sanitizer
218
Paul Beesley8f62ca72019-03-13 13:58:02 +0000219 UEFI
220 Unified Extensible Firmware Interface
221
222 WDOG
223 Watchdog
224
225 XLAT
226 Translation (abbr.). For example, "XLAT table".
227
Paul Beesleyff2d38c2019-10-17 13:19:02 +0000228.. _`Arm Glossary`: https://developer.arm.com/support/arm-glossary