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Dimitris Papastamos0767d502017-11-13 09:49:45 +00001/*
johpow01873d4242020-10-02 13:41:11 -05002 * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved.
Dimitris Papastamos0767d502017-11-13 09:49:45 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz40daecc2018-10-25 16:52:26 +01007#ifndef AMU_PRIVATE_H
8#define AMU_PRIVATE_H
Dimitris Papastamos0767d502017-11-13 09:49:45 +00009
10#include <stdint.h>
11
Chris Kayb4b726e2021-05-24 21:00:07 +010012#include <lib/cassert.h>
13#include <lib/extensions/amu.h>
14#include <lib/utils_def.h>
15
16#include <platform_def.h>
17
Chris Kay81e2ff12021-05-25 12:33:18 +010018#define AMU_GROUP0_MAX_COUNTERS U(16)
Chris Kay31d3cc22021-05-25 15:24:18 +010019#define AMU_GROUP1_MAX_COUNTERS U(16)
Chris Kayb4b726e2021-05-24 21:00:07 +010020
Chris Kay1fd685a2021-05-25 10:42:56 +010021#if ENABLE_AMU_AUXILIARY_COUNTERS
Chris Kayb4b726e2021-05-24 21:00:07 +010022#define AMU_GROUP1_COUNTERS_MASK U(0)
Chris Kay1fd685a2021-05-25 10:42:56 +010023#endif
Chris Kayb4b726e2021-05-24 21:00:07 +010024
25struct amu_ctx {
Chris Kay81e2ff12021-05-25 12:33:18 +010026 uint64_t group0_cnts[AMU_GROUP0_MAX_COUNTERS];
Chris Kayb4b726e2021-05-24 21:00:07 +010027#if __aarch64__
28 /* Architected event counter 1 does not have an offset register. */
Chris Kay81e2ff12021-05-25 12:33:18 +010029 uint64_t group0_voffsets[AMU_GROUP0_MAX_COUNTERS-1];
Chris Kayb4b726e2021-05-24 21:00:07 +010030#endif
31
Chris Kay1fd685a2021-05-25 10:42:56 +010032#if ENABLE_AMU_AUXILIARY_COUNTERS
Chris Kay31d3cc22021-05-25 15:24:18 +010033 uint64_t group1_cnts[AMU_GROUP1_MAX_COUNTERS];
Chris Kayb4b726e2021-05-24 21:00:07 +010034#if __aarch64__
Chris Kay31d3cc22021-05-25 15:24:18 +010035 uint64_t group1_voffsets[AMU_GROUP1_MAX_COUNTERS];
Chris Kayb4b726e2021-05-24 21:00:07 +010036#endif
37#endif
38};
39
Alexei Fedorovf3ccf032020-07-14 08:17:56 +010040uint64_t amu_group0_cnt_read_internal(unsigned int idx);
41void amu_group0_cnt_write_internal(unsigned int idx, uint64_t val);
Dimitris Papastamos0767d502017-11-13 09:49:45 +000042
Chris Kay1fd685a2021-05-25 10:42:56 +010043#if ENABLE_AMU_AUXILIARY_COUNTERS
Alexei Fedorovf3ccf032020-07-14 08:17:56 +010044uint64_t amu_group1_cnt_read_internal(unsigned int idx);
45void amu_group1_cnt_write_internal(unsigned int idx, uint64_t val);
46void amu_group1_set_evtype_internal(unsigned int idx, unsigned int val);
Chris Kay1fd685a2021-05-25 10:42:56 +010047#endif
Dimitris Papastamos0767d502017-11-13 09:49:45 +000048
johpow01873d4242020-10-02 13:41:11 -050049#if __aarch64__
50uint64_t amu_group0_voffset_read_internal(unsigned int idx);
51void amu_group0_voffset_write_internal(unsigned int idx, uint64_t val);
52
Chris Kay1fd685a2021-05-25 10:42:56 +010053#if ENABLE_AMU_AUXILIARY_COUNTERS
johpow01873d4242020-10-02 13:41:11 -050054uint64_t amu_group1_voffset_read_internal(unsigned int idx);
55void amu_group1_voffset_write_internal(unsigned int idx, uint64_t val);
56#endif
Chris Kay1fd685a2021-05-25 10:42:56 +010057#endif
johpow01873d4242020-10-02 13:41:11 -050058
Antonio Nino Diaz40daecc2018-10-25 16:52:26 +010059#endif /* AMU_PRIVATE_H */