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Soby Mathewb48349e2015-06-29 16:30:12 +01001/*
Soby Mathew4067dc32015-05-05 16:33:16 +01002 * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
Soby Mathewb48349e2015-06-29 16:30:12 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __PSCI_H__
32#define __PSCI_H__
33
34#include <bakery_lock.h>
Soby Mathew4067dc32015-05-05 16:33:16 +010035#include <platform_def.h> /* for PLAT_NUM_PWR_DOMAINS */
Soby Mathewb48349e2015-06-29 16:30:12 +010036
37/*******************************************************************************
Soby Mathew4067dc32015-05-05 16:33:16 +010038 * Number of power domains whose state this psci imp. can track
Soby Mathewb48349e2015-06-29 16:30:12 +010039 ******************************************************************************/
Soby Mathew4067dc32015-05-05 16:33:16 +010040#ifdef PLAT_NUM_PWR_DOMAINS
41#define PSCI_NUM_PWR_DOMAINS PLAT_NUM_PWR_DOMAINS
Soby Mathewb48349e2015-06-29 16:30:12 +010042#else
Soby Mathew4067dc32015-05-05 16:33:16 +010043#define PSCI_NUM_PWR_DOMAINS (2 * PLATFORM_CORE_COUNT)
Soby Mathewb48349e2015-06-29 16:30:12 +010044#endif
45
Soby Mathew82dcc032015-04-08 17:42:06 +010046#define PSCI_NUM_NON_CPU_PWR_DOMAINS (PSCI_NUM_PWR_DOMAINS - \
47 PLATFORM_CORE_COUNT)
48
49/* This is the power level corresponding to a CPU */
50#define PSCI_CPU_PWR_LVL 0
51
52/*
53 * The maximum power level supported by PSCI. Since PSCI CPU_SUSPEND
54 * uses the old power_state parameter format which has 2 bits to specify the
55 * power level, this constant is defined to be 3.
56 */
57#define PSCI_MAX_PWR_LVL 3
58
Soby Mathewb48349e2015-06-29 16:30:12 +010059/*******************************************************************************
60 * Defines for runtime services func ids
61 ******************************************************************************/
62#define PSCI_VERSION 0x84000000
63#define PSCI_CPU_SUSPEND_AARCH32 0x84000001
64#define PSCI_CPU_SUSPEND_AARCH64 0xc4000001
65#define PSCI_CPU_OFF 0x84000002
66#define PSCI_CPU_ON_AARCH32 0x84000003
67#define PSCI_CPU_ON_AARCH64 0xc4000003
68#define PSCI_AFFINITY_INFO_AARCH32 0x84000004
69#define PSCI_AFFINITY_INFO_AARCH64 0xc4000004
70#define PSCI_MIG_AARCH32 0x84000005
71#define PSCI_MIG_AARCH64 0xc4000005
72#define PSCI_MIG_INFO_TYPE 0x84000006
73#define PSCI_MIG_INFO_UP_CPU_AARCH32 0x84000007
74#define PSCI_MIG_INFO_UP_CPU_AARCH64 0xc4000007
75#define PSCI_SYSTEM_OFF 0x84000008
76#define PSCI_SYSTEM_RESET 0x84000009
77#define PSCI_FEATURES 0x8400000A
78#define PSCI_SYSTEM_SUSPEND_AARCH32 0x8400000E
79#define PSCI_SYSTEM_SUSPEND_AARCH64 0xc400000E
80
81/* Macro to help build the psci capabilities bitfield */
82#define define_psci_cap(x) (1 << (x & 0x1f))
83
84/*
85 * Number of PSCI calls (above) implemented
86 */
87#define PSCI_NUM_CALLS 18
88
89/*******************************************************************************
90 * PSCI Migrate and friends
91 ******************************************************************************/
92#define PSCI_TOS_UP_MIG_CAP 0
93#define PSCI_TOS_NOT_UP_MIG_CAP 1
94#define PSCI_TOS_NOT_PRESENT_MP 2
95
96/*******************************************************************************
97 * PSCI CPU_SUSPEND 'power_state' parameter specific defines
98 ******************************************************************************/
99#define PSTATE_ID_SHIFT 0
100#define PSTATE_TYPE_SHIFT 16
Soby Mathew4067dc32015-05-05 16:33:16 +0100101#define PSTATE_PWR_LVL_SHIFT 24
Soby Mathewb48349e2015-06-29 16:30:12 +0100102
103#define PSTATE_ID_MASK 0xffff
104#define PSTATE_TYPE_MASK 0x1
Soby Mathew4067dc32015-05-05 16:33:16 +0100105#define PSTATE_PWR_LVL_MASK 0x3
Soby Mathewb48349e2015-06-29 16:30:12 +0100106#define PSTATE_VALID_MASK 0xFCFE0000
107
108#define PSTATE_TYPE_STANDBY 0x0
109#define PSTATE_TYPE_POWERDOWN 0x1
110
111#define psci_get_pstate_id(pstate) (((pstate) >> PSTATE_ID_SHIFT) & \
112 PSTATE_ID_MASK)
113#define psci_get_pstate_type(pstate) (((pstate) >> PSTATE_TYPE_SHIFT) & \
114 PSTATE_TYPE_MASK)
Soby Mathew4067dc32015-05-05 16:33:16 +0100115#define psci_get_pstate_pwrlvl(pstate) ((pstate >> PSTATE_PWR_LVL_SHIFT) & \
116 PSTATE_PWR_LVL_MASK)
117#define psci_make_powerstate(state_id, type, pwrlvl) \
Soby Mathewb48349e2015-06-29 16:30:12 +0100118 (((state_id) & PSTATE_ID_MASK) << PSTATE_ID_SHIFT) |\
119 (((type) & PSTATE_TYPE_MASK) << PSTATE_TYPE_SHIFT) |\
Soby Mathew4067dc32015-05-05 16:33:16 +0100120 (((pwrlvl) & PSTATE_PWR_LVL_MASK) << PSTATE_PWR_LVL_SHIFT)
Soby Mathewb48349e2015-06-29 16:30:12 +0100121
122/*******************************************************************************
123 * PSCI CPU_FEATURES feature flag specific defines
124 ******************************************************************************/
125/* Features flags for CPU SUSPEND power state parameter format. Bits [1:1] */
126#define FF_PSTATE_SHIFT 1
127#define FF_PSTATE_ORIG 0
128#define FF_PSTATE_EXTENDED 1
129
130/* Features flags for CPU SUSPEND OS Initiated mode support. Bits [0:0] */
131#define FF_MODE_SUPPORT_SHIFT 0
132#define FF_SUPPORTS_OS_INIT_MODE 1
133
134/*******************************************************************************
135 * PSCI version
136 ******************************************************************************/
137#define PSCI_MAJOR_VER (1 << 16)
138#define PSCI_MINOR_VER 0x0
139
140/*******************************************************************************
141 * PSCI error codes
142 ******************************************************************************/
143#define PSCI_E_SUCCESS 0
144#define PSCI_E_NOT_SUPPORTED -1
145#define PSCI_E_INVALID_PARAMS -2
146#define PSCI_E_DENIED -3
147#define PSCI_E_ALREADY_ON -4
148#define PSCI_E_ON_PENDING -5
149#define PSCI_E_INTERN_FAIL -6
150#define PSCI_E_NOT_PRESENT -7
151#define PSCI_E_DISABLED -8
152
Soby Mathew82dcc032015-04-08 17:42:06 +0100153#define PSCI_INVALID_MPIDR ~(0ULL)
Soby Mathewb48349e2015-06-29 16:30:12 +0100154
Soby Mathew82dcc032015-04-08 17:42:06 +0100155/*******************************************************************************
156 * PSCI power domain state related constants.
157 ******************************************************************************/
Soby Mathewb48349e2015-06-29 16:30:12 +0100158#define PSCI_STATE_ON 0x0
159#define PSCI_STATE_OFF 0x1
160#define PSCI_STATE_ON_PENDING 0x2
161#define PSCI_STATE_SUSPEND 0x3
162
163#define PSCI_INVALID_DATA -1
164
165#define get_phys_state(x) (x != PSCI_STATE_ON ? \
166 PSCI_STATE_OFF : PSCI_STATE_ON)
167
168#define psci_validate_power_state(pstate) (pstate & PSTATE_VALID_MASK)
169
170
171#ifndef __ASSEMBLY__
172
173#include <stdint.h>
174
175/*******************************************************************************
176 * Structure used to store per-cpu information relevant to the PSCI service.
177 * It is populated in the per-cpu data array. In return we get a guarantee that
178 * this information will not reside on a cache line shared with another cpu.
179 ******************************************************************************/
180typedef struct psci_cpu_data {
Soby Mathew82dcc032015-04-08 17:42:06 +0100181 uint32_t power_state; /* The power state from CPU_SUSPEND */
182 unsigned char psci_state; /* The state of this CPU as seen by PSCI */
Soby Mathewb48349e2015-06-29 16:30:12 +0100183#if !USE_COHERENT_MEM
Soby Mathew82dcc032015-04-08 17:42:06 +0100184 bakery_info_t pcpu_bakery_info[PSCI_NUM_NON_CPU_PWR_DOMAINS];
Soby Mathewb48349e2015-06-29 16:30:12 +0100185#endif
186} psci_cpu_data_t;
187
188/*******************************************************************************
189 * Structure populated by platform specific code to export routines which
190 * perform common low level pm functions
191 ******************************************************************************/
192typedef struct plat_pm_ops {
Soby Mathew4067dc32015-05-05 16:33:16 +0100193 void (*pwr_domain_standby)(unsigned int power_state);
194 int (*pwr_domain_on)(unsigned long mpidr,
Soby Mathewb48349e2015-06-29 16:30:12 +0100195 unsigned long sec_entrypoint,
Soby Mathew4067dc32015-05-05 16:33:16 +0100196 unsigned int pwrlvl);
197 void (*pwr_domain_off)(unsigned int pwrlvl);
198 void (*pwr_domain_suspend)(unsigned long sec_entrypoint,
199 unsigned int pwrlvl);
200 void (*pwr_domain_on_finish)(unsigned int pwrlvl);
201 void (*pwr_domain_suspend_finish)(unsigned int pwrlvl);
Soby Mathewb48349e2015-06-29 16:30:12 +0100202 void (*system_off)(void) __dead2;
203 void (*system_reset)(void) __dead2;
204 int (*validate_power_state)(unsigned int power_state);
205 int (*validate_ns_entrypoint)(unsigned long ns_entrypoint);
206 unsigned int (*get_sys_suspend_power_state)(void);
207} plat_pm_ops_t;
208
209/*******************************************************************************
210 * Optional structure populated by the Secure Payload Dispatcher to be given a
211 * chance to perform any bookkeeping before PSCI executes a power mgmt.
212 * operation. It also allows PSCI to determine certain properties of the SP e.g.
213 * migrate capability etc.
214 ******************************************************************************/
215typedef struct spd_pm_ops {
216 void (*svc_on)(uint64_t target_cpu);
217 int32_t (*svc_off)(uint64_t __unused);
218 void (*svc_suspend)(uint64_t __unused);
219 void (*svc_on_finish)(uint64_t __unused);
220 void (*svc_suspend_finish)(uint64_t suspend_level);
221 int32_t (*svc_migrate)(uint64_t from_cpu, uint64_t to_cpu);
222 int32_t (*svc_migrate_info)(uint64_t *resident_cpu);
223 void (*svc_system_off)(void);
224 void (*svc_system_reset)(void);
225} spd_pm_ops_t;
226
227/*******************************************************************************
228 * Function & Data prototypes
229 ******************************************************************************/
230unsigned int psci_version(void);
231int psci_affinity_info(unsigned long, unsigned int);
232int psci_migrate(unsigned long);
233int psci_migrate_info_type(void);
234long psci_migrate_info_up_cpu(void);
235int psci_cpu_on(unsigned long,
236 unsigned long,
237 unsigned long);
238void __dead2 psci_power_down_wfi(void);
Soby Mathew4067dc32015-05-05 16:33:16 +0100239void psci_cpu_on_finish_entry(void);
240void psci_cpu_suspend_finish_entry(void);
Soby Mathewb48349e2015-06-29 16:30:12 +0100241void psci_register_spd_pm_hook(const spd_pm_ops_t *);
Soby Mathew82dcc032015-04-08 17:42:06 +0100242int psci_get_suspend_stateid_by_idx(unsigned long);
Soby Mathewb48349e2015-06-29 16:30:12 +0100243int psci_get_suspend_stateid(void);
Soby Mathew4067dc32015-05-05 16:33:16 +0100244int psci_get_suspend_pwrlvl(void);
Soby Mathewb48349e2015-06-29 16:30:12 +0100245
246uint64_t psci_smc_handler(uint32_t smc_fid,
247 uint64_t x1,
248 uint64_t x2,
249 uint64_t x3,
250 uint64_t x4,
251 void *cookie,
252 void *handle,
253 uint64_t flags);
254
255/* PSCI setup function */
256int32_t psci_setup(void);
257
258
259#endif /*__ASSEMBLY__*/
260
261
262#endif /* __PSCI_H__ */