blob: 0e7ced18c09394334480bcbe13ba233c0f23ec21 [file] [log] [blame]
Soby Mathewa43d4312014-04-07 15:28:55 +01001/*
2 * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30#include <arch.h>
31#include <asm_macros.S>
32#include <context.h>
33#include <plat_macros.S>
34
35 .globl get_crash_stack
36 .globl dump_state_and_die
37 .globl dump_intr_state_and_die
38
Andrew Thoelke9c22b322014-06-03 11:50:53 +010039#if CRASH_REPORTING
Soby Mathewa43d4312014-04-07 15:28:55 +010040 /* ------------------------------------------------------
41 * The below section deals with dumping the system state
42 * when an unhandled exception is taken in EL3.
43 * The layout and the names of the registers which will
44 * be dumped during a unhandled exception is given below.
45 * ------------------------------------------------------
46 */
47.section .rodata.dump_reg_name, "aS"
48caller_saved_regs: .asciz "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",\
49 "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16",\
50 "x17", "x18", ""
51
52callee_saved_regs: .asciz "x19", "x20", "x21", "x22", "x23", "x24",\
53 "x25", "x26", "x27", "x28", "x29", "x30", ""
54
55el3_sys_regs: .asciz "scr_el3", "sctlr_el3", "cptr_el3", "tcr_el3",\
56 "daif", "mair_el3", "spsr_el3", "elr_el3", "ttbr0_el3", "esr_el3",\
57 "sp_el3", "far_el3", ""
58
59non_el3_sys_0_regs: .asciz "spsr_el1", "elr_el1", "spsr_abt", "spsr_und",\
60 "spsr_irq", "spsr_fiq", "sctlr_el1", "actlr_el1", "cpacr_el1",\
61 "csselr_el1", "sp_el1", "esr_el1", "ttbr0_el1", "ttbr1_el1",\
62 "mair_el1", "amair_el1", "tcr_el1", "tpidr_el1", ""
63
64non_el3_sys_1_regs: .asciz "tpidr_el0", "tpidrro_el0", "dacr32_el2",\
65 "ifsr32_el2", "par_el1", "far_el1", "afsr0_el1", "afsr1_el1",\
66 "contextidr_el1", "vbar_el1", "cntp_ctl_el0", "cntp_cval_el0",\
67 "cntv_ctl_el0", "cntv_cval_el0", "cntkctl_el1", "fpexc32_el2",\
68 "sp_el0", ""
69
70 /* -----------------------------------------------------
71 * Currently we are stack limited. Hence make sure that
72 * we dont try to dump more than 20 registers using the
73 * stack.
74 * -----------------------------------------------------
75 */
76
77#define REG_SIZE 0x8
78
79/* The caller saved registers are X0 to X18 */
80#define CALLER_SAVED_REG_SIZE (20 * REG_SIZE)
81/* The caller saved registers are X19 to X30 */
82#define CALLEE_SAVED_REG_SIZE (12 * REG_SIZE)
83/* The EL3 sys regs*/
84#define EL3_SYS_REG_SIZE (12 * REG_SIZE)
85/* The non EL3 sys regs set-0 */
86#define NON_EL3_SYS_0_REG_SIZE (18 * REG_SIZE)
87/* The non EL3 sys regs set-1 */
88#define NON_EL3_SYS_1_REG_SIZE (18 * REG_SIZE)
89
90 .macro print_caller_saved_regs
91 sub sp, sp, #CALLER_SAVED_REG_SIZE
92 stp x0, x1, [sp]
93 stp x2, x3, [sp, #(REG_SIZE * 2)]
94 stp x4, x5, [sp, #(REG_SIZE * 4)]
95 stp x6, x7, [sp, #(REG_SIZE * 6)]
96 stp x8, x9, [sp, #(REG_SIZE * 8)]
97 stp x10, x11, [sp, #(REG_SIZE * 10)]
98 stp x12, x13, [sp, #(REG_SIZE * 12)]
99 stp x14, x15, [sp, #(REG_SIZE * 14)]
100 stp x16, x17, [sp, #(REG_SIZE * 16)]
101 stp x18, xzr, [sp, #(REG_SIZE * 18)]
102 adr x0, caller_saved_regs
103 mov x1, sp
104 bl print_string_value
105 add sp, sp, #CALLER_SAVED_REG_SIZE
106 .endm
107
108 .macro print_callee_saved_regs
109 sub sp, sp, CALLEE_SAVED_REG_SIZE
110 stp x19, x20, [sp]
111 stp x21, x22, [sp, #(REG_SIZE * 2)]
112 stp x23, x24, [sp, #(REG_SIZE * 4)]
113 stp x25, x26, [sp, #(REG_SIZE * 6)]
114 stp x27, x28, [sp, #(REG_SIZE * 8)]
115 stp x29, x30, [sp, #(REG_SIZE * 10)]
116 adr x0, callee_saved_regs
117 mov x1, sp
118 bl print_string_value
119 add sp, sp, #CALLEE_SAVED_REG_SIZE
120 .endm
121
122 .macro print_el3_sys_regs
123 sub sp, sp, #EL3_SYS_REG_SIZE
124 mrs x9, scr_el3
125 mrs x10, sctlr_el3
126 mrs x11, cptr_el3
127 mrs x12, tcr_el3
128 mrs x13, daif
129 mrs x14, mair_el3
130 mrs x15, spsr_el3 /*save the elr and spsr regs seperately*/
131 mrs x16, elr_el3
132 mrs x17, ttbr0_el3
133 mrs x8, esr_el3
134 mrs x7, far_el3
135
136 stp x9, x10, [sp]
137 stp x11, x12, [sp, #(REG_SIZE * 2)]
138 stp x13, x14, [sp, #(REG_SIZE * 4)]
139 stp x15, x16, [sp, #(REG_SIZE * 6)]
140 stp x17, x8, [sp, #(REG_SIZE * 8)]
141 stp x0, x7, [sp, #(REG_SIZE * 10)] /* sp_el3 is in x0 */
142
143 adr x0, el3_sys_regs
144 mov x1, sp
145 bl print_string_value
146 add sp, sp, #EL3_SYS_REG_SIZE
147 .endm
148
149 .macro print_non_el3_sys_0_regs
150 sub sp, sp, #NON_EL3_SYS_0_REG_SIZE
151 mrs x9, spsr_el1
152 mrs x10, elr_el1
153 mrs x11, spsr_abt
154 mrs x12, spsr_und
155 mrs x13, spsr_irq
156 mrs x14, spsr_fiq
157 mrs x15, sctlr_el1
158 mrs x16, actlr_el1
159 mrs x17, cpacr_el1
160 mrs x8, csselr_el1
161
162 stp x9, x10, [sp]
163 stp x11, x12, [sp, #(REG_SIZE * 2)]
164 stp x13, x14, [sp, #(REG_SIZE * 4)]
165 stp x15, x16, [sp, #(REG_SIZE * 6)]
166 stp x17, x8, [sp, #(REG_SIZE * 8)]
167
168 mrs x10, sp_el1
169 mrs x11, esr_el1
170 mrs x12, ttbr0_el1
171 mrs x13, ttbr1_el1
172 mrs x14, mair_el1
173 mrs x15, amair_el1
174 mrs x16, tcr_el1
175 mrs x17, tpidr_el1
176
177 stp x10, x11, [sp, #(REG_SIZE * 10)]
178 stp x12, x13, [sp, #(REG_SIZE * 12)]
179 stp x14, x15, [sp, #(REG_SIZE * 14)]
180 stp x16, x17, [sp, #(REG_SIZE * 16)]
181
182 adr x0, non_el3_sys_0_regs
183 mov x1, sp
184 bl print_string_value
185 add sp, sp, #NON_EL3_SYS_0_REG_SIZE
186 .endm
187
188 .macro print_non_el3_sys_1_regs
189 sub sp, sp, #NON_EL3_SYS_1_REG_SIZE
190
191 mrs x9, tpidr_el0
192 mrs x10, tpidrro_el0
193 mrs x11, dacr32_el2
194 mrs x12, ifsr32_el2
195 mrs x13, par_el1
196 mrs x14, far_el1
197 mrs x15, afsr0_el1
198 mrs x16, afsr1_el1
199 mrs x17, contextidr_el1
200 mrs x8, vbar_el1
201
202 stp x9, x10, [sp]
203 stp x11, x12, [sp, #(REG_SIZE * 2)]
204 stp x13, x14, [sp, #(REG_SIZE * 4)]
205 stp x15, x16, [sp, #(REG_SIZE * 6)]
206 stp x17, x8, [sp, #(REG_SIZE * 8)]
207
208 mrs x10, cntp_ctl_el0
209 mrs x11, cntp_cval_el0
210 mrs x12, cntv_ctl_el0
211 mrs x13, cntv_cval_el0
212 mrs x14, cntkctl_el1
213 mrs x15, fpexc32_el2
214 mrs x8, sp_el0
215
216 stp x10, x11, [sp, #(REG_SIZE *10)]
217 stp x12, x13, [sp, #(REG_SIZE * 12)]
218 stp x14, x15, [sp, #(REG_SIZE * 14)]
219 stp x8, xzr, [sp, #(REG_SIZE * 16)]
220
221 adr x0, non_el3_sys_1_regs
222 mov x1, sp
223 bl print_string_value
224 add sp, sp, #NON_EL3_SYS_1_REG_SIZE
225 .endm
226
227 .macro init_crash_stack
228 msr cntfrq_el0, x0 /* we can corrupt this reg to free up x0 */
229 mrs x0, tpidr_el3
230
231 /* Check if tpidr is initialized */
232 cbz x0, infinite_loop
233
234 ldr x0, [x0, #PTR_CACHE_CRASH_STACK_OFFSET]
235 /* store the x30 and sp to stack */
236 str x30, [x0, #-(REG_SIZE)]!
237 mov x30, sp
238 str x30, [x0, #-(REG_SIZE)]!
239 mov sp, x0
240 mrs x0, cntfrq_el0
241 .endm
242
243 /* ---------------------------------------------------
244 * The below function initializes the crash dump stack ,
245 * and prints the system state. This function
246 * will not return.
247 * ---------------------------------------------------
248 */
249func dump_state_and_die
250 init_crash_stack
251 print_caller_saved_regs
252 b print_state
253
254func dump_intr_state_and_die
255 init_crash_stack
256 print_caller_saved_regs
257 plat_print_gic_regs /* fall through to print_state */
258
259print_state:
260 /* copy the original x30 from stack */
261 ldr x30, [sp, #REG_SIZE]
262 print_callee_saved_regs
263 /* copy the original SP_EL3 from stack to x0 and rewind stack */
264 ldr x0, [sp], #(REG_SIZE * 2)
265 print_el3_sys_regs
266 print_non_el3_sys_0_regs
267 print_non_el3_sys_1_regs
Soby Mathewa43d4312014-04-07 15:28:55 +0100268
Andrew Thoelke9c22b322014-06-03 11:50:53 +0100269#else /* CRASH_REPORING */
270
271func dump_state_and_die
272dump_intr_state_and_die:
273
274#endif /* CRASH_REPORING */
275
276infinite_loop:
Soby Mathewa43d4312014-04-07 15:28:55 +0100277 b infinite_loop
278
279
280#define PCPU_CRASH_STACK_SIZE 0x140
281
282 /* -----------------------------------------------------
283 * void get_crash_stack (uint64_t mpidr) : This
284 * function is used to allocate a small stack for
285 * reporting unhandled exceptions
286 * -----------------------------------------------------
287 */
288func get_crash_stack
289 mov x10, x30 // lr
290 get_mp_stack pcpu_crash_stack, PCPU_CRASH_STACK_SIZE
291 ret x10
292
293 /* -----------------------------------------------------
294 * Per-cpu crash stacks in normal memory.
295 * -----------------------------------------------------
296 */
297declare_stack pcpu_crash_stack, tzfw_normal_stacks, \
298 PCPU_CRASH_STACK_SIZE, PLATFORM_CORE_COUNT