blob: ae0bf0488af350e7d92d91c78c5574d720866568 [file] [log] [blame]
Dan Handleyb4315302015-03-19 18:58:55 +00001/*
Soby Mathew0c306cc2018-01-10 15:59:31 +00002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Dan Handleyb4315302015-03-19 18:58:55 +00003 *
dp-arm82cb2c12017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Dan Handleyb4315302015-03-19 18:58:55 +00005 */
6
7#include <arch.h>
8#include <arch_helpers.h>
9#include <arm_def.h>
Dan Handleyb4315302015-03-19 18:58:55 +000010#include <assert.h>
11#include <bl_common.h>
Dan Handleyb4315302015-03-19 18:58:55 +000012#include <console.h>
Yatharth Kochara8aa7fe2016-09-13 17:07:57 +010013#include <debug.h>
Dan Handleyb4315302015-03-19 18:58:55 +000014#include <mmio.h>
15#include <plat_arm.h>
16#include <platform.h>
17
Soby Mathew4c0d0392016-06-16 14:52:04 +010018#define BL31_END (uintptr_t)(&__BL31_END__)
Dan Handleyb4315302015-03-19 18:58:55 +000019
Dan Handleyb4315302015-03-19 18:58:55 +000020/*
21 * Placeholder variables for copying the arguments that have been passed to
Juan Castillod1786372015-12-14 09:35:25 +000022 * BL31 from BL2.
Dan Handleyb4315302015-03-19 18:58:55 +000023 */
24static entry_point_info_t bl32_image_ep_info;
25static entry_point_info_t bl33_image_ep_info;
26
27
28/* Weak definitions may be overridden in specific ARM standard platform */
Soby Mathew0c306cc2018-01-10 15:59:31 +000029#pragma weak bl31_early_platform_setup2
Dan Handleyb4315302015-03-19 18:58:55 +000030#pragma weak bl31_platform_setup
31#pragma weak bl31_plat_arch_setup
32#pragma weak bl31_plat_get_next_image_ep_info
Dan Handleyb4315302015-03-19 18:58:55 +000033
34
35/*******************************************************************************
36 * Return a pointer to the 'entry_point_info' structure of the next image for the
Juan Castillod1786372015-12-14 09:35:25 +000037 * security state specified. BL33 corresponds to the non-secure image type
38 * while BL32 corresponds to the secure image type. A NULL pointer is returned
Dan Handleyb4315302015-03-19 18:58:55 +000039 * if the image does not exist.
40 ******************************************************************************/
41entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
42{
43 entry_point_info_t *next_image_info;
44
45 assert(sec_state_is_valid(type));
46 next_image_info = (type == NON_SECURE)
47 ? &bl33_image_ep_info : &bl32_image_ep_info;
48 /*
49 * None of the images on the ARM development platforms can have 0x0
50 * as the entrypoint
51 */
52 if (next_image_info->pc)
53 return next_image_info;
54 else
55 return NULL;
56}
57
58/*******************************************************************************
Juan Castillod1786372015-12-14 09:35:25 +000059 * Perform any BL31 early platform setup common to ARM standard platforms.
Dan Handleyb4315302015-03-19 18:58:55 +000060 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1
61 * in BL2 & S-EL3 in BL1) before they are lost (potentially). This needs to be
62 * done before the MMU is initialized so that the memory layout can be used
63 * while creating page tables. BL2 has flushed this information to memory, so
64 * we are guaranteed to pick up good data.
65 ******************************************************************************/
Yatharth Kochara8aa7fe2016-09-13 17:07:57 +010066#if LOAD_IMAGE_V2
Soby Mathew0c306cc2018-01-10 15:59:31 +000067void arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config,
68 uintptr_t hw_config, void *plat_params_from_bl2)
Yatharth Kochara8aa7fe2016-09-13 17:07:57 +010069#else
Soby Mathew0c306cc2018-01-10 15:59:31 +000070void arm_bl31_early_platform_setup(bl31_params_t *from_bl2, uintptr_t soc_fw_config,
71 uintptr_t hw_config, void *plat_params_from_bl2)
Yatharth Kochara8aa7fe2016-09-13 17:07:57 +010072#endif
Dan Handleyb4315302015-03-19 18:58:55 +000073{
74 /* Initialize the console to provide early debug support */
75 console_init(PLAT_ARM_BOOT_UART_BASE, PLAT_ARM_BOOT_UART_CLK_IN_HZ,
76 ARM_CONSOLE_BAUDRATE);
77
78#if RESET_TO_BL31
Juan Castillod1786372015-12-14 09:35:25 +000079 /* There are no parameters from BL2 if BL31 is a reset vector */
Dan Handleyb4315302015-03-19 18:58:55 +000080 assert(from_bl2 == NULL);
81 assert(plat_params_from_bl2 == NULL);
82
Antonio Nino Diazb726c162018-05-11 11:15:10 +010083# ifdef BL32_BASE
Juan Castillod1786372015-12-14 09:35:25 +000084 /* Populate entry point information for BL32 */
Dan Handleyb4315302015-03-19 18:58:55 +000085 SET_PARAM_HEAD(&bl32_image_ep_info,
86 PARAM_EP,
87 VERSION_1,
88 0);
89 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
90 bl32_image_ep_info.pc = BL32_BASE;
91 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry();
Antonio Nino Diazb726c162018-05-11 11:15:10 +010092# endif /* BL32_BASE */
Dan Handleyb4315302015-03-19 18:58:55 +000093
Juan Castillod1786372015-12-14 09:35:25 +000094 /* Populate entry point information for BL33 */
Dan Handleyb4315302015-03-19 18:58:55 +000095 SET_PARAM_HEAD(&bl33_image_ep_info,
96 PARAM_EP,
97 VERSION_1,
98 0);
99 /*
Juan Castillod1786372015-12-14 09:35:25 +0000100 * Tell BL31 where the non-trusted software image
Dan Handleyb4315302015-03-19 18:58:55 +0000101 * is located and the entry state information
102 */
103 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
Soby Mathew48ac1df2016-05-09 17:20:10 +0100104
Dan Handleyb4315302015-03-19 18:58:55 +0000105 bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry();
106 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
107
Antonio Nino Diazb726c162018-05-11 11:15:10 +0100108# if ARM_LINUX_KERNEL_AS_BL33
109 /*
110 * According to the file ``Documentation/arm64/booting.txt`` of the
111 * Linux kernel tree, Linux expects the physical address of the device
112 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and
113 * must be 0.
114 */
115 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE;
116 bl33_image_ep_info.args.arg1 = 0U;
117 bl33_image_ep_info.args.arg2 = 0U;
118 bl33_image_ep_info.args.arg3 = 0U;
119# endif
120
Yatharth Kochara8aa7fe2016-09-13 17:07:57 +0100121#else /* RESET_TO_BL31 */
122
Dan Handleyb4315302015-03-19 18:58:55 +0000123 /*
124 * In debug builds, we pass a special value in 'plat_params_from_bl2'
Juan Castillod1786372015-12-14 09:35:25 +0000125 * to verify platform parameters from BL2 to BL31.
Dan Handleyb4315302015-03-19 18:58:55 +0000126 * In release builds, it's not used.
127 */
128 assert(((unsigned long long)plat_params_from_bl2) ==
129 ARM_BL31_PLAT_PARAM_VAL);
130
Yatharth Kochara8aa7fe2016-09-13 17:07:57 +0100131# if LOAD_IMAGE_V2
132 /*
133 * Check params passed from BL2 should not be NULL,
134 */
135 bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2;
136 assert(params_from_bl2 != NULL);
137 assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
138 assert(params_from_bl2->h.version >= VERSION_2);
139
140 bl_params_node_t *bl_params = params_from_bl2->head;
141
142 /*
143 * Copy BL33 and BL32 (if present), entry point information.
144 * They are stored in Secure RAM, in BL2's address space.
145 */
146 while (bl_params) {
147 if (bl_params->image_id == BL32_IMAGE_ID)
148 bl32_image_ep_info = *bl_params->ep_info;
149
150 if (bl_params->image_id == BL33_IMAGE_ID)
151 bl33_image_ep_info = *bl_params->ep_info;
152
153 bl_params = bl_params->next_params_info;
154 }
155
156 if (bl33_image_ep_info.pc == 0)
157 panic();
158
159# else /* LOAD_IMAGE_V2 */
160
161 /*
162 * Check params passed from BL2 should not be NULL,
163 */
164 assert(from_bl2 != NULL);
165 assert(from_bl2->h.type == PARAM_BL31);
166 assert(from_bl2->h.version >= VERSION_1);
167
Soby Mathew0c306cc2018-01-10 15:59:31 +0000168 /* Dynamic Config is not supported for LOAD_IMAGE_V1 */
169 assert(soc_fw_config == 0);
170 assert(hw_config == 0);
171
Dan Handleyb4315302015-03-19 18:58:55 +0000172 /*
Juan Castillod1786372015-12-14 09:35:25 +0000173 * Copy BL32 (if populated by BL2) and BL33 entry point information.
Dan Handleyb4315302015-03-19 18:58:55 +0000174 * They are stored in Secure RAM, in BL2's address space.
175 */
Juan Castillo5ea8aa72015-11-06 10:01:37 +0000176 if (from_bl2->bl32_ep_info)
177 bl32_image_ep_info = *from_bl2->bl32_ep_info;
Dan Handleyb4315302015-03-19 18:58:55 +0000178 bl33_image_ep_info = *from_bl2->bl33_ep_info;
Yatharth Kochara8aa7fe2016-09-13 17:07:57 +0100179
180# endif /* LOAD_IMAGE_V2 */
181#endif /* RESET_TO_BL31 */
Dan Handleyb4315302015-03-19 18:58:55 +0000182}
183
Soby Mathew0c306cc2018-01-10 15:59:31 +0000184void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
185 u_register_t arg2, u_register_t arg3)
Dan Handleyb4315302015-03-19 18:58:55 +0000186{
Soby Mathew0c306cc2018-01-10 15:59:31 +0000187 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
Dan Handleyb4315302015-03-19 18:58:55 +0000188
189 /*
Vikram Kanigiri6355f232016-02-15 11:54:14 +0000190 * Initialize Interconnect for this cluster during cold boot.
Dan Handleyb4315302015-03-19 18:58:55 +0000191 * No need for locks as no other CPU is active.
192 */
Vikram Kanigiri6355f232016-02-15 11:54:14 +0000193 plat_arm_interconnect_init();
Sandrine Bailleuxa6695272015-05-14 14:13:05 +0100194
Dan Handleyb4315302015-03-19 18:58:55 +0000195 /*
Vikram Kanigiri6355f232016-02-15 11:54:14 +0000196 * Enable Interconnect coherency for the primary CPU's cluster.
Sandrine Bailleuxa6695272015-05-14 14:13:05 +0100197 * Earlier bootloader stages might already do this (e.g. Trusted
198 * Firmware's BL1 does it) but we can't assume so. There is no harm in
199 * executing this code twice anyway.
Dan Handleyb4315302015-03-19 18:58:55 +0000200 * Platform specific PSCI code will enable coherency for other
201 * clusters.
202 */
Vikram Kanigiri6355f232016-02-15 11:54:14 +0000203 plat_arm_interconnect_enter_coherency();
Dan Handleyb4315302015-03-19 18:58:55 +0000204}
205
206/*******************************************************************************
Juan Castillod1786372015-12-14 09:35:25 +0000207 * Perform any BL31 platform setup common to ARM standard platforms
Dan Handleyb4315302015-03-19 18:58:55 +0000208 ******************************************************************************/
209void arm_bl31_platform_setup(void)
210{
Achin Gupta27573c52015-11-03 14:18:34 +0000211 /* Initialize the GIC driver, cpu and distributor interfaces */
212 plat_arm_gic_driver_init();
Dan Handleyb4315302015-03-19 18:58:55 +0000213 plat_arm_gic_init();
Dan Handleyb4315302015-03-19 18:58:55 +0000214
215#if RESET_TO_BL31
216 /*
217 * Do initial security configuration to allow DRAM/device access
218 * (if earlier BL has not already done so).
219 */
220 plat_arm_security_setup();
221
Roberto Vargas638b0342018-01-05 16:00:05 +0000222#if defined(PLAT_ARM_MEM_PROT_ADDR)
223 arm_nor_psci_do_dyn_mem_protect();
224#endif /* PLAT_ARM_MEM_PROT_ADDR */
225
Dan Handleyb4315302015-03-19 18:58:55 +0000226#endif /* RESET_TO_BL31 */
227
228 /* Enable and initialize the System level generic timer */
229 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF,
230 CNTCR_FCREQ(0) | CNTCR_EN);
231
232 /* Allow access to the System counter timer module */
Soby Mathewc1bb8a02015-10-12 17:32:29 +0100233 arm_configure_sys_timer();
Dan Handleyb4315302015-03-19 18:58:55 +0000234
235 /* Initialize power controller before setting up topology */
236 plat_arm_pwrc_setup();
Dan Handleyb4315302015-03-19 18:58:55 +0000237}
238
Soby Mathew080225d2015-12-09 11:38:43 +0000239/*******************************************************************************
Juan Castillod1786372015-12-14 09:35:25 +0000240 * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM
Soby Mathew080225d2015-12-09 11:38:43 +0000241 * standard platforms
242 ******************************************************************************/
243void arm_bl31_plat_runtime_setup(void)
244{
245 /* Initialize the runtime console */
246 console_init(PLAT_ARM_BL31_RUN_UART_BASE, PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ,
247 ARM_CONSOLE_BAUDRATE);
248}
249
Dan Handleyb4315302015-03-19 18:58:55 +0000250void bl31_platform_setup(void)
251{
252 arm_bl31_platform_setup();
253}
254
Soby Mathew080225d2015-12-09 11:38:43 +0000255void bl31_plat_runtime_setup(void)
256{
257 arm_bl31_plat_runtime_setup();
258}
259
Dan Handleyb4315302015-03-19 18:58:55 +0000260/*******************************************************************************
Sandrine Bailleuxb5fa6562016-05-18 16:11:47 +0100261 * Perform the very early platform specific architectural setup shared between
262 * ARM standard platforms. This only does basic initialization. Later
263 * architectural setup (bl31_arch_setup()) does not do anything platform
264 * specific.
Dan Handleyb4315302015-03-19 18:58:55 +0000265 ******************************************************************************/
266void arm_bl31_plat_arch_setup(void)
267{
Sandrine Bailleux0af559a2016-07-08 14:38:16 +0100268 arm_setup_page_tables(BL31_BASE,
269 BL31_END - BL31_BASE,
270 BL_CODE_BASE,
Masahiro Yamadaecdc8982017-01-18 02:10:08 +0900271 BL_CODE_END,
Sandrine Bailleux0af559a2016-07-08 14:38:16 +0100272 BL_RO_DATA_BASE,
Masahiro Yamadaecdc8982017-01-18 02:10:08 +0900273 BL_RO_DATA_END
Dan Handleyb4315302015-03-19 18:58:55 +0000274#if USE_COHERENT_MEM
Masahiro Yamada47497052016-12-28 16:11:41 +0900275 , BL_COHERENT_RAM_BASE,
276 BL_COHERENT_RAM_END
Dan Handleyb4315302015-03-19 18:58:55 +0000277#endif
278 );
Sandrine Bailleuxb5fa6562016-05-18 16:11:47 +0100279 enable_mmu_el3(0);
Dan Handleyb4315302015-03-19 18:58:55 +0000280}
281
282void bl31_plat_arch_setup(void)
283{
284 arm_bl31_plat_arch_setup();
285}