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Soby Mathewf14d1882015-10-26 14:01:53 +00001/*
Jeenu Viswambharaneb68ea92017-09-22 08:32:09 +01002 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Soby Mathewf14d1882015-10-26 14:01:53 +00003 *
dp-arm82cb2c12017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Soby Mathewf14d1882015-10-26 14:01:53 +00005 */
6#include <assert.h>
7#include <gic_common.h>
8#include <gicv2.h>
9#include <interrupt_mgmt.h>
10
11/*
12 * The following platform GIC functions are weakly defined. They
13 * provide typical implementations that may be re-used by multiple
14 * platforms but may also be overridden by a platform if required.
15 */
16#pragma weak plat_ic_get_pending_interrupt_id
17#pragma weak plat_ic_get_pending_interrupt_type
18#pragma weak plat_ic_acknowledge_interrupt
19#pragma weak plat_ic_get_interrupt_type
20#pragma weak plat_ic_end_of_interrupt
21#pragma weak plat_interrupt_type_to_line
22
Jeenu Viswambharaneb68ea92017-09-22 08:32:09 +010023#pragma weak plat_ic_get_running_priority
Jeenu Viswambharanca43b552017-09-22 08:32:09 +010024#pragma weak plat_ic_is_spi
25#pragma weak plat_ic_is_ppi
26#pragma weak plat_ic_is_sgi
Jeenu Viswambharancbd3f372017-09-22 08:32:09 +010027#pragma weak plat_ic_get_interrupt_active
Jeenu Viswambharaneb68ea92017-09-22 08:32:09 +010028
Soby Mathewf14d1882015-10-26 14:01:53 +000029/*
30 * This function returns the highest priority pending interrupt at
31 * the Interrupt controller
32 */
33uint32_t plat_ic_get_pending_interrupt_id(void)
34{
35 unsigned int id;
36
37 id = gicv2_get_pending_interrupt_id();
38 if (id == GIC_SPURIOUS_INTERRUPT)
39 return INTR_ID_UNAVAILABLE;
40
41 return id;
42}
43
44/*
45 * This function returns the type of the highest priority pending interrupt
46 * at the Interrupt controller. In the case of GICv2, the Highest Priority
47 * Pending interrupt register (`GICC_HPPIR`) is read to determine the id of
48 * the pending interrupt. The type of interrupt depends upon the id value
49 * as follows.
50 * 1. id < PENDING_G1_INTID (1022) is reported as a S-EL1 interrupt
51 * 2. id = PENDING_G1_INTID (1022) is reported as a Non-secure interrupt.
52 * 3. id = GIC_SPURIOUS_INTERRUPT (1023) is reported as an invalid interrupt
53 * type.
54 */
55uint32_t plat_ic_get_pending_interrupt_type(void)
56{
57 unsigned int id;
58
59 id = gicv2_get_pending_interrupt_type();
60
61 /* Assume that all secure interrupts are S-EL1 interrupts */
62 if (id < PENDING_G1_INTID)
63 return INTR_TYPE_S_EL1;
64
65 if (id == GIC_SPURIOUS_INTERRUPT)
66 return INTR_TYPE_INVAL;
67
68 return INTR_TYPE_NS;
69}
70
71/*
72 * This function returns the highest priority pending interrupt at
73 * the Interrupt controller and indicates to the Interrupt controller
74 * that the interrupt processing has started.
75 */
76uint32_t plat_ic_acknowledge_interrupt(void)
77{
78 return gicv2_acknowledge_interrupt();
79}
80
81/*
82 * This function returns the type of the interrupt `id`, depending on how
83 * the interrupt has been configured in the interrupt controller
84 */
85uint32_t plat_ic_get_interrupt_type(uint32_t id)
86{
87 unsigned int type;
88
89 type = gicv2_get_interrupt_group(id);
90
91 /* Assume that all secure interrupts are S-EL1 interrupts */
92 return (type) ? INTR_TYPE_NS : INTR_TYPE_S_EL1;
93}
94
95/*
96 * This functions is used to indicate to the interrupt controller that
97 * the processing of the interrupt corresponding to the `id` has
98 * finished.
99 */
100void plat_ic_end_of_interrupt(uint32_t id)
101{
102 gicv2_end_of_interrupt(id);
103}
104
105/*
106 * An ARM processor signals interrupt exceptions through the IRQ and FIQ pins.
107 * The interrupt controller knows which pin/line it uses to signal a type of
108 * interrupt. It lets the interrupt management framework determine
109 * for a type of interrupt and security state, which line should be used in the
110 * SCR_EL3 to control its routing to EL3. The interrupt line is represented
111 * as the bit position of the IRQ or FIQ bit in the SCR_EL3.
112 */
113uint32_t plat_interrupt_type_to_line(uint32_t type,
114 uint32_t security_state)
115{
116 assert(type == INTR_TYPE_S_EL1 ||
117 type == INTR_TYPE_EL3 ||
118 type == INTR_TYPE_NS);
119
120 /* Non-secure interrupts are signaled on the IRQ line always */
121 if (type == INTR_TYPE_NS)
122 return __builtin_ctz(SCR_IRQ_BIT);
123
124 /*
125 * Secure interrupts are signaled using the IRQ line if the FIQ is
126 * not enabled else they are signaled using the FIQ line.
127 */
128 return ((gicv2_is_fiq_enabled()) ? __builtin_ctz(SCR_FIQ_BIT) :
129 __builtin_ctz(SCR_IRQ_BIT));
130}
Jeenu Viswambharaneb68ea92017-09-22 08:32:09 +0100131
132unsigned int plat_ic_get_running_priority(void)
133{
134 return gicv2_get_running_priority();
135}
Jeenu Viswambharanca43b552017-09-22 08:32:09 +0100136
137int plat_ic_is_spi(unsigned int id)
138{
139 return (id >= MIN_SPI_ID) && (id <= MAX_SPI_ID);
140}
141
142int plat_ic_is_ppi(unsigned int id)
143{
144 return (id >= MIN_PPI_ID) && (id < MIN_SPI_ID);
145}
146
147int plat_ic_is_sgi(unsigned int id)
148{
149 return (id >= MIN_SGI_ID) && (id < MIN_PPI_ID);
150}
Jeenu Viswambharancbd3f372017-09-22 08:32:09 +0100151
152unsigned int plat_ic_get_interrupt_active(unsigned int id)
153{
154 return gicv2_get_interrupt_active(id);
155}