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Antonio Nino Diaz7bb01fb2017-03-08 14:40:23 +00001/*
Roberto Vargas9fb8af32018-02-12 12:36:17 +00002 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diaz7bb01fb2017-03-08 14:40:23 +00003 *
dp-arm82cb2c12017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Antonio Nino Diaz7bb01fb2017-03-08 14:40:23 +00005 */
6
Antonio Nino Diaze7b98862018-07-24 10:20:53 +01007#ifndef XLAT_TABLES_PRIVATE_H
8#define XLAT_TABLES_PRIVATE_H
Antonio Nino Diaz7bb01fb2017-03-08 14:40:23 +00009
Antonio Nino Diaz5b395e32018-08-02 09:57:29 +010010#include <stdbool.h>
Antonio Nino Diaz09d40e02018-12-14 00:18:21 +000011
12#include <platform_def.h>
13
14#include <lib/xlat_tables/xlat_tables_defs.h>
Antonio Nino Diaz7bb01fb2017-03-08 14:40:23 +000015
Antonio Nino Diaz0b64f4e2017-02-27 17:23:54 +000016#if PLAT_XLAT_TABLES_DYNAMIC
17/*
Antonio Nino Diaz3a1b7b12018-06-21 14:39:16 +010018 * Private shifts and masks to access fields of an mmap attribute
Antonio Nino Diaz0b64f4e2017-02-27 17:23:54 +000019 */
20/* Dynamic or static */
Antonio Nino Diaz3a1b7b12018-06-21 14:39:16 +010021#define MT_DYN_SHIFT U(31)
Antonio Nino Diaz0b64f4e2017-02-27 17:23:54 +000022
23/*
24 * Memory mapping private attributes
25 *
Antonio Nino Diaz3a1b7b12018-06-21 14:39:16 +010026 * Private attributes not exposed in the public header.
Antonio Nino Diaz0b64f4e2017-02-27 17:23:54 +000027 */
Antonio Nino Diaz3a1b7b12018-06-21 14:39:16 +010028
29/*
30 * Regions mapped before the MMU can't be unmapped dynamically (they are
31 * static) and regions mapped with MMU enabled can be unmapped. This
32 * behaviour can't be overridden.
33 *
34 * Static regions can overlap each other, dynamic regions can't.
35 */
36#define MT_STATIC (U(0) << MT_DYN_SHIFT)
37#define MT_DYNAMIC (U(1) << MT_DYN_SHIFT)
Antonio Nino Diaz0b64f4e2017-02-27 17:23:54 +000038
Sandrine Bailleuxf301da42017-04-25 14:09:47 +010039#endif /* PLAT_XLAT_TABLES_DYNAMIC */
40
Antonio Nino Diaze7b98862018-07-24 10:20:53 +010041extern uint64_t mmu_cfg_params[MMU_CFG_PARAM_MAX];
42
Antonio Nino Diaz0b64f4e2017-02-27 17:23:54 +000043/*
Antonio Nino Diaz468e2382018-07-05 08:11:48 +010044 * Return the execute-never mask that will prevent instruction fetch at the
45 * given translation regime.
46 */
47uint64_t xlat_arch_regime_get_xn_desc(int xlat_regime);
48
49/*
Douglas Raillardb4ae6152017-09-25 15:23:22 +010050 * Invalidate all TLB entries that match the given virtual address. This
51 * operation applies to all PEs in the same Inner Shareable domain as the PE
52 * that executes this function. This functions must be called for every
Antonio Nino Diaz8d164bc2018-07-11 09:46:45 +010053 * translation table entry that is modified. It only affects the specified
54 * translation regime.
Douglas Raillardb4ae6152017-09-25 15:23:22 +010055 *
56 * Note, however, that it is architecturally UNDEFINED to invalidate TLB entries
57 * pertaining to a higher exception level, e.g. invalidating EL3 entries from
58 * S-EL1.
Antonio Nino Diaz0b64f4e2017-02-27 17:23:54 +000059 */
Antonio Nino Diaz8d164bc2018-07-11 09:46:45 +010060void xlat_arch_tlbi_va(uintptr_t va, int xlat_regime);
Antonio Nino Diaz0b64f4e2017-02-27 17:23:54 +000061
62/*
63 * This function has to be called at the end of any code that uses the function
64 * xlat_arch_tlbi_va().
65 */
66void xlat_arch_tlbi_va_sync(void);
67
Antonio Nino Diaz7bb01fb2017-03-08 14:40:23 +000068/* Print VA, PA, size and attributes of all regions in the mmap array. */
Antonio Nino Diaze7b98862018-07-24 10:20:53 +010069void xlat_mmap_print(const mmap_region_t *mmap);
Antonio Nino Diaz7bb01fb2017-03-08 14:40:23 +000070
71/*
72 * Print the current state of the translation tables by reading them from
73 * memory.
74 */
75void xlat_tables_print(xlat_ctx_t *ctx);
76
77/*
Antonio Nino Diazfd2299e2018-07-03 11:58:49 +010078 * Returns a block/page table descriptor for the given level and attributes.
79 */
80uint64_t xlat_desc(const xlat_ctx_t *ctx, uint32_t attr,
Antonio Nino Diaze7b98862018-07-24 10:20:53 +010081 unsigned long long addr_pa, unsigned int level);
Antonio Nino Diazfd2299e2018-07-03 11:58:49 +010082
83/*
Antonio Nino Diaz7bb01fb2017-03-08 14:40:23 +000084 * Architecture-specific initialization code.
85 */
86
Antonio Nino Diaza5640252017-04-27 13:30:22 +010087/* Returns the current Exception Level. The returned EL must be 1 or higher. */
Antonio Nino Diaze7b98862018-07-24 10:20:53 +010088unsigned int xlat_arch_current_el(void);
Antonio Nino Diaza5640252017-04-27 13:30:22 +010089
90/*
Sandrine Bailleux99f60792017-05-31 13:31:48 +010091 * Return the maximum physical address supported by the hardware.
92 * This value depends on the execution state (AArch32/AArch64).
93 */
94unsigned long long xlat_arch_get_max_supported_pa(void);
Antonio Nino Diaz7bb01fb2017-03-08 14:40:23 +000095
Antonio Nino Diaz609c9192017-10-04 16:52:15 +010096/*
Antonio Nino Diaz5b395e32018-08-02 09:57:29 +010097 * Returns true if the MMU of the translation regime managed by the given
98 * xlat_ctx_t is enabled, false otherwise.
Antonio Nino Diaz609c9192017-10-04 16:52:15 +010099 */
Antonio Nino Diaz5b395e32018-08-02 09:57:29 +0100100bool is_mmu_enabled_ctx(const xlat_ctx_t *ctx);
Antonio Nino Diaz7bb01fb2017-03-08 14:40:23 +0000101
Antonio Nino Diaz3e318e42018-08-07 12:47:12 +0100102/* Returns true if the data cache is enabled at the current EL. */
103bool is_dcache_enabled(void);
104
Sathees Balyacedfa042019-01-25 11:36:01 +0000105/*
106 * Returns minimum virtual address space size supported by the architecture
107 */
108uintptr_t xlat_get_min_virt_addr_space_size(void);
109
Antonio Nino Diaze7b98862018-07-24 10:20:53 +0100110#endif /* XLAT_TABLES_PRIVATE_H */