Soby Mathew | a43d431 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
Dan Handley | e2bf57f | 2015-04-01 17:34:24 +0100 | [diff] [blame^] | 30 | #ifndef __PLAT_MACROS_S__ |
| 31 | #define __PLAT_MACROS_S__ |
| 32 | |
Vikram Kanigiri | 4991ecd | 2015-02-26 15:25:58 +0000 | [diff] [blame] | 33 | #include <cci.h> |
Soby Mathew | a43d431 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 34 | #include <gic_v2.h> |
Dan Handley | 6f3b195 | 2014-06-20 12:02:01 +0100 | [diff] [blame] | 35 | #include <plat_config.h> |
Dan Handley | cae3ef9 | 2014-08-04 16:11:15 +0100 | [diff] [blame] | 36 | #include "../fvp_def.h" |
Soby Mathew | a43d431 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 37 | |
| 38 | .section .rodata.gic_reg_name, "aS" |
Soby Mathew | 6ab0391 | 2014-09-01 12:29:27 +0100 | [diff] [blame] | 39 | gicc_regs: |
| 40 | .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", "" |
Soby Mathew | 626ed51 | 2014-06-25 10:07:40 +0100 | [diff] [blame] | 41 | gicd_pend_reg: |
| 42 | .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n" |
| 43 | newline: |
| 44 | .asciz "\n" |
| 45 | spacer: |
| 46 | .asciz ":\t\t0x" |
Soby Mathew | a43d431 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 47 | |
Soby Mathew | a43d431 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 48 | /* --------------------------------------------- |
| 49 | * The below macro prints out relevant GIC |
| 50 | * registers whenever an unhandled exception is |
Sandrine Bailleux | 4480425 | 2014-08-06 11:27:23 +0100 | [diff] [blame] | 51 | * taken in BL3-1. |
Soby Mathew | 6ab0391 | 2014-09-01 12:29:27 +0100 | [diff] [blame] | 52 | * Clobbers: x0 - x10, x16, x17, sp |
Soby Mathew | a43d431 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 53 | * --------------------------------------------- |
| 54 | */ |
| 55 | .macro plat_print_gic_regs |
Soby Mathew | 6ab0391 | 2014-09-01 12:29:27 +0100 | [diff] [blame] | 56 | mov_imm x0, (VE_SYSREGS_BASE + V2M_SYS_ID) |
| 57 | ldr w16, [x0] |
| 58 | /* Extract BLD (12th - 15th bits) from the SYS_ID */ |
| 59 | ubfx x16, x16, #SYS_ID_BLD_SHIFT, #4 |
| 60 | /* Check if VE mmap */ |
| 61 | cmp w16, #BLD_GIC_VE_MMAP |
| 62 | b.eq use_ve_mmap |
| 63 | /* Check if Cortex-A53/A57 mmap */ |
| 64 | cmp w16, #BLD_GIC_A53A57_MMAP |
| 65 | b.ne exit_print_gic_regs |
| 66 | mov_imm x17, BASE_GICC_BASE |
| 67 | mov_imm x16, BASE_GICD_BASE |
| 68 | b print_gicc_regs |
| 69 | use_ve_mmap: |
| 70 | mov_imm x17, VE_GICC_BASE |
| 71 | mov_imm x16, VE_GICD_BASE |
| 72 | print_gicc_regs: |
| 73 | /* gicc base address is now in x17 */ |
| 74 | adr x6, gicc_regs /* Load the gicc reg list to x6 */ |
| 75 | /* Load the gicc regs to gp regs used by str_in_crash_buf_print */ |
| 76 | ldr w8, [x17, #GICC_HPPIR] |
| 77 | ldr w9, [x17, #GICC_AHPPIR] |
| 78 | ldr w10, [x17, #GICC_CTLR] |
Sandrine Bailleux | 4480425 | 2014-08-06 11:27:23 +0100 | [diff] [blame] | 79 | /* Store to the crash buf and print to console */ |
Soby Mathew | 626ed51 | 2014-06-25 10:07:40 +0100 | [diff] [blame] | 80 | bl str_in_crash_buf_print |
| 81 | |
| 82 | /* Print the GICD_ISPENDR regs */ |
| 83 | add x7, x16, #GICD_ISPENDR |
| 84 | adr x4, gicd_pend_reg |
| 85 | bl asm_print_str |
Soby Mathew | aecc084 | 2014-08-19 11:26:00 +0100 | [diff] [blame] | 86 | gicd_ispendr_loop: |
Soby Mathew | 626ed51 | 2014-06-25 10:07:40 +0100 | [diff] [blame] | 87 | sub x4, x7, x16 |
| 88 | cmp x4, #0x280 |
Soby Mathew | aecc084 | 2014-08-19 11:26:00 +0100 | [diff] [blame] | 89 | b.eq exit_print_gic_regs |
Soby Mathew | 626ed51 | 2014-06-25 10:07:40 +0100 | [diff] [blame] | 90 | bl asm_print_hex |
| 91 | adr x4, spacer |
| 92 | bl asm_print_str |
| 93 | ldr x4, [x7], #8 |
| 94 | bl asm_print_hex |
| 95 | adr x4, newline |
| 96 | bl asm_print_str |
Soby Mathew | aecc084 | 2014-08-19 11:26:00 +0100 | [diff] [blame] | 97 | b gicd_ispendr_loop |
| 98 | exit_print_gic_regs: |
Soby Mathew | a43d431 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 99 | .endm |
Soby Mathew | 8c10690 | 2014-07-16 09:23:52 +0100 | [diff] [blame] | 100 | |
| 101 | .section .rodata.cci_reg_name, "aS" |
| 102 | cci_iface_regs: |
| 103 | .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , "" |
| 104 | |
| 105 | /* ------------------------------------------------ |
| 106 | * The below macro prints out relevant interconnect |
| 107 | * registers whenever an unhandled exception is |
Sandrine Bailleux | 4480425 | 2014-08-06 11:27:23 +0100 | [diff] [blame] | 108 | * taken in BL3-1. |
Soby Mathew | 8c10690 | 2014-07-16 09:23:52 +0100 | [diff] [blame] | 109 | * Clobbers: x0 - x9, sp |
| 110 | * ------------------------------------------------ |
| 111 | */ |
| 112 | .macro plat_print_interconnect_regs |
| 113 | adr x6, cci_iface_regs |
| 114 | /* Store in x7 the base address of the first interface */ |
| 115 | mov_imm x7, (CCI400_BASE + SLAVE_IFACE3_OFFSET) |
| 116 | ldr w8, [x7, #SNOOP_CTRL_REG] |
| 117 | /* Store in x7 the base address of the second interface */ |
| 118 | mov_imm x7, (CCI400_BASE + SLAVE_IFACE4_OFFSET) |
| 119 | ldr w9, [x7, #SNOOP_CTRL_REG] |
| 120 | /* Store to the crash buf and print to console */ |
| 121 | bl str_in_crash_buf_print |
| 122 | .endm |
Dan Handley | e2bf57f | 2015-04-01 17:34:24 +0100 | [diff] [blame^] | 123 | |
| 124 | #endif /* __PLAT_MACROS_S__ */ |