blob: 708a1f30fe3918f66628794badd0ce2de0e14592 [file] [log] [blame]
Karl Zhang3de5ab12021-05-31 11:45:48 +08001/*
2 * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8#include <cstdint> // for uint32_t
9#include "compute.hpp"
10
11
12using namespace std;
13
14/**********************************************************************************
15 Methods of class crc32 follow:
16**********************************************************************************/
17
18crc32::crc32 (void)
19{
20 shift_reg = 0x55555555; // just give it some default value
21}
22
23void crc32::seed_lfsr (uint32_t init_value)
24{
25 shift_reg = init_value;
26}
27
28/* lfsr_1b() performs one shift of the LFSR, factoring in a single bit of info,
29 that single bit must be in the low-order bit of the parameter. It returns
30 the LFSR value, which may be ignored. */
31uint32_t crc32::lfsr_1b (uint32_t a_bit)
32{
33 bool odd;
34
35 odd = ((shift_reg ^ a_bit) & 1) == 1;
36 shift_reg >>= 1;
37 if (odd) {
38 shift_reg ^= polynomial;
39 }
40 if (shift_reg == 0) {
41 // Theoretically should never happen, but precaution...
42 seed_lfsr (0x55555555);
43 }
44 return shift_reg;
45}
46
47uint32_t crc32::crc (uint8_t a_byte)
48{
49 for (int i = 0; i < 8; i++) {
50 lfsr_1b ((uint32_t) a_byte);
51 a_byte >>= 1;
52 }
53 return shift_reg;
54}
55
56uint32_t crc32::crc (uint16_t a_halfword)
57{
58 for (int i = 0; i < 16; i++) {
59 lfsr_1b ((uint32_t) a_halfword);
60 a_halfword >>= 1;
61 }
62 return shift_reg;
63}
64
65uint32_t crc32::crc (uint32_t a_word)
66{
67 for (int i = 0; i < 32; i++) {
68 lfsr_1b ((uint32_t) a_word);
69 a_word >>= 1;
70 }
71 return shift_reg;
72}
73
74/**********************************************************************************
75 End of methods of class crc32.
76**********************************************************************************/