blob: b579a3dbbfa546c828c447ccc87131ad79301b30 [file] [log] [blame]
Vijayenthiran Subramaniamdfda93d2020-07-23 12:53:35 +05301From f1cd888433a0f04806f0074ea3572eb79f781274 Mon Sep 17 00:00:00 2001
2From: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
3Date: Wed, 23 Oct 2019 11:48:02 +0530
4Subject: [PATCH] [HACK]: spinlock: send explicit event after store release
5 instruction
6
7stlr instruction in the spin_unlock function is expected to send an
8implicit event to all CPU cores. In a cross chip scenario, FVP has
9stability issues while sending this implicit event across chips.
10To avoid the stability issues, add sev instruction which sends explicit
11events to all cores. Explicit events are propagated across chips without
12any stability issues.
13
14Change-Id: I94db4f940e98f9b60f4120d0bde4930f9d31440c
15Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
16---
17 lib/locks/exclusive/aarch64/spinlock.S | 1 +
18 1 file changed, 1 insertion(+)
19
20diff --git a/lib/locks/exclusive/aarch64/spinlock.S b/lib/locks/exclusive/aarch64/spinlock.S
21index e941b8a34..2c01a3bee 100644
22--- a/lib/locks/exclusive/aarch64/spinlock.S
23+++ b/lib/locks/exclusive/aarch64/spinlock.S
24@@ -71,5 +71,6 @@ endfunc spin_lock
25 */
26 func spin_unlock
27 stlr wzr, [x0]
28+ sev
29 ret
30 endfunc spin_unlock
31--
322.17.1
33