Manish V Badarkhe | e478383 | 2021-02-22 14:36:56 +0000 | [diff] [blame] | 1 | #!/usr/bin/env bash |
| 2 | # |
laurenw-arm | afdc3bc | 2022-09-14 15:31:42 -0500 | [diff] [blame] | 3 | # Copyright (c) 2021-2022, Arm Limited. All rights reserved. |
Manish V Badarkhe | e478383 | 2021-02-22 14:36:56 +0000 | [diff] [blame] | 4 | # |
| 5 | # SPDX-License-Identifier: BSD-3-Clause |
| 6 | # |
| 7 | |
laurenw-arm | afdc3bc | 2022-09-14 15:31:42 -0500 | [diff] [blame] | 8 | set_model_path "$warehouse/SysGen/Models/$model_version_11_17/$model_build_11_17/external/models/$model_flavour_11_17/FVP_Base_AEMv8A-GIC600AE" |
Manish V Badarkhe | e478383 | 2021-02-22 14:36:56 +0000 | [diff] [blame] | 9 | |
| 10 | default_var sve_plugin_path "$warehouse/SysGen/PVModelLib/0.0/6415/external/plugins/$model_flavour/sve2-HEAD/ScalableVectorExtension.so" |
| 11 | |
| 12 | source "$ci_root/model/base-aemva-common.sh" |
| 13 | |
Manish V Badarkhe | 6cc0935 | 2022-03-29 23:40:03 +0100 | [diff] [blame] | 14 | # TF-A code maintain GICD and GICR base address at 0x2f000000 |
| 15 | # 0x2f100000 respectively. Model provides provision to only |
| 16 | # put GICD base address, and there is a calculation to derive |
| 17 | # GICR base address i.e. |
| 18 | # GICR base address = 0x2f000000 + (4 + (2 × ITScount)+(RDnum × 2)) << 16 |
| 19 | # Hence to set GICR base address to 0x2f100000, set the |
| 20 | # ITScount=6 where RDnum=0 |
Manish V Badarkhe | e478383 | 2021-02-22 14:36:56 +0000 | [diff] [blame] | 21 | cat <<EOF >>"$model_param_file" |
Manish V Badarkhe | 6cc0935 | 2022-03-29 23:40:03 +0100 | [diff] [blame] | 22 | -C gic_iri.ITS-count=6 |
Manish V Badarkhe | e478383 | 2021-02-22 14:36:56 +0000 | [diff] [blame] | 23 | EOF |