DSP_Lib changes:
- new version V1.5.5
- reworked DSP library source files
added macro ARM_MATH_LOOPUNROLL
removed macro UNALIGNED_SUPPORT_DISABLE
relpaced arm_bitreversal2.S with C version
added const-correctness
replaced SIMD pointer construct with memcpy solution
- reworked DSP library documentation
- moved DSP libraries to folder ./DSP/Lib
- ARM DSP Libraries are built with ARMCLANG
- Added DSP Libraries Source variant
diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc
index 853000d..591f108 100644
--- a/ARM.CMSIS.pdsc
+++ b/ARM.CMSIS.pdsc
@@ -8,6 +8,21 @@
<url>http://www.keil.com/pack/</url>
<releases>
+ <release version="5.5.0-dev55">
+ Active development ...
+ DSP_Lib:
+ - new version V1.5.5
+ - reworked DSP library source files
+ added macro ARM_MATH_LOOPUNROLL
+ removed macro UNALIGNED_SUPPORT_DISABLE
+ relpaced arm_bitreversal2.S with C version
+ added const-correctness
+ replaced SIMD pointer construct with memcpy solution
+ - reworked DSP library documentation
+ - moved DSP libraries to folder ./DSP/Lib
+ - ARM DSP Libraries are built with ARMCLANG
+ - Added DSP Libraries Source variant
+ </release>
<release version="5.5.0-dev5">
Development Snapshot ...
CMSIS-Driver:
@@ -3053,7 +3068,7 @@
</component>
<!-- CMSIS-DSP component -->
- <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
+ <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.5.5" condition="CMSIS DSP">
<description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
<files>
<!-- CPU independent -->
@@ -3062,101 +3077,122 @@
<!-- CPU and Compiler dependent -->
<!-- ARMCC -->
- <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM1_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM1_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM1_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM1_BE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM33_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM33_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="CM35P_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
- <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib" src="CMSIS/DSP/Source/ARM"/-->
- <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib" src="CMSIS/DSP/Source/ARM"/-->
+ <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM33_NODSP_SP_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM33_DSP_SP_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="CM35P_DSP_SP_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP/Source/ARM"/>
+ <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib" src="CMSIS/DSP/Source/ARM"/-->
+ <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC" name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib" src="CMSIS/DSP/Source/ARM"/-->
<!-- GCC -->
- <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM1_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM0_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM1_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM3_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM4_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM7_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM23_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM33_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM33_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM33_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM35P_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="CM35P_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
- <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
- <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
- <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
+ <file category="library" condition="CM23_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM33_DSP_NOFPU_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM33_NODSP_SP_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM33_DSP_SP_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM35P_NODSP_SP_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="CM35P_DSP_SP_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
+ <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
+ <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC" name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
<!-- IAR -->
- <file category="library" condition="CM0_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM0l_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM0_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM0b_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM1_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM0l_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM1_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM0b_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM3_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM3l_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM3_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM3b_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM4_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM4l_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM4_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM4b_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM4lf_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM4bf_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM7_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM7l_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM7_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM7b_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM7_DP_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM7lf_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM7_DP_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM7bf_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM7_SP_LE_IAR" name="CMSIS/Lib/IAR/iar_cortexM7ls_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM7_SP_BE_IAR" name="CMSIS/Lib/IAR/iar_cortexM7bs_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM0_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM0_BE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM1_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM1_BE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM3_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM3_BE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM4_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM4_BE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM7_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM7_BE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM7_DP_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM7_DP_BE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM7_SP_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM7_SP_BE_IAR" name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM23_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM33_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM33_NODSP_SP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM33_DSP_SP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM35P_NODSP_SP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="CM35P_DSP_SP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="ARMv8MBL_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
- <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
- <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
- <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
+ <file category="library" condition="CM23_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM33_DSP_NOFPU_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM33_NODSP_SP_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM33_DSP_SP_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM35P_NODSP_SP_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="CM35P_DSP_SP_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="ARMv8MBL_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
+ <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
+ <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR" name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
+
+ </files>
+ </component>
+ <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source" Cversion="1.5.5" condition="CMSIS DSP">
+ <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
+ <files>
+ <!-- CPU independent -->
+ <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
+ <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
+
+ <!-- RTX sources (core) -->
+ <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
+ <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
+ <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
+ <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
+ <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
+ <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
+ <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
+ <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
+ <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
+ <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
</files>
</component>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_FVP.ini b/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_FVP.ini
index 44d22eb..cfb438f 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_FVP.ini
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_FVP.ini
@@ -12,7 +12,7 @@
BK * /* Remove existing breakpoints. */
INCLUDE ../../Common/JTest/jtest_fns.ini /* Load the JTEST helper functions */
-INCLUDE ../../Common/JTest/jtest_log_FVP.ini /* Include a log file if specified by jtest_log.ini */
+INCLUDE ../../Common/JTest/jtest_log_FVP.ini /* Include specified log file */
/* Break on special members of the JTEST framework. The framework's
name is defined in jtest_fw.h by the #DEFINE JTEST_FW. */
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini b/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini
index 8f2a6b1..d6c87b8 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini
@@ -17,12 +17,12 @@
/* Break on special members of the JTEST framework. The framework's
name is defined in jtest_fw.h by the #DEFINE JTEST_FW. */
-BS test_start , 1, "coverage_clear(); test_start_msg();"
-BS test_end , 1, "coverage_msg(); test_end_msg();"
+BS test_start , 1, "test_start_msg();"
+BS test_end , 1, "test_end_msg();"
BS group_start , 1, "group_start_msg();"
BS group_end , 1, "group_end_msg();"
BS dump_str , 1, "dump_str_fn();"
-BS dump_data , 1, "dump_data_fn();"
+//BS dump_data , 1, "dump_data_fn();"
BS exit_fw , 1, "break_fn(); debug_clean_fn(); log_off_fn();"
debug_setup_finished_msg() /* Output a message to let the output
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini.withCoverage b/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini.withCoverage
new file mode 100644
index 0000000..8f2a6b1
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini.withCoverage
@@ -0,0 +1,32 @@
+/* This demonstrates how to setup a Debugger '*.ini' file to interface with the
+ * C-code using the JTEST test framework.
+ */
+
+MAP 0x00000000, 0x001FFFFF EXEC READ /* 2048K Flash */
+MAP 0x20000000, 0x201FFFFF READ WRITE /* 2048K RAM */
+
+LOAD %L INCREMENTAL
+
+
+RESET /* Reset the target processor */
+LOG OFF /* Turn off Logging by default. */
+BK * /* Remove existing breakpoints. */
+
+INCLUDE ../../Common/JTest/jtest_fns.ini /* Load the JTEST helper functions */
+INCLUDE ../../Common/JTest/jtest_log_Simulator.ini /* Include specified log file */
+
+/* Break on special members of the JTEST framework. The framework's
+ name is defined in jtest_fw.h by the #DEFINE JTEST_FW. */
+BS test_start , 1, "coverage_clear(); test_start_msg();"
+BS test_end , 1, "coverage_msg(); test_end_msg();"
+BS group_start , 1, "group_start_msg();"
+BS group_end , 1, "group_end_msg();"
+BS dump_str , 1, "dump_str_fn();"
+BS dump_data , 1, "dump_data_fn();"
+BS exit_fw , 1, "break_fn(); debug_clean_fn(); log_off_fn();"
+
+debug_setup_finished_msg() /* Output a message to let the output
+ parser know that setup has
+ finished. */
+
+G /* Start the Tests */
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvoptx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvoptx
index 8300407..fbd1ae9 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvoptx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvoptx
@@ -140,7 +140,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"../cortexM0l_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"../cortexM0l_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -293,7 +293,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"../cortexM3l_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"../cortexM3l_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -446,7 +446,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"../cortexM4l_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"../cortexM4l_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -619,7 +619,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -792,7 +792,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7l_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7l_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -965,7 +965,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7lfsp_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1118,7 +1118,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7lfdp_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7lfdp_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1286,7 +1286,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1439,7 +1439,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1607,7 +1607,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1775,7 +1775,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1943,7 +1943,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLldfsp_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLldfsp_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvprojx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvprojx
index 0035f92..bc06615 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvprojx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvprojx
@@ -16,7 +16,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -338,7 +338,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -860,7 +860,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -1182,7 +1182,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -1704,7 +1704,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -2026,7 +2026,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -2548,7 +2548,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -2870,7 +2870,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -3392,7 +3392,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3714,7 +3714,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -4236,7 +4236,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -4558,7 +4558,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -5080,7 +5080,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5402,7 +5402,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -5925,7 +5925,7 @@
<TargetCommonOption>
<Device>ARMv8MBL</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -6247,7 +6247,7 @@
<MiscControls>-fhonor-nans</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -6770,7 +6770,7 @@
<TargetCommonOption>
<Device>ARMv8MML</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -7092,7 +7092,7 @@
<MiscControls>-fhonor-nans</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -7615,7 +7615,7 @@
<TargetCommonOption>
<Device>ARMv8MML_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -7937,7 +7937,7 @@
<MiscControls>-fhonor-nans</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -8460,7 +8460,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -8782,7 +8782,7 @@
<MiscControls>-fhonor-nans</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -9305,7 +9305,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -9627,7 +9627,7 @@
<MiscControls>-fhonor-nans</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/DspLibTest_FVP.uvoptx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/DspLibTest_FVP.uvoptx
index 4c98f5b..770e9c5 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/DspLibTest_FVP.uvoptx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/DspLibTest_FVP.uvoptx
@@ -75,7 +75,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
- <IsCurrentTarget>0</IsCurrentTarget>
+ <IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>
@@ -140,7 +140,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -293,7 +293,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -446,7 +446,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -619,7 +619,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -792,7 +792,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -965,7 +965,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1118,7 +1118,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1286,7 +1286,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1439,7 +1439,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1607,7 +1607,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1775,7 +1775,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1883,7 +1883,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
- <IsCurrentTarget>1</IsCurrentTarget>
+ <IsCurrentTarget>0</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>
@@ -1943,7 +1943,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLldfsp_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLldfsp_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/DspLibTest_FVP.uvprojx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/DspLibTest_FVP.uvprojx
index ccb593b..3600651 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/DspLibTest_FVP.uvprojx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/DspLibTest_FVP.uvprojx
@@ -15,7 +15,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -337,7 +337,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -859,7 +859,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -1181,7 +1181,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -1703,7 +1703,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -2025,7 +2025,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -2547,7 +2547,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -2869,7 +2869,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -3391,7 +3391,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3713,7 +3713,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -4236,7 +4236,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -4558,7 +4558,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -5080,7 +5080,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5402,7 +5402,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -5925,7 +5925,7 @@
<TargetCommonOption>
<Device>ARMv8MBL</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -6247,7 +6247,7 @@
<MiscControls>-fhonor-nans</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -6770,7 +6770,7 @@
<TargetCommonOption>
<Device>ARMv8MML</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -7092,7 +7092,7 @@
<MiscControls>-fhonor-nans</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -7615,7 +7615,7 @@
<TargetCommonOption>
<Device>ARMv8MML_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -7937,7 +7937,7 @@
<MiscControls>-fhonor-nans</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -8460,7 +8460,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -8782,7 +8782,7 @@
<MiscControls>-fhonor-nans</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -9305,7 +9305,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -9627,7 +9627,7 @@
<MiscControls>-fhonor-nans</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvoptx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvoptx
index 11d5aba..79f27f0 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvoptx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvoptx
@@ -75,7 +75,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
- <IsCurrentTarget>0</IsCurrentTarget>
+ <IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>
@@ -140,7 +140,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -293,7 +293,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -446,7 +446,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -619,7 +619,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -792,7 +792,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -965,7 +965,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1118,7 +1118,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
- <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA</Name>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1226,7 +1226,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
- <IsCurrentTarget>1</IsCurrentTarget>
+ <IsCurrentTarget>0</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>
@@ -1286,7 +1286,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1439,7 +1439,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1607,7 +1607,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1775,7 +1775,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@@ -1943,7 +1943,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
- <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLldfsp_config.txt" -MA</Name>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLldfsp_config.txt" -MA"-Q 1"</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvprojx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvprojx
index f8b3b0a..7d12245 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvprojx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvprojx
@@ -15,7 +15,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -242,7 +242,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -741,7 +741,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -968,7 +968,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -1467,7 +1467,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -1694,7 +1694,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -2193,7 +2193,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -2420,7 +2420,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -2919,7 +2919,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3146,7 +3146,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -3645,7 +3645,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3872,7 +3872,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -4371,7 +4371,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -4598,7 +4598,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -5097,7 +5097,7 @@
<TargetCommonOption>
<Device>ARMv8MBL</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5324,7 +5324,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.base</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -5823,7 +5823,7 @@
<TargetCommonOption>
<Device>ARMv8MML</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -6050,7 +6050,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -6549,7 +6549,7 @@
<TargetCommonOption>
<Device>ARMv8MML_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -6776,7 +6776,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -7275,7 +7275,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -7502,7 +7502,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -8001,7 +8001,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -8228,7 +8228,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/ARM/DspLibTest_MPS2.uvprojx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/ARM/DspLibTest_MPS2.uvprojx
index 15df8ff..3d9cf53 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/ARM/DspLibTest_MPS2.uvprojx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/ARM/DspLibTest_MPS2.uvprojx
@@ -334,7 +334,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_CM0</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -1175,7 +1175,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_CM3</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -2016,7 +2016,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_CM4</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -2857,7 +2857,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_CM4 __FPU_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -3698,7 +3698,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_CM7</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -4539,7 +4539,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -5380,7 +5380,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -6222,7 +6222,7 @@
<MiscControls>-fhonor-nans</MiscControls>
<Define>ARM_MATH_ARMV8MBL</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -7064,7 +7064,7 @@
<MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
<Define>ARM_MATH_ARMV8MML</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -7906,7 +7906,7 @@
<MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
<Define>ARM_MATH_ARMV8MML __FPU_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -8748,7 +8748,7 @@
<MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
<Define>ARM_MATH_ARMV8MML __FPU_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -9590,7 +9590,7 @@
<MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
<Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -10432,7 +10432,7 @@
<MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
<Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -11274,7 +11274,7 @@
<MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
<Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/GCC/DspLibTest_MPS2.uvprojx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/GCC/DspLibTest_MPS2.uvprojx
index cfc18b2..451ab46 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/GCC/DspLibTest_MPS2.uvprojx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/GCC/DspLibTest_MPS2.uvprojx
@@ -240,7 +240,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define>ARM_MATH_CM0</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -964,7 +964,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define>ARM_MATH_CM3</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -1688,7 +1688,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define>ARM_MATH_CM4</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -2412,7 +2412,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define>ARM_MATH_CM4 __FPU_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -3136,7 +3136,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define>ARM_MATH_CM7</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -3860,7 +3860,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -4584,7 +4584,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -5308,7 +5308,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.base</MiscControls>
<Define>ARM_MATH_ARMV8MBL</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -6032,7 +6032,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main</MiscControls>
<Define>ARM_MATH_ARMV8MML</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -6756,7 +6756,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define>ARM_MATH_ARMV8MML __FPU_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -7480,7 +7480,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define>ARM_MATH_ARMV8MML __FPU_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -8204,7 +8204,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp</MiscControls>
<Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -8928,7 +8928,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -9652,7 +9652,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/DspLibTest_FVP.uvoptx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/DspLibTest_FVP.uvoptx
new file mode 100644
index 0000000..f1a60d5
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/DspLibTest_FVP.uvoptx
@@ -0,0 +1,2479 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj; *.o</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ <nMigrate>0</nMigrate>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>cortexM0l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"../cortexM0l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
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+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM3l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"../cortexM3l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
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+ <aPa>0</aPa>
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+ <vrSel>0</vrSel>
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+ <AscS1>0</AscS1>
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+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"../cortexM4l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4lf</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7lfsp</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7lfsp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7lfdp</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7lfdp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
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diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/DspLibTest_FVP.uvprojx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/DspLibTest_FVP.uvprojx
new file mode 100644
index 0000000..af0aa08
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/DspLibTest_FVP.uvprojx
@@ -0,0 +1,7114 @@
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+ <File>
+ <FileName>pid_reset_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\pid_reset_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>sin_cos_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\sin_cos_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>pid_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\pid_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>controller_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\controller_test_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>FastMath</GroupName>
+ <Files>
+ <File>
+ <FileName>fast_math_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>fast_math_tests_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Filtering</GroupName>
+ <Files>
+ <File>
+ <FileName>filtering_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\filtering_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>filtering_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\filtering_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>biquad_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\biquad_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>conv_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\conv_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>correlate_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\correlate_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>fir_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\fir_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>iir_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\iir_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>lms_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\lms_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Matrix</GroupName>
+ <Files>
+ <File>
+ <FileName>matrix_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\matrix_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>matrix_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\matrix_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_cmplx_mult_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_add_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_add_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_mult_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_mult_fast_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_sub_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_inverse_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_trans_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_init_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_scale_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Statistics</GroupName>
+ <Files>
+ <File>
+ <FileName>max_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>statistics_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>statistics_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>mean_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>min_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>power_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>rms_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>std_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>var_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Support</GroupName>
+ <Files>
+ <File>
+ <FileName>copy_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>support_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>support_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>fill_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>x_to_y_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Intrinsics</GroupName>
+ <Files>
+ <File>
+ <FileName>intrinsics_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>intrinsics_tests_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>MathHelper</GroupName>
+ <Files>
+ <File>
+ <FileName>math_helper.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\math_helper.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+ <RTE>
+ <apis/>
+ <components/>
+ <files/>
+ </RTE>
+
+</Project>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/Logs/.gitignore b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/DspLibTest_FVP.uvoptx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/DspLibTest_FVP.uvoptx
new file mode 100644
index 0000000..6edc42b
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/DspLibTest_FVP.uvoptx
@@ -0,0 +1,3304 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj; *.o</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ <nMigrate>0</nMigrate>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>cortexM0l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
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+ <AscS1>0</AscS1>
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+ <AscS3>0</AscS3>
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+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM3l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
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+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
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+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4lf</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7lfsp</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7lfsp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7lfdp</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7lfdp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MBLl</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MBLl\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>15</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFMv8M.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFMv8M</Key>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2V8M</Key>
+ <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MMLl</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MMLl\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>15</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFMv8M.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFMv8M</Key>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2V8M</Key>
+ <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MMLlfsp</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MMLlfsp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
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+ <sDllPa></sDllPa>
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+ <tDlgPa></tDlgPa>
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+ <pMon>BIN\DbgFMv8M.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
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+ </SetRegEntry>
+ <SetRegEntry>
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+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
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+ <SetRegEntry>
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+ </SetRegEntry>
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+ </Target>
+
+ <Target>
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+ <TargetDriverDllRegistry>
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+ </Target>
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+ <Target>
+ <TargetName>ARMv8MMLldfsp</TargetName>
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+ <ToolsetName>ARM-ADS</ToolsetName>
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+ <ListingPage>
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+ <CpuCode>7</CpuCode>
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+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
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+ </SetRegEntry>
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+ </SetRegEntry>
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+ <MiscControls></MiscControls>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
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+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
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+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ </GroupArmAds>
+ </GroupOption>
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+ </Files>
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+ <Group>
+ <GroupName>Ref_Lib Files</GroupName>
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+ <FilePath>..\..\Common\platform\startup_generic.S</FilePath>
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+ </Files>
+ </Group>
+ <Group>
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+ <File>
+ <FileName>basic_math_test_common_data.c</FileName>
+ <FileType>1</FileType>
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+ </File>
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+ <FilePath>..\..\Common\src\basic_math_tests\basic_math_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>negate_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\negate_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>add_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\add_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mult_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\mult_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>sub_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\sub_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>dot_prod_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\dot_prod_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>offset_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\offset_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>shift_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\shift_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>scale_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\scale_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>ComplexMath</GroupName>
+ <Files>
+ <File>
+ <FileName>complex_math_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>complex_math_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>cmplx_conj_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\cmplx_conj_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>cmplx_mag_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>cmplx_mag_squared_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>cmplx_dot_prod_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c</FilePath>
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+ <File>
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+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>cmplx_mult_real_test.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Controller</GroupName>
+ <Files>
+ <File>
+ <FileName>controller_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\controller_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>pid_reset_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\pid_reset_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>sin_cos_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\sin_cos_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>pid_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\pid_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>controller_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\controller_test_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>FastMath</GroupName>
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+ <File>
+ <FileName>fast_math_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>fast_math_tests_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Filtering</GroupName>
+ <Files>
+ <File>
+ <FileName>filtering_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\filtering_test_common_data.c</FilePath>
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+ <File>
+ <FileName>filtering_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\filtering_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>biquad_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\biquad_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>conv_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\conv_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>correlate_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\correlate_tests.c</FilePath>
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+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\fir_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>iir_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\iir_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>lms_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\lms_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Matrix</GroupName>
+ <Files>
+ <File>
+ <FileName>matrix_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\matrix_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>matrix_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\matrix_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_cmplx_mult_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_add_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_add_tests.c</FilePath>
+ </File>
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+ <FileName>mat_mult_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+ </File>
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+ <FileName>mat_mult_fast_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+ </File>
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+ <FileName>mat_sub_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_inverse_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_trans_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_init_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_scale_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Statistics</GroupName>
+ <Files>
+ <File>
+ <FileName>max_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>statistics_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>statistics_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>mean_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>min_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>power_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+ </File>
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+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+ </File>
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+ <FileName>std_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>var_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Support</GroupName>
+ <Files>
+ <File>
+ <FileName>copy_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>support_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>support_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>fill_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>x_to_y_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Intrinsics</GroupName>
+ <Files>
+ <File>
+ <FileName>intrinsics_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>intrinsics_tests_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>MathHelper</GroupName>
+ <Files>
+ <File>
+ <FileName>math_helper.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\math_helper.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+ <RTE>
+ <apis/>
+ <components/>
+ <files/>
+ </RTE>
+
+</Project>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/Logs/.gitignore b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MBLl_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MBLl_config.txt
new file mode 100644
index 0000000..d9cb90a
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MBLl_config.txt
@@ -0,0 +1,11 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
+fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLl_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLl_config.txt
new file mode 100644
index 0000000..9c3cfc2
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLl_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
+cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
+fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLld_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLld_config.txt
new file mode 100644
index 0000000..011260a
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLld_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
+cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
+fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLldfsp_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLldfsp_config.txt
new file mode 100644
index 0000000..2a0a82a
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLldfsp_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
+cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
+fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLlfsp_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLlfsp_config.txt
new file mode 100644
index 0000000..4140d9b
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLlfsp_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
+cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
+fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/DspLibTest_FVP.uvoptx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/DspLibTest_FVP.uvoptx
new file mode 100644
index 0000000..44294c2
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/DspLibTest_FVP.uvoptx
@@ -0,0 +1,3304 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj; *.o</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ <nMigrate>0</nMigrate>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>cortexM0l</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
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+ <tRfunc>0</tRfunc>
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+ <tRtrace>1</tRtrace>
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+ <tRSysVw>1</tRSysVw>
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+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
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+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM3l</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
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+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
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+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
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+ <LLibSym>1</LLibSym>
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+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
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+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
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+ <sRfunc>1</sRfunc>
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+ <tRfunc>0</tRfunc>
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+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
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+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
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+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
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+ </DebugFlag>
+ <LintExecutable></LintExecutable>
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+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4l</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
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+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
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+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
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+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
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+ <LLibSym>1</LLibSym>
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+ <LXref>0</LXref>
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+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
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+ <tRfunc>0</tRfunc>
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+ <sRSysVw>1</sRSysVw>
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+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4lf</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7l</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7lfsp</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7lfsp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7lfdp</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7lfdp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>5</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFM.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MBLl</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MBLl\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>15</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFMv8M.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFMv8M</Key>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2V8M</Key>
+ <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MMLl</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MMLl\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>15</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFMv8M.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFMv8M</Key>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2V8M</Key>
+ <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MMLlfsp</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MMLlfsp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>15</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+ <pMon>BIN\DbgFMv8M.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
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+ <FileName>statistics_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>statistics_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>mean_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>min_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>power_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>rms_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>std_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>var_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Support</GroupName>
+ <Files>
+ <File>
+ <FileName>copy_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>support_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>support_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>fill_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>x_to_y_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Intrinsics</GroupName>
+ <Files>
+ <File>
+ <FileName>intrinsics_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>intrinsics_tests_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>MathHelper</GroupName>
+ <Files>
+ <File>
+ <FileName>math_helper.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\math_helper.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+ <RTE>
+ <apis/>
+ <components/>
+ <files/>
+ </RTE>
+
+</Project>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/Logs/.gitignore b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM0l_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM0l_config.txt
new file mode 100644
index 0000000..8e33c76
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM0l_config.txt
@@ -0,0 +1,8 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm0ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm0ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm0ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM3l_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM3l_config.txt
new file mode 100644
index 0000000..2caf254
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM3l_config.txt
@@ -0,0 +1,8 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm3ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm3ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm3ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4l_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4l_config.txt
new file mode 100644
index 0000000..1c9fece
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4l_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm4ct.vfp-present=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
+armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm4ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm4ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm4ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4lf_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4lf_config.txt
new file mode 100644
index 0000000..eb832ed
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4lf_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
+armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm4ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm4ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm4ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7l_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7l_config.txt
new file mode 100644
index 0000000..4e591c9
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7l_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfdp_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfdp_config.txt
new file mode 100644
index 0000000..1888d60
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfdp_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfsp_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfsp_config.txt
new file mode 100644
index 0000000..1888d60
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfsp_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/DspLibTest_MPS2.uvoptx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/DspLibTest_MPS2.uvoptx
new file mode 100644
index 0000000..4806df2
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/DspLibTest_MPS2.uvoptx
@@ -0,0 +1,2479 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj; *.o</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ <nMigrate>0</nMigrate>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>cortexM0l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
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+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>1</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"../cortexM0l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
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+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM3l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
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+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
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+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
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+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>2</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULPL2CM3.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"../cortexM3l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
+ <tRmem>1</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>1</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>2</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULPL2CM3.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"../cortexM4l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4lf</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>2</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULPL2CM3.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>2</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULPL2CM3.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
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+ <RTE>
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new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/DspLibTest_MPS2.uvoptx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/DspLibTest_MPS2.uvoptx
new file mode 100644
index 0000000..f0a68be
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/DspLibTest_MPS2.uvoptx
@@ -0,0 +1,3304 @@
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+ <pExt>*.plm</pExt>
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+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>2</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULPL2CM3.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM3l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>2</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULPL2CM3.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>2</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULPL2CM3.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4lf</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>2</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULPL2CM3.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>2</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULPL2CM3.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7lfsp</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7lfsp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>2</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULPL2CM3.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7lfdp</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7lfdp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>2</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULPL2CM3.dll</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MBLl</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MBLl\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>12</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2V8M.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFMv8M</Key>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2V8M</Key>
+ <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MMLl</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MMLl\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>12</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2V8M.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFMv8M</Key>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2V8M</Key>
+ <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MMLlfsp</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MMLlfsp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>12</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2V8M.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFMv8M</Key>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2V8M</Key>
+ <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MMLld</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MMLld\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>12</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2V8M.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFMv8M</Key>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2V8M</Key>
+ <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MMLldfsp</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
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new file mode 100644
index 0000000..27f1b82
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+ <FilePath>..\..\Common\src\controller_tests\pid_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>controller_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\controller_test_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>FastMath</GroupName>
+ <Files>
+ <File>
+ <FileName>fast_math_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>fast_math_tests_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Filtering</GroupName>
+ <Files>
+ <File>
+ <FileName>filtering_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\filtering_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>filtering_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\filtering_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>biquad_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\biquad_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>conv_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\conv_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>correlate_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\correlate_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>fir_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\fir_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>iir_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\iir_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>lms_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\lms_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Matrix</GroupName>
+ <Files>
+ <File>
+ <FileName>matrix_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\matrix_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>matrix_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\matrix_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_cmplx_mult_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_add_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_add_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_mult_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_mult_fast_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_sub_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_inverse_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_trans_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_init_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_scale_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Statistics</GroupName>
+ <Files>
+ <File>
+ <FileName>max_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>statistics_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>statistics_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>mean_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>min_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>power_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>rms_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>std_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>var_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Support</GroupName>
+ <Files>
+ <File>
+ <FileName>copy_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>support_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>support_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>fill_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>x_to_y_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Intrinsics</GroupName>
+ <Files>
+ <File>
+ <FileName>intrinsics_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>intrinsics_tests_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>MathHelper</GroupName>
+ <Files>
+ <File>
+ <FileName>math_helper.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\math_helper.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+ <RTE>
+ <apis/>
+ <components/>
+ <files/>
+ </RTE>
+
+</Project>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/Logs/.gitignore b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MBLl_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MBLl_config.txt
new file mode 100644
index 0000000..d9cb90a
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MBLl_config.txt
@@ -0,0 +1,11 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
+fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLl_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLl_config.txt
new file mode 100644
index 0000000..9c3cfc2
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLl_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
+cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
+fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLld_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLld_config.txt
new file mode 100644
index 0000000..011260a
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLld_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
+cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
+fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLldfsp_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLldfsp_config.txt
new file mode 100644
index 0000000..2a0a82a
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLldfsp_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
+cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
+fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLlfsp_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLlfsp_config.txt
new file mode 100644
index 0000000..4140d9b
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLlfsp_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
+cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' :
+fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/DspLibTest_MPS2.uvoptx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/DspLibTest_MPS2.uvoptx
new file mode 100644
index 0000000..dd586a5
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/DspLibTest_MPS2.uvoptx
@@ -0,0 +1,3304 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj; *.o</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ <nMigrate>0</nMigrate>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>cortexM0l</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
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+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
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+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
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+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>1</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM3l</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>1</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4l</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>1</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4lf</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>1</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7l</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>1</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7lfsp</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7lfsp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>1</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7lfdp</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7lfdp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>0</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>1</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFM</Key>
+ <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MBLl</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MBLl\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>12</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2V8M.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFMv8M</Key>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2V8M</Key>
+ <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MMLl</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MMLl\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>12</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2V8M.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFMv8M</Key>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2V8M</Key>
+ <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>0</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>0</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MMLlfsp</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MMLlfsp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>12</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2V8M.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFMv8M</Key>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2V8M</Key>
+ <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MMLld</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MMLld\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>12</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+ <pMon>BIN\ULP2V8M.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGTARM</Key>
+ <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name></Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGUARM</Key>
+ <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DbgFMv8M</Key>
+ <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA"-Q 1"</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2V8M</Key>
+ <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>0</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>ARMv8MMLldfsp</TargetName>
+ <ToolsetNumber>0x3</ToolsetNumber>
+ <ToolsetName>ARM-GNU</ToolsetName>
+ <TargetOption>
+ <CLKARM>12000000</CLKARM>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>120</PageWidth>
+ <PageLength>65</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\ARMv8MMLldfsp\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>1</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>12</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile></sIfile>
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new file mode 100644
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+ <FilePath>..\..\Common\src\transform_tests\transform_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>transform_tests_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\transform_tests\transform_tests_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>cfft_family_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\transform_tests\cfft_family_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>rfft_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\transform_tests\rfft_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>rfft_fast_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\transform_tests\rfft_fast_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>dct4_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\transform_tests\dct4_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>BasicMath</GroupName>
+ <Files>
+ <File>
+ <FileName>basic_math_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\basic_math_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>abs_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\abs_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>basic_math_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\basic_math_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>negate_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\negate_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>add_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\add_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mult_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\mult_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>sub_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\sub_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>dot_prod_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\dot_prod_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>offset_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\offset_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>shift_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\shift_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>scale_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\basic_math_tests\scale_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>ComplexMath</GroupName>
+ <Files>
+ <File>
+ <FileName>complex_math_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>complex_math_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>cmplx_conj_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\cmplx_conj_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>cmplx_mag_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>cmplx_mag_squared_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>cmplx_dot_prod_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>cmplx_mult_cmplx_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>cmplx_mult_real_test.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Controller</GroupName>
+ <Files>
+ <File>
+ <FileName>controller_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\controller_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>pid_reset_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\pid_reset_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>sin_cos_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\sin_cos_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>pid_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\pid_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>controller_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\controller_tests\controller_test_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>FastMath</GroupName>
+ <Files>
+ <File>
+ <FileName>fast_math_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>fast_math_tests_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Filtering</GroupName>
+ <Files>
+ <File>
+ <FileName>filtering_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\filtering_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>filtering_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\filtering_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>biquad_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\biquad_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>conv_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\conv_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>correlate_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\correlate_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>fir_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\fir_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>iir_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\iir_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>lms_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\lms_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Matrix</GroupName>
+ <Files>
+ <File>
+ <FileName>matrix_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\matrix_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>matrix_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\matrix_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_cmplx_mult_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_add_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_add_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_mult_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_mult_fast_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_sub_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_inverse_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_trans_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_init_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_scale_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Statistics</GroupName>
+ <Files>
+ <File>
+ <FileName>max_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>statistics_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>statistics_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>mean_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>min_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>power_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>rms_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>std_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>var_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Support</GroupName>
+ <Files>
+ <File>
+ <FileName>copy_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>support_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>support_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>fill_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>x_to_y_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Intrinsics</GroupName>
+ <Files>
+ <File>
+ <FileName>intrinsics_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>intrinsics_tests_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>MathHelper</GroupName>
+ <Files>
+ <File>
+ <FileName>math_helper.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\math_helper.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+ <RTE>
+ <apis/>
+ <components/>
+ <files/>
+ </RTE>
+
+</Project>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/Logs/.gitignore b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM0l_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM0l_config.txt
new file mode 100644
index 0000000..8e33c76
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM0l_config.txt
@@ -0,0 +1,8 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm0ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm0ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm0ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM3l_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM3l_config.txt
new file mode 100644
index 0000000..2caf254
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM3l_config.txt
@@ -0,0 +1,8 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm3ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm3ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm3ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4l_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4l_config.txt
new file mode 100644
index 0000000..1c9fece
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4l_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm4ct.vfp-present=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
+armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm4ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm4ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm4ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4lf_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4lf_config.txt
new file mode 100644
index 0000000..eb832ed
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4lf_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
+armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm4ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm4ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm4ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7l_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7l_config.txt
new file mode 100644
index 0000000..4e591c9
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7l_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=0 # (bool , init-time) default = '1' : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfdp_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfdp_config.txt
new file mode 100644
index 0000000..1888d60
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfdp_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfsp_config.txt b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfsp_config.txt
new file mode 100644
index 0000000..1888d60
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfsp_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvoptx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvoptx
new file mode 100644
index 0000000..576bcd4
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvoptx
@@ -0,0 +1,3077 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj; *.o</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ <nMigrate>0</nMigrate>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>cortexM0l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
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+ <CSymb>0</CSymb>
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+ <OPTXL>
+ <LMap>1</LMap>
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+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
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+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
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+ <THDelay>0</THDelay>
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+ <newCpu>0</newCpu>
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+ </DebugFlag>
+ <LintExecutable></LintExecutable>
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+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
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+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM0b</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
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+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
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+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM0b\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
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+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
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+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
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+ <LineNumber>184</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
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+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
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+ <aLwin>1</aLwin>
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+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM3l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
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+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
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+ <CreateCListing>1</CreateCListing>
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+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
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+ <CpuCode>7</CpuCode>
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+ <uSim>1</uSim>
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+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=1744,166,1978,703,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
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+ <AscS1>0</AscS1>
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+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM3b</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM3b\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
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+ <CSymb>0</CSymb>
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+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
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+ <LLibSym>1</LLibSym>
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+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>184</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>184</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4b</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4b\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>184</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4lf</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4bf</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4bf\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>184</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>184</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7b</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7b\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>184</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Group>
+ <GroupName>DSP_Lib Files</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>1</GroupNumber>
+ <FileNumber>1</FileNumber>
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diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvprojx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvprojx
new file mode 100644
index 0000000..041a0aa
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvprojx
@@ -0,0 +1,10157 @@
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+ </Files>
+ </Group>
+ <Group>
+ <GroupName>MathHelper</GroupName>
+ <Files>
+ <File>
+ <FileName>math_helper.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\math_helper.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+ <RTE>
+ <apis/>
+ <components/>
+ <files/>
+ </RTE>
+
+</Project>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/Logs/.gitignore b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx
new file mode 100644
index 0000000..71442d8
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx
@@ -0,0 +1,3065 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj; *.o</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ <nMigrate>0</nMigrate>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>cortexM0l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=880,228,1280,657,0)(1007=1093,261,1280,477,0)(1008=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM0b</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM0b\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>1</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>184</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM3l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=1744,166,1978,703,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM3b</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM3b\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>184</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4b</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4b\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>184</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4lf</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>PWSTATINFO</Key>
+ <Name>200,50,700</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=151,128,395,676,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint/>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
+ <aTbox>0</aTbox>
+ <AscS1>0</AscS1>
+ <AscS2>0</AscS2>
+ <AscS3>0</AscS3>
+ <aSer3>0</aSer3>
+ <eProf>0</eProf>
+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM4bf</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM4bf\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
+ <tRwatch>0</tRwatch>
+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
+ <tRbox>0</tRbox>
+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
+ <tRSysVw>0</tRSysVw>
+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>184</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
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+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
+ <aSym>0</aSym>
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+ <AscS1>0</AscS1>
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+ <aLa>0</aLa>
+ <aPa1>0</aPa1>
+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
+ <pszMrule></pszMrule>
+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7l</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
+ <sGomain>0</sGomain>
+ <sRbreak>0</sRbreak>
+ <sRwatch>0</sRwatch>
+ <sRmem>0</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>0</sRbox>
+ <tLdApp>0</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>0</tRbreak>
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+ <tRmem>0</tRmem>
+ <tRfunc>0</tRfunc>
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+ <tRtrace>1</tRtrace>
+ <sRSysVw>0</sRSysVw>
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+ <sRunDeb>0</sRunDeb>
+ <sLrtime>0</sLrtime>
+ <bEvRecOn>1</bEvRecOn>
+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
+ <nTsel>0</nTsel>
+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>184</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
+ <aCover>0</aCover>
+ <aSer1>0</aSer1>
+ <aSer2>0</aSer2>
+ <aPa>0</aPa>
+ <viewmode>1</viewmode>
+ <vrSel>0</vrSel>
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+ <AscS4>0</AscS4>
+ <aSer4>0</aSer4>
+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
+ <LintConfigFile></LintConfigFile>
+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
+ <LntExFlags>0</LntExFlags>
+ <pMisraName></pMisraName>
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+ <pSingCmds></pSingCmds>
+ <pMultCmds></pMultCmds>
+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Target>
+ <TargetName>cortexM7b</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ <RunAbUc>0</RunAbUc>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\IntermediateFiles\cortexM7b\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
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+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
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+ <LPubSym>1</LPubSym>
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+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>0</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>7</CpuCode>
+ <DebugOpt>
+ <uSim>1</uSim>
+ <uTrg>0</uTrg>
+ <sLdApp>0</sLdApp>
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+ <bSchkAxf>0</bSchkAxf>
+ <bTchkAxf>0</bTchkAxf>
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+ <sDll></sDll>
+ <sDllPa></sDllPa>
+ <sDlgDll></sDlgDll>
+ <sDlgPa></sDlgPa>
+ <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+ <tDll></tDll>
+ <tDllPa></tDllPa>
+ <tDlgDll></tDlgDll>
+ <tDlgPa></tDlgPa>
+ <tIfile></tIfile>
+ <pMon>BIN\UL2CM3.DLL</pMon>
+ </DebugOpt>
+ <TargetDriverDllRegistry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMRTXEVENTFLAGS</Key>
+ <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>UL2CM3</Key>
+ <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>DLGDARM</Key>
+ <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+ </SetRegEntry>
+ <SetRegEntry>
+ <Number>0</Number>
+ <Key>ARMDBGFLAGS</Key>
+ <Name>-T0</Name>
+ </SetRegEntry>
+ </TargetDriverDllRegistry>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>184</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
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+ <ManyObjects>0</ManyObjects>
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+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <Tracepoint>
+ <THDelay>0</THDelay>
+ </Tracepoint>
+ <DebugFlag>
+ <trace>0</trace>
+ <periodic>1</periodic>
+ <aLwin>1</aLwin>
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+ <StkLoc>0</StkLoc>
+ <TrcWin>0</TrcWin>
+ <newCpu>0</newCpu>
+ <uProt>0</uProt>
+ </DebugFlag>
+ <LintExecutable></LintExecutable>
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+ <bLintAuto>0</bLintAuto>
+ <bAutoGenD>0</bAutoGenD>
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+ <pMisraName></pMisraName>
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+ <pSingCmds></pSingCmds>
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+ <pMisraNamep></pMisraNamep>
+ <pszMrulep></pszMrulep>
+ <pSingCmdsp></pSingCmdsp>
+ <pMultCmdsp></pMultCmdsp>
+ </TargetOption>
+ </Target>
+
+ <Group>
+ <GroupName>DSP_Lib Files</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
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+ <FileNumber>1</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
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+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c</PathWithFileName>
+ <FilenameWithoutPath>BasicMathFunctions.c</FilenameWithoutPath>
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new file mode 100644
index 0000000..5cfd9ee
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/DspLibTest_Simulator.uvprojx
@@ -0,0 +1,10157 @@
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diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/Logs/.gitignore b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/DspLibTest_Simulator.uvoptx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/DspLibTest_Simulator.uvoptx
new file mode 100644
index 0000000..a0396d8
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/DspLibTest_Simulator.uvoptx
@@ -0,0 +1,3509 @@
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+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>FastMath</GroupName>
+ <Files>
+ <File>
+ <FileName>fast_math_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>fast_math_tests_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Filtering</GroupName>
+ <Files>
+ <File>
+ <FileName>filtering_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\filtering_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>filtering_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\filtering_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>biquad_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\biquad_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>conv_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\conv_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>correlate_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\correlate_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>fir_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\fir_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>iir_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\iir_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>lms_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\filtering_tests\lms_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Matrix</GroupName>
+ <Files>
+ <File>
+ <FileName>matrix_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\matrix_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>matrix_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\matrix_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_cmplx_mult_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_add_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_add_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_mult_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_mult_fast_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_sub_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_inverse_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_trans_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_init_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>mat_scale_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Statistics</GroupName>
+ <Files>
+ <File>
+ <FileName>max_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>statistics_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>statistics_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>mean_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>min_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>power_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>rms_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>std_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>var_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Support</GroupName>
+ <Files>
+ <File>
+ <FileName>copy_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>support_test_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+ </File>
+ <File>
+ <FileName>support_test_group.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+ </File>
+ <File>
+ <FileName>fill_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>x_to_y_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Intrinsics</GroupName>
+ <Files>
+ <File>
+ <FileName>intrinsics_tests.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+ </File>
+ <File>
+ <FileName>intrinsics_tests_common_data.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>MathHelper</GroupName>
+ <Files>
+ <File>
+ <FileName>math_helper.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Common\src\math_helper.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+ <RTE>
+ <apis/>
+ <components/>
+ <files/>
+ </RTE>
+
+</Project>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/Logs/.gitignore b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvprojx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvprojx
index f98dd9e..c0b17be 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvprojx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvprojx
@@ -16,7 +16,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -338,7 +338,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -861,7 +861,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -1183,7 +1183,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -1706,7 +1706,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -2028,7 +2028,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -2551,7 +2551,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -2873,7 +2873,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -3396,7 +3396,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3718,7 +3718,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -4241,7 +4241,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -4563,7 +4563,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -5086,7 +5086,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5408,7 +5408,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -5931,7 +5931,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -6253,7 +6253,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -6776,7 +6776,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -7098,7 +7098,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -7621,7 +7621,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -7943,7 +7943,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/DspLibTest_Simulator.uvprojx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/DspLibTest_Simulator.uvprojx
index 0c64e2b..4ea731d 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/DspLibTest_Simulator.uvprojx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/DspLibTest_Simulator.uvprojx
@@ -16,7 +16,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -338,7 +338,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -861,7 +861,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -1183,7 +1183,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -1706,7 +1706,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -2028,7 +2028,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -2551,7 +2551,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -2873,7 +2873,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -3396,7 +3396,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3718,7 +3718,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -4241,7 +4241,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -4563,7 +4563,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -5086,7 +5086,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5408,7 +5408,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -5931,7 +5931,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -6253,7 +6253,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -6776,7 +6776,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -7098,7 +7098,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -7621,7 +7621,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -7943,7 +7943,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Cads>
<Aads>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvoptx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvoptx
index bf23a77..b703132 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvoptx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvoptx
@@ -75,7 +75,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
- <IsCurrentTarget>0</IsCurrentTarget>
+ <IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>
@@ -1399,7 +1399,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
- <IsCurrentTarget>1</IsCurrentTarget>
+ <IsCurrentTarget>0</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvprojx b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvprojx
index 9e42813..564f2ef 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvprojx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvprojx
@@ -15,7 +15,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -242,7 +242,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -741,7 +741,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -968,7 +968,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -1467,7 +1467,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -1694,7 +1694,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -2193,7 +2193,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -2420,7 +2420,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -2919,7 +2919,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3146,7 +3146,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -3645,7 +3645,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3872,7 +3872,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -4371,7 +4371,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -4598,7 +4598,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -5097,7 +5097,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5324,7 +5324,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -5823,7 +5823,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -6050,7 +6050,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -6549,7 +6549,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev57</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -6776,7 +6776,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
</VariousControls>
</Carm>
<Aarm>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/HowTo.txt b/CMSIS/DSP/DSP_Lib_TestSuite/HowTo.txt
index 1e51404..41ca5a6 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/HowTo.txt
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/HowTo.txt
@@ -1,4 +1,4 @@
-HowTo DSP_Lib_TestSuite 16.12.2016
+HowTo DSP_Lib_TestSuite 18.02.2019
=======================================
This file describes the folder structure, content, prerequisites and instructions to validate the
@@ -34,17 +34,10 @@
Setup
------
- - Copy DSP_Lib_TestSuite to the CMSIS installation/pack folder.
- ...
- .\Keil_v5\ARM\PACK\ARM\CMSIS\DSP_Lib
- .\Keil_v5\ARM\PACK\ARM\CMSIS\DSP_Lib_TestSuite <- location of DSP_Lib_TestSuite
- .\Keil_v5\ARM\PACK\ARM\CMSIS\Include
- ...
-
- - remove 'read-only' tag from folder ./CMSIS/Lib
+ - remove 'read-only' tag from folder .\CMSIS\DSP\Lib
(required for rebuild of the DSP_Lib libraries)
- - open a Windows command window in folder .\CMSIS\DSP_Lib_TestSuite.
+ - open a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite.
@@ -54,23 +47,23 @@
a) build the DSP_Lib libraries:
- batch file: buildDspLibs.bat
Note: only require if the DSP_Lib source code got updated or the desired configuration is missing
- buildDspLibs.bat overwrites the prebuild libraries in .\CMSIS\Lib.
- Log files of the build process are generated in folder .\CMSIS\DSP_Lib/[ARM|GCC]
- - run: buildDspLibs.bat in a Windows command window in folder ./CMSIS/DSP_Lib_TestSuite
+ buildDspLibs.bat overwrites the prebuild libraries in .\CMSIS\DSP\Lib.
+ Log files of the build process are generated in folder .\CMSIS\DSP\DSP_Lib/[ARM|GCC]
+ - run: buildDspLibs.bat in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite
buildDspLibs ARM -> builds the ARMCC libraries
buildDspLibs GCC -> builds the GCC libraries
b) build the reference libraries:
- batch file: buildRefLibs.bat
- Log files of the build process are generated in folder .\CMSIS\DSP_Lib_TestSuite\RefLibs/[ARM|GCC]
- - run: buildRefLibs.bat in a Windows command window in folder .\CMSIS\DSP_Lib_TestSuite
+ Log files of the build process are generated in folder .\CMSIS\DSP\DSP_Lib_TestSuite\RefLibs/[ARM|GCC]
+ - run: buildRefLibs.bat in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite
buildRefLibs ARM -> builds the ARMCC reference libraries
buildRefLibs GCC -> builds the GCC reference libraries
c) running an individual test using uVision (MDK-ARM):
- batch file: runTest.bat
- - run: runTest.bat in a Windows command window in folder .\CMSIS\DSP_Lib_TestSuite
+ - run: runTest.bat in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite
runTest -> prints usage information
e.g. runTest ARM cortexM4lf Simulator -> runs the test for toolchain ARM, Cortex-M4 littel endian with FPU, uVision Simulator.
@@ -78,7 +71,7 @@
d) parsing the test output log file
- script: parseLog.py
- - run: parseLog.py python script in a Windows command window in folder .\CMSIS\DSP_Lib_TestSuite
+ - run: parseLog.py python script in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite
command line options should match the invocation of the runTest executed before.
e.g: runTest ARM cortexM4lf Simulator -> python parseLog.py ARM cortexM4lf Simulator
@@ -118,15 +111,15 @@
How to select tests for "run all tests"
----------------------------------------
- - edit .\CMSIS\DSP_Lib_TestSuite\Common\src\all_tests.c
+ - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\all_tests.c
comment out all unwanted test groups.
e.g. // JTEST_GROUP_CALL(complex_math_tests);
- - edit .\CMSIS\DSP_Lib_TestSuite\Common\src\<test group>/<test group>_group.c
+ - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\<test group>/<test group>_group.c
comment out all unwanted sub test groups.
e.g. file .\DSP_Lib_TestSuite\Common\src\basic_math_tests\basic_math_test_group.c -> // JTEST_GROUP_CALL(abs_tests);
- - edit .\CMSIS\DSP_Lib_TestSuite\Common\src\<test group>/<test>_tests.c
+ - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\<test group>/<test>_tests.c
comment out all unwanted tests.
e.g. file .\DSP_Lib_TestSuite\Common\src\basic_math_tests\abs_tests.c -> // JTEST_TEST_CALL(arm_abs_f32_test);
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/HowTo_SV.txt b/CMSIS/DSP/DSP_Lib_TestSuite/HowTo_SV.txt
new file mode 100644
index 0000000..ccf7531
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/HowTo_SV.txt
@@ -0,0 +1,117 @@
+HowTo DSP_Lib_TestSuite (Source Variant) 18.02.2019
+======================================================
+
+This file describes the folder structure, content, prerequisites and instructions to validate the
+build of the CMSIS-DSP library. This is done by processing input data sets using the DSP Library
+functions executing on a target simulator or hardware. The output data sets are then compared
+with the reference data set produced by unoptimized DSP functions and a Signal to Noise Ratio (SNR)
+is computed. If the SNR is below a defined threshold the test is considered "passed".
+
+
+Folder structure
+----------------
+ .\DSP_Lib_TestSuite Batch files for building the reference libraries and running the tests.
+ .\DSP_Lib_TestSuite\Common
+ .\DSP_Lib_TestSuite\Common\inc DSP_Lib test include files
+ .\DSP_Lib_TestSuite\Common\JTest JTEST Test Framework + INI files for uVision
+ .\DSP_Lib_TestSuite\Common\platform ARM/GCC device startup/system files
+ .\DSP_Lib_TestSuite\Common\src DSP_Lib test source files
+ .\DSP_Lib_TestSuite\DspLibTest_FVP ARM/GCC DSP_Lib test projects for Fixed Virtual Platforms
+ .\DSP_Lib_TestSuite\DspLibTest_MPS2 ARM/GCC DSP_Lib test projects for MPS2
+ .\DSP_Lib_TestSuite\DspLibTest_Simulator ARM/GCC DSP_Lib test projects for uVision simulator
+ .\DSP_Lib_TestSuite\RefLibs ARM/GCC DSP_Lib reference libraries (and projects)
+
+
+
+Prerequisites
+--------------
+ - Python (running on Windows). Tested with ActivePython 2.7.8.10.
+ - Keil MDK-ARM (tested with MDK-ARM 5.22: http://www2.keil.com/mdk5)
+ - ULINKpro debug adapter (http://www2.keil.com/mdk5/ulink)
+ - MPS2 (Cortex-M Prototyping System:https://www.arm.com/products/tools/development-boards/versatile-express/cortex-m-prototyping-system.php)
+ - CMSIS 5.0.0 (https://github.com/ARM-software/CMSIS_5/releases/tag/5.0.0)
+
+
+Setup
+------
+ - open a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite.
+
+
+
+How to run the tests
+---------------------
+
+a) running an individual test using uVision (MDK-ARM):
+ - batch file: runTest_SV.bat
+ - run: runTest_SV.bat in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite
+ runTest_SV -> prints usage information
+ e.g. runTest_SV ARM cortexM4lf Simulator -> runs the test for toolchain ARM, Cortex-M4 littel endian with FPU, uVision Simulator.
+
+ Tests running on MPS2 requires additional steps to setup. See section 'MPS2'.
+
+d) parsing the test output log file
+ - script: parseLog_SV.py
+ - run: parseLog_SV.py python script in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite
+ command line options should match the invocation of the runTest executed before.
+ e.g: runTest ARM cortexM4lf Simulator -> python parseLog.py ARM cortexM4lf Simulator
+
+ - check the test log
+ depending on your test parameters change into the required folder
+ .\DSP_Lib_TestSuite\DspLibTest_[FVP|MPS2|Simulator]\[ARM|GCC]\Logs
+ the folder will contain the following files (e.g. for a 'runTest') :
+ DspLibTest_Simulator.log raw result of the last test run.
+ DspLibTest_Simulator_cortexM4lf.log raw result of a cortexM4lf test run
+ DspLibTest_Simulator_cortexM4lf_build.log build result of cortexM4lf test
+ DspLibTest_Simulator_cortexM4lf_parsed.log parsed log of raw result of a cortexM4lf test run
+ DspLibTest_Simulator_cortexM4lf_time.log log how long the test took (some tests e.g. M0 take really a long time!).
+ 'runTest' produces files of the format: DspLibTest_<test>_<core>...
+
+
+Differences between the tests for FVP, MPS2, Simulator
+------------------------------------------------------
+ - all tests are identical except for:
+ 'Simulator' uses uVision with uVision simulator and generates also code coverage information
+ can be used for little/big endian tests
+ ! do not use 'Simulator' for M7 with FPU -> no uVision simulation available.
+ ! do not use 'Simulator' for ARMv8-M devices -> no uVision simulation available.
+ 'MPS2' uses uVision with ULINKpro debugger and MPS2. No code coverage information is generated.
+ can be used for little endian only (because of the lack of MPS2 FPGA images).
+ 'FVP' uses uVision with Models debugger. No code coverage information is generated.
+ can be used for little/big endian tests.
+ ! config files must be prepared.
+ ! uVision target for big endianess are not yet prepared.
+
+
+Setup 'MPS2'
+-------------
+ - load the appropriate FPGA image to the MPS2 board matching the CPU of the test builds prior to running the test
+ - check if ULINKpro can connect with the configured debug connection (JTAG or SWD) as this must
+ match the protocol implemented in the FPGA image.
+
+
+How to select tests for "run all tests"
+----------------------------------------
+ - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\all_tests.c
+ comment out all unwanted test groups.
+ e.g. // JTEST_GROUP_CALL(complex_math_tests);
+
+ - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\<test group>/<test group>_group.c
+ comment out all unwanted sub test groups.
+ e.g. file .\DSP_Lib_TestSuite\Common\src\basic_math_tests\basic_math_test_group.c -> // JTEST_GROUP_CALL(abs_tests);
+
+ - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\<test group>/<test>_tests.c
+ comment out all unwanted tests.
+ e.g. file .\DSP_Lib_TestSuite\Common\src\basic_math_tests\abs_tests.c -> // JTEST_TEST_CALL(arm_abs_f32_test);
+
+
+Notes
+-----
+ - How to use ARM Clang (ARM Compiler 6):
+ in uVision 'Options for Target' tab you can select which compiler to use
+ by default uVision uses ARMCC V5 for Cortex-M devices and ARMCLANG V6 only for ARMv8M.
+ Only ARMv8M cores have been tested using ARMCLANG
+
+ - test data used for the tests is used as provided by DSP Concepts.
+
+ - some tests run for a very long time before they finish. This is expected
+
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvprojx b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvprojx
index 14f3695..4cd53ae 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvprojx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvprojx
@@ -16,7 +16,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -338,7 +338,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -721,7 +721,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -1043,7 +1043,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -1426,7 +1426,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -1748,7 +1748,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -2131,7 +2131,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -2453,7 +2453,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -2836,7 +2836,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3158,7 +3158,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -3541,7 +3541,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3863,7 +3863,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -4246,7 +4246,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -4568,7 +4568,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -4951,7 +4951,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5273,7 +5273,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -5656,7 +5656,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5978,7 +5978,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -6361,7 +6361,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -6683,7 +6683,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -7066,7 +7066,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -7388,7 +7388,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -7771,7 +7771,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -8093,7 +8093,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -8476,7 +8476,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -8798,7 +8798,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -9181,7 +9181,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -9503,7 +9503,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -9886,7 +9886,7 @@
<TargetCommonOption>
<Device>ARMv8MBL</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -10208,7 +10208,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -10591,7 +10591,7 @@
<TargetCommonOption>
<Device>ARMv8MML</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -10913,7 +10913,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -11296,7 +11296,7 @@
<TargetCommonOption>
<Device>ARMv8MML_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -11618,7 +11618,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -12001,7 +12001,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -12323,7 +12323,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -12706,7 +12706,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -13028,7 +13028,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -13411,7 +13411,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -13733,7 +13733,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -14116,7 +14116,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -14438,7 +14438,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/RefLibs.uvprojx b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/RefLibs.uvprojx
index 611bf07..ee20804 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/RefLibs.uvprojx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/RefLibs.uvprojx
@@ -10,13 +10,13 @@
<TargetName>cortexM0l</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
- <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+ <pCCUsed>6110000::V6.11::.\ARMCLANG</pCCUsed>
<uAC6>1</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -338,7 +338,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -721,7 +721,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -1043,7 +1043,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -1426,7 +1426,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -1748,7 +1748,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -2131,7 +2131,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -2453,7 +2453,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -2836,7 +2836,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3158,7 +3158,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -3541,7 +3541,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3863,7 +3863,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -4246,7 +4246,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -4568,7 +4568,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -4951,7 +4951,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5273,7 +5273,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -5656,7 +5656,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5978,7 +5978,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -6361,7 +6361,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -6683,7 +6683,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -7066,7 +7066,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -7388,7 +7388,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -7771,7 +7771,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -8093,7 +8093,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -8476,7 +8476,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -8798,7 +8798,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -9181,7 +9181,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -9503,7 +9503,7 @@
<MiscControls></MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -9886,7 +9886,7 @@
<TargetCommonOption>
<Device>ARMv8MBL</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -10208,7 +10208,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -10591,7 +10591,7 @@
<TargetCommonOption>
<Device>ARMv8MML</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -10913,7 +10913,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -11296,7 +11296,7 @@
<TargetCommonOption>
<Device>ARMv8MML_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -11618,7 +11618,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -12001,7 +12001,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -12323,7 +12323,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -12706,7 +12706,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -13028,7 +13028,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -13411,7 +13411,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -13733,7 +13733,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -14116,7 +14116,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -14438,7 +14438,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvprojx b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvprojx
index 0a3e4d4..c9f78a0 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvprojx
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvprojx
@@ -15,7 +15,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -242,7 +242,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -613,7 +613,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -840,7 +840,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -1211,7 +1211,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -1438,7 +1438,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -1809,7 +1809,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -2036,7 +2036,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -2407,7 +2407,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -2634,7 +2634,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -3005,7 +3005,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3232,7 +3232,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -3603,7 +3603,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3830,7 +3830,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -4201,7 +4201,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -4428,7 +4428,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -4799,7 +4799,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5026,7 +5026,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -5397,7 +5397,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5624,7 +5624,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -5995,7 +5995,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -6222,7 +6222,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -6593,7 +6593,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -6820,7 +6820,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -7191,7 +7191,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -7418,7 +7418,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -7789,7 +7789,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -8016,7 +8016,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define>ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -8387,7 +8387,7 @@
<TargetCommonOption>
<Device>ARMv8MBL</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -8614,7 +8614,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.base</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -8985,7 +8985,7 @@
<TargetCommonOption>
<Device>ARMv8MML</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -9212,7 +9212,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -9583,7 +9583,7 @@
<TargetCommonOption>
<Device>ARMv8MML_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -9810,7 +9810,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -10181,7 +10181,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -10408,7 +10408,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -10779,7 +10779,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -11006,7 +11006,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -11377,7 +11377,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -11604,7 +11604,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
@@ -11975,7 +11975,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -12202,7 +12202,7 @@
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
<Define></Define>
<Undefine></Undefine>
- <IncludePath>..\inc;..\..\..\Include</IncludePath>
+ <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
</VariousControls>
</Carm>
<Aarm>
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/BasicMathFunctions.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/BasicMathFunctions.c
new file mode 100644
index 0000000..3f4dfbc
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/BasicMathFunctions.c
@@ -0,0 +1,11 @@
+
+#include "abs.c"
+#include "add.c"
+#include "dot_prod.c"
+#include "mult.c"
+#include "negate.c"
+#include "offset.c"
+#include "scale.c"
+#include "shift.c"
+#include "sub.c"
+
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/ComplexMathFunctions.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/ComplexMathFunctions.c
new file mode 100644
index 0000000..4db36be
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/ComplexMathFunctions.c
@@ -0,0 +1,8 @@
+
+#include "cmplx_conj.c"
+#include "cmplx_dot_prod.c"
+#include "cmplx_mag.c"
+#include "cmplx_mag_squared.c"
+#include "cmplx_mult_cmplx.c"
+#include "cmplx_mult_real.c"
+
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/ControllerFunctions/ControllerFunctions.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/ControllerFunctions/ControllerFunctions.c
new file mode 100644
index 0000000..0c39953
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/ControllerFunctions/ControllerFunctions.c
@@ -0,0 +1,4 @@
+
+#include "pid.c"
+#include "sin_cos.c"
+
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FastMathFunctions/FastMathFunctions.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FastMathFunctions/FastMathFunctions.c
new file mode 100644
index 0000000..bc59cb4
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FastMathFunctions/FastMathFunctions.c
@@ -0,0 +1,5 @@
+
+#include "cos.c"
+#include "sin.c"
+#include "sqrt.c"
+
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/FilteringFunctions.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/FilteringFunctions.c
new file mode 100644
index 0000000..8faec35
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/FilteringFunctions.c
@@ -0,0 +1,12 @@
+
+#include "biquad.c"
+#include "conv.c"
+#include "correlate.c"
+#include "fir.c"
+#include "fir_decimate.c"
+#include "fir_interpolate.c"
+#include "fir_lattice.c"
+#include "fir_sparse.c"
+#include "iir_lattice.c"
+#include "lms.c"
+
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/biquad.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/biquad.c
index c340deb..1eb7667 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/biquad.c
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/biquad.c
@@ -6,15 +6,15 @@
float32_t * pDst,
uint32_t blockSize)
{
- float32_t *pIn = pSrc; /* source pointer */
- float32_t *pOut = pDst; /* destination pointer */
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */
- float32_t acc; /* accumulator */
- float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
- float32_t Xn; /* temporary input */
- float32_t d1, d2; /* state variables */
- uint32_t sample, stage = S->numStages; /* loop counters */
+ float32_t *pIn = pSrc; /* source pointer */
+ float32_t *pOut = pDst; /* destination pointer */
+ float32_t *pState = S->pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */
+ float32_t acc; /* accumulator */
+ float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ float32_t Xn; /* temporary input */
+ float32_t d1, d2; /* state variables */
+ uint32_t sample, stage = S->numStages; /* loop counters */
do
{
@@ -72,19 +72,19 @@
void ref_biquad_cascade_stereo_df2T_f32(
const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- float32_t *pIn = pSrc; /* source pointer */
- float32_t *pOut = pDst; /* destination pointer */
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */
- float32_t acc1a, acc1b; /* accumulator */
- float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
- float32_t Xn1a, Xn1b; /* temporary input */
- float32_t d1a, d2a, d1b, d2b; /* state variables */
- uint32_t sample, stage = S->numStages; /* loop counters */
+ float32_t *pIn = pSrc; /* source pointer */
+ float32_t *pOut = pDst; /* destination pointer */
+ float32_t *pState = S->pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */
+ float32_t acc1a, acc1b; /* accumulator */
+ float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ float32_t Xn1a, Xn1b; /* temporary input */
+ float32_t d1a, d2a, d1b, d2b; /* state variables */
+ uint32_t sample, stage = S->numStages; /* loop counters */
do
{
@@ -220,19 +220,19 @@
void ref_biquad_cascade_df1_f32(
const arm_biquad_casd_df1_inst_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- float32_t *pIn = pSrc; /* source pointer */
- float32_t *pOut = pDst; /* destination pointer */
- float32_t *pState = S->pState; /* pState pointer */
- float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */
- float32_t acc; /* Simulates the accumulator */
- float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
- float32_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */
- float32_t Xn; /* temporary input */
- uint32_t sample, stage = S->numStages; /* loop counters */
+ float32_t *pIn = pSrc; /* source pointer */
+ float32_t *pOut = pDst; /* destination pointer */
+ float32_t *pState = S->pState; /* pState pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */
+ float32_t acc; /* Simulates the accumulator */
+ float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ float32_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */
+ float32_t Xn; /* temporary input */
+ uint32_t sample, stage = S->numStages; /* loop counters */
do
{
@@ -302,24 +302,24 @@
void ref_biquad_cas_df1_32x64_q31(
const arm_biquad_cas_df1_32x64_ins_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pIn = pSrc; /* input pointer initialization */
- q31_t *pOut = pDst; /* output pointer initialization */
- q63_t *pState = S->pState; /* state pointer initialization */
- q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */
- q63_t acc; /* accumulator */
- q31_t Xn1, Xn2; /* Input Filter state variables */
- q63_t Yn1, Yn2; /* Output Filter state variables */
- q31_t b0, b1, b2, a1, a2; /* Filter coefficients */
- q31_t Xn; /* temporary input */
- int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */
- uint32_t sample, stage = S->numStages; /* loop counters */
- q31_t acc_l, acc_h; /* temporary output */
- uint32_t uShift = ((uint32_t) S->postShift + 1U);
- uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */
+ q31_t *pIn = pSrc; /* input pointer initialization */
+ q31_t *pOut = pDst; /* output pointer initialization */
+ q63_t *pState = S->pState; /* state pointer initialization */
+ const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */
+ q63_t acc; /* accumulator */
+ q31_t Xn1, Xn2; /* Input Filter state variables */
+ q63_t Yn1, Yn2; /* Output Filter state variables */
+ q31_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ q31_t Xn; /* temporary input */
+ int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */
+ uint32_t sample, stage = S->numStages; /* loop counters */
+ q31_t acc_l, acc_h; /* temporary output */
+ uint32_t uShift = ((uint32_t) S->postShift + 1U);
+ uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */
do
{
@@ -395,17 +395,17 @@
q31_t * pDst,
uint32_t blockSize)
{
- q63_t acc; /* accumulator */
- uint32_t uShift = ((uint32_t) S->postShift + 1U);
- uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */
- q31_t *pIn = pSrc; /* input pointer initialization */
- q31_t *pOut = pDst; /* output pointer initialization */
- q31_t *pState = S->pState; /* pState pointer initialization */
- q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */
- q31_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */
- q31_t b0, b1, b2, a1, a2; /* Filter coefficients */
- q31_t Xn; /* temporary input */
- uint32_t sample, stage = S->numStages; /* loop counters */
+ q63_t acc; /* accumulator */
+ uint32_t uShift = ((uint32_t) S->postShift + 1U);
+ uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */
+ q31_t *pIn = pSrc; /* input pointer initialization */
+ q31_t *pOut = pDst; /* output pointer initialization */
+ q31_t *pState = S->pState; /* pState pointer initialization */
+ const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */
+ q31_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */
+ q31_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ q31_t Xn; /* temporary input */
+ uint32_t sample, stage = S->numStages; /* loop counters */
do
{
@@ -490,16 +490,16 @@
q31_t * pDst,
uint32_t blockSize)
{
- q31_t acc = 0; /* accumulator */
- q31_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */
- q31_t b0, b1, b2, a1, a2; /* Filter coefficients */
- q31_t *pIn = pSrc; /* input pointer initialization */
- q31_t *pOut = pDst; /* output pointer initialization */
- q31_t *pState = S->pState; /* pState pointer initialization */
- q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */
- q31_t Xn; /* temporary input */
- int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */
- uint32_t sample, stage = S->numStages; /* loop counters */
+ q31_t acc = 0; /* accumulator */
+ q31_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */
+ q31_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ q31_t *pIn = pSrc; /* input pointer initialization */
+ q31_t *pOut = pDst; /* output pointer initialization */
+ q31_t *pState = S->pState; /* pState pointer initialization */
+ const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */
+ q31_t Xn; /* temporary input */
+ int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */
+ uint32_t sample, stage = S->numStages; /* loop counters */
do
{
@@ -568,16 +568,16 @@
q15_t * pDst,
uint32_t blockSize)
{
- q15_t *pIn = pSrc; /* Source pointer */
- q15_t *pOut = pDst; /* Destination pointer */
- q15_t b0, b1, b2, a1, a2; /* Filter coefficients */
- q15_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */
- q15_t Xn; /* temporary input */
- q31_t acc; /* Accumulator */
- int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */
+ q15_t *pIn = pSrc; /* Source pointer */
+ q15_t *pOut = pDst; /* Destination pointer */
+ q15_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ q15_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */
+ q15_t Xn; /* temporary input */
+ q31_t acc; /* Accumulator */
+ int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */
do
{
@@ -643,16 +643,16 @@
q15_t * pDst,
uint32_t blockSize)
{
- q15_t *pIn = pSrc; /* Source pointer */
- q15_t *pOut = pDst; /* Destination pointer */
- q15_t b0, b1, b2, a1, a2; /* Filter coefficients */
- q15_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */
- q15_t Xn; /* temporary input */
- q63_t acc; /* Accumulator */
- int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */
+ q15_t *pIn = pSrc; /* Source pointer */
+ q15_t *pOut = pDst; /* Destination pointer */
+ q15_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ q15_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */
+ q15_t Xn; /* temporary input */
+ q63_t acc; /* Accumulator */
+ int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */
do
{
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir.c
index 8a7a90c..40ab773 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir.c
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir.c
@@ -2,16 +2,16 @@
void ref_fir_f32(
const arm_fir_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- float32_t *pStateCurnt; /* Points to the current sample of the state */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t i; /* Loop counters */
- float32_t acc;
+ float32_t *pState = S->pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t *pStateCurnt; /* Points to the current sample of the state */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t i; /* Loop counters */
+ float32_t acc;
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
@@ -56,16 +56,16 @@
void ref_fir_q31(
const arm_fir_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pState = S->pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *pStateCurnt; /* Points to the current sample of the state */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t i; /* Loop counters */
- q63_t acc;
+ q31_t *pState = S->pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *pStateCurnt; /* Points to the current sample of the state */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t i; /* Loop counter */
+ q63_t acc;
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
@@ -110,16 +110,16 @@
void ref_fir_fast_q31(
const arm_fir_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pState = S->pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *pStateCurnt; /* Points to the current sample of the state */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t i; /* Loop counters */
- q31_t acc;
+ q31_t *pState = S->pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *pStateCurnt; /* Points to the current sample of the state */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t i; /* Loop counter */
+ q31_t acc;
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
@@ -164,16 +164,16 @@
void ref_fir_q15(
const arm_fir_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t i; /* Loop counters */
- q63_t acc;
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCurnt; /* Points to the current sample of the state */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t i; /* Loop counter */
+ q63_t acc;
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
@@ -218,16 +218,16 @@
void ref_fir_fast_q15(
const arm_fir_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t i; /* Loop counters */
- q31_t acc;
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCurnt; /* Points to the current sample of the state */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t i; /* Loop counter */
+ q31_t acc;
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
@@ -272,16 +272,16 @@
void ref_fir_q7(
const arm_fir_instance_q7 * S,
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize)
+ q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize)
{
- q7_t *pState = S->pState; /* State pointer */
- q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q7_t *pStateCurnt; /* Points to the current sample of the state */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t i; /* Loop counters */
- q31_t acc;
+ q7_t *pState = S->pState; /* State pointer */
+ const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q7_t *pStateCurnt; /* Points to the current sample of the state */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t i; /* Loop counter */
+ q31_t acc;
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_decimate.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_decimate.c
index 9ef1e5e..fc82124 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_decimate.c
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_decimate.c
@@ -6,13 +6,13 @@
float32_t * pDst,
uint32_t blockSize)
{
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- float32_t *pStateCurnt; /* Points to the current sample of the state */
- float32_t sum0; /* Accumulator */
- float32_t x0, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t i, blkCnt; /* Loop counters */
+ float32_t *pState = S->pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t *pStateCurnt; /* Points to the current sample of the state */
+ float32_t sum0; /* Accumulator */
+ float32_t x0, c0; /* Temporary variables to hold state and coefficient values */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t i, blkCnt; /* Loop counters */
/* S->pState buffer contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
@@ -82,13 +82,13 @@
q31_t * pDst,
uint32_t blockSize)
{
- q31_t *pState = S->pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *pStateCurnt; /* Points to the current sample of the state */
- q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
- q63_t sum0; /* Accumulator */
- uint32_t numTaps = S->numTaps; /* Number of taps */
- uint32_t i, blkCnt; /* Loop counters */
+ q31_t *pState = S->pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *pStateCurnt; /* Points to the current sample of the state */
+ q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
+ q63_t sum0; /* Accumulator */
+ uint32_t numTaps = S->numTaps; /* Number of taps */
+ uint32_t i, blkCnt; /* Loop counters */
/* S->pState buffer contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
@@ -159,13 +159,13 @@
q31_t * pDst,
uint32_t blockSize)
{
- q31_t *pState = S->pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *pStateCurnt; /* Points to the current sample of the state */
- q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
- q31_t sum0; /* Accumulator */
- uint32_t numTaps = S->numTaps; /* Number of taps */
- uint32_t i, blkCnt; /* Loop counters */
+ q31_t *pState = S->pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *pStateCurnt; /* Points to the current sample of the state */
+ q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
+ q31_t sum0; /* Accumulator */
+ uint32_t numTaps = S->numTaps; /* Number of taps */
+ uint32_t i, blkCnt; /* Loop counters */
/* S->pState buffer contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
@@ -236,13 +236,13 @@
q15_t * pDst,
uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
- q63_t sum0; /* Accumulator */
- uint32_t numTaps = S->numTaps; /* Number of taps */
- uint32_t i, blkCnt; /* Loop counters */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCurnt; /* Points to the current sample of the state */
+ q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
+ q63_t sum0; /* Accumulator */
+ uint32_t numTaps = S->numTaps; /* Number of taps */
+ uint32_t i, blkCnt; /* Loop counters */
/* S->pState buffer contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
@@ -313,13 +313,13 @@
q15_t * pDst,
uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q15_t x0, c0; /* Temporary variables to hold state and coefficient values */
- q31_t sum0; /* Accumulator */
- uint32_t numTaps = S->numTaps; /* Number of taps */
- uint32_t i, blkCnt; /* Loop counters */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCurnt; /* Points to the current sample of the state */
+ q15_t x0, c0; /* Temporary variables to hold state and coefficient values */
+ q31_t sum0; /* Accumulator */
+ uint32_t numTaps = S->numTaps; /* Number of taps */
+ uint32_t i, blkCnt; /* Loop counters */
/* S->pState buffer contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_interpolate.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_interpolate.c
index 4cb52eb..bfc5c09 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_interpolate.c
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_interpolate.c
@@ -2,17 +2,18 @@
void ref_fir_interpolate_f32(
const arm_fir_interpolate_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- float32_t *pStateCurnt; /* Points to the current sample of the state */
- float32_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
- float32_t sum; /* Accumulator */
- uint32_t i, blkCnt; /* Loop counters */
- uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */
+ float32_t *pState = S->pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t *pStateCurnt; /* Points to the current sample of the state */
+ float32_t *ptr1; /* Temporary pointer for state buffer */
+ const float32_t *ptr2; /* Temporary pointer for coefficient buffer */
+ float32_t sum; /* Accumulator */
+ uint32_t i, blkCnt; /* Loop counters */
+ uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
@@ -93,21 +94,19 @@
void ref_fir_interpolate_q31(
const arm_fir_interpolate_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pState = S->pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *pStateCurnt; /* Points to the current sample of the state */
- q31_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
-
- /* Run the below code for Cortex-M0 */
-
- q63_t sum; /* Accumulator */
- q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t i, blkCnt; /* Loop counters */
- uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */
+ q31_t *pState = S->pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *pStateCurnt; /* Points to the current sample of the state */
+ q31_t *ptr1; /* Temporary pointer for state buffer */
+ const q31_t *ptr2; /* Temporary pointer for coefficient buffer */
+ q63_t sum; /* Accumulator */
+ q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
+ uint32_t i, blkCnt; /* Loop counters */
+ uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
@@ -194,18 +193,19 @@
void ref_fir_interpolate_q15(
const arm_fir_interpolate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q15_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
- q63_t sum; /* Accumulator */
- q15_t x0, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t i, blkCnt, tapCnt; /* Loop counters */
- uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCurnt; /* Points to the current sample of the state */
+ q15_t *ptr1; /* Temporary pointer for state buffer */
+ const q15_t *ptr2; /* Temporary pointer for coefficient buffer */
+ q63_t sum; /* Accumulator */
+ q15_t x0, c0; /* Temporary variables to hold state and coefficient values */
+ uint32_t i, blkCnt, tapCnt; /* Loop counters */
+ uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_lattice.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_lattice.c
index b7178a7..efaa44a 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_lattice.c
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_lattice.c
@@ -2,17 +2,17 @@
void ref_fir_lattice_f32(
const arm_fir_lattice_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- float32_t *pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- float32_t *px; /* temporary state pointer */
- float32_t *pk; /* temporary coefficient pointer */
- float32_t fcurr, fnext, gcurr, gnext; /* temporary variables */
- uint32_t numStages = S->numStages; /* Length of the filter */
- uint32_t blkCnt, stageCnt; /* temporary variables for counts */
+ float32_t *pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t *px; /* temporary state pointer */
+ const float32_t *pk; /* temporary coefficient pointer */
+ float32_t fcurr, fnext, gcurr, gnext; /* temporary variables */
+ uint32_t numStages = S->numStages; /* Length of the filter */
+ uint32_t blkCnt, stageCnt; /* temporary variables for counts */
pState = &S->pState[0];
@@ -78,17 +78,17 @@
void ref_fir_lattice_q31(
const arm_fir_lattice_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *px; /* temporary state pointer */
- q31_t *pk; /* temporary coefficient pointer */
- q31_t fcurr, fnext, gcurr, gnext; /* temporary variables */
- uint32_t numStages = S->numStages; /* Length of the filter */
- uint32_t blkCnt, stageCnt; /* temporary variables for counts */
+ q31_t *pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *px; /* temporary state pointer */
+ const q31_t *pk; /* temporary coefficient pointer */
+ q31_t fcurr, fnext, gcurr, gnext; /* temporary variables */
+ uint32_t numStages = S->numStages; /* Length of the filter */
+ uint32_t blkCnt, stageCnt; /* temporary variables for counts */
pState = &S->pState[0];
@@ -155,17 +155,17 @@
void ref_fir_lattice_q15(
const arm_fir_lattice_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *px; /* temporary state pointer */
- q15_t *pk; /* temporary coefficient pointer */
- q31_t fcurnt, fnext, gcurnt, gnext; /* temporary variables */
- uint32_t numStages = S->numStages; /* Length of the filter */
- uint32_t blkCnt, stageCnt; /* temporary variables for counts */
+ q15_t *pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *px; /* temporary state pointer */
+ const q15_t *pk; /* temporary coefficient pointer */
+ q31_t fcurnt, fnext, gcurnt, gnext; /* temporary variables */
+ uint32_t numStages = S->numStages; /* Length of the filter */
+ uint32_t blkCnt, stageCnt; /* temporary variables for counts */
pState = &S->pState[0];
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_sparse.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_sparse.c
index 11e79f9..060128f 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_sparse.c
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_sparse.c
@@ -1,24 +1,24 @@
#include "ref.h"
void ref_fir_sparse_f32(
- arm_fir_sparse_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- float32_t * pScratchIn,
- uint32_t blockSize)
+ arm_fir_sparse_instance_f32 * S,
+ float32_t * pSrc,
+ float32_t * pDst,
+ float32_t * pScratchIn,
+ uint32_t blockSize)
{
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- float32_t *px; /* Scratch buffer pointer */
- float32_t *py = pState; /* Temporary pointers for state buffer */
- float32_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
- float32_t *pOut; /* Destination pointer */
- int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
- uint32_t delaySize = S->maxDelay + blockSize; /* state length */
- uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- int32_t readIndex; /* Read index of the state buffer */
- uint32_t tapCnt, blkCnt; /* loop counters */
- float32_t coeff = *pCoeffs++; /* Read the first coefficient value */
+ float32_t *pState = S->pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t *px; /* Scratch buffer pointer */
+ float32_t *py = pState; /* Temporary pointers for state buffer */
+ float32_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
+ float32_t *pOut; /* Destination pointer */
+ int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
+ uint32_t delaySize = S->maxDelay + blockSize; /* state length */
+ uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ int32_t readIndex; /* Read index of the state buffer */
+ uint32_t tapCnt, blkCnt; /* loop counters */
+ float32_t coeff = *pCoeffs++; /* Read the first coefficient value */
/* BlockSize of Input samples are copied into the state buffer */
@@ -110,26 +110,26 @@
}
void ref_fir_sparse_q31(
- arm_fir_sparse_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- q31_t * pScratchIn,
- uint32_t blockSize)
+ arm_fir_sparse_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ q31_t * pScratchIn,
+ uint32_t blockSize)
{
- q31_t *pState = S->pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *px; /* Scratch buffer pointer */
- q31_t *py = pState; /* Temporary pointers for state buffer */
- q31_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
- q31_t *pOut; /* Destination pointer */
- q63_t out; /* Temporary output variable */
- int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
- uint32_t delaySize = S->maxDelay + blockSize; /* state length */
- uint16_t numTaps = S->numTaps; /* Filter order */
- int32_t readIndex; /* Read index of the state buffer */
- uint32_t tapCnt, blkCnt; /* loop counters */
- q31_t coeff = *pCoeffs++; /* Read the first coefficient value */
- q31_t in;
+ q31_t *pState = S->pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *px; /* Scratch buffer pointer */
+ q31_t *py = pState; /* Temporary pointers for state buffer */
+ q31_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
+ q31_t *pOut; /* Destination pointer */
+ q63_t out; /* Temporary output variable */
+ int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
+ uint32_t delaySize = S->maxDelay + blockSize; /* state length */
+ uint16_t numTaps = S->numTaps; /* Filter order */
+ int32_t readIndex; /* Read index of the state buffer */
+ uint32_t tapCnt, blkCnt; /* loop counters */
+ q31_t coeff = *pCoeffs++; /* Read the first coefficient value */
+ q31_t in;
/* BlockSize of Input samples are copied into the state buffer */
@@ -237,27 +237,27 @@
}
void ref_fir_sparse_q15(
- arm_fir_sparse_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- q15_t * pScratchIn,
- q31_t * pScratchOut,
- uint32_t blockSize)
+ arm_fir_sparse_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ q15_t * pScratchIn,
+ q31_t * pScratchOut,
+ uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pIn = pSrc; /* Working pointer for input */
- q15_t *pOut = pDst; /* Working pointer for output */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *px; /* Temporary pointers for scratch buffer */
- q15_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
- q15_t *py = pState; /* Temporary pointers for state buffer */
- int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
- uint32_t delaySize = S->maxDelay + blockSize; /* state length */
- uint16_t numTaps = S->numTaps; /* Filter order */
- int32_t readIndex; /* Read index of the state buffer */
- uint32_t tapCnt, blkCnt; /* loop counters */
- q15_t coeff = *pCoeffs++; /* Read the first coefficient value */
- q31_t *pScr2 = pScratchOut; /* Working pointer for pScratchOut */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pIn = pSrc; /* Working pointer for input */
+ q15_t *pOut = pDst; /* Working pointer for output */
+ q15_t *px; /* Temporary pointers for scratch buffer */
+ q15_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
+ q15_t *py = pState; /* Temporary pointers for state buffer */
+ int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
+ uint32_t delaySize = S->maxDelay + blockSize; /* state length */
+ uint16_t numTaps = S->numTaps; /* Filter order */
+ int32_t readIndex; /* Read index of the state buffer */
+ uint32_t tapCnt, blkCnt; /* loop counters */
+ q15_t coeff = *pCoeffs++; /* Read the first coefficient value */
+ q31_t *pScr2 = pScratchOut; /* Working pointer for pScratchOut */
/* BlockSize of Input samples are copied into the state buffer */
/* StateIndex points to the starting position to write in the state buffer */
@@ -358,27 +358,27 @@
}
void ref_fir_sparse_q7(
- arm_fir_sparse_instance_q7 * S,
- q7_t *pSrc,
- q7_t *pDst,
- q7_t *pScratchIn,
- q31_t * pScratchOut,
- uint32_t blockSize)
+ arm_fir_sparse_instance_q7 * S,
+ q7_t *pSrc,
+ q7_t *pDst,
+ q7_t *pScratchIn,
+ q31_t * pScratchOut,
+ uint32_t blockSize)
{
- q7_t *pState = S->pState; /* State pointer */
- q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q7_t *px; /* Scratch buffer pointer */
- q7_t *py = pState; /* Temporary pointers for state buffer */
- q7_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
- q7_t *pOut = pDst; /* Destination pointer */
- int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
- uint32_t delaySize = S->maxDelay + blockSize; /* state length */
- uint16_t numTaps = S->numTaps; /* Filter order */
- int32_t readIndex; /* Read index of the state buffer */
- uint32_t tapCnt, blkCnt; /* loop counters */
- q7_t coeff = *pCoeffs++; /* Read the coefficient value */
- q31_t *pScr2 = pScratchOut; /* Working pointer for scratch buffer of output values */
- q31_t in;
+ q7_t *pState = S->pState; /* State pointer */
+ const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q7_t *px; /* Scratch buffer pointer */
+ q7_t *py = pState; /* Temporary pointers for state buffer */
+ q7_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
+ q7_t *pOut = pDst; /* Destination pointer */
+ int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
+ uint32_t delaySize = S->maxDelay + blockSize; /* state length */
+ uint16_t numTaps = S->numTaps; /* Filter order */
+ int32_t readIndex; /* Read index of the state buffer */
+ uint32_t tapCnt, blkCnt; /* loop counters */
+ q7_t coeff = *pCoeffs++; /* Read the coefficient value */
+ q31_t *pScr2 = pScratchOut; /* Working pointer for scratch buffer of output values */
+ q31_t in;
/* BlockSize of Input samples are copied into the state buffer */
/* StateIndex points to the starting position to write in the state buffer */
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/HelperFunctions/HelperFunctions.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/HelperFunctions/HelperFunctions.c
new file mode 100644
index 0000000..aa5a40f
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/HelperFunctions/HelperFunctions.c
@@ -0,0 +1,4 @@
+
+#include "mat_helper.c"
+#include "ref_helper.c"
+
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/Intrinsics/Intrinsics_.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/Intrinsics/Intrinsics_.c
new file mode 100644
index 0000000..ed4b7c5
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/Intrinsics/Intrinsics_.c
@@ -0,0 +1,3 @@
+
+#include "intrinsics.c"
+
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/MatrixFunctions.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/MatrixFunctions.c
new file mode 100644
index 0000000..b611bfd
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/MatrixFunctions.c
@@ -0,0 +1,9 @@
+
+#include "mat_add.c"
+#include "mat_cmplx_mult.c"
+#include "mat_inverse.c"
+#include "mat_mult.c"
+#include "mat_scale.c"
+#include "mat_sub.c"
+#include "mat_trans.c"
+
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/StatisticsFunctions.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/StatisticsFunctions.c
new file mode 100644
index 0000000..426c3f7
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/StatisticsFunctions.c
@@ -0,0 +1,8 @@
+
+#include "max.c"
+#include "mean.c"
+#include "min.c"
+#include "power.c"
+#include "rms.c"
+#include "std.c"
+#include "var.c"
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/SupportFunctions.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/SupportFunctions.c
new file mode 100644
index 0000000..647eb46
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/SupportFunctions.c
@@ -0,0 +1,6 @@
+
+#include "copy.c"
+#include "fill.c"
+#include "fixed_to_fixed.c"
+#include "fixed_to_float.c"
+#include "float_to_fixed.c"
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/TransformFunctions.c b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/TransformFunctions.c
new file mode 100644
index 0000000..d0d10c4
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/TransformFunctions.c
@@ -0,0 +1,4 @@
+
+#include "cfft.c"
+#include "dct4.c"
+#include "rfft.c"
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/buildDspLibs.bat b/CMSIS/DSP/DSP_Lib_TestSuite/buildDspLibs.bat
index 62d259d..c386b58 100644
--- a/CMSIS/DSP/DSP_Lib_TestSuite/buildDspLibs.bat
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/buildDspLibs.bat
@@ -17,7 +17,7 @@
:buildARM
:buildGCC
-cd ..\DSP_Lib\Source\%1
+cd ..\DSP\Projects\%1
echo Building DSP Library for Cortex-M0 Little Endian
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0l" -o "DspLib_cortexM0l_build.log"
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/log2txt.py b/CMSIS/DSP/DSP_Lib_TestSuite/log2txt.py
new file mode 100644
index 0000000..7cbbb96
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/log2txt.py
@@ -0,0 +1,110 @@
+#!/usr/bin/python3
+
+import sys
+import os
+
+error = 1
+
+
+def parseLog(filename):
+
+ inFileName = filename
+ outFileName = os.path.splitext(inFileName)[0] + '_parsed' + os.path.splitext(inFileName)[1]
+
+ infile = open(inFileName).read()
+ infile = infile.split('\n')
+
+ outfile = open(outFileName, 'w')
+
+ count = 0
+ strName = ""
+ strNr = -1
+ strFUT = ""
+ coverageInfo = 0
+
+ for line in infile:
+ if line.find("==================================================") != -1:
+ continue
+ if line.find("--------------------------------------------------") != -1:
+ continue
+ if line.find("Start: Group") != -1:
+ outfile.write("\n")
+ continue
+ if line.find("End: Group") != -1:
+ outfile.write("\n")
+ continue
+ if line.find("Start: Test") != -1:
+ outfile.write("\n")
+ continue
+ if line.find("End: Test") != -1:
+ outfile.write("\n")
+ continue
+ if line.find("Start Dump: String") != -1:
+ continue
+ if line.find("End Dump: String") != -1:
+ strName = strName.rstrip("\n")
+ outfile.write(strName)
+ if strNr == 3:
+ strFUT = strName
+# else:
+# strFUT == ""
+ if strName == "Group Name:":
+ strNr = 1
+ outfile.write(" ")
+ elif strName == "Test Name:":
+ strNr = 2
+ outfile.write(" ")
+ elif strName == "Function Under Test:":
+ strNr = 3
+ outfile.write(" ")
+ else:
+ strNr = 4
+ if len(strName) < 128:
+ outfile.write("\n")
+ strName = ""
+ continue
+ if line.find("Start: Coverage Information") != -1:
+ coverageInfo = 1
+ outfile.write(line)
+ outfile.write("\n")
+ if line.find("End: Coverage Information") != -1:
+ strFUT == ""
+ coverageInfo = 0
+ if coverageInfo == 1:
+# if line.find(strFUT) == -1: #this line contains no relevant coverage info
+# continue
+ if line.find("- 0%") == -1 and line.find("src") == -1 and line.find("Functions") != -1:
+ outfile.write(line + "\n")
+ continue
+ if line.find("0x") == 0: #this is a line to translate
+ line = line[12:35] + line[37:61]
+ nums = line.split(' ')
+ for num in nums:
+ intNum = int(num, base=16)
+# if intNum == 10:
+# continue
+ if intNum == 0:
+ continue
+ strName += str(chr(intNum))
+ continue
+ outfile.write(line)
+ outfile.write("\n")
+
+def print_usage(sys_argv):
+ script_name = sys_argv[0]
+ usage_str = "Syntax: {0} filename\n"
+
+ print (usage_str)
+
+def exit_on_error(sys_argv):
+ print_usage(sys_argv)
+ exit(1)
+
+if __name__ == '__main__':
+ arg_len = len(sys.argv)
+
+ if arg_len != 2:
+ exit_on_error(sys.argv)
+
+ if error == parseLog(sys.argv[1]):
+ exit_on_error(sys.argv)
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/parseLog_SV.py b/CMSIS/DSP/DSP_Lib_TestSuite/parseLog_SV.py
new file mode 100644
index 0000000..19d507c
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/parseLog_SV.py
@@ -0,0 +1,128 @@
+#!/usr/bin/python3
+
+import sys
+
+toolchain_list = ["ARM", "GCC", "ARMCLANG"]
+core_list = ["cortexM0l", "cortexM3l", "cortexM4l", "cortexM4lf", "cortexM7l", "cortexM7lfsp", "cortexM7lfdp",
+ "ARMv8MBLl", "ARMv8MMLl", "ARMv8MMLlfsp", "ARMv8MMLlfdp", "ARMv8MMLld", "ARMv8MMLldfsp", "ARMv8MMLldfdp" ]
+test_list = ["MPS2", "FVP", "Simulator"]
+error = 1
+
+
+def parseLog(toolchain, core, test):
+ if toolchain not in toolchain_list:
+ print ("Error: Unkown toolchain '{0}'".format(toolchain))
+ return error
+
+ if core not in core_list:
+ print ("Error: Unkown core '{0}'".format(core))
+ return error
+
+ if test not in test_list:
+ print ("Error: Unkown test '{0}'".format(test))
+ return error
+
+ inFileName = ".\DspLibTest_SV_{2}\{0}\Logs\DspLibTest_{2}_{1}.log".format(toolchain, core, test)
+ outFileName = ".\DspLibTest_SV_{2}\{0}\Logs\DspLibTest_{2}_{1}_parsed.log".format(toolchain, core, test)
+
+ infile = open(inFileName).read()
+ infile = infile.split('\n')
+
+ outfile = open(outFileName, 'w')
+
+ count = 0
+ strName = ""
+ strNr = -1
+ strFUT = ""
+ coverageInfo = 0
+
+ for line in infile:
+ if line.find("==================================================") != -1:
+ continue
+ if line.find("--------------------------------------------------") != -1:
+ continue
+ if line.find("Start: Group") != -1:
+ outfile.write("\n")
+ continue
+ if line.find("End: Group") != -1:
+ outfile.write("\n")
+ continue
+ if line.find("Start: Test") != -1:
+ outfile.write("\n")
+ continue
+ if line.find("End: Test") != -1:
+ outfile.write("\n")
+ continue
+ if line.find("Start Dump: String") != -1:
+ continue
+ if line.find("End Dump: String") != -1:
+ strName = strName.rstrip("\n")
+ outfile.write(strName)
+ if strNr == 3:
+ strFUT = strName
+# else:
+# strFUT == ""
+ if strName == "Group Name:":
+ strNr = 1
+ outfile.write(" ")
+ elif strName == "Test Name:":
+ strNr = 2
+ outfile.write(" ")
+ elif strName == "Function Under Test:":
+ strNr = 3
+ outfile.write(" ")
+ else:
+ strNr = 4
+ if len(strName) < 128:
+ outfile.write("\n")
+ strName = ""
+ continue
+ if line.find("Start: Coverage Information") != -1:
+ coverageInfo = 1
+ outfile.write(line)
+ outfile.write("\n")
+ if line.find("End: Coverage Information") != -1:
+ strFUT == ""
+ coverageInfo = 0
+ if coverageInfo == 1:
+# if line.find(strFUT) == -1: #this line contains no relevant coverage info
+# continue
+ if line.find("- 0%") == -1 and line.find("src") == -1 and line.find("Functions") != -1:
+ outfile.write(line + "\n")
+ continue
+ if line.find("0x") == 0: #this is a line to translate
+ line = line[12:35] + line[37:61]
+ nums = line.split(' ')
+ for num in nums:
+ intNum = int(num, base=16)
+# if intNum == 10:
+# continue
+ if intNum == 0:
+ continue
+ strName += str(chr(intNum))
+ continue
+ outfile.write(line)
+ outfile.write("\n")
+
+def print_usage(sys_argv):
+ script_name = sys_argv[0]
+ usage_str = "Syntax: {0} toolchain core test\n".format(sys.argv[0])
+ argument_desc = "\n toolchain: {0}".format(" ".join(toolchain_list))
+ argument_desc += "\n core: {0}".format(" ".join(core_list))
+ argument_desc += "\n test: {0}".format(" ".join(test_list))
+ argument_desc += "\n\ne.g.: parseLog ARM cortexM3l FVP"
+
+ print (usage_str + argument_desc)
+
+def exit_on_error(sys_argv):
+ print_usage(sys_argv)
+ exit(1)
+
+if __name__ == '__main__':
+ arg_len = len(sys.argv)
+
+ if arg_len != 4:
+ exit_on_error(sys.argv)
+
+ if error == parseLog(sys.argv[1], sys.argv[2], sys.argv[3]):
+ exit_on_error(sys.argv)
diff --git a/CMSIS/DSP/DSP_Lib_TestSuite/runTest_SV.bat b/CMSIS/DSP/DSP_Lib_TestSuite/runTest_SV.bat
new file mode 100644
index 0000000..e695441
--- /dev/null
+++ b/CMSIS/DSP/DSP_Lib_TestSuite/runTest_SV.bat
@@ -0,0 +1,105 @@
+@echo off
+
+set UVEXE=C:\Keil_v5\UV4\UV4.EXE
+
+if .%1==. goto help
+for %%a in (ARM GCC ARMCLANG) do if %1==%%a goto checkParam2
+echo parameter %1 not supported.
+goto help
+
+:checkParam2
+if .%2==. goto help
+for %%a in ( ^
+ cortexM0l ^
+ cortexM3l ^
+ cortexM4l ^
+ cortexM4lf ^
+ cortexM7l ^
+ cortexM7lfsp ^
+ cortexM7lfdp ^
+ ARMv8MBLl ^
+ ARMv8MMLl ^
+ ARMv8MMLlfsp ^
+ ARMv8MMLlfdp ^
+ ARMv8MMLld ^
+ ARMv8MMLldfsp ^
+ ARMv8MMLldfdp ^
+ ) do if %2==%%a goto checkParam3
+echo parameter %2 not supported.
+goto help
+
+:checkParam3
+if .%3==. goto help
+for %%a in (MPS2 FVP Simulator) do if %3==%%a goto buildProject
+echo parameter %3 not supported.
+goto help
+
+:buildProject
+ echo Build Test Project ...
+%UVEXE% -r -j0 .\DspLibTest_SV_%3\%1\DspLibTest_%3.uvprojx -t "%2" -o ".\Logs\DspLibTest_%3_%2_build.log"
+
+ echo Run Test ...
+del /Q ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3.log" 2>NUL
+del /Q ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2.log" 2>NUL
+
+rem get start time (The format of %TIME% is HH:MM:SS,CS for example 23:59:59,99)
+set STARTTIME=%TIME%
+
+rem run the test
+%UVEXE% -d .\DspLibTest_SV_%3\%1\DspLibTest_%3.uvprojx -t "%2"
+
+rem get end time
+set ENDTIME=%TIME%
+
+rem calculate duration
+rem Change formatting for the start and end times
+for /F "tokens=1-4 delims=:.," %%a in ("%STARTTIME%") do (
+ set /A "start=(((%%a*60)+1%%b %% 100)*60+1%%c %% 100)*100+1%%d %% 100"
+)
+
+for /F "tokens=1-4 delims=:.," %%a in ("%ENDTIME%") do (
+ set /A "end=(((%%a*60)+1%%b %% 100)*60+1%%c %% 100)*100+1%%d %% 100"
+)
+
+rem Test midnight rollover. If so, add 1 day=8640000 1/100ths secs
+if %end% lss %start% set /a end+=8640000
+
+rem Calculate the elapsed time by subtracting values
+set /A elapsed=end-start
+
+rem Format the results for output
+set /A hh=elapsed/(60*60*100), rest=elapsed%%(60*60*100), mm=rest/(60*100), rest%%=60*100, ss=rest/100, cc=rest%%100
+if %hh% lss 10 set hh=0%hh%
+if %mm% lss 10 set mm=0%mm%
+if %ss% lss 10 set ss=0%ss%
+if %cc% lss 10 set cc=0%cc%
+
+set DURATION=%hh%:%mm%:%ss%,%cc%
+
+rem write time to file
+echo Test %1 %2 : > ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log"
+echo Start time: %STARTTIME% >> ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log"
+echo End time: %ENDTIME% >> ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log"
+echo Duration: %DURATION% >> ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log"
+
+ echo Copy Logfile ...
+copy /B ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3.log" ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2.log"
+
+goto end
+
+
+:help
+echo.
+echo Syntax: runTest toolchain core test
+echo.
+echo toolchain: ARM ^| ARMCLANG ^| GCC
+echo core: cortexM0l ^| cortexM3l ^| cortexM4l ^| cortexM4lf ^| cortexM7l ^| cortexM7lfsp ^| cortexM7lfdp
+echo ARMv8MBLl
+echo ARMv8MMLl ^| ARMv8MMLlfsp ^| ARMv8MMLlfdp
+echo ARMv8MMLld ^| ARMv8MMLldfsp ^| ARMv8MMLldfdp
+echo test: MPS2 ^| FVP ^| Simulator
+echo.
+echo e.g.: runTest ARM cortexM3l Simulator
+
+:end
+@echo on
diff --git a/CMSIS/DSP/Include/arm_common_tables.h b/CMSIS/DSP/Include/arm_common_tables.h
index dfea746..19ec6ad 100644
--- a/CMSIS/DSP/Include/arm_common_tables.h
+++ b/CMSIS/DSP/Include/arm_common_tables.h
@@ -3,13 +3,13 @@
* Title: arm_common_tables.h
* Description: Extern declaration for common tables
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/CMSIS/DSP/Include/arm_const_structs.h b/CMSIS/DSP/Include/arm_const_structs.h
index 80a3e8b..c2b2b9a 100644
--- a/CMSIS/DSP/Include/arm_const_structs.h
+++ b/CMSIS/DSP/Include/arm_const_structs.h
@@ -4,13 +4,13 @@
* Description: Constant structs that are initialized for user convenience.
* For example, some can be given as arguments to the arm_cfft_f32() function.
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
diff --git a/CMSIS/DSP/Include/arm_math.h b/CMSIS/DSP/Include/arm_math.h
index 9405f31..23b8415 100644
--- a/CMSIS/DSP/Include/arm_math.h
+++ b/CMSIS/DSP/Include/arm_math.h
@@ -1,11 +1,11 @@
/******************************************************************************
* @file arm_math.h
- * @brief Public header file for CMSIS DSP LibraryU
- * @version V1.5.4
- * @date 10. December 2018
+ * @brief Public header file for CMSIS DSP Library
+ * @version V1.5.5
+ * @date 28. February 2019
******************************************************************************/
/*
- * Copyright (c) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -37,7 +37,7 @@
* - Complex math functions
* - Filters
* - Matrix functions
- * - Transforms
+ * - Transform functions
* - Motor control functions
* - Statistical functions
* - Support functions
@@ -73,7 +73,7 @@
* The library functions are declared in the public file <code>arm_math.h</code> which is placed in the <code>Include</code> folder.
* Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single
* public header file <code> arm_math.h</code> for Cortex-M cores with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.
- *
+ *
*
* Examples
* --------
@@ -89,7 +89,7 @@
* Building the Library
* ------------
*
- * The library installer contains a project file to rebuild libraries on MDK toolchain in the <code>CMSIS\\DSP_Lib\\Source\\ARM</code> folder.
+ * The library installer contains a project file to rebuild libraries on MDK toolchain in the <code>CMSIS\\DSP\\Projects\\ARM</code> folder.
* - arm_cortexM_math.uvprojx
*
*
@@ -100,10 +100,6 @@
*
* Each library project have different preprocessor macros.
*
- * - UNALIGNED_SUPPORT_DISABLE:
- *
- * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access
- *
* - ARM_MATH_BIG_ENDIAN:
*
* Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
@@ -116,27 +112,29 @@
*
* Define macro ARM_MATH_ROUNDING for rounding on support functions
*
+ * - ARM_MATH_LOOPUNROLL:
+ *
+ * Define macro ARM_MATH_LOOPUNROLL to enable manual loop unrolling in DSP functions
+ *
* <hr>
* CMSIS-DSP in ARM::CMSIS Pack
* -----------------------------
*
* The following files relevant to CMSIS-DSP are present in the <b>ARM::CMSIS</b> Pack directories:
- * |File/Folder |Content |
- * |------------------------------|------------------------------------------------------------------------|
- * |\b CMSIS\\Documentation\\DSP | This documentation |
- * |\b CMSIS\\DSP_Lib | Software license agreement (license.txt) |
- * |\b CMSIS\\DSP_Lib\\Examples | Example projects demonstrating the usage of the library functions |
- * |\b CMSIS\\DSP_Lib\\Source | Source files for rebuilding the library |
+ * |File/Folder |Content |
+ * |---------------------------------|------------------------------------------------------------------------|
+ * |\b CMSIS\\Documentation\\DSP | This documentation |
+ * |\b CMSIS\\DSP\\DSP_Lib_TestSuite | DSP_Lib test suite |
+ * |\b CMSIS\\DSP\\Examples | Example projects demonstrating the usage of the library functions |
+ * |\b CMSIS\\DSP\\Include | DSP_Lib include files |
+ * |\b CMSIS\\DSP\\Lib | DSP_Lib binaries |
+ * |\b CMSIS\\DSP\\Projects | Projects to rebuild DSP_Lib binaries |
+ * |\b CMSIS\\DSP\\Source | DSP_Lib source files |
*
* <hr>
* Revision History of CMSIS-DSP
* ------------
* Please refer to \ref ChangeLog_pg.
- *
- * Copyright Notice
- * ------------
- *
- * Copyright (C) 2010-2015 Arm Limited. All rights reserved.
*/
@@ -197,8 +195,8 @@
* There is an associated initialization function for each type of matrix
* data structure.
* The initialization function sets the values of the internal structure fields.
- * Refer to the function <code>arm_mat_init_f32()</code>, <code>arm_mat_init_q31()</code>
- * and <code>arm_mat_init_q15()</code> for floating-point, Q31 and Q15 types, respectively.
+ * Refer to \ref arm_mat_init_f32(), \ref arm_mat_init_q31() and \ref arm_mat_init_q15()
+ * for floating-point, Q31 and Q15 types, respectively.
*
* \par
* Use of the initialization function is optional. However, if initialization function is used
@@ -249,6 +247,7 @@
/**
* @defgroup groupStats Statistics Functions
*/
+
/**
* @defgroup groupSupport Support Functions
*/
@@ -263,6 +262,8 @@
/**
* @defgroup groupExamples Examples
*/
+
+
#ifndef _ARM_MATH_H
#define _ARM_MATH_H
@@ -352,14 +353,6 @@
/* -1 to +1 is divided into 360 values so total spacing is (2/360) */
#define INPUT_SPACING 0xB60B61
- /**
- * @brief Macro for Unaligned Support
- */
-#ifndef UNALIGNED_SUPPORT_DISABLE
- #define ALIGN4
-#else
- #define ALIGN4 __ALIGNED(4)
-#endif
/**
* @brief Error status returned by some functions in the library.
@@ -367,13 +360,13 @@
typedef enum
{
- ARM_MATH_SUCCESS = 0, /**< No error */
+ ARM_MATH_SUCCESS = 0, /**< No error */
ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */
- ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */
- ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation. */
- ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */
- ARM_MATH_SINGULAR = -5, /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */
- ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */
+ ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */
+ ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation */
+ ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */
+ ARM_MATH_SINGULAR = -5, /**< Input matrix is singular and cannot be inverted */
+ ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */
} arm_status;
/**
@@ -406,52 +399,137 @@
*/
typedef double float64_t;
- /**
- * @brief definition to read/write two 16 bit values.
- */
-#if defined ( __CC_ARM )
- #define __SIMD32_TYPE int32_t __packed
- #define CMSIS_UNUSED __attribute__((unused))
- #define CMSIS_INLINE __attribute__((always_inline))
-#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
- #define __SIMD32_TYPE int32_t
- #define CMSIS_UNUSED __attribute__((unused))
- #define CMSIS_INLINE __attribute__((always_inline))
-#elif defined ( __GNUC__ )
- #define __SIMD32_TYPE int32_t
- #define CMSIS_UNUSED __attribute__((unused))
- #define CMSIS_INLINE __attribute__((always_inline))
+/* SIMD replacement */
-#elif defined ( __ICCARM__ )
- #define __SIMD32_TYPE int32_t __packed
- #define CMSIS_UNUSED
- #define CMSIS_INLINE
+/**
+ @brief Read 2 Q15 from Q15 pointer.
+ @param[in] pQ15 points to input value
+ @return Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q15x2 (
+ q15_t * pQ15)
+{
+ q31_t val;
-#elif defined ( __TI_ARM__ )
- #define __SIMD32_TYPE int32_t
- #define CMSIS_UNUSED __attribute__((unused))
- #define CMSIS_INLINE
+ memcpy (&val, pQ15, 4);
-#elif defined ( __CSMC__ )
- #define __SIMD32_TYPE int32_t
- #define CMSIS_UNUSED
- #define CMSIS_INLINE
+ return (val);
+}
-#elif defined ( __TASKING__ )
- #define __SIMD32_TYPE __unaligned int32_t
- #define CMSIS_UNUSED
- #define CMSIS_INLINE
+/**
+ @brief Read 2 Q15 from Q15 pointer and increment pointer afterwards.
+ @param[in] pQ15 points to input value
+ @return Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q15x2_ia (
+ q15_t ** pQ15)
+{
+ q31_t val;
-#else
- #error Unknown compiler
-#endif
+ memcpy (&val, *pQ15, 4);
+ *pQ15 += 2;
-#define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr))
-#define __SIMD32_CONST(addr) ((__SIMD32_TYPE *)(addr))
-#define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE *) (addr))
-#define __SIMD64(addr) (*(int64_t **) & (addr))
+ return (val);
+}
+
+/**
+ @brief Read 2 Q15 from Q15 pointer and decrement pointer afterwards.
+ @param[in] pQ15 points to input value
+ @return Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q15x2_da (
+ q15_t ** pQ15)
+{
+ q31_t val;
+
+ memcpy (&val, *pQ15, 4);
+ *pQ15 -= 2;
+
+ return (val);
+}
+
+/**
+ @brief Write 2 Q15 to Q15 pointer and increment pointer afterwards.
+ @param[in] pQ15 points to input value
+ @param[in] value Q31 value
+ @return none
+ */
+__STATIC_FORCEINLINE void write_q15x2_ia (
+ q15_t ** pQ15,
+ q31_t value)
+{
+ q31_t val = value;
+
+ memcpy (*pQ15, &val, 4);
+ *pQ15 += 2;
+}
+
+/**
+ @brief Write 2 Q15 to Q15 pointer.
+ @param[in] pQ15 points to input value
+ @param[in] value Q31 value
+ @return none
+ */
+__STATIC_FORCEINLINE void write_q15x2 (
+ q15_t * pQ15,
+ q31_t value)
+{
+ q31_t val = value;
+
+ memcpy (pQ15, &val, 4);
+}
+
+
+/**
+ @brief Read 4 Q7 from Q7 pointer and increment pointer afterwards.
+ @param[in] pQ7 points to input value
+ @return Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q7x4_ia (
+ q7_t ** pQ7)
+{
+ q31_t val;
+
+ memcpy (&val, *pQ7, 4);
+ *pQ7 += 4;
+
+ return (val);
+}
+
+/**
+ @brief Read 4 Q7 from Q7 pointer and decrement pointer afterwards.
+ @param[in] pQ7 points to input value
+ @return Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q7x4_da (
+ q7_t ** pQ7)
+{
+ q31_t val;
+
+ memcpy (&val, *pQ7, 4);
+ *pQ7 -= 4;
+
+ return (val);
+}
+
+/**
+ @brief Write 4 Q7 to Q7 pointer and increment pointer afterwards.
+ @param[in] pQ7 points to input value
+ @param[in] value Q31 value
+ @return none
+ */
+__STATIC_FORCEINLINE void write_q7x4_ia (
+ q7_t ** pQ7,
+ q31_t value)
+{
+ q31_t val = value;
+
+ memcpy (*pQ7, &val, 4);
+ *pQ7 += 4;
+}
+
#ifndef ARM_MATH_DSP
/**
@@ -482,7 +560,7 @@
/**
* @brief Clips Q63 to Q31 values.
*/
- CMSIS_INLINE __STATIC_INLINE q31_t clip_q63_to_q31(
+ __STATIC_FORCEINLINE q31_t clip_q63_to_q31(
q63_t x)
{
return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
@@ -492,7 +570,7 @@
/**
* @brief Clips Q63 to Q15 values.
*/
- CMSIS_INLINE __STATIC_INLINE q15_t clip_q63_to_q15(
+ __STATIC_FORCEINLINE q15_t clip_q63_to_q15(
q63_t x)
{
return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
@@ -502,7 +580,7 @@
/**
* @brief Clips Q31 to Q7 values.
*/
- CMSIS_INLINE __STATIC_INLINE q7_t clip_q31_to_q7(
+ __STATIC_FORCEINLINE q7_t clip_q31_to_q7(
q31_t x)
{
return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
@@ -512,7 +590,7 @@
/**
* @brief Clips Q31 to Q15 values.
*/
- CMSIS_INLINE __STATIC_INLINE q15_t clip_q31_to_q15(
+ __STATIC_FORCEINLINE q15_t clip_q31_to_q15(
q31_t x)
{
return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
@@ -522,23 +600,21 @@
/**
* @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
*/
-
- CMSIS_INLINE __STATIC_INLINE q63_t mult32x64(
+ __STATIC_FORCEINLINE q63_t mult32x64(
q63_t x,
q31_t y)
{
return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
- (((q63_t) (x >> 32) * y)));
+ (((q63_t) (x >> 32) * y) ) );
}
/**
* @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
*/
-
- CMSIS_INLINE __STATIC_INLINE uint32_t arm_recip_q31(
- q31_t in,
- q31_t * dst,
- q31_t * pRecipTable)
+ __STATIC_FORCEINLINE uint32_t arm_recip_q31(
+ q31_t in,
+ q31_t * dst,
+ const q31_t * pRecipTable)
{
q31_t out;
uint32_t tempVal;
@@ -586,10 +662,10 @@
/**
* @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t arm_recip_q15(
- q15_t in,
- q15_t * dst,
- q15_t * pRecipTable)
+ __STATIC_FORCEINLINE uint32_t arm_recip_q15(
+ q15_t in,
+ q15_t * dst,
+ const q15_t * pRecipTable)
{
q15_t out = 0;
uint32_t tempVal = 0;
@@ -635,14 +711,14 @@
/*
- * @brief C custom defined intrinsic function for M3 and M0 processors
+ * @brief C custom defined intrinsic functions
*/
#if !defined (ARM_MATH_DSP)
/*
- * @brief C custom defined QADD8 for M3 and M0 processors
+ * @brief C custom defined QADD8
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __QADD8(
+ __STATIC_FORCEINLINE uint32_t __QADD8(
uint32_t x,
uint32_t y)
{
@@ -658,9 +734,9 @@
/*
- * @brief C custom defined QSUB8 for M3 and M0 processors
+ * @brief C custom defined QSUB8
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __QSUB8(
+ __STATIC_FORCEINLINE uint32_t __QSUB8(
uint32_t x,
uint32_t y)
{
@@ -676,9 +752,9 @@
/*
- * @brief C custom defined QADD16 for M3 and M0 processors
+ * @brief C custom defined QADD16
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __QADD16(
+ __STATIC_FORCEINLINE uint32_t __QADD16(
uint32_t x,
uint32_t y)
{
@@ -693,9 +769,9 @@
/*
- * @brief C custom defined SHADD16 for M3 and M0 processors
+ * @brief C custom defined SHADD16
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __SHADD16(
+ __STATIC_FORCEINLINE uint32_t __SHADD16(
uint32_t x,
uint32_t y)
{
@@ -709,9 +785,9 @@
/*
- * @brief C custom defined QSUB16 for M3 and M0 processors
+ * @brief C custom defined QSUB16
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __QSUB16(
+ __STATIC_FORCEINLINE uint32_t __QSUB16(
uint32_t x,
uint32_t y)
{
@@ -725,9 +801,9 @@
/*
- * @brief C custom defined SHSUB16 for M3 and M0 processors
+ * @brief C custom defined SHSUB16
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __SHSUB16(
+ __STATIC_FORCEINLINE uint32_t __SHSUB16(
uint32_t x,
uint32_t y)
{
@@ -741,9 +817,9 @@
/*
- * @brief C custom defined QASX for M3 and M0 processors
+ * @brief C custom defined QASX
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __QASX(
+ __STATIC_FORCEINLINE uint32_t __QASX(
uint32_t x,
uint32_t y)
{
@@ -757,9 +833,9 @@
/*
- * @brief C custom defined SHASX for M3 and M0 processors
+ * @brief C custom defined SHASX
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __SHASX(
+ __STATIC_FORCEINLINE uint32_t __SHASX(
uint32_t x,
uint32_t y)
{
@@ -773,9 +849,9 @@
/*
- * @brief C custom defined QSAX for M3 and M0 processors
+ * @brief C custom defined QSAX
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __QSAX(
+ __STATIC_FORCEINLINE uint32_t __QSAX(
uint32_t x,
uint32_t y)
{
@@ -789,9 +865,9 @@
/*
- * @brief C custom defined SHSAX for M3 and M0 processors
+ * @brief C custom defined SHSAX
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __SHSAX(
+ __STATIC_FORCEINLINE uint32_t __SHSAX(
uint32_t x,
uint32_t y)
{
@@ -805,9 +881,9 @@
/*
- * @brief C custom defined SMUSDX for M3 and M0 processors
+ * @brief C custom defined SMUSDX
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __SMUSDX(
+ __STATIC_FORCEINLINE uint32_t __SMUSDX(
uint32_t x,
uint32_t y)
{
@@ -816,9 +892,9 @@
}
/*
- * @brief C custom defined SMUADX for M3 and M0 processors
+ * @brief C custom defined SMUADX
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __SMUADX(
+ __STATIC_FORCEINLINE uint32_t __SMUADX(
uint32_t x,
uint32_t y)
{
@@ -828,9 +904,9 @@
/*
- * @brief C custom defined QADD for M3 and M0 processors
+ * @brief C custom defined QADD
*/
- CMSIS_INLINE __STATIC_INLINE int32_t __QADD(
+ __STATIC_FORCEINLINE int32_t __QADD(
int32_t x,
int32_t y)
{
@@ -839,9 +915,9 @@
/*
- * @brief C custom defined QSUB for M3 and M0 processors
+ * @brief C custom defined QSUB
*/
- CMSIS_INLINE __STATIC_INLINE int32_t __QSUB(
+ __STATIC_FORCEINLINE int32_t __QSUB(
int32_t x,
int32_t y)
{
@@ -850,9 +926,9 @@
/*
- * @brief C custom defined SMLAD for M3 and M0 processors
+ * @brief C custom defined SMLAD
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __SMLAD(
+ __STATIC_FORCEINLINE uint32_t __SMLAD(
uint32_t x,
uint32_t y,
uint32_t sum)
@@ -864,9 +940,9 @@
/*
- * @brief C custom defined SMLADX for M3 and M0 processors
+ * @brief C custom defined SMLADX
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __SMLADX(
+ __STATIC_FORCEINLINE uint32_t __SMLADX(
uint32_t x,
uint32_t y,
uint32_t sum)
@@ -878,9 +954,9 @@
/*
- * @brief C custom defined SMLSDX for M3 and M0 processors
+ * @brief C custom defined SMLSDX
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __SMLSDX(
+ __STATIC_FORCEINLINE uint32_t __SMLSDX(
uint32_t x,
uint32_t y,
uint32_t sum)
@@ -892,9 +968,9 @@
/*
- * @brief C custom defined SMLALD for M3 and M0 processors
+ * @brief C custom defined SMLALD
*/
- CMSIS_INLINE __STATIC_INLINE uint64_t __SMLALD(
+ __STATIC_FORCEINLINE uint64_t __SMLALD(
uint32_t x,
uint32_t y,
uint64_t sum)
@@ -907,9 +983,9 @@
/*
- * @brief C custom defined SMLALDX for M3 and M0 processors
+ * @brief C custom defined SMLALDX
*/
- CMSIS_INLINE __STATIC_INLINE uint64_t __SMLALDX(
+ __STATIC_FORCEINLINE uint64_t __SMLALDX(
uint32_t x,
uint32_t y,
uint64_t sum)
@@ -922,9 +998,9 @@
/*
- * @brief C custom defined SMUAD for M3 and M0 processors
+ * @brief C custom defined SMUAD
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __SMUAD(
+ __STATIC_FORCEINLINE uint32_t __SMUAD(
uint32_t x,
uint32_t y)
{
@@ -934,9 +1010,9 @@
/*
- * @brief C custom defined SMUSD for M3 and M0 processors
+ * @brief C custom defined SMUSD
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __SMUSD(
+ __STATIC_FORCEINLINE uint32_t __SMUSD(
uint32_t x,
uint32_t y)
{
@@ -946,9 +1022,9 @@
/*
- * @brief C custom defined SXTB16 for M3 and M0 processors
+ * @brief C custom defined SXTB16
*/
- CMSIS_INLINE __STATIC_INLINE uint32_t __SXTB16(
+ __STATIC_FORCEINLINE uint32_t __SXTB16(
uint32_t x)
{
return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) |
@@ -956,9 +1032,9 @@
}
/*
- * @brief C custom defined SMMLA for M3 and M0 processors
+ * @brief C custom defined SMMLA
*/
- CMSIS_INLINE __STATIC_INLINE int32_t __SMMLA(
+ __STATIC_FORCEINLINE int32_t __SMMLA(
int32_t x,
int32_t y,
int32_t sum)
@@ -974,9 +1050,9 @@
*/
typedef struct
{
- uint16_t numTaps; /**< number of filter coefficients in the filter. */
- q7_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ uint16_t numTaps; /**< number of filter coefficients in the filter. */
+ q7_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ const q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
} arm_fir_instance_q7;
/**
@@ -984,9 +1060,9 @@
*/
typedef struct
{
- uint16_t numTaps; /**< number of filter coefficients in the filter. */
- q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ uint16_t numTaps; /**< number of filter coefficients in the filter. */
+ q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ const q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
} arm_fir_instance_q15;
/**
@@ -994,9 +1070,9 @@
*/
typedef struct
{
- uint16_t numTaps; /**< number of filter coefficients in the filter. */
- q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ uint16_t numTaps; /**< number of filter coefficients in the filter. */
+ q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ const q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
} arm_fir_instance_q31;
/**
@@ -1004,12 +1080,11 @@
*/
typedef struct
{
- uint16_t numTaps; /**< number of filter coefficients in the filter. */
- float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ uint16_t numTaps; /**< number of filter coefficients in the filter. */
+ float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
} arm_fir_instance_f32;
-
/**
* @brief Processing function for the Q7 FIR filter.
* @param[in] S points to an instance of the Q7 FIR filter structure.
@@ -1019,10 +1094,9 @@
*/
void arm_fir_q7(
const arm_fir_instance_q7 * S,
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
+ const q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
/**
* @brief Initialization function for the Q7 FIR filter.
@@ -1033,12 +1107,11 @@
* @param[in] blockSize number of samples that are processed.
*/
void arm_fir_init_q7(
- arm_fir_instance_q7 * S,
- uint16_t numTaps,
- q7_t * pCoeffs,
- q7_t * pState,
- uint32_t blockSize);
-
+ arm_fir_instance_q7 * S,
+ uint16_t numTaps,
+ const q7_t * pCoeffs,
+ q7_t * pState,
+ uint32_t blockSize);
/**
* @brief Processing function for the Q15 FIR filter.
@@ -1049,13 +1122,12 @@
*/
void arm_fir_q15(
const arm_fir_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
- * @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
+ * @brief Processing function for the fast Q15 FIR filter (fast version).
* @param[in] S points to an instance of the Q15 FIR filter structure.
* @param[in] pSrc points to the block of input data.
* @param[out] pDst points to the block of output data.
@@ -1063,10 +1135,9 @@
*/
void arm_fir_fast_q15(
const arm_fir_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
* @brief Initialization function for the Q15 FIR filter.
@@ -1075,16 +1146,16 @@
* @param[in] pCoeffs points to the filter coefficients.
* @param[in] pState points to the state buffer.
* @param[in] blockSize number of samples that are processed at a time.
- * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if
- * <code>numTaps</code> is not a supported value.
+ * @return The function returns either
+ * <code>ARM_MATH_SUCCESS</code> if initialization was successful or
+ * <code>ARM_MATH_ARGUMENT_ERROR</code> if <code>numTaps</code> is not a supported value.
*/
arm_status arm_fir_init_q15(
- arm_fir_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- uint32_t blockSize);
-
+ arm_fir_instance_q15 * S,
+ uint16_t numTaps,
+ const q15_t * pCoeffs,
+ q15_t * pState,
+ uint32_t blockSize);
/**
* @brief Processing function for the Q31 FIR filter.
@@ -1095,24 +1166,22 @@
*/
void arm_fir_q31(
const arm_fir_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
- * @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
- * @param[in] S points to an instance of the Q31 FIR structure.
+ * @brief Processing function for the fast Q31 FIR filter (fast version).
+ * @param[in] S points to an instance of the Q31 FIR filter structure.
* @param[in] pSrc points to the block of input data.
* @param[out] pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
*/
void arm_fir_fast_q31(
const arm_fir_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
* @brief Initialization function for the Q31 FIR filter.
@@ -1123,12 +1192,11 @@
* @param[in] blockSize number of samples that are processed at a time.
*/
void arm_fir_init_q31(
- arm_fir_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- uint32_t blockSize);
-
+ arm_fir_instance_q31 * S,
+ uint16_t numTaps,
+ const q31_t * pCoeffs,
+ q31_t * pState,
+ uint32_t blockSize);
/**
* @brief Processing function for the floating-point FIR filter.
@@ -1139,10 +1207,9 @@
*/
void arm_fir_f32(
const arm_fir_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
* @brief Initialization function for the floating-point FIR filter.
@@ -1153,22 +1220,21 @@
* @param[in] blockSize number of samples that are processed at a time.
*/
void arm_fir_init_f32(
- arm_fir_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- uint32_t blockSize);
-
+ arm_fir_instance_f32 * S,
+ uint16_t numTaps,
+ const float32_t * pCoeffs,
+ float32_t * pState,
+ uint32_t blockSize);
/**
* @brief Instance structure for the Q15 Biquad cascade filter.
*/
typedef struct
{
- int8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- q15_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
- q15_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
- int8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
+ int8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ q15_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
+ const q15_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
+ int8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
} arm_biquad_casd_df1_inst_q15;
/**
@@ -1176,10 +1242,10 @@
*/
typedef struct
{
- uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- q31_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
- q31_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
- uint8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
+ uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ q31_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
+ const q31_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
+ uint8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
} arm_biquad_casd_df1_inst_q31;
/**
@@ -1187,12 +1253,11 @@
*/
typedef struct
{
- uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- float32_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
- float32_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
+ uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ float32_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
+ const float32_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
} arm_biquad_casd_df1_inst_f32;
-
/**
* @brief Processing function for the Q15 Biquad cascade filter.
* @param[in] S points to an instance of the Q15 Biquad cascade structure.
@@ -1202,10 +1267,9 @@
*/
void arm_biquad_cascade_df1_q15(
const arm_biquad_casd_df1_inst_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
* @brief Initialization function for the Q15 Biquad cascade filter.
@@ -1216,12 +1280,11 @@
* @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format
*/
void arm_biquad_cascade_df1_init_q15(
- arm_biquad_casd_df1_inst_q15 * S,
- uint8_t numStages,
- q15_t * pCoeffs,
- q15_t * pState,
- int8_t postShift);
-
+ arm_biquad_casd_df1_inst_q15 * S,
+ uint8_t numStages,
+ const q15_t * pCoeffs,
+ q15_t * pState,
+ int8_t postShift);
/**
* @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
@@ -1232,10 +1295,9 @@
*/
void arm_biquad_cascade_df1_fast_q15(
const arm_biquad_casd_df1_inst_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
* @brief Processing function for the Q31 Biquad cascade filter
@@ -1246,10 +1308,9 @@
*/
void arm_biquad_cascade_df1_q31(
const arm_biquad_casd_df1_inst_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
* @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
@@ -1260,10 +1321,9 @@
*/
void arm_biquad_cascade_df1_fast_q31(
const arm_biquad_casd_df1_inst_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
* @brief Initialization function for the Q31 Biquad cascade filter.
@@ -1274,12 +1334,11 @@
* @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format
*/
void arm_biquad_cascade_df1_init_q31(
- arm_biquad_casd_df1_inst_q31 * S,
- uint8_t numStages,
- q31_t * pCoeffs,
- q31_t * pState,
- int8_t postShift);
-
+ arm_biquad_casd_df1_inst_q31 * S,
+ uint8_t numStages,
+ const q31_t * pCoeffs,
+ q31_t * pState,
+ int8_t postShift);
/**
* @brief Processing function for the floating-point Biquad cascade filter.
@@ -1290,10 +1349,9 @@
*/
void arm_biquad_cascade_df1_f32(
const arm_biquad_casd_df1_inst_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
* @brief Initialization function for the floating-point Biquad cascade filter.
@@ -1303,11 +1361,10 @@
* @param[in] pState points to the state buffer.
*/
void arm_biquad_cascade_df1_init_f32(
- arm_biquad_casd_df1_inst_f32 * S,
- uint8_t numStages,
- float32_t * pCoeffs,
- float32_t * pState);
-
+ arm_biquad_casd_df1_inst_f32 * S,
+ uint8_t numStages,
+ const float32_t * pCoeffs,
+ float32_t * pState);
/**
* @brief Instance structure for the floating-point matrix structure.
@@ -1350,7 +1407,6 @@
q31_t *pData; /**< points to the data of the matrix. */
} arm_matrix_instance_q31;
-
/**
* @brief Floating-point matrix addition.
* @param[in] pSrcA points to the first input matrix structure
@@ -1359,11 +1415,10 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_add_f32(
+arm_status arm_mat_add_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst);
-
+ arm_matrix_instance_f32 * pDst);
/**
* @brief Q15 matrix addition.
@@ -1373,11 +1428,10 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_add_q15(
+arm_status arm_mat_add_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst);
-
+ arm_matrix_instance_q15 * pDst);
/**
* @brief Q31 matrix addition.
@@ -1387,11 +1441,10 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_add_q31(
+arm_status arm_mat_add_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst);
-
+ arm_matrix_instance_q31 * pDst);
/**
* @brief Floating-point, complex, matrix multiplication.
@@ -1401,11 +1454,10 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_cmplx_mult_f32(
+arm_status arm_mat_cmplx_mult_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst);
-
+ arm_matrix_instance_f32 * pDst);
/**
* @brief Q15, complex, matrix multiplication.
@@ -1415,12 +1467,11 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_cmplx_mult_q15(
+arm_status arm_mat_cmplx_mult_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst,
- q15_t * pScratch);
-
+ arm_matrix_instance_q15 * pDst,
+ q15_t * pScratch);
/**
* @brief Q31, complex, matrix multiplication.
@@ -1430,11 +1481,10 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_cmplx_mult_q31(
+arm_status arm_mat_cmplx_mult_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst);
-
+ arm_matrix_instance_q31 * pDst);
/**
* @brief Floating-point matrix transpose.
@@ -1443,10 +1493,9 @@
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_trans_f32(
+arm_status arm_mat_trans_f32(
const arm_matrix_instance_f32 * pSrc,
- arm_matrix_instance_f32 * pDst);
-
+ arm_matrix_instance_f32 * pDst);
/**
* @brief Q15 matrix transpose.
@@ -1455,10 +1504,9 @@
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_trans_q15(
+arm_status arm_mat_trans_q15(
const arm_matrix_instance_q15 * pSrc,
- arm_matrix_instance_q15 * pDst);
-
+ arm_matrix_instance_q15 * pDst);
/**
* @brief Q31 matrix transpose.
@@ -1467,10 +1515,9 @@
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_trans_q31(
+arm_status arm_mat_trans_q31(
const arm_matrix_instance_q31 * pSrc,
- arm_matrix_instance_q31 * pDst);
-
+ arm_matrix_instance_q31 * pDst);
/**
* @brief Floating-point matrix multiplication
@@ -1480,11 +1527,10 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_mult_f32(
+arm_status arm_mat_mult_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst);
-
+ arm_matrix_instance_f32 * pDst);
/**
* @brief Q15 matrix multiplication
@@ -1495,12 +1541,11 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_mult_q15(
+arm_status arm_mat_mult_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst,
- q15_t * pState);
-
+ arm_matrix_instance_q15 * pDst,
+ q15_t * pState);
/**
* @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
@@ -1511,12 +1556,11 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_mult_fast_q15(
+arm_status arm_mat_mult_fast_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst,
- q15_t * pState);
-
+ arm_matrix_instance_q15 * pDst,
+ q15_t * pState);
/**
* @brief Q31 matrix multiplication
@@ -1526,11 +1570,10 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_mult_q31(
+arm_status arm_mat_mult_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst);
-
+ arm_matrix_instance_q31 * pDst);
/**
* @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
@@ -1540,11 +1583,10 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_mult_fast_q31(
+arm_status arm_mat_mult_fast_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst);
-
+ arm_matrix_instance_q31 * pDst);
/**
* @brief Floating-point matrix subtraction
@@ -1554,11 +1596,10 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_sub_f32(
+arm_status arm_mat_sub_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst);
-
+ arm_matrix_instance_f32 * pDst);
/**
* @brief Q15 matrix subtraction
@@ -1568,11 +1609,10 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_sub_q15(
+arm_status arm_mat_sub_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst);
-
+ arm_matrix_instance_q15 * pDst);
/**
* @brief Q31 matrix subtraction
@@ -1582,11 +1622,10 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_sub_q31(
+arm_status arm_mat_sub_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst);
-
+ arm_matrix_instance_q31 * pDst);
/**
* @brief Floating-point matrix scaling.
@@ -1596,11 +1635,10 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_scale_f32(
+arm_status arm_mat_scale_f32(
const arm_matrix_instance_f32 * pSrc,
- float32_t scale,
- arm_matrix_instance_f32 * pDst);
-
+ float32_t scale,
+ arm_matrix_instance_f32 * pDst);
/**
* @brief Q15 matrix scaling.
@@ -1611,12 +1649,11 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_scale_q15(
+arm_status arm_mat_scale_q15(
const arm_matrix_instance_q15 * pSrc,
- q15_t scaleFract,
- int32_t shift,
- arm_matrix_instance_q15 * pDst);
-
+ q15_t scaleFract,
+ int32_t shift,
+ arm_matrix_instance_q15 * pDst);
/**
* @brief Q31 matrix scaling.
@@ -1627,12 +1664,11 @@
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
- arm_status arm_mat_scale_q31(
+arm_status arm_mat_scale_q31(
const arm_matrix_instance_q31 * pSrc,
- q31_t scaleFract,
- int32_t shift,
- arm_matrix_instance_q31 * pDst);
-
+ q31_t scaleFract,
+ int32_t shift,
+ arm_matrix_instance_q31 * pDst);
/**
* @brief Q31 matrix initialization.
@@ -1641,12 +1677,11 @@
* @param[in] nColumns number of columns in the matrix.
* @param[in] pData points to the matrix data array.
*/
- void arm_mat_init_q31(
- arm_matrix_instance_q31 * S,
- uint16_t nRows,
- uint16_t nColumns,
- q31_t * pData);
-
+void arm_mat_init_q31(
+ arm_matrix_instance_q31 * S,
+ uint16_t nRows,
+ uint16_t nColumns,
+ q31_t * pData);
/**
* @brief Q15 matrix initialization.
@@ -1655,12 +1690,11 @@
* @param[in] nColumns number of columns in the matrix.
* @param[in] pData points to the matrix data array.
*/
- void arm_mat_init_q15(
- arm_matrix_instance_q15 * S,
- uint16_t nRows,
- uint16_t nColumns,
- q15_t * pData);
-
+void arm_mat_init_q15(
+ arm_matrix_instance_q15 * S,
+ uint16_t nRows,
+ uint16_t nColumns,
+ q15_t * pData);
/**
* @brief Floating-point matrix initialization.
@@ -1669,12 +1703,11 @@
* @param[in] nColumns number of columns in the matrix.
* @param[in] pData points to the matrix data array.
*/
- void arm_mat_init_f32(
- arm_matrix_instance_f32 * S,
- uint16_t nRows,
- uint16_t nColumns,
- float32_t * pData);
-
+void arm_mat_init_f32(
+ arm_matrix_instance_f32 * S,
+ uint16_t nRows,
+ uint16_t nColumns,
+ float32_t * pData);
/**
@@ -1682,17 +1715,17 @@
*/
typedef struct
{
- q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
+ q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
#if !defined (ARM_MATH_DSP)
- q15_t A1;
- q15_t A2;
+ q15_t A1;
+ q15_t A2;
#else
- q31_t A1; /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
+ q31_t A1; /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
#endif
- q15_t state[3]; /**< The state array of length 3. */
- q15_t Kp; /**< The proportional gain. */
- q15_t Ki; /**< The integral gain. */
- q15_t Kd; /**< The derivative gain. */
+ q15_t state[3]; /**< The state array of length 3. */
+ q15_t Kp; /**< The proportional gain. */
+ q15_t Ki; /**< The integral gain. */
+ q15_t Kd; /**< The derivative gain. */
} arm_pid_instance_q15;
/**
@@ -1700,13 +1733,13 @@
*/
typedef struct
{
- q31_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
- q31_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */
- q31_t A2; /**< The derived gain, A2 = Kd . */
- q31_t state[3]; /**< The state array of length 3. */
- q31_t Kp; /**< The proportional gain. */
- q31_t Ki; /**< The integral gain. */
- q31_t Kd; /**< The derivative gain. */
+ q31_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
+ q31_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */
+ q31_t A2; /**< The derived gain, A2 = Kd . */
+ q31_t state[3]; /**< The state array of length 3. */
+ q31_t Kp; /**< The proportional gain. */
+ q31_t Ki; /**< The integral gain. */
+ q31_t Kd; /**< The derivative gain. */
} arm_pid_instance_q31;
/**
@@ -1714,13 +1747,13 @@
*/
typedef struct
{
- float32_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
- float32_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */
- float32_t A2; /**< The derived gain, A2 = Kd . */
- float32_t state[3]; /**< The state array of length 3. */
- float32_t Kp; /**< The proportional gain. */
- float32_t Ki; /**< The integral gain. */
- float32_t Kd; /**< The derivative gain. */
+ float32_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
+ float32_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */
+ float32_t A2; /**< The derived gain, A2 = Kd . */
+ float32_t state[3]; /**< The state array of length 3. */
+ float32_t Kp; /**< The proportional gain. */
+ float32_t Ki; /**< The integral gain. */
+ float32_t Kd; /**< The derivative gain. */
} arm_pid_instance_f32;
@@ -1731,8 +1764,8 @@
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
*/
void arm_pid_init_f32(
- arm_pid_instance_f32 * S,
- int32_t resetStateFlag);
+ arm_pid_instance_f32 * S,
+ int32_t resetStateFlag);
/**
@@ -1740,7 +1773,7 @@
* @param[in,out] S is an instance of the floating-point PID Control structure
*/
void arm_pid_reset_f32(
- arm_pid_instance_f32 * S);
+ arm_pid_instance_f32 * S);
/**
@@ -1749,8 +1782,8 @@
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
*/
void arm_pid_init_q31(
- arm_pid_instance_q31 * S,
- int32_t resetStateFlag);
+ arm_pid_instance_q31 * S,
+ int32_t resetStateFlag);
/**
@@ -1759,7 +1792,7 @@
*/
void arm_pid_reset_q31(
- arm_pid_instance_q31 * S);
+ arm_pid_instance_q31 * S);
/**
@@ -1768,8 +1801,8 @@
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
*/
void arm_pid_init_q15(
- arm_pid_instance_q15 * S,
- int32_t resetStateFlag);
+ arm_pid_instance_q15 * S,
+ int32_t resetStateFlag);
/**
@@ -1777,7 +1810,7 @@
* @param[in,out] S points to an instance of the q15 PID Control structure
*/
void arm_pid_reset_q15(
- arm_pid_instance_q15 * S);
+ arm_pid_instance_q15 * S);
/**
@@ -1785,10 +1818,10 @@
*/
typedef struct
{
- uint32_t nValues; /**< nValues */
- float32_t x1; /**< x1 */
- float32_t xSpacing; /**< xSpacing */
- float32_t *pYData; /**< pointer to the table of Y values */
+ uint32_t nValues; /**< nValues */
+ float32_t x1; /**< x1 */
+ float32_t xSpacing; /**< xSpacing */
+ float32_t *pYData; /**< pointer to the table of Y values */
} arm_linear_interp_instance_f32;
/**
@@ -1796,9 +1829,9 @@
*/
typedef struct
{
- uint16_t numRows; /**< number of rows in the data table. */
- uint16_t numCols; /**< number of columns in the data table. */
- float32_t *pData; /**< points to the data table. */
+ uint16_t numRows; /**< number of rows in the data table. */
+ uint16_t numCols; /**< number of columns in the data table. */
+ float32_t *pData; /**< points to the data table. */
} arm_bilinear_interp_instance_f32;
/**
@@ -1806,9 +1839,9 @@
*/
typedef struct
{
- uint16_t numRows; /**< number of rows in the data table. */
- uint16_t numCols; /**< number of columns in the data table. */
- q31_t *pData; /**< points to the data table. */
+ uint16_t numRows; /**< number of rows in the data table. */
+ uint16_t numCols; /**< number of columns in the data table. */
+ q31_t *pData; /**< points to the data table. */
} arm_bilinear_interp_instance_q31;
/**
@@ -1816,9 +1849,9 @@
*/
typedef struct
{
- uint16_t numRows; /**< number of rows in the data table. */
- uint16_t numCols; /**< number of columns in the data table. */
- q15_t *pData; /**< points to the data table. */
+ uint16_t numRows; /**< number of rows in the data table. */
+ uint16_t numCols; /**< number of columns in the data table. */
+ q15_t *pData; /**< points to the data table. */
} arm_bilinear_interp_instance_q15;
/**
@@ -1826,9 +1859,9 @@
*/
typedef struct
{
- uint16_t numRows; /**< number of rows in the data table. */
- uint16_t numCols; /**< number of columns in the data table. */
- q7_t *pData; /**< points to the data table. */
+ uint16_t numRows; /**< number of rows in the data table. */
+ uint16_t numCols; /**< number of columns in the data table. */
+ q7_t *pData; /**< points to the data table. */
} arm_bilinear_interp_instance_q7;
@@ -1840,10 +1873,10 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_mult_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize);
+ const q7_t * pSrcA,
+ const q7_t * pSrcB,
+ q7_t * pDst,
+ uint32_t blockSize);
/**
@@ -1854,10 +1887,10 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_mult_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrcA,
+ const q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -1868,10 +1901,10 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_mult_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrcA,
+ const q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -1882,10 +1915,10 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_mult_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrcA,
+ const float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -1893,26 +1926,26 @@
*/
typedef struct
{
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- q15_t *pTwiddle; /**< points to the Sin twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+ uint16_t fftLen; /**< length of the FFT. */
+ uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+ uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+ const q15_t *pTwiddle; /**< points to the Sin twiddle factor table. */
+ const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
} arm_cfft_radix2_instance_q15;
/* Deprecated */
arm_status arm_cfft_radix2_init_q15(
- arm_cfft_radix2_instance_q15 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
+ arm_cfft_radix2_instance_q15 * S,
+ uint16_t fftLen,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
/* Deprecated */
void arm_cfft_radix2_q15(
const arm_cfft_radix2_instance_q15 * S,
- q15_t * pSrc);
+ q15_t * pSrc);
/**
@@ -1920,274 +1953,274 @@
*/
typedef struct
{
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- q15_t *pTwiddle; /**< points to the twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+ uint16_t fftLen; /**< length of the FFT. */
+ uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+ uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+ const q15_t *pTwiddle; /**< points to the twiddle factor table. */
+ const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
} arm_cfft_radix4_instance_q15;
/* Deprecated */
arm_status arm_cfft_radix4_init_q15(
- arm_cfft_radix4_instance_q15 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
+ arm_cfft_radix4_instance_q15 * S,
+ uint16_t fftLen,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
/* Deprecated */
void arm_cfft_radix4_q15(
const arm_cfft_radix4_instance_q15 * S,
- q15_t * pSrc);
+ q15_t * pSrc);
/**
* @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
*/
typedef struct
{
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- q31_t *pTwiddle; /**< points to the Twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+ uint16_t fftLen; /**< length of the FFT. */
+ uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+ uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+ const q31_t *pTwiddle; /**< points to the Twiddle factor table. */
+ const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
} arm_cfft_radix2_instance_q31;
/* Deprecated */
arm_status arm_cfft_radix2_init_q31(
- arm_cfft_radix2_instance_q31 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
+ arm_cfft_radix2_instance_q31 * S,
+ uint16_t fftLen,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
/* Deprecated */
void arm_cfft_radix2_q31(
const arm_cfft_radix2_instance_q31 * S,
- q31_t * pSrc);
+ q31_t * pSrc);
/**
* @brief Instance structure for the Q31 CFFT/CIFFT function.
*/
typedef struct
{
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- q31_t *pTwiddle; /**< points to the twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+ uint16_t fftLen; /**< length of the FFT. */
+ uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+ uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+ const q31_t *pTwiddle; /**< points to the twiddle factor table. */
+ const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
} arm_cfft_radix4_instance_q31;
/* Deprecated */
void arm_cfft_radix4_q31(
const arm_cfft_radix4_instance_q31 * S,
- q31_t * pSrc);
+ q31_t * pSrc);
/* Deprecated */
arm_status arm_cfft_radix4_init_q31(
- arm_cfft_radix4_instance_q31 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
+ arm_cfft_radix4_instance_q31 * S,
+ uint16_t fftLen,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
/**
* @brief Instance structure for the floating-point CFFT/CIFFT function.
*/
typedef struct
{
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- float32_t *pTwiddle; /**< points to the Twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
- float32_t onebyfftLen; /**< value of 1/fftLen. */
+ uint16_t fftLen; /**< length of the FFT. */
+ uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+ uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+ const float32_t *pTwiddle; /**< points to the Twiddle factor table. */
+ const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+ float32_t onebyfftLen; /**< value of 1/fftLen. */
} arm_cfft_radix2_instance_f32;
/* Deprecated */
arm_status arm_cfft_radix2_init_f32(
- arm_cfft_radix2_instance_f32 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
+ arm_cfft_radix2_instance_f32 * S,
+ uint16_t fftLen,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
/* Deprecated */
void arm_cfft_radix2_f32(
const arm_cfft_radix2_instance_f32 * S,
- float32_t * pSrc);
+ float32_t * pSrc);
/**
* @brief Instance structure for the floating-point CFFT/CIFFT function.
*/
typedef struct
{
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- float32_t *pTwiddle; /**< points to the Twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
- float32_t onebyfftLen; /**< value of 1/fftLen. */
+ uint16_t fftLen; /**< length of the FFT. */
+ uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+ uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+ const float32_t *pTwiddle; /**< points to the Twiddle factor table. */
+ const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+ float32_t onebyfftLen; /**< value of 1/fftLen. */
} arm_cfft_radix4_instance_f32;
/* Deprecated */
arm_status arm_cfft_radix4_init_f32(
- arm_cfft_radix4_instance_f32 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
+ arm_cfft_radix4_instance_f32 * S,
+ uint16_t fftLen,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
/* Deprecated */
void arm_cfft_radix4_f32(
const arm_cfft_radix4_instance_f32 * S,
- float32_t * pSrc);
+ float32_t * pSrc);
/**
* @brief Instance structure for the fixed-point CFFT/CIFFT function.
*/
typedef struct
{
- uint16_t fftLen; /**< length of the FFT. */
+ uint16_t fftLen; /**< length of the FFT. */
const q15_t *pTwiddle; /**< points to the Twiddle factor table. */
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t bitRevLength; /**< bit reversal table length. */
+ uint16_t bitRevLength; /**< bit reversal table length. */
} arm_cfft_instance_q15;
void arm_cfft_q15(
const arm_cfft_instance_q15 * S,
- q15_t * p1,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
+ q15_t * p1,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
/**
* @brief Instance structure for the fixed-point CFFT/CIFFT function.
*/
typedef struct
{
- uint16_t fftLen; /**< length of the FFT. */
+ uint16_t fftLen; /**< length of the FFT. */
const q31_t *pTwiddle; /**< points to the Twiddle factor table. */
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t bitRevLength; /**< bit reversal table length. */
+ uint16_t bitRevLength; /**< bit reversal table length. */
} arm_cfft_instance_q31;
void arm_cfft_q31(
const arm_cfft_instance_q31 * S,
- q31_t * p1,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
+ q31_t * p1,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
/**
* @brief Instance structure for the floating-point CFFT/CIFFT function.
*/
typedef struct
{
- uint16_t fftLen; /**< length of the FFT. */
+ uint16_t fftLen; /**< length of the FFT. */
const float32_t *pTwiddle; /**< points to the Twiddle factor table. */
const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t bitRevLength; /**< bit reversal table length. */
+ uint16_t bitRevLength; /**< bit reversal table length. */
} arm_cfft_instance_f32;
void arm_cfft_f32(
const arm_cfft_instance_f32 * S,
- float32_t * p1,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
+ float32_t * p1,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
/**
* @brief Instance structure for the Q15 RFFT/RIFFT function.
*/
typedef struct
{
- uint32_t fftLenReal; /**< length of the real FFT. */
- uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
- uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
- uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- q15_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
- q15_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
+ uint32_t fftLenReal; /**< length of the real FFT. */
+ uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+ uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+ uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ const q15_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
+ const q15_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
const arm_cfft_instance_q15 *pCfft; /**< points to the complex FFT instance. */
} arm_rfft_instance_q15;
arm_status arm_rfft_init_q15(
- arm_rfft_instance_q15 * S,
- uint32_t fftLenReal,
- uint32_t ifftFlagR,
- uint32_t bitReverseFlag);
+ arm_rfft_instance_q15 * S,
+ uint32_t fftLenReal,
+ uint32_t ifftFlagR,
+ uint32_t bitReverseFlag);
void arm_rfft_q15(
const arm_rfft_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst);
+ q15_t * pSrc,
+ q15_t * pDst);
/**
* @brief Instance structure for the Q31 RFFT/RIFFT function.
*/
typedef struct
{
- uint32_t fftLenReal; /**< length of the real FFT. */
- uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
- uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
- uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- q31_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
- q31_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
+ uint32_t fftLenReal; /**< length of the real FFT. */
+ uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+ uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+ uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ const q31_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
+ const q31_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
const arm_cfft_instance_q31 *pCfft; /**< points to the complex FFT instance. */
} arm_rfft_instance_q31;
arm_status arm_rfft_init_q31(
- arm_rfft_instance_q31 * S,
- uint32_t fftLenReal,
- uint32_t ifftFlagR,
- uint32_t bitReverseFlag);
+ arm_rfft_instance_q31 * S,
+ uint32_t fftLenReal,
+ uint32_t ifftFlagR,
+ uint32_t bitReverseFlag);
void arm_rfft_q31(
const arm_rfft_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst);
+ q31_t * pSrc,
+ q31_t * pDst);
/**
* @brief Instance structure for the floating-point RFFT/RIFFT function.
*/
typedef struct
{
- uint32_t fftLenReal; /**< length of the real FFT. */
- uint16_t fftLenBy2; /**< length of the complex FFT. */
- uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
- uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
- uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- float32_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
- float32_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
- arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
+ uint32_t fftLenReal; /**< length of the real FFT. */
+ uint16_t fftLenBy2; /**< length of the complex FFT. */
+ uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+ uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+ uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ const float32_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
+ const float32_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
+ arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
} arm_rfft_instance_f32;
arm_status arm_rfft_init_f32(
- arm_rfft_instance_f32 * S,
- arm_cfft_radix4_instance_f32 * S_CFFT,
- uint32_t fftLenReal,
- uint32_t ifftFlagR,
- uint32_t bitReverseFlag);
+ arm_rfft_instance_f32 * S,
+ arm_cfft_radix4_instance_f32 * S_CFFT,
+ uint32_t fftLenReal,
+ uint32_t ifftFlagR,
+ uint32_t bitReverseFlag);
void arm_rfft_f32(
const arm_rfft_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst);
+ float32_t * pSrc,
+ float32_t * pDst);
/**
* @brief Instance structure for the floating-point RFFT/RIFFT function.
*/
typedef struct
{
- arm_cfft_instance_f32 Sint; /**< Internal CFFT structure. */
- uint16_t fftLenRFFT; /**< length of the real sequence */
- float32_t * pTwiddleRFFT; /**< Twiddle factors real stage */
+ arm_cfft_instance_f32 Sint; /**< Internal CFFT structure. */
+ uint16_t fftLenRFFT; /**< length of the real sequence */
+ const float32_t * pTwiddleRFFT; /**< Twiddle factors real stage */
} arm_rfft_fast_instance_f32 ;
arm_status arm_rfft_fast_init_f32 (
- arm_rfft_fast_instance_f32 * S,
- uint16_t fftLen);
+ arm_rfft_fast_instance_f32 * S,
+ uint16_t fftLen);
arm_status arm_rfft_32_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
@@ -2206,23 +2239,23 @@
arm_status arm_rfft_4096_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
-void arm_rfft_fast_f32(
- arm_rfft_fast_instance_f32 * S,
- float32_t * p, float32_t * pOut,
- uint8_t ifftFlag);
+ void arm_rfft_fast_f32(
+ arm_rfft_fast_instance_f32 * S,
+ float32_t * p, float32_t * pOut,
+ uint8_t ifftFlag);
/**
* @brief Instance structure for the floating-point DCT4/IDCT4 function.
*/
typedef struct
{
- uint16_t N; /**< length of the DCT4. */
- uint16_t Nby2; /**< half of the length of the DCT4. */
- float32_t normalize; /**< normalizing factor. */
- float32_t *pTwiddle; /**< points to the twiddle factor table. */
- float32_t *pCosFactor; /**< points to the cosFactor table. */
- arm_rfft_instance_f32 *pRfft; /**< points to the real FFT instance. */
- arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
+ uint16_t N; /**< length of the DCT4. */
+ uint16_t Nby2; /**< half of the length of the DCT4. */
+ float32_t normalize; /**< normalizing factor. */
+ const float32_t *pTwiddle; /**< points to the twiddle factor table. */
+ const float32_t *pCosFactor; /**< points to the cosFactor table. */
+ arm_rfft_instance_f32 *pRfft; /**< points to the real FFT instance. */
+ arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
} arm_dct4_instance_f32;
@@ -2237,12 +2270,12 @@
* @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
*/
arm_status arm_dct4_init_f32(
- arm_dct4_instance_f32 * S,
- arm_rfft_instance_f32 * S_RFFT,
- arm_cfft_radix4_instance_f32 * S_CFFT,
- uint16_t N,
- uint16_t Nby2,
- float32_t normalize);
+ arm_dct4_instance_f32 * S,
+ arm_rfft_instance_f32 * S_RFFT,
+ arm_cfft_radix4_instance_f32 * S_CFFT,
+ uint16_t N,
+ uint16_t Nby2,
+ float32_t normalize);
/**
@@ -2253,8 +2286,8 @@
*/
void arm_dct4_f32(
const arm_dct4_instance_f32 * S,
- float32_t * pState,
- float32_t * pInlineBuffer);
+ float32_t * pState,
+ float32_t * pInlineBuffer);
/**
@@ -2262,13 +2295,13 @@
*/
typedef struct
{
- uint16_t N; /**< length of the DCT4. */
- uint16_t Nby2; /**< half of the length of the DCT4. */
- q31_t normalize; /**< normalizing factor. */
- q31_t *pTwiddle; /**< points to the twiddle factor table. */
- q31_t *pCosFactor; /**< points to the cosFactor table. */
- arm_rfft_instance_q31 *pRfft; /**< points to the real FFT instance. */
- arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
+ uint16_t N; /**< length of the DCT4. */
+ uint16_t Nby2; /**< half of the length of the DCT4. */
+ q31_t normalize; /**< normalizing factor. */
+ const q31_t *pTwiddle; /**< points to the twiddle factor table. */
+ const q31_t *pCosFactor; /**< points to the cosFactor table. */
+ arm_rfft_instance_q31 *pRfft; /**< points to the real FFT instance. */
+ arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
} arm_dct4_instance_q31;
@@ -2283,12 +2316,12 @@
* @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
*/
arm_status arm_dct4_init_q31(
- arm_dct4_instance_q31 * S,
- arm_rfft_instance_q31 * S_RFFT,
- arm_cfft_radix4_instance_q31 * S_CFFT,
- uint16_t N,
- uint16_t Nby2,
- q31_t normalize);
+ arm_dct4_instance_q31 * S,
+ arm_rfft_instance_q31 * S_RFFT,
+ arm_cfft_radix4_instance_q31 * S_CFFT,
+ uint16_t N,
+ uint16_t Nby2,
+ q31_t normalize);
/**
@@ -2299,8 +2332,8 @@
*/
void arm_dct4_q31(
const arm_dct4_instance_q31 * S,
- q31_t * pState,
- q31_t * pInlineBuffer);
+ q31_t * pState,
+ q31_t * pInlineBuffer);
/**
@@ -2308,13 +2341,13 @@
*/
typedef struct
{
- uint16_t N; /**< length of the DCT4. */
- uint16_t Nby2; /**< half of the length of the DCT4. */
- q15_t normalize; /**< normalizing factor. */
- q15_t *pTwiddle; /**< points to the twiddle factor table. */
- q15_t *pCosFactor; /**< points to the cosFactor table. */
- arm_rfft_instance_q15 *pRfft; /**< points to the real FFT instance. */
- arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
+ uint16_t N; /**< length of the DCT4. */
+ uint16_t Nby2; /**< half of the length of the DCT4. */
+ q15_t normalize; /**< normalizing factor. */
+ const q15_t *pTwiddle; /**< points to the twiddle factor table. */
+ const q15_t *pCosFactor; /**< points to the cosFactor table. */
+ arm_rfft_instance_q15 *pRfft; /**< points to the real FFT instance. */
+ arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
} arm_dct4_instance_q15;
@@ -2329,12 +2362,12 @@
* @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
*/
arm_status arm_dct4_init_q15(
- arm_dct4_instance_q15 * S,
- arm_rfft_instance_q15 * S_RFFT,
- arm_cfft_radix4_instance_q15 * S_CFFT,
- uint16_t N,
- uint16_t Nby2,
- q15_t normalize);
+ arm_dct4_instance_q15 * S,
+ arm_rfft_instance_q15 * S_RFFT,
+ arm_cfft_radix4_instance_q15 * S_CFFT,
+ uint16_t N,
+ uint16_t Nby2,
+ q15_t normalize);
/**
@@ -2345,8 +2378,8 @@
*/
void arm_dct4_q15(
const arm_dct4_instance_q15 * S,
- q15_t * pState,
- q15_t * pInlineBuffer);
+ q15_t * pState,
+ q15_t * pInlineBuffer);
/**
@@ -2357,10 +2390,10 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_add_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrcA,
+ const float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -2371,10 +2404,10 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_add_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize);
+ const q7_t * pSrcA,
+ const q7_t * pSrcB,
+ q7_t * pDst,
+ uint32_t blockSize);
/**
@@ -2385,10 +2418,10 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_add_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrcA,
+ const q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -2399,10 +2432,10 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_add_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrcA,
+ const q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -2413,10 +2446,10 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_sub_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrcA,
+ const float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -2427,10 +2460,10 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_sub_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize);
+ const q7_t * pSrcA,
+ const q7_t * pSrcB,
+ q7_t * pDst,
+ uint32_t blockSize);
/**
@@ -2441,10 +2474,10 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_sub_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrcA,
+ const q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -2455,10 +2488,10 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_sub_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrcA,
+ const q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -2469,10 +2502,10 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_scale_f32(
- float32_t * pSrc,
- float32_t scale,
- float32_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ float32_t scale,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -2484,11 +2517,11 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_scale_q7(
- q7_t * pSrc,
- q7_t scaleFract,
- int8_t shift,
- q7_t * pDst,
- uint32_t blockSize);
+ const q7_t * pSrc,
+ q7_t scaleFract,
+ int8_t shift,
+ q7_t * pDst,
+ uint32_t blockSize);
/**
@@ -2500,11 +2533,11 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_scale_q15(
- q15_t * pSrc,
- q15_t scaleFract,
- int8_t shift,
- q15_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ q15_t scaleFract,
+ int8_t shift,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -2516,11 +2549,11 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_scale_q31(
- q31_t * pSrc,
- q31_t scaleFract,
- int8_t shift,
- q31_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrc,
+ q31_t scaleFract,
+ int8_t shift,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -2530,9 +2563,9 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_abs_q7(
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
+ const q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
/**
@@ -2542,9 +2575,9 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_abs_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -2554,9 +2587,9 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_abs_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -2566,9 +2599,9 @@
* @param[in] blockSize number of samples in each vector
*/
void arm_abs_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -2579,10 +2612,10 @@
* @param[out] result output result returned here
*/
void arm_dot_prod_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- uint32_t blockSize,
- float32_t * result);
+ const float32_t * pSrcA,
+ const float32_t * pSrcB,
+ uint32_t blockSize,
+ float32_t * result);
/**
@@ -2593,10 +2626,10 @@
* @param[out] result output result returned here
*/
void arm_dot_prod_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- uint32_t blockSize,
- q31_t * result);
+ const q7_t * pSrcA,
+ const q7_t * pSrcB,
+ uint32_t blockSize,
+ q31_t * result);
/**
@@ -2607,10 +2640,10 @@
* @param[out] result output result returned here
*/
void arm_dot_prod_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- uint32_t blockSize,
- q63_t * result);
+ const q15_t * pSrcA,
+ const q15_t * pSrcB,
+ uint32_t blockSize,
+ q63_t * result);
/**
@@ -2621,10 +2654,10 @@
* @param[out] result output result returned here
*/
void arm_dot_prod_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- uint32_t blockSize,
- q63_t * result);
+ const q31_t * pSrcA,
+ const q31_t * pSrcB,
+ uint32_t blockSize,
+ q63_t * result);
/**
@@ -2635,10 +2668,10 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_shift_q7(
- q7_t * pSrc,
- int8_t shiftBits,
- q7_t * pDst,
- uint32_t blockSize);
+ const q7_t * pSrc,
+ int8_t shiftBits,
+ q7_t * pDst,
+ uint32_t blockSize);
/**
@@ -2649,10 +2682,10 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_shift_q15(
- q15_t * pSrc,
- int8_t shiftBits,
- q15_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ int8_t shiftBits,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -2663,10 +2696,10 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_shift_q31(
- q31_t * pSrc,
- int8_t shiftBits,
- q31_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrc,
+ int8_t shiftBits,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -2677,10 +2710,10 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_offset_f32(
- float32_t * pSrc,
- float32_t offset,
- float32_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ float32_t offset,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -2691,10 +2724,10 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_offset_q7(
- q7_t * pSrc,
- q7_t offset,
- q7_t * pDst,
- uint32_t blockSize);
+ const q7_t * pSrc,
+ q7_t offset,
+ q7_t * pDst,
+ uint32_t blockSize);
/**
@@ -2705,10 +2738,10 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_offset_q15(
- q15_t * pSrc,
- q15_t offset,
- q15_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ q15_t offset,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -2719,10 +2752,10 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_offset_q31(
- q31_t * pSrc,
- q31_t offset,
- q31_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrc,
+ q31_t offset,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -2732,9 +2765,9 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_negate_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -2744,9 +2777,9 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_negate_q7(
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
+ const q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
/**
@@ -2756,9 +2789,9 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_negate_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -2768,9 +2801,9 @@
* @param[in] blockSize number of samples in the vector
*/
void arm_negate_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -2780,9 +2813,9 @@
* @param[in] blockSize number of samples to process
*/
void arm_copy_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -2792,9 +2825,9 @@
* @param[in] blockSize number of samples to process
*/
void arm_copy_q7(
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
+ const q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
/**
@@ -2804,9 +2837,9 @@
* @param[in] blockSize number of samples to process
*/
void arm_copy_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -2816,9 +2849,9 @@
* @param[in] blockSize number of samples to process
*/
void arm_copy_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -2828,9 +2861,9 @@
* @param[in] blockSize number of samples to process
*/
void arm_fill_f32(
- float32_t value,
- float32_t * pDst,
- uint32_t blockSize);
+ float32_t value,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -2840,9 +2873,9 @@
* @param[in] blockSize number of samples to process
*/
void arm_fill_q7(
- q7_t value,
- q7_t * pDst,
- uint32_t blockSize);
+ q7_t value,
+ q7_t * pDst,
+ uint32_t blockSize);
/**
@@ -2852,9 +2885,9 @@
* @param[in] blockSize number of samples to process
*/
void arm_fill_q15(
- q15_t value,
- q15_t * pDst,
- uint32_t blockSize);
+ q15_t value,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -2864,9 +2897,9 @@
* @param[in] blockSize number of samples to process
*/
void arm_fill_q31(
- q31_t value,
- q31_t * pDst,
- uint32_t blockSize);
+ q31_t value,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -2878,11 +2911,11 @@
* @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
*/
void arm_conv_f32(
- float32_t * pSrcA,
- uint32_t srcALen,
- float32_t * pSrcB,
- uint32_t srcBLen,
- float32_t * pDst);
+ const float32_t * pSrcA,
+ uint32_t srcALen,
+ const float32_t * pSrcB,
+ uint32_t srcBLen,
+ float32_t * pDst);
/**
@@ -2896,13 +2929,13 @@
* @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
*/
void arm_conv_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2);
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ q15_t * pScratch1,
+ q15_t * pScratch2);
/**
@@ -2914,11 +2947,11 @@
* @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
*/
void arm_conv_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst);
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst);
/**
@@ -2930,11 +2963,11 @@
* @param[out] pDst points to the block of output data Length srcALen+srcBLen-1.
*/
void arm_conv_fast_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst);
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst);
/**
@@ -2948,13 +2981,13 @@
* @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
*/
void arm_conv_fast_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2);
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ q15_t * pScratch1,
+ q15_t * pScratch2);
/**
@@ -2966,11 +2999,11 @@
* @param[out] pDst points to the block of output data Length srcALen+srcBLen-1.
*/
void arm_conv_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst);
+ const q31_t * pSrcA,
+ uint32_t srcALen,
+ const q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst);
/**
@@ -2982,11 +3015,11 @@
* @param[out] pDst points to the block of output data Length srcALen+srcBLen-1.
*/
void arm_conv_fast_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst);
+ const q31_t * pSrcA,
+ uint32_t srcALen,
+ const q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst);
/**
@@ -3000,13 +3033,13 @@
* @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
*/
void arm_conv_opt_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2);
+ const q7_t * pSrcA,
+ uint32_t srcALen,
+ const q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst,
+ q15_t * pScratch1,
+ q15_t * pScratch2);
/**
@@ -3018,11 +3051,11 @@
* @param[out] pDst points to the block of output data Length srcALen+srcBLen-1.
*/
void arm_conv_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst);
+ const q7_t * pSrcA,
+ uint32_t srcALen,
+ const q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst);
/**
@@ -3037,13 +3070,13 @@
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_f32(
- float32_t * pSrcA,
- uint32_t srcALen,
- float32_t * pSrcB,
- uint32_t srcBLen,
- float32_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
+ const float32_t * pSrcA,
+ uint32_t srcALen,
+ const float32_t * pSrcB,
+ uint32_t srcBLen,
+ float32_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints);
/**
@@ -3060,15 +3093,15 @@
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2);
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints,
+ q15_t * pScratch1,
+ q15_t * pScratch2);
/**
@@ -3083,13 +3116,13 @@
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints);
/**
@@ -3104,13 +3137,13 @@
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_fast_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints);
/**
@@ -3127,15 +3160,15 @@
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_fast_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2);
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints,
+ q15_t * pScratch1,
+ q15_t * pScratch2);
/**
@@ -3150,13 +3183,13 @@
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
+ const q31_t * pSrcA,
+ uint32_t srcALen,
+ const q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints);
/**
@@ -3171,13 +3204,13 @@
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_fast_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
+ const q31_t * pSrcA,
+ uint32_t srcALen,
+ const q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints);
/**
@@ -3194,15 +3227,15 @@
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_opt_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2);
+ const q7_t * pSrcA,
+ uint32_t srcALen,
+ const q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints,
+ q15_t * pScratch1,
+ q15_t * pScratch2);
/**
@@ -3217,13 +3250,13 @@
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
+ const q7_t * pSrcA,
+ uint32_t srcALen,
+ const q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints);
/**
@@ -3231,10 +3264,10 @@
*/
typedef struct
{
- uint8_t M; /**< decimation factor. */
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ uint8_t M; /**< decimation factor. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ const q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
} arm_fir_decimate_instance_q15;
/**
@@ -3242,56 +3275,57 @@
*/
typedef struct
{
- uint8_t M; /**< decimation factor. */
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ uint8_t M; /**< decimation factor. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ const q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
} arm_fir_decimate_instance_q31;
- /**
- * @brief Instance structure for the floating-point FIR decimator.
- */
- typedef struct
+/**
+ @brief Instance structure for floating-point FIR decimator.
+ */
+typedef struct
{
- uint8_t M; /**< decimation factor. */
- uint16_t numTaps; /**< number of coefficients in the filter. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ uint8_t M; /**< decimation factor. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
} arm_fir_decimate_instance_f32;
- /**
- * @brief Processing function for the floating-point FIR decimator.
- * @param[in] S points to an instance of the floating-point FIR decimator structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- */
- void arm_fir_decimate_f32(
+/**
+ @brief Processing function for floating-point FIR decimator.
+ @param[in] S points to an instance of the floating-point FIR decimator structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ */
+void arm_fir_decimate_f32(
const arm_fir_decimate_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
- /**
- * @brief Initialization function for the floating-point FIR decimator.
- * @param[in,out] S points to an instance of the floating-point FIR decimator structure.
- * @param[in] numTaps number of coefficients in the filter.
- * @param[in] M decimation factor.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
- * <code>blockSize</code> is not a multiple of <code>M</code>.
- */
- arm_status arm_fir_decimate_init_f32(
- arm_fir_decimate_instance_f32 * S,
- uint16_t numTaps,
- uint8_t M,
- float32_t * pCoeffs,
- float32_t * pState,
- uint32_t blockSize);
+/**
+ @brief Initialization function for the floating-point FIR decimator.
+ @param[in,out] S points to an instance of the floating-point FIR decimator structure
+ @param[in] numTaps number of coefficients in the filter
+ @param[in] M decimation factor
+ @param[in] pCoeffs points to the filter coefficients
+ @param[in] pState points to the state buffer
+ @param[in] blockSize number of input samples to process per call
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
+ */
+arm_status arm_fir_decimate_init_f32(
+ arm_fir_decimate_instance_f32 * S,
+ uint16_t numTaps,
+ uint8_t M,
+ const float32_t * pCoeffs,
+ float32_t * pState,
+ uint32_t blockSize);
/**
@@ -3303,9 +3337,9 @@
*/
void arm_fir_decimate_q15(
const arm_fir_decimate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -3317,9 +3351,9 @@
*/
void arm_fir_decimate_fast_q15(
const arm_fir_decimate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -3334,12 +3368,12 @@
* <code>blockSize</code> is not a multiple of <code>M</code>.
*/
arm_status arm_fir_decimate_init_q15(
- arm_fir_decimate_instance_q15 * S,
- uint16_t numTaps,
- uint8_t M,
- q15_t * pCoeffs,
- q15_t * pState,
- uint32_t blockSize);
+ arm_fir_decimate_instance_q15 * S,
+ uint16_t numTaps,
+ uint8_t M,
+ const q15_t * pCoeffs,
+ q15_t * pState,
+ uint32_t blockSize);
/**
@@ -3351,9 +3385,9 @@
*/
void arm_fir_decimate_q31(
const arm_fir_decimate_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
* @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
@@ -3363,10 +3397,10 @@
* @param[in] blockSize number of input samples to process per call.
*/
void arm_fir_decimate_fast_q31(
- arm_fir_decimate_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
+ const arm_fir_decimate_instance_q31 * S,
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -3381,12 +3415,12 @@
* <code>blockSize</code> is not a multiple of <code>M</code>.
*/
arm_status arm_fir_decimate_init_q31(
- arm_fir_decimate_instance_q31 * S,
- uint16_t numTaps,
- uint8_t M,
- q31_t * pCoeffs,
- q31_t * pState,
- uint32_t blockSize);
+ arm_fir_decimate_instance_q31 * S,
+ uint16_t numTaps,
+ uint8_t M,
+ const q31_t * pCoeffs,
+ q31_t * pState,
+ uint32_t blockSize);
/**
@@ -3394,10 +3428,10 @@
*/
typedef struct
{
- uint8_t L; /**< upsample factor. */
- uint16_t phaseLength; /**< length of each polyphase filter component. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
- q15_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
+ uint8_t L; /**< upsample factor. */
+ uint16_t phaseLength; /**< length of each polyphase filter component. */
+ const q15_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
+ q15_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
} arm_fir_interpolate_instance_q15;
/**
@@ -3405,10 +3439,10 @@
*/
typedef struct
{
- uint8_t L; /**< upsample factor. */
- uint16_t phaseLength; /**< length of each polyphase filter component. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
- q31_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
+ uint8_t L; /**< upsample factor. */
+ uint16_t phaseLength; /**< length of each polyphase filter component. */
+ const q31_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
+ q31_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
} arm_fir_interpolate_instance_q31;
/**
@@ -3416,10 +3450,10 @@
*/
typedef struct
{
- uint8_t L; /**< upsample factor. */
- uint16_t phaseLength; /**< length of each polyphase filter component. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
- float32_t *pState; /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */
+ uint8_t L; /**< upsample factor. */
+ uint16_t phaseLength; /**< length of each polyphase filter component. */
+ const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
+ float32_t *pState; /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */
} arm_fir_interpolate_instance_f32;
@@ -3432,9 +3466,9 @@
*/
void arm_fir_interpolate_q15(
const arm_fir_interpolate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -3449,12 +3483,12 @@
* the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
*/
arm_status arm_fir_interpolate_init_q15(
- arm_fir_interpolate_instance_q15 * S,
- uint8_t L,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- uint32_t blockSize);
+ arm_fir_interpolate_instance_q15 * S,
+ uint8_t L,
+ uint16_t numTaps,
+ const q15_t * pCoeffs,
+ q15_t * pState,
+ uint32_t blockSize);
/**
@@ -3466,9 +3500,9 @@
*/
void arm_fir_interpolate_q31(
const arm_fir_interpolate_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -3483,12 +3517,12 @@
* the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
*/
arm_status arm_fir_interpolate_init_q31(
- arm_fir_interpolate_instance_q31 * S,
- uint8_t L,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- uint32_t blockSize);
+ arm_fir_interpolate_instance_q31 * S,
+ uint8_t L,
+ uint16_t numTaps,
+ const q31_t * pCoeffs,
+ q31_t * pState,
+ uint32_t blockSize);
/**
@@ -3500,9 +3534,9 @@
*/
void arm_fir_interpolate_f32(
const arm_fir_interpolate_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -3517,12 +3551,12 @@
* the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
*/
arm_status arm_fir_interpolate_init_f32(
- arm_fir_interpolate_instance_f32 * S,
- uint8_t L,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- uint32_t blockSize);
+ arm_fir_interpolate_instance_f32 * S,
+ uint8_t L,
+ uint16_t numTaps,
+ const float32_t * pCoeffs,
+ float32_t * pState,
+ uint32_t blockSize);
/**
@@ -3530,10 +3564,10 @@
*/
typedef struct
{
- uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- q63_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */
- q31_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
- uint8_t postShift; /**< additional shift, in bits, applied to each output sample. */
+ uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ q63_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */
+ const q31_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
+ uint8_t postShift; /**< additional shift, in bits, applied to each output sample. */
} arm_biquad_cas_df1_32x64_ins_q31;
@@ -3545,9 +3579,9 @@
*/
void arm_biquad_cas_df1_32x64_q31(
const arm_biquad_cas_df1_32x64_ins_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -3558,11 +3592,11 @@
* @param[in] postShift shift to be applied to the output. Varies according to the coefficients format
*/
void arm_biquad_cas_df1_32x64_init_q31(
- arm_biquad_cas_df1_32x64_ins_q31 * S,
- uint8_t numStages,
- q31_t * pCoeffs,
- q63_t * pState,
- uint8_t postShift);
+ arm_biquad_cas_df1_32x64_ins_q31 * S,
+ uint8_t numStages,
+ const q31_t * pCoeffs,
+ q63_t * pState,
+ uint8_t postShift);
/**
@@ -3570,9 +3604,9 @@
*/
typedef struct
{
- uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- float32_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */
- float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
+ uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ float32_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */
+ const float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
} arm_biquad_cascade_df2T_instance_f32;
/**
@@ -3580,9 +3614,9 @@
*/
typedef struct
{
- uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- float32_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */
- float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
+ uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ float32_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */
+ const float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
} arm_biquad_cascade_stereo_df2T_instance_f32;
/**
@@ -3590,9 +3624,9 @@
*/
typedef struct
{
- uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- float64_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */
- float64_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
+ uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ float64_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */
+ float64_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
} arm_biquad_cascade_df2T_instance_f64;
@@ -3605,9 +3639,9 @@
*/
void arm_biquad_cascade_df2T_f32(
const arm_biquad_cascade_df2T_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -3619,9 +3653,9 @@
*/
void arm_biquad_cascade_stereo_df2T_f32(
const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -3633,9 +3667,9 @@
*/
void arm_biquad_cascade_df2T_f64(
const arm_biquad_cascade_df2T_instance_f64 * S,
- float64_t * pSrc,
- float64_t * pDst,
- uint32_t blockSize);
+ float64_t * pSrc,
+ float64_t * pDst,
+ uint32_t blockSize);
/**
@@ -3646,10 +3680,10 @@
* @param[in] pState points to the state buffer.
*/
void arm_biquad_cascade_df2T_init_f32(
- arm_biquad_cascade_df2T_instance_f32 * S,
- uint8_t numStages,
- float32_t * pCoeffs,
- float32_t * pState);
+ arm_biquad_cascade_df2T_instance_f32 * S,
+ uint8_t numStages,
+ const float32_t * pCoeffs,
+ float32_t * pState);
/**
@@ -3660,10 +3694,10 @@
* @param[in] pState points to the state buffer.
*/
void arm_biquad_cascade_stereo_df2T_init_f32(
- arm_biquad_cascade_stereo_df2T_instance_f32 * S,
- uint8_t numStages,
- float32_t * pCoeffs,
- float32_t * pState);
+ arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+ uint8_t numStages,
+ const float32_t * pCoeffs,
+ float32_t * pState);
/**
@@ -3674,10 +3708,10 @@
* @param[in] pState points to the state buffer.
*/
void arm_biquad_cascade_df2T_init_f64(
- arm_biquad_cascade_df2T_instance_f64 * S,
- uint8_t numStages,
- float64_t * pCoeffs,
- float64_t * pState);
+ arm_biquad_cascade_df2T_instance_f64 * S,
+ uint8_t numStages,
+ float64_t * pCoeffs,
+ float64_t * pState);
/**
@@ -3685,9 +3719,9 @@
*/
typedef struct
{
- uint16_t numStages; /**< number of filter stages. */
- q15_t *pState; /**< points to the state variable array. The array is of length numStages. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
+ uint16_t numStages; /**< number of filter stages. */
+ q15_t *pState; /**< points to the state variable array. The array is of length numStages. */
+ const q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
} arm_fir_lattice_instance_q15;
/**
@@ -3695,9 +3729,9 @@
*/
typedef struct
{
- uint16_t numStages; /**< number of filter stages. */
- q31_t *pState; /**< points to the state variable array. The array is of length numStages. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
+ uint16_t numStages; /**< number of filter stages. */
+ q31_t *pState; /**< points to the state variable array. The array is of length numStages. */
+ const q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
} arm_fir_lattice_instance_q31;
/**
@@ -3705,9 +3739,9 @@
*/
typedef struct
{
- uint16_t numStages; /**< number of filter stages. */
- float32_t *pState; /**< points to the state variable array. The array is of length numStages. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
+ uint16_t numStages; /**< number of filter stages. */
+ float32_t *pState; /**< points to the state variable array. The array is of length numStages. */
+ const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
} arm_fir_lattice_instance_f32;
@@ -3719,10 +3753,10 @@
* @param[in] pState points to the state buffer. The array is of length numStages.
*/
void arm_fir_lattice_init_q15(
- arm_fir_lattice_instance_q15 * S,
- uint16_t numStages,
- q15_t * pCoeffs,
- q15_t * pState);
+ arm_fir_lattice_instance_q15 * S,
+ uint16_t numStages,
+ const q15_t * pCoeffs,
+ q15_t * pState);
/**
@@ -3734,9 +3768,9 @@
*/
void arm_fir_lattice_q15(
const arm_fir_lattice_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -3747,10 +3781,10 @@
* @param[in] pState points to the state buffer. The array is of length numStages.
*/
void arm_fir_lattice_init_q31(
- arm_fir_lattice_instance_q31 * S,
- uint16_t numStages,
- q31_t * pCoeffs,
- q31_t * pState);
+ arm_fir_lattice_instance_q31 * S,
+ uint16_t numStages,
+ const q31_t * pCoeffs,
+ q31_t * pState);
/**
@@ -3762,9 +3796,9 @@
*/
void arm_fir_lattice_q31(
const arm_fir_lattice_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -3775,10 +3809,10 @@
* @param[in] pState points to the state buffer. The array is of length numStages.
*/
void arm_fir_lattice_init_f32(
- arm_fir_lattice_instance_f32 * S,
- uint16_t numStages,
- float32_t * pCoeffs,
- float32_t * pState);
+ arm_fir_lattice_instance_f32 * S,
+ uint16_t numStages,
+ const float32_t * pCoeffs,
+ float32_t * pState);
/**
@@ -3790,9 +3824,9 @@
*/
void arm_fir_lattice_f32(
const arm_fir_lattice_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -3800,10 +3834,10 @@
*/
typedef struct
{
- uint16_t numStages; /**< number of stages in the filter. */
- q15_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */
- q15_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
- q15_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */
+ uint16_t numStages; /**< number of stages in the filter. */
+ q15_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */
+ q15_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
+ q15_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */
} arm_iir_lattice_instance_q15;
/**
@@ -3811,10 +3845,10 @@
*/
typedef struct
{
- uint16_t numStages; /**< number of stages in the filter. */
- q31_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */
- q31_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
- q31_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */
+ uint16_t numStages; /**< number of stages in the filter. */
+ q31_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */
+ q31_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
+ q31_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */
} arm_iir_lattice_instance_q31;
/**
@@ -3822,10 +3856,10 @@
*/
typedef struct
{
- uint16_t numStages; /**< number of stages in the filter. */
- float32_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */
- float32_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
- float32_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */
+ uint16_t numStages; /**< number of stages in the filter. */
+ float32_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */
+ float32_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
+ float32_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */
} arm_iir_lattice_instance_f32;
@@ -3838,9 +3872,9 @@
*/
void arm_iir_lattice_f32(
const arm_iir_lattice_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -3853,12 +3887,12 @@
* @param[in] blockSize number of samples to process.
*/
void arm_iir_lattice_init_f32(
- arm_iir_lattice_instance_f32 * S,
- uint16_t numStages,
- float32_t * pkCoeffs,
- float32_t * pvCoeffs,
- float32_t * pState,
- uint32_t blockSize);
+ arm_iir_lattice_instance_f32 * S,
+ uint16_t numStages,
+ float32_t * pkCoeffs,
+ float32_t * pvCoeffs,
+ float32_t * pState,
+ uint32_t blockSize);
/**
@@ -3870,9 +3904,9 @@
*/
void arm_iir_lattice_q31(
const arm_iir_lattice_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -3885,12 +3919,12 @@
* @param[in] blockSize number of samples to process.
*/
void arm_iir_lattice_init_q31(
- arm_iir_lattice_instance_q31 * S,
- uint16_t numStages,
- q31_t * pkCoeffs,
- q31_t * pvCoeffs,
- q31_t * pState,
- uint32_t blockSize);
+ arm_iir_lattice_instance_q31 * S,
+ uint16_t numStages,
+ q31_t * pkCoeffs,
+ q31_t * pvCoeffs,
+ q31_t * pState,
+ uint32_t blockSize);
/**
@@ -3902,9 +3936,9 @@
*/
void arm_iir_lattice_q15(
const arm_iir_lattice_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -3917,12 +3951,12 @@
* @param[in] blockSize number of samples to process per call.
*/
void arm_iir_lattice_init_q15(
- arm_iir_lattice_instance_q15 * S,
- uint16_t numStages,
- q15_t * pkCoeffs,
- q15_t * pvCoeffs,
- q15_t * pState,
- uint32_t blockSize);
+ arm_iir_lattice_instance_q15 * S,
+ uint16_t numStages,
+ q15_t * pkCoeffs,
+ q15_t * pvCoeffs,
+ q15_t * pState,
+ uint32_t blockSize);
/**
@@ -3930,10 +3964,10 @@
*/
typedef struct
{
- uint16_t numTaps; /**< number of coefficients in the filter. */
- float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- float32_t mu; /**< step size that controls filter coefficient updates. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ float32_t mu; /**< step size that controls filter coefficient updates. */
} arm_lms_instance_f32;
@@ -3948,11 +3982,11 @@
*/
void arm_lms_f32(
const arm_lms_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pRef,
- float32_t * pOut,
- float32_t * pErr,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ float32_t * pRef,
+ float32_t * pOut,
+ float32_t * pErr,
+ uint32_t blockSize);
/**
@@ -3965,12 +3999,12 @@
* @param[in] blockSize number of samples to process.
*/
void arm_lms_init_f32(
- arm_lms_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- float32_t mu,
- uint32_t blockSize);
+ arm_lms_instance_f32 * S,
+ uint16_t numTaps,
+ float32_t * pCoeffs,
+ float32_t * pState,
+ float32_t mu,
+ uint32_t blockSize);
/**
@@ -3978,11 +4012,11 @@
*/
typedef struct
{
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- q15_t mu; /**< step size that controls filter coefficient updates. */
- uint32_t postShift; /**< bit shift applied to coefficients. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ q15_t mu; /**< step size that controls filter coefficient updates. */
+ uint32_t postShift; /**< bit shift applied to coefficients. */
} arm_lms_instance_q15;
@@ -3997,13 +4031,13 @@
* @param[in] postShift bit shift applied to coefficients.
*/
void arm_lms_init_q15(
- arm_lms_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- q15_t mu,
- uint32_t blockSize,
- uint32_t postShift);
+ arm_lms_instance_q15 * S,
+ uint16_t numTaps,
+ q15_t * pCoeffs,
+ q15_t * pState,
+ q15_t mu,
+ uint32_t blockSize,
+ uint32_t postShift);
/**
@@ -4017,11 +4051,11 @@
*/
void arm_lms_q15(
const arm_lms_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pRef,
- q15_t * pOut,
- q15_t * pErr,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ q15_t * pRef,
+ q15_t * pOut,
+ q15_t * pErr,
+ uint32_t blockSize);
/**
@@ -4029,11 +4063,11 @@
*/
typedef struct
{
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- q31_t mu; /**< step size that controls filter coefficient updates. */
- uint32_t postShift; /**< bit shift applied to coefficients. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ q31_t mu; /**< step size that controls filter coefficient updates. */
+ uint32_t postShift; /**< bit shift applied to coefficients. */
} arm_lms_instance_q31;
@@ -4048,11 +4082,11 @@
*/
void arm_lms_q31(
const arm_lms_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pRef,
- q31_t * pOut,
- q31_t * pErr,
- uint32_t blockSize);
+ const q31_t * pSrc,
+ q31_t * pRef,
+ q31_t * pOut,
+ q31_t * pErr,
+ uint32_t blockSize);
/**
@@ -4066,13 +4100,13 @@
* @param[in] postShift bit shift applied to coefficients.
*/
void arm_lms_init_q31(
- arm_lms_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- q31_t mu,
- uint32_t blockSize,
- uint32_t postShift);
+ arm_lms_instance_q31 * S,
+ uint16_t numTaps,
+ q31_t * pCoeffs,
+ q31_t * pState,
+ q31_t mu,
+ uint32_t blockSize,
+ uint32_t postShift);
/**
@@ -4080,12 +4114,12 @@
*/
typedef struct
{
- uint16_t numTaps; /**< number of coefficients in the filter. */
- float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- float32_t mu; /**< step size that control filter coefficient updates. */
- float32_t energy; /**< saves previous frame energy. */
- float32_t x0; /**< saves previous input sample. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ float32_t mu; /**< step size that control filter coefficient updates. */
+ float32_t energy; /**< saves previous frame energy. */
+ float32_t x0; /**< saves previous input sample. */
} arm_lms_norm_instance_f32;
@@ -4099,12 +4133,12 @@
* @param[in] blockSize number of samples to process.
*/
void arm_lms_norm_f32(
- arm_lms_norm_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pRef,
- float32_t * pOut,
- float32_t * pErr,
- uint32_t blockSize);
+ arm_lms_norm_instance_f32 * S,
+ const float32_t * pSrc,
+ float32_t * pRef,
+ float32_t * pOut,
+ float32_t * pErr,
+ uint32_t blockSize);
/**
@@ -4117,12 +4151,12 @@
* @param[in] blockSize number of samples to process.
*/
void arm_lms_norm_init_f32(
- arm_lms_norm_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- float32_t mu,
- uint32_t blockSize);
+ arm_lms_norm_instance_f32 * S,
+ uint16_t numTaps,
+ float32_t * pCoeffs,
+ float32_t * pState,
+ float32_t mu,
+ uint32_t blockSize);
/**
@@ -4130,14 +4164,14 @@
*/
typedef struct
{
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- q31_t mu; /**< step size that controls filter coefficient updates. */
- uint8_t postShift; /**< bit shift applied to coefficients. */
- q31_t *recipTable; /**< points to the reciprocal initial value table. */
- q31_t energy; /**< saves previous frame energy. */
- q31_t x0; /**< saves previous input sample. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ q31_t mu; /**< step size that controls filter coefficient updates. */
+ uint8_t postShift; /**< bit shift applied to coefficients. */
+ const q31_t *recipTable; /**< points to the reciprocal initial value table. */
+ q31_t energy; /**< saves previous frame energy. */
+ q31_t x0; /**< saves previous input sample. */
} arm_lms_norm_instance_q31;
@@ -4151,12 +4185,12 @@
* @param[in] blockSize number of samples to process.
*/
void arm_lms_norm_q31(
- arm_lms_norm_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pRef,
- q31_t * pOut,
- q31_t * pErr,
- uint32_t blockSize);
+ arm_lms_norm_instance_q31 * S,
+ const q31_t * pSrc,
+ q31_t * pRef,
+ q31_t * pOut,
+ q31_t * pErr,
+ uint32_t blockSize);
/**
@@ -4170,13 +4204,13 @@
* @param[in] postShift bit shift applied to coefficients.
*/
void arm_lms_norm_init_q31(
- arm_lms_norm_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- q31_t mu,
- uint32_t blockSize,
- uint8_t postShift);
+ arm_lms_norm_instance_q31 * S,
+ uint16_t numTaps,
+ q31_t * pCoeffs,
+ q31_t * pState,
+ q31_t mu,
+ uint32_t blockSize,
+ uint8_t postShift);
/**
@@ -4184,14 +4218,14 @@
*/
typedef struct
{
- uint16_t numTaps; /**< Number of coefficients in the filter. */
- q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- q15_t mu; /**< step size that controls filter coefficient updates. */
- uint8_t postShift; /**< bit shift applied to coefficients. */
- q15_t *recipTable; /**< Points to the reciprocal initial value table. */
- q15_t energy; /**< saves previous frame energy. */
- q15_t x0; /**< saves previous input sample. */
+ uint16_t numTaps; /**< Number of coefficients in the filter. */
+ q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+ q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ q15_t mu; /**< step size that controls filter coefficient updates. */
+ uint8_t postShift; /**< bit shift applied to coefficients. */
+ const q15_t *recipTable; /**< Points to the reciprocal initial value table. */
+ q15_t energy; /**< saves previous frame energy. */
+ q15_t x0; /**< saves previous input sample. */
} arm_lms_norm_instance_q15;
@@ -4205,12 +4239,12 @@
* @param[in] blockSize number of samples to process.
*/
void arm_lms_norm_q15(
- arm_lms_norm_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pRef,
- q15_t * pOut,
- q15_t * pErr,
- uint32_t blockSize);
+ arm_lms_norm_instance_q15 * S,
+ const q15_t * pSrc,
+ q15_t * pRef,
+ q15_t * pOut,
+ q15_t * pErr,
+ uint32_t blockSize);
/**
@@ -4224,13 +4258,13 @@
* @param[in] postShift bit shift applied to coefficients.
*/
void arm_lms_norm_init_q15(
- arm_lms_norm_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- q15_t mu,
- uint32_t blockSize,
- uint8_t postShift);
+ arm_lms_norm_instance_q15 * S,
+ uint16_t numTaps,
+ q15_t * pCoeffs,
+ q15_t * pState,
+ q15_t mu,
+ uint32_t blockSize,
+ uint8_t postShift);
/**
@@ -4242,81 +4276,80 @@
* @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
*/
void arm_correlate_f32(
- float32_t * pSrcA,
- uint32_t srcALen,
- float32_t * pSrcB,
- uint32_t srcBLen,
- float32_t * pDst);
+ const float32_t * pSrcA,
+ uint32_t srcALen,
+ const float32_t * pSrcB,
+ uint32_t srcBLen,
+ float32_t * pDst);
- /**
- * @brief Correlation of Q15 sequences
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- * @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- */
- void arm_correlate_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch);
+/**
+ @brief Correlation of Q15 sequences
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
+ @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+*/
+void arm_correlate_opt_q15(
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ q15_t * pScratch);
- /**
- * @brief Correlation of Q15 sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- */
-
+/**
+ @brief Correlation of Q15 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
+ */
void arm_correlate_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst);
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst);
- /**
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- */
-
- void arm_correlate_fast_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst);
+/**
+ @brief Correlation of Q15 sequences (fast version).
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
+ @return none
+ */
+void arm_correlate_fast_q15(
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst);
- /**
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- * @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- */
- void arm_correlate_fast_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch);
+/**
+ @brief Correlation of Q15 sequences (fast version).
+ @param[in] pSrcA points to the first input sequence.
+ @param[in] srcALen length of the first input sequence.
+ @param[in] pSrcB points to the second input sequence.
+ @param[in] srcBLen length of the second input sequence.
+ @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
+ @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ */
+void arm_correlate_fast_opt_q15(
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ q15_t * pScratch);
/**
@@ -4328,27 +4361,27 @@
* @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
*/
void arm_correlate_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst);
+ const q31_t * pSrcA,
+ uint32_t srcALen,
+ const q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst);
- /**
- * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- */
- void arm_correlate_fast_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst);
+/**
+ @brief Correlation of Q31 sequences (fast version).
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
+ */
+void arm_correlate_fast_q31(
+ const q31_t * pSrcA,
+ uint32_t srcALen,
+ const q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst);
/**
@@ -4362,13 +4395,13 @@
* @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
*/
void arm_correlate_opt_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2);
+ const q7_t * pSrcA,
+ uint32_t srcALen,
+ const q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst,
+ q15_t * pScratch1,
+ q15_t * pScratch2);
/**
@@ -4380,11 +4413,11 @@
* @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
*/
void arm_correlate_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst);
+ const q7_t * pSrcA,
+ uint32_t srcALen,
+ const q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst);
/**
@@ -4392,12 +4425,12 @@
*/
typedef struct
{
- uint16_t numTaps; /**< number of coefficients in the filter. */
- uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
- float32_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
- int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
+ float32_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+ const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
+ int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
} arm_fir_sparse_instance_f32;
/**
@@ -4405,12 +4438,12 @@
*/
typedef struct
{
- uint16_t numTaps; /**< number of coefficients in the filter. */
- uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
- q31_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
- int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
+ q31_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+ const q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
+ int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
} arm_fir_sparse_instance_q31;
/**
@@ -4418,12 +4451,12 @@
*/
typedef struct
{
- uint16_t numTaps; /**< number of coefficients in the filter. */
- uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
- q15_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
- int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
+ q15_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+ const q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
+ int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
} arm_fir_sparse_instance_q15;
/**
@@ -4431,12 +4464,12 @@
*/
typedef struct
{
- uint16_t numTaps; /**< number of coefficients in the filter. */
- uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
- q7_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
- q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
- int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
+ q7_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+ const q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
+ int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
} arm_fir_sparse_instance_q7;
@@ -4449,11 +4482,11 @@
* @param[in] blockSize number of input samples to process per call.
*/
void arm_fir_sparse_f32(
- arm_fir_sparse_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- float32_t * pScratchIn,
- uint32_t blockSize);
+ arm_fir_sparse_instance_f32 * S,
+ const float32_t * pSrc,
+ float32_t * pDst,
+ float32_t * pScratchIn,
+ uint32_t blockSize);
/**
@@ -4467,13 +4500,13 @@
* @param[in] blockSize number of samples that will be processed per block.
*/
void arm_fir_sparse_init_f32(
- arm_fir_sparse_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize);
+ arm_fir_sparse_instance_f32 * S,
+ uint16_t numTaps,
+ const float32_t * pCoeffs,
+ float32_t * pState,
+ int32_t * pTapDelay,
+ uint16_t maxDelay,
+ uint32_t blockSize);
/**
@@ -4485,11 +4518,11 @@
* @param[in] blockSize number of input samples to process per call.
*/
void arm_fir_sparse_q31(
- arm_fir_sparse_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- q31_t * pScratchIn,
- uint32_t blockSize);
+ arm_fir_sparse_instance_q31 * S,
+ const q31_t * pSrc,
+ q31_t * pDst,
+ q31_t * pScratchIn,
+ uint32_t blockSize);
/**
@@ -4503,13 +4536,13 @@
* @param[in] blockSize number of samples that will be processed per block.
*/
void arm_fir_sparse_init_q31(
- arm_fir_sparse_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize);
+ arm_fir_sparse_instance_q31 * S,
+ uint16_t numTaps,
+ const q31_t * pCoeffs,
+ q31_t * pState,
+ int32_t * pTapDelay,
+ uint16_t maxDelay,
+ uint32_t blockSize);
/**
@@ -4522,12 +4555,12 @@
* @param[in] blockSize number of input samples to process per call.
*/
void arm_fir_sparse_q15(
- arm_fir_sparse_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- q15_t * pScratchIn,
- q31_t * pScratchOut,
- uint32_t blockSize);
+ arm_fir_sparse_instance_q15 * S,
+ const q15_t * pSrc,
+ q15_t * pDst,
+ q15_t * pScratchIn,
+ q31_t * pScratchOut,
+ uint32_t blockSize);
/**
@@ -4541,13 +4574,13 @@
* @param[in] blockSize number of samples that will be processed per block.
*/
void arm_fir_sparse_init_q15(
- arm_fir_sparse_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize);
+ arm_fir_sparse_instance_q15 * S,
+ uint16_t numTaps,
+ const q15_t * pCoeffs,
+ q15_t * pState,
+ int32_t * pTapDelay,
+ uint16_t maxDelay,
+ uint32_t blockSize);
/**
@@ -4560,12 +4593,12 @@
* @param[in] blockSize number of input samples to process per call.
*/
void arm_fir_sparse_q7(
- arm_fir_sparse_instance_q7 * S,
- q7_t * pSrc,
- q7_t * pDst,
- q7_t * pScratchIn,
- q31_t * pScratchOut,
- uint32_t blockSize);
+ arm_fir_sparse_instance_q7 * S,
+ const q7_t * pSrc,
+ q7_t * pDst,
+ q7_t * pScratchIn,
+ q31_t * pScratchOut,
+ uint32_t blockSize);
/**
@@ -4579,13 +4612,13 @@
* @param[in] blockSize number of samples that will be processed per block.
*/
void arm_fir_sparse_init_q7(
- arm_fir_sparse_instance_q7 * S,
- uint16_t numTaps,
- q7_t * pCoeffs,
- q7_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize);
+ arm_fir_sparse_instance_q7 * S,
+ uint16_t numTaps,
+ const q7_t * pCoeffs,
+ q7_t * pState,
+ int32_t * pTapDelay,
+ uint16_t maxDelay,
+ uint32_t blockSize);
/**
@@ -4595,9 +4628,9 @@
* @param[out] pCosVal points to the processed cos output.
*/
void arm_sin_cos_f32(
- float32_t theta,
- float32_t * pSinVal,
- float32_t * pCosVal);
+ float32_t theta,
+ float32_t * pSinVal,
+ float32_t * pCosVal);
/**
@@ -4607,9 +4640,9 @@
* @param[out] pCosVal points to the processed cosine output.
*/
void arm_sin_cos_q31(
- q31_t theta,
- q31_t * pSinVal,
- q31_t * pCosVal);
+ q31_t theta,
+ q31_t * pSinVal,
+ q31_t * pCosVal);
/**
@@ -4619,9 +4652,9 @@
* @param[in] numSamples number of complex samples in each vector
*/
void arm_cmplx_conj_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t numSamples);
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t numSamples);
/**
* @brief Q31 complex conjugate.
@@ -4630,9 +4663,9 @@
* @param[in] numSamples number of complex samples in each vector
*/
void arm_cmplx_conj_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t numSamples);
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t numSamples);
/**
@@ -4642,9 +4675,9 @@
* @param[in] numSamples number of complex samples in each vector
*/
void arm_cmplx_conj_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t numSamples);
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t numSamples);
/**
@@ -4654,9 +4687,9 @@
* @param[in] numSamples number of complex samples in the input vector
*/
void arm_cmplx_mag_squared_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t numSamples);
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t numSamples);
/**
@@ -4666,9 +4699,9 @@
* @param[in] numSamples number of complex samples in the input vector
*/
void arm_cmplx_mag_squared_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t numSamples);
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t numSamples);
/**
@@ -4678,9 +4711,9 @@
* @param[in] numSamples number of complex samples in the input vector
*/
void arm_cmplx_mag_squared_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t numSamples);
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t numSamples);
/**
@@ -4705,7 +4738,8 @@
* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
* A0 = Kp + Ki + Kd
* A1 = (-Kp ) - (2 * Kd )
- * A2 = Kd </pre>
+ * A2 = Kd
+ * </pre>
*
* \par
* where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
@@ -4750,12 +4784,12 @@
*/
/**
- * @brief Process function for the floating-point PID Control.
+ * @brief Process function for the floating-point PID Control.
* @param[in,out] S is an instance of the floating-point PID Control structure
* @param[in] in input sample to process
- * @return out processed output sample.
+ * @return processed output sample.
*/
- CMSIS_INLINE __STATIC_INLINE float32_t arm_pid_f32(
+ __STATIC_FORCEINLINE float32_t arm_pid_f32(
arm_pid_instance_f32 * S,
float32_t in)
{
@@ -4775,21 +4809,20 @@
}
- /**
- * @brief Process function for the Q31 PID Control.
- * @param[in,out] S points to an instance of the Q31 PID Control structure
- * @param[in] in input sample to process
- * @return out processed output sample.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
- * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
- */
- CMSIS_INLINE __STATIC_INLINE q31_t arm_pid_q31(
+/**
+ @brief Process function for the Q31 PID Control.
+ @param[in,out] S points to an instance of the Q31 PID Control structure
+ @param[in] in input sample to process
+ @return processed output sample.
+
+ \par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ Thus, if the accumulator result overflows it wraps around rather than clip.
+ In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
+ After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
+ */
+__STATIC_FORCEINLINE q31_t arm_pid_q31(
arm_pid_instance_q31 * S,
q31_t in)
{
@@ -4821,22 +4854,21 @@
}
- /**
- * @brief Process function for the Q15 PID Control.
- * @param[in,out] S points to an instance of the Q15 PID Control structure
- * @param[in] in input sample to process
- * @return out processed output sample.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.
- */
- CMSIS_INLINE __STATIC_INLINE q15_t arm_pid_q15(
+/**
+ @brief Process function for the Q15 PID Control.
+ @param[in,out] S points to an instance of the Q15 PID Control structure
+ @param[in] in input sample to process
+ @return processed output sample.
+
+ \par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+ The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+ There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+ After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+ Lastly, the accumulator is saturated to yield a result in 1.15 format.
+ */
+__STATIC_FORCEINLINE q15_t arm_pid_q15(
arm_pid_instance_q15 * S,
q15_t in)
{
@@ -4844,16 +4876,13 @@
q15_t out;
#if defined (ARM_MATH_DSP)
- __SIMD32_TYPE *vstate;
-
/* Implementation of PID controller */
/* acc = A0 * x[n] */
acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in);
/* acc += A1 * x[n-1] + A2 * x[n-2] */
- vstate = __SIMD32_CONST(S->state);
- acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)*vstate, (uint64_t)acc);
+ acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)read_q15x2 (S->state), (uint64_t)acc);
#else
/* acc = A0 * x[n] */
acc = ((q31_t) S->A0) * in;
@@ -4946,8 +4975,9 @@
* @param[in] Ib input three-phase coordinate <code>b</code>
* @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
* @param[out] pIbeta points to output two-phase orthogonal vector axis beta
+ * @return none
*/
- CMSIS_INLINE __STATIC_INLINE void arm_clarke_f32(
+ __STATIC_FORCEINLINE void arm_clarke_f32(
float32_t Ia,
float32_t Ib,
float32_t * pIalpha,
@@ -4961,20 +4991,20 @@
}
- /**
- * @brief Clarke transform for Q31 version
- * @param[in] Ia input three-phase coordinate <code>a</code>
- * @param[in] Ib input three-phase coordinate <code>b</code>
- * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
- * @param[out] pIbeta points to output two-phase orthogonal vector axis beta
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
- * There is saturation on the addition, hence there is no risk of overflow.
- */
- CMSIS_INLINE __STATIC_INLINE void arm_clarke_q31(
+/**
+ @brief Clarke transform for Q31 version
+ @param[in] Ia input three-phase coordinate <code>a</code>
+ @param[in] Ib input three-phase coordinate <code>b</code>
+ @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
+ @param[out] pIbeta points to output two-phase orthogonal vector axis beta
+ @return none
+
+ \par Scaling and Overflow Behavior
+ The function is implemented using an internal 32-bit accumulator.
+ The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+ There is saturation on the addition, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_clarke_q31(
q31_t Ia,
q31_t Ib,
q31_t * pIalpha,
@@ -4999,18 +5029,6 @@
* @} end of clarke group
*/
- /**
- * @brief Converts the elements of the Q7 vector to Q31 vector.
- * @param[in] pSrc input pointer
- * @param[out] pDst output pointer
- * @param[in] blockSize number of samples to process
- */
- void arm_q7_to_q31(
- q7_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
/**
* @ingroup groupController
@@ -5043,8 +5061,9 @@
* @param[in] Ibeta input two-phase orthogonal vector axis beta
* @param[out] pIa points to output three-phase coordinate <code>a</code>
* @param[out] pIb points to output three-phase coordinate <code>b</code>
+ * @return none
*/
- CMSIS_INLINE __STATIC_INLINE void arm_inv_clarke_f32(
+ __STATIC_FORCEINLINE void arm_inv_clarke_f32(
float32_t Ialpha,
float32_t Ibeta,
float32_t * pIa,
@@ -5058,20 +5077,20 @@
}
- /**
- * @brief Inverse Clarke transform for Q31 version
- * @param[in] Ialpha input two-phase orthogonal vector axis alpha
- * @param[in] Ibeta input two-phase orthogonal vector axis beta
- * @param[out] pIa points to output three-phase coordinate <code>a</code>
- * @param[out] pIb points to output three-phase coordinate <code>b</code>
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
- * There is saturation on the subtraction, hence there is no risk of overflow.
- */
- CMSIS_INLINE __STATIC_INLINE void arm_inv_clarke_q31(
+/**
+ @brief Inverse Clarke transform for Q31 version
+ @param[in] Ialpha input two-phase orthogonal vector axis alpha
+ @param[in] Ibeta input two-phase orthogonal vector axis beta
+ @param[out] pIa points to output three-phase coordinate <code>a</code>
+ @param[out] pIb points to output three-phase coordinate <code>b</code>
+ @return none
+
+ \par Scaling and Overflow Behavior
+ The function is implemented using an internal 32-bit accumulator.
+ The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+ There is saturation on the subtraction, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_inv_clarke_q31(
q31_t Ialpha,
q31_t Ibeta,
q31_t * pIa,
@@ -5096,17 +5115,6 @@
* @} end of inv_clarke group
*/
- /**
- * @brief Converts the elements of the Q7 vector to Q15 vector.
- * @param[in] pSrc input pointer
- * @param[out] pDst output pointer
- * @param[in] blockSize number of samples to process
- */
- void arm_q7_to_q15(
- q7_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
/**
@@ -5150,11 +5158,12 @@
* @param[out] pIq points to output rotor reference frame q
* @param[in] sinVal sine value of rotation angle theta
* @param[in] cosVal cosine value of rotation angle theta
+ * @return none
*
* The function implements the forward Park transform.
*
*/
- CMSIS_INLINE __STATIC_INLINE void arm_park_f32(
+ __STATIC_FORCEINLINE void arm_park_f32(
float32_t Ialpha,
float32_t Ibeta,
float32_t * pId,
@@ -5170,22 +5179,22 @@
}
- /**
- * @brief Park transform for Q31 version
- * @param[in] Ialpha input two-phase vector coordinate alpha
- * @param[in] Ibeta input two-phase vector coordinate beta
- * @param[out] pId points to output rotor reference frame d
- * @param[out] pIq points to output rotor reference frame q
- * @param[in] sinVal sine value of rotation angle theta
- * @param[in] cosVal cosine value of rotation angle theta
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
- * There is saturation on the addition and subtraction, hence there is no risk of overflow.
- */
- CMSIS_INLINE __STATIC_INLINE void arm_park_q31(
+/**
+ @brief Park transform for Q31 version
+ @param[in] Ialpha input two-phase vector coordinate alpha
+ @param[in] Ibeta input two-phase vector coordinate beta
+ @param[out] pId points to output rotor reference frame d
+ @param[out] pIq points to output rotor reference frame q
+ @param[in] sinVal sine value of rotation angle theta
+ @param[in] cosVal cosine value of rotation angle theta
+ @return none
+
+ \par Scaling and Overflow Behavior
+ The function is implemented using an internal 32-bit accumulator.
+ The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+ There is saturation on the addition and subtraction, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_park_q31(
q31_t Ialpha,
q31_t Ibeta,
q31_t * pId,
@@ -5220,17 +5229,6 @@
* @} end of park group
*/
- /**
- * @brief Converts the elements of the Q7 vector to floating-point vector.
- * @param[in] pSrc is input pointer
- * @param[out] pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- */
- void arm_q7_to_float(
- q7_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
/**
* @ingroup groupController
@@ -5266,8 +5264,9 @@
* @param[out] pIbeta points to output two-phase orthogonal vector axis beta
* @param[in] sinVal sine value of rotation angle theta
* @param[in] cosVal cosine value of rotation angle theta
+ * @return none
*/
- CMSIS_INLINE __STATIC_INLINE void arm_inv_park_f32(
+ __STATIC_FORCEINLINE void arm_inv_park_f32(
float32_t Id,
float32_t Iq,
float32_t * pIalpha,
@@ -5283,22 +5282,22 @@
}
- /**
- * @brief Inverse Park transform for Q31 version
- * @param[in] Id input coordinate of rotor reference frame d
- * @param[in] Iq input coordinate of rotor reference frame q
- * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
- * @param[out] pIbeta points to output two-phase orthogonal vector axis beta
- * @param[in] sinVal sine value of rotation angle theta
- * @param[in] cosVal cosine value of rotation angle theta
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
- * There is saturation on the addition, hence there is no risk of overflow.
- */
- CMSIS_INLINE __STATIC_INLINE void arm_inv_park_q31(
+/**
+ @brief Inverse Park transform for Q31 version
+ @param[in] Id input coordinate of rotor reference frame d
+ @param[in] Iq input coordinate of rotor reference frame q
+ @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
+ @param[out] pIbeta points to output two-phase orthogonal vector axis beta
+ @param[in] sinVal sine value of rotation angle theta
+ @param[in] cosVal cosine value of rotation angle theta
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 32-bit accumulator.
+ The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+ There is saturation on the addition, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_inv_park_q31(
q31_t Id,
q31_t Iq,
q31_t * pIalpha,
@@ -5335,17 +5334,6 @@
/**
- * @brief Converts the elements of the Q31 vector to floating-point vector.
- * @param[in] pSrc is input pointer
- * @param[out] pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- */
- void arm_q31_to_float(
- q31_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
* @ingroup groupInterpolation
*/
@@ -5393,7 +5381,7 @@
* @return y processed output sample.
*
*/
- CMSIS_INLINE __STATIC_INLINE float32_t arm_linear_interp_f32(
+ __STATIC_FORCEINLINE float32_t arm_linear_interp_f32(
arm_linear_interp_instance_f32 * S,
float32_t x)
{
@@ -5450,7 +5438,7 @@
* This function can support maximum of table size 2^12.
*
*/
- CMSIS_INLINE __STATIC_INLINE q31_t arm_linear_interp_q31(
+ __STATIC_FORCEINLINE q31_t arm_linear_interp_q31(
q31_t * pYData,
q31_t x,
uint32_t nValues)
@@ -5508,7 +5496,7 @@
* This function can support maximum of table size 2^12.
*
*/
- CMSIS_INLINE __STATIC_INLINE q15_t arm_linear_interp_q15(
+ __STATIC_FORCEINLINE q15_t arm_linear_interp_q15(
q15_t * pYData,
q31_t x,
uint32_t nValues)
@@ -5565,7 +5553,7 @@
* Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
* This function can support maximum of table size 2^12.
*/
- CMSIS_INLINE __STATIC_INLINE q7_t arm_linear_interp_q7(
+ __STATIC_FORCEINLINE q7_t arm_linear_interp_q7(
q7_t * pYData,
q31_t x,
uint32_t nValues)
@@ -5698,14 +5686,15 @@
* @{
*/
- /**
- * @brief Floating-point square root function.
- * @param[in] in input value.
- * @param[out] pOut square root of input value.
- * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
- * <code>in</code> is negative value and returns zero output for negative values.
- */
- CMSIS_INLINE __STATIC_INLINE arm_status arm_sqrt_f32(
+/**
+ @brief Floating-point square root function.
+ @param[in] in input value
+ @param[out] pOut square root of input value
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : input value is positive
+ - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+__STATIC_FORCEINLINE arm_status arm_sqrt_f32(
float32_t in,
float32_t * pOut)
{
@@ -5718,20 +5707,6 @@
*pOut = sqrtf(in);
#endif
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
- *pOut = __builtin_sqrtf(in);
- #else
- *pOut = sqrtf(in);
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- *pOut = __builtin_sqrtf(in);
- #else
- *pOut = sqrtf(in);
- #endif
-
#elif defined ( __ICCARM__ )
#if defined __ARMVFP__
__ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in));
@@ -5753,26 +5728,28 @@
}
- /**
- * @brief Q31 square root function.
- * @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
- * @param[out] pOut square root of input value.
- * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
- * <code>in</code> is negative value and returns zero output for negative values.
- */
- arm_status arm_sqrt_q31(
+/**
+ @brief Q31 square root function.
+ @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF
+ @param[out] pOut points to square root of input value
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : input value is positive
+ - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+arm_status arm_sqrt_q31(
q31_t in,
q31_t * pOut);
- /**
- * @brief Q15 square root function.
- * @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
- * @param[out] pOut square root of input value.
- * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
- * <code>in</code> is negative value and returns zero output for negative values.
- */
- arm_status arm_sqrt_q15(
+/**
+ @brief Q15 square root function.
+ @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF
+ @param[out] pOut points to square root of input value
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : input value is positive
+ - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+arm_status arm_sqrt_q15(
q15_t in,
q15_t * pOut);
@@ -5784,7 +5761,7 @@
/**
* @brief floating-point Circular write function.
*/
- CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_f32(
+ __STATIC_FORCEINLINE void arm_circularWrite_f32(
int32_t * circBuffer,
int32_t L,
uint16_t * writeOffset,
@@ -5829,7 +5806,7 @@
/**
* @brief floating-point Circular Read function.
*/
- CMSIS_INLINE __STATIC_INLINE void arm_circularRead_f32(
+ __STATIC_FORCEINLINE void arm_circularRead_f32(
int32_t * circBuffer,
int32_t L,
int32_t * readOffset,
@@ -5885,7 +5862,7 @@
/**
* @brief Q15 Circular write function.
*/
- CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_q15(
+ __STATIC_FORCEINLINE void arm_circularWrite_q15(
q15_t * circBuffer,
int32_t L,
uint16_t * writeOffset,
@@ -5929,7 +5906,7 @@
/**
* @brief Q15 Circular Read function.
*/
- CMSIS_INLINE __STATIC_INLINE void arm_circularRead_q15(
+ __STATIC_FORCEINLINE void arm_circularRead_q15(
q15_t * circBuffer,
int32_t L,
int32_t * readOffset,
@@ -5986,7 +5963,7 @@
/**
* @brief Q7 Circular write function.
*/
- CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_q7(
+ __STATIC_FORCEINLINE void arm_circularWrite_q7(
q7_t * circBuffer,
int32_t L,
uint16_t * writeOffset,
@@ -6030,7 +6007,7 @@
/**
* @brief Q7 Circular Read function.
*/
- CMSIS_INLINE __STATIC_INLINE void arm_circularRead_q7(
+ __STATIC_FORCEINLINE void arm_circularRead_q7(
q7_t * circBuffer,
int32_t L,
int32_t * readOffset,
@@ -6091,9 +6068,9 @@
* @param[out] pResult is output value.
*/
void arm_power_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q63_t * pResult);
+ const q31_t * pSrc,
+ uint32_t blockSize,
+ q63_t * pResult);
/**
@@ -6103,9 +6080,9 @@
* @param[out] pResult is output value.
*/
void arm_power_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
+ const float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult);
/**
@@ -6115,9 +6092,9 @@
* @param[out] pResult is output value.
*/
void arm_power_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q63_t * pResult);
+ const q15_t * pSrc,
+ uint32_t blockSize,
+ q63_t * pResult);
/**
@@ -6127,9 +6104,9 @@
* @param[out] pResult is output value.
*/
void arm_power_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
+ const q7_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult);
/**
@@ -6139,9 +6116,9 @@
* @param[out] pResult is output value.
*/
void arm_mean_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q7_t * pResult);
+ const q7_t * pSrc,
+ uint32_t blockSize,
+ q7_t * pResult);
/**
@@ -6151,9 +6128,9 @@
* @param[out] pResult is output value.
*/
void arm_mean_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult);
+ const q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult);
/**
@@ -6163,9 +6140,9 @@
* @param[out] pResult is output value.
*/
void arm_mean_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
+ const q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult);
/**
@@ -6175,9 +6152,9 @@
* @param[out] pResult is output value.
*/
void arm_mean_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
+ const float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult);
/**
@@ -6187,9 +6164,9 @@
* @param[out] pResult is output value.
*/
void arm_var_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
+ const float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult);
/**
@@ -6199,9 +6176,9 @@
* @param[out] pResult is output value.
*/
void arm_var_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
+ const q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult);
/**
@@ -6211,9 +6188,9 @@
* @param[out] pResult is output value.
*/
void arm_var_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult);
+ const q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult);
/**
@@ -6223,9 +6200,9 @@
* @param[out] pResult is output value.
*/
void arm_rms_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
+ const float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult);
/**
@@ -6235,9 +6212,9 @@
* @param[out] pResult is output value.
*/
void arm_rms_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
+ const q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult);
/**
@@ -6247,9 +6224,9 @@
* @param[out] pResult is output value.
*/
void arm_rms_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult);
+ const q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult);
/**
@@ -6259,9 +6236,9 @@
* @param[out] pResult is output value.
*/
void arm_std_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
+ const float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult);
/**
@@ -6271,9 +6248,9 @@
* @param[out] pResult is output value.
*/
void arm_std_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
+ const q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult);
/**
@@ -6283,9 +6260,9 @@
* @param[out] pResult is output value.
*/
void arm_std_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult);
+ const q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult);
/**
@@ -6295,9 +6272,9 @@
* @param[in] numSamples number of complex samples in the input vector
*/
void arm_cmplx_mag_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t numSamples);
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t numSamples);
/**
@@ -6307,9 +6284,9 @@
* @param[in] numSamples number of complex samples in the input vector
*/
void arm_cmplx_mag_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t numSamples);
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t numSamples);
/**
@@ -6319,9 +6296,9 @@
* @param[in] numSamples number of complex samples in the input vector
*/
void arm_cmplx_mag_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t numSamples);
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t numSamples);
/**
@@ -6333,11 +6310,11 @@
* @param[out] imagResult imaginary part of the result returned here
*/
void arm_cmplx_dot_prod_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- uint32_t numSamples,
- q31_t * realResult,
- q31_t * imagResult);
+ const q15_t * pSrcA,
+ const q15_t * pSrcB,
+ uint32_t numSamples,
+ q31_t * realResult,
+ q31_t * imagResult);
/**
@@ -6349,11 +6326,11 @@
* @param[out] imagResult imaginary part of the result returned here
*/
void arm_cmplx_dot_prod_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- uint32_t numSamples,
- q63_t * realResult,
- q63_t * imagResult);
+ const q31_t * pSrcA,
+ const q31_t * pSrcB,
+ uint32_t numSamples,
+ q63_t * realResult,
+ q63_t * imagResult);
/**
@@ -6365,11 +6342,11 @@
* @param[out] imagResult imaginary part of the result returned here
*/
void arm_cmplx_dot_prod_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- uint32_t numSamples,
- float32_t * realResult,
- float32_t * imagResult);
+ const float32_t * pSrcA,
+ const float32_t * pSrcB,
+ uint32_t numSamples,
+ float32_t * realResult,
+ float32_t * imagResult);
/**
@@ -6380,10 +6357,10 @@
* @param[in] numSamples number of samples in each vector
*/
void arm_cmplx_mult_real_q15(
- q15_t * pSrcCmplx,
- q15_t * pSrcReal,
- q15_t * pCmplxDst,
- uint32_t numSamples);
+ const q15_t * pSrcCmplx,
+ const q15_t * pSrcReal,
+ q15_t * pCmplxDst,
+ uint32_t numSamples);
/**
@@ -6394,10 +6371,10 @@
* @param[in] numSamples number of samples in each vector
*/
void arm_cmplx_mult_real_q31(
- q31_t * pSrcCmplx,
- q31_t * pSrcReal,
- q31_t * pCmplxDst,
- uint32_t numSamples);
+ const q31_t * pSrcCmplx,
+ const q31_t * pSrcReal,
+ q31_t * pCmplxDst,
+ uint32_t numSamples);
/**
@@ -6408,10 +6385,10 @@
* @param[in] numSamples number of samples in each vector
*/
void arm_cmplx_mult_real_f32(
- float32_t * pSrcCmplx,
- float32_t * pSrcReal,
- float32_t * pCmplxDst,
- uint32_t numSamples);
+ const float32_t * pSrcCmplx,
+ const float32_t * pSrcReal,
+ float32_t * pCmplxDst,
+ uint32_t numSamples);
/**
@@ -6422,10 +6399,10 @@
* @param[in] index is the array index of the minimum value in the input buffer.
*/
void arm_min_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q7_t * result,
- uint32_t * index);
+ const q7_t * pSrc,
+ uint32_t blockSize,
+ q7_t * result,
+ uint32_t * index);
/**
@@ -6436,10 +6413,10 @@
* @param[in] pIndex is the array index of the minimum value in the input buffer.
*/
void arm_min_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult,
- uint32_t * pIndex);
+ const q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult,
+ uint32_t * pIndex);
/**
@@ -6450,10 +6427,10 @@
* @param[out] pIndex is the array index of the minimum value in the input buffer.
*/
void arm_min_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult,
- uint32_t * pIndex);
+ const q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult,
+ uint32_t * pIndex);
/**
@@ -6464,10 +6441,10 @@
* @param[out] pIndex is the array index of the minimum value in the input buffer.
*/
void arm_min_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult,
- uint32_t * pIndex);
+ const float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult,
+ uint32_t * pIndex);
/**
@@ -6478,10 +6455,10 @@
* @param[out] pIndex index of maximum value returned here
*/
void arm_max_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q7_t * pResult,
- uint32_t * pIndex);
+ const q7_t * pSrc,
+ uint32_t blockSize,
+ q7_t * pResult,
+ uint32_t * pIndex);
/**
@@ -6492,10 +6469,10 @@
* @param[out] pIndex index of maximum value returned here
*/
void arm_max_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult,
- uint32_t * pIndex);
+ const q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult,
+ uint32_t * pIndex);
/**
@@ -6506,10 +6483,10 @@
* @param[out] pIndex index of maximum value returned here
*/
void arm_max_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult,
- uint32_t * pIndex);
+ const q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult,
+ uint32_t * pIndex);
/**
@@ -6520,10 +6497,10 @@
* @param[out] pIndex index of maximum value returned here
*/
void arm_max_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult,
- uint32_t * pIndex);
+ const float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult,
+ uint32_t * pIndex);
/**
@@ -6534,10 +6511,10 @@
* @param[in] numSamples number of complex samples in each vector
*/
void arm_cmplx_mult_cmplx_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t numSamples);
+ const q15_t * pSrcA,
+ const q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t numSamples);
/**
@@ -6548,10 +6525,10 @@
* @param[in] numSamples number of complex samples in each vector
*/
void arm_cmplx_mult_cmplx_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t numSamples);
+ const q31_t * pSrcA,
+ const q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t numSamples);
/**
@@ -6562,10 +6539,10 @@
* @param[in] numSamples number of complex samples in each vector
*/
void arm_cmplx_mult_cmplx_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t numSamples);
+ const float32_t * pSrcA,
+ const float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t numSamples);
/**
@@ -6575,9 +6552,9 @@
* @param[in] blockSize length of the input vector
*/
void arm_float_to_q31(
- float32_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -6587,9 +6564,9 @@
* @param[in] blockSize length of the input vector
*/
void arm_float_to_q15(
- float32_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -6599,9 +6576,21 @@
* @param[in] blockSize length of the input vector
*/
void arm_float_to_q7(
- float32_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
+ const float32_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Converts the elements of the Q31 vector to floating-point vector.
+ * @param[in] pSrc is input pointer
+ * @param[out] pDst is output pointer
+ * @param[in] blockSize is the number of samples to process
+ */
+ void arm_q31_to_float(
+ const q31_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -6611,9 +6600,9 @@
* @param[in] blockSize is the number of samples to process
*/
void arm_q31_to_q15(
- q31_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -6623,9 +6612,9 @@
* @param[in] blockSize is the number of samples to process
*/
void arm_q31_to_q7(
- q31_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
+ const q31_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
/**
@@ -6635,9 +6624,9 @@
* @param[in] blockSize is the number of samples to process
*/
void arm_q15_to_float(
- q15_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
/**
@@ -6647,9 +6636,9 @@
* @param[in] blockSize is the number of samples to process
*/
void arm_q15_to_q31(
- q15_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
/**
@@ -6659,9 +6648,45 @@
* @param[in] blockSize is the number of samples to process
*/
void arm_q15_to_q7(
- q15_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
+ const q15_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Converts the elements of the Q7 vector to floating-point vector.
+ * @param[in] pSrc is input pointer
+ * @param[out] pDst is output pointer
+ * @param[in] blockSize is the number of samples to process
+ */
+ void arm_q7_to_float(
+ const q7_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Converts the elements of the Q7 vector to Q31 vector.
+ * @param[in] pSrc input pointer
+ * @param[out] pDst output pointer
+ * @param[in] blockSize number of samples to process
+ */
+ void arm_q7_to_q31(
+ const q7_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Converts the elements of the Q7 vector to Q15 vector.
+ * @param[in] pSrc input pointer
+ * @param[out] pDst output pointer
+ * @param[in] blockSize number of samples to process
+ */
+ void arm_q7_to_q15(
+ const q7_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
/**
@@ -6720,21 +6745,20 @@
* if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
*/
+
/**
* @addtogroup BilinearInterpolate
* @{
*/
-
/**
- *
* @brief Floating-point bilinear interpolation.
* @param[in,out] S points to an instance of the interpolation structure.
* @param[in] X interpolation coordinate.
* @param[in] Y interpolation coordinate.
* @return out interpolated value.
*/
- CMSIS_INLINE __STATIC_INLINE float32_t arm_bilinear_interp_f32(
+ __STATIC_FORCEINLINE float32_t arm_bilinear_interp_f32(
const arm_bilinear_interp_instance_f32 * S,
float32_t X,
float32_t Y)
@@ -6793,14 +6817,13 @@
/**
- *
* @brief Q31 bilinear interpolation.
* @param[in,out] S points to an instance of the interpolation structure.
* @param[in] X interpolation coordinate in 12.20 format.
* @param[in] Y interpolation coordinate in 12.20 format.
* @return out interpolated value.
*/
- CMSIS_INLINE __STATIC_INLINE q31_t arm_bilinear_interp_q31(
+ __STATIC_FORCEINLINE q31_t arm_bilinear_interp_q31(
arm_bilinear_interp_instance_q31 * S,
q31_t X,
q31_t Y)
@@ -6874,7 +6897,7 @@
* @param[in] Y interpolation coordinate in 12.20 format.
* @return out interpolated value.
*/
- CMSIS_INLINE __STATIC_INLINE q15_t arm_bilinear_interp_q15(
+ __STATIC_FORCEINLINE q15_t arm_bilinear_interp_q15(
arm_bilinear_interp_instance_q15 * S,
q31_t X,
q31_t Y)
@@ -6952,7 +6975,7 @@
* @param[in] Y interpolation coordinate in 12.20 format.
* @return out interpolated value.
*/
- CMSIS_INLINE __STATIC_INLINE q7_t arm_bilinear_interp_q7(
+ __STATIC_FORCEINLINE q7_t arm_bilinear_interp_q7(
arm_bilinear_interp_instance_q7 * S,
q31_t X,
q31_t Y)
diff --git a/CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib b/CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib
new file mode 100644
index 0000000..65c7625
--- /dev/null
+++ b/CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:afa93f014c4252cf0c530b223264c5d0b9b5d06b1fd02cce0e68976ed2877b5e
+size 2388652
diff --git a/CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib b/CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib
new file mode 100644
index 0000000..8558184
--- /dev/null
+++ b/CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib
@@ -0,0 +1,3 @@
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+size 2231476
diff --git a/CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib b/CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib
new file mode 100644
index 0000000..9ea6b67
--- /dev/null
+++ b/CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib
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diff --git a/CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib b/CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib
new file mode 100644
index 0000000..2806a2b
--- /dev/null
+++ b/CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib
@@ -0,0 +1,3 @@
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+size 2231904
diff --git a/CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib b/CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib
new file mode 100644
index 0000000..0fa9707
--- /dev/null
+++ b/CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib
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diff --git a/CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib b/CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib
new file mode 100644
index 0000000..d711b8c
--- /dev/null
+++ b/CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib
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diff --git a/CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib b/CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib
new file mode 100644
index 0000000..0d262e5
--- /dev/null
+++ b/CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib
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diff --git a/CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib b/CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib
new file mode 100644
index 0000000..c1e1536
--- /dev/null
+++ b/CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib
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new file mode 100644
index 0000000..5af3af5
--- /dev/null
+++ b/CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib
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diff --git a/CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib b/CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib
new file mode 100644
index 0000000..a026f5f
--- /dev/null
+++ b/CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib
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diff --git a/CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib b/CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib
new file mode 100644
index 0000000..19b7141
--- /dev/null
+++ b/CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib
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diff --git a/CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib b/CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib
new file mode 100644
index 0000000..ee7a943
--- /dev/null
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diff --git a/CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib b/CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib
new file mode 100644
index 0000000..d0da6e2
--- /dev/null
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diff --git a/CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib b/CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib
new file mode 100644
index 0000000..a84ec18
--- /dev/null
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diff --git a/CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib b/CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib
new file mode 100644
index 0000000..aeaa039
--- /dev/null
+++ b/CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib
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new file mode 100644
index 0000000..8537dca
--- /dev/null
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new file mode 100644
index 0000000..1736f62
--- /dev/null
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new file mode 100644
index 0000000..68fcaa0
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new file mode 100644
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new file mode 100644
index 0000000..65c7625
--- /dev/null
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new file mode 100644
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new file mode 100644
index 0000000..5af3af5
--- /dev/null
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diff --git a/CMSIS/DSP/Lib/ARMCLANG/arm_cortexM4b_math.lib b/CMSIS/DSP/Lib/ARMCLANG/arm_cortexM4b_math.lib
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diff --git a/CMSIS/DSP/Projects/ARM/arm_cortexM_math.uvoptx b/CMSIS/DSP/Projects/ARM/arm_cortexM_math.uvoptx
index 50ec47a..85a5df4 100644
--- a/CMSIS/DSP/Projects/ARM/arm_cortexM_math.uvoptx
+++ b/CMSIS/DSP/Projects/ARM/arm_cortexM_math.uvoptx
@@ -8,7 +8,7 @@
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
- <oExt>*.obj</oExt>
+ <oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
@@ -5437,6 +5437,30 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal.c</PathWithFileName>
+ <FilenameWithoutPath>arm_bitreversal.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
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+ <FileNumber>187</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal2.c</PathWithFileName>
+ <FilenameWithoutPath>arm_bitreversal2.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
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+ <FileNumber>188</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
<PathWithFileName>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</PathWithFileName>
<FilenameWithoutPath>arm_cfft_radix4_f32.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
@@ -5444,7 +5468,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>187</FileNumber>
+ <FileNumber>189</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5456,7 +5480,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>188</FileNumber>
+ <FileNumber>190</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5468,7 +5492,7 @@
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<GroupNumber>6</GroupNumber>
- <FileNumber>189</FileNumber>
+ <FileNumber>191</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5480,7 +5504,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>190</FileNumber>
+ <FileNumber>192</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5492,7 +5516,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>191</FileNumber>
+ <FileNumber>193</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5504,7 +5528,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>192</FileNumber>
+ <FileNumber>194</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5516,7 +5540,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>193</FileNumber>
+ <FileNumber>195</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5528,7 +5552,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>194</FileNumber>
+ <FileNumber>196</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5540,7 +5564,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>195</FileNumber>
+ <FileNumber>197</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5552,7 +5576,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>196</FileNumber>
+ <FileNumber>198</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5564,7 +5588,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>197</FileNumber>
+ <FileNumber>199</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5576,7 +5600,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>198</FileNumber>
+ <FileNumber>200</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5588,7 +5612,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>199</FileNumber>
+ <FileNumber>201</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5600,7 +5624,7 @@
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<File>
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- <FileNumber>200</FileNumber>
+ <FileNumber>202</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5612,7 +5636,7 @@
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<File>
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- <FileNumber>201</FileNumber>
+ <FileNumber>203</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5624,7 +5648,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>202</FileNumber>
+ <FileNumber>204</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5636,7 +5660,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>203</FileNumber>
+ <FileNumber>205</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5648,19 +5672,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>204</FileNumber>
- <FileType>1</FileType>
- <tvExp>0</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <bDave2>0</bDave2>
- <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal.c</PathWithFileName>
- <FilenameWithoutPath>arm_bitreversal.c</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- <File>
- <GroupNumber>6</GroupNumber>
- <FileNumber>205</FileNumber>
+ <FileNumber>206</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5672,7 +5684,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>206</FileNumber>
+ <FileNumber>207</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5684,7 +5696,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>207</FileNumber>
+ <FileNumber>208</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5696,7 +5708,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>208</FileNumber>
+ <FileNumber>209</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5708,7 +5720,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>209</FileNumber>
+ <FileNumber>210</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5720,7 +5732,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>210</FileNumber>
+ <FileNumber>211</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5732,7 +5744,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>211</FileNumber>
+ <FileNumber>212</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5744,7 +5756,7 @@
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<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>212</FileNumber>
+ <FileNumber>213</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5756,18 +5768,6 @@
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<File>
<GroupNumber>6</GroupNumber>
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- <tvExp>0</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <bDave2>0</bDave2>
- <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal2.S</PathWithFileName>
- <FilenameWithoutPath>arm_bitreversal2.S</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- <File>
- <GroupNumber>6</GroupNumber>
<FileNumber>214</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
diff --git a/CMSIS/DSP/Projects/ARM/arm_cortexM_math.uvprojx b/CMSIS/DSP/Projects/ARM/arm_cortexM_math.uvprojx
index d662135..21ecc99 100644
--- a/CMSIS/DSP/Projects/ARM/arm_cortexM_math.uvprojx
+++ b/CMSIS/DSP/Projects/ARM/arm_cortexM_math.uvprojx
@@ -16,7 +16,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -82,7 +82,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -336,7 +336,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -353,7 +353,7 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM0_FAMILY</MiscControls>
+ <MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
@@ -1333,6 +1333,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -1423,11 +1433,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -1468,11 +1473,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -1801,7 +1801,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -1867,7 +1867,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -2121,7 +2121,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -2138,7 +2138,7 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM0_FAMILY</MiscControls>
+ <MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
@@ -3118,6 +3118,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -3208,11 +3218,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -3253,11 +3258,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -3586,7 +3586,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3652,7 +3652,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -3906,7 +3906,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -3923,7 +3923,7 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
+ <MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
@@ -4903,6 +4903,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -4993,11 +5003,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -5038,11 +5043,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -5371,7 +5371,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5437,7 +5437,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -5691,7 +5691,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -5708,7 +5708,7 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
+ <MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
@@ -6688,6 +6688,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -6778,11 +6788,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -6823,11 +6828,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -7156,7 +7156,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -7222,7 +7222,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -7476,7 +7476,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -7493,7 +7493,7 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
+ <MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
@@ -8473,6 +8473,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -8563,11 +8573,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -8608,11 +8613,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -8941,7 +8941,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -9007,7 +9007,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -9261,7 +9261,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -9278,7 +9278,7 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
+ <MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
@@ -10258,6 +10258,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -10348,11 +10358,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -10393,11 +10398,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -10726,7 +10726,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -10792,7 +10792,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -11046,7 +11046,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>--fpmode=ieee_full</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -11063,7 +11063,7 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
+ <MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
@@ -12043,6 +12043,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -12133,11 +12143,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -12178,11 +12183,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -12511,7 +12511,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -12577,7 +12577,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -12831,7 +12831,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -12848,7 +12848,7 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
+ <MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
@@ -13828,6 +13828,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -13918,11 +13928,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -13963,11 +13968,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -14296,7 +14296,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -14362,7 +14362,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -14616,7 +14616,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -14633,7 +14633,7 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
+ <MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
@@ -15613,6 +15613,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -15703,11 +15713,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -15748,11 +15753,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -16081,7 +16081,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -16147,7 +16147,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -16401,7 +16401,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -16418,7 +16418,7 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
+ <MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
@@ -17398,6 +17398,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -17488,11 +17498,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -17533,11 +17538,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -17866,7 +17866,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -17932,7 +17932,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -18186,7 +18186,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>--fpmode=ieee_full</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -18203,7 +18203,7 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
+ <MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
@@ -19183,6 +19183,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -19273,11 +19283,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -19318,11 +19323,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -19651,7 +19651,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -19717,7 +19717,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -19971,7 +19971,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>--fpmode=ieee_full</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -19988,7 +19988,7 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
+ <MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
@@ -20968,6 +20968,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -21058,11 +21068,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -21103,11 +21108,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -21436,7 +21436,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -21502,7 +21502,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -21756,7 +21756,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>--fpmode=ieee_full</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -21773,7 +21773,7 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
+ <MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
@@ -22753,6 +22753,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -22843,11 +22853,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -22888,11 +22893,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -23221,7 +23221,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -23287,7 +23287,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -23541,7 +23541,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>--fpmode=ieee_full</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -23558,7 +23558,7 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
+ <MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
@@ -24538,6 +24538,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -24628,11 +24638,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -24673,11 +24678,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -25006,7 +25006,7 @@
<TargetCommonOption>
<Device>ARMv8MBL</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -25072,7 +25072,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -25326,7 +25326,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -25343,8 +25343,8 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
- <Define>__CC_ARM ARM_MATH_CM0_FAMILY</Define>
+ <MiscControls></MiscControls>
+ <Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
@@ -26323,6 +26323,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -26413,11 +26423,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -26458,11 +26463,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -26791,7 +26791,7 @@
<TargetCommonOption>
<Device>ARMv8MML</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -26857,7 +26857,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -27111,7 +27111,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -27128,8 +27128,8 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
- <Define>__CC_ARM</Define>
+ <MiscControls></MiscControls>
+ <Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
@@ -28108,6 +28108,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -28198,11 +28208,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -28243,11 +28248,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -28576,7 +28576,7 @@
<TargetCommonOption>
<Device>ARMv8MML_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -28642,7 +28642,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -28896,7 +28896,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -28913,8 +28913,8 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
- <Define>__CC_ARM</Define>
+ <MiscControls></MiscControls>
+ <Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
@@ -29893,6 +29893,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -29983,11 +29993,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -30028,11 +30033,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -30361,7 +30361,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -30427,7 +30427,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -30681,7 +30681,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -30698,8 +30698,8 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
- <Define>__CC_ARM</Define>
+ <MiscControls></MiscControls>
+ <Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
@@ -31678,6 +31678,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -31768,11 +31778,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -31813,11 +31818,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -32146,7 +32146,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -32212,7 +32212,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -32466,7 +32466,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -32483,8 +32483,8 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
- <Define>__CC_ARM</Define>
+ <MiscControls></MiscControls>
+ <Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
@@ -33463,6 +33463,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -33553,11 +33563,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -33598,11 +33603,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -33931,7 +33931,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -33997,7 +33997,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -34251,7 +34251,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -34268,8 +34268,8 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
- <Define>__CC_ARM</Define>
+ <MiscControls></MiscControls>
+ <Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
@@ -35248,6 +35248,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -35338,11 +35348,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -35383,11 +35388,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -35716,7 +35716,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev56</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -35782,7 +35782,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -36036,7 +36036,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -36053,8 +36053,8 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
- <MiscControls>--cpreproc</MiscControls>
- <Define>__CC_ARM</Define>
+ <MiscControls></MiscControls>
+ <Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
@@ -37033,6 +37033,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -37123,11 +37133,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -37168,11 +37173,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
diff --git a/CMSIS/DSP/Projects/ARM/arm_cortexM_math_Build.bat b/CMSIS/DSP/Projects/ARM/arm_cortexM_math_Build.bat
index c212640..988b285 100644
--- a/CMSIS/DSP/Projects/ARM/arm_cortexM_math_Build.bat
+++ b/CMSIS/DSP/Projects/ARM/arm_cortexM_math_Build.bat
@@ -38,8 +38,8 @@
echo Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log"
-REM echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log"
+echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log"
echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log"
@@ -47,32 +47,32 @@
echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log"
-REM echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
+echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
REM big endian libraries
-REM echo Building DSP Library for Cortex-M0 Big Endian
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b" -o "DspLib_cortexM0b_build.log"
+echo Building DSP Library for Cortex-M0 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b" -o "DspLib_cortexM0b_build.log"
-REM echo Building DSP Library for Cortex-M3 Big Endian
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b" -o "DspLib_cortexM3b_build.log"
+echo Building DSP Library for Cortex-M3 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b" -o "DspLib_cortexM3b_build.log"
-REM echo Building DSP Library for Cortex-M4 Big Endian
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log"
+echo Building DSP Library for Cortex-M4 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log"
-REM echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log"
+echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log"
-REM echo Building DSP Library for Cortex-M7 Big Endian
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log"
+echo Building DSP Library for Cortex-M7 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log"
-REM echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
+echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
-REM echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
+echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
echo.
echo Deleting intermediate files
@@ -81,4 +81,4 @@
del /Q *.bak
del /Q *.dep
del /Q *.uvguix.*
-del /Q ArInp.*
\ No newline at end of file
+del /Q ArInp.*
diff --git a/CMSIS/DSP/Projects/ARMCLANG/arm_cortexM_math.uvoptx b/CMSIS/DSP/Projects/ARMCLANG/arm_cortexM_math.uvoptx
index 50ec47a..85a5df4 100644
--- a/CMSIS/DSP/Projects/ARMCLANG/arm_cortexM_math.uvoptx
+++ b/CMSIS/DSP/Projects/ARMCLANG/arm_cortexM_math.uvoptx
@@ -8,7 +8,7 @@
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
- <oExt>*.obj</oExt>
+ <oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
@@ -5437,6 +5437,30 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal.c</PathWithFileName>
+ <FilenameWithoutPath>arm_bitreversal.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>187</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal2.c</PathWithFileName>
+ <FilenameWithoutPath>arm_bitreversal2.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>188</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
<PathWithFileName>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</PathWithFileName>
<FilenameWithoutPath>arm_cfft_radix4_f32.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
@@ -5444,7 +5468,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>187</FileNumber>
+ <FileNumber>189</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5456,7 +5480,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>188</FileNumber>
+ <FileNumber>190</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5468,7 +5492,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>189</FileNumber>
+ <FileNumber>191</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5480,7 +5504,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>190</FileNumber>
+ <FileNumber>192</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5492,7 +5516,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>191</FileNumber>
+ <FileNumber>193</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5504,7 +5528,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>192</FileNumber>
+ <FileNumber>194</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5516,7 +5540,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>193</FileNumber>
+ <FileNumber>195</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5528,7 +5552,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>194</FileNumber>
+ <FileNumber>196</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5540,7 +5564,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>195</FileNumber>
+ <FileNumber>197</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5552,7 +5576,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>196</FileNumber>
+ <FileNumber>198</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5564,7 +5588,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>197</FileNumber>
+ <FileNumber>199</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5576,7 +5600,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>198</FileNumber>
+ <FileNumber>200</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5588,7 +5612,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>199</FileNumber>
+ <FileNumber>201</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5600,7 +5624,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>200</FileNumber>
+ <FileNumber>202</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5612,7 +5636,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>201</FileNumber>
+ <FileNumber>203</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5624,7 +5648,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>202</FileNumber>
+ <FileNumber>204</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5636,7 +5660,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>203</FileNumber>
+ <FileNumber>205</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5648,19 +5672,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>204</FileNumber>
- <FileType>1</FileType>
- <tvExp>0</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <bDave2>0</bDave2>
- <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal.c</PathWithFileName>
- <FilenameWithoutPath>arm_bitreversal.c</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- <File>
- <GroupNumber>6</GroupNumber>
- <FileNumber>205</FileNumber>
+ <FileNumber>206</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5672,7 +5684,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>206</FileNumber>
+ <FileNumber>207</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5684,7 +5696,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>207</FileNumber>
+ <FileNumber>208</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5696,7 +5708,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>208</FileNumber>
+ <FileNumber>209</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5708,7 +5720,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>209</FileNumber>
+ <FileNumber>210</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5720,7 +5732,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>210</FileNumber>
+ <FileNumber>211</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5732,7 +5744,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>211</FileNumber>
+ <FileNumber>212</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5744,7 +5756,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>212</FileNumber>
+ <FileNumber>213</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5756,18 +5768,6 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>213</FileNumber>
- <FileType>2</FileType>
- <tvExp>0</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <bDave2>0</bDave2>
- <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal2.S</PathWithFileName>
- <FilenameWithoutPath>arm_bitreversal2.S</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- <File>
- <GroupNumber>6</GroupNumber>
<FileNumber>214</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
diff --git a/CMSIS/DSP/Projects/ARMCLANG/arm_cortexM_math.uvprojx b/CMSIS/DSP/Projects/ARMCLANG/arm_cortexM_math.uvprojx
index 942dcb0..013cb2e 100644
--- a/CMSIS/DSP/Projects/ARMCLANG/arm_cortexM_math.uvprojx
+++ b/CMSIS/DSP/Projects/ARMCLANG/arm_cortexM_math.uvprojx
@@ -10,13 +10,13 @@
<TargetName>cortexM0l</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
- <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+ <pCCUsed>6110000::V6.11::.\ARMCLANG</pCCUsed>
<uAC6>1</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -82,7 +82,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -312,7 +312,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -336,7 +336,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -354,7 +354,7 @@
<uClangAs>1</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_CM0_FAMILY</Define>
+ <Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
@@ -1333,6 +1333,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -1423,11 +1433,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -1468,11 +1473,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -1801,7 +1801,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -1867,7 +1867,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -2097,7 +2097,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -2121,7 +2121,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -2139,7 +2139,7 @@
<uClangAs>1</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_CM0_FAMILY</Define>
+ <Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
@@ -3118,6 +3118,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -3208,11 +3218,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -3253,11 +3258,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -3586,7 +3586,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3652,7 +3652,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -3882,7 +3882,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -3906,7 +3906,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -4903,6 +4903,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -4993,11 +5003,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -5038,11 +5043,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -5371,7 +5371,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5437,7 +5437,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -5667,7 +5667,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -5691,7 +5691,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -6688,6 +6688,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -6778,11 +6788,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -6823,11 +6828,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -7156,7 +7156,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -7222,7 +7222,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -7452,7 +7452,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -7476,7 +7476,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -8473,6 +8473,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -8563,11 +8573,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -8608,11 +8613,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -8941,7 +8941,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -9007,7 +9007,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -9237,7 +9237,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -9261,7 +9261,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -10258,6 +10258,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -10348,11 +10358,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -10393,11 +10398,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -10720,13 +10720,13 @@
<TargetName>cortexM4lf</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
- <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+ <pCCUsed>6110000::V6.11::.\ARMCLANG</pCCUsed>
<uAC6>1</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -10792,7 +10792,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -11022,7 +11022,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -11046,7 +11046,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -12043,6 +12043,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -12133,11 +12143,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -12178,11 +12183,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -12511,7 +12511,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -12577,7 +12577,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -12807,7 +12807,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -12831,7 +12831,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -13828,6 +13828,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -13918,11 +13928,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -13963,11 +13968,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -14296,7 +14296,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -14362,7 +14362,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -14592,7 +14592,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -14616,7 +14616,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -15613,6 +15613,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -15703,11 +15713,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -15748,11 +15753,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -16081,7 +16081,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -16147,7 +16147,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -16377,7 +16377,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -16401,7 +16401,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -17398,6 +17398,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -17488,11 +17498,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -17533,11 +17538,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -17866,7 +17866,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -17932,7 +17932,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -18162,7 +18162,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -18186,7 +18186,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -19183,6 +19183,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -19273,11 +19283,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -19318,11 +19323,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -19651,7 +19651,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -19717,7 +19717,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -19947,7 +19947,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -19971,7 +19971,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -20968,6 +20968,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -21058,11 +21068,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -21103,11 +21108,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -21436,7 +21436,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -21502,7 +21502,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -21732,7 +21732,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -21756,7 +21756,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -22753,6 +22753,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -22843,11 +22853,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -22888,11 +22893,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -23221,7 +23221,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -23287,7 +23287,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -23517,7 +23517,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -23541,7 +23541,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -24538,6 +24538,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -24628,11 +24638,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -24673,11 +24678,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -25006,7 +25006,7 @@
<TargetCommonOption>
<Device>ARMv8MBL</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -25072,7 +25072,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -25302,7 +25302,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -25326,7 +25326,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -25344,7 +25344,7 @@
<uClangAs>1</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_CM0_FAMILY</Define>
+ <Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
@@ -26323,6 +26323,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -26413,11 +26423,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -26458,11 +26463,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -26791,7 +26791,7 @@
<TargetCommonOption>
<Device>ARMv8MML</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -26857,7 +26857,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -27087,7 +27087,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -27111,7 +27111,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -28108,6 +28108,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -28198,11 +28208,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -28243,11 +28248,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -28576,7 +28576,7 @@
<TargetCommonOption>
<Device>ARMv8MML_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -28642,7 +28642,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -28872,7 +28872,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -28896,7 +28896,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -29893,6 +29893,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -29983,11 +29993,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -30028,11 +30033,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -30361,7 +30361,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -30427,7 +30427,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -30657,7 +30657,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -30681,7 +30681,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -31678,6 +31678,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -31768,11 +31778,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -31813,11 +31818,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -32146,7 +32146,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -32212,7 +32212,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -32442,7 +32442,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -32466,7 +32466,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -33463,6 +33463,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -33553,11 +33563,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -33598,11 +33603,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -33931,7 +33931,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -33997,7 +33997,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -34227,7 +34227,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -34251,7 +34251,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -35248,6 +35248,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -35338,11 +35348,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -35383,11 +35388,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -35716,7 +35716,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -35782,7 +35782,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARMCLANG\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARMCLANG\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -36012,7 +36012,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>4</Optim>
+ <Optim>6</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@@ -36036,7 +36036,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -37033,6 +37033,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -37123,11 +37133,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -37168,11 +37173,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
diff --git a/CMSIS/DSP/Projects/ARMCLANG/arm_cortexM_math_Build.bat b/CMSIS/DSP/Projects/ARMCLANG/arm_cortexM_math_Build.bat
index c3c4931..bba330f 100644
--- a/CMSIS/DSP/Projects/ARMCLANG/arm_cortexM_math_Build.bat
+++ b/CMSIS/DSP/Projects/ARMCLANG/arm_cortexM_math_Build.bat
@@ -38,8 +38,8 @@
echo Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log"
-REM echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log"
+echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log"
echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log"
@@ -47,32 +47,32 @@
echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log"
-REM echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
+echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
REM big endian libraries
-REM echo Building DSP Library for Cortex-M0 Big Endian
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b" -o "DspLib_cortexM0b_build.log"
+echo Building DSP Library for Cortex-M0 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b" -o "DspLib_cortexM0b_build.log"
-REM echo Building DSP Library for Cortex-M3 Big Endian
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b" -o "DspLib_cortexM3b_build.log"
+echo Building DSP Library for Cortex-M3 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b" -o "DspLib_cortexM3b_build.log"
-REM echo Building DSP Library for Cortex-M4 Big Endian
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log"
+echo Building DSP Library for Cortex-M4 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log"
-REM echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log"
+echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log"
-REM echo Building DSP Library for Cortex-M7 Big Endian
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log"
+echo Building DSP Library for Cortex-M7 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log"
-REM echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
+echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
-REM echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
+echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
echo.
echo Deleting intermediate files
@@ -81,4 +81,4 @@
del /Q *.bak
del /Q *.dep
del /Q *.uvguix.*
-del /Q ArInp.*
\ No newline at end of file
+del /Q ArInp.*
diff --git a/CMSIS/DSP/Projects/GCC/arm_cortexM_math.uvoptx b/CMSIS/DSP/Projects/GCC/arm_cortexM_math.uvoptx
index 482201c..4319d1e 100644
--- a/CMSIS/DSP/Projects/GCC/arm_cortexM_math.uvoptx
+++ b/CMSIS/DSP/Projects/GCC/arm_cortexM_math.uvoptx
@@ -8,7 +8,7 @@
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
- <oExt>*.obj</oExt>
+ <oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
@@ -5442,6 +5442,30 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal.c</PathWithFileName>
+ <FilenameWithoutPath>arm_bitreversal.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>187</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal2.c</PathWithFileName>
+ <FilenameWithoutPath>arm_bitreversal2.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>188</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
<PathWithFileName>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</PathWithFileName>
<FilenameWithoutPath>arm_cfft_radix4_f32.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
@@ -5449,7 +5473,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>187</FileNumber>
+ <FileNumber>189</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5461,7 +5485,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>188</FileNumber>
+ <FileNumber>190</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5473,7 +5497,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>189</FileNumber>
+ <FileNumber>191</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5485,7 +5509,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>190</FileNumber>
+ <FileNumber>192</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5497,7 +5521,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>191</FileNumber>
+ <FileNumber>193</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5509,7 +5533,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>192</FileNumber>
+ <FileNumber>194</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5521,7 +5545,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>193</FileNumber>
+ <FileNumber>195</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5533,7 +5557,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>194</FileNumber>
+ <FileNumber>196</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5545,7 +5569,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>195</FileNumber>
+ <FileNumber>197</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5557,7 +5581,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>196</FileNumber>
+ <FileNumber>198</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5569,7 +5593,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>197</FileNumber>
+ <FileNumber>199</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5581,7 +5605,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>198</FileNumber>
+ <FileNumber>200</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5593,7 +5617,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>199</FileNumber>
+ <FileNumber>201</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5605,7 +5629,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>200</FileNumber>
+ <FileNumber>202</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5617,7 +5641,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>201</FileNumber>
+ <FileNumber>203</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5629,7 +5653,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>202</FileNumber>
+ <FileNumber>204</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5641,7 +5665,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>203</FileNumber>
+ <FileNumber>205</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5653,19 +5677,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>204</FileNumber>
- <FileType>1</FileType>
- <tvExp>0</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <bDave2>0</bDave2>
- <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal.c</PathWithFileName>
- <FilenameWithoutPath>arm_bitreversal.c</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- <File>
- <GroupNumber>6</GroupNumber>
- <FileNumber>205</FileNumber>
+ <FileNumber>206</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5677,7 +5689,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>206</FileNumber>
+ <FileNumber>207</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5689,7 +5701,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>207</FileNumber>
+ <FileNumber>208</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5701,7 +5713,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>208</FileNumber>
+ <FileNumber>209</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5713,7 +5725,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>209</FileNumber>
+ <FileNumber>210</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5725,7 +5737,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>210</FileNumber>
+ <FileNumber>211</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5737,7 +5749,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>211</FileNumber>
+ <FileNumber>212</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5749,7 +5761,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>212</FileNumber>
+ <FileNumber>213</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -5761,18 +5773,6 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
- <FileNumber>213</FileNumber>
- <FileType>1</FileType>
- <tvExp>0</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <bDave2>0</bDave2>
- <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal2.S</PathWithFileName>
- <FilenameWithoutPath>arm_bitreversal2.S</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- <File>
- <GroupNumber>6</GroupNumber>
<FileNumber>214</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
diff --git a/CMSIS/DSP/Projects/GCC/arm_cortexM_math.uvprojx b/CMSIS/DSP/Projects/GCC/arm_cortexM_math.uvprojx
index f4e2d65..6329b9a 100644
--- a/CMSIS/DSP/Projects/GCC/arm_cortexM_math.uvprojx
+++ b/CMSIS/DSP/Projects/GCC/arm_cortexM_math.uvprojx
@@ -15,7 +15,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -81,7 +81,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -240,7 +240,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
- <Define>ARM_MATH_CM0_FAMILY, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_CM0_FAMILY, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -1226,6 +1226,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -1316,11 +1326,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -1361,11 +1366,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -1693,7 +1693,7 @@
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -1759,7 +1759,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -1918,7 +1918,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
- <Define>ARM_MATH_CM0_FAMILY, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_CM0_FAMILY, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -2904,6 +2904,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -2994,11 +3004,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -3039,11 +3044,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -3371,7 +3371,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -3437,7 +3437,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -3596,7 +3596,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -4582,6 +4582,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -4672,11 +4682,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -4717,11 +4722,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -5049,7 +5049,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -5115,7 +5115,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -5274,7 +5274,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -6260,6 +6260,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -6350,11 +6360,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -6395,11 +6400,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -6727,7 +6727,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -6793,7 +6793,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -6952,7 +6952,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -7938,6 +7938,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -8028,11 +8038,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -8073,11 +8078,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -8405,7 +8405,7 @@
<TargetCommonOption>
<Device>ARMCM4</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -8471,7 +8471,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -8630,7 +8630,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -9616,6 +9616,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -9706,11 +9716,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -9751,11 +9756,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -10083,7 +10083,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -10149,7 +10149,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name>cmd.exe /C getSizeInfo "$L\lib@L.a" "@L_SizeInfo.txt"</UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -10308,7 +10308,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -11294,6 +11294,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -11384,11 +11394,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -11429,11 +11434,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -11761,7 +11761,7 @@
<TargetCommonOption>
<Device>ARMCM4_FP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -11827,7 +11827,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -11986,7 +11986,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -12972,6 +12972,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -13062,11 +13072,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -13107,11 +13112,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -13439,7 +13439,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -13505,7 +13505,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -13664,7 +13664,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -14650,6 +14650,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -14740,11 +14750,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -14785,11 +14790,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -15117,7 +15117,7 @@
<TargetCommonOption>
<Device>ARMCM7</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -15183,7 +15183,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -15342,7 +15342,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -16328,6 +16328,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -16418,11 +16428,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -16463,11 +16468,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -16795,7 +16795,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -16861,7 +16861,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -17020,7 +17020,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -18006,6 +18006,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -18096,11 +18106,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -18141,11 +18146,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -18473,7 +18473,7 @@
<TargetCommonOption>
<Device>ARMCM7_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -18539,7 +18539,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -18698,7 +18698,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -19684,6 +19684,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -19774,11 +19784,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -19819,11 +19824,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -20151,7 +20151,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -20217,7 +20217,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -20376,7 +20376,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -21362,6 +21362,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -21452,11 +21462,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -21497,11 +21502,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -21829,7 +21829,7 @@
<TargetCommonOption>
<Device>ARMCM7_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -21895,7 +21895,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -22054,7 +22054,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -23040,6 +23040,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -23130,11 +23140,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -23175,11 +23180,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -23507,7 +23507,7 @@
<TargetCommonOption>
<Device>ARMv8MBL</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -23573,7 +23573,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -23732,7 +23732,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.base</MiscControls>
- <Define>ARM_MATH_CM0_FAMILY, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_CM0_FAMILY, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -24718,6 +24718,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -24808,11 +24818,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -24853,11 +24858,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -25185,7 +25185,7 @@
<TargetCommonOption>
<Device>ARMv8MML</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -25251,7 +25251,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -25410,7 +25410,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -26396,6 +26396,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -26486,11 +26496,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -26531,11 +26536,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -26863,7 +26863,7 @@
<TargetCommonOption>
<Device>ARMv8MML_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -26929,7 +26929,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -27088,7 +27088,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -28074,6 +28074,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -28164,11 +28174,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -28209,11 +28214,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -28541,7 +28541,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -28607,7 +28607,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -28766,7 +28766,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -29752,6 +29752,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -29842,11 +29852,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -29887,11 +29892,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -30219,7 +30219,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -30285,7 +30285,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -30444,7 +30444,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -31430,6 +31430,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -31520,11 +31530,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -31565,11 +31570,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -31897,7 +31897,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_SP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -31963,7 +31963,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -32122,7 +32122,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -33108,6 +33108,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -33198,11 +33208,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -33243,11 +33248,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -33575,7 +33575,7 @@
<TargetCommonOption>
<Device>ARMv8MML_DSP_DP</Device>
<Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.5.0-dev0</PackID>
+ <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -33641,7 +33641,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+ <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -33800,7 +33800,7 @@
<uThumb>1</uThumb>
<VariousControls>
<MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
- <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+ <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
</VariousControls>
@@ -34786,6 +34786,16 @@
<GroupName>TransformFunctions</GroupName>
<Files>
<File>
+ <FileName>arm_bitreversal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+ </File>
+ <File>
+ <FileName>arm_bitreversal2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+ </File>
+ <File>
<FileName>arm_cfft_radix4_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -34876,11 +34886,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
- </File>
- <File>
<FileName>arm_cfft_radix2_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -34921,11 +34926,6 @@
<FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
</File>
<File>
- <FileName>arm_bitreversal2.S</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
- </File>
- <File>
<FileName>arm_rfft_fast_f32.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
diff --git a/CMSIS/DSP/Projects/GCC/arm_cortexM_math_Build.bat b/CMSIS/DSP/Projects/GCC/arm_cortexM_math_Build.bat
index 524bf7b..6904763 100644
--- a/CMSIS/DSP/Projects/GCC/arm_cortexM_math_Build.bat
+++ b/CMSIS/DSP/Projects/GCC/arm_cortexM_math_Build.bat
@@ -38,8 +38,8 @@
echo Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log"
-REM echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log"
+echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log"
echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log"
@@ -47,32 +47,32 @@
echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU
%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log"
-REM echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
+echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
REM big endian libraries
-REM echo Building DSP Library for Cortex-M0 Big Endian
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b" -o "DspLib_cortexM0b_build.log"
+echo Building DSP Library for Cortex-M0 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b" -o "DspLib_cortexM0b_build.log"
-REM echo Building DSP Library for Cortex-M3 Big Endian
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b" -o "DspLib_cortexM3b_build.log"
+echo Building DSP Library for Cortex-M3 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b" -o "DspLib_cortexM3b_build.log"
-REM echo Building DSP Library for Cortex-M4 Big Endian
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log"
+echo Building DSP Library for Cortex-M4 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log"
-REM echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log"
+echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log"
-REM echo Building DSP Library for Cortex-M7 Big Endian
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log"
+echo Building DSP Library for Cortex-M7 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log"
-REM echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
+echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
-REM echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU
-REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
+echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
echo.
echo Deleting intermediate files
@@ -81,4 +81,4 @@
del /Q *.bak
del /Q *.dep
del /Q *.uvguix.*
-del /Q ArInp.*
\ No newline at end of file
+del /Q ArInp.*
diff --git a/CMSIS/DSP/Projects/IAR/arm_cortexM_math.ewp b/CMSIS/DSP/Projects/IAR/arm_cortexM_math.ewp
index 9499ae1..1f11a3c 100644
--- a/CMSIS/DSP/Projects/IAR/arm_cortexM_math.ewp
+++ b/CMSIS/DSP/Projects/IAR/arm_cortexM_math.ewp
@@ -11,7 +11,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -66,7 +66,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
- <state>8.22.1.15696</state>
+ <state>8.30.1.17146</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@@ -112,7 +112,7 @@
</option>
<option>
<name>RTConfigPath2</name>
- <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+ <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
</option>
<option>
<name>GBECoreSlave</name>
@@ -204,6 +204,11 @@
<name>TrustZone</name>
<state>0</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -217,6 +222,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -517,7 +523,7 @@
</option>
<option>
<name>ADefines</name>
- <state>ARM_MATH_CM0_FAMILY</state>
+ <state></state>
</option>
<option>
<name>AList</name>
@@ -681,7 +687,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -993,6 +999,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -1032,7 +1042,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -1225,6 +1235,11 @@
<name>TrustZone</name>
<state>0</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -1238,6 +1253,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
<state>ARM_MATH_BIG_ENDIAN</state>
</option>
<option>
@@ -1539,7 +1555,7 @@
</option>
<option>
<name>ADefines</name>
- <state>ARM_MATH_CM0_FAMILY</state>
+ <state></state>
</option>
<option>
<name>AList</name>
@@ -1703,7 +1719,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -2015,6 +2031,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -2054,7 +2074,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -2247,6 +2267,11 @@
<name>TrustZone</name>
<state>0</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -2260,6 +2285,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -2724,7 +2750,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -3036,6 +3062,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -3075,7 +3105,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -3268,6 +3298,11 @@
<name>TrustZone</name>
<state>0</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -3281,6 +3316,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
<state>ARM_MATH_BIG_ENDIAN</state>
</option>
<option>
@@ -3746,7 +3782,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -4058,6 +4094,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -4097,7 +4137,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -4290,6 +4330,11 @@
<name>TrustZone</name>
<state>0</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -4303,6 +4348,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -4767,7 +4813,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -5079,6 +5125,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -5118,7 +5168,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -5311,6 +5361,11 @@
<name>TrustZone</name>
<state>0</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -5324,6 +5379,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
<state>ARM_MATH_BIG_ENDIAN</state>
</option>
<option>
@@ -5789,7 +5845,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -6101,6 +6157,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -6140,7 +6200,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -6333,6 +6393,11 @@
<name>TrustZone</name>
<state>0</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -6346,6 +6411,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -6810,7 +6876,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -7122,6 +7188,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -7161,7 +7231,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -7354,6 +7424,11 @@
<name>TrustZone</name>
<state>0</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -7367,6 +7442,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
<state>ARM_MATH_BIG_ENDIAN</state>
</option>
<option>
@@ -7832,7 +7908,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -8144,6 +8220,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -8183,7 +8263,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -8376,6 +8456,11 @@
<name>TrustZone</name>
<state>0</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -8389,6 +8474,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -8853,7 +8939,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -9165,6 +9251,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -9204,7 +9294,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -9397,6 +9487,11 @@
<name>TrustZone</name>
<state>0</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -9410,6 +9505,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
<state>ARM_MATH_BIG_ENDIAN</state>
</option>
<option>
@@ -9875,7 +9971,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -10187,6 +10283,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -10226,7 +10326,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -10419,6 +10519,11 @@
<name>TrustZone</name>
<state>0</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -10432,6 +10537,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -10896,7 +11002,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -11208,6 +11314,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -11247,7 +11357,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -11440,6 +11550,11 @@
<name>TrustZone</name>
<state>0</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -11453,6 +11568,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
<state>ARM_MATH_BIG_ENDIAN</state>
</option>
<option>
@@ -11918,7 +12034,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -12230,6 +12346,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -12269,7 +12389,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -12462,6 +12582,11 @@
<name>TrustZone</name>
<state>0</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -12475,6 +12600,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -12939,7 +13065,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -13251,6 +13377,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -13290,7 +13420,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -13483,6 +13613,11 @@
<name>TrustZone</name>
<state>0</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -13496,6 +13631,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
<state>ARM_MATH_BIG_ENDIAN</state>
</option>
<option>
@@ -13961,7 +14097,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -14273,6 +14409,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -14312,7 +14452,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -14505,6 +14645,11 @@
<name>TrustZone</name>
<state>1</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -14518,6 +14663,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -14818,7 +14964,7 @@
</option>
<option>
<name>ADefines</name>
- <state>ARM_MATH_CM0_FAMILY</state>
+ <state></state>
</option>
<option>
<name>AList</name>
@@ -14982,7 +15128,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -15294,6 +15440,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -15333,7 +15483,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -15526,6 +15676,11 @@
<name>TrustZone</name>
<state>1</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -15539,6 +15694,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -16003,7 +16159,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -16315,6 +16471,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -16354,7 +16514,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -16547,6 +16707,11 @@
<name>TrustZone</name>
<state>1</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -16560,6 +16725,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -17024,7 +17190,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -17336,6 +17502,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -17375,7 +17545,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -17568,6 +17738,11 @@
<name>TrustZone</name>
<state>1</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -17581,6 +17756,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -18045,7 +18221,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -18357,6 +18533,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -18396,7 +18576,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -18589,6 +18769,11 @@
<name>TrustZone</name>
<state>1</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -18602,6 +18787,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -19066,7 +19252,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -19378,6 +19564,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -19417,7 +19607,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -19610,6 +19800,11 @@
<name>TrustZone</name>
<state>1</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -19623,6 +19818,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -20087,7 +20283,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -20399,6 +20595,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -20438,7 +20638,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>30</version>
+ <version>31</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -20631,6 +20831,11 @@
<name>TrustZone</name>
<state>1</state>
</option>
+ <option>
+ <name>TrustZoneModes</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -20644,6 +20849,7 @@
<name>CCDefines</name>
<state>ARM_MATH_MATRIX_CHECK</state>
<state>ARM_MATH_ROUNDING</state>
+ <state>ARM_MATH_LOOPUNROLL</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -21108,7 +21314,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>20</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -21420,6 +21626,10 @@
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
+ <option>
+ <name>IlinkTrustzoneImportLibraryOut</name>
+ <state>###Unitialized###</state>
+ </option>
</data>
</settings>
<settings>
@@ -22202,7 +22412,7 @@
<name>$PROJ_DIR$\..\..\Source\TransformFunctions\arm_bitreversal.c</name>
</file>
<file>
- <name>$PROJ_DIR$\..\..\Source\TransformFunctions\arm_bitreversal2.S</name>
+ <name>$PROJ_DIR$\..\..\Source\TransformFunctions\arm_bitreversal2.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\Source\TransformFunctions\arm_cfft_f32.c</name>
diff --git a/CMSIS/DSP/Projects/IAR/arm_cortexM_math_Build.bat b/CMSIS/DSP/Projects/IAR/arm_cortexM_math_Build.bat
index 5e96c19..0afdf65 100644
--- a/CMSIS/DSP/Projects/IAR/arm_cortexM_math_Build.bat
+++ b/CMSIS/DSP/Projects/IAR/arm_cortexM_math_Build.bat
@@ -8,6 +8,7 @@
echo.
echo Building DSP Libraries ARM
+
echo Building DSP Library for Cortex-M0 Little Endian
%IAREXE% arm_cortexM_math.ewp -build cortexM0l
@@ -50,6 +51,7 @@
echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
%IAREXE% arm_cortexM_math.ewp -build ARMv8MMLldfdp
+
REM big endian libraries
echo Building DSP Library for Cortex-M0 Big Endian
@@ -74,28 +76,28 @@
%IAREXE% arm_cortexM_math.ewp -build cortexM7bfdp
echo Copy libs to CMSIS\lib\IAR
-mkdir ..\..\..\lib\IAR
-copy ReleaseM0BE\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ReleaseM0LE\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ReleaseM3BE\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ReleaseM3LE\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ReleaseM4BE\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ReleaseM4BE_FPU\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ReleaseM4LE\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ReleaseM4LE_FPU\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ReleaseM7BE\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ReleaseM7BE_FPU_DP\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ReleaseM7BE_FPU_SP\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ReleaseM7LE\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ReleaseM7LE_FPU_DP\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ReleaseM7LE_FPU_SP\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ARMv8MBLl\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ARMv8MMLl\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ARMv8MMLld\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ARMv8MMLldfdp\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ARMv8MMLldfsp\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ARMv8MMLlfdp\Exe\*.a ..\..\..\lib\IAR\ /Y
-copy ARMv8MMLlfsp\Exe\*.a ..\..\..\lib\IAR\ /Y
+mkdir ..\..\lib\IAR
+copy ReleaseM0BE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM0LE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM3BE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM3LE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM4BE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM4BE_FPU\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM4LE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM4LE_FPU\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM7BE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM7BE_FPU_DP\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM7BE_FPU_SP\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM7LE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM7LE_FPU_DP\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM7LE_FPU_SP\Exe\*.a ..\..\lib\IAR\ /Y
+copy ARMv8MBLl\Exe\*.a ..\..\lib\IAR\ /Y
+copy ARMv8MMLl\Exe\*.a ..\..\lib\IAR\ /Y
+copy ARMv8MMLld\Exe\*.a ..\..\lib\IAR\ /Y
+copy ARMv8MMLldfdp\Exe\*.a ..\..\lib\IAR\ /Y
+copy ARMv8MMLldfsp\Exe\*.a ..\..\lib\IAR\ /Y
+copy ARMv8MMLlfdp\Exe\*.a ..\..\lib\IAR\ /Y
+copy ARMv8MMLlfsp\Exe\*.a ..\..\lib\IAR\ /Y
echo.
echo Deleting intermediate files
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c b/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c
new file mode 100644
index 0000000..80d58b3
--- /dev/null
+++ b/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c
@@ -0,0 +1,36 @@
+
+#include "arm_abs_f32.c"
+#include "arm_abs_q15.c"
+#include "arm_abs_q31.c"
+#include "arm_abs_q7.c"
+#include "arm_add_f32.c"
+#include "arm_add_q15.c"
+#include "arm_add_q31.c"
+#include "arm_add_q7.c"
+#include "arm_dot_prod_f32.c"
+#include "arm_dot_prod_q15.c"
+#include "arm_dot_prod_q31.c"
+#include "arm_dot_prod_q7.c"
+#include "arm_mult_f32.c"
+#include "arm_mult_q15.c"
+#include "arm_mult_q31.c"
+#include "arm_mult_q7.c"
+#include "arm_negate_f32.c"
+#include "arm_negate_q15.c"
+#include "arm_negate_q31.c"
+#include "arm_negate_q7.c"
+#include "arm_offset_f32.c"
+#include "arm_offset_q15.c"
+#include "arm_offset_q31.c"
+#include "arm_offset_q7.c"
+#include "arm_scale_f32.c"
+#include "arm_scale_q15.c"
+#include "arm_scale_q31.c"
+#include "arm_scale_q7.c"
+#include "arm_shift_q15.c"
+#include "arm_shift_q31.c"
+#include "arm_shift_q7.c"
+#include "arm_sub_f32.c"
+#include "arm_sub_q15.c"
+#include "arm_sub_q31.c"
+#include "arm_sub_q7.c"
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c
index f88ef95..7c0db37 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c
@@ -3,13 +3,13 @@
* Title: arm_abs_f32.c
* Description: Floating-point vector absolute value
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,124 +30,88 @@
#include <math.h>
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @defgroup BasicAbs Vector Absolute Value
- *
- * Computes the absolute value of a vector on an element-by-element basis.
- *
- * <pre>
- * pDst[n] = abs(pSrc[n]), 0 <= n < blockSize.
- * </pre>
- *
- * The functions support in-place computation allowing the source and
- * destination pointers to reference the same memory buffer.
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ @defgroup BasicAbs Vector Absolute Value
+
+ Computes the absolute value of a vector on an element-by-element basis.
+
+ <pre>
+ pDst[n] = abs(pSrc[n]), 0 <= n < blockSize.
+ </pre>
+
+ The functions support in-place computation allowing the source and
+ destination pointers to reference the same memory buffer.
+ There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
- * @addtogroup BasicAbs
- * @{
+ @addtogroup BasicAbs
+ @{
*/
/**
- * @brief Floating-point vector absolute value.
- * @param[in] *pSrc points to the input buffer
- * @param[out] *pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- * @return none.
+ @brief Floating-point vector absolute value.
+ @param[in] pSrc points to the input vector
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
*/
void arm_abs_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t in1, in2, in3, in4; /* temporary variables */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = |A| */
- /* Calculate absolute and then store the results in the destination buffer. */
- /* read sample from source */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- in3 = *(pSrc + 2);
- /* find absolute value */
- in1 = fabsf(in1);
+ /* Calculate absolute and store result in destination buffer. */
+ *pDst++ = fabsf(*pSrc++);
- /* read sample from source */
- in4 = *(pSrc + 3);
+ *pDst++ = fabsf(*pSrc++);
- /* find absolute value */
- in2 = fabsf(in2);
+ *pDst++ = fabsf(*pSrc++);
- /* read sample from source */
- *pDst = in1;
+ *pDst++ = fabsf(*pSrc++);
- /* find absolute value */
- in3 = fabsf(in3);
-
- /* find absolute value */
- in4 = fabsf(in4);
-
- /* store result to destination */
- *(pDst + 1) = in2;
-
- /* store result to destination */
- *(pDst + 2) = in3;
-
- /* store result to destination */
- *(pDst + 3) = in4;
-
-
- /* Update source pointer to process next sampels */
- pSrc += 4U;
-
- /* Update destination pointer to process next sampels */
- pDst += 4U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = |A| */
- /* Calculate absolute and then store the results in the destination buffer. */
+
+ /* Calculate absolute and store result in destination buffer. */
*pDst++ = fabsf(*pSrc++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of BasicAbs group
+ @} end of BasicAbs group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c
index ec47fff..1228a74 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c
@@ -3,13 +3,13 @@
* Title: arm_abs_q15.c
* Description: Q15 vector absolute value
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,139 +29,104 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup BasicAbs
- * @{
+ @addtogroup BasicAbs
+ @{
*/
/**
- * @brief Q15 vector absolute value.
- * @param[in] *pSrc points to the input buffer
- * @param[out] *pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
+ @brief Q15 vector absolute value.
+ @param[in] pSrc points to the input vector
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
*/
void arm_abs_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ q15_t in; /* Temporary input variable */
-#if defined (ARM_MATH_DSP)
- __SIMD32_TYPE *simd;
+#if defined (ARM_MATH_LOOPUNROLL)
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q15_t in1; /* Input value1 */
- q15_t in2; /* Input value2 */
-
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- simd = __SIMD32_CONST(pDst);
while (blkCnt > 0U)
{
/* C = |A| */
- /* Read two inputs */
- in1 = *pSrc++;
- in2 = *pSrc++;
-
- /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */
-#ifndef ARM_MATH_BIG_ENDIAN
- *simd++ =
- __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
- ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
-
+ /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
#else
+ *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
-
- *simd++ =
- __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
- ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- in1 = *pSrc++;
- in2 = *pSrc++;
-
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *simd++ =
- __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
- ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
-
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
#else
+ *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
+ *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
- *simd++ =
- __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
- ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
+ *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- pDst = (q15_t *)simd;
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = |A| */
- /* Read the input */
- in1 = *pSrc++;
-
- /* Calculate absolute value of input and then store the result in the destination buffer. */
- *pDst++ = (in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
- q15_t in; /* Temporary input variable */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C = |A| */
- /* Read the input */
+
+ /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */
in = *pSrc++;
-
- /* Calculate absolute value of input and then store the result in the destination buffer. */
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
*pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of BasicAbs group
+ @} end of BasicAbs group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c
index 2733f51..8319464 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c
@@ -3,13 +3,13 @@
* Title: arm_abs_q31.c
* Description: Q31 vector absolute value
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,90 +29,104 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup BasicAbs
- * @{
+ @addtogroup BasicAbs
+ @{
*/
-
/**
- * @brief Q31 vector absolute value.
- * @param[in] *pSrc points to the input buffer
- * @param[out] *pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
+ @brief Q31 vector absolute value.
+ @param[in] pSrc points to the input vector
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
*/
void arm_abs_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
- q31_t in; /* Input value */
+ uint32_t blkCnt; /* Loop counter */
+ q31_t in; /* Temporary variable */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t in1, in2, in3, in4;
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = |A| */
- /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
- in1 = *pSrc++;
- in2 = *pSrc++;
- in3 = *pSrc++;
- in4 = *pSrc++;
- *pDst++ = (in1 > 0) ? in1 : (q31_t)__QSUB(0, in1);
- *pDst++ = (in2 > 0) ? in2 : (q31_t)__QSUB(0, in2);
- *pDst++ = (in3 > 0) ? in3 : (q31_t)__QSUB(0, in3);
- *pDst++ = (in4 > 0) ? in4 : (q31_t)__QSUB(0, in4);
+ /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+ *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
- /* Decrement the loop counter */
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+ *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+ *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+ *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = |A| */
- /* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
- in = *pSrc++;
- *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
- /* Decrement the loop counter */
+ /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+ *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of BasicAbs group
+ @} end of BasicAbs group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c
index d0acbfc..9d54619 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c
@@ -3,13 +3,13 @@
* Title: arm_abs_q7.c
* Description: Q7 vector absolute value
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,117 +29,106 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup BasicAbs
- * @{
+ @addtogroup BasicAbs
+ @{
*/
/**
- * @brief Q7 vector absolute value.
- * @param[in] *pSrc points to the input buffer
- * @param[out] *pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * \par Conditions for optimum performance
- * Input and output buffers should be aligned by 32-bit
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
+ @brief Q7 vector absolute value.
+ @param[in] pSrc points to the input vector
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Conditions for optimum performance
+ Input and output buffers should be aligned by 32-bit
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
*/
void arm_abs_q7(
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize)
+ const q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
- q7_t in; /* Input value1 */
+ uint32_t blkCnt; /* Loop counter */
+ q7_t in; /* Temporary input variable */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t in1, in2, in3, in4; /* temporary input variables */
- q31_t out1, out2, out3, out4; /* temporary output variables */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = |A| */
- /* Read inputs */
- in1 = (q31_t) * pSrc;
- in2 = (q31_t) * (pSrc + 1);
- in3 = (q31_t) * (pSrc + 2);
- /* find absolute value */
- out1 = (in1 > 0) ? in1 : (q31_t)__QSUB8(0, in1);
+ /* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
+#else
+ *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
- /* read input */
- in4 = (q31_t) * (pSrc + 3);
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
+#else
+ *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
- /* find absolute value */
- out2 = (in2 > 0) ? in2 : (q31_t)__QSUB8(0, in2);
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
+#else
+ *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
- /* store result to destination */
- *pDst = (q7_t) out1;
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
+#else
+ *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
- /* find absolute value */
- out3 = (in3 > 0) ? in3 : (q31_t)__QSUB8(0, in3);
-
- /* find absolute value */
- out4 = (in4 > 0) ? in4 : (q31_t)__QSUB8(0, in4);
-
- /* store result to destination */
- *(pDst + 1) = (q7_t) out2;
-
- /* store result to destination */
- *(pDst + 2) = (q7_t) out3;
-
- /* store result to destination */
- *(pDst + 3) = (q7_t) out4;
-
- /* update pointers to process next samples */
- pSrc += 4U;
- pDst += 4U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
+
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #define ARM_MATH_CM0_FAMILY */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = |A| */
- /* Read the input */
+
+ /* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */
in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (in > 0) ? in : (q7_t) __QSUB(0, in);
+#else
+ *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
- /* Store the Absolute result in the destination buffer */
- *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? 0x7f : -in);
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of BasicAbs group
+ @} end of BasicAbs group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c
index 78feb64..c314ba8 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c
@@ -3,13 +3,13 @@
* Title: arm_add_f32.c
* Description: Floating-point vector addition
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,110 +29,85 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @defgroup BasicAdd Vector Addition
- *
- * Element-by-element addition of two vectors.
- *
- * <pre>
- * pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize.
- * </pre>
- *
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ @defgroup BasicAdd Vector Addition
+
+ Element-by-element addition of two vectors.
+
+ <pre>
+ pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize.
+ </pre>
+
+ There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
- * @addtogroup BasicAdd
- * @{
+ @addtogroup BasicAdd
+ @{
*/
/**
- * @brief Floating-point vector addition.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
+ @brief Floating-point vector addition.
+ @param[in] pSrcA points to first input vector
+ @param[in] pSrcB points to second input vector
+ @param[out] pDst points to output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
*/
void arm_add_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize)
+ const float32_t * pSrcA,
+ const float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t inA1, inA2, inA3, inA4; /* temporary input variabels */
- float32_t inB1, inB2, inB3, inB4; /* temporary input variables */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A + B */
- /* Add and then store the results in the destination buffer. */
- /* read four inputs from sourceA and four inputs from sourceB */
- inA1 = *pSrcA;
- inB1 = *pSrcB;
- inA2 = *(pSrcA + 1);
- inB2 = *(pSrcB + 1);
- inA3 = *(pSrcA + 2);
- inB3 = *(pSrcB + 2);
- inA4 = *(pSrcA + 3);
- inB4 = *(pSrcB + 3);
+ /* Add and store result in destination buffer. */
+ *pDst++ = (*pSrcA++) + (*pSrcB++);
+ *pDst++ = (*pSrcA++) + (*pSrcB++);
+ *pDst++ = (*pSrcA++) + (*pSrcB++);
+ *pDst++ = (*pSrcA++) + (*pSrcB++);
- /* C = A + B */
- /* add and store result to destination */
- *pDst = inA1 + inB1;
- *(pDst + 1) = inA2 + inB2;
- *(pDst + 2) = inA3 + inB3;
- *(pDst + 3) = inA4 + inB4;
-
- /* update pointers to process next samples */
- pSrcA += 4U;
- pSrcB += 4U;
- pDst += 4U;
-
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = A + B */
- /* Add and then store the results in the destination buffer. */
+
+ /* Add and store result in destination buffer. */
*pDst++ = (*pSrcA++) + (*pSrcB++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of BasicAdd group
+ @} end of BasicAdd group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c
index 80a523f..7b07562 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c
@@ -3,13 +3,13 @@
* Title: arm_add_q15.c
* Description: Q15 vector addition
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,100 +29,98 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup BasicAdd
- * @{
+ @addtogroup BasicAdd
+ @{
*/
/**
- * @brief Q15 vector addition.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+ @brief Q15 vector addition.
+ @param[in] pSrcA points to the first input vector
+ @param[in] pSrcB points to the second input vector
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
*/
void arm_add_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrcA,
+ const q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
#if defined (ARM_MATH_DSP)
+ q31_t inA1, inA2;
+ q31_t inB1, inB2;
+#endif
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inA1, inA2, inB1, inB2;
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A + B */
- /* Add and then store the results in the destination buffer. */
- inA1 = *__SIMD32(pSrcA)++;
- inA2 = *__SIMD32(pSrcA)++;
- inB1 = *__SIMD32(pSrcB)++;
- inB2 = *__SIMD32(pSrcB)++;
- *__SIMD32(pDst)++ = __QADD16(inA1, inB1);
- *__SIMD32(pDst)++ = __QADD16(inA2, inB2);
+#if defined (ARM_MATH_DSP)
+ /* read 2 times 2 samples at a time from sourceA */
+ inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
+ inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
+ /* read 2 times 2 samples at a time from sourceB */
+ inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
+ inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
- /* Decrement the loop counter */
+ /* Add and store 2 times 2 samples at a time */
+ write_q15x2_ia (&pDst, __QADD16(inA1, inB1));
+ write_q15x2_ia (&pDst, __QADD16(inA2, inB2));
+#else
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = A + B */
- /* Add and then store the results in the destination buffer. */
- *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
-
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C = A + B */
- /* Add and then store the results in the destination buffer. */
- *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16);
- /* Decrement the loop counter */
+ /* Add and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
+#else
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
}
/**
- * @} end of BasicAdd group
+ @} end of BasicAdd group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c
index c008bcc..e3426cb 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c
@@ -3,13 +3,13 @@
* Title: arm_add_q31.c
* Description: Q31 vector addition
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,108 +29,80 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup BasicAdd
- * @{
+ @addtogroup BasicAdd
+ @{
*/
-
/**
- * @brief Q31 vector addition.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
+ @brief Q31 vector addition.
+ @param[in] pSrcA points to the first input vector
+ @param[in] pSrcB points to the second input vector
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
*/
void arm_add_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrcA,
+ const q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inA1, inA2, inA3, inA4;
- q31_t inB1, inB2, inB3, inB4;
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A + B */
- /* Add and then store the results in the destination buffer. */
- inA1 = *pSrcA++;
- inA2 = *pSrcA++;
- inB1 = *pSrcB++;
- inB2 = *pSrcB++;
- inA3 = *pSrcA++;
- inA4 = *pSrcA++;
- inB3 = *pSrcB++;
- inB4 = *pSrcB++;
-
- *pDst++ = __QADD(inA1, inB1);
- *pDst++ = __QADD(inA2, inB2);
- *pDst++ = __QADD(inA3, inB3);
- *pDst++ = __QADD(inA4, inB4);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* C = A + B */
- /* Add and then store the results in the destination buffer. */
+ /* Add and store result in destination buffer. */
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
- /* Decrement the loop counter */
+ *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+ *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+ *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+ /* Decrement loop counter */
blkCnt--;
}
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
#else
- /* Run the below code for Cortex-M0 */
-
-
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C = A + B */
- /* Add and then store the results in the destination buffer. */
- *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++);
- /* Decrement the loop counter */
+ /* Add and store result in destination buffer. */
+ *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of BasicAdd group
+ @} end of BasicAdd group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c
index ab4e785..7792d86 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c
@@ -3,13 +3,13 @@
* Title: arm_add_q7.c
* Description: Q7 vector addition
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,94 +29,81 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup BasicAdd
- * @{
+ @addtogroup BasicAdd
+ @{
*/
/**
- * @brief Q7 vector addition.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
+ @brief Q7 vector addition.
+ @param[in] pSrcA points to the first input vector
+ @param[in] pSrcB points to the second input vector
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
*/
void arm_add_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize)
+ const q7_t * pSrcA,
+ const q7_t * pSrcB,
+ q7_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A + B */
- /* Add and then store the results in the destination buffer. */
- *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
- /* Decrement the loop counter */
+#if defined (ARM_MATH_DSP)
+ /* Add and store result in destination buffer (4 samples at a time). */
+ write_q7x4_ia (&pDst, __QADD8 (read_q7x4_ia ((q7_t **) &pSrcA), read_q7x4_ia ((q7_t **) &pSrcB)));
+#else
+ *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+ *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+ *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+ *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = A + B */
- /* Add and then store the results in the destination buffer. */
- *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
-
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C = A + B */
- /* Add and then store the results in the destination buffer. */
- *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8);
- /* Decrement the loop counter */
+ /* Add and store result in destination buffer. */
+ *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ + *pSrcB++, 8);
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
}
/**
- * @} end of BasicAdd group
+ @} end of BasicAdd group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c
index 0cd0afc..d203291 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c
@@ -3,13 +3,13 @@
* Title: arm_dot_prod_f32.c
* Description: Floating-point dot product
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,95 +29,92 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @defgroup dot_prod Vector Dot Product
- *
- * Computes the dot product of two vectors.
- * The vectors are multiplied element-by-element and then summed.
- *
- * <pre>
- * sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
- * </pre>
- *
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ @defgroup BasicDotProd Vector Dot Product
+
+ Computes the dot product of two vectors.
+ The vectors are multiplied element-by-element and then summed.
+
+ <pre>
+ sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
+ </pre>
+
+ There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
- * @addtogroup dot_prod
- * @{
+ @addtogroup BasicDotProd
+ @{
*/
/**
- * @brief Dot product of floating-point vectors.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] *result output result returned here
- * @return none.
+ @brief Dot product of floating-point vectors.
+ @param[in] pSrcA points to the first input vector.
+ @param[in] pSrcB points to the second input vector.
+ @param[in] blockSize number of samples in each vector.
+ @param[out] result output result returned here.
+ @return none
*/
-
void arm_dot_prod_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- uint32_t blockSize,
- float32_t * result)
+ const float32_t * pSrcA,
+ const float32_t * pSrcB,
+ uint32_t blockSize,
+ float32_t * result)
{
- float32_t sum = 0.0f; /* Temporary result storage */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ float32_t sum = 0.0f; /* Temporary return variable */
+#if defined (ARM_MATH_LOOPUNROLL)
-#if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Calculate dot product and then store the result in a temporary buffer */
- sum += (*pSrcA++) * (*pSrcB++);
- sum += (*pSrcA++) * (*pSrcB++);
- sum += (*pSrcA++) * (*pSrcB++);
+
+ /* Calculate dot product and store result in a temporary buffer. */
sum += (*pSrcA++) * (*pSrcB++);
- /* Decrement the loop counter */
+ sum += (*pSrcA++) * (*pSrcB++);
+
+ sum += (*pSrcA++) * (*pSrcB++);
+
+ sum += (*pSrcA++) * (*pSrcB++);
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Calculate dot product and then store the result in a temporary buffer. */
+
+ /* Calculate dot product and store result in a temporary buffer. */
sum += (*pSrcA++) * (*pSrcB++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* Store the result back in the destination buffer */
+
+ /* Store result in destination buffer */
*result = sum;
}
/**
- * @} end of dot_prod group
+ @} end of BasicDotProd group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c
index dec4ec5..5280e42 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c
@@ -3,13 +3,13 @@
* Title: arm_dot_prod_q15.c
* Description: Q15 dot product
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,100 +29,92 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup dot_prod
- * @{
+ @addtogroup BasicDotProd
+ @{
*/
/**
- * @brief Dot product of Q15 vectors.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] *result output result returned here
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
- * results are added to a 64-bit accumulator in 34.30 format.
- * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
- * there is no risk of overflow.
- * The return result is in 34.30 format.
+ @brief Dot product of Q15 vectors.
+ @param[in] pSrcA points to the first input vector
+ @param[in] pSrcB points to the second input vector
+ @param[in] blockSize number of samples in each vector
+ @param[out] result output result returned here
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
+ results are added to a 64-bit accumulator in 34.30 format.
+ Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
+ there is no risk of overflow.
+ The return result is in 34.30 format.
*/
void arm_dot_prod_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- uint32_t blockSize,
- q63_t * result)
+ const q15_t * pSrcA,
+ const q15_t * pSrcB,
+ uint32_t blockSize,
+ q63_t * result)
{
- q63_t sum = 0; /* Temporary result storage */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ q63_t sum = 0; /* Temporary return variable */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Calculate dot product and then store the result in a temporary buffer. */
- sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
- sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
- /* Decrement the loop counter */
+#if defined (ARM_MATH_DSP)
+ /* Calculate dot product and store result in a temporary buffer. */
+ sum = __SMLALD(read_q15x2_ia ((q15_t **) &pSrcA), read_q15x2_ia ((q15_t **) &pSrcB), sum);
+ sum = __SMLALD(read_q15x2_ia ((q15_t **) &pSrcA), read_q15x2_ia ((q15_t **) &pSrcB), sum);
+#else
+ sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+ sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+ sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+ sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Calculate dot product and then store the results in a temporary buffer. */
- sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Calculate dot product and then store the results in a temporary buffer. */
- sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
- /* Decrement the loop counter */
+ /* Calculate dot product and store result in a temporary buffer. */
+//#if defined (ARM_MATH_DSP)
+// sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
+//#else
+ sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+//#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
- /* Store the result in the destination buffer in 34.30 format */
+ /* Store result in destination buffer in 34.30 format */
*result = sum;
-
}
/**
- * @} end of dot_prod group
+ @} end of BasicDotProd group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c
index 67ae887..bcf6e14 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c
@@ -3,13 +3,13 @@
* Title: arm_dot_prod_q31.c
* Description: Q31 dot product
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,103 +29,87 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup dot_prod
- * @{
+ @addtogroup BasicDotProd
+ @{
*/
/**
- * @brief Dot product of Q31 vectors.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] *result output result returned here
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
- * are truncated to 2.48 format by discarding the lower 14 bits.
- * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
- * There are 15 guard bits in the accumulator and there is no risk of overflow as long as
- * the length of the vectors is less than 2^16 elements.
- * The return result is in 16.48 format.
+ @brief Dot product of Q31 vectors.
+ @param[in] pSrcA points to the first input vector.
+ @param[in] pSrcB points to the second input vector.
+ @param[in] blockSize number of samples in each vector.
+ @param[out] result output result returned here.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
+ are truncated to 2.48 format by discarding the lower 14 bits.
+ The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
+ There are 15 guard bits in the accumulator and there is no risk of overflow as long as
+ the length of the vectors is less than 2^16 elements.
+ The return result is in 16.48 format.
*/
void arm_dot_prod_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- uint32_t blockSize,
- q63_t * result)
+ const q31_t * pSrcA,
+ const q31_t * pSrcB,
+ uint32_t blockSize,
+ q63_t * result)
{
- q63_t sum = 0; /* Temporary result storage */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ q63_t sum = 0; /* Temporary return variable */
+#if defined (ARM_MATH_LOOPUNROLL)
-#if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inA1, inA2, inA3, inA4;
- q31_t inB1, inB2, inB3, inB4;
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Calculate dot product and then store the result in a temporary buffer. */
- inA1 = *pSrcA++;
- inA2 = *pSrcA++;
- inA3 = *pSrcA++;
- inA4 = *pSrcA++;
- inB1 = *pSrcB++;
- inB2 = *pSrcB++;
- inB3 = *pSrcB++;
- inB4 = *pSrcB++;
- sum += ((q63_t) inA1 * inB1) >> 14U;
- sum += ((q63_t) inA2 * inB2) >> 14U;
- sum += ((q63_t) inA3 * inB3) >> 14U;
- sum += ((q63_t) inA4 * inB4) >> 14U;
+ /* Calculate dot product and store result in a temporary buffer. */
+ sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
- /* Decrement the loop counter */
+ sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+ sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+ sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Calculate dot product and then store the result in a temporary buffer. */
- sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14U;
- /* Decrement the loop counter */
+ /* Calculate dot product and store result in a temporary buffer. */
+ sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* Store the result in the destination buffer in 16.48 format */
+ /* Store result in destination buffer in 16.48 format */
*result = sum;
}
/**
- * @} end of dot_prod group
+ @} end of BasicDotProd group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c
index 487efe3..7a44224 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c
@@ -3,13 +3,13 @@
* Title: arm_dot_prod_q7.c
* Description: Q7 dot product
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,61 +29,58 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup dot_prod
- * @{
+ @addtogroup BasicDotProd
+ @{
*/
/**
- * @brief Dot product of Q7 vectors.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] *result output result returned here
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
- * results are added to an accumulator in 18.14 format.
- * Nonsaturating additions are used and there is no danger of wrap around as long as
- * the vectors are less than 2^18 elements long.
- * The return result is in 18.14 format.
+ @brief Dot product of Q7 vectors.
+ @param[in] pSrcA points to the first input vector
+ @param[in] pSrcB points to the second input vector
+ @param[in] blockSize number of samples in each vector
+ @param[out] result output result returned here
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
+ results are added to an accumulator in 18.14 format.
+ Nonsaturating additions are used and there is no danger of wrap around as long as
+ the vectors are less than 2^18 elements long.
+ The return result is in 18.14 format.
*/
void arm_dot_prod_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- uint32_t blockSize,
- q31_t * result)
+ const q7_t * pSrcA,
+ const q7_t * pSrcB,
+ uint32_t blockSize,
+ q31_t * result)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ q31_t sum = 0; /* Temporary return variable */
- q31_t sum = 0; /* Temporary variables to store output */
+#if defined (ARM_MATH_LOOPUNROLL)
#if defined (ARM_MATH_DSP)
+ q31_t input1, input2; /* Temporary variables */
+ q31_t inA1, inA2, inB1, inB2; /* Temporary variables */
+#endif
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q31_t input1, input2; /* Temporary variables to store input */
- q31_t inA1, inA2, inB1, inB2; /* Temporary variables to store input */
-
-
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
+ /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+#if defined (ARM_MATH_DSP)
/* read 4 samples at a time from sourceA */
- input1 = *__SIMD32(pSrcA)++;
+ input1 = read_q7x4_ia ((q7_t **) &pSrcA);
/* read 4 samples at a time from sourceB */
- input2 = *__SIMD32(pSrcB)++;
+ input2 = read_q7x4_ia ((q7_t **) &pSrcB);
/* extract two q7_t samples to q15_t samples */
inA1 = __SXTB16(__ROR(input1, 8));
@@ -97,51 +94,46 @@
/* multiply and accumulate two samples at a time */
sum = __SMLAD(inA1, inB1, sum);
sum = __SMLAD(inA2, inB2, sum);
+#else
+ sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+ sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+ sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+ sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+#endif
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Dot product and then store the results in a temporary buffer. */
- sum = __SMLAD(*pSrcA++, *pSrcB++, sum);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
-
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Dot product and then store the results in a temporary buffer. */
- sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++);
- /* Decrement the loop counter */
+ /* Calculate dot product and store result in a temporary buffer. */
+//#if defined (ARM_MATH_DSP)
+// sum = __SMLAD(*pSrcA++, *pSrcB++, sum);
+//#else
+ sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+//#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
- /* Store the result in the destination buffer in 18.14 format */
+ /* Store result in destination buffer in 18.14 format */
*result = sum;
}
/**
- * @} end of dot_prod group
+ @} end of BasicDotProd group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c
index e4a9ef2..6d1d658 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c
@@ -3,13 +3,13 @@
* Title: arm_mult_f32.c
* Description: Floating-point vector multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,134 +29,88 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @defgroup BasicMult Vector Multiplication
- *
- * Element-by-element multiplication of two vectors.
- *
- * <pre>
- * pDst[n] = pSrcA[n] * pSrcB[n], 0 <= n < blockSize.
- * </pre>
- *
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ @defgroup BasicMult Vector Multiplication
+
+ Element-by-element multiplication of two vectors.
+
+ <pre>
+ pDst[n] = pSrcA[n] * pSrcB[n], 0 <= n < blockSize.
+ </pre>
+
+ There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
- * @addtogroup BasicMult
- * @{
+ @addtogroup BasicMult
+ @{
*/
/**
- * @brief Floating-point vector multiplication.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
+ @brief Floating-point vector multiplication.
+ @param[in] pSrcA points to the first input vector.
+ @param[in] pSrcB points to the second input vector.
+ @param[out] pDst points to the output vector.
+ @param[in] blockSize number of samples in each vector.
+ @return none
*/
void arm_mult_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize)
+ const float32_t * pSrcA,
+ const float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counters */
-#if defined (ARM_MATH_DSP)
+ uint32_t blkCnt; /* Loop counter */
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t inA1, inA2, inA3, inA4; /* temporary input variables */
- float32_t inB1, inB2, inB3, inB4; /* temporary input variables */
- float32_t out1, out2, out3, out4; /* temporary output variables */
+#if defined (ARM_MATH_LOOPUNROLL)
- /* loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A * B */
- /* Multiply the inputs and store the results in output buffer */
- /* read sample from sourceA */
- inA1 = *pSrcA;
- /* read sample from sourceB */
- inB1 = *pSrcB;
- /* read sample from sourceA */
- inA2 = *(pSrcA + 1);
- /* read sample from sourceB */
- inB2 = *(pSrcB + 1);
- /* out = sourceA * sourceB */
- out1 = inA1 * inB1;
+ /* Multiply inputs and store result in destination buffer. */
+ *pDst++ = (*pSrcA++) * (*pSrcB++);
- /* read sample from sourceA */
- inA3 = *(pSrcA + 2);
- /* read sample from sourceB */
- inB3 = *(pSrcB + 2);
+ *pDst++ = (*pSrcA++) * (*pSrcB++);
- /* out = sourceA * sourceB */
- out2 = inA2 * inB2;
+ *pDst++ = (*pSrcA++) * (*pSrcB++);
- /* read sample from sourceA */
- inA4 = *(pSrcA + 3);
+ *pDst++ = (*pSrcA++) * (*pSrcB++);
- /* store result to destination buffer */
- *pDst = out1;
-
- /* read sample from sourceB */
- inB4 = *(pSrcB + 3);
-
- /* out = sourceA * sourceB */
- out3 = inA3 * inB3;
-
- /* store result to destination buffer */
- *(pDst + 1) = out2;
-
- /* out = sourceA * sourceB */
- out4 = inA4 * inB4;
- /* store result to destination buffer */
- *(pDst + 2) = out3;
- /* store result to destination buffer */
- *(pDst + 3) = out4;
-
-
- /* update pointers to process next samples */
- pSrcA += 4U;
- pSrcB += 4U;
- pDst += 4U;
-
- /* Decrement the blockSize loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = A * B */
- /* Multiply the inputs and store the results in output buffer */
+
+ /* Multiply input and store result in destination buffer. */
*pDst++ = (*pSrcA++) * (*pSrcB++);
- /* Decrement the blockSize loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of BasicMult group
+ @} end of BasicMult group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c
index 8e20963..5ee6646 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c
@@ -3,13 +3,13 @@
* Title: arm_mult_q15.c
* Description: Q15 vector multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,65 +29,65 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup BasicMult
- * @{
+ @addtogroup BasicMult
+ @{
*/
-
/**
- * @brief Q15 vector multiplication
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+ @brief Q15 vector multiplication
+ @param[in] pSrcA points to first input vector
+ @param[in] pSrcB points to second input vector
+ @param[out] pDst points to output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
*/
void arm_mult_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrcA,
+ const q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counters */
+ uint32_t blkCnt; /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
#if defined (ARM_MATH_DSP)
+ q31_t inA1, inA2, inB1, inB2; /* Temporary input variables */
+ q15_t out1, out2, out3, out4; /* Temporary output variables */
+ q31_t mul1, mul2, mul3, mul4; /* Temporary variables */
+#endif
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inA1, inA2, inB1, inB2; /* temporary input variables */
- q15_t out1, out2, out3, out4; /* temporary output variables */
- q31_t mul1, mul2, mul3, mul4; /* temporary variables */
-
- /* loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* read two samples at a time from sourceA */
- inA1 = *__SIMD32(pSrcA)++;
- /* read two samples at a time from sourceB */
- inB1 = *__SIMD32(pSrcB)++;
- /* read two samples at a time from sourceA */
- inA2 = *__SIMD32(pSrcA)++;
- /* read two samples at a time from sourceB */
- inB2 = *__SIMD32(pSrcB)++;
+ /* C = A * B */
+
+#if defined (ARM_MATH_DSP)
+ /* read 2 samples at a time from sourceA */
+ inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
+ /* read 2 samples at a time from sourceB */
+ inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
+ /* read 2 samples at a time from sourceA */
+ inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
+ /* read 2 samples at a time from sourceB */
+ inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
/* multiply mul = sourceA * sourceB */
mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
- mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1);
+ mul2 = (q31_t) ((q15_t) (inA1 ) * (q15_t) (inB1 ));
mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
- mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2);
+ mul4 = (q31_t) ((q15_t) (inA2 ) * (q15_t) (inB2 ));
/* saturate result to 16 bit */
out1 = (q15_t) __SSAT(mul1 >> 15, 16);
@@ -95,48 +95,49 @@
out3 = (q15_t) __SSAT(mul3 >> 15, 16);
out4 = (q15_t) __SSAT(mul4 >> 15, 16);
- /* store the result */
+ /* store result to destination */
#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
- *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
-
+ write_q15x2_ia (&pDst, __PKHBT(out2, out1, 16));
+ write_q15x2_ia (&pDst, __PKHBT(out4, out3, 16));
#else
-
- *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
- *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
-
+ write_q15x2_ia (&pDst, __PKHBT(out1, out2, 16));
+ write_q15x2_ia (&pDst, __PKHBT(out3, out4, 16));
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- /* Decrement the blockSize loop counter */
+#else
+ *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+ *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+ *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+ *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = A * B */
- /* Multiply the inputs and store the result in the destination buffer */
+
+ /* Multiply inputs and store result in destination buffer. */
*pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
- /* Decrement the blockSize loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of BasicMult group
+ @} end of BasicMult group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c
index c302b01..c9b6e29 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c
@@ -3,13 +3,13 @@
* Title: arm_mult_q31.c
* Description: Q31 vector multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,120 +29,91 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup BasicMult
- * @{
+ @addtogroup BasicMult
+ @{
*/
/**
- * @brief Q31 vector multiplication.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
+ @brief Q31 vector multiplication.
+ @param[in] pSrcA points to the first input vector.
+ @param[in] pSrcB points to the second input vector.
+ @param[out] pDst points to the output vector.
+ @param[in] blockSize number of samples in each vector.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
*/
void arm_mult_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrcA,
+ const q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counters */
+ uint32_t blkCnt; /* Loop counter */
+ q31_t out; /* Temporary output variable */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inA1, inA2, inA3, inA4; /* temporary input variables */
- q31_t inB1, inB2, inB3, inB4; /* temporary input variables */
- q31_t out1, out2, out3, out4; /* temporary output variables */
-
- /* loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A * B */
- /* Multiply the inputs and then store the results in the destination buffer. */
- inA1 = *pSrcA++;
- inA2 = *pSrcA++;
- inA3 = *pSrcA++;
- inA4 = *pSrcA++;
- inB1 = *pSrcB++;
- inB2 = *pSrcB++;
- inB3 = *pSrcB++;
- inB4 = *pSrcB++;
- out1 = ((q63_t) inA1 * inB1) >> 32;
- out2 = ((q63_t) inA2 * inB2) >> 32;
- out3 = ((q63_t) inA3 * inB3) >> 32;
- out4 = ((q63_t) inA4 * inB4) >> 32;
+ /* Multiply inputs and store result in destination buffer. */
+ out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+ out = __SSAT(out, 31);
+ *pDst++ = out << 1U;
- out1 = __SSAT(out1, 31);
- out2 = __SSAT(out2, 31);
- out3 = __SSAT(out3, 31);
- out4 = __SSAT(out4, 31);
+ out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+ out = __SSAT(out, 31);
+ *pDst++ = out << 1U;
- *pDst++ = out1 << 1U;
- *pDst++ = out2 << 1U;
- *pDst++ = out3 << 1U;
- *pDst++ = out4 << 1U;
+ out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+ out = __SSAT(out, 31);
+ *pDst++ = out << 1U;
- /* Decrement the blockSize loop counter */
+ out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+ out = __SSAT(out, 31);
+ *pDst++ = out << 1U;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = A * B */
- /* Multiply the inputs and then store the results in the destination buffer. */
- inA1 = *pSrcA++;
- inB1 = *pSrcB++;
- out1 = ((q63_t) inA1 * inB1) >> 32;
- out1 = __SSAT(out1, 31);
- *pDst++ = out1 << 1U;
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = A * B */
- /* Multiply the inputs and then store the results in the destination buffer. */
- *pDst++ =
- (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
- /* Decrement the blockSize loop counter */
+ /* Multiply inputs and store result in destination buffer. */
+ out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+ out = __SSAT(out, 31);
+ *pDst++ = out << 1U;
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
}
/**
- * @} end of BasicMult group
+ @} end of BasicMult group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c
index d8a2f8a..86b772b 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c
@@ -3,13 +3,13 @@
* Title: arm_mult_q7.c
* Description: Q7 vector multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,87 +29,91 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup BasicMult
- * @{
+ @addtogroup BasicMult
+ @{
*/
/**
- * @brief Q7 vector multiplication
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
+ @brief Q7 vector multiplication
+ @param[in] pSrcA points to the first input vector
+ @param[in] pSrcB points to the second input vector
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
*/
void arm_mult_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize)
+ const q7_t * pSrcA,
+ const q7_t * pSrcB,
+ q7_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counters */
+ uint32_t blkCnt; /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
#if defined (ARM_MATH_DSP)
+ q7_t out1, out2, out3, out4; /* Temporary output variables */
+#endif
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q7_t out1, out2, out3, out4; /* Temporary variables to store the product */
-
- /* loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A * B */
- /* Multiply the inputs and store the results in temporary variables */
+
+#if defined (ARM_MATH_DSP)
+ /* Multiply inputs and store results in temporary variables */
out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
- /* Store the results of 4 inputs in the destination buffer in single cycle by packing */
- *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
+ /* Pack and store result in destination buffer (in single write) */
+ write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
+#else
+ *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+ *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+ *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+ *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+#endif
- /* Decrement the blockSize loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = A * B */
- /* Multiply the inputs and store the result in the destination buffer */
+
+ /* Multiply input and store result in destination buffer. */
*pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
- /* Decrement the blockSize loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of BasicMult group
+ @} end of BasicMult group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c
index e39624c..9971b57 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c
@@ -3,13 +3,13 @@
* Title: arm_negate_f32.c
* Description: Negates floating-point vectors
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,106 +29,88 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @defgroup negate Vector Negate
- *
- * Negates the elements of a vector.
- *
- * <pre>
- * pDst[n] = -pSrc[n], 0 <= n < blockSize.
- * </pre>
- *
- * The functions support in-place computation allowing the source and
- * destination pointers to reference the same memory buffer.
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ @defgroup BasicNegate Vector Negate
+
+ Negates the elements of a vector.
+
+ <pre>
+ pDst[n] = -pSrc[n], 0 <= n < blockSize.
+ </pre>
+
+ The functions support in-place computation allowing the source and
+ destination pointers to reference the same memory buffer.
+ There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
- * @addtogroup negate
- * @{
+ @addtogroup BasicNegate
+ @{
*/
/**
- * @brief Negates the elements of a floating-point vector.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
+ @brief Negates the elements of a floating-point vector.
+ @param[in] pSrc points to input vector.
+ @param[out] pDst points to output vector.
+ @param[in] blockSize number of samples in each vector.
+ @return none
*/
void arm_negate_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
-#if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t in1, in2, in3, in4; /* temporary variables */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0U)
- {
- /* read inputs from source */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- in3 = *(pSrc + 2);
- in4 = *(pSrc + 3);
-
- /* negate the input */
- in1 = -in1;
- in2 = -in2;
- in3 = -in3;
- in4 = -in4;
-
- /* store the result to destination */
- *pDst = in1;
- *(pDst + 1) = in2;
- *(pDst + 2) = in3;
- *(pDst + 3) = in4;
-
- /* update pointers to process next samples */
- pSrc += 4U;
- pDst += 4U;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
while (blkCnt > 0U)
{
/* C = -A */
- /* Negate and then store the results in the destination buffer. */
+
+ /* Negate and store result in destination buffer. */
*pDst++ = -*pSrc++;
- /* Decrement the loop counter */
+ *pDst++ = -*pSrc++;
+
+ *pDst++ = -*pSrc++;
+
+ *pDst++ = -*pSrc++;
+
+ /* Decrement loop counter */
blkCnt--;
}
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = -A */
+
+ /* Negate and store result in destination buffer. */
+ *pDst++ = -*pSrc++;
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
}
/**
- * @} end of negate group
+ @} end of BasicNegate group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c
index 9624160..faa6da9 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c
@@ -3,13 +3,13 @@
* Title: arm_negate_q15.c
* Description: Negates Q15 vectors
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,103 +29,98 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup negate
- * @{
+ @addtogroup BasicNegate
+ @{
*/
/**
- * @brief Negates the elements of a Q15 vector.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * \par Conditions for optimum performance
- * Input and output buffers should be aligned by 32-bit
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
+ @brief Negates the elements of a Q15 vector.
+ @param[in] pSrc points to the input vector.
+ @param[out] pDst points to the output vector.
+ @param[in] blockSize number of samples in each vector.
+ @return none
+
+ @par Conditions for optimum performance
+ Input and output buffers should be aligned by 32-bit
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0x7FFF.
*/
void arm_negate_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
- q15_t in;
+ uint32_t blkCnt; /* Loop counter */
+ q15_t in; /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
#if defined (ARM_MATH_DSP)
+ q31_t in1; /* Temporary input variables */
+#endif
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q31_t in1, in2; /* Temporary variables */
-
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = -A */
- /* Read two inputs at a time */
- in1 = _SIMD32_OFFSET(pSrc);
- in2 = _SIMD32_OFFSET(pSrc + 2);
- /* negate two samples at a time */
- in1 = __QSUB16(0, in1);
+#if defined (ARM_MATH_DSP)
+ /* Negate and store result in destination buffer (2 samples at a time). */
+ in1 = read_q15x2_ia ((q15_t **) &pSrc);
+ write_q15x2_ia (&pDst, __QSUB16(0, in1));
- /* negate two samples at a time */
- in2 = __QSUB16(0, in2);
+ in1 = read_q15x2_ia ((q15_t **) &pSrc);
+ write_q15x2_ia (&pDst, __QSUB16(0, in1));
+#else
+ in = *pSrc++;
+ *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
- /* store the result to destination 2 samples at a time */
- _SIMD32_OFFSET(pDst) = in1;
- /* store the result to destination 2 samples at a time */
- _SIMD32_OFFSET(pDst + 2) = in2;
+ in = *pSrc++;
+ *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+ in = *pSrc++;
+ *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
- /* update pointers to process next samples */
- pSrc += 4U;
- pDst += 4U;
+ in = *pSrc++;
+ *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+#endif
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = -A */
- /* Negate and then store the result in the destination buffer. */
- in = *pSrc++;
- *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
- /* Decrement the loop counter */
+ /* Negate and store result in destination buffer. */
+ in = *pSrc++;
+ *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of negate group
+ @} end of BasicNegate group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c
index 4a5a58d..c68e02b 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c
@@ -3,13 +3,13 @@
* Title: arm_negate_q31.c
* Description: Negates Q31 vectors
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,89 +29,104 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup negate
- * @{
+ @addtogroup BasicNegate
+ @{
*/
/**
- * @brief Negates the elements of a Q31 vector.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
+ @brief Negates the elements of a Q31 vector.
+ @param[in] pSrc points to the input vector.
+ @param[out] pDst points to the output vector.
+ @param[in] blockSize number of samples in each vector.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive value 0x7FFFFFFF.
*/
void arm_negate_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q31_t in; /* Temporary variable */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ q31_t in; /* Temporary input variable */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t in1, in2, in3, in4;
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = -A */
- /* Negate and then store the results in the destination buffer. */
- in1 = *pSrc++;
- in2 = *pSrc++;
- in3 = *pSrc++;
- in4 = *pSrc++;
- *pDst++ = __QSUB(0, in1);
- *pDst++ = __QSUB(0, in2);
- *pDst++ = __QSUB(0, in3);
- *pDst++ = __QSUB(0, in4);
+ /* Negate and store result in destination buffer. */
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QSUB(0, in);
+#else
+ *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
- /* Decrement the loop counter */
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QSUB(0, in);
+#else
+ *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QSUB(0, in);
+#else
+ *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QSUB(0, in);
+#else
+ *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = -A */
- /* Negate and then store the result in the destination buffer. */
- in = *pSrc++;
- *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
- /* Decrement the loop counter */
+ /* Negate and store result in destination buffer. */
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QSUB(0, in);
+#else
+ *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of negate group
+ @} end of BasicNegate group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c
index d72c317..adcad49 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c
@@ -3,13 +3,13 @@
* Title: arm_negate_q7.c
* Description: Negates Q7 vectors
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,85 +29,98 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup negate
- * @{
+ @addtogroup BasicNegate
+ @{
*/
/**
- * @brief Negates the elements of a Q7 vector.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
+ @brief Negates the elements of a Q7 vector.
+ @param[in] pSrc points to the input vector.
+ @param[out] pDst points to the output vector.
+ @param[in] blockSize number of samples in each vector.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ The Q7 value -1 (0x80) is saturated to the maximum allowable positive value 0x7F.
*/
void arm_negate_q7(
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize)
+ const q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
- q7_t in;
+ uint32_t blkCnt; /* Loop counter */
+ q7_t in; /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
#if defined (ARM_MATH_DSP)
+ q31_t in1; /* Temporary input variable */
+#endif
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t input; /* Input values1-4 */
- q31_t zero = 0x00000000;
-
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = -A */
- /* Read four inputs */
- input = *__SIMD32(pSrc)++;
- /* Store the Negated results in the destination buffer in a single cycle by packing the results */
- *__SIMD32(pDst)++ = __QSUB8(zero, input);
+#if defined (ARM_MATH_DSP)
+ /* Negate and store result in destination buffer (4 samples at a time). */
+ in1 = read_q7x4_ia ((q7_t **) &pSrc);
+ write_q7x4_ia (&pDst, __QSUB8(0, in1));
+#else
+ in = *pSrc++;
+ *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
- /* Decrement the loop counter */
+ in = *pSrc++;
+ *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+
+ in = *pSrc++;
+ *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+
+ in = *pSrc++;
+ *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = -A */
- /* Negate and then store the results in the destination buffer. */ \
- in = *pSrc++;
- *pDst++ = (in == (q7_t) 0x80) ? 0x7f : -in;
- /* Decrement the loop counter */
+ /* Negate and store result in destination buffer. */
+ in = *pSrc++;
+
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (q7_t) __QSUB(0, in);
+#else
+ *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of negate group
+ @} end of BasicNegate group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c
index ebc20a4..34c33f7 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c
@@ -3,13 +3,13 @@
* Title: arm_offset_f32.c
* Description: Floating-point vector offset
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,126 +29,90 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @defgroup offset Vector Offset
- *
- * Adds a constant offset to each element of a vector.
- *
- * <pre>
- * pDst[n] = pSrc[n] + offset, 0 <= n < blockSize.
- * </pre>
- *
- * The functions support in-place computation allowing the source and
- * destination pointers to reference the same memory buffer.
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ @defgroup BasicOffset Vector Offset
+
+ Adds a constant offset to each element of a vector.
+
+ <pre>
+ pDst[n] = pSrc[n] + offset, 0 <= n < blockSize.
+ </pre>
+
+ The functions support in-place computation allowing the source and
+ destination pointers to reference the same memory buffer.
+ There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
- * @addtogroup offset
- * @{
+ @addtogroup BasicOffset
+ @{
*/
/**
- * @brief Adds a constant offset to a floating-point vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
+ @brief Adds a constant offset to a floating-point vector.
+ @param[in] pSrc points to the input vector
+ @param[in] offset is the offset to be added
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
*/
-
void arm_offset_f32(
- float32_t * pSrc,
- float32_t offset,
- float32_t * pDst,
- uint32_t blockSize)
+ const float32_t * pSrc,
+ float32_t offset,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t in1, in2, in3, in4;
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A + offset */
- /* Add offset and then store the results in the destination buffer. */
- /* read samples from source */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- /* add offset to input */
- in1 = in1 + offset;
+ /* Add offset and store result in destination buffer. */
+ *pDst++ = (*pSrc++) + offset;
- /* read samples from source */
- in3 = *(pSrc + 2);
+ *pDst++ = (*pSrc++) + offset;
- /* add offset to input */
- in2 = in2 + offset;
+ *pDst++ = (*pSrc++) + offset;
- /* read samples from source */
- in4 = *(pSrc + 3);
+ *pDst++ = (*pSrc++) + offset;
- /* add offset to input */
- in3 = in3 + offset;
-
- /* store result to destination */
- *pDst = in1;
-
- /* add offset to input */
- in4 = in4 + offset;
-
- /* store result to destination */
- *(pDst + 1) = in2;
-
- /* store result to destination */
- *(pDst + 2) = in3;
-
- /* store result to destination */
- *(pDst + 3) = in4;
-
- /* update pointers to process next samples */
- pSrc += 4U;
- pDst += 4U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = A + offset */
- /* Add offset and then store the result in the destination buffer. */
+
+ /* Add offset and store result in destination buffer. */
*pDst++ = (*pSrc++) + offset;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of offset group
+ @} end of BasicOffset group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c
index dab0b10..9629699 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c
@@ -3,13 +3,13 @@
* Title: arm_offset_q15.c
* Description: Q15 vector offset
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,96 +29,93 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup offset
- * @{
+ @addtogroup BasicOffset
+ @{
*/
/**
- * @brief Adds a constant offset to a Q15 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ @brief Adds a constant offset to a Q15 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] offset is the offset to be added
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
*/
void arm_offset_q15(
- q15_t * pSrc,
- q15_t offset,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t offset,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
#if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t offset_packed; /* Offset packed to 32 bit */
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2U;
-
/* Offset is packed to 32 bit in order to use SIMD32 for addition */
offset_packed = __PKHBT(offset, offset, 16);
+#endif
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
+
while (blkCnt > 0U)
{
/* C = A + offset */
- /* Add offset and then store the results in the destination buffer, 2 samples at a time. */
- *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
- *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
- /* Decrement the loop counter */
+#if defined (ARM_MATH_DSP)
+ /* Add offset and store result in destination buffer (2 samples at a time). */
+ write_q15x2_ia (&pDst, __QADD16(read_q15x2_ia ((q15_t **) &pSrc), offset_packed));
+ write_q15x2_ia (&pDst, __QADD16(read_q15x2_ia ((q15_t **) &pSrc), offset_packed));
+#else
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = A + offset */
- /* Add offset and then store the results in the destination buffer. */
- *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C = A + offset */
- /* Add offset and then store the results in the destination buffer. */
- *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
- /* Decrement the loop counter */
+ /* Add offset and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
+#else
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of offset group
+ @} end of BasicOffset group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c
index 655426e..f14fc1f 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c
@@ -3,13 +3,13 @@
* Title: arm_offset_q31.c
* Description: Q31 vector offset
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,100 +29,100 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup offset
- * @{
+ @addtogroup BasicOffset
+ @{
*/
/**
- * @brief Adds a constant offset to a Q31 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ @brief Adds a constant offset to a Q31 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] offset is the offset to be added
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
*/
void arm_offset_q31(
- q31_t * pSrc,
- q31_t offset,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ q31_t offset,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t in1, in2, in3, in4;
-
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A + offset */
- /* Add offset and then store the results in the destination buffer. */
- in1 = *pSrc++;
- in2 = *pSrc++;
- in3 = *pSrc++;
- in4 = *pSrc++;
- *pDst++ = __QADD(in1, offset);
- *pDst++ = __QADD(in2, offset);
- *pDst++ = __QADD(in3, offset);
- *pDst++ = __QADD(in4, offset);
+ /* Add offset and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QADD(*pSrc++, offset);
+#else
+ *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
- /* Decrement the loop counter */
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QADD(*pSrc++, offset);
+#else
+ *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
+
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QADD(*pSrc++, offset);
+#else
+ *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
+
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QADD(*pSrc++, offset);
+#else
+ *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = A + offset */
- /* Add offset and then store the result in the destination buffer. */
- *pDst++ = __QADD(*pSrc++, offset);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C = A + offset */
- /* Add offset and then store the result in the destination buffer. */
- *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
- /* Decrement the loop counter */
+ /* Add offset and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QADD(*pSrc++, offset);
+#else
+ *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of offset group
+ @} end of BasicOffset group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c
index 5de6241..a4ed51d 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c
@@ -3,13 +3,13 @@
* Title: arm_offset_q7.c
* Description: Q7 vector offset
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,95 +29,88 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup offset
- * @{
+ @addtogroup BasicOffset
+ @{
*/
/**
- * @brief Adds a constant offset to a Q7 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
+ @brief Adds a constant offset to a Q7 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] offset is the offset to be added
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
*/
void arm_offset_q7(
- q7_t * pSrc,
- q7_t offset,
- q7_t * pDst,
- uint32_t blockSize)
+ const q7_t * pSrc,
+ q7_t offset,
+ q7_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
#if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t offset_packed; /* Offset packed to 32 bit */
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2U;
-
/* Offset is packed to 32 bit in order to use SIMD32 for addition */
offset_packed = __PACKq7(offset, offset, offset, offset);
+#endif
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
+
while (blkCnt > 0U)
{
/* C = A + offset */
- /* Add offset and then store the results in the destination bufferfor 4 samples at a time. */
- *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed);
- /* Decrement the loop counter */
+#if defined (ARM_MATH_DSP)
+ /* Add offset and store result in destination buffer (4 samples at a time). */
+ write_q7x4_ia (&pDst, __QADD8(read_q7x4_ia ((q7_t **) &pSrc), offset_packed));
+#else
+ *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
+ *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
+ *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
+ *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = A + offset */
- /* Add offset and then store the result in the destination buffer. */
- *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C = A + offset */
- /* Add offset and then store the result in the destination buffer. */
- *pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8);
- /* Decrement the loop counter */
+ /* Add offset and store result in destination buffer. */
+ *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8);
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of offset group
+ @} end of BasicOffset group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c
index c90c037..c9442e3 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c
@@ -3,13 +3,13 @@
* Title: arm_scale_f32.c
* Description: Multiplies a floating-point vector by a scalar
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,129 +29,103 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @defgroup scale Vector Scale
- *
- * Multiply a vector by a scalar value. For floating-point data, the algorithm used is:
- *
- * <pre>
- * pDst[n] = pSrc[n] * scale, 0 <= n < blockSize.
- * </pre>
- *
- * In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by
- * a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
- * The shift allows the gain of the scaling operation to exceed 1.0.
- * The algorithm used with fixed-point data is:
- *
- * <pre>
- * pDst[n] = (pSrc[n] * scaleFract) << shift, 0 <= n < blockSize.
- * </pre>
- *
- * The overall scale factor applied to the fixed-point data is
- * <pre>
- * scale = scaleFract * 2^shift.
- * </pre>
- *
- * The functions support in-place computation allowing the source and destination
- * pointers to reference the same memory buffer.
+ @defgroup BasicScale Vector Scale
+
+ Multiply a vector by a scalar value. For floating-point data, the algorithm used is:
+
+ <pre>
+ pDst[n] = pSrc[n] * scale, 0 <= n < blockSize.
+ </pre>
+
+ In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by
+ a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
+ The shift allows the gain of the scaling operation to exceed 1.0.
+ The algorithm used with fixed-point data is:
+
+ <pre>
+ pDst[n] = (pSrc[n] * scaleFract) << shift, 0 <= n < blockSize.
+ </pre>
+
+ The overall scale factor applied to the fixed-point data is
+ <pre>
+ scale = scaleFract * 2^shift.
+ </pre>
+
+ The functions support in-place computation allowing the source and destination
+ pointers to reference the same memory buffer.
*/
/**
- * @addtogroup scale
- * @{
+ @addtogroup BasicScale
+ @{
*/
/**
- * @brief Multiplies a floating-point vector by a scalar.
- * @param[in] *pSrc points to the input vector
- * @param[in] scale scale factor to be applied
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
+ @brief Multiplies a floating-point vector by a scalar.
+ @param[in] pSrc points to the input vector
+ @param[in] scale scale factor to be applied
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
*/
-
void arm_scale_f32(
- float32_t * pSrc,
- float32_t scale,
- float32_t * pDst,
- uint32_t blockSize)
+ const float32_t *pSrc,
+ float32_t scale,
+ float32_t *pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
-#if defined (ARM_MATH_DSP)
+ uint32_t blkCnt; /* Loop counter */
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t in1, in2, in3, in4; /* temporary variabels */
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A * scale */
- /* Scale the input and then store the results in the destination buffer. */
- /* read input samples from source */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- /* multiply with scaling factor */
- in1 = in1 * scale;
+ /* Scale input and store result in destination buffer. */
+ *pDst++ = (*pSrc++) * scale;
- /* read input sample from source */
- in3 = *(pSrc + 2);
+ *pDst++ = (*pSrc++) * scale;
- /* multiply with scaling factor */
- in2 = in2 * scale;
+ *pDst++ = (*pSrc++) * scale;
- /* read input sample from source */
- in4 = *(pSrc + 3);
+ *pDst++ = (*pSrc++) * scale;
- /* multiply with scaling factor */
- in3 = in3 * scale;
- in4 = in4 * scale;
- /* store the result to destination */
- *pDst = in1;
- *(pDst + 1) = in2;
- *(pDst + 2) = in3;
- *(pDst + 3) = in4;
-
- /* update pointers to process next samples */
- pSrc += 4U;
- pDst += 4U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = A * scale */
- /* Scale the input and then store the result in the destination buffer. */
+
+ /* Scale input and store result in destination buffer. */
*pDst++ = (*pSrc++) * scale;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of scale group
+ @} end of BasicScale group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c
index 9d5727d..7f32eed 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c
@@ -3,13 +3,13 @@
* Title: arm_scale_q15.c
* Description: Multiplies a Q15 vector by a scalar
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,66 +29,66 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup scale
- * @{
+ @addtogroup BasicScale
+ @{
*/
/**
- * @brief Multiplies a Q15 vector by a scalar.
- * @param[in] *pSrc points to the input vector
- * @param[in] scaleFract fractional portion of the scale value
- * @param[in] shift number of bits to shift the result by
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
- * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
- */
+ @brief Multiplies a Q15 vector by a scalar.
+ @param[in] pSrc points to the input vector
+ @param[in] scaleFract fractional portion of the scale value
+ @param[in] shift number of bits to shift the result by
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+ @par Scaling and Overflow Behavior
+ The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
+ These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
+ */
void arm_scale_q15(
- q15_t * pSrc,
- q15_t scaleFract,
- int8_t shift,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t *pSrc,
+ q15_t scaleFract,
+ int8_t shift,
+ q15_t *pDst,
+ uint32_t blockSize)
{
- int8_t kShift = 15 - shift; /* shift to apply after scaling */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ int8_t kShift = 15 - shift; /* Shift to apply after scaling */
+#if defined (ARM_MATH_LOOPUNROLL)
#if defined (ARM_MATH_DSP)
+ q31_t inA1, inA2;
+ q31_t out1, out2, out3, out4; /* Temporary output variables */
+ q15_t in1, in2, in3, in4; /* Temporary input variables */
+#endif
+#endif
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q15_t in1, in2, in3, in4;
- q31_t inA1, inA2; /* Temporary variables */
- q31_t out1, out2, out3, out4;
+#if defined (ARM_MATH_LOOPUNROLL)
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* Reading 2 inputs from memory */
- inA1 = *__SIMD32(pSrc)++;
- inA2 = *__SIMD32(pSrc)++;
-
/* C = A * scale */
- /* Scale the inputs and then store the 2 results in the destination buffer
+
+#if defined (ARM_MATH_DSP)
+ /* read 2 times 2 samples at a time from source */
+ inA1 = read_q15x2_ia ((q15_t **) &pSrc);
+ inA2 = read_q15x2_ia ((q15_t **) &pSrc);
+
+ /* Scale inputs and store result in temporary variables
* in single cycle by packing the outputs */
out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
- out2 = (q31_t) ((q15_t) inA1 * scaleFract);
+ out2 = (q31_t) ((q15_t) (inA1 ) * scaleFract);
out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
- out4 = (q31_t) ((q15_t) inA2 * scaleFract);
+ out4 = (q31_t) ((q15_t) (inA2 ) * scaleFract);
/* apply shifting */
out1 = out1 >> kShift;
@@ -102,49 +102,43 @@
in3 = (q15_t) (__SSAT(out3, 16));
in4 = (q15_t) (__SSAT(out4, 16));
- /* store the result to destination */
- *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16);
- *__SIMD32(pDst)++ = __PKHBT(in4, in3, 16);
+ /* store result to destination */
+ write_q15x2_ia (&pDst, __PKHBT(in2, in1, 16));
+ write_q15x2_ia (&pDst, __PKHBT(in4, in3, 16));
+#else
+ *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+ *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+ *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+ *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+#endif
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = A * scale */
- /* Scale the input and then store the result in the destination buffer. */
- *pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16));
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C = A * scale */
- /* Scale the input and then store the result in the destination buffer. */
- *pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16));
- /* Decrement the loop counter */
+ /* Scale input and store result in destination buffer. */
+ *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of scale group
+ @} end of BasicScale group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c
index e89524d..326c63b 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c
@@ -3,13 +3,13 @@
* Title: arm_scale_q31.c
* Description: Multiplies a Q31 vector by a scalar
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,199 +29,163 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup scale
- * @{
+ @addtogroup BasicScale
+ @{
*/
/**
- * @brief Multiplies a Q31 vector by a scalar.
- * @param[in] *pSrc points to the input vector
- * @param[in] scaleFract fractional portion of the scale value
- * @param[in] shift number of bits to shift the result by
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
- * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
+ @brief Multiplies a Q31 vector by a scalar.
+ @param[in] pSrc points to the input vector
+ @param[in] scaleFract fractional portion of the scale value
+ @param[in] shift number of bits to shift the result by
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
+ These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
*/
void arm_scale_q31(
- q31_t * pSrc,
- q31_t scaleFract,
- int8_t shift,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t *pSrc,
+ q31_t scaleFract,
+ int8_t shift,
+ q31_t *pDst,
+ uint32_t blockSize)
{
- int8_t kShift = shift + 1; /* Shift to apply after scaling */
- int8_t sign = (kShift & 0x80);
- uint32_t blkCnt; /* loop counter */
- q31_t in, out;
+ uint32_t blkCnt; /* Loop counter */
+ q31_t in, out; /* Temporary variables */
+ int8_t kShift = shift + 1; /* Shift to apply after scaling */
+ int8_t sign = (kShift & 0x80);
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q31_t in1, in2, in3, in4; /* temporary input variables */
- q31_t out1, out2, out3, out4; /* temporary output variabels */
-
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
if (sign == 0U)
{
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* read four inputs from source */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- in3 = *(pSrc + 2);
- in4 = *(pSrc + 3);
+ /* C = A * scale */
- /* multiply input with scaler value */
- in1 = ((q63_t) in1 * scaleFract) >> 32;
- in2 = ((q63_t) in2 * scaleFract) >> 32;
- in3 = ((q63_t) in3 * scaleFract) >> 32;
- in4 = ((q63_t) in4 * scaleFract) >> 32;
+ /* Scale input and store result in destination buffer. */
+ in = *pSrc++; /* read input from source */
+ in = ((q63_t) in * scaleFract) >> 32; /* multiply input with scaler value */
+ out = in << kShift; /* apply shifting */
+ if (in != (out >> kShift)) /* saturate the result */
+ out = 0x7FFFFFFF ^ (in >> 31);
+ *pDst++ = out; /* Store result destination */
- /* apply shifting */
- out1 = in1 << kShift;
- out2 = in2 << kShift;
+ in = *pSrc++;
+ in = ((q63_t) in * scaleFract) >> 32;
+ out = in << kShift;
+ if (in != (out >> kShift))
+ out = 0x7FFFFFFF ^ (in >> 31);
+ *pDst++ = out;
- /* saturate the results. */
- if (in1 != (out1 >> kShift))
- out1 = 0x7FFFFFFF ^ (in1 >> 31);
+ in = *pSrc++;
+ in = ((q63_t) in * scaleFract) >> 32;
+ out = in << kShift;
+ if (in != (out >> kShift))
+ out = 0x7FFFFFFF ^ (in >> 31);
+ *pDst++ = out;
- if (in2 != (out2 >> kShift))
- out2 = 0x7FFFFFFF ^ (in2 >> 31);
+ in = *pSrc++;
+ in = ((q63_t) in * scaleFract) >> 32;
+ out = in << kShift;
+ if (in != (out >> kShift))
+ out = 0x7FFFFFFF ^ (in >> 31);
+ *pDst++ = out;
- out3 = in3 << kShift;
- out4 = in4 << kShift;
-
- *pDst = out1;
- *(pDst + 1) = out2;
-
- if (in3 != (out3 >> kShift))
- out3 = 0x7FFFFFFF ^ (in3 >> 31);
-
- if (in4 != (out4 >> kShift))
- out4 = 0x7FFFFFFF ^ (in4 >> 31);
-
- /* Store result destination */
- *(pDst + 2) = out3;
- *(pDst + 3) = out4;
-
- /* Update pointers to process next sampels */
- pSrc += 4U;
- pDst += 4U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
-
}
else
{
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* read four inputs from source */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- in3 = *(pSrc + 2);
- in4 = *(pSrc + 3);
+ /* C = A * scale */
- /* multiply input with scaler value */
- in1 = ((q63_t) in1 * scaleFract) >> 32;
- in2 = ((q63_t) in2 * scaleFract) >> 32;
- in3 = ((q63_t) in3 * scaleFract) >> 32;
- in4 = ((q63_t) in4 * scaleFract) >> 32;
+ /* Scale input and store result in destination buffer. */
+ in = *pSrc++; /* read four inputs from source */
+ in = ((q63_t) in * scaleFract) >> 32; /* multiply input with scaler value */
+ out = in >> -kShift; /* apply shifting */
+ *pDst++ = out; /* Store result destination */
- /* apply shifting */
- out1 = in1 >> -kShift;
- out2 = in2 >> -kShift;
+ in = *pSrc++;
+ in = ((q63_t) in * scaleFract) >> 32;
+ out = in >> -kShift;
+ *pDst++ = out;
- out3 = in3 >> -kShift;
- out4 = in4 >> -kShift;
+ in = *pSrc++;
+ in = ((q63_t) in * scaleFract) >> 32;
+ out = in >> -kShift;
+ *pDst++ = out;
- /* Store result destination */
- *pDst = out1;
- *(pDst + 1) = out2;
+ in = *pSrc++;
+ in = ((q63_t) in * scaleFract) >> 32;
+ out = in >> -kShift;
+ *pDst++ = out;
- *(pDst + 2) = out3;
- *(pDst + 3) = out4;
-
- /* Update pointers to process next sampels */
- pSrc += 4U;
- pDst += 4U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
- if (sign == 0)
+ if (sign == 0U)
{
- while (blkCnt > 0U)
- {
- /* C = A * scale */
- /* Scale the input and then store the result in the destination buffer. */
- in = *pSrc++;
- in = ((q63_t) in * scaleFract) >> 32;
+ while (blkCnt > 0U)
+ {
+ /* C = A * scale */
- out = in << kShift;
+ /* Scale input and store result in destination buffer. */
+ in = *pSrc++;
+ in = ((q63_t) in * scaleFract) >> 32;
+ out = in << kShift;
+ if (in != (out >> kShift))
+ out = 0x7FFFFFFF ^ (in >> 31);
+ *pDst++ = out;
- if (in != (out >> kShift))
- out = 0x7FFFFFFF ^ (in >> 31);
-
- *pDst++ = out;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
+ /* Decrement loop counter */
+ blkCnt--;
+ }
}
else
{
- while (blkCnt > 0U)
- {
- /* C = A * scale */
- /* Scale the input and then store the result in the destination buffer. */
- in = *pSrc++;
- in = ((q63_t) in * scaleFract) >> 32;
+ while (blkCnt > 0U)
+ {
+ /* C = A * scale */
- out = in >> -kShift;
+ /* Scale input and store result in destination buffer. */
+ in = *pSrc++;
+ in = ((q63_t) in * scaleFract) >> 32;
+ out = in >> -kShift;
+ *pDst++ = out;
- *pDst++ = out;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
+ /* Decrement loop counter */
+ blkCnt--;
+ }
}
+
}
/**
- * @} end of scale group
+ @} end of BasicScale group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c
index 6cf1bbb..442a27e 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c
@@ -3,13 +3,13 @@
* Title: arm_scale_q7.c
* Description: Multiplies a Q7 vector by a scalar
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,109 +29,101 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup scale
- * @{
+ @addtogroup BasicScale
+ @{
*/
/**
- * @brief Multiplies a Q7 vector by a scalar.
- * @param[in] *pSrc points to the input vector
- * @param[in] scaleFract fractional portion of the scale value
- * @param[in] shift number of bits to shift the result by
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.
- * These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.
+ @brief Multiplies a Q7 vector by a scalar.
+ @param[in] pSrc points to the input vector
+ @param[in] scaleFract fractional portion of the scale value
+ @param[in] shift number of bits to shift the result by
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.
+ These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.
*/
void arm_scale_q7(
- q7_t * pSrc,
- q7_t scaleFract,
- int8_t shift,
- q7_t * pDst,
- uint32_t blockSize)
+ const q7_t * pSrc,
+ q7_t scaleFract,
+ int8_t shift,
+ q7_t * pDst,
+ uint32_t blockSize)
{
- int8_t kShift = 7 - shift; /* shift to apply after scaling */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ int8_t kShift = 7 - shift; /* Shift to apply after scaling */
+
+#if defined (ARM_MATH_LOOPUNROLL)
#if defined (ARM_MATH_DSP)
+ q7_t in1, in2, in3, in4; /* Temporary input variables */
+ q7_t out1, out2, out3, out4; /* Temporary output variables */
+#endif
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q7_t in1, in2, in3, in4, out1, out2, out3, out4; /* Temporary variables to store input & output */
-
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
+ /* C = A * scale */
+
+#if defined (ARM_MATH_DSP)
/* Reading 4 inputs from memory */
in1 = *pSrc++;
in2 = *pSrc++;
in3 = *pSrc++;
in4 = *pSrc++;
- /* C = A * scale */
- /* Scale the inputs and then store the results in the temporary variables. */
+ /* Scale inputs and store result in the temporary variable. */
out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
- /* Packing the individual outputs into 32bit and storing in
- * destination buffer in single write */
- *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
+ /* Pack and store result in destination buffer (in single write) */
+ write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
+#else
+ *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+ *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+ *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+ *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+#endif
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = A * scale */
- /* Scale the input and then store the result in the destination buffer. */
- *pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8));
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C = A * scale */
- /* Scale the input and then store the result in the destination buffer. */
- *pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8));
- /* Decrement the loop counter */
+ /* Scale input and store result in destination buffer. */
+ *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of scale group
+ @} end of BasicScale group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c
index d2cd037..be05eb2 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c
@@ -3,13 +3,13 @@
* Title: arm_shift_q15.c
* Description: Shifts the elements of a Q15 vector by a specified number of bits
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,208 +29,173 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup shift
- * @{
+ @addtogroup BasicShift
+ @{
*/
/**
- * @brief Shifts the elements of a Q15 vector a specified number of bits.
- * @param[in] *pSrc points to the input vector
- * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+ @brief Shifts the elements of a Q15 vector a specified number of bits
+ @param[in] pSrc points to the input vector
+ @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
*/
void arm_shift_q15(
- q15_t * pSrc,
- int8_t shiftBits,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ int8_t shiftBits,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
- uint8_t sign; /* Sign of shiftBits */
+ uint32_t blkCnt; /* Loop counter */
+ uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */
+
+#if defined (ARM_MATH_LOOPUNROLL)
#if defined (ARM_MATH_DSP)
+ q15_t in1, in2; /* Temporary input variables */
+#endif
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q15_t in1, in2; /* Temporary variables */
-
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* Getting the sign of shiftBits */
- sign = (shiftBits & 0x80);
-
/* If the shift value is positive then do right shift else left shift */
if (sign == 0U)
{
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* Read 2 inputs */
+ /* C = A << shiftBits */
+
+#if defined (ARM_MATH_DSP)
+ /* read 2 samples from source */
in1 = *pSrc++;
in2 = *pSrc++;
- /* C = A << shiftBits */
+
/* Shift the inputs and then store the results in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
- __SSAT((in2 << shiftBits), 16), 16);
-
+#ifndef ARM_MATH_BIG_ENDIAN
+ write_q15x2_ia (&pDst, __PKHBT(__SSAT((in1 << shiftBits), 16),
+ __SSAT((in2 << shiftBits), 16), 16));
#else
+ write_q15x2_ia (&pDst, __PKHBT(__SSAT((in2 << shiftBits), 16),
+ __SSAT((in1 << shiftBits), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
- __SSAT((in1 << shiftBits), 16), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
+ /* read 2 samples from source */
in1 = *pSrc++;
in2 = *pSrc++;
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
- __SSAT((in2 << shiftBits), 16), 16);
+#ifndef ARM_MATH_BIG_ENDIAN
+ write_q15x2_ia (&pDst, __PKHBT(__SSAT((in1 << shiftBits), 16),
+ __SSAT((in2 << shiftBits), 16), 16));
+#else
+ write_q15x2_ia (&pDst, __PKHBT(__SSAT((in2 << shiftBits), 16),
+ __SSAT((in1 << shiftBits), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
#else
+ *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+ *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+ *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+ *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+#endif
- *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
- __SSAT((in1 << shiftBits), 16), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* C = A << shiftBits */
- /* Shift and then store the results in the destination buffer. */
- *pDst++ = __SSAT((*pSrc++ << shiftBits), 16);
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
else
{
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0U)
- {
- /* Read 2 inputs */
- in1 = *pSrc++;
- in2 = *pSrc++;
-
- /* C = A >> shiftBits */
- /* Shift the inputs and then store the results in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
- (in2 >> -shiftBits), 16);
-
-#else
-
- *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
- (in1 >> -shiftBits), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- in1 = *pSrc++;
- in2 = *pSrc++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
- (in2 >> -shiftBits), 16);
-
-#else
-
- *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
- (in1 >> -shiftBits), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
while (blkCnt > 0U)
{
/* C = A >> shiftBits */
+
+#if defined (ARM_MATH_DSP)
+ /* read 2 samples from source */
+ in1 = *pSrc++;
+ in2 = *pSrc++;
+
/* Shift the inputs and then store the results in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+ write_q15x2_ia (&pDst, __PKHBT((in1 >> -shiftBits),
+ (in2 >> -shiftBits), 16));
+#else
+ write_q15x2_ia (&pDst, __PKHBT((in2 >> -shiftBits),
+ (in1 >> -shiftBits), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+ /* read 2 samples from source */
+ in1 = *pSrc++;
+ in2 = *pSrc++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+ write_q15x2_ia (&pDst, __PKHBT((in1 >> -shiftBits),
+ (in2 >> -shiftBits), 16));
+#else
+ write_q15x2_ia (&pDst, __PKHBT((in2 >> -shiftBits),
+ (in1 >> -shiftBits), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+#else
*pDst++ = (*pSrc++ >> -shiftBits);
+ *pDst++ = (*pSrc++ >> -shiftBits);
+ *pDst++ = (*pSrc++ >> -shiftBits);
+ *pDst++ = (*pSrc++ >> -shiftBits);
+#endif
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
- /* Getting the sign of shiftBits */
- sign = (shiftBits & 0x80);
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
/* If the shift value is positive then do right shift else left shift */
if (sign == 0U)
{
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
while (blkCnt > 0U)
{
/* C = A << shiftBits */
- /* Shift and then store the results in the destination buffer. */
- *pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16);
- /* Decrement the loop counter */
+ /* Shift input and store result in destination buffer. */
+ *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+
+ /* Decrement loop counter */
blkCnt--;
}
}
else
{
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
while (blkCnt > 0U)
{
/* C = A >> shiftBits */
- /* Shift the inputs and then store the results in the destination buffer. */
+
+ /* Shift input and store result in destination buffer. */
*pDst++ = (*pSrc++ >> -shiftBits);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of shift group
+ @} end of BasicShift group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c
index 7e728d4..f43f185 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c
@@ -3,13 +3,13 @@
* Title: arm_shift_q31.c
* Description: Shifts the elements of a Q31 vector by a specified number of bits
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,163 +29,153 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @defgroup shift Vector Shift
- *
- * Shifts the elements of a fixed-point vector by a specified number of bits.
- * There are separate functions for Q7, Q15, and Q31 data types.
- * The underlying algorithm used is:
- *
- * <pre>
- * pDst[n] = pSrc[n] << shift, 0 <= n < blockSize.
- * </pre>
- *
- * If <code>shift</code> is positive then the elements of the vector are shifted to the left.
- * If <code>shift</code> is negative then the elements of the vector are shifted to the right.
- *
- * The functions support in-place computation allowing the source and destination
- * pointers to reference the same memory buffer.
+ @defgroup BasicShift Vector Shift
+
+ Shifts the elements of a fixed-point vector by a specified number of bits.
+ There are separate functions for Q7, Q15, and Q31 data types.
+ The underlying algorithm used is:
+
+ <pre>
+ pDst[n] = pSrc[n] << shift, 0 <= n < blockSize.
+ </pre>
+
+ If <code>shift</code> is positive then the elements of the vector are shifted to the left.
+ If <code>shift</code> is negative then the elements of the vector are shifted to the right.
+
+ The functions support in-place computation allowing the source and destination
+ pointers to reference the same memory buffer.
*/
/**
- * @addtogroup shift
- * @{
+ @addtogroup BasicShift
+ @{
*/
/**
- * @brief Shifts the elements of a Q31 vector a specified number of bits.
- * @param[in] *pSrc points to the input vector
- * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
+ @brief Shifts the elements of a Q31 vector a specified number of bits.
+ @param[in] pSrc points to the input vector
+ @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in the vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
*/
void arm_shift_q31(
- q31_t * pSrc,
- int8_t shiftBits,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ int8_t shiftBits,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
- uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */
+ uint32_t blkCnt; /* Loop counter */
+ uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- q31_t in1, in2, in3, in4; /* Temporary input variables */
- q31_t out1, out2, out3, out4; /* Temporary output variables */
+ q31_t in, out; /* Temporary variables */
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
-
+ /* If the shift value is positive then do right shift else left shift */
if (sign == 0U)
{
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C = A << shiftBits */
- /* Shift the input and then store the results in the destination buffer. */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- out1 = in1 << shiftBits;
- in3 = *(pSrc + 2);
- out2 = in2 << shiftBits;
- in4 = *(pSrc + 3);
- if (in1 != (out1 >> shiftBits))
- out1 = 0x7FFFFFFF ^ (in1 >> 31);
+ /* C = A << shiftBits */
- if (in2 != (out2 >> shiftBits))
- out2 = 0x7FFFFFFF ^ (in2 >> 31);
+ /* Shift input and store result in destination buffer. */
+ in = *pSrc++;
+ out = in << shiftBits;
+ if (in != (out >> shiftBits))
+ out = 0x7FFFFFFF ^ (in >> 31);
+ *pDst++ = out;
- *pDst = out1;
- out3 = in3 << shiftBits;
- *(pDst + 1) = out2;
- out4 = in4 << shiftBits;
+ in = *pSrc++;
+ out = in << shiftBits;
+ if (in != (out >> shiftBits))
+ out = 0x7FFFFFFF ^ (in >> 31);
+ *pDst++ = out;
- if (in3 != (out3 >> shiftBits))
- out3 = 0x7FFFFFFF ^ (in3 >> 31);
+ in = *pSrc++;
+ out = in << shiftBits;
+ if (in != (out >> shiftBits))
+ out = 0x7FFFFFFF ^ (in >> 31);
+ *pDst++ = out;
- if (in4 != (out4 >> shiftBits))
- out4 = 0x7FFFFFFF ^ (in4 >> 31);
+ in = *pSrc++;
+ out = in << shiftBits;
+ if (in != (out >> shiftBits))
+ out = 0x7FFFFFFF ^ (in >> 31);
+ *pDst++ = out;
- *(pDst + 2) = out3;
- *(pDst + 3) = out4;
-
- /* Update destination pointer to process next sampels */
- pSrc += 4U;
- pDst += 4U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
else
{
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C = A >> shiftBits */
- /* Shift the input and then store the results in the destination buffer. */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- in3 = *(pSrc + 2);
- in4 = *(pSrc + 3);
+ /* C = A >> shiftBits */
- *pDst = (in1 >> -shiftBits);
- *(pDst + 1) = (in2 >> -shiftBits);
- *(pDst + 2) = (in3 >> -shiftBits);
- *(pDst + 3) = (in4 >> -shiftBits);
+ /* Shift input and store results in destination buffer. */
+ *pDst++ = (*pSrc++ >> -shiftBits);
+ *pDst++ = (*pSrc++ >> -shiftBits);
+ *pDst++ = (*pSrc++ >> -shiftBits);
+ *pDst++ = (*pSrc++ >> -shiftBits);
-
- pSrc += 4U;
- pDst += 4U;
-
+ /* Decrement loop counter */
blkCnt--;
}
-
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
- while (blkCnt > 0U)
+ /* If the shift value is positive then do right shift else left shift */
+ if (sign == 0U)
{
- /* C = A (>> or <<) shiftBits */
- /* Shift the input and then store the result in the destination buffer. */
- *pDst++ = (sign == 0U) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
- (*pSrc++ >> -shiftBits);
+ while (blkCnt > 0U)
+ {
+ /* C = A << shiftBits */
- /* Decrement the loop counter */
- blkCnt--;
+ /* Shift input and store result in destination buffer. */
+ *pDst++ = clip_q63_to_q31((q63_t) *pSrc++ << shiftBits);
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
}
+ else
+ {
+ while (blkCnt > 0U)
+ {
+ /* C = A >> shiftBits */
+ /* Shift input and store result in destination buffer. */
+ *pDst++ = (*pSrc++ >> -shiftBits);
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+ }
}
/**
- * @} end of shift group
+ @} end of BasicShift group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c
index fd508b4..9a67148 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c
@@ -3,13 +3,13 @@
* Title: arm_shift_q7.c
* Description: Processing function for the Q7 Shifting
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,180 +29,147 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup shift
- * @{
+ @addtogroup BasicShift
+ @{
*/
-
/**
- * @brief Shifts the elements of a Q7 vector a specified number of bits.
- * @param[in] *pSrc points to the input vector
- * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * \par Conditions for optimum performance
- * Input and output buffers should be aligned by 32-bit
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.
+ @brief Shifts the elements of a Q7 vector a specified number of bits
+ @param[in] pSrc points to the input vector
+ @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par onditions for optimum performance
+ Input and output buffers should be aligned by 32-bit
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
*/
void arm_shift_q7(
- q7_t * pSrc,
- int8_t shiftBits,
- q7_t * pDst,
- uint32_t blockSize)
+ const q7_t * pSrc,
+ int8_t shiftBits,
+ q7_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
- uint8_t sign; /* Sign of shiftBits */
+ uint32_t blkCnt; /* Loop counter */
+ uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */
+
+#if defined (ARM_MATH_LOOPUNROLL)
#if defined (ARM_MATH_DSP)
+ q7_t in1, in2, in3, in4; /* Temporary input variables */
+#endif
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q7_t in1; /* Input value1 */
- q7_t in2; /* Input value2 */
- q7_t in3; /* Input value3 */
- q7_t in4; /* Input value4 */
-
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* Getting the sign of shiftBits */
- sign = (shiftBits & 0x80);
-
/* If the shift value is positive then do right shift else left shift */
if (sign == 0U)
{
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A << shiftBits */
+
+#if defined (ARM_MATH_DSP)
/* Read 4 inputs */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- in3 = *(pSrc + 2);
- in4 = *(pSrc + 3);
+ in1 = *pSrc++;
+ in2 = *pSrc++;
+ in3 = *pSrc++;
+ in4 = *pSrc++;
- /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
- *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8),
- __SSAT((in2 << shiftBits), 8),
- __SSAT((in3 << shiftBits), 8),
- __SSAT((in4 << shiftBits), 8));
- /* Update source pointer to process next sampels */
- pSrc += 4U;
+ /* Pack and store result in destination buffer (in single write) */
+ write_q7x4_ia (&pDst, __PACKq7(__SSAT((in1 << shiftBits), 8),
+ __SSAT((in2 << shiftBits), 8),
+ __SSAT((in3 << shiftBits), 8),
+ __SSAT((in4 << shiftBits), 8) ));
+#else
+ *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+ *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+ *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+ *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+#endif
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* C = A << shiftBits */
- /* Shift the input and then store the result in the destination buffer. */
- *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8);
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
else
{
- shiftBits = -shiftBits;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A >> shiftBits */
+
+#if defined (ARM_MATH_DSP)
/* Read 4 inputs */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- in3 = *(pSrc + 2);
- in4 = *(pSrc + 3);
-
- /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
- *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits),
- (in3 >> shiftBits), (in4 >> shiftBits));
-
-
- pSrc += 4U;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* C = A >> shiftBits */
- /* Shift the input and then store the result in the destination buffer. */
in1 = *pSrc++;
- *pDst++ = (in1 >> shiftBits);
+ in2 = *pSrc++;
+ in3 = *pSrc++;
+ in4 = *pSrc++;
- /* Decrement the loop counter */
+ /* Pack and store result in destination buffer (in single write) */
+ write_q7x4_ia (&pDst, __PACKq7((in1 >> -shiftBits),
+ (in2 >> -shiftBits),
+ (in3 >> -shiftBits),
+ (in4 >> -shiftBits) ));
+#else
+ *pDst++ = (*pSrc++ >> -shiftBits);
+ *pDst++ = (*pSrc++ >> -shiftBits);
+ *pDst++ = (*pSrc++ >> -shiftBits);
+ *pDst++ = (*pSrc++ >> -shiftBits);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
}
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
- /* Getting the sign of shiftBits */
- sign = (shiftBits & 0x80);
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
/* If the shift value is positive then do right shift else left shift */
if (sign == 0U)
{
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
while (blkCnt > 0U)
{
/* C = A << shiftBits */
- /* Shift the input and then store the result in the destination buffer. */
- *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8);
- /* Decrement the loop counter */
+ /* Shift input and store result in destination buffer. */
+ *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+
+ /* Decrement loop counter */
blkCnt--;
}
}
else
{
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
while (blkCnt > 0U)
{
/* C = A >> shiftBits */
- /* Shift the input and then store the result in the destination buffer. */
+
+ /* Shift input and store result in destination buffer. */
*pDst++ = (*pSrc++ >> -shiftBits);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
-#endif /* #if defined (ARM_MATH_DSP) */
}
/**
- * @} end of shift group
+ @} end of BasicShift group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c
index 74a2944..a36016d 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c
@@ -1,15 +1,15 @@
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_sub_f32.c
- * Description: Floating-point vector subtraction.
+ * Description: Floating-point vector subtraction
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,110 +29,88 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @defgroup BasicSub Vector Subtraction
- *
- * Element-by-element subtraction of two vectors.
- *
- * <pre>
- * pDst[n] = pSrcA[n] - pSrcB[n], 0 <= n < blockSize.
- * </pre>
- *
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ @defgroup BasicSub Vector Subtraction
+
+ Element-by-element subtraction of two vectors.
+
+ <pre>
+ pDst[n] = pSrcA[n] - pSrcB[n], 0 <= n < blockSize.
+ </pre>
+
+ There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
- * @addtogroup BasicSub
- * @{
+ @addtogroup BasicSub
+ @{
*/
-
/**
- * @brief Floating-point vector subtraction.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
+ @brief Floating-point vector subtraction.
+ @param[in] pSrcA points to the first input vector
+ @param[in] pSrcB points to the second input vector
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
*/
void arm_sub_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize)
+ const float32_t * pSrcA,
+ const float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t inA1, inA2, inA3, inA4; /* temporary variables */
- float32_t inB1, inB2, inB3, inB4; /* temporary variables */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A - B */
- /* Subtract and then store the results in the destination buffer. */
- /* Read 4 input samples from sourceA and sourceB */
- inA1 = *pSrcA;
- inB1 = *pSrcB;
- inA2 = *(pSrcA + 1);
- inB2 = *(pSrcB + 1);
- inA3 = *(pSrcA + 2);
- inB3 = *(pSrcB + 2);
- inA4 = *(pSrcA + 3);
- inB4 = *(pSrcB + 3);
- /* dst = srcA - srcB */
- /* subtract and store the result */
- *pDst = inA1 - inB1;
- *(pDst + 1) = inA2 - inB2;
- *(pDst + 2) = inA3 - inB3;
- *(pDst + 3) = inA4 - inB4;
+ /* Subtract and store result in destination buffer. */
+ *pDst++ = (*pSrcA++) - (*pSrcB++);
+ *pDst++ = (*pSrcA++) - (*pSrcB++);
- /* Update pointers to process next sampels */
- pSrcA += 4U;
- pSrcB += 4U;
- pDst += 4U;
+ *pDst++ = (*pSrcA++) - (*pSrcB++);
- /* Decrement the loop counter */
+ *pDst++ = (*pSrcA++) - (*pSrcB++);
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = A - B */
- /* Subtract and then store the results in the destination buffer. */
+
+ /* Subtract and store result in destination buffer. */
*pDst++ = (*pSrcA++) - (*pSrcB++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of BasicSub group
+ @} end of BasicSub group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c
index 17942eb..3d06eb0 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c
@@ -3,13 +3,13 @@
* Title: arm_sub_q15.c
* Description: Q15 vector subtraction
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,100 +29,98 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup BasicSub
- * @{
+ @addtogroup BasicSub
+ @{
*/
/**
- * @brief Q15 vector subtraction.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+ @brief Q15 vector subtraction.
+ @param[in] pSrcA points to the first input vector
+ @param[in] pSrcB points to the second input vector
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
*/
void arm_sub_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrcA,
+ const q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
#if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t inA1, inA2;
q31_t inB1, inB2;
+#endif
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A - B */
- /* Subtract and then store the results in the destination buffer two samples at a time. */
- inA1 = *__SIMD32(pSrcA)++;
- inA2 = *__SIMD32(pSrcA)++;
- inB1 = *__SIMD32(pSrcB)++;
- inB2 = *__SIMD32(pSrcB)++;
- *__SIMD32(pDst)++ = __QSUB16(inA1, inB1);
- *__SIMD32(pDst)++ = __QSUB16(inA2, inB2);
+#if defined (ARM_MATH_DSP)
+ /* read 2 times 2 samples at a time from sourceA */
+ inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
+ inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
+ /* read 2 times 2 samples at a time from sourceB */
+ inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
+ inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
- /* Decrement the loop counter */
+ /* Subtract and store 2 times 2 samples at a time */
+ write_q15x2_ia (&pDst, __QSUB16(inA1, inB1));
+ write_q15x2_ia (&pDst, __QSUB16(inA2, inB2));
+#else
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = A - B */
- /* Subtract and then store the result in the destination buffer. */
- *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C = A - B */
- /* Subtract and then store the result in the destination buffer. */
- *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ - *pSrcB++), 16);
- /* Decrement the loop counter */
+ /* Subtract and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+ *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++);
+#else
+ *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
}
/**
- * @} end of BasicSub group
+ @} end of BasicSub group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c
index 72b8597..92d3537 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c
@@ -3,13 +3,13 @@
* Title: arm_sub_q31.c
* Description: Q31 vector subtraction
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,106 +29,80 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup BasicSub
- * @{
+ @addtogroup BasicSub
+ @{
*/
/**
- * @brief Q31 vector subtraction.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
+ @brief Q31 vector subtraction.
+ @param[in] pSrcA points to the first input vector
+ @param[in] pSrcB points to the second input vector
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
*/
void arm_sub_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrcA,
+ const q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
-#if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inA1, inA2, inA3, inA4;
- q31_t inB1, inB2, inB3, inB4;
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A - B */
- /* Subtract and then store the results in the destination buffer. */
- inA1 = *pSrcA++;
- inA2 = *pSrcA++;
- inB1 = *pSrcB++;
- inB2 = *pSrcB++;
- inA3 = *pSrcA++;
- inA4 = *pSrcA++;
- inB3 = *pSrcB++;
- inB4 = *pSrcB++;
-
- *pDst++ = __QSUB(inA1, inB1);
- *pDst++ = __QSUB(inA2, inB2);
- *pDst++ = __QSUB(inA3, inB3);
- *pDst++ = __QSUB(inA4, inB4);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* C = A - B */
- /* Subtract and then store the result in the destination buffer. */
+ /* Subtract and store result in destination buffer. */
*pDst++ = __QSUB(*pSrcA++, *pSrcB++);
- /* Decrement the loop counter */
+ *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+ *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+ *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+ /* Decrement loop counter */
blkCnt--;
}
-#else
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
- /* Run the below code for Cortex-M0 */
+#else
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C = A - B */
- /* Subtract and then store the result in the destination buffer. */
- *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ - *pSrcB++);
- /* Decrement the loop counter */
+ /* Subtract and store result in destination buffer. */
+ *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of BasicSub group
+ @} end of BasicSub group
*/
diff --git a/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c b/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c
index d211f40..804e589 100644
--- a/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c
+++ b/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c
@@ -3,13 +3,13 @@
* Title: arm_sub_q7.c
* Description: Q7 vector subtraction
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,91 +29,81 @@
#include "arm_math.h"
/**
- * @ingroup groupMath
+ @ingroup groupMath
*/
/**
- * @addtogroup BasicSub
- * @{
+ @addtogroup BasicSub
+ @{
*/
/**
- * @brief Q7 vector subtraction.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
+ @brief Q7 vector subtraction.
+ @param[in] pSrcA points to the first input vector
+ @param[in] pSrcB points to the second input vector
+ @param[out] pDst points to the output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
*/
void arm_sub_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize)
+ const q7_t * pSrcA,
+ const q7_t * pSrcB,
+ q7_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A - B */
- /* Subtract and then store the results in the destination buffer 4 samples at a time. */
- *__SIMD32(pDst)++ = __QSUB8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
- /* Decrement the loop counter */
+#if defined (ARM_MATH_DSP)
+ /* Subtract and store result in destination buffer (4 samples at a time). */
+ write_q7x4_ia (&pDst, __QSUB8(read_q7x4_ia ((q7_t **) &pSrcA), read_q7x4_ia ((q7_t **) &pSrcB)));
+#else
+ *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+ *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+ *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+ *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = A - B */
- /* Subtract and then store the result in the destination buffer. */
- *pDst++ = __SSAT(*pSrcA++ - *pSrcB++, 8);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C = A - B */
- /* Subtract and then store the result in the destination buffer. */
- *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ - *pSrcB++, 8);
- /* Decrement the loop counter */
+ /* Subtract and store result in destination buffer. */
+ *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
}
/**
- * @} end of BasicSub group
+ @} end of BasicSub group
*/
diff --git a/CMSIS/DSP/Source/CommonTables/CommonTables.c b/CMSIS/DSP/Source/CommonTables/CommonTables.c
new file mode 100644
index 0000000..0d3178d
--- /dev/null
+++ b/CMSIS/DSP/Source/CommonTables/CommonTables.c
@@ -0,0 +1,4 @@
+
+#include "arm_common_tables.c"
+#include "arm_const_structs.c"
+
diff --git a/CMSIS/DSP/Source/CommonTables/arm_common_tables.c b/CMSIS/DSP/Source/CommonTables/arm_common_tables.c
index 1f8f589..4af3a45 100644
--- a/CMSIS/DSP/Source/CommonTables/arm_common_tables.c
+++ b/CMSIS/DSP/Source/CommonTables/arm_common_tables.c
@@ -3,13 +3,13 @@
* Title: arm_common_tables.c
* Description: common tables like fft twiddle factors, Bitreverse, reciprocal etc
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,165 +30,164 @@
#include "arm_common_tables.h"
/**
- * @ingroup ComplexFFT
+ @ingroup ComplexFFT
*/
/**
- * @addtogroup CFFT_CIFFT Complex FFT Tables
- * @{
+ @addtogroup CFFT_CIFFT Complex FFT Tables
+ @{
*/
/**
-* \par
-* Pseudo code for Generation of Bit reversal Table is
-* \par
-* <pre>for(l=1;l <= N/4;l++)
-* {
-* for(i=0;i<logN2;i++)
-* {
-* a[i]=l&(1<<i);
-* }
-* for(j=0; j<logN2; j++)
-* {
-* if (a[j]!=0)
-* y[l]+=(1<<((logN2-1)-j));
-* }
-* y[l] = y[l] >> 1;
-* } </pre>
-* \par
-* where N = 4096 logN2 = 12
-* \par
-* N is the maximum FFT Size supported
+ @par
+ Pseudo code for Generation of Bit reversal Table is
+ @par
+ <pre>for (l = 1; l <= N/4; l++)
+ {
+ for (i = 0; i< logN2; i++)
+ {
+ a[i] = l & (1 << i);
+ }
+ for (j = 0; j < logN2; j++)
+ {
+ if (a[j] != 0)
+ y[l] += (1 << ((logN2 - 1) - j));
+ }
+ y[l] = y[l] >> 1;
+ } </pre>
+ @par
+ where N = 4096, logN2 = 12
+ @par
+ N is the maximum FFT Size supported
*/
-/*
-* @brief Table for bit reversal process
+/**
+ @brief Table for bit reversal process
*/
const uint16_t armBitRevTable[1024] = {
- 0x400, 0x200, 0x600, 0x100, 0x500, 0x300, 0x700, 0x80, 0x480, 0x280,
- 0x680, 0x180, 0x580, 0x380, 0x780, 0x40, 0x440, 0x240, 0x640, 0x140,
- 0x540, 0x340, 0x740, 0xc0, 0x4c0, 0x2c0, 0x6c0, 0x1c0, 0x5c0, 0x3c0,
- 0x7c0, 0x20, 0x420, 0x220, 0x620, 0x120, 0x520, 0x320, 0x720, 0xa0,
- 0x4a0, 0x2a0, 0x6a0, 0x1a0, 0x5a0, 0x3a0, 0x7a0, 0x60, 0x460, 0x260,
- 0x660, 0x160, 0x560, 0x360, 0x760, 0xe0, 0x4e0, 0x2e0, 0x6e0, 0x1e0,
- 0x5e0, 0x3e0, 0x7e0, 0x10, 0x410, 0x210, 0x610, 0x110, 0x510, 0x310,
- 0x710, 0x90, 0x490, 0x290, 0x690, 0x190, 0x590, 0x390, 0x790, 0x50,
- 0x450, 0x250, 0x650, 0x150, 0x550, 0x350, 0x750, 0xd0, 0x4d0, 0x2d0,
- 0x6d0, 0x1d0, 0x5d0, 0x3d0, 0x7d0, 0x30, 0x430, 0x230, 0x630, 0x130,
- 0x530, 0x330, 0x730, 0xb0, 0x4b0, 0x2b0, 0x6b0, 0x1b0, 0x5b0, 0x3b0,
- 0x7b0, 0x70, 0x470, 0x270, 0x670, 0x170, 0x570, 0x370, 0x770, 0xf0,
- 0x4f0, 0x2f0, 0x6f0, 0x1f0, 0x5f0, 0x3f0, 0x7f0, 0x8, 0x408, 0x208,
- 0x608, 0x108, 0x508, 0x308, 0x708, 0x88, 0x488, 0x288, 0x688, 0x188,
- 0x588, 0x388, 0x788, 0x48, 0x448, 0x248, 0x648, 0x148, 0x548, 0x348,
- 0x748, 0xc8, 0x4c8, 0x2c8, 0x6c8, 0x1c8, 0x5c8, 0x3c8, 0x7c8, 0x28,
- 0x428, 0x228, 0x628, 0x128, 0x528, 0x328, 0x728, 0xa8, 0x4a8, 0x2a8,
- 0x6a8, 0x1a8, 0x5a8, 0x3a8, 0x7a8, 0x68, 0x468, 0x268, 0x668, 0x168,
- 0x568, 0x368, 0x768, 0xe8, 0x4e8, 0x2e8, 0x6e8, 0x1e8, 0x5e8, 0x3e8,
- 0x7e8, 0x18, 0x418, 0x218, 0x618, 0x118, 0x518, 0x318, 0x718, 0x98,
- 0x498, 0x298, 0x698, 0x198, 0x598, 0x398, 0x798, 0x58, 0x458, 0x258,
- 0x658, 0x158, 0x558, 0x358, 0x758, 0xd8, 0x4d8, 0x2d8, 0x6d8, 0x1d8,
- 0x5d8, 0x3d8, 0x7d8, 0x38, 0x438, 0x238, 0x638, 0x138, 0x538, 0x338,
- 0x738, 0xb8, 0x4b8, 0x2b8, 0x6b8, 0x1b8, 0x5b8, 0x3b8, 0x7b8, 0x78,
- 0x478, 0x278, 0x678, 0x178, 0x578, 0x378, 0x778, 0xf8, 0x4f8, 0x2f8,
- 0x6f8, 0x1f8, 0x5f8, 0x3f8, 0x7f8, 0x4, 0x404, 0x204, 0x604, 0x104,
- 0x504, 0x304, 0x704, 0x84, 0x484, 0x284, 0x684, 0x184, 0x584, 0x384,
- 0x784, 0x44, 0x444, 0x244, 0x644, 0x144, 0x544, 0x344, 0x744, 0xc4,
- 0x4c4, 0x2c4, 0x6c4, 0x1c4, 0x5c4, 0x3c4, 0x7c4, 0x24, 0x424, 0x224,
- 0x624, 0x124, 0x524, 0x324, 0x724, 0xa4, 0x4a4, 0x2a4, 0x6a4, 0x1a4,
- 0x5a4, 0x3a4, 0x7a4, 0x64, 0x464, 0x264, 0x664, 0x164, 0x564, 0x364,
- 0x764, 0xe4, 0x4e4, 0x2e4, 0x6e4, 0x1e4, 0x5e4, 0x3e4, 0x7e4, 0x14,
- 0x414, 0x214, 0x614, 0x114, 0x514, 0x314, 0x714, 0x94, 0x494, 0x294,
- 0x694, 0x194, 0x594, 0x394, 0x794, 0x54, 0x454, 0x254, 0x654, 0x154,
- 0x554, 0x354, 0x754, 0xd4, 0x4d4, 0x2d4, 0x6d4, 0x1d4, 0x5d4, 0x3d4,
- 0x7d4, 0x34, 0x434, 0x234, 0x634, 0x134, 0x534, 0x334, 0x734, 0xb4,
- 0x4b4, 0x2b4, 0x6b4, 0x1b4, 0x5b4, 0x3b4, 0x7b4, 0x74, 0x474, 0x274,
- 0x674, 0x174, 0x574, 0x374, 0x774, 0xf4, 0x4f4, 0x2f4, 0x6f4, 0x1f4,
- 0x5f4, 0x3f4, 0x7f4, 0xc, 0x40c, 0x20c, 0x60c, 0x10c, 0x50c, 0x30c,
- 0x70c, 0x8c, 0x48c, 0x28c, 0x68c, 0x18c, 0x58c, 0x38c, 0x78c, 0x4c,
- 0x44c, 0x24c, 0x64c, 0x14c, 0x54c, 0x34c, 0x74c, 0xcc, 0x4cc, 0x2cc,
- 0x6cc, 0x1cc, 0x5cc, 0x3cc, 0x7cc, 0x2c, 0x42c, 0x22c, 0x62c, 0x12c,
- 0x52c, 0x32c, 0x72c, 0xac, 0x4ac, 0x2ac, 0x6ac, 0x1ac, 0x5ac, 0x3ac,
- 0x7ac, 0x6c, 0x46c, 0x26c, 0x66c, 0x16c, 0x56c, 0x36c, 0x76c, 0xec,
- 0x4ec, 0x2ec, 0x6ec, 0x1ec, 0x5ec, 0x3ec, 0x7ec, 0x1c, 0x41c, 0x21c,
- 0x61c, 0x11c, 0x51c, 0x31c, 0x71c, 0x9c, 0x49c, 0x29c, 0x69c, 0x19c,
- 0x59c, 0x39c, 0x79c, 0x5c, 0x45c, 0x25c, 0x65c, 0x15c, 0x55c, 0x35c,
- 0x75c, 0xdc, 0x4dc, 0x2dc, 0x6dc, 0x1dc, 0x5dc, 0x3dc, 0x7dc, 0x3c,
- 0x43c, 0x23c, 0x63c, 0x13c, 0x53c, 0x33c, 0x73c, 0xbc, 0x4bc, 0x2bc,
- 0x6bc, 0x1bc, 0x5bc, 0x3bc, 0x7bc, 0x7c, 0x47c, 0x27c, 0x67c, 0x17c,
- 0x57c, 0x37c, 0x77c, 0xfc, 0x4fc, 0x2fc, 0x6fc, 0x1fc, 0x5fc, 0x3fc,
- 0x7fc, 0x2, 0x402, 0x202, 0x602, 0x102, 0x502, 0x302, 0x702, 0x82,
- 0x482, 0x282, 0x682, 0x182, 0x582, 0x382, 0x782, 0x42, 0x442, 0x242,
- 0x642, 0x142, 0x542, 0x342, 0x742, 0xc2, 0x4c2, 0x2c2, 0x6c2, 0x1c2,
- 0x5c2, 0x3c2, 0x7c2, 0x22, 0x422, 0x222, 0x622, 0x122, 0x522, 0x322,
- 0x722, 0xa2, 0x4a2, 0x2a2, 0x6a2, 0x1a2, 0x5a2, 0x3a2, 0x7a2, 0x62,
- 0x462, 0x262, 0x662, 0x162, 0x562, 0x362, 0x762, 0xe2, 0x4e2, 0x2e2,
- 0x6e2, 0x1e2, 0x5e2, 0x3e2, 0x7e2, 0x12, 0x412, 0x212, 0x612, 0x112,
- 0x512, 0x312, 0x712, 0x92, 0x492, 0x292, 0x692, 0x192, 0x592, 0x392,
- 0x792, 0x52, 0x452, 0x252, 0x652, 0x152, 0x552, 0x352, 0x752, 0xd2,
- 0x4d2, 0x2d2, 0x6d2, 0x1d2, 0x5d2, 0x3d2, 0x7d2, 0x32, 0x432, 0x232,
- 0x632, 0x132, 0x532, 0x332, 0x732, 0xb2, 0x4b2, 0x2b2, 0x6b2, 0x1b2,
- 0x5b2, 0x3b2, 0x7b2, 0x72, 0x472, 0x272, 0x672, 0x172, 0x572, 0x372,
- 0x772, 0xf2, 0x4f2, 0x2f2, 0x6f2, 0x1f2, 0x5f2, 0x3f2, 0x7f2, 0xa,
- 0x40a, 0x20a, 0x60a, 0x10a, 0x50a, 0x30a, 0x70a, 0x8a, 0x48a, 0x28a,
- 0x68a, 0x18a, 0x58a, 0x38a, 0x78a, 0x4a, 0x44a, 0x24a, 0x64a, 0x14a,
- 0x54a, 0x34a, 0x74a, 0xca, 0x4ca, 0x2ca, 0x6ca, 0x1ca, 0x5ca, 0x3ca,
- 0x7ca, 0x2a, 0x42a, 0x22a, 0x62a, 0x12a, 0x52a, 0x32a, 0x72a, 0xaa,
- 0x4aa, 0x2aa, 0x6aa, 0x1aa, 0x5aa, 0x3aa, 0x7aa, 0x6a, 0x46a, 0x26a,
- 0x66a, 0x16a, 0x56a, 0x36a, 0x76a, 0xea, 0x4ea, 0x2ea, 0x6ea, 0x1ea,
- 0x5ea, 0x3ea, 0x7ea, 0x1a, 0x41a, 0x21a, 0x61a, 0x11a, 0x51a, 0x31a,
- 0x71a, 0x9a, 0x49a, 0x29a, 0x69a, 0x19a, 0x59a, 0x39a, 0x79a, 0x5a,
- 0x45a, 0x25a, 0x65a, 0x15a, 0x55a, 0x35a, 0x75a, 0xda, 0x4da, 0x2da,
- 0x6da, 0x1da, 0x5da, 0x3da, 0x7da, 0x3a, 0x43a, 0x23a, 0x63a, 0x13a,
- 0x53a, 0x33a, 0x73a, 0xba, 0x4ba, 0x2ba, 0x6ba, 0x1ba, 0x5ba, 0x3ba,
- 0x7ba, 0x7a, 0x47a, 0x27a, 0x67a, 0x17a, 0x57a, 0x37a, 0x77a, 0xfa,
- 0x4fa, 0x2fa, 0x6fa, 0x1fa, 0x5fa, 0x3fa, 0x7fa, 0x6, 0x406, 0x206,
- 0x606, 0x106, 0x506, 0x306, 0x706, 0x86, 0x486, 0x286, 0x686, 0x186,
- 0x586, 0x386, 0x786, 0x46, 0x446, 0x246, 0x646, 0x146, 0x546, 0x346,
- 0x746, 0xc6, 0x4c6, 0x2c6, 0x6c6, 0x1c6, 0x5c6, 0x3c6, 0x7c6, 0x26,
- 0x426, 0x226, 0x626, 0x126, 0x526, 0x326, 0x726, 0xa6, 0x4a6, 0x2a6,
- 0x6a6, 0x1a6, 0x5a6, 0x3a6, 0x7a6, 0x66, 0x466, 0x266, 0x666, 0x166,
- 0x566, 0x366, 0x766, 0xe6, 0x4e6, 0x2e6, 0x6e6, 0x1e6, 0x5e6, 0x3e6,
- 0x7e6, 0x16, 0x416, 0x216, 0x616, 0x116, 0x516, 0x316, 0x716, 0x96,
- 0x496, 0x296, 0x696, 0x196, 0x596, 0x396, 0x796, 0x56, 0x456, 0x256,
- 0x656, 0x156, 0x556, 0x356, 0x756, 0xd6, 0x4d6, 0x2d6, 0x6d6, 0x1d6,
- 0x5d6, 0x3d6, 0x7d6, 0x36, 0x436, 0x236, 0x636, 0x136, 0x536, 0x336,
- 0x736, 0xb6, 0x4b6, 0x2b6, 0x6b6, 0x1b6, 0x5b6, 0x3b6, 0x7b6, 0x76,
- 0x476, 0x276, 0x676, 0x176, 0x576, 0x376, 0x776, 0xf6, 0x4f6, 0x2f6,
- 0x6f6, 0x1f6, 0x5f6, 0x3f6, 0x7f6, 0xe, 0x40e, 0x20e, 0x60e, 0x10e,
- 0x50e, 0x30e, 0x70e, 0x8e, 0x48e, 0x28e, 0x68e, 0x18e, 0x58e, 0x38e,
- 0x78e, 0x4e, 0x44e, 0x24e, 0x64e, 0x14e, 0x54e, 0x34e, 0x74e, 0xce,
- 0x4ce, 0x2ce, 0x6ce, 0x1ce, 0x5ce, 0x3ce, 0x7ce, 0x2e, 0x42e, 0x22e,
- 0x62e, 0x12e, 0x52e, 0x32e, 0x72e, 0xae, 0x4ae, 0x2ae, 0x6ae, 0x1ae,
- 0x5ae, 0x3ae, 0x7ae, 0x6e, 0x46e, 0x26e, 0x66e, 0x16e, 0x56e, 0x36e,
- 0x76e, 0xee, 0x4ee, 0x2ee, 0x6ee, 0x1ee, 0x5ee, 0x3ee, 0x7ee, 0x1e,
- 0x41e, 0x21e, 0x61e, 0x11e, 0x51e, 0x31e, 0x71e, 0x9e, 0x49e, 0x29e,
- 0x69e, 0x19e, 0x59e, 0x39e, 0x79e, 0x5e, 0x45e, 0x25e, 0x65e, 0x15e,
- 0x55e, 0x35e, 0x75e, 0xde, 0x4de, 0x2de, 0x6de, 0x1de, 0x5de, 0x3de,
- 0x7de, 0x3e, 0x43e, 0x23e, 0x63e, 0x13e, 0x53e, 0x33e, 0x73e, 0xbe,
- 0x4be, 0x2be, 0x6be, 0x1be, 0x5be, 0x3be, 0x7be, 0x7e, 0x47e, 0x27e,
- 0x67e, 0x17e, 0x57e, 0x37e, 0x77e, 0xfe, 0x4fe, 0x2fe, 0x6fe, 0x1fe,
- 0x5fe, 0x3fe, 0x7fe, 0x1
+ 0x400, 0x200, 0x600, 0x100, 0x500, 0x300, 0x700, 0x080, 0x480, 0x280,
+ 0x680, 0x180, 0x580, 0x380, 0x780, 0x040, 0x440, 0x240, 0x640, 0x140,
+ 0x540, 0x340, 0x740, 0x0c0, 0x4c0, 0x2c0, 0x6c0, 0x1c0, 0x5c0, 0x3c0,
+ 0x7c0, 0x020, 0x420, 0x220, 0x620, 0x120, 0x520, 0x320, 0x720, 0x0a0,
+ 0x4a0, 0x2a0, 0x6a0, 0x1a0, 0x5a0, 0x3a0, 0x7a0, 0x060, 0x460, 0x260,
+ 0x660, 0x160, 0x560, 0x360, 0x760, 0x0e0, 0x4e0, 0x2e0, 0x6e0, 0x1e0,
+ 0x5e0, 0x3e0, 0x7e0, 0x010, 0x410, 0x210, 0x610, 0x110, 0x510, 0x310,
+ 0x710, 0x090, 0x490, 0x290, 0x690, 0x190, 0x590, 0x390, 0x790, 0x050,
+ 0x450, 0x250, 0x650, 0x150, 0x550, 0x350, 0x750, 0x0d0, 0x4d0, 0x2d0,
+ 0x6d0, 0x1d0, 0x5d0, 0x3d0, 0x7d0, 0x030, 0x430, 0x230, 0x630, 0x130,
+ 0x530, 0x330, 0x730, 0x0b0, 0x4b0, 0x2b0, 0x6b0, 0x1b0, 0x5b0, 0x3b0,
+ 0x7b0, 0x070, 0x470, 0x270, 0x670, 0x170, 0x570, 0x370, 0x770, 0x0f0,
+ 0x4f0, 0x2f0, 0x6f0, 0x1f0, 0x5f0, 0x3f0, 0x7f0, 0x008, 0x408, 0x208,
+ 0x608, 0x108, 0x508, 0x308, 0x708, 0x088, 0x488, 0x288, 0x688, 0x188,
+ 0x588, 0x388, 0x788, 0x048, 0x448, 0x248, 0x648, 0x148, 0x548, 0x348,
+ 0x748, 0x0c8, 0x4c8, 0x2c8, 0x6c8, 0x1c8, 0x5c8, 0x3c8, 0x7c8, 0x028,
+ 0x428, 0x228, 0x628, 0x128, 0x528, 0x328, 0x728, 0x0a8, 0x4a8, 0x2a8,
+ 0x6a8, 0x1a8, 0x5a8, 0x3a8, 0x7a8, 0x068, 0x468, 0x268, 0x668, 0x168,
+ 0x568, 0x368, 0x768, 0x0e8, 0x4e8, 0x2e8, 0x6e8, 0x1e8, 0x5e8, 0x3e8,
+ 0x7e8, 0x018, 0x418, 0x218, 0x618, 0x118, 0x518, 0x318, 0x718, 0x098,
+ 0x498, 0x298, 0x698, 0x198, 0x598, 0x398, 0x798, 0x058, 0x458, 0x258,
+ 0x658, 0x158, 0x558, 0x358, 0x758, 0x0d8, 0x4d8, 0x2d8, 0x6d8, 0x1d8,
+ 0x5d8, 0x3d8, 0x7d8, 0x038, 0x438, 0x238, 0x638, 0x138, 0x538, 0x338,
+ 0x738, 0x0b8, 0x4b8, 0x2b8, 0x6b8, 0x1b8, 0x5b8, 0x3b8, 0x7b8, 0x078,
+ 0x478, 0x278, 0x678, 0x178, 0x578, 0x378, 0x778, 0x0f8, 0x4f8, 0x2f8,
+ 0x6f8, 0x1f8, 0x5f8, 0x3f8, 0x7f8, 0x004, 0x404, 0x204, 0x604, 0x104,
+ 0x504, 0x304, 0x704, 0x084, 0x484, 0x284, 0x684, 0x184, 0x584, 0x384,
+ 0x784, 0x044, 0x444, 0x244, 0x644, 0x144, 0x544, 0x344, 0x744, 0x0c4,
+ 0x4c4, 0x2c4, 0x6c4, 0x1c4, 0x5c4, 0x3c4, 0x7c4, 0x024, 0x424, 0x224,
+ 0x624, 0x124, 0x524, 0x324, 0x724, 0x0a4, 0x4a4, 0x2a4, 0x6a4, 0x1a4,
+ 0x5a4, 0x3a4, 0x7a4, 0x064, 0x464, 0x264, 0x664, 0x164, 0x564, 0x364,
+ 0x764, 0x0e4, 0x4e4, 0x2e4, 0x6e4, 0x1e4, 0x5e4, 0x3e4, 0x7e4, 0x014,
+ 0x414, 0x214, 0x614, 0x114, 0x514, 0x314, 0x714, 0x094, 0x494, 0x294,
+ 0x694, 0x194, 0x594, 0x394, 0x794, 0x054, 0x454, 0x254, 0x654, 0x154,
+ 0x554, 0x354, 0x754, 0x0d4, 0x4d4, 0x2d4, 0x6d4, 0x1d4, 0x5d4, 0x3d4,
+ 0x7d4, 0x034, 0x434, 0x234, 0x634, 0x134, 0x534, 0x334, 0x734, 0x0b4,
+ 0x4b4, 0x2b4, 0x6b4, 0x1b4, 0x5b4, 0x3b4, 0x7b4, 0x074, 0x474, 0x274,
+ 0x674, 0x174, 0x574, 0x374, 0x774, 0x0f4, 0x4f4, 0x2f4, 0x6f4, 0x1f4,
+ 0x5f4, 0x3f4, 0x7f4, 0x00c, 0x40c, 0x20c, 0x60c, 0x10c, 0x50c, 0x30c,
+ 0x70c, 0x08c, 0x48c, 0x28c, 0x68c, 0x18c, 0x58c, 0x38c, 0x78c, 0x04c,
+ 0x44c, 0x24c, 0x64c, 0x14c, 0x54c, 0x34c, 0x74c, 0x0cc, 0x4cc, 0x2cc,
+ 0x6cc, 0x1cc, 0x5cc, 0x3cc, 0x7cc, 0x02c, 0x42c, 0x22c, 0x62c, 0x12c,
+ 0x52c, 0x32c, 0x72c, 0x0ac, 0x4ac, 0x2ac, 0x6ac, 0x1ac, 0x5ac, 0x3ac,
+ 0x7ac, 0x06c, 0x46c, 0x26c, 0x66c, 0x16c, 0x56c, 0x36c, 0x76c, 0x0ec,
+ 0x4ec, 0x2ec, 0x6ec, 0x1ec, 0x5ec, 0x3ec, 0x7ec, 0x01c, 0x41c, 0x21c,
+ 0x61c, 0x11c, 0x51c, 0x31c, 0x71c, 0x09c, 0x49c, 0x29c, 0x69c, 0x19c,
+ 0x59c, 0x39c, 0x79c, 0x05c, 0x45c, 0x25c, 0x65c, 0x15c, 0x55c, 0x35c,
+ 0x75c, 0x0dc, 0x4dc, 0x2dc, 0x6dc, 0x1dc, 0x5dc, 0x3dc, 0x7dc, 0x03c,
+ 0x43c, 0x23c, 0x63c, 0x13c, 0x53c, 0x33c, 0x73c, 0x0bc, 0x4bc, 0x2bc,
+ 0x6bc, 0x1bc, 0x5bc, 0x3bc, 0x7bc, 0x07c, 0x47c, 0x27c, 0x67c, 0x17c,
+ 0x57c, 0x37c, 0x77c, 0x0fc, 0x4fc, 0x2fc, 0x6fc, 0x1fc, 0x5fc, 0x3fc,
+ 0x7fc, 0x002, 0x402, 0x202, 0x602, 0x102, 0x502, 0x302, 0x702, 0x082,
+ 0x482, 0x282, 0x682, 0x182, 0x582, 0x382, 0x782, 0x042, 0x442, 0x242,
+ 0x642, 0x142, 0x542, 0x342, 0x742, 0x0c2, 0x4c2, 0x2c2, 0x6c2, 0x1c2,
+ 0x5c2, 0x3c2, 0x7c2, 0x022, 0x422, 0x222, 0x622, 0x122, 0x522, 0x322,
+ 0x722, 0x0a2, 0x4a2, 0x2a2, 0x6a2, 0x1a2, 0x5a2, 0x3a2, 0x7a2, 0x062,
+ 0x462, 0x262, 0x662, 0x162, 0x562, 0x362, 0x762, 0x0e2, 0x4e2, 0x2e2,
+ 0x6e2, 0x1e2, 0x5e2, 0x3e2, 0x7e2, 0x012, 0x412, 0x212, 0x612, 0x112,
+ 0x512, 0x312, 0x712, 0x092, 0x492, 0x292, 0x692, 0x192, 0x592, 0x392,
+ 0x792, 0x052, 0x452, 0x252, 0x652, 0x152, 0x552, 0x352, 0x752, 0x0d2,
+ 0x4d2, 0x2d2, 0x6d2, 0x1d2, 0x5d2, 0x3d2, 0x7d2, 0x032, 0x432, 0x232,
+ 0x632, 0x132, 0x532, 0x332, 0x732, 0x0b2, 0x4b2, 0x2b2, 0x6b2, 0x1b2,
+ 0x5b2, 0x3b2, 0x7b2, 0x072, 0x472, 0x272, 0x672, 0x172, 0x572, 0x372,
+ 0x772, 0x0f2, 0x4f2, 0x2f2, 0x6f2, 0x1f2, 0x5f2, 0x3f2, 0x7f2, 0x00a,
+ 0x40a, 0x20a, 0x60a, 0x10a, 0x50a, 0x30a, 0x70a, 0x08a, 0x48a, 0x28a,
+ 0x68a, 0x18a, 0x58a, 0x38a, 0x78a, 0x04a, 0x44a, 0x24a, 0x64a, 0x14a,
+ 0x54a, 0x34a, 0x74a, 0x0ca, 0x4ca, 0x2ca, 0x6ca, 0x1ca, 0x5ca, 0x3ca,
+ 0x7ca, 0x02a, 0x42a, 0x22a, 0x62a, 0x12a, 0x52a, 0x32a, 0x72a, 0x0aa,
+ 0x4aa, 0x2aa, 0x6aa, 0x1aa, 0x5aa, 0x3aa, 0x7aa, 0x06a, 0x46a, 0x26a,
+ 0x66a, 0x16a, 0x56a, 0x36a, 0x76a, 0x0ea, 0x4ea, 0x2ea, 0x6ea, 0x1ea,
+ 0x5ea, 0x3ea, 0x7ea, 0x01a, 0x41a, 0x21a, 0x61a, 0x11a, 0x51a, 0x31a,
+ 0x71a, 0x09a, 0x49a, 0x29a, 0x69a, 0x19a, 0x59a, 0x39a, 0x79a, 0x5a,
+ 0x45a, 0x25a, 0x65a, 0x15a, 0x55a, 0x35a, 0x75a, 0x0da, 0x4da, 0x2da,
+ 0x6da, 0x1da, 0x5da, 0x3da, 0x7da, 0x03a, 0x43a, 0x23a, 0x63a, 0x13a,
+ 0x53a, 0x33a, 0x73a, 0x0ba, 0x4ba, 0x2ba, 0x6ba, 0x1ba, 0x5ba, 0x3ba,
+ 0x7ba, 0x07a, 0x47a, 0x27a, 0x67a, 0x17a, 0x57a, 0x37a, 0x77a, 0x0fa,
+ 0x4fa, 0x2fa, 0x6fa, 0x1fa, 0x5fa, 0x3fa, 0x7fa, 0x006, 0x406, 0x206,
+ 0x606, 0x106, 0x506, 0x306, 0x706, 0x086, 0x486, 0x286, 0x686, 0x186,
+ 0x586, 0x386, 0x786, 0x046, 0x446, 0x246, 0x646, 0x146, 0x546, 0x346,
+ 0x746, 0x0c6, 0x4c6, 0x2c6, 0x6c6, 0x1c6, 0x5c6, 0x3c6, 0x7c6, 0x026,
+ 0x426, 0x226, 0x626, 0x126, 0x526, 0x326, 0x726, 0x0a6, 0x4a6, 0x2a6,
+ 0x6a6, 0x1a6, 0x5a6, 0x3a6, 0x7a6, 0x066, 0x466, 0x266, 0x666, 0x166,
+ 0x566, 0x366, 0x766, 0x0e6, 0x4e6, 0x2e6, 0x6e6, 0x1e6, 0x5e6, 0x3e6,
+ 0x7e6, 0x016, 0x416, 0x216, 0x616, 0x116, 0x516, 0x316, 0x716, 0x096,
+ 0x496, 0x296, 0x696, 0x196, 0x596, 0x396, 0x796, 0x056, 0x456, 0x256,
+ 0x656, 0x156, 0x556, 0x356, 0x756, 0x0d6, 0x4d6, 0x2d6, 0x6d6, 0x1d6,
+ 0x5d6, 0x3d6, 0x7d6, 0x036, 0x436, 0x236, 0x636, 0x136, 0x536, 0x336,
+ 0x736, 0x0b6, 0x4b6, 0x2b6, 0x6b6, 0x1b6, 0x5b6, 0x3b6, 0x7b6, 0x076,
+ 0x476, 0x276, 0x676, 0x176, 0x576, 0x376, 0x776, 0x0f6, 0x4f6, 0x2f6,
+ 0x6f6, 0x1f6, 0x5f6, 0x3f6, 0x7f6, 0x00e, 0x40e, 0x20e, 0x60e, 0x10e,
+ 0x50e, 0x30e, 0x70e, 0x08e, 0x48e, 0x28e, 0x68e, 0x18e, 0x58e, 0x38e,
+ 0x78e, 0x04e, 0x44e, 0x24e, 0x64e, 0x14e, 0x54e, 0x34e, 0x74e, 0x0ce,
+ 0x4ce, 0x2ce, 0x6ce, 0x1ce, 0x5ce, 0x3ce, 0x7ce, 0x02e, 0x42e, 0x22e,
+ 0x62e, 0x12e, 0x52e, 0x32e, 0x72e, 0x0ae, 0x4ae, 0x2ae, 0x6ae, 0x1ae,
+ 0x5ae, 0x3ae, 0x7ae, 0x06e, 0x46e, 0x26e, 0x66e, 0x16e, 0x56e, 0x36e,
+ 0x76e, 0x0ee, 0x4ee, 0x2ee, 0x6ee, 0x1ee, 0x5ee, 0x3ee, 0x7ee, 0x01e,
+ 0x41e, 0x21e, 0x61e, 0x11e, 0x51e, 0x31e, 0x71e, 0x09e, 0x49e, 0x29e,
+ 0x69e, 0x19e, 0x59e, 0x39e, 0x79e, 0x05e, 0x45e, 0x25e, 0x65e, 0x15e,
+ 0x55e, 0x35e, 0x75e, 0x0de, 0x4de, 0x2de, 0x6de, 0x1de, 0x5de, 0x3de,
+ 0x7de, 0x03e, 0x43e, 0x23e, 0x63e, 0x13e, 0x53e, 0x33e, 0x73e, 0x0be,
+ 0x4be, 0x2be, 0x6be, 0x1be, 0x5be, 0x3be, 0x7be, 0x07e, 0x47e, 0x27e,
+ 0x67e, 0x17e, 0x57e, 0x37e, 0x77e, 0x0fe, 0x4fe, 0x2fe, 0x6fe, 0x1fe,
+ 0x5fe, 0x3fe, 0x7fe, 0x001
};
-/*
-* @brief Floating-point Twiddle factors Table Generation
+/**
+ @brief Floating-point Twiddle factors Table Generation
*/
/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 16 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+ @par
+ Example code for Floating-point Twiddle factors Generation:
+ @par
+ <pre>for (i = 0; i < N/; i++)
+ {
+ twiddleCoef[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 16, PI = 3.14159265358979
+ @par
+ Cos and Sin values are in interleaved fashion
*/
const float32_t twiddleCoef_16[32] = {
1.000000000f, 0.000000000f,
@@ -210,19 +209,18 @@
};
/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 32 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+ @par
+ Example code for Floating-point Twiddle factors Generation:
+ @par
+ <pre>for (i = 0; i< N/; i++)
+ {
+ twiddleCoef[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 32, PI = 3.14159265358979
+ @par
+ Cos and Sin values are in interleaved fashion
*/
const float32_t twiddleCoef_32[64] = {
1.000000000f, 0.000000000f,
@@ -260,19 +258,18 @@
};
/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 64 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+ @par
+ Example code for Floating-point Twiddle factors Generation:
+ @par
+ <pre>for(i = 0; i < N/; i++)
+ {
+ twiddleCoef[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 64, PI = 3.14159265358979
+ @par
+ Cos and Sin values are in interleaved fashion
*/
const float32_t twiddleCoef_64[128] = {
1.000000000f, 0.000000000f,
@@ -342,21 +339,19 @@
};
/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 128 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+ @par
+ Example code for Floating-point Twiddle factors Generation:
+ @par
+ <pre>for (i = 0; i< N/; i++)
+ {
+ twiddleCoef[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 128, PI = 3.14159265358979
+ @par
+ Cos and Sin values are in interleaved fashion
*/
-
const float32_t twiddleCoef_128[256] = {
1.000000000f, 0.000000000f,
0.998795456f, 0.049067674f,
@@ -489,19 +484,18 @@
};
/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 256 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+ @par
+ Example code for Floating-point Twiddle factors Generation:
+ @par
+ <pre>for(i = 0; i< N/; i++)
+ {
+ twiddleCoef[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 256, PI = 3.14159265358979
+ @par
+ Cos and Sin values are in interleaved fashion
*/
const float32_t twiddleCoef_256[512] = {
1.000000000f, 0.000000000f,
@@ -763,19 +757,18 @@
};
/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 512 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+ @par
+ Example code for Floating-point Twiddle factors Generation:
+ @par
+ <pre>for (i = 0; i< N/; i++)
+ {
+ twiddleCoef[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 512, PI = 3.14159265358979
+ @par
+ Cos and Sin values are in interleaved fashion
*/
const float32_t twiddleCoef_512[1024] = {
1.000000000f, 0.000000000f,
@@ -1292,19 +1285,18 @@
0.999924702f, -0.012271538f
};
/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 1024 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+ @par
+ Example code for Floating-point Twiddle factors Generation:
+ @par
+ <pre>for (i = 0; i< N/; i++)
+ {
+ twiddleCoef[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 1024, PI = 3.14159265358979
+ @par
+ Cos and Sin values are in interleaved fashion
*/
const float32_t twiddleCoef_1024[2048] = {
1.000000000f, 0.000000000f,
@@ -2334,19 +2326,18 @@
};
/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 2048 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+ @par
+ Example code for Floating-point Twiddle factors Generation:
+ @par
+ <pre>for (i = 0; i< N/; i++)
+ {
+ twiddleCoef[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 2048, PI = 3.14159265358979
+ @par
+ Cos and Sin values are in interleaved fashion
*/
const float32_t twiddleCoef_2048[4096] = {
1.000000000f, 0.000000000f,
@@ -4400,19 +4391,18 @@
};
/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 4096 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+ @par
+ Example code for Floating-point Twiddle factors Generation:
+ @par
+ <pre>for (i = 0; i< N/; i++)
+ {
+ twiddleCoef[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 4096, PI = 3.14159265358979
+ @par
+ Cos and Sin values are in interleaved fashion
*/
const float32_t twiddleCoef_4096[8192] = {
1.000000000f, 0.000000000f,
@@ -8513,29 +8503,28 @@
0.999998823f, -0.001533980f
};
-/*
-* @brief Q31 Twiddle factors Table
+/**
+ @brief Q31 Twiddle factors Table
*/
/**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 16 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-* round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+ @par
+ Example code for Q31 Twiddle factors Generation::
+ @par
+ <pre> for(i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefQ31[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 16, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to Q31(Fixed point 1.31):
+ round(twiddleCoefQ31(i) * pow(2, 31))
+ */
const q31_t twiddleCoef_16_q31[24] = {
(q31_t)0x7FFFFFFF, (q31_t)0x00000000,
(q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
@@ -8552,23 +8541,22 @@
};
/**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 32 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-* round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+ @par
+ Example code for Q31 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefQ31[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 32, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to Q31(Fixed point 1.31):
+ round(twiddleCoefQ31(i) * pow(2, 31))
+ */
const q31_t twiddleCoef_32_q31[48] = {
(q31_t)0x7FFFFFFF, (q31_t)0x00000000,
(q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
@@ -8597,23 +8585,22 @@
};
/**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 64 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-* round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+ @par
+ Example code for Q31 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefQ31[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 64, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to Q31(Fixed point 1.31):
+ round(twiddleCoefQ31(i) * pow(2, 31))
+ */
const q31_t twiddleCoef_64_q31[96] = {
(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7F62368F,
(q31_t)0x0C8BD35E, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
@@ -8650,23 +8637,22 @@
};
/**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 128 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-* round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+ @par
+ Example code for Q31 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i < 3N/4; i++)
+ {
+ twiddleCoefQ31[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 128, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to Q31(Fixed point 1.31):
+ round(twiddleCoefQ31(i) * pow(2, 31))
+ */
const q31_t twiddleCoef_128_q31[192] = {
(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FD8878D,
(q31_t)0x0647D97C, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E,
@@ -8735,23 +8721,23 @@
};
/**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 256 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-* round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+ @par
+ Example code for Q31 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefQ31[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 256, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to Q31(Fixed point 1.31):
+ round(twiddleCoefQ31(i) * pow(2, 31))
+
+ */
const q31_t twiddleCoef_256_q31[384] = {
(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FF62182,
(q31_t)0x03242ABF, (q31_t)0x7FD8878D, (q31_t)0x0647D97C,
@@ -8884,23 +8870,23 @@
};
/**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 512 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-* round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+ @par
+ Example code for Q31 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefQ31[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 512, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to Q31(Fixed point 1.31):
+ round(twiddleCoefQ31(i) * pow(2, 31))
+
+ */
const q31_t twiddleCoef_512_q31[768] = {
(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFD885A,
(q31_t)0x01921D1F, (q31_t)0x7FF62182, (q31_t)0x03242ABF,
@@ -9161,23 +9147,23 @@
};
/**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 1024 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-* round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+ @par
+ Example code for Q31 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefQ31[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 1024, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to Q31(Fixed point 1.31):
+ round(twiddleCoefQ31(i) * pow(2, 31))
+
+ */
const q31_t twiddleCoef_1024_q31[1536] = {
(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFF6216,
(q31_t)0x00C90F88, (q31_t)0x7FFD885A, (q31_t)0x01921D1F,
@@ -9694,23 +9680,22 @@
};
/**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 2048 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-* round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+ @par
+ Example code for Q31 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefQ31[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 2048, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to Q31(Fixed point 1.31):
+ round(twiddleCoefQ31(i) * pow(2, 31))
+ */
const q31_t twiddleCoef_2048_q31[3072] = {
(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFFD885,
(q31_t)0x006487E3, (q31_t)0x7FFF6216, (q31_t)0x00C90F88,
@@ -10739,23 +10724,22 @@
};
/**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 4096 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-* round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+ @par
+ Example code for Q31 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefQ31[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 4096, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to Q31(Fixed point 1.31):
+ round(twiddleCoefQ31(i) * pow(2, 31))
+ */
const q31_t twiddleCoef_4096_q31[6144] =
{
(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFFF621,
@@ -12810,29 +12794,28 @@
-/*
-* @brief q15 Twiddle factors Table
+/**
+ @brief q15 Twiddle factors Table
*/
/**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 16 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-* round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+ @par
+ Example code for q15 Twiddle factors Generation::
+ @par
+ <pre>fori = 0; i< 3N/4; i++)
+ {
+ twiddleCoefq15[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 16, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to q15(Fixed point 1.15):
+ round(twiddleCoefq15(i) * pow(2, 15))
+ */
const q15_t twiddleCoef_16_q15[24] = {
(q15_t)0x7FFF, (q15_t)0x0000,
(q15_t)0x7641, (q15_t)0x30FB,
@@ -12849,23 +12832,22 @@
};
/**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 32 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-* round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+ @par
+ Example code for q15 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefq15[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 32, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to q15(Fixed point 1.15):
+ round(twiddleCoefq15(i) * pow(2, 15))
+ */
const q15_t twiddleCoef_32_q15[48] = {
(q15_t)0x7FFF, (q15_t)0x0000,
(q15_t)0x7D8A, (q15_t)0x18F8,
@@ -12894,23 +12876,22 @@
};
/**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 64 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-* round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+ @par
+ Example code for q15 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefq15[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 64, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to q15(Fixed point 1.15):
+ round(twiddleCoefq15(i) * pow(2, 15))
+ */
const q15_t twiddleCoef_64_q15[96] = {
(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7F62, (q15_t)0x0C8B,
(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7A7D, (q15_t)0x2528,
@@ -12939,23 +12920,22 @@
};
/**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 128 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-* round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+ @par
+ Example code for q15 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefq15[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 128, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to q15(Fixed point 1.15):
+ round(twiddleCoefq15(i) * pow(2, 15))
+ */
const q15_t twiddleCoef_128_q15[192] = {
(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FD8, (q15_t)0x0647,
(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7E9D, (q15_t)0x12C8,
@@ -13008,23 +12988,22 @@
};
/**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 256 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-* round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+ @par
+ Example code for q15 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefq15[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 256, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to q15(Fixed point 1.15):
+ round(twiddleCoefq15(i) * pow(2, 15))
+ */
const q15_t twiddleCoef_256_q15[384] = {
(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FF6, (q15_t)0x0324,
(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FA7, (q15_t)0x096A,
@@ -13125,23 +13104,22 @@
};
/**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 512 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-* round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+ @par
+ Example code for q15 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefq15[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 512, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to q15(Fixed point 1.15):
+ round(twiddleCoefq15(i) * pow(2, 15))
+ */
const q15_t twiddleCoef_512_q15[768] = {
(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFD, (q15_t)0x0192,
(q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FE9, (q15_t)0x04B6,
@@ -13338,23 +13316,23 @@
};
/**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 1024 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-* round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+ @par
+ Example code for q15 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefq15[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 1024, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to q15(Fixed point 1.15):
+ round(twiddleCoefq15(i) * pow(2, 15))
+
+ */
const q15_t twiddleCoef_1024_q15[1536] = {
(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x00C9,
(q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFA, (q15_t)0x025B,
@@ -13743,23 +13721,22 @@
};
/**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 2048 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-* round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+ @par
+ Example code for q15 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefq15[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 2048, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to q15(Fixed point 1.15):
+ round(twiddleCoefq15(i) * pow(2, 15))
+ */
const q15_t twiddleCoef_2048_q15[3072] = {
(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x0064,
(q15_t)0x7FFF, (q15_t)0x00C9, (q15_t)0x7FFE, (q15_t)0x012D,
@@ -14532,23 +14509,22 @@
};
/**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-* twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 4096 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-* round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+ @par
+ Example code for q15 Twiddle factors Generation::
+ @par
+ <pre>for (i = 0; i< 3N/4; i++)
+ {
+ twiddleCoefq15[2*i] = cos(i * 2*PI/(float)N);
+ twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+ } </pre>
+ @par
+ where N = 4096, PI = 3.14159265358979
+ @par
+ Cos and Sin values are interleaved fashion
+ @par
+ Convert Floating point to q15(Fixed point 1.15):
+ round(twiddleCoefq15(i) * pow(2, 15))
+ */
const q15_t twiddleCoef_4096_q15[6144] =
{
(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x0032,
@@ -16091,13 +16067,13 @@
/**
-* @} end of CFFT_CIFFT group
+ @} end of CFFT_CIFFT group
*/
-/*
-* @brief Q15 table for reciprocal
+/**
+ @brief Q15 table for reciprocal
*/
-const q15_t ALIGN4 armRecipTableQ15[64] = {
+const q15_t __ALIGNED(4) armRecipTableQ15[64] = {
0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0,
0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82,
0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484,
@@ -16111,8 +16087,8 @@
0x41CC, 0x4146, 0x40C2, 0x4040
};
-/*
-* @brief Q31 table for reciprocal
+/**
+ @brief Q31 table for reciprocal
*/
const q31_t armRecipTableQ31[64] = {
0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928,
@@ -17767,12 +17743,12 @@
};
/**
-* \par
-* Example code for Floating-point RFFT Twiddle factors Generation:
-* \par
-* <pre>TW = exp(2*pi*i*[0:L/2-1]/L - pi/2*i).' </pre>
-* \par
-* Real and Imag values are in interleaved fashion
+ @par
+ Example code for Floating-point RFFT Twiddle factors Generation:
+ @par
+ <pre>TW = exp(2*pi*i*[0:L/2-1]/L - pi/2*i).' </pre>
+ @par
+ Real and Imag values are in interleaved fashion
*/
const float32_t twiddleCoef_rfft_32[32] = {
0.000000000f, 1.000000000f,
@@ -21880,18 +21856,17 @@
/**
- * \par
- * Example code for the generation of the floating-point sine table:
- * <pre>
- * tableSize = 512;
- * for(n = 0; n < (tableSize + 1); n++)
- * {
- * sinTable[n]=sin(2*pi*n/tableSize);
- * }</pre>
- * \par
- * where pi value is 3.14159265358979
+ @par
+ Example code for the generation of the floating-point sine table:
+ <pre>
+ tableSize = 512;
+ for (n = 0; n < (tableSize + 1); n++)
+ {
+ sinTable[n] = sin(2*PI*n/tableSize);
+ }</pre>
+ @par
+ where PI value is 3.14159265358979
*/
-
const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1] = {
0.00000000f, 0.01227154f, 0.02454123f, 0.03680722f, 0.04906767f, 0.06132074f,
0.07356456f, 0.08579731f, 0.09801714f, 0.11022221f, 0.12241068f, 0.13458071f,
@@ -21990,22 +21965,22 @@
};
/**
- * \par
- * Table values are in Q31 (1.31 fixed-point format) and generation is done in
- * three steps. First, generate sin values in floating point:
- * <pre>
- * tableSize = 512;
- * for(n = 0; n < (tableSize + 1); n++)
- * {
- * sinTable[n]= sin(2*pi*n/tableSize);
- * } </pre>
- * where pi value is 3.14159265358979
- * \par
- * Second, convert floating-point to Q31 (Fixed point):
- * (sinTable[i] * pow(2, 31))
- * \par
- * Finally, round to the nearest integer value:
- * sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
+ @par
+ Table values are in Q31 (1.31 fixed-point format) and generation is done in
+ three steps. First, generate sin values in floating point:
+ <pre>
+ tableSize = 512;
+ for (n = 0; n < (tableSize + 1); n++)
+ {
+ sinTable[n] = sin(2*PI*n/tableSize);
+ } </pre>
+ where PI value is 3.14159265358979
+ @par
+ Second, convert floating-point to Q31 (Fixed point):
+ (sinTable[i] * pow(2, 31))
+ @par
+ Finally, round to the nearest integer value:
+ sinTable[i] += (sinTable[i] > 0 ? 0.5 : -0.5);
*/
const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1] = {
0L, 26352928L, 52701887L, 79042909L, 105372028L, 131685278L, 157978697L,
@@ -22102,22 +22077,22 @@
};
/**
- * \par
- * Table values are in Q15 (1.15 fixed-point format) and generation is done in
- * three steps. First, generate sin values in floating point:
- * <pre>
- * tableSize = 512;
- * for(n = 0; n < (tableSize + 1); n++)
- * {
- * sinTable[n]= sin(2*pi*n/tableSize);
- * } </pre>
- * where pi value is 3.14159265358979
- * \par
- * Second, convert floating-point to Q15 (Fixed point):
- * (sinTable[i] * pow(2, 15))
- * \par
- * Finally, round to the nearest integer value:
- * sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
+ @par
+ Table values are in Q15 (1.15 fixed-point format) and generation is done in
+ three steps. First, generate sin values in floating point:
+ <pre>
+ tableSize = 512;
+ for (n = 0; n < (tableSize + 1); n++)
+ {
+ sinTable[n] = sin(2*PI*n/tableSize);
+ } </pre>
+ where PI value is 3.14159265358979
+ @par
+ Second, convert floating-point to Q15 (Fixed point):
+ (sinTable[i] * pow(2, 15))
+ @par
+ Finally, round to the nearest integer value:
+ sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
*/
const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1] = {
0, 402, 804, 1206, 1608, 2009, 2411, 2811, 3212, 3612, 4011, 4410, 4808,
diff --git a/CMSIS/DSP/Source/CommonTables/arm_const_structs.c b/CMSIS/DSP/Source/CommonTables/arm_const_structs.c
index 4f41262..252b01c 100644
--- a/CMSIS/DSP/Source/CommonTables/arm_const_structs.c
+++ b/CMSIS/DSP/Source/CommonTables/arm_const_structs.c
@@ -4,13 +4,13 @@
* Description: Constant structs that are initialized for user convenience.
* For example, some can be given as arguments to the arm_cfft_f32() or arm_rfft_f32() functions.
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -31,162 +31,162 @@
/* Floating-point structs */
const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
- 16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH
+ 16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH
};
const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
- 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH
+ 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH
};
const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
- 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH
+ 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH
};
const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
- 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
+ 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
};
const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {
- 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
+ 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
};
const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
- 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
+ 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
};
const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
- 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH
+ 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH
};
const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
- 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH
+ 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH
};
const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
- 4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE_4096_TABLE_LENGTH
+ 4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE_4096_TABLE_LENGTH
};
/* Fixed-point structs */
const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = {
- 16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
+ 16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
};
const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = {
- 32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
+ 32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
};
const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = {
- 64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
+ 64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
};
const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = {
- 128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
+ 128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
};
const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = {
- 256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
+ 256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
};
const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = {
- 512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
+ 512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
};
const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = {
- 1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
+ 1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
};
const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048 = {
- 2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
+ 2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
};
const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = {
- 4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
+ 4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
};
const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = {
- 16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
+ 16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
};
const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = {
- 32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
+ 32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
};
const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = {
- 64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
+ 64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
};
const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = {
- 128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
+ 128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
};
const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = {
- 256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
+ 256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
};
const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = {
- 512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
+ 512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
};
const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = {
- 1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
+ 1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
};
const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = {
- 2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
+ 2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
};
const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = {
- 4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
+ 4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
};
/* Structure for real-value inputs */
/* Floating-point structs */
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len32 = {
- { 16, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_16_TABLE_LENGTH },
- 32U,
- (float32_t *)twiddleCoef_rfft_32
+ { 16, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_16_TABLE_LENGTH },
+ 32U,
+ (float32_t *)twiddleCoef_rfft_32
};
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len64 = {
- { 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH },
- 64U,
- (float32_t *)twiddleCoef_rfft_64
+ { 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH },
+ 64U,
+ (float32_t *)twiddleCoef_rfft_64
};
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len128 = {
- { 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH },
- 128U,
- (float32_t *)twiddleCoef_rfft_128
+ { 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH },
+ 128U,
+ (float32_t *)twiddleCoef_rfft_128
};
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len256 = {
- { 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH },
- 256U,
- (float32_t *)twiddleCoef_rfft_256
+ { 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH },
+ 256U,
+ (float32_t *)twiddleCoef_rfft_256
};
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len512 = {
- { 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH },
- 512U,
- (float32_t *)twiddleCoef_rfft_512
+ { 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH },
+ 512U,
+ (float32_t *)twiddleCoef_rfft_512
};
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len1024 = {
- { 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH },
- 1024U,
- (float32_t *)twiddleCoef_rfft_1024
+ { 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH },
+ 1024U,
+ (float32_t *)twiddleCoef_rfft_1024
};
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len2048 = {
- { 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH },
- 2048U,
- (float32_t *)twiddleCoef_rfft_2048
+ { 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH },
+ 2048U,
+ (float32_t *)twiddleCoef_rfft_2048
};
const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len4096 = {
- { 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH },
- 4096U,
- (float32_t *)twiddleCoef_rfft_4096
+ { 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH },
+ 4096U,
+ (float32_t *)twiddleCoef_rfft_4096
};
/* Fixed-point structs */
@@ -195,93 +195,93 @@
extern const q31_t realCoefBQ31[8192];
const arm_rfft_instance_q31 arm_rfft_sR_q31_len32 = {
- 32U,
- 0,
- 1,
- 256U,
- (q31_t*)realCoefAQ31,
- (q31_t*)realCoefBQ31,
- &arm_cfft_sR_q31_len16
+ 32U,
+ 0,
+ 1,
+ 256U,
+ (q31_t*)realCoefAQ31,
+ (q31_t*)realCoefBQ31,
+ &arm_cfft_sR_q31_len16
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len64 = {
- 64U,
- 0,
- 1,
- 128U,
- (q31_t*)realCoefAQ31,
- (q31_t*)realCoefBQ31,
- &arm_cfft_sR_q31_len32
+ 64U,
+ 0,
+ 1,
+ 128U,
+ (q31_t*)realCoefAQ31,
+ (q31_t*)realCoefBQ31,
+ &arm_cfft_sR_q31_len32
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len128 = {
- 128U,
- 0,
- 1,
- 64U,
- (q31_t*)realCoefAQ31,
- (q31_t*)realCoefBQ31,
- &arm_cfft_sR_q31_len64
+ 128U,
+ 0,
+ 1,
+ 64U,
+ (q31_t*)realCoefAQ31,
+ (q31_t*)realCoefBQ31,
+ &arm_cfft_sR_q31_len64
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len256 = {
- 256U,
- 0,
- 1,
- 32U,
- (q31_t*)realCoefAQ31,
- (q31_t*)realCoefBQ31,
- &arm_cfft_sR_q31_len128
+ 256U,
+ 0,
+ 1,
+ 32U,
+ (q31_t*)realCoefAQ31,
+ (q31_t*)realCoefBQ31,
+ &arm_cfft_sR_q31_len128
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len512 = {
- 512U,
- 0,
- 1,
- 16U,
- (q31_t*)realCoefAQ31,
- (q31_t*)realCoefBQ31,
- &arm_cfft_sR_q31_len256
+ 512U,
+ 0,
+ 1,
+ 16U,
+ (q31_t*)realCoefAQ31,
+ (q31_t*)realCoefBQ31,
+ &arm_cfft_sR_q31_len256
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len1024 = {
- 1024U,
- 0,
- 1,
- 8U,
- (q31_t*)realCoefAQ31,
- (q31_t*)realCoefBQ31,
- &arm_cfft_sR_q31_len512
+ 1024U,
+ 0,
+ 1,
+ 8U,
+ (q31_t*)realCoefAQ31,
+ (q31_t*)realCoefBQ31,
+ &arm_cfft_sR_q31_len512
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len2048 = {
- 2048U,
- 0,
- 1,
- 4U,
- (q31_t*)realCoefAQ31,
- (q31_t*)realCoefBQ31,
- &arm_cfft_sR_q31_len1024
+ 2048U,
+ 0,
+ 1,
+ 4U,
+ (q31_t*)realCoefAQ31,
+ (q31_t*)realCoefBQ31,
+ &arm_cfft_sR_q31_len1024
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len4096 = {
- 4096U,
- 0,
- 1,
- 2U,
- (q31_t*)realCoefAQ31,
- (q31_t*)realCoefBQ31,
- &arm_cfft_sR_q31_len2048
+ 4096U,
+ 0,
+ 1,
+ 2U,
+ (q31_t*)realCoefAQ31,
+ (q31_t*)realCoefBQ31,
+ &arm_cfft_sR_q31_len2048
};
const arm_rfft_instance_q31 arm_rfft_sR_q31_len8192 = {
- 8192U,
- 0,
- 1,
- 1U,
- (q31_t*)realCoefAQ31,
- (q31_t*)realCoefBQ31,
- &arm_cfft_sR_q31_len4096
+ 8192U,
+ 0,
+ 1,
+ 1U,
+ (q31_t*)realCoefAQ31,
+ (q31_t*)realCoefBQ31,
+ &arm_cfft_sR_q31_len4096
};
/* q15_t */
@@ -289,91 +289,91 @@
extern const q15_t realCoefBQ15[8192];
const arm_rfft_instance_q15 arm_rfft_sR_q15_len32 = {
- 32U,
- 0,
- 1,
- 256U,
- (q15_t*)realCoefAQ15,
- (q15_t*)realCoefBQ15,
- &arm_cfft_sR_q15_len16
+ 32U,
+ 0,
+ 1,
+ 256U,
+ (q15_t*)realCoefAQ15,
+ (q15_t*)realCoefBQ15,
+ &arm_cfft_sR_q15_len16
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len64 = {
- 64U,
- 0,
- 1,
- 128U,
- (q15_t*)realCoefAQ15,
- (q15_t*)realCoefBQ15,
- &arm_cfft_sR_q15_len32
+ 64U,
+ 0,
+ 1,
+ 128U,
+ (q15_t*)realCoefAQ15,
+ (q15_t*)realCoefBQ15,
+ &arm_cfft_sR_q15_len32
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len128 = {
- 128U,
- 0,
- 1,
- 64U,
- (q15_t*)realCoefAQ15,
- (q15_t*)realCoefBQ15,
- &arm_cfft_sR_q15_len64
+ 128U,
+ 0,
+ 1,
+ 64U,
+ (q15_t*)realCoefAQ15,
+ (q15_t*)realCoefBQ15,
+ &arm_cfft_sR_q15_len64
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len256 = {
- 256U,
- 0,
- 1,
- 32U,
- (q15_t*)realCoefAQ15,
- (q15_t*)realCoefBQ15,
- &arm_cfft_sR_q15_len128
+ 256U,
+ 0,
+ 1,
+ 32U,
+ (q15_t*)realCoefAQ15,
+ (q15_t*)realCoefBQ15,
+ &arm_cfft_sR_q15_len128
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len512 = {
- 512U,
- 0,
- 1,
- 16U,
- (q15_t*)realCoefAQ15,
- (q15_t*)realCoefBQ15,
- &arm_cfft_sR_q15_len256
+ 512U,
+ 0,
+ 1,
+ 16U,
+ (q15_t*)realCoefAQ15,
+ (q15_t*)realCoefBQ15,
+ &arm_cfft_sR_q15_len256
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len1024 = {
- 1024U,
- 0,
- 1,
- 8U,
- (q15_t*)realCoefAQ15,
- (q15_t*)realCoefBQ15,
- &arm_cfft_sR_q15_len512
+ 1024U,
+ 0,
+ 1,
+ 8U,
+ (q15_t*)realCoefAQ15,
+ (q15_t*)realCoefBQ15,
+ &arm_cfft_sR_q15_len512
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len2048 = {
- 2048U,
- 0,
- 1,
- 4U,
- (q15_t*)realCoefAQ15,
- (q15_t*)realCoefBQ15,
- &arm_cfft_sR_q15_len1024
+ 2048U,
+ 0,
+ 1,
+ 4U,
+ (q15_t*)realCoefAQ15,
+ (q15_t*)realCoefBQ15,
+ &arm_cfft_sR_q15_len1024
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len4096 = {
- 4096U,
- 0,
- 1,
- 2U,
- (q15_t*)realCoefAQ15,
- (q15_t*)realCoefBQ15,
- &arm_cfft_sR_q15_len2048
+ 4096U,
+ 0,
+ 1,
+ 2U,
+ (q15_t*)realCoefAQ15,
+ (q15_t*)realCoefBQ15,
+ &arm_cfft_sR_q15_len2048
};
const arm_rfft_instance_q15 arm_rfft_sR_q15_len8192 = {
- 8192U,
- 0,
- 1,
- 1U,
- (q15_t*)realCoefAQ15,
- (q15_t*)realCoefBQ15,
- &arm_cfft_sR_q15_len4096
+ 8192U,
+ 0,
+ 1,
+ 1U,
+ (q15_t*)realCoefAQ15,
+ (q15_t*)realCoefBQ15,
+ &arm_cfft_sR_q15_len4096
};
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c b/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c
new file mode 100644
index 0000000..8572560
--- /dev/null
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c
@@ -0,0 +1,19 @@
+
+#include "arm_cmplx_conj_f32.c"
+#include "arm_cmplx_conj_q15.c"
+#include "arm_cmplx_conj_q31.c"
+#include "arm_cmplx_dot_prod_f32.c"
+#include "arm_cmplx_dot_prod_q15.c"
+#include "arm_cmplx_dot_prod_q31.c"
+#include "arm_cmplx_mag_f32.c"
+#include "arm_cmplx_mag_q15.c"
+#include "arm_cmplx_mag_q31.c"
+#include "arm_cmplx_mag_squared_f32.c"
+#include "arm_cmplx_mag_squared_q15.c"
+#include "arm_cmplx_mag_squared_q31.c"
+#include "arm_cmplx_mult_cmplx_f32.c"
+#include "arm_cmplx_mult_cmplx_q15.c"
+#include "arm_cmplx_mult_cmplx_q31.c"
+#include "arm_cmplx_mult_real_f32.c"
+#include "arm_cmplx_mult_real_q15.c"
+#include "arm_cmplx_mult_real_q31.c"
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
index cfb6f1f..71f30fd 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_conj_f32.c
* Description: Floating-point complex conjugate
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,143 +29,102 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @defgroup cmplx_conj Complex Conjugate
- *
- * Conjugates the elements of a complex data vector.
- *
- * The <code>pSrc</code> points to the source data and
- * <code>pDst</code> points to the where the result should be written.
- * <code>numSamples</code> specifies the number of complex samples
- * and the data in each array is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * Each array has a total of <code>2*numSamples</code> values.
- * The underlying algorithm is used:
- *
- * <pre>
- * for(n=0; n<numSamples; n++) {
- * pDst[(2*n)+0)] = pSrc[(2*n)+0]; // real part
- * pDst[(2*n)+1)] = -pSrc[(2*n)+1]; // imag part
- * }
- * </pre>
- *
- * There are separate functions for floating-point, Q15, and Q31 data types.
+ @defgroup cmplx_conj Complex Conjugate
+
+ Conjugates the elements of a complex data vector.
+
+ The <code>pSrc</code> points to the source data and
+ <code>pDst</code> points to the destination data where the result should be written.
+ <code>numSamples</code> specifies the number of complex samples
+ and the data in each array is stored in an interleaved fashion
+ (real, imag, real, imag, ...).
+ Each array has a total of <code>2*numSamples</code> values.
+
+ The underlying algorithm is used:
+ <pre>
+ for (n = 0; n < numSamples; n++) {
+ pDst[(2*n) ] = pSrc[(2*n) ]; // real part
+ pDst[(2*n)+1] = -pSrc[(2*n)+1]; // imag part
+ }
+ </pre>
+
+ There are separate functions for floating-point, Q15, and Q31 data types.
*/
/**
- * @addtogroup cmplx_conj
- * @{
+ @addtogroup cmplx_conj
+ @{
*/
/**
- * @brief Floating-point complex conjugate.
- * @param *pSrc points to the input vector
- * @param *pDst points to the output vector
- * @param numSamples number of complex samples in each vector
- * @return none.
+ @brief Floating-point complex conjugate.
+ @param[in] pSrc points to the input vector
+ @param[out] pDst points to the output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
*/
void arm_cmplx_conj_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t numSamples)
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t numSamples)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t inR1, inR2, inR3, inR4;
- float32_t inI1, inI2, inI3, inI4;
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
- /* Calculate Complex Conjugate and then store the results in the destination buffer. */
- /* read real input samples */
- inR1 = pSrc[0];
- /* store real samples to destination */
- pDst[0] = inR1;
- inR2 = pSrc[2];
- pDst[2] = inR2;
- inR3 = pSrc[4];
- pDst[4] = inR3;
- inR4 = pSrc[6];
- pDst[6] = inR4;
+ /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
- /* read imaginary input samples */
- inI1 = pSrc[1];
- inI2 = pSrc[3];
+ /* Calculate Complex Conjugate and store result in destination buffer. */
+ *pDst++ = *pSrc++;
+ *pDst++ = -*pSrc++;
- /* conjugate input */
- inI1 = -inI1;
+ *pDst++ = *pSrc++;
+ *pDst++ = -*pSrc++;
- /* read imaginary input samples */
- inI3 = pSrc[5];
+ *pDst++ = *pSrc++;
+ *pDst++ = -*pSrc++;
- /* conjugate input */
- inI2 = -inI2;
+ *pDst++ = *pSrc++;
+ *pDst++ = -*pSrc++;
- /* read imaginary input samples */
- inI4 = pSrc[7];
-
- /* conjugate input */
- inI3 = -inI3;
-
- /* store imaginary samples to destination */
- pDst[1] = inI1;
- pDst[3] = inI2;
-
- /* conjugate input */
- inI4 = -inI4;
-
- /* store imaginary samples to destination */
- pDst[5] = inI3;
-
- /* increment source pointer by 8 to process next sampels */
- pSrc += 8U;
-
- /* store imaginary sample to destination */
- pDst[7] = inI4;
-
- /* increment destination pointer by 8 to store next samples */
- pDst += 8U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
blkCnt = numSamples;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
- /* realOut + j (imagOut) = realIn + j (-1) imagIn */
- /* Calculate Complex Conjugate and then store the results in the destination buffer. */
- *pDst++ = *pSrc++;
+ /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+ /* Calculate Complex Conjugate and store result in destination buffer. */
+ *pDst++ = *pSrc++;
*pDst++ = -*pSrc++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of cmplx_conj group
+ @} end of cmplx_conj group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
index 7950229..c91c1f5 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_conj_q15.c
* Description: Q15 complex conjugate
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,68 +29,66 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @addtogroup cmplx_conj
- * @{
+ @addtogroup cmplx_conj
+ @{
*/
/**
- * @brief Q15 complex conjugate.
- * @param *pSrc points to the input vector
- * @param *pDst points to the output vector
- * @param numSamples number of complex samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
+ @brief Q15 complex conjugate.
+ @param[in] pSrc points to the input vector
+ @param[out] pDst points to the output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0x7FFF.
*/
void arm_cmplx_conj_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t numSamples)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t numSamples)
{
+ uint32_t blkCnt; /* Loop counter */
+ q31_t in1; /* Temporary input variable */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+ q31_t in2, in3, in4; /* Temporary input variables */
+#endif
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- uint32_t blkCnt; /* loop counter */
- q31_t in1, in2, in3, in4;
- q31_t zero = 0;
- /*loop Unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
- /* Calculate Complex Conjugate and then store the results in the destination buffer. */
- in1 = *__SIMD32(pSrc)++;
- in2 = *__SIMD32(pSrc)++;
- in3 = *__SIMD32(pSrc)++;
- in4 = *__SIMD32(pSrc)++;
+ /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+ /* Calculate Complex Conjugate and store result in destination buffer. */
+
+ #if defined (ARM_MATH_DSP)
+ in1 = read_q15x2_ia ((q15_t **) &pSrc);
+ in2 = read_q15x2_ia ((q15_t **) &pSrc);
+ in3 = read_q15x2_ia ((q15_t **) &pSrc);
+ in4 = read_q15x2_ia ((q15_t **) &pSrc);
#ifndef ARM_MATH_BIG_ENDIAN
-
- in1 = __QASX(zero, in1);
- in2 = __QASX(zero, in2);
- in3 = __QASX(zero, in3);
- in4 = __QASX(zero, in4);
-
+ in1 = __QASX(0, in1);
+ in2 = __QASX(0, in2);
+ in3 = __QASX(0, in3);
+ in4 = __QASX(0, in4);
#else
-
- in1 = __QSAX(zero, in1);
- in2 = __QSAX(zero, in2);
- in3 = __QSAX(zero, in3);
- in4 = __QSAX(zero, in4);
-
+ in1 = __QSAX(0, in1);
+ in2 = __QSAX(0, in2);
+ in3 = __QSAX(0, in3);
+ in4 = __QSAX(0, in4);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
in1 = ((uint32_t) in1 >> 16) | ((uint32_t) in1 << 16);
@@ -98,52 +96,62 @@
in3 = ((uint32_t) in3 >> 16) | ((uint32_t) in3 << 16);
in4 = ((uint32_t) in4 >> 16) | ((uint32_t) in4 << 16);
- *__SIMD32(pDst)++ = in1;
- *__SIMD32(pDst)++ = in2;
- *__SIMD32(pDst)++ = in3;
- *__SIMD32(pDst)++ = in4;
+ write_q15x2_ia (&pDst, in1);
+ write_q15x2_ia (&pDst, in2);
+ write_q15x2_ia (&pDst, in3);
+ write_q15x2_ia (&pDst, in4);
+#else
+ *pDst++ = *pSrc++;
+ in1 = *pSrc++;
+ *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
- /* Decrement the loop counter */
+ *pDst++ = *pSrc++;
+ in1 = *pSrc++;
+ *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+
+ *pDst++ = *pSrc++;
+ in1 = *pSrc++;
+ *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+
+ *pDst++ = *pSrc++;
+ in1 = *pSrc++;
+ *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
- while (blkCnt > 0U)
- {
- /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
- /* Calculate Complex Conjugate and then store the results in the destination buffer. */
- *pDst++ = *pSrc++;
- *pDst++ = __SSAT(-*pSrc++, 16);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- q15_t in;
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numSamples;
- /* Run the below code for Cortex-M0 */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
- while (numSamples > 0U)
+ while (blkCnt > 0U)
{
- /* realOut + j (imagOut) = realIn+ j (-1) imagIn */
- /* Calculate Complex Conjugate and then store the results in the destination buffer. */
- *pDst++ = *pSrc++;
- in = *pSrc++;
- *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
+ /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
- /* Decrement the loop counter */
- numSamples--;
+ /* Calculate Complex Conjugate and store result in destination buffer. */
+ *pDst++ = *pSrc++;
+ in1 = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __SSAT(-in1, 16);
+#else
+ *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+#endif
+
+ /* Decrement loop counter */
+ blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of cmplx_conj group
+ @} end of cmplx_conj group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
index 709ce0e..19dca62 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_conj_q31.c
* Description: Q31 complex conjugate
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,141 +29,109 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @addtogroup cmplx_conj
- * @{
+ @addtogroup cmplx_conj
+ @{
*/
/**
- * @brief Q31 complex conjugate.
- * @param *pSrc points to the input vector
- * @param *pDst points to the output vector
- * @param numSamples number of complex samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
+ @brief Q31 complex conjugate.
+ @param[in] pSrc points to the input vector
+ @param[out] pDst points to the output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive value 0x7FFFFFFF.
*/
void arm_cmplx_conj_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t numSamples)
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t numSamples)
{
- uint32_t blkCnt; /* loop counter */
- q31_t in; /* Input value */
+ uint32_t blkCnt; /* Loop counter */
+ q31_t in; /* Temporary input variable */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inR1, inR2, inR3, inR4; /* Temporary real variables */
- q31_t inI1, inI2, inI3, inI4; /* Temporary imaginary variables */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
- /* Calculate Complex Conjugate and then store the results in the destination buffer. */
- /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
- /* read real input sample */
- inR1 = pSrc[0];
- /* store real input sample */
- pDst[0] = inR1;
+ /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
- /* read imaginary input sample */
- inI1 = pSrc[1];
+ /* Calculate Complex Conjugate and store result in destination buffer. */
+ *pDst++ = *pSrc++;
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QSUB(0, in);
+#else
+ *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
- /* read real input sample */
- inR2 = pSrc[2];
- /* store real input sample */
- pDst[2] = inR2;
+ *pDst++ = *pSrc++;
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QSUB(0, in);
+#else
+ *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
- /* read imaginary input sample */
- inI2 = pSrc[3];
+ *pDst++ = *pSrc++;
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QSUB(0, in);
+#else
+ *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
- /* negate imaginary input sample */
- inI1 = __QSUB(0, inI1);
+ *pDst++ = *pSrc++;
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QSUB(0, in);
+#else
+ *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
- /* read real input sample */
- inR3 = pSrc[4];
- /* store real input sample */
- pDst[4] = inR3;
-
- /* read imaginary input sample */
- inI3 = pSrc[5];
-
- /* negate imaginary input sample */
- inI2 = __QSUB(0, inI2);
-
- /* read real input sample */
- inR4 = pSrc[6];
- /* store real input sample */
- pDst[6] = inR4;
-
- /* negate imaginary input sample */
- inI3 = __QSUB(0, inI3);
-
- /* store imaginary input sample */
- inI4 = pSrc[7];
-
- /* store imaginary input samples */
- pDst[1] = inI1;
-
- /* negate imaginary input sample */
- inI4 = __QSUB(0, inI4);
-
- /* store imaginary input samples */
- pDst[3] = inI2;
-
- /* increment source pointer by 8 to proecess next samples */
- pSrc += 8U;
-
- /* store imaginary input samples */
- pDst[5] = inI3;
- pDst[7] = inI4;
-
- /* increment destination pointer by 8 to process next samples */
- pDst += 8U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
- /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
- /* Calculate Complex Conjugate and then store the results in the destination buffer. */
- /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
- *pDst++ = *pSrc++;
- in = *pSrc++;
- *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+ /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
- /* Decrement the loop counter */
+ /* Calculate Complex Conjugate and store result in destination buffer. */
+ *pDst++ = *pSrc++;
+ in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+ *pDst++ = __QSUB(0, in);
+#else
+ *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of cmplx_conj group
+ @} end of cmplx_conj group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
index bfc352b..340a7aa 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_dot_prod_f32.c
* Description: Floating-point complex dot product
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,163 +29,144 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @defgroup cmplx_dot_prod Complex Dot Product
- *
- * Computes the dot product of two complex vectors.
- * The vectors are multiplied element-by-element and then summed.
- *
- * The <code>pSrcA</code> points to the first complex input vector and
- * <code>pSrcB</code> points to the second complex input vector.
- * <code>numSamples</code> specifies the number of complex samples
- * and the data in each array is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * Each array has a total of <code>2*numSamples</code> values.
- *
- * The underlying algorithm is used:
- * <pre>
- * realResult=0;
- * imagResult=0;
- * for(n=0; n<numSamples; n++) {
- * realResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+0] - pSrcA[(2*n)+1]*pSrcB[(2*n)+1];
- * imagResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+1] + pSrcA[(2*n)+1]*pSrcB[(2*n)+0];
- * }
- * </pre>
- *
- * There are separate functions for floating-point, Q15, and Q31 data types.
+ @defgroup cmplx_dot_prod Complex Dot Product
+
+ Computes the dot product of two complex vectors.
+ The vectors are multiplied element-by-element and then summed.
+
+ The <code>pSrcA</code> points to the first complex input vector and
+ <code>pSrcB</code> points to the second complex input vector.
+ <code>numSamples</code> specifies the number of complex samples
+ and the data in each array is stored in an interleaved fashion
+ (real, imag, real, imag, ...).
+ Each array has a total of <code>2*numSamples</code> values.
+
+ The underlying algorithm is used:
+
+ <pre>
+ realResult = 0;
+ imagResult = 0;
+ for (n = 0; n < numSamples; n++) {
+ realResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
+ imagResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
+ }
+ </pre>
+
+ There are separate functions for floating-point, Q15, and Q31 data types.
*/
/**
- * @addtogroup cmplx_dot_prod
- * @{
+ @addtogroup cmplx_dot_prod
+ @{
*/
/**
- * @brief Floating-point complex dot product
- * @param *pSrcA points to the first input vector
- * @param *pSrcB points to the second input vector
- * @param numSamples number of complex samples in each vector
- * @param *realResult real part of the result returned here
- * @param *imagResult imaginary part of the result returned here
- * @return none.
+ @brief Floating-point complex dot product.
+ @param[in] pSrcA points to the first input vector
+ @param[in] pSrcB points to the second input vector
+ @param[in] numSamples number of samples in each vector
+ @param[out] realResult real part of the result returned here
+ @param[out] imagResult imaginary part of the result returned here
+ @return none
*/
void arm_cmplx_dot_prod_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- uint32_t numSamples,
- float32_t * realResult,
- float32_t * imagResult)
+ const float32_t * pSrcA,
+ const float32_t * pSrcB,
+ uint32_t numSamples,
+ float32_t * realResult,
+ float32_t * imagResult)
{
- float32_t real_sum = 0.0f, imag_sum = 0.0f; /* Temporary result storage */
- float32_t a0,b0,c0,d0;
+ uint32_t blkCnt; /* Loop counter */
+ float32_t real_sum = 0.0f, imag_sum = 0.0f; /* Temporary result variables */
+ float32_t a0,b0,c0,d0;
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- uint32_t blkCnt; /* loop counter */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += a0 * c0;
- imag_sum += a0 * d0;
- real_sum -= b0 * d0;
- imag_sum += b0 * c0;
+ real_sum += a0 * c0;
+ imag_sum += a0 * d0;
+ real_sum -= b0 * d0;
+ imag_sum += b0 * c0;
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += a0 * c0;
- imag_sum += a0 * d0;
- real_sum -= b0 * d0;
- imag_sum += b0 * c0;
+ real_sum += a0 * c0;
+ imag_sum += a0 * d0;
+ real_sum -= b0 * d0;
+ imag_sum += b0 * c0;
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += a0 * c0;
- imag_sum += a0 * d0;
- real_sum -= b0 * d0;
- imag_sum += b0 * c0;
+ real_sum += a0 * c0;
+ imag_sum += a0 * d0;
+ real_sum -= b0 * d0;
+ imag_sum += b0 * c0;
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += a0 * c0;
- imag_sum += a0 * d0;
- real_sum -= b0 * d0;
- imag_sum += b0 * c0;
+ real_sum += a0 * c0;
+ imag_sum += a0 * d0;
+ real_sum -= b0 * d0;
+ imag_sum += b0 * c0;
- /* Decrement the loop counter */
- blkCnt--;
+ /* Decrement loop counter */
+ blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = numSamples & 0x3U;
-
- while (blkCnt > 0U)
- {
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
-
- real_sum += a0 * c0;
- imag_sum += a0 * d0;
- real_sum -= b0 * d0;
- imag_sum += b0 * c0;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = numSamples % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numSamples;
- while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
{
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += a0 * c0;
- imag_sum += a0 * d0;
- real_sum -= b0 * d0;
- imag_sum += b0 * c0;
+ real_sum += a0 * c0;
+ imag_sum += a0 * d0;
+ real_sum -= b0 * d0;
+ imag_sum += b0 * c0;
- /* Decrement the loop counter */
- numSamples--;
+ /* Decrement loop counter */
+ blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
- /* Store the real and imaginary results in the destination buffers */
+ /* Store real and imaginary result in destination buffer. */
*realResult = real_sum;
*imagResult = imag_sum;
}
/**
- * @} end of cmplx_dot_prod group
+ @} end of cmplx_dot_prod group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
index 9e23a01..0b15c2f 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_dot_prod_q15.c
* Description: Processing function for the Q15 Complex Dot product
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,143 +29,120 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @addtogroup cmplx_dot_prod
- * @{
+ @addtogroup cmplx_dot_prod
+ @{
*/
/**
- * @brief Q15 complex dot product
- * @param *pSrcA points to the first input vector
- * @param *pSrcB points to the second input vector
- * @param numSamples number of complex samples in each vector
- * @param *realResult real part of the result returned here
- * @param *imagResult imaginary part of the result returned here
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.
- * These are accumulated in a 64-bit accumulator with 34.30 precision.
- * As a final step, the accumulators are converted to 8.24 format.
- * The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format.
+ @brief Q15 complex dot product.
+ @param[in] pSrcA points to the first input vector
+ @param[in] pSrcB points to the second input vector
+ @param[in] numSamples number of samples in each vector
+ @param[out] realResult real part of the result returned here
+ @param[out] imagResult imaginary part of the result returned her
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.
+ These are accumulated in a 64-bit accumulator with 34.30 precision.
+ As a final step, the accumulators are converted to 8.24 format.
+ The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format.
*/
void arm_cmplx_dot_prod_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- uint32_t numSamples,
- q31_t * realResult,
- q31_t * imagResult)
+ const q15_t * pSrcA,
+ const q15_t * pSrcB,
+ uint32_t numSamples,
+ q31_t * realResult,
+ q31_t * imagResult)
{
- q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */
- q15_t a0,b0,c0,d0;
+ uint32_t blkCnt; /* Loop counter */
+ q63_t real_sum = 0, imag_sum = 0; /* Temporary result variables */
+ q15_t a0,b0,c0,d0;
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- uint32_t blkCnt; /* loop counter */
-
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += (q31_t)a0 * c0;
- imag_sum += (q31_t)a0 * d0;
- real_sum -= (q31_t)b0 * d0;
- imag_sum += (q31_t)b0 * c0;
+ real_sum += (q31_t)a0 * c0;
+ imag_sum += (q31_t)a0 * d0;
+ real_sum -= (q31_t)b0 * d0;
+ imag_sum += (q31_t)b0 * c0;
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += (q31_t)a0 * c0;
- imag_sum += (q31_t)a0 * d0;
- real_sum -= (q31_t)b0 * d0;
- imag_sum += (q31_t)b0 * c0;
+ real_sum += (q31_t)a0 * c0;
+ imag_sum += (q31_t)a0 * d0;
+ real_sum -= (q31_t)b0 * d0;
+ imag_sum += (q31_t)b0 * c0;
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += (q31_t)a0 * c0;
- imag_sum += (q31_t)a0 * d0;
- real_sum -= (q31_t)b0 * d0;
- imag_sum += (q31_t)b0 * c0;
+ real_sum += (q31_t)a0 * c0;
+ imag_sum += (q31_t)a0 * d0;
+ real_sum -= (q31_t)b0 * d0;
+ imag_sum += (q31_t)b0 * c0;
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += (q31_t)a0 * c0;
- imag_sum += (q31_t)a0 * d0;
- real_sum -= (q31_t)b0 * d0;
- imag_sum += (q31_t)b0 * c0;
+ real_sum += (q31_t)a0 * c0;
+ imag_sum += (q31_t)a0 * d0;
+ real_sum -= (q31_t)b0 * d0;
+ imag_sum += (q31_t)b0 * c0;
- /* Decrement the loop counter */
- blkCnt--;
+ /* Decrement loop counter */
+ blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
- while (blkCnt > 0U)
- {
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
-
- real_sum += (q31_t)a0 * c0;
- imag_sum += (q31_t)a0 * d0;
- real_sum -= (q31_t)b0 * d0;
- imag_sum += (q31_t)b0 * c0;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numSamples;
- while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
{
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += a0 * c0;
- imag_sum += a0 * d0;
- real_sum -= b0 * d0;
- imag_sum += b0 * c0;
+ real_sum += (q31_t)a0 * c0;
+ imag_sum += (q31_t)a0 * d0;
+ real_sum -= (q31_t)b0 * d0;
+ imag_sum += (q31_t)b0 * c0;
-
- /* Decrement the loop counter */
- numSamples--;
+ /* Decrement loop counter */
+ blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
- /* Store the real and imaginary results in 8.24 format */
+ /* Store real and imaginary result in 8.24 format */
/* Convert real data in 34.30 to 8.24 by 6 right shifts */
*realResult = (q31_t) (real_sum >> 6);
/* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
@@ -173,5 +150,5 @@
}
/**
- * @} end of cmplx_dot_prod group
+ @} end of cmplx_dot_prod group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
index 6eb5b6e..4180788 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_dot_prod_q31.c
* Description: Q31 complex dot product
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,147 +29,125 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @addtogroup cmplx_dot_prod
- * @{
+ @addtogroup cmplx_dot_prod
+ @{
*/
/**
- * @brief Q31 complex dot product
- * @param *pSrcA points to the first input vector
- * @param *pSrcB points to the second input vector
- * @param numSamples number of complex samples in each vector
- * @param *realResult real part of the result returned here
- * @param *imagResult imaginary part of the result returned here
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.
- * The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.
- * Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768.
- * The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format.
- * Input down scaling is not required.
+ @brief Q31 complex dot product.
+ @param[in] pSrcA points to the first input vector
+ @param[in] pSrcB points to the second input vector
+ @param[in] numSamples number of samples in each vector
+ @param[out] realResult real part of the result returned here
+ @param[out] imagResult imaginary part of the result returned here
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.
+ The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.
+ Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768.
+ The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format.
+ Input down scaling is not required.
*/
void arm_cmplx_dot_prod_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- uint32_t numSamples,
- q63_t * realResult,
- q63_t * imagResult)
+ const q31_t * pSrcA,
+ const q31_t * pSrcB,
+ uint32_t numSamples,
+ q63_t * realResult,
+ q63_t * imagResult)
{
- q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */
- q31_t a0,b0,c0,d0;
+ uint32_t blkCnt; /* Loop counter */
+ q63_t real_sum = 0, imag_sum = 0; /* Temporary result variables */
+ q31_t a0,b0,c0,d0;
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- uint32_t blkCnt; /* loop counter */
-
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += ((q63_t)a0 * c0) >> 14;
- imag_sum += ((q63_t)a0 * d0) >> 14;
- real_sum -= ((q63_t)b0 * d0) >> 14;
- imag_sum += ((q63_t)b0 * c0) >> 14;
+ real_sum += ((q63_t)a0 * c0) >> 14;
+ imag_sum += ((q63_t)a0 * d0) >> 14;
+ real_sum -= ((q63_t)b0 * d0) >> 14;
+ imag_sum += ((q63_t)b0 * c0) >> 14;
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += ((q63_t)a0 * c0) >> 14;
- imag_sum += ((q63_t)a0 * d0) >> 14;
- real_sum -= ((q63_t)b0 * d0) >> 14;
- imag_sum += ((q63_t)b0 * c0) >> 14;
+ real_sum += ((q63_t)a0 * c0) >> 14;
+ imag_sum += ((q63_t)a0 * d0) >> 14;
+ real_sum -= ((q63_t)b0 * d0) >> 14;
+ imag_sum += ((q63_t)b0 * c0) >> 14;
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += ((q63_t)a0 * c0) >> 14;
- imag_sum += ((q63_t)a0 * d0) >> 14;
- real_sum -= ((q63_t)b0 * d0) >> 14;
- imag_sum += ((q63_t)b0 * c0) >> 14;
+ real_sum += ((q63_t)a0 * c0) >> 14;
+ imag_sum += ((q63_t)a0 * d0) >> 14;
+ real_sum -= ((q63_t)b0 * d0) >> 14;
+ imag_sum += ((q63_t)b0 * c0) >> 14;
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += ((q63_t)a0 * c0) >> 14;
- imag_sum += ((q63_t)a0 * d0) >> 14;
- real_sum -= ((q63_t)b0 * d0) >> 14;
- imag_sum += ((q63_t)b0 * c0) >> 14;
+ real_sum += ((q63_t)a0 * c0) >> 14;
+ imag_sum += ((q63_t)a0 * d0) >> 14;
+ real_sum -= ((q63_t)b0 * d0) >> 14;
+ imag_sum += ((q63_t)b0 * c0) >> 14;
- /* Decrement the loop counter */
- blkCnt--;
+ /* Decrement loop counter */
+ blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
- while (blkCnt > 0U)
- {
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
-
- real_sum += ((q63_t)a0 * c0) >> 14;
- imag_sum += ((q63_t)a0 * d0) >> 14;
- real_sum -= ((q63_t)b0 * d0) >> 14;
- imag_sum += ((q63_t)b0 * c0) >> 14;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numSamples;
- while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
{
- a0 = *pSrcA++;
- b0 = *pSrcA++;
- c0 = *pSrcB++;
- d0 = *pSrcB++;
+ a0 = *pSrcA++;
+ b0 = *pSrcA++;
+ c0 = *pSrcB++;
+ d0 = *pSrcB++;
- real_sum += ((q63_t)a0 * c0) >> 14;
- imag_sum += ((q63_t)a0 * d0) >> 14;
- real_sum -= ((q63_t)b0 * d0) >> 14;
- imag_sum += ((q63_t)b0 * c0) >> 14;
+ real_sum += ((q63_t)a0 * c0) >> 14;
+ imag_sum += ((q63_t)a0 * d0) >> 14;
+ real_sum -= ((q63_t)b0 * d0) >> 14;
+ imag_sum += ((q63_t)b0 * c0) >> 14;
- /* Decrement the loop counter */
- numSamples--;
+ /* Decrement loop counter */
+ blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
- /* Store the real and imaginary results in 16.48 format */
+ /* Store real and imaginary result in 16.48 format */
*realResult = real_sum;
*imagResult = imag_sum;
}
/**
- * @} end of cmplx_dot_prod group
+ @} end of cmplx_dot_prod group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
index 95aaf1e..848c401 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_mag_f32.c
* Description: Floating-point complex magnitude
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,125 +29,111 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @defgroup cmplx_mag Complex Magnitude
- *
- * Computes the magnitude of the elements of a complex data vector.
- *
- * The <code>pSrc</code> points to the source data and
- * <code>pDst</code> points to the where the result should be written.
- * <code>numSamples</code> specifies the number of complex samples
- * in the input array and the data is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * The input array has a total of <code>2*numSamples</code> values;
- * the output array has a total of <code>numSamples</code> values.
- * The underlying algorithm is used:
- *
- * <pre>
- * for(n=0; n<numSamples; n++) {
- * pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
- * }
- * </pre>
- *
- * There are separate functions for floating-point, Q15, and Q31 data types.
+ @defgroup cmplx_mag Complex Magnitude
+
+ Computes the magnitude of the elements of a complex data vector.
+
+ The <code>pSrc</code> points to the source data and
+ <code>pDst</code> points to the where the result should be written.
+ <code>numSamples</code> specifies the number of complex samples
+ in the input array and the data is stored in an interleaved fashion
+ (real, imag, real, imag, ...).
+ The input array has a total of <code>2*numSamples</code> values;
+ the output array has a total of <code>numSamples</code> values.
+
+ The underlying algorithm is used:
+
+ <pre>
+ for (n = 0; n < numSamples; n++) {
+ pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
+ }
+ </pre>
+
+ There are separate functions for floating-point, Q15, and Q31 data types.
*/
/**
- * @addtogroup cmplx_mag
- * @{
- */
-/**
- * @brief Floating-point complex magnitude.
- * @param[in] *pSrc points to complex input buffer
- * @param[out] *pDst points to real output buffer
- * @param[in] numSamples number of complex samples in the input vector
- * @return none.
- *
+ @addtogroup cmplx_mag
+ @{
*/
+/**
+ @brief Floating-point complex magnitude.
+ @param[in] pSrc points to input vector
+ @param[out] pDst points to output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
+ */
void arm_cmplx_mag_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t numSamples)
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t numSamples)
{
- float32_t realIn, imagIn; /* Temporary variables to hold input values */
+ uint32_t blkCnt; /* Loop counter */
+ float32_t real, imag; /* Temporary input variables */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- uint32_t blkCnt; /* loop counter */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
-
/* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
- realIn = *pSrc++;
- imagIn = *pSrc++;
- /* store the result in the destination buffer. */
- arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
- realIn = *pSrc++;
- imagIn = *pSrc++;
- arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
+ real = *pSrc++;
+ imag = *pSrc++;
- realIn = *pSrc++;
- imagIn = *pSrc++;
- arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
+ /* store result in destination buffer. */
+ arm_sqrt_f32((real * real) + (imag * imag), pDst++);
- realIn = *pSrc++;
- imagIn = *pSrc++;
- arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
+ real = *pSrc++;
+ imag = *pSrc++;
+ arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+ real = *pSrc++;
+ imag = *pSrc++;
+ arm_sqrt_f32((real * real) + (imag * imag), pDst++);
- /* Decrement the loop counter */
+ real = *pSrc++;
+ imag = *pSrc++;
+ arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
- while (blkCnt > 0U)
- {
- /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
- realIn = *pSrc++;
- imagIn = *pSrc++;
- /* store the result in the destination buffer. */
- arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numSamples;
- while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
{
- /* out = sqrt((real * real) + (imag * imag)) */
- realIn = *pSrc++;
- imagIn = *pSrc++;
- /* store the result in the destination buffer. */
- arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
+ /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
- /* Decrement the loop counter */
- numSamples--;
+ real = *pSrc++;
+ imag = *pSrc++;
+
+ /* store result in destination buffer. */
+ arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+ /* Decrement loop counter */
+ blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of cmplx_mag group
+ @} end of cmplx_mag group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
index 03d9b2a..a692c8c 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_mag_q15.c
* Description: Q15 complex magnitude
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,113 +29,134 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @addtogroup cmplx_mag
- * @{
+ @addtogroup cmplx_mag
+ @{
*/
-
/**
- * @brief Q15 complex magnitude
- * @param *pSrc points to the complex input vector
- * @param *pDst points to the real output vector
- * @param numSamples number of complex samples in the input vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.
+ @brief Q15 complex magnitude.
+ @param[in] pSrc points to input vector
+ @param[out] pDst points to output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.
*/
void arm_cmplx_mag_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t numSamples)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t numSamples)
{
- q31_t acc0, acc1; /* Accumulators */
+ uint32_t blkCnt; /* Loop counter */
#if defined (ARM_MATH_DSP)
+ q31_t in;
+ q31_t acc0; /* Accumulators */
+#else
+ q15_t real, imag; /* Temporary input variables */
+ q31_t acc0, acc1; /* Accumulators */
+#endif
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- uint32_t blkCnt; /* loop counter */
- q31_t in1, in2, in3, in4;
- q31_t acc2, acc3;
+#if defined (ARM_MATH_LOOPUNROLL)
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0U)
- {
-
- /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
- in1 = *__SIMD32(pSrc)++;
- in2 = *__SIMD32(pSrc)++;
- in3 = *__SIMD32(pSrc)++;
- in4 = *__SIMD32(pSrc)++;
-
- acc0 = __SMUAD(in1, in1);
- acc1 = __SMUAD(in2, in2);
- acc2 = __SMUAD(in3, in3);
- acc3 = __SMUAD(in4, in4);
-
- /* store the result in 2.14 format in the destination buffer. */
- arm_sqrt_q15((q15_t) ((acc0) >> 17), pDst++);
- arm_sqrt_q15((q15_t) ((acc1) >> 17), pDst++);
- arm_sqrt_q15((q15_t) ((acc2) >> 17), pDst++);
- arm_sqrt_q15((q15_t) ((acc3) >> 17), pDst++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = numSamples % 0x4U;
-
while (blkCnt > 0U)
{
/* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
- in1 = *__SIMD32(pSrc)++;
- acc0 = __SMUAD(in1, in1);
- /* store the result in 2.14 format in the destination buffer. */
+#if defined (ARM_MATH_DSP)
+ in = read_q15x2_ia ((q15_t **) &pSrc);
+ acc0 = __SMUAD(in, in);
+ /* store result in 2.14 format in destination buffer. */
arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
- /* Decrement the loop counter */
+ in = read_q15x2_ia ((q15_t **) &pSrc);
+ acc0 = __SMUAD(in, in);
+ arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+
+ in = read_q15x2_ia ((q15_t **) &pSrc);
+ acc0 = __SMUAD(in, in);
+ arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+
+ in = read_q15x2_ia ((q15_t **) &pSrc);
+ acc0 = __SMUAD(in, in);
+ arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+#else
+ real = *pSrc++;
+ imag = *pSrc++;
+ acc0 = ((q31_t) real * real);
+ acc1 = ((q31_t) imag * imag);
+
+ /* store result in 2.14 format in destination buffer. */
+ arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+
+ real = *pSrc++;
+ imag = *pSrc++;
+ acc0 = ((q31_t) real * real);
+ acc1 = ((q31_t) imag * imag);
+ arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+
+ real = *pSrc++;
+ imag = *pSrc++;
+ acc0 = ((q31_t) real * real);
+ acc1 = ((q31_t) imag * imag);
+ arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+
+ real = *pSrc++;
+ imag = *pSrc++;
+ acc0 = ((q31_t) real * real);
+ acc1 = ((q31_t) imag * imag);
+ arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ /* Decrement loop counter */
blkCnt--;
}
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = numSamples % 0x4U;
+
#else
- /* Run the below code for Cortex-M0 */
- q15_t real, imag; /* Temporary variables to hold input values */
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numSamples;
- while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
{
- /* out = sqrt(real * real + imag * imag) */
+ /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+#if defined (ARM_MATH_DSP)
+ in = read_q15x2_ia ((q15_t **) &pSrc);
+ acc0 = __SMUAD(in, in);
+
+ /* store result in 2.14 format in destination buffer. */
+ arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+#else
real = *pSrc++;
imag = *pSrc++;
+ acc0 = ((q31_t) real * real);
+ acc1 = ((q31_t) imag * imag);
- acc0 = (real * real);
- acc1 = (imag * imag);
-
- /* store the result in 2.14 format in the destination buffer. */
+ /* store result in 2.14 format in destination buffer. */
arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+#endif
- /* Decrement the loop counter */
- numSamples--;
+ /* Decrement loop counter */
+ blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of cmplx_mag group
+ @} end of cmplx_mag group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
index 830ecb9..355dc73 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_mag_q31.c
* Description: Q31 complex magnitude
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,145 +29,102 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @addtogroup cmplx_mag
- * @{
+ @addtogroup cmplx_mag
+ @{
*/
/**
- * @brief Q31 complex magnitude
- * @param *pSrc points to the complex input vector
- * @param *pDst points to the real output vector
- * @param numSamples number of complex samples in the input vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.
- * Input down scaling is not required.
+ @brief Q31 complex magnitude.
+ @param[in] pSrc points to input vector
+ @param[out] pDst points to output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.
+ Input down scaling is not required.
*/
void arm_cmplx_mag_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t numSamples)
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t numSamples)
{
- q31_t real, imag; /* Temporary variables to hold input values */
- q31_t acc0, acc1; /* Accumulators */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ q31_t real, imag; /* Temporary input variables */
+ q31_t acc0, acc1; /* Accumulators */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t real1, real2, imag1, imag2; /* Temporary variables to hold input values */
- q31_t out1, out2, out3, out4; /* Accumulators */
- q63_t mul1, mul2, mul3, mul4; /* Temporary variables */
-
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0U)
- {
- /* read complex input from source buffer */
- real1 = pSrc[0];
- imag1 = pSrc[1];
- real2 = pSrc[2];
- imag2 = pSrc[3];
-
- /* calculate power of input values */
- mul1 = (q63_t) real1 *real1;
- mul2 = (q63_t) imag1 *imag1;
- mul3 = (q63_t) real2 *real2;
- mul4 = (q63_t) imag2 *imag2;
-
- /* get the result to 3.29 format */
- out1 = (q31_t) (mul1 >> 33);
- out2 = (q31_t) (mul2 >> 33);
- out3 = (q31_t) (mul3 >> 33);
- out4 = (q31_t) (mul4 >> 33);
-
- /* add real and imaginary accumulators */
- out1 = out1 + out2;
- out3 = out3 + out4;
-
- /* read complex input from source buffer */
- real1 = pSrc[4];
- imag1 = pSrc[5];
- real2 = pSrc[6];
- imag2 = pSrc[7];
-
- /* calculate square root */
- arm_sqrt_q31(out1, &pDst[0]);
-
- /* calculate power of input values */
- mul1 = (q63_t) real1 *real1;
-
- /* calculate square root */
- arm_sqrt_q31(out3, &pDst[1]);
-
- /* calculate power of input values */
- mul2 = (q63_t) imag1 *imag1;
- mul3 = (q63_t) real2 *real2;
- mul4 = (q63_t) imag2 *imag2;
-
- /* get the result to 3.29 format */
- out1 = (q31_t) (mul1 >> 33);
- out2 = (q31_t) (mul2 >> 33);
- out3 = (q31_t) (mul3 >> 33);
- out4 = (q31_t) (mul4 >> 33);
-
- /* add real and imaginary accumulators */
- out1 = out1 + out2;
- out3 = out3 + out4;
-
- /* calculate square root */
- arm_sqrt_q31(out1, &pDst[2]);
-
- /* increment destination by 8 to process next samples */
- pSrc += 8U;
-
- /* calculate square root */
- arm_sqrt_q31(out3, &pDst[3]);
-
- /* increment destination by 4 to process next samples */
- pDst += 4U;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = numSamples % 0x4U;
-
-#else
-
- /* Run the below code for Cortex-M0 */
- blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
while (blkCnt > 0U)
{
/* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
- /* store the result in 2.30 format in the destination buffer. */
+
+ /* store result in 2.30 format in destination buffer. */
arm_sqrt_q31(acc0 + acc1, pDst++);
- /* Decrement the loop counter */
+ real = *pSrc++;
+ imag = *pSrc++;
+ acc0 = (q31_t) (((q63_t) real * real) >> 33);
+ acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+ arm_sqrt_q31(acc0 + acc1, pDst++);
+
+ real = *pSrc++;
+ imag = *pSrc++;
+ acc0 = (q31_t) (((q63_t) real * real) >> 33);
+ acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+ arm_sqrt_q31(acc0 + acc1, pDst++);
+
+ real = *pSrc++;
+ imag = *pSrc++;
+ acc0 = (q31_t) (((q63_t) real * real) >> 33);
+ acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+ arm_sqrt_q31(acc0 + acc1, pDst++);
+
+ /* Decrement loop counter */
blkCnt--;
}
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = numSamples % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+ real = *pSrc++;
+ imag = *pSrc++;
+ acc0 = (q31_t) (((q63_t) real * real) >> 33);
+ acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+
+ /* store result in 2.30 format in destination buffer. */
+ arm_sqrt_q31(acc0 + acc1, pDst++);
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
}
/**
- * @} end of cmplx_mag group
+ @} end of cmplx_mag group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
index 59127a2..f0f3792 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_mag_squared_f32.c
* Description: Floating-point complex magnitude squared
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,176 +29,109 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @defgroup cmplx_mag_squared Complex Magnitude Squared
- *
- * Computes the magnitude squared of the elements of a complex data vector.
- *
- * The <code>pSrc</code> points to the source data and
- * <code>pDst</code> points to the where the result should be written.
- * <code>numSamples</code> specifies the number of complex samples
- * in the input array and the data is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * The input array has a total of <code>2*numSamples</code> values;
- * the output array has a total of <code>numSamples</code> values.
- *
- * The underlying algorithm is used:
- *
- * <pre>
- * for(n=0; n<numSamples; n++) {
- * pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
- * }
- * </pre>
- *
- * There are separate functions for floating-point, Q15, and Q31 data types.
+ @defgroup cmplx_mag_squared Complex Magnitude Squared
+
+ Computes the magnitude squared of the elements of a complex data vector.
+
+ The <code>pSrc</code> points to the source data and
+ <code>pDst</code> points to the where the result should be written.
+ <code>numSamples</code> specifies the number of complex samples
+ in the input array and the data is stored in an interleaved fashion
+ (real, imag, real, imag, ...).
+ The input array has a total of <code>2*numSamples</code> values;
+ the output array has a total of <code>numSamples</code> values.
+
+ The underlying algorithm is used:
+
+ <pre>
+ for (n = 0; n < numSamples; n++) {
+ pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
+ }
+ </pre>
+
+ There are separate functions for floating-point, Q15, and Q31 data types.
*/
/**
- * @addtogroup cmplx_mag_squared
- * @{
+ @addtogroup cmplx_mag_squared
+ @{
*/
-
/**
- * @brief Floating-point complex magnitude squared
- * @param[in] *pSrc points to the complex input vector
- * @param[out] *pDst points to the real output vector
- * @param[in] numSamples number of complex samples in the input vector
- * @return none.
+ @brief Floating-point complex magnitude squared.
+ @param[in] pSrc points to input vector
+ @param[out] pDst points to output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
*/
void arm_cmplx_mag_squared_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t numSamples)
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t numSamples)
{
- float32_t real, imag; /* Temporary variables to store real and imaginary values */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ float32_t real, imag; /* Temporary input variables */
-#if defined (ARM_MATH_DSP)
- float32_t real1, real2, real3, real4; /* Temporary variables to hold real values */
- float32_t imag1, imag2, imag3, imag4; /* Temporary variables to hold imaginary values */
- float32_t mul1, mul2, mul3, mul4; /* Temporary variables */
- float32_t mul5, mul6, mul7, mul8; /* Temporary variables */
- float32_t out1, out2, out3, out4; /* Temporary variables to hold output values */
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */
- /* read real input sample from source buffer */
- real1 = pSrc[0];
- /* read imaginary input sample from source buffer */
- imag1 = pSrc[1];
- /* calculate power of real value */
- mul1 = real1 * real1;
+ real = *pSrc++;
+ imag = *pSrc++;
+ *pDst++ = (real * real) + (imag * imag);
- /* read real input sample from source buffer */
- real2 = pSrc[2];
+ real = *pSrc++;
+ imag = *pSrc++;
+ *pDst++ = (real * real) + (imag * imag);
- /* calculate power of imaginary value */
- mul2 = imag1 * imag1;
+ real = *pSrc++;
+ imag = *pSrc++;
+ *pDst++ = (real * real) + (imag * imag);
- /* read imaginary input sample from source buffer */
- imag2 = pSrc[3];
+ real = *pSrc++;
+ imag = *pSrc++;
+ *pDst++ = (real * real) + (imag * imag);
- /* calculate power of real value */
- mul3 = real2 * real2;
-
- /* read real input sample from source buffer */
- real3 = pSrc[4];
-
- /* calculate power of imaginary value */
- mul4 = imag2 * imag2;
-
- /* read imaginary input sample from source buffer */
- imag3 = pSrc[5];
-
- /* calculate power of real value */
- mul5 = real3 * real3;
- /* calculate power of imaginary value */
- mul6 = imag3 * imag3;
-
- /* read real input sample from source buffer */
- real4 = pSrc[6];
-
- /* accumulate real and imaginary powers */
- out1 = mul1 + mul2;
-
- /* read imaginary input sample from source buffer */
- imag4 = pSrc[7];
-
- /* accumulate real and imaginary powers */
- out2 = mul3 + mul4;
-
- /* calculate power of real value */
- mul7 = real4 * real4;
- /* calculate power of imaginary value */
- mul8 = imag4 * imag4;
-
- /* store output to destination */
- pDst[0] = out1;
-
- /* accumulate real and imaginary powers */
- out3 = mul5 + mul6;
-
- /* store output to destination */
- pDst[1] = out2;
-
- /* accumulate real and imaginary powers */
- out4 = mul7 + mul8;
-
- /* store output to destination */
- pDst[2] = out3;
-
- /* increment destination pointer by 8 to process next samples */
- pSrc += 8U;
-
- /* store output to destination */
- pDst[3] = out4;
-
- /* increment destination pointer by 4 to process next samples */
- pDst += 4U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
+ /* Initialize blkCnt with number of samples */
blkCnt = numSamples;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
real = *pSrc++;
imag = *pSrc++;
- /* out = (real * real) + (imag * imag) */
- /* store the result in the destination buffer. */
+ /* store result in destination buffer. */
*pDst++ = (real * real) + (imag * imag);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of cmplx_mag_squared group
+ @} end of cmplx_mag_squared group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
index 3f740c3..47aad82 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_mag_squared_q15.c
* Description: Q15 complex magnitude squared
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,108 +29,133 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @addtogroup cmplx_mag_squared
- * @{
+ @addtogroup cmplx_mag_squared
+ @{
*/
/**
- * @brief Q15 complex magnitude squared
- * @param *pSrc points to the complex input vector
- * @param *pDst points to the real output vector
- * @param numSamples number of complex samples in the input vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
+ @brief Q15 complex magnitude squared.
+ @param[in] pSrc points to input vector
+ @param[out] pDst points to output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
*/
void arm_cmplx_mag_squared_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t numSamples)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t numSamples)
{
- q31_t acc0, acc1; /* Accumulators */
+ uint32_t blkCnt; /* Loop counter */
#if defined (ARM_MATH_DSP)
+ q31_t in;
+ q31_t acc0; /* Accumulators */
+#else
+ q15_t real, imag; /* Temporary input variables */
+ q31_t acc0, acc1; /* Accumulators */
+#endif
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- uint32_t blkCnt; /* loop counter */
- q31_t in1, in2, in3, in4;
- q31_t acc2, acc3;
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */
- in1 = *__SIMD32(pSrc)++;
- in2 = *__SIMD32(pSrc)++;
- in3 = *__SIMD32(pSrc)++;
- in4 = *__SIMD32(pSrc)++;
- acc0 = __SMUAD(in1, in1);
- acc1 = __SMUAD(in2, in2);
- acc2 = __SMUAD(in3, in3);
- acc3 = __SMUAD(in4, in4);
-
- /* store the result in 3.13 format in the destination buffer. */
+#if defined (ARM_MATH_DSP)
+ in = read_q15x2_ia ((q15_t **) &pSrc);
+ acc0 = __SMUAD(in, in);
+ /* store result in 3.13 format in destination buffer. */
*pDst++ = (q15_t) (acc0 >> 17);
- *pDst++ = (q15_t) (acc1 >> 17);
- *pDst++ = (q15_t) (acc2 >> 17);
- *pDst++ = (q15_t) (acc3 >> 17);
- /* Decrement the loop counter */
+ in = read_q15x2_ia ((q15_t **) &pSrc);
+ acc0 = __SMUAD(in, in);
+ *pDst++ = (q15_t) (acc0 >> 17);
+
+ in = read_q15x2_ia ((q15_t **) &pSrc);
+ acc0 = __SMUAD(in, in);
+ *pDst++ = (q15_t) (acc0 >> 17);
+
+ in = read_q15x2_ia ((q15_t **) &pSrc);
+ acc0 = __SMUAD(in, in);
+ *pDst++ = (q15_t) (acc0 >> 17);
+#else
+ real = *pSrc++;
+ imag = *pSrc++;
+ acc0 = ((q31_t) real * real);
+ acc1 = ((q31_t) imag * imag);
+ /* store result in 3.13 format in destination buffer. */
+ *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+
+ real = *pSrc++;
+ imag = *pSrc++;
+ acc0 = ((q31_t) real * real);
+ acc1 = ((q31_t) imag * imag);
+ *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+
+ real = *pSrc++;
+ imag = *pSrc++;
+ acc0 = ((q31_t) real * real);
+ acc1 = ((q31_t) imag * imag);
+ *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+
+ real = *pSrc++;
+ imag = *pSrc++;
+ acc0 = ((q31_t) real * real);
+ acc1 = ((q31_t) imag * imag);
+ *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
- while (blkCnt > 0U)
- {
- /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
- in1 = *__SIMD32(pSrc)++;
- acc0 = __SMUAD(in1, in1);
-
- /* store the result in 3.13 format in the destination buffer. */
- *pDst++ = (q15_t) (acc0 >> 17);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
- q15_t real, imag; /* Temporary variables to store real and imaginary values */
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numSamples;
- while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
{
- /* out = ((real * real) + (imag * imag)) */
+ /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+#if defined (ARM_MATH_DSP)
+ in = read_q15x2_ia ((q15_t **) &pSrc);
+ acc0 = __SMUAD(in, in);
+
+ /* store result in 3.13 format in destination buffer. */
+ *pDst++ = (q15_t) (acc0 >> 17);
+#else
real = *pSrc++;
imag = *pSrc++;
- acc0 = (real * real);
- acc1 = (imag * imag);
- /* store the result in 3.13 format in the destination buffer. */
+ acc0 = ((q31_t) real * real);
+ acc1 = ((q31_t) imag * imag);
+
+ /* store result in 3.13 format in destination buffer. */
*pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+#endif
- /* Decrement the loop counter */
- numSamples--;
+ /* Decrement loop counter */
+ blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of cmplx_mag_squared group
+ @} end of cmplx_mag_squared group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
index c2b2c50..038d0b5 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_mag_squared_q31.c
* Description: Q31 complex magnitude squared
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,55 +29,43 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @addtogroup cmplx_mag_squared
- * @{
+ @addtogroup cmplx_mag_squared
+ @{
*/
-
/**
- * @brief Q31 complex magnitude squared
- * @param *pSrc points to the complex input vector
- * @param *pDst points to the real output vector
- * @param numSamples number of complex samples in the input vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
- * Input down scaling is not required.
+ @brief Q31 complex magnitude squared.
+ @param[in] pSrc points to input vector
+ @param[out] pDst points to output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
+ Input down scaling is not required.
*/
void arm_cmplx_mag_squared_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t numSamples)
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t numSamples)
{
- q31_t real, imag; /* Temporary variables to store real and imaginary values */
- q31_t acc0, acc1; /* Accumulators */
+ uint32_t blkCnt; /* Loop counter */
+ q31_t real, imag; /* Temporary input variables */
+ q31_t acc0, acc1; /* Accumulators */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- uint32_t blkCnt; /* loop counter */
-
- /* loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */
- real = *pSrc++;
- imag = *pSrc++;
- acc0 = (q31_t) (((q63_t) real * real) >> 33);
- acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
- /* store the result in 3.29 format in the destination buffer. */
- *pDst++ = acc0 + acc1;
real = *pSrc++;
imag = *pSrc++;
@@ -90,60 +78,52 @@
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
- /* store the result in 3.29 format in the destination buffer. */
*pDst++ = acc0 + acc1;
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
- /* store the result in 3.29 format in the destination buffer. */
*pDst++ = acc0 + acc1;
- /* Decrement the loop counter */
+ real = *pSrc++;
+ imag = *pSrc++;
+ acc0 = (q31_t) (((q63_t) real * real) >> 33);
+ acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+ *pDst++ = acc0 + acc1;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
- while (blkCnt > 0U)
- {
- /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
- real = *pSrc++;
- imag = *pSrc++;
- acc0 = (q31_t) (((q63_t) real * real) >> 33);
- acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
- /* store the result in 3.29 format in the destination buffer. */
- *pDst++ = acc0 + acc1;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numSamples;
- while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
{
- /* out = ((real * real) + (imag * imag)) */
+ /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
- /* store the result in 3.29 format in the destination buffer. */
+
+ /* store result in 3.29 format in destination buffer. */
*pDst++ = acc0 + acc1;
- /* Decrement the loop counter */
- numSamples--;
+ /* Decrement loop counter */
+ blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of cmplx_mag_squared group
+ @} end of cmplx_mag_squared group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
index 3717591..ad60446 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_mult_cmplx_f32.c
* Description: Floating-point complex-by-complex multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,168 +29,127 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication
- *
- * Multiplies a complex vector by another complex vector and generates a complex result.
- * The data in the complex arrays is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * The parameter <code>numSamples</code> represents the number of complex
- * samples processed. The complex arrays have a total of <code>2*numSamples</code>
- * real values.
- *
- * The underlying algorithm is used:
- *
- * <pre>
- * for(n=0; n<numSamples; n++) {
- * pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
- * pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
- * }
- * </pre>
- *
- * There are separate functions for floating-point, Q15, and Q31 data types.
+ @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication
+
+ Multiplies a complex vector by another complex vector and generates a complex result.
+ The data in the complex arrays is stored in an interleaved fashion
+ (real, imag, real, imag, ...).
+ The parameter <code>numSamples</code> represents the number of complex
+ samples processed. The complex arrays have a total of <code>2*numSamples</code>
+ real values.
+
+ The underlying algorithm is used:
+
+ <pre>
+ for (n = 0; n < numSamples; n++) {
+ pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
+ pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
+ }
+ </pre>
+
+ There are separate functions for floating-point, Q15, and Q31 data types.
*/
/**
- * @addtogroup CmplxByCmplxMult
- * @{
+ @addtogroup CmplxByCmplxMult
+ @{
*/
-
/**
- * @brief Floating-point complex-by-complex multiplication
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- * @return none.
+ @brief Floating-point complex-by-complex multiplication.
+ @param[in] pSrcA points to first input vector
+ @param[in] pSrcB points to second input vector
+ @param[out] pDst points to output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
*/
void arm_cmplx_mult_cmplx_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t numSamples)
+ const float32_t * pSrcA,
+ const float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t numSamples)
{
- float32_t a1, b1, c1, d1; /* Temporary variables to store real and imaginary values */
- uint32_t blkCnt; /* loop counters */
+ uint32_t blkCnt; /* Loop counter */
+ float32_t a, b, c, d; /* Temporary variables */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t a2, b2, c2, d2; /* Temporary variables to store real and imaginary values */
- float32_t acc1, acc2, acc3, acc4;
-
-
- /* loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
- /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
- a1 = *pSrcA; /* A[2 * i] */
- c1 = *pSrcB; /* B[2 * i] */
+ /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */
+ /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */
- b1 = *(pSrcA + 1); /* A[2 * i + 1] */
- acc1 = a1 * c1; /* acc1 = A[2 * i] * B[2 * i] */
+ a = *pSrcA++;
+ b = *pSrcA++;
+ c = *pSrcB++;
+ d = *pSrcB++;
+ /* store result in destination buffer. */
+ *pDst++ = (a * c) - (b * d);
+ *pDst++ = (a * d) + (b * c);
- a2 = *(pSrcA + 2); /* A[2 * i + 2] */
- acc2 = (b1 * c1); /* acc2 = A[2 * i + 1] * B[2 * i] */
+ a = *pSrcA++;
+ b = *pSrcA++;
+ c = *pSrcB++;
+ d = *pSrcB++;
+ *pDst++ = (a * c) - (b * d);
+ *pDst++ = (a * d) + (b * c);
- d1 = *(pSrcB + 1); /* B[2 * i + 1] */
- c2 = *(pSrcB + 2); /* B[2 * i + 2] */
- acc1 -= b1 * d1; /* acc1 = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
+ a = *pSrcA++;
+ b = *pSrcA++;
+ c = *pSrcB++;
+ d = *pSrcB++;
+ *pDst++ = (a * c) - (b * d);
+ *pDst++ = (a * d) + (b * c);
- d2 = *(pSrcB + 3); /* B[2 * i + 3] */
- acc3 = a2 * c2; /* acc3 = A[2 * i + 2] * B[2 * i + 2] */
+ a = *pSrcA++;
+ b = *pSrcA++;
+ c = *pSrcB++;
+ d = *pSrcB++;
+ *pDst++ = (a * c) - (b * d);
+ *pDst++ = (a * d) + (b * c);
- b2 = *(pSrcA + 3); /* A[2 * i + 3] */
- acc2 += (a1 * d1); /* acc2 = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */
-
- a1 = *(pSrcA + 4); /* A[2 * i + 4] */
- acc4 = (a2 * d2); /* acc4 = A[2 * i + 2] * B[2 * i + 3] */
-
- c1 = *(pSrcB + 4); /* B[2 * i + 4] */
- acc3 -= (b2 * d2); /* acc3 = A[2 * i + 2] * B[2 * i + 2] - A[2 * i + 3] * B[2 * i + 3] */
- *pDst = acc1; /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
-
- b1 = *(pSrcA + 5); /* A[2 * i + 5] */
- acc4 += b2 * c2; /* acc4 = A[2 * i + 2] * B[2 * i + 3] + A[2 * i + 3] * B[2 * i + 2] */
-
- *(pDst + 1) = acc2; /* C[2 * i + 1] = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */
- acc1 = (a1 * c1);
-
- d1 = *(pSrcB + 5);
- acc2 = (b1 * c1);
-
- *(pDst + 2) = acc3;
- *(pDst + 3) = acc4;
-
- a2 = *(pSrcA + 6);
- acc1 -= (b1 * d1);
-
- c2 = *(pSrcB + 6);
- acc2 += (a1 * d1);
-
- b2 = *(pSrcA + 7);
- acc3 = (a2 * c2);
-
- d2 = *(pSrcB + 7);
- acc4 = (b2 * c2);
-
- *(pDst + 4) = acc1;
- pSrcA += 8U;
-
- acc3 -= (b2 * d2);
- acc4 += (a2 * d2);
-
- *(pDst + 5) = acc2;
- pSrcB += 8U;
-
- *(pDst + 6) = acc3;
- *(pDst + 7) = acc4;
-
- pDst += 8U;
-
- /* Decrement the numSamples loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
blkCnt = numSamples;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
- /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
- /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
- a1 = *pSrcA++;
- b1 = *pSrcA++;
- c1 = *pSrcB++;
- d1 = *pSrcB++;
+ /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */
+ /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */
- /* store the result in the destination buffer. */
- *pDst++ = (a1 * c1) - (b1 * d1);
- *pDst++ = (a1 * d1) + (b1 * c1);
+ a = *pSrcA++;
+ b = *pSrcA++;
+ c = *pSrcB++;
+ d = *pSrcB++;
- /* Decrement the numSamples loop counter */
+ /* store result in destination buffer. */
+ *pDst++ = (a * c) - (b * d);
+ *pDst++ = (a * d) + (b * c);
+
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of CmplxByCmplxMult group
+ @} end of CmplxByCmplxMult group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
index 2869837..a8d26d8 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_mult_cmplx_q15.c
* Description: Q15 complex-by-complex multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,153 +29,108 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @addtogroup CmplxByCmplxMult
- * @{
+ @addtogroup CmplxByCmplxMult
+ @{
*/
/**
- * @brief Q15 complex-by-complex multiplication
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
+ @brief Q15 complex-by-complex multiplication.
+ @param[in] pSrcA points to first input vector
+ @param[in] pSrcB points to second input vector
+ @param[out] pDst points to output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
*/
void arm_cmplx_mult_cmplx_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t numSamples)
+ const q15_t * pSrcA,
+ const q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t numSamples)
{
- q15_t a, b, c, d; /* Temporary variables to store real and imaginary values */
+ uint32_t blkCnt; /* Loop counter */
+ q15_t a, b, c, d; /* Temporary variables */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- uint32_t blkCnt; /* loop counters */
-
- /* loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
- /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
- a = *pSrcA++;
- b = *pSrcA++;
- c = *pSrcB++;
- d = *pSrcB++;
-
- /* store the result in 3.13 format in the destination buffer. */
- *pDst++ =
- (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
- /* store the result in 3.13 format in the destination buffer. */
- *pDst++ =
- (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
+ /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */
+ /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
-
- /* store the result in 3.13 format in the destination buffer. */
- *pDst++ =
- (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
- /* store the result in 3.13 format in the destination buffer. */
- *pDst++ =
- (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
+ /* store result in 3.13 format in destination buffer. */
+ *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+ *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
-
- /* store the result in 3.13 format in the destination buffer. */
- *pDst++ =
- (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
- /* store the result in 3.13 format in the destination buffer. */
- *pDst++ =
- (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
+ *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+ *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
+ *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+ *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
- /* store the result in 3.13 format in the destination buffer. */
- *pDst++ =
- (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
- /* store the result in 3.13 format in the destination buffer. */
- *pDst++ =
- (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
+ a = *pSrcA++;
+ b = *pSrcA++;
+ c = *pSrcB++;
+ d = *pSrcB++;
+ *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+ *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
- /* Decrement the blockSize loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
- while (blkCnt > 0U)
- {
- /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
- /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
- a = *pSrcA++;
- b = *pSrcA++;
- c = *pSrcB++;
- d = *pSrcB++;
-
- /* store the result in 3.13 format in the destination buffer. */
- *pDst++ =
- (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
- /* store the result in 3.13 format in the destination buffer. */
- *pDst++ =
- (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numSamples;
- while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
{
- /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
- /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
+ /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */
+ /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */
+
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
- /* store the result in 3.13 format in the destination buffer. */
- *pDst++ =
- (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
- /* store the result in 3.13 format in the destination buffer. */
- *pDst++ =
- (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
+ /* store result in 3.13 format in destination buffer. */
+ *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+ *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
- /* Decrement the blockSize loop counter */
- numSamples--;
+ /* Decrement loop counter */
+ blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of CmplxByCmplxMult group
+ @} end of CmplxByCmplxMult group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
index b01c4f6..58bf22a 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_mult_cmplx_q31.c
* Description: Q31 complex-by-complex multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,286 +29,109 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @addtogroup CmplxByCmplxMult
- * @{
+ @addtogroup CmplxByCmplxMult
+ @{
*/
-
/**
- * @brief Q31 complex-by-complex multiplication
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
- * Input down scaling is not required.
+ @brief Q31 complex-by-complex multiplication.
+ @param[in] pSrcA points to first input vector
+ @param[in] pSrcB points to second input vector
+ @param[out] pDst points to output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
+ Input down scaling is not required.
*/
void arm_cmplx_mult_cmplx_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t numSamples)
+ const q31_t * pSrcA,
+ const q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t numSamples)
{
- q31_t a, b, c, d; /* Temporary variables to store real and imaginary values */
- uint32_t blkCnt; /* loop counters */
- q31_t mul1, mul2, mul3, mul4;
- q31_t out1, out2;
+ uint32_t blkCnt; /* Loop counter */
+ q31_t a, b, c, d; /* Temporary variables */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /* loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
- /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
- a = *pSrcA++;
- b = *pSrcA++;
- c = *pSrcB++;
- d = *pSrcB++;
-
- mul1 = (q31_t) (((q63_t) a * c) >> 32);
- mul2 = (q31_t) (((q63_t) b * d) >> 32);
- mul3 = (q31_t) (((q63_t) a * d) >> 32);
- mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
- mul1 = (mul1 >> 1);
- mul2 = (mul2 >> 1);
- mul3 = (mul3 >> 1);
- mul4 = (mul4 >> 1);
-
- out1 = mul1 - mul2;
- out2 = mul3 + mul4;
-
- /* store the real result in 3.29 format in the destination buffer. */
- *pDst++ = out1;
- /* store the imag result in 3.29 format in the destination buffer. */
- *pDst++ = out2;
+ /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */
+ /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
-
- mul1 = (q31_t) (((q63_t) a * c) >> 32);
- mul2 = (q31_t) (((q63_t) b * d) >> 32);
- mul3 = (q31_t) (((q63_t) a * d) >> 32);
- mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
- mul1 = (mul1 >> 1);
- mul2 = (mul2 >> 1);
- mul3 = (mul3 >> 1);
- mul4 = (mul4 >> 1);
-
- out1 = mul1 - mul2;
- out2 = mul3 + mul4;
-
- /* store the real result in 3.29 format in the destination buffer. */
- *pDst++ = out1;
- /* store the imag result in 3.29 format in the destination buffer. */
- *pDst++ = out2;
+ /* store result in 3.29 format in destination buffer. */
+ *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+ *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
-
- mul1 = (q31_t) (((q63_t) a * c) >> 32);
- mul2 = (q31_t) (((q63_t) b * d) >> 32);
- mul3 = (q31_t) (((q63_t) a * d) >> 32);
- mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
- mul1 = (mul1 >> 1);
- mul2 = (mul2 >> 1);
- mul3 = (mul3 >> 1);
- mul4 = (mul4 >> 1);
-
- out1 = mul1 - mul2;
- out2 = mul3 + mul4;
-
- /* store the real result in 3.29 format in the destination buffer. */
- *pDst++ = out1;
- /* store the imag result in 3.29 format in the destination buffer. */
- *pDst++ = out2;
+ *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+ *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
+ *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+ *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
- mul1 = (q31_t) (((q63_t) a * c) >> 32);
- mul2 = (q31_t) (((q63_t) b * d) >> 32);
- mul3 = (q31_t) (((q63_t) a * d) >> 32);
- mul4 = (q31_t) (((q63_t) b * c) >> 32);
+ a = *pSrcA++;
+ b = *pSrcA++;
+ c = *pSrcB++;
+ d = *pSrcB++;
+ *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+ *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
- mul1 = (mul1 >> 1);
- mul2 = (mul2 >> 1);
- mul3 = (mul3 >> 1);
- mul4 = (mul4 >> 1);
-
- out1 = mul1 - mul2;
- out2 = mul3 + mul4;
-
- /* store the real result in 3.29 format in the destination buffer. */
- *pDst++ = out1;
- /* store the imag result in 3.29 format in the destination buffer. */
- *pDst++ = out2;
-
- /* Decrement the blockSize loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
- while (blkCnt > 0U)
- {
- /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
- /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
- a = *pSrcA++;
- b = *pSrcA++;
- c = *pSrcB++;
- d = *pSrcB++;
-
- mul1 = (q31_t) (((q63_t) a * c) >> 32);
- mul2 = (q31_t) (((q63_t) b * d) >> 32);
- mul3 = (q31_t) (((q63_t) a * d) >> 32);
- mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
- mul1 = (mul1 >> 1);
- mul2 = (mul2 >> 1);
- mul3 = (mul3 >> 1);
- mul4 = (mul4 >> 1);
-
- out1 = mul1 - mul2;
- out2 = mul3 + mul4;
-
- /* store the real result in 3.29 format in the destination buffer. */
- *pDst++ = out1;
- /* store the imag result in 3.29 format in the destination buffer. */
- *pDst++ = out2;
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numSamples;
- /* loop Unrolling */
- blkCnt = numSamples >> 1U;
-
- /* First part of the processing with loop unrolling. Compute 2 outputs at a time.
- ** a second loop below computes the remaining 1 sample. */
- while (blkCnt > 0U)
- {
- /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
- /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
- a = *pSrcA++;
- b = *pSrcA++;
- c = *pSrcB++;
- d = *pSrcB++;
-
- mul1 = (q31_t) (((q63_t) a * c) >> 32);
- mul2 = (q31_t) (((q63_t) b * d) >> 32);
- mul3 = (q31_t) (((q63_t) a * d) >> 32);
- mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
- mul1 = (mul1 >> 1);
- mul2 = (mul2 >> 1);
- mul3 = (mul3 >> 1);
- mul4 = (mul4 >> 1);
-
- out1 = mul1 - mul2;
- out2 = mul3 + mul4;
-
- /* store the real result in 3.29 format in the destination buffer. */
- *pDst++ = out1;
- /* store the imag result in 3.29 format in the destination buffer. */
- *pDst++ = out2;
-
- a = *pSrcA++;
- b = *pSrcA++;
- c = *pSrcB++;
- d = *pSrcB++;
-
- mul1 = (q31_t) (((q63_t) a * c) >> 32);
- mul2 = (q31_t) (((q63_t) b * d) >> 32);
- mul3 = (q31_t) (((q63_t) a * d) >> 32);
- mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
- mul1 = (mul1 >> 1);
- mul2 = (mul2 >> 1);
- mul3 = (mul3 >> 1);
- mul4 = (mul4 >> 1);
-
- out1 = mul1 - mul2;
- out2 = mul3 + mul4;
-
- /* store the real result in 3.29 format in the destination buffer. */
- *pDst++ = out1;
- /* store the imag result in 3.29 format in the destination buffer. */
- *pDst++ = out2;
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = numSamples % 0x2U;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
- /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
- /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
+ /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */
+ /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */
+
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
- mul1 = (q31_t) (((q63_t) a * c) >> 32);
- mul2 = (q31_t) (((q63_t) b * d) >> 32);
- mul3 = (q31_t) (((q63_t) a * d) >> 32);
- mul4 = (q31_t) (((q63_t) b * c) >> 32);
+ /* store result in 3.29 format in destination buffer. */
+ *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+ *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
- mul1 = (mul1 >> 1);
- mul2 = (mul2 >> 1);
- mul3 = (mul3 >> 1);
- mul4 = (mul4 >> 1);
-
- out1 = mul1 - mul2;
- out2 = mul3 + mul4;
-
- /* store the real result in 3.29 format in the destination buffer. */
- *pDst++ = out1;
- /* store the imag result in 3.29 format in the destination buffer. */
- *pDst++ = out2;
-
- /* Decrement the blockSize loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of CmplxByCmplxMult group
+ @} end of CmplxByCmplxMult group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
index 8c7ca31..4b11f29 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_mult_real_f32.c
* Description: Floating-point complex by real multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,185 +29,112 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @defgroup CmplxByRealMult Complex-by-Real Multiplication
- *
- * Multiplies a complex vector by a real vector and generates a complex result.
- * The data in the complex arrays is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * The parameter <code>numSamples</code> represents the number of complex
- * samples processed. The complex arrays have a total of <code>2*numSamples</code>
- * real values while the real array has a total of <code>numSamples</code>
- * real values.
- *
- * The underlying algorithm is used:
- *
- * <pre>
- * for(n=0; n<numSamples; n++) {
- * pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
- * pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
- * }
- * </pre>
- *
- * There are separate functions for floating-point, Q15, and Q31 data types.
+ @defgroup CmplxByRealMult Complex-by-Real Multiplication
+
+ Multiplies a complex vector by a real vector and generates a complex result.
+ The data in the complex arrays is stored in an interleaved fashion
+ (real, imag, real, imag, ...).
+ The parameter <code>numSamples</code> represents the number of complex
+ samples processed. The complex arrays have a total of <code>2*numSamples</code>
+ real values while the real array has a total of <code>numSamples</code>
+ real values.
+
+ The underlying algorithm is used:
+
+ <pre>
+ for (n = 0; n < numSamples; n++) {
+ pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
+ pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
+ }
+ </pre>
+
+ There are separate functions for floating-point, Q15, and Q31 data types.
*/
/**
- * @addtogroup CmplxByRealMult
- * @{
+ @addtogroup CmplxByRealMult
+ @{
*/
-
/**
- * @brief Floating-point complex-by-real multiplication
- * @param[in] *pSrcCmplx points to the complex input vector
- * @param[in] *pSrcReal points to the real input vector
- * @param[out] *pCmplxDst points to the complex output vector
- * @param[in] numSamples number of samples in each vector
- * @return none.
+ @brief Floating-point complex-by-real multiplication.
+ @param[in] pSrcCmplx points to complex input vector
+ @param[in] pSrcReal points to real input vector
+ @param[out] pCmplxDst points to complex output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
*/
void arm_cmplx_mult_real_f32(
- float32_t * pSrcCmplx,
- float32_t * pSrcReal,
- float32_t * pCmplxDst,
- uint32_t numSamples)
+ const float32_t * pSrcCmplx,
+ const float32_t * pSrcReal,
+ float32_t * pCmplxDst,
+ uint32_t numSamples)
{
- float32_t in; /* Temporary variable to store input value */
- uint32_t blkCnt; /* loop counters */
+ uint32_t blkCnt; /* Loop counter */
+ float32_t in; /* Temporary variable */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t inA1, inA2, inA3, inA4; /* Temporary variables to hold input data */
- float32_t inA5, inA6, inA7, inA8; /* Temporary variables to hold input data */
- float32_t inB1, inB2, inB3, inB4; /* Temporary variables to hold input data */
- float32_t out1, out2, out3, out4; /* Temporary variables to hold output data */
- float32_t out5, out6, out7, out8; /* Temporary variables to hold output data */
-
- /* loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C[2 * i] = A[2 * i] * B[i]. */
- /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
- /* read input from complex input buffer */
- inA1 = pSrcCmplx[0];
- inA2 = pSrcCmplx[1];
- /* read input from real input buffer */
- inB1 = pSrcReal[0];
+ /* C[2 * i ] = A[2 * i ] * B[i]. */
+ /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
- /* read input from complex input buffer */
- inA3 = pSrcCmplx[2];
+ in = *pSrcReal++;
+ /* store result in destination buffer. */
+ *pCmplxDst++ = *pSrcCmplx++ * in;
+ *pCmplxDst++ = *pSrcCmplx++ * in;
- /* multiply complex buffer real input with real buffer input */
- out1 = inA1 * inB1;
+ in = *pSrcReal++;
+ *pCmplxDst++ = *pSrcCmplx++ * in;
+ *pCmplxDst++ = *pSrcCmplx++ * in;
- /* read input from complex input buffer */
- inA4 = pSrcCmplx[3];
+ in = *pSrcReal++;
+ *pCmplxDst++ = *pSrcCmplx++ * in;
+ *pCmplxDst++ = *pSrcCmplx++ * in;
- /* multiply complex buffer imaginary input with real buffer input */
- out2 = inA2 * inB1;
+ in = *pSrcReal++;
+ *pCmplxDst++ = *pSrcCmplx++* in;
+ *pCmplxDst++ = *pSrcCmplx++ * in;
- /* read input from real input buffer */
- inB2 = pSrcReal[1];
- /* read input from complex input buffer */
- inA5 = pSrcCmplx[4];
-
- /* multiply complex buffer real input with real buffer input */
- out3 = inA3 * inB2;
-
- /* read input from complex input buffer */
- inA6 = pSrcCmplx[5];
- /* read input from real input buffer */
- inB3 = pSrcReal[2];
-
- /* multiply complex buffer imaginary input with real buffer input */
- out4 = inA4 * inB2;
-
- /* read input from complex input buffer */
- inA7 = pSrcCmplx[6];
-
- /* multiply complex buffer real input with real buffer input */
- out5 = inA5 * inB3;
-
- /* read input from complex input buffer */
- inA8 = pSrcCmplx[7];
-
- /* multiply complex buffer imaginary input with real buffer input */
- out6 = inA6 * inB3;
-
- /* read input from real input buffer */
- inB4 = pSrcReal[3];
-
- /* store result to destination bufer */
- pCmplxDst[0] = out1;
-
- /* multiply complex buffer real input with real buffer input */
- out7 = inA7 * inB4;
-
- /* store result to destination bufer */
- pCmplxDst[1] = out2;
-
- /* multiply complex buffer imaginary input with real buffer input */
- out8 = inA8 * inB4;
-
- /* store result to destination bufer */
- pCmplxDst[2] = out3;
- pCmplxDst[3] = out4;
- pCmplxDst[4] = out5;
-
- /* incremnet complex input buffer by 8 to process next samples */
- pSrcCmplx += 8U;
-
- /* store result to destination bufer */
- pCmplxDst[5] = out6;
-
- /* increment real input buffer by 4 to process next samples */
- pSrcReal += 4U;
-
- /* store result to destination bufer */
- pCmplxDst[6] = out7;
- pCmplxDst[7] = out8;
-
- /* increment destination buffer by 8 to process next sampels */
- pCmplxDst += 8U;
-
- /* Decrement the numSamples loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
blkCnt = numSamples;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
- /* C[2 * i] = A[2 * i] * B[i]. */
- /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
- in = *pSrcReal++;
- /* store the result in the destination buffer. */
- *pCmplxDst++ = (*pSrcCmplx++) * (in);
- *pCmplxDst++ = (*pSrcCmplx++) * (in);
+ /* C[2 * i ] = A[2 * i ] * B[i]. */
+ /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
- /* Decrement the numSamples loop counter */
+ in = *pSrcReal++;
+ /* store result in destination buffer. */
+ *pCmplxDst++ = *pSrcCmplx++ * in;
+ *pCmplxDst++ = *pSrcCmplx++ * in;
+
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of CmplxByRealMult group
+ @} end of CmplxByRealMult group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
index 340d852..26973a6 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_mult_real_q15.c
* Description: Q15 complex by real multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,77 +29,71 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @addtogroup CmplxByRealMult
- * @{
+ @addtogroup CmplxByRealMult
+ @{
*/
-
/**
- * @brief Q15 complex-by-real multiplication
- * @param[in] *pSrcCmplx points to the complex input vector
- * @param[in] *pSrcReal points to the real input vector
- * @param[out] *pCmplxDst points to the complex output vector
- * @param[in] numSamples number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+ @brief Q15 complex-by-real multiplication.
+ @param[in] pSrcCmplx points to complex input vector
+ @param[in] pSrcReal points to real input vector
+ @param[out] pCmplxDst points to complex output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
*/
void arm_cmplx_mult_real_q15(
- q15_t * pSrcCmplx,
- q15_t * pSrcReal,
- q15_t * pCmplxDst,
- uint32_t numSamples)
+ const q15_t * pSrcCmplx,
+ const q15_t * pSrcReal,
+ q15_t * pCmplxDst,
+ uint32_t numSamples)
{
- q15_t in; /* Temporary variable to store input value */
+ uint32_t blkCnt; /* Loop counter */
+ q15_t in; /* Temporary variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
#if defined (ARM_MATH_DSP)
+ q31_t inA1, inA2; /* Temporary variables to hold input data */
+ q31_t inB1; /* Temporary variables to hold input data */
+ q15_t out1, out2, out3, out4; /* Temporary variables to hold output data */
+ q31_t mul1, mul2, mul3, mul4; /* Temporary variables to hold intermediate data */
+#endif
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- uint32_t blkCnt; /* loop counters */
- q31_t inA1, inA2; /* Temporary variables to hold input data */
- q31_t inB1; /* Temporary variables to hold input data */
- q15_t out1, out2, out3, out4; /* Temporary variables to hold output data */
- q31_t mul1, mul2, mul3, mul4; /* Temporary variables to hold intermediate data */
-
- /* loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C[2 * i] = A[2 * i] * B[i]. */
- /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
- /* read complex number both real and imaginary from complex input buffer */
- inA1 = *__SIMD32(pSrcCmplx)++;
- /* read two real values at a time from real input buffer */
- inB1 = *__SIMD32(pSrcReal)++;
- /* read complex number both real and imaginary from complex input buffer */
- inA2 = *__SIMD32(pSrcCmplx)++;
+ /* C[2 * i ] = A[2 * i ] * B[i]. */
+ /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+#if defined (ARM_MATH_DSP)
+ /* read 2 complex numbers both real and imaginary from complex input buffer */
+ inA1 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+ inA2 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+ /* read 2 real values at a time from real input buffer */
+ inB1 = read_q15x2_ia ((q15_t **) &pSrcReal);
/* multiply complex number with real numbers */
#ifndef ARM_MATH_BIG_ENDIAN
-
- mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
+ mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
- mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
+ mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
-
#else
-
mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
- mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
+ mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
- mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
-
+ mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* saturate the result */
@@ -109,27 +103,23 @@
out4 = (q15_t) __SSAT(mul4 >> 15U, 16);
/* pack real and imaginary outputs and store them to destination */
- *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16);
- *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16);
+ write_q15x2_ia (&pCmplxDst, __PKHBT(out1, out2, 16));
+ write_q15x2_ia (&pCmplxDst, __PKHBT(out3, out4, 16));
- inA1 = *__SIMD32(pSrcCmplx)++;
- inB1 = *__SIMD32(pSrcReal)++;
- inA2 = *__SIMD32(pSrcCmplx)++;
+ inA1 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+ inA2 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+ inB1 = read_q15x2_ia ((q15_t **) &pSrcReal);
#ifndef ARM_MATH_BIG_ENDIAN
-
- mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
+ mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
- mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
+ mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
-
#else
-
mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
- mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
+ mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
-
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
out1 = (q15_t) __SSAT(mul1 >> 15U, 16);
@@ -137,55 +127,56 @@
out3 = (q15_t) __SSAT(mul3 >> 15U, 16);
out4 = (q15_t) __SSAT(mul4 >> 15U, 16);
- *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16);
- *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16);
-
- /* Decrement the numSamples loop counter */
- blkCnt--;
- }
-
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = numSamples % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* C[2 * i] = A[2 * i] * B[i]. */
- /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+ write_q15x2_ia (&pCmplxDst, __PKHBT(out1, out2, 16));
+ write_q15x2_ia (&pCmplxDst, __PKHBT(out3, out4, 16));
+#else
in = *pSrcReal++;
- /* store the result in the destination buffer. */
- *pCmplxDst++ =
- (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
- *pCmplxDst++ =
- (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
+ *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+ *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
- /* Decrement the numSamples loop counter */
+ in = *pSrcReal++;
+ *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+ *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+
+ in = *pSrcReal++;
+ *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+ *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+
+ in = *pSrcReal++;
+ *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+ *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = numSamples % 0x4U;
+
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numSamples;
- while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
{
- /* realOut = realA * realB. */
- /* imagOut = imagA * realB. */
+ /* C[2 * i ] = A[2 * i ] * B[i]. */
+ /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
in = *pSrcReal++;
/* store the result in the destination buffer. */
- *pCmplxDst++ =
- (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
- *pCmplxDst++ =
- (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
+ *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+ *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
- /* Decrement the numSamples loop counter */
- numSamples--;
+ /* Decrement loop counter */
+ blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of CmplxByRealMult group
+ @} end of CmplxByRealMult group
*/
diff --git a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
index 19fc55b..8ff6581 100644
--- a/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
+++ b/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_mult_real_q31.c
* Description: Q31 complex by real multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,183 +29,120 @@
#include "arm_math.h"
/**
- * @ingroup groupCmplxMath
+ @ingroup groupCmplxMath
*/
/**
- * @addtogroup CmplxByRealMult
- * @{
+ @addtogroup CmplxByRealMult
+ @{
*/
-
/**
- * @brief Q31 complex-by-real multiplication
- * @param[in] *pSrcCmplx points to the complex input vector
- * @param[in] *pSrcReal points to the real input vector
- * @param[out] *pCmplxDst points to the complex output vector
- * @param[in] numSamples number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
+ @brief Q31 complex-by-real multiplication.
+ @param[in] pSrcCmplx points to complex input vector
+ @param[in] pSrcReal points to real input vector
+ @param[out] pCmplxDst points to complex output vector
+ @param[in] numSamples number of samples in each vector
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
*/
void arm_cmplx_mult_real_q31(
- q31_t * pSrcCmplx,
- q31_t * pSrcReal,
- q31_t * pCmplxDst,
- uint32_t numSamples)
+ const q31_t * pSrcCmplx,
+ const q31_t * pSrcReal,
+ q31_t * pCmplxDst,
+ uint32_t numSamples)
{
- q31_t inA1; /* Temporary variable to store input value */
+ uint32_t blkCnt; /* Loop counter */
+ q31_t in; /* Temporary variable */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- uint32_t blkCnt; /* loop counters */
- q31_t inA2, inA3, inA4; /* Temporary variables to hold input data */
- q31_t inB1, inB2; /* Temporary variabels to hold input data */
- q31_t out1, out2, out3, out4; /* Temporary variables to hold output data */
-
- /* loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C[2 * i] = A[2 * i] * B[i]. */
- /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
- /* read real input from complex input buffer */
- inA1 = *pSrcCmplx++;
- inA2 = *pSrcCmplx++;
- /* read input from real input bufer */
- inB1 = *pSrcReal++;
- inB2 = *pSrcReal++;
- /* read imaginary input from complex input buffer */
- inA3 = *pSrcCmplx++;
- inA4 = *pSrcCmplx++;
+ /* C[2 * i ] = A[2 * i ] * B[i]. */
+ /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
- /* multiply complex input with real input */
- out1 = ((q63_t) inA1 * inB1) >> 32;
- out2 = ((q63_t) inA2 * inB1) >> 32;
- out3 = ((q63_t) inA3 * inB2) >> 32;
- out4 = ((q63_t) inA4 * inB2) >> 32;
+ in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+ /* store saturated result in 1.31 format to destination buffer */
+ *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+ *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+ /* store result in destination buffer. */
+ *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+ *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
- /* sature the result */
- out1 = __SSAT(out1, 31);
- out2 = __SSAT(out2, 31);
- out3 = __SSAT(out3, 31);
- out4 = __SSAT(out4, 31);
+ in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+ *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+ *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+ *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+ *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
- /* get result in 1.31 format */
- out1 = out1 << 1;
- out2 = out2 << 1;
- out3 = out3 << 1;
- out4 = out4 << 1;
+ in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+ *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+ *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+ *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+ *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
- /* store the result to destination buffer */
- *pCmplxDst++ = out1;
- *pCmplxDst++ = out2;
- *pCmplxDst++ = out3;
- *pCmplxDst++ = out4;
+ in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+ *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+ *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+ *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+ *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
- /* read real input from complex input buffer */
- inA1 = *pSrcCmplx++;
- inA2 = *pSrcCmplx++;
- /* read input from real input bufer */
- inB1 = *pSrcReal++;
- inB2 = *pSrcReal++;
- /* read imaginary input from complex input buffer */
- inA3 = *pSrcCmplx++;
- inA4 = *pSrcCmplx++;
-
- /* multiply complex input with real input */
- out1 = ((q63_t) inA1 * inB1) >> 32;
- out2 = ((q63_t) inA2 * inB1) >> 32;
- out3 = ((q63_t) inA3 * inB2) >> 32;
- out4 = ((q63_t) inA4 * inB2) >> 32;
-
- /* sature the result */
- out1 = __SSAT(out1, 31);
- out2 = __SSAT(out2, 31);
- out3 = __SSAT(out3, 31);
- out4 = __SSAT(out4, 31);
-
- /* get result in 1.31 format */
- out1 = out1 << 1;
- out2 = out2 << 1;
- out3 = out3 << 1;
- out4 = out4 << 1;
-
- /* store the result to destination buffer */
- *pCmplxDst++ = out1;
- *pCmplxDst++ = out2;
- *pCmplxDst++ = out3;
- *pCmplxDst++ = out4;
-
- /* Decrement the numSamples loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
- while (blkCnt > 0U)
- {
- /* C[2 * i] = A[2 * i] * B[i]. */
- /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
- /* read real input from complex input buffer */
- inA1 = *pSrcCmplx++;
- inA2 = *pSrcCmplx++;
- /* read input from real input bufer */
- inB1 = *pSrcReal++;
-
- /* multiply complex input with real input */
- out1 = ((q63_t) inA1 * inB1) >> 32;
- out2 = ((q63_t) inA2 * inB1) >> 32;
-
- /* sature the result */
- out1 = __SSAT(out1, 31);
- out2 = __SSAT(out2, 31);
-
- /* get result in 1.31 format */
- out1 = out1 << 1;
- out2 = out2 << 1;
-
- /* store the result to destination buffer */
- *pCmplxDst++ = out1;
- *pCmplxDst++ = out2;
-
- /* Decrement the numSamples loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numSamples;
- while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
{
- /* realOut = realA * realB. */
- /* imagReal = imagA * realB. */
- inA1 = *pSrcReal++;
- /* store the result in the destination buffer. */
- *pCmplxDst++ =
- (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * inA1) >> 31);
- *pCmplxDst++ =
- (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * inA1) >> 31);
+ /* C[2 * i ] = A[2 * i ] * B[i]. */
+ /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
- /* Decrement the numSamples loop counter */
- numSamples--;
+ in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+ /* store saturated result in 1.31 format to destination buffer */
+ *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+ *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+ /* store result in destination buffer. */
+ *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+ *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
+
+ /* Decrement loop counter */
+ blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of CmplxByRealMult group
+ @} end of CmplxByRealMult group
*/
diff --git a/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c b/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c
new file mode 100644
index 0000000..f2a8a4c
--- /dev/null
+++ b/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c
@@ -0,0 +1,10 @@
+
+#include "arm_pid_init_f32.c"
+#include "arm_pid_init_q15.c"
+#include "arm_pid_init_q31.c"
+#include "arm_pid_reset_f32.c"
+#include "arm_pid_reset_q15.c"
+#include "arm_pid_reset_q31.c"
+#include "arm_sin_cos_f32.c"
+#include "arm_sin_cos_q31.c"
+
diff --git a/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c b/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c
index f75d61f..6272d3c 100644
--- a/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c
+++ b/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_pid_init_f32.c
* Description: Floating-point PID Control initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -28,29 +28,30 @@
#include "arm_math.h"
- /**
- * @addtogroup PID
- * @{
+/**
+ @addtogroup PID
+ @{
*/
/**
- * @brief Initialization function for the floating-point PID Control.
- * @param[in,out] *S points to an instance of the PID structure.
- * @param[in] resetStateFlag flag to reset the state. 0 = no change in state & 1 = reset the state.
- * @return none.
- * \par Description:
- * \par
- * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
- * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
- * also sets the state variables to all zeros.
+ @brief Initialization function for the floating-point PID Control.
+ @param[in,out] S points to an instance of the PID structure
+ @param[in] resetStateFlag
+ - value = 0: no change in state
+ - value = 1: reset state
+ @return none
+
+ @par Details
+ The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
+ The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
+ using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
+ also sets the state variables to all zeros.
*/
void arm_pid_init_f32(
arm_pid_instance_f32 * S,
int32_t resetStateFlag)
{
-
/* Derived coefficient A0 */
S->A0 = S->Kp + S->Ki + S->Kd;
@@ -63,12 +64,12 @@
/* Check whether state needs reset or not */
if (resetStateFlag)
{
- /* Clear the state buffer. The size will be always 3 samples */
+ /* Reset state to zero, The size will be always 3 samples */
memset(S->state, 0, 3U * sizeof(float32_t));
}
}
/**
- * @} end of PID group
+ @} end of PID group
*/
diff --git a/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c b/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c
index 61049cf..63b8424 100644
--- a/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c
+++ b/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c
@@ -3,13 +3,13 @@
* Title: arm_pid_init_q15.c
* Description: Q15 PID Control initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -28,22 +28,24 @@
#include "arm_math.h"
- /**
- * @addtogroup PID
- * @{
+/**
+ @addtogroup PID
+ @{
*/
/**
- * @details
- * @param[in,out] *S points to an instance of the Q15 PID structure.
- * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
- * @return none.
- * \par Description:
- * \par
- * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
- * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
- * also sets the state variables to all zeros.
+ @brief Initialization function for the Q15 PID Control.
+ @param[in,out] S points to an instance of the Q15 PID structure
+ @param[in] resetStateFlag
+ - value = 0: no change in state
+ - value = 1: reset state
+ @return none
+
+ @par Details
+ The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
+ The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
+ using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
+ also sets the state variables to all zeros.
*/
void arm_pid_init_q15(
@@ -53,35 +55,20 @@
#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
/* Derived coefficient A0 */
S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
/* Derived coefficients and pack into A1 */
#ifndef ARM_MATH_BIG_ENDIAN
-
S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
-
#else
-
S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Check whether state needs reset or not */
- if (resetStateFlag)
- {
- /* Clear the state buffer. The size will be always 3 samples */
- memset(S->state, 0, 3U * sizeof(q15_t));
- }
+#endif
#else
- /* Run the below code for Cortex-M0 */
-
- q31_t temp; /*to store the sum */
+ q31_t temp; /* to store the sum */
/* Derived coefficient A0 */
temp = S->Kp + S->Ki + S->Kd;
@@ -92,19 +79,17 @@
S->A1 = (q15_t) __SSAT(temp, 16);
S->A2 = S->Kd;
-
+#endif /* #if defined (ARM_MATH_DSP) */
/* Check whether state needs reset or not */
if (resetStateFlag)
{
- /* Clear the state buffer. The size will be always 3 samples */
+ /* Reset state to zero, The size will be always 3 samples */
memset(S->state, 0, 3U * sizeof(q15_t));
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of PID group
+ @} end of PID group
*/
diff --git a/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c b/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c
index 17b3b09..2e4e231 100644
--- a/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c
+++ b/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_pid_init_q31.c
* Description: Q31 PID Control initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -28,22 +28,24 @@
#include "arm_math.h"
- /**
- * @addtogroup PID
- * @{
+/**
+ @addtogroup PID
+ @{
*/
/**
- * @brief Initialization function for the Q31 PID Control.
- * @param[in,out] *S points to an instance of the Q31 PID structure.
- * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
- * @return none.
- * \par Description:
- * \par
- * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
- * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
- * also sets the state variables to all zeros.
+ @brief Initialization function for the Q31 PID Control.
+ @param[in,out] S points to an instance of the Q31 PID structure
+ @param[in] resetStateFlag
+ - value = 0: no change in state
+ - value = 1: reset state
+ @return none
+
+ @par Details
+ The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
+ The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
+ using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
+ also sets the state variables to all zeros.
*/
void arm_pid_init_q31(
@@ -53,20 +55,15 @@
#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
/* Derived coefficient A0 */
S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
/* Derived coefficient A1 */
S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
-
#else
- /* Run the below code for Cortex-M0 */
-
- q31_t temp;
+ q31_t temp; /* to store the sum */
/* Derived coefficient A0 */
temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
@@ -84,12 +81,12 @@
/* Check whether state needs reset or not */
if (resetStateFlag)
{
- /* Clear the state buffer. The size will be always 3 samples */
+ /* Reset state to zero, The size will be always 3 samples */
memset(S->state, 0, 3U * sizeof(q31_t));
}
}
/**
- * @} end of PID group
+ @} end of PID group
*/
diff --git a/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c b/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c
index 318ec89..0ad2c1c 100644
--- a/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c
+++ b/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c
@@ -3,13 +3,13 @@
* Title: arm_pid_reset_f32.c
* Description: Floating-point PID Control reset function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -28,26 +28,27 @@
#include "arm_math.h"
- /**
- * @addtogroup PID
- * @{
+/**
+ @addtogroup PID
+ @{
*/
/**
-* @brief Reset function for the floating-point PID Control.
-* @param[in] *S Instance pointer of PID control data structure.
-* @return none.
-* \par Description:
-* The function resets the state buffer to zeros.
-*/
+ @brief Reset function for the floating-point PID Control.
+ @param[in,out] S points to an instance of the floating-point PID structure
+ @return none
+
+ @par Details
+ The function resets the state buffer to zeros.
+ */
+
void arm_pid_reset_f32(
arm_pid_instance_f32 * S)
{
-
- /* Clear the state buffer. The size will be always 3 samples */
+ /* Reset state to zero, The size will be always 3 samples */
memset(S->state, 0, 3U * sizeof(float32_t));
}
/**
- * @} end of PID group
+ @} end of PID group
*/
diff --git a/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c b/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c
index 93c0e7c..2e2def1 100644
--- a/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c
+++ b/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c
@@ -3,13 +3,13 @@
* Title: arm_pid_reset_q15.c
* Description: Q15 PID Control reset function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -28,18 +28,20 @@
#include "arm_math.h"
- /**
- * @addtogroup PID
- * @{
+/**
+ @addtogroup PID
+ @{
*/
/**
-* @brief Reset function for the Q15 PID Control.
-* @param[in] *S Instance pointer of PID control data structure.
-* @return none.
-* \par Description:
-* The function resets the state buffer to zeros.
-*/
+ @brief Reset function for the Q15 PID Control.
+ @param[in,out] S points to an instance of the Q15 PID structure
+ @return none
+
+ @par Details
+ The function resets the state buffer to zeros.
+ */
+
void arm_pid_reset_q15(
arm_pid_instance_q15 * S)
{
@@ -48,5 +50,5 @@
}
/**
- * @} end of PID group
+ @} end of PID group
*/
diff --git a/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c b/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c
index 4c5b14e..3288e74 100644
--- a/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c
+++ b/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c
@@ -3,13 +3,13 @@
* Title: arm_pid_reset_q31.c
* Description: Q31 PID Control reset function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -28,26 +28,27 @@
#include "arm_math.h"
- /**
- * @addtogroup PID
- * @{
+/**
+ @addtogroup PID
+ @{
*/
/**
-* @brief Reset function for the Q31 PID Control.
-* @param[in] *S Instance pointer of PID control data structure.
-* @return none.
-* \par Description:
-* The function resets the state buffer to zeros.
-*/
+ @brief Reset function for the Q31 PID Control.
+ @param[in,out] S points to an instance of the Q31 PID structure
+ @return none
+
+ @par Details
+ The function resets the state buffer to zeros.
+ */
+
void arm_pid_reset_q31(
arm_pid_instance_q31 * S)
{
-
- /* Clear the state buffer. The size will be always 3 samples */
+ /* Reset state to zero, The size will be always 3 samples */
memset(S->state, 0, 3U * sizeof(q31_t));
}
/**
- * @} end of PID group
+ @} end of PID group
*/
diff --git a/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c b/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c
index 7ec1b53..11a9031 100644
--- a/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c
+++ b/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c
@@ -3,13 +3,13 @@
* Title: arm_sin_cos_f32.c
* Description: Sine and Cosine calculation for floating-point values
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,115 +30,117 @@
#include "arm_common_tables.h"
/**
- * @ingroup groupController
+ @ingroup groupController
*/
/**
- * @defgroup SinCos Sine Cosine
- *
- * Computes the trigonometric sine and cosine values using a combination of table lookup
- * and linear interpolation.
- * There are separate functions for Q31 and floating-point data types.
- * The input to the floating-point version is in degrees while the
- * fixed-point Q31 have a scaled input with the range
- * [-1 0.9999] mapping to [-180 +180] degrees.
- *
- * The floating point function also allows values that are out of the usual range. When this happens, the function will
- * take extra time to adjust the input value to the range of [-180 180].
- *
- * The result is accurate to 5 digits after the decimal point.
- *
- * The implementation is based on table lookup using 360 values together with linear interpolation.
- * The steps used are:
- * -# Calculation of the nearest integer table index.
- * -# Compute the fractional portion (fract) of the input.
- * -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1.
- * -# Sine value is computed as <code> *psinVal = y0 + (fract * (y1 - y0))</code>.
- * -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1.
- * -# Cosine value is computed as <code> *pcosVal = y0 + (fract * (y1 - y0))</code>.
- */
+ @defgroup SinCos Sine Cosine
- /**
- * @addtogroup SinCos
- * @{
+ Computes the trigonometric sine and cosine values using a combination of table lookup
+ and linear interpolation.
+ There are separate functions for Q31 and floating-point data types.
+ The input to the floating-point version is in degrees while the
+ fixed-point Q31 have a scaled input with the range
+ [-1 0.9999] mapping to [-180 +180] degrees.
+
+ The floating point function also allows values that are out of the usual range. When this happens, the function will
+ take extra time to adjust the input value to the range of [-180 180].
+
+ The result is accurate to 5 digits after the decimal point.
+
+ The implementation is based on table lookup using 360 values together with linear interpolation.
+ The steps used are:
+ -# Calculation of the nearest integer table index.
+ -# Compute the fractional portion (fract) of the input.
+ -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1.
+ -# Sine value is computed as <code> *psinVal = y0 + (fract * (y1 - y0))</code>.
+ -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1.
+ -# Cosine value is computed as <code> *pcosVal = y0 + (fract * (y1 - y0))</code>.
*/
/**
- * @brief Floating-point sin_cos function.
- * @param[in] theta input value in degrees
- * @param[out] *pSinVal points to the processed sine output.
- * @param[out] *pCosVal points to the processed cos output.
- * @return none.
+ @addtogroup SinCos
+ @{
+ */
+
+/**
+ @brief Floating-point sin_cos function.
+ @param[in] theta input value in degrees
+ @param[out] pSinVal points to processed sine output
+ @param[out] pCosVal points to processed cosine output
+ @return none
*/
void arm_sin_cos_f32(
- float32_t theta,
- float32_t * pSinVal,
- float32_t * pCosVal)
+ float32_t theta,
+ float32_t * pSinVal,
+ float32_t * pCosVal)
{
- float32_t fract, in; /* Temporary variables for input, output */
- uint16_t indexS, indexC; /* Index variable */
- float32_t f1, f2, d1, d2; /* Two nearest output values */
- float32_t findex, Dn, Df, temp;
+ float32_t fract, in; /* Temporary input, output variables */
+ uint16_t indexS, indexC; /* Index variable */
+ float32_t f1, f2, d1, d2; /* Two nearest output values */
+ float32_t Dn, Df;
+ float32_t temp, findex;
- /* input x is in degrees */
- /* Scale the input, divide input by 360, for cosine add 0.25 (pi/2) to read sine table */
- in = theta * 0.00277777777778f;
+ /* input x is in degrees */
+ /* Scale input, divide input by 360, for cosine add 0.25 (pi/2) to read sine table */
+ in = theta * 0.00277777777778f;
- if (in < 0.0f)
- {
- in = -in;
- }
+ if (in < 0.0f)
+ {
+ in = -in;
+ }
- in = in - (int32_t)in;
+ in = in - (int32_t)in;
- /* Calculation of index of the table */
- findex = (float32_t) FAST_MATH_TABLE_SIZE * in;
- indexS = ((uint16_t)findex) & 0x1ff;
- indexC = (indexS + (FAST_MATH_TABLE_SIZE / 4)) & 0x1ff;
+ /* Calculate the nearest index */
+ findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
+ indexS = ((uint16_t)findex) & 0x1ff;
+ indexC = (indexS + (FAST_MATH_TABLE_SIZE / 4)) & 0x1ff;
- /* fractional value calculation */
- fract = findex - (float32_t) indexS;
+ /* Calculation of fractional value */
+ fract = findex - (float32_t) indexS;
- /* Read two nearest values of input value from the cos & sin tables */
- f1 = sinTable_f32[indexC+0];
- f2 = sinTable_f32[indexC+1];
- d1 = -sinTable_f32[indexS+0];
- d2 = -sinTable_f32[indexS+1];
+ /* Read two nearest values of input value from the cos & sin tables */
+ f1 = sinTable_f32[indexC ];
+ f2 = sinTable_f32[indexC+1];
+ d1 = -sinTable_f32[indexS ];
+ d2 = -sinTable_f32[indexS+1];
- temp = (1.0f - fract) * f1 + fract * f2;
+ temp = (1.0f - fract) * f1 + fract * f2;
- Dn = 0.0122718463030f; // delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE
- Df = f2 - f1; // delta between the values of the functions
+ Dn = 0.0122718463030f; /* delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE */
+ Df = f2 - f1; /* delta between the values of the functions */
- temp = Dn *(d1 + d2) - 2 * Df;
- temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
- temp = fract * temp + d1 * Dn;
+ temp = Dn * (d1 + d2) - 2 * Df;
+ temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
+ temp = fract * temp + d1 * Dn;
- /* Calculation of cosine value */
- *pCosVal = fract * temp + f1;
+ /* Calculation of cosine value */
+ *pCosVal = fract * temp + f1;
- /* Read two nearest values of input value from the cos & sin tables */
- f1 = sinTable_f32[indexS+0];
- f2 = sinTable_f32[indexS+1];
- d1 = sinTable_f32[indexC+0];
- d2 = sinTable_f32[indexC+1];
+ /* Read two nearest values of input value from the cos & sin tables */
+ f1 = sinTable_f32[indexS ];
+ f2 = sinTable_f32[indexS+1];
+ d1 = sinTable_f32[indexC ];
+ d2 = sinTable_f32[indexC+1];
- temp = (1.0f - fract) * f1 + fract * f2;
+ temp = (1.0f - fract) * f1 + fract * f2;
- Df = f2 - f1; // delta between the values of the functions
- temp = Dn*(d1 + d2) - 2*Df;
- temp = fract*temp + (3*Df - (d2 + 2*d1)*Dn);
- temp = fract*temp + d1*Dn;
+ Df = f2 - f1; // delta between the values of the functions
+ temp = Dn * (d1 + d2) - 2 * Df;
+ temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
+ temp = fract * temp + d1 * Dn;
- /* Calculation of sine value */
- *pSinVal = fract*temp + f1;
+ /* Calculation of sine value */
+ *pSinVal = fract * temp + f1;
- if (theta < 0.0f)
- {
- *pSinVal = -*pSinVal;
- }
+ if (theta < 0.0f)
+ {
+ *pSinVal = -*pSinVal;
+ }
}
+
/**
- * @} end of SinCos group
+ @} end of SinCos group
*/
diff --git a/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c b/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c
index d661830..e232d39 100644
--- a/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c
+++ b/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c
@@ -3,13 +3,13 @@
* Title: arm_sin_cos_q31.c
* Description: Cosine & Sine calculation for Q31 values
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,23 +30,22 @@
#include "arm_common_tables.h"
/**
- * @ingroup groupController
- */
-
- /**
- * @addtogroup SinCos
- * @{
+ @ingroup groupController
*/
/**
- * @brief Q31 sin_cos function.
- * @param[in] theta scaled input value in degrees
- * @param[out] *pSinVal points to the processed sine output.
- * @param[out] *pCosVal points to the processed cosine output.
- * @return none.
- *
- * The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179].
- *
+ @addtogroup SinCos
+ @{
+ */
+
+/**
+ @brief Q31 sin_cos function.
+ @param[in] theta scaled input value in degrees
+ @param[out] pSinVal points to processed sine output
+ @param[out] pCosVal points to processed cosine output
+ @return none
+
+ The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179].
*/
void arm_sin_cos_q31(
@@ -54,9 +53,9 @@
q31_t * pSinVal,
q31_t * pCosVal)
{
- q31_t fract; /* Temporary variables for input, output */
- uint16_t indexS, indexC; /* Index variable */
- q31_t f1, f2, d1, d2; /* Two nearest output values */
+ q31_t fract; /* Temporary input, output variables */
+ uint16_t indexS, indexC; /* Index variable */
+ q31_t f1, f2, d1, d2; /* Two nearest output values */
q31_t Dn, Df;
q63_t temp;
@@ -68,43 +67,44 @@
fract = (theta - (indexS << CONTROLLER_Q31_SHIFT)) << 8;
/* Read two nearest values of input value from the cos & sin tables */
- f1 = sinTable_q31[indexC+0];
- f2 = sinTable_q31[indexC+1];
- d1 = -sinTable_q31[indexS+0];
+ f1 = sinTable_q31[indexC ];
+ f2 = sinTable_q31[indexC+1];
+ d1 = -sinTable_q31[indexS ];
d2 = -sinTable_q31[indexS+1];
- Dn = 0x1921FB5; // delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE
- Df = f2 - f1; // delta between the values of the functions
- temp = Dn*((q63_t)d1 + d2);
+ Dn = 0x1921FB5; /* delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE */
+ Df = f2 - f1; /* delta between the values of the functions */
+
+ temp = Dn * ((q63_t)d1 + d2);
temp = temp - ((q63_t)Df << 32);
- temp = (q63_t)fract*(temp >> 31);
- temp = temp + ((3*(q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1))*Dn);
- temp = (q63_t)fract*(temp >> 31);
- temp = temp + (q63_t)d1*Dn;
- temp = (q63_t)fract*(temp >> 31);
+ temp = (q63_t)fract * (temp >> 31);
+ temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
+ temp = (q63_t)fract * (temp >> 31);
+ temp = temp + (q63_t)d1 * Dn;
+ temp = (q63_t)fract * (temp >> 31);
/* Calculation of cosine value */
*pCosVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
/* Read two nearest values of input value from the cos & sin tables */
- f1 = sinTable_q31[indexS+0];
+ f1 = sinTable_q31[indexS ];
f2 = sinTable_q31[indexS+1];
- d1 = sinTable_q31[indexC+0];
+ d1 = sinTable_q31[indexC ];
d2 = sinTable_q31[indexC+1];
Df = f2 - f1; // delta between the values of the functions
- temp = Dn*((q63_t)d1 + d2);
+ temp = Dn * ((q63_t)d1 + d2);
temp = temp - ((q63_t)Df << 32);
- temp = (q63_t)fract*(temp >> 31);
- temp = temp + ((3*(q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1))*Dn);
- temp = (q63_t)fract*(temp >> 31);
- temp = temp + (q63_t)d1*Dn;
- temp = (q63_t)fract*(temp >> 31);
+ temp = (q63_t)fract * (temp >> 31);
+ temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
+ temp = (q63_t)fract * (temp >> 31);
+ temp = temp + (q63_t)d1 * Dn;
+ temp = (q63_t)fract * (temp >> 31);
/* Calculation of sine value */
*pSinVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
}
/**
- * @} end of SinCos group
+ @} end of SinCos group
*/
diff --git a/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c b/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c
new file mode 100644
index 0000000..5ac8d26
--- /dev/null
+++ b/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c
@@ -0,0 +1,10 @@
+
+#include "arm_cos_f32.c"
+#include "arm_cos_q15.c"
+#include "arm_cos_q31.c"
+#include "arm_sin_f32.c"
+#include "arm_sin_q15.c"
+#include "arm_sin_q31.c"
+#include "arm_sqrt_q15.c"
+#include "arm_sqrt_q31.c"
+
diff --git a/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c b/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c
index 35185f9..0697368 100644
--- a/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c
+++ b/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c
@@ -3,13 +3,13 @@
* Title: arm_cos_f32.c
* Description: Fast cosine calculation for floating-point values
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -28,56 +28,57 @@
#include "arm_math.h"
#include "arm_common_tables.h"
+
/**
- * @ingroup groupFastMath
+ @ingroup groupFastMath
*/
/**
- * @defgroup cos Cosine
- *
- * Computes the trigonometric cosine function using a combination of table lookup
- * and linear interpolation. There are separate functions for
- * Q15, Q31, and floating-point data types.
- * The input to the floating-point version is in radians while the
- * fixed-point Q15 and Q31 have a scaled input with the range
- * [0 +0.9999] mapping to [0 2*pi). The fixed-point range is chosen so that a
- * value of 2*pi wraps around to 0.
- *
- * The implementation is based on table lookup using 256 values together with linear interpolation.
- * The steps used are:
- * -# Calculation of the nearest integer table index
- * -# Compute the fractional portion (fract) of the table index.
- * -# The final result equals <code>(1.0f-fract)*a + fract*b;</code>
- *
- * where
- * <pre>
- * b=Table[index+0];
- * c=Table[index+1];
- * </pre>
- */
+ @defgroup cos Cosine
- /**
- * @addtogroup cos
- * @{
+ Computes the trigonometric cosine function using a combination of table lookup
+ and linear interpolation. There are separate functions for
+ Q15, Q31, and floating-point data types.
+ The input to the floating-point version is in radians while the
+ fixed-point Q15 and Q31 have a scaled input with the range
+ [0 +0.9999] mapping to [0 2*pi). The fixed-point range is chosen so that a
+ value of 2*pi wraps around to 0.
+
+ The implementation is based on table lookup using 256 values together with linear interpolation.
+ The steps used are:
+ -# Calculation of the nearest integer table index
+ -# Compute the fractional portion (fract) of the table index.
+ -# The final result equals <code>(1.0f-fract)*a + fract*b;</code>
+
+ where
+ <pre>
+ b = Table[index];
+ c = Table[index+1];
+ </pre>
*/
/**
- * @brief Fast approximation to the trigonometric cosine function for floating-point data.
- * @param[in] x input value in radians.
- * @return cos(x).
+ @addtogroup cos
+ @{
+ */
+
+/**
+ @brief Fast approximation to the trigonometric cosine function for floating-point data.
+ @param[in] x input value in radians
+ @return cos(x)
*/
float32_t arm_cos_f32(
float32_t x)
{
- float32_t cosVal, fract, in; /* Temporary variables for input, output */
+ float32_t cosVal, fract, in; /* Temporary input, output variables */
uint16_t index; /* Index variable */
float32_t a, b; /* Two nearest output values */
int32_t n;
float32_t findex;
/* input x is in radians */
- /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi, add 0.25 (pi/2) to read sine table */
+ /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi, add 0.25 (pi/2) to read sine table */
in = x * 0.159154943092f + 0.25f;
/* Calculation of floor value of input */
@@ -110,12 +111,12 @@
b = sinTable_f32[index+1];
/* Linear interpolation process */
- cosVal = (1.0f-fract)*a + fract*b;
+ cosVal = (1.0f - fract) * a + fract * b;
- /* Return the output value */
+ /* Return output value */
return (cosVal);
}
/**
- * @} end of cos group
+ @} end of cos group
*/
diff --git a/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c b/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c
index 7fa2e18..ee6746c 100644
--- a/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c
+++ b/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c
@@ -3,13 +3,13 @@
* Title: arm_cos_q15.c
* Description: Fast cosine calculation for Q15 values
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,36 +30,35 @@
#include "arm_common_tables.h"
/**
- * @ingroup groupFastMath
- */
-
- /**
- * @addtogroup cos
- * @{
+ @ingroup groupFastMath
*/
/**
- * @brief Fast approximation to the trigonometric cosine function for Q15 data.
- * @param[in] x Scaled input value in radians.
- * @return cos(x).
- *
- * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian
- * value in the range [0 2*pi).
+ @addtogroup cos
+ @{
+ */
+
+/**
+ @brief Fast approximation to the trigonometric cosine function for Q15 data.
+ @param[in] x Scaled input value in radians
+ @return cos(x)
+
+ The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
*/
q15_t arm_cos_q15(
q15_t x)
{
- q15_t cosVal; /* Temporary variables for input, output */
- int32_t index; /* Index variables */
- q15_t a, b; /* Four nearest output values */
+ q15_t cosVal; /* Temporary input, output variables */
+ int32_t index; /* Index variable */
+ q15_t a, b; /* Two nearest output values */
q15_t fract; /* Temporary values for fractional values */
/* add 0.25 (pi/2) to read sine table */
x = (uint16_t)x + 0x2000;
if (x < 0)
- { /* convert negative numbers to corresponding positive ones */
- x = (uint16_t)x + 0x8000;
+ { /* convert negative numbers to corresponding positive ones */
+ x = (uint16_t)x + 0x8000;
}
/* Calculate the nearest index */
@@ -73,12 +72,13 @@
b = sinTable_q15[index+1];
/* Linear interpolation process */
- cosVal = (q31_t)(0x8000-fract)*a >> 16;
- cosVal = (q15_t)((((q31_t)cosVal << 16) + ((q31_t)fract*b)) >> 16);
+ cosVal = (q31_t) (0x8000 - fract) * a >> 16;
+ cosVal = (q15_t) ((((q31_t) cosVal << 16) + ((q31_t) fract * b)) >> 16);
- return cosVal << 1;
+ /* Return output value */
+ return (cosVal << 1);
}
/**
- * @} end of cos group
+ @} end of cos group
*/
diff --git a/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c b/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c
index fde5368..7615c21 100644
--- a/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c
+++ b/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c
@@ -3,13 +3,13 @@
* Title: arm_cos_q31.c
* Description: Fast cosine calculation for Q31 values
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,36 +30,35 @@
#include "arm_common_tables.h"
/**
- * @ingroup groupFastMath
- */
-
- /**
- * @addtogroup cos
- * @{
+ @ingroup groupFastMath
*/
/**
- * @brief Fast approximation to the trigonometric cosine function for Q31 data.
- * @param[in] x Scaled input value in radians.
- * @return cos(x).
- *
- * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian
- * value in the range [0 2*pi).
+ @addtogroup cos
+ @{
+ */
+
+/**
+ @brief Fast approximation to the trigonometric cosine function for Q31 data.
+ @param[in] x Scaled input value in radians
+ @return cos(x)
+
+ The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
*/
q31_t arm_cos_q31(
q31_t x)
{
- q31_t cosVal; /* Temporary variables for input, output */
- int32_t index; /* Index variables */
- q31_t a, b; /* Four nearest output values */
+ q31_t cosVal; /* Temporary input, output variables */
+ int32_t index; /* Index variable */
+ q31_t a, b; /* Two nearest output values */
q31_t fract; /* Temporary values for fractional values */
/* add 0.25 (pi/2) to read sine table */
x = (uint32_t)x + 0x20000000;
if (x < 0)
- { /* convert negative numbers to corresponding positive ones */
- x = (uint32_t)x + 0x80000000;
+ { /* convert negative numbers to corresponding positive ones */
+ x = (uint32_t)x + 0x80000000;
}
/* Calculate the nearest index */
@@ -73,12 +72,13 @@
b = sinTable_q31[index+1];
/* Linear interpolation process */
- cosVal = (q63_t)(0x80000000-fract)*a >> 32;
- cosVal = (q31_t)((((q63_t)cosVal << 32) + ((q63_t)fract*b)) >> 32);
+ cosVal = (q63_t) (0x80000000 - fract) * a >> 32;
+ cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) fract * b)) >> 32);
- return cosVal << 1;
+ /* Return output value */
+ return (cosVal << 1);
}
/**
- * @} end of cos group
+ @} end of cos group
*/
diff --git a/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c b/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c
index ecf1846..3fa6b9a 100644
--- a/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c
+++ b/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c
@@ -3,13 +3,13 @@
* Title: arm_sin_f32.c
* Description: Fast sine calculation for floating-point values
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -28,65 +28,64 @@
#include "arm_math.h"
#include "arm_common_tables.h"
-#include <math.h>
/**
- * @ingroup groupFastMath
+ @ingroup groupFastMath
*/
/**
- * @defgroup sin Sine
- *
- * Computes the trigonometric sine function using a combination of table lookup
- * and linear interpolation. There are separate functions for
- * Q15, Q31, and floating-point data types.
- * The input to the floating-point version is in radians while the
- * fixed-point Q15 and Q31 have a scaled input with the range
- * [0 +0.9999] mapping to [0 2*pi). The fixed-point range is chosen so that a
- * value of 2*pi wraps around to 0.
- *
- * The implementation is based on table lookup using 256 values together with linear interpolation.
- * The steps used are:
- * -# Calculation of the nearest integer table index
- * -# Compute the fractional portion (fract) of the table index.
- * -# The final result equals <code>(1.0f-fract)*a + fract*b;</code>
- *
- * where
- * <pre>
- * b=Table[index+0];
- * c=Table[index+1];
- * </pre>
+ @defgroup sin Sine
+
+ Computes the trigonometric sine function using a combination of table lookup
+ and linear interpolation. There are separate functions for
+ Q15, Q31, and floating-point data types.
+ The input to the floating-point version is in radians while the
+ fixed-point Q15 and Q31 have a scaled input with the range
+ [0 +0.9999] mapping to [0 2*pi). The fixed-point range is chosen so that a
+ value of 2*pi wraps around to 0.
+
+ The implementation is based on table lookup using 256 values together with linear interpolation.
+ The steps used are:
+ -# Calculation of the nearest integer table index
+ -# Compute the fractional portion (fract) of the table index.
+ -# The final result equals <code>(1.0f-fract)*a + fract*b;</code>
+
+ where
+ <pre>
+ b = Table[index];
+ c = Table[index+1];
+ </pre>
*/
/**
- * @addtogroup sin
- * @{
+ @addtogroup sin
+ @{
*/
/**
- * @brief Fast approximation to the trigonometric sine function for floating-point data.
- * @param[in] x input value in radians.
- * @return sin(x).
+ @brief Fast approximation to the trigonometric sine function for floating-point data.
+ @param[in] x input value in radians.
+ @return sin(x)
*/
float32_t arm_sin_f32(
float32_t x)
{
- float32_t sinVal, fract, in; /* Temporary variables for input, output */
- uint16_t index; /* Index variable */
- float32_t a, b; /* Two nearest output values */
+ float32_t sinVal, fract, in; /* Temporary input, output variables */
+ uint16_t index; /* Index variable */
+ float32_t a, b; /* Two nearest output values */
int32_t n;
float32_t findex;
/* input x is in radians */
- /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi */
+ /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi */
in = x * 0.159154943092f;
/* Calculation of floor value of input */
n = (int32_t) in;
/* Make negative values towards -infinity */
- if (x < 0.0f)
+ if (in < 0.0f)
{
n--;
}
@@ -112,12 +111,12 @@
b = sinTable_f32[index+1];
/* Linear interpolation process */
- sinVal = (1.0f-fract)*a + fract*b;
+ sinVal = (1.0f - fract) * a + fract * b;
- /* Return the output value */
+ /* Return output value */
return (sinVal);
}
/**
- * @} end of sin group
+ @} end of sin group
*/
diff --git a/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c b/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c
index 7c8f627..b6714c0 100644
--- a/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c
+++ b/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c
@@ -3,13 +3,13 @@
* Title: arm_sin_q15.c
* Description: Fast sine calculation for Q15 values
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,28 +30,28 @@
#include "arm_common_tables.h"
/**
- * @ingroup groupFastMath
- */
-
- /**
- * @addtogroup sin
- * @{
+ @ingroup groupFastMath
*/
/**
- * @brief Fast approximation to the trigonometric sine function for Q15 data.
- * @param[in] x Scaled input value in radians.
- * @return sin(x).
- *
- * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).
+ @addtogroup sin
+ @{
+ */
+
+/**
+ @brief Fast approximation to the trigonometric sine function for Q15 data.
+ @param[in] x Scaled input value in radians
+ @return sin(x)
+
+ The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
*/
q15_t arm_sin_q15(
q15_t x)
{
- q15_t sinVal; /* Temporary variables for input, output */
- int32_t index; /* Index variables */
- q15_t a, b; /* Four nearest output values */
+ q15_t sinVal; /* Temporary input, output variables */
+ int32_t index; /* Index variable */
+ q15_t a, b; /* Two nearest output values */
q15_t fract; /* Temporary values for fractional values */
/* Calculate the nearest index */
@@ -65,12 +65,13 @@
b = sinTable_q15[index+1];
/* Linear interpolation process */
- sinVal = (q31_t)(0x8000-fract)*a >> 16;
- sinVal = (q15_t)((((q31_t)sinVal << 16) + ((q31_t)fract*b)) >> 16);
+ sinVal = (q31_t) (0x8000 - fract) * a >> 16;
+ sinVal = (q15_t) ((((q31_t) sinVal << 16) + ((q31_t) fract * b)) >> 16);
- return sinVal << 1;
+ /* Return output value */
+ return (sinVal << 1);
}
/**
- * @} end of sin group
+ @} end of sin group
*/
diff --git a/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c b/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c
index 8d3c7ac..369d439 100644
--- a/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c
+++ b/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c
@@ -3,13 +3,13 @@
* Title: arm_sin_q31.c
* Description: Fast sine calculation for Q31 values
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,27 +30,28 @@
#include "arm_common_tables.h"
/**
- * @ingroup groupFastMath
- */
-
- /**
- * @addtogroup sin
- * @{
+ @ingroup groupFastMath
*/
/**
- * @brief Fast approximation to the trigonometric sine function for Q31 data.
- * @param[in] x Scaled input value in radians.
- * @return sin(x).
- *
- * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). */
+ @addtogroup sin
+ @{
+ */
+
+/**
+ @brief Fast approximation to the trigonometric sine function for Q31 data.
+ @param[in] x Scaled input value in radians
+ @return sin(x)
+
+ The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
+ */
q31_t arm_sin_q31(
q31_t x)
{
q31_t sinVal; /* Temporary variables for input, output */
- int32_t index; /* Index variables */
- q31_t a, b; /* Four nearest output values */
+ int32_t index; /* Index variable */
+ q31_t a, b; /* Two nearest output values */
q31_t fract; /* Temporary values for fractional values */
/* Calculate the nearest index */
@@ -64,12 +65,13 @@
b = sinTable_q31[index+1];
/* Linear interpolation process */
- sinVal = (q63_t)(0x80000000-fract)*a >> 32;
- sinVal = (q31_t)((((q63_t)sinVal << 32) + ((q63_t)fract*b)) >> 32);
+ sinVal = (q63_t) (0x80000000 - fract) * a >> 32;
+ sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) fract * b)) >> 32);
- return sinVal << 1;
+ /* Return output value */
+ return (sinVal << 1);
}
/**
- * @} end of sin group
+ @} end of sin group
*/
diff --git a/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c b/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c
index 8487ed3..98b217f 100644
--- a/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c
+++ b/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c
@@ -3,13 +3,13 @@
* Title: arm_sqrt_q15.c
* Description: Q15 square root function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,31 +29,30 @@
#include "arm_math.h"
#include "arm_common_tables.h"
-
/**
- * @ingroup groupFastMath
+ @ingroup groupFastMath
*/
/**
- * @addtogroup SQRT
- * @{
+ @addtogroup SQRT
+ @{
*/
- /**
- * @brief Q15 square root function.
- * @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
- * @param[out] *pOut square root of input value.
- * @return The function returns ARM_MATH_SUCCESS if the input value is positive
- * and ARM_MATH_ARGUMENT_ERROR if the input is negative. For
- * negative inputs, the function returns *pOut = 0.
- */
+/**
+ @brief Q15 square root function.
+ @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF
+ @param[out] pOut points to square root of input value
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : input value is positive
+ - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
arm_status arm_sqrt_q15(
q15_t in,
q15_t * pOut)
{
- q15_t number, temp1, var1, signBits1, half;
q31_t bits_val1;
+ q15_t number, temp1, var1, signBits1, half;
float32_t temp_float1;
union
{
@@ -85,7 +84,7 @@
/* Convert to float */
temp_float1 = number * 3.051757812500000e-005f;
- /*Store as integer */
+ /* Store as integer */
tempconv.floatval = temp_float1;
bits_val1 = tempconv.fracval;
/* Subtract the shifted value from the magic number to give intial guess */
@@ -135,10 +134,11 @@
else
{
*pOut = 0;
+
return (ARM_MATH_ARGUMENT_ERROR);
}
}
/**
- * @} end of SQRT group
+ @} end of SQRT group
*/
diff --git a/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c b/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c
index 0deea04..f39c388 100644
--- a/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c
+++ b/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c
@@ -3,13 +3,13 @@
* Title: arm_sqrt_q31.c
* Description: Q31 square root function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,33 +30,34 @@
#include "arm_common_tables.h"
/**
- * @ingroup groupFastMath
+ @ingroup groupFastMath
*/
/**
- * @addtogroup SQRT
- * @{
+ @addtogroup SQRT
+ @{
*/
/**
- * @brief Q31 square root function.
- * @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
- * @param[out] *pOut square root of input value.
- * @return The function returns ARM_MATH_SUCCESS if the input value is positive
- * and ARM_MATH_ARGUMENT_ERROR if the input is negative. For
- * negative inputs, the function returns *pOut = 0.
+ @brief Q31 square root function.
+ @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF
+ @param[out] pOut points to square root of input value
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : input value is positive
+ - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
*/
arm_status arm_sqrt_q31(
q31_t in,
q31_t * pOut)
{
- q31_t number, temp1, bits_val1, var1, signBits1, half;
+ q31_t bits_val1;
+ q31_t number, temp1, var1, signBits1, half;
float32_t temp_float1;
union
{
- q31_t fracval;
- float32_t floatval;
+ q31_t fracval;
+ float32_t floatval;
} tempconv;
number = in;
@@ -81,9 +82,9 @@
/* Store the number for later use */
temp1 = number;
- /*Convert to float */
+ /* Convert to float */
temp_float1 = number * 4.6566128731e-010f;
- /*Store as integer */
+ /* Store as integer */
tempconv.floatval = temp_float1;
bits_val1 = tempconv.fracval;
/* Subtract the shifted value from the magic number to give intial guess */
@@ -133,10 +134,11 @@
else
{
*pOut = 0;
+
return (ARM_MATH_ARGUMENT_ERROR);
}
}
/**
- * @} end of SQRT group
+ @} end of SQRT group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c b/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c
new file mode 100644
index 0000000..246ccf4
--- /dev/null
+++ b/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c
@@ -0,0 +1,100 @@
+
+#include "arm_biquad_cascade_df1_32x64_init_q31.c"
+#include "arm_biquad_cascade_df1_32x64_q31.c"
+#include "arm_biquad_cascade_df1_f32.c"
+#include "arm_biquad_cascade_df1_fast_q15.c"
+#include "arm_biquad_cascade_df1_fast_q31.c"
+#include "arm_biquad_cascade_df1_init_f32.c"
+#include "arm_biquad_cascade_df1_init_q15.c"
+#include "arm_biquad_cascade_df1_init_q31.c"
+#include "arm_biquad_cascade_df1_q15.c"
+#include "arm_biquad_cascade_df1_q31.c"
+#include "arm_biquad_cascade_df2T_f32.c"
+#include "arm_biquad_cascade_df2T_f64.c"
+#include "arm_biquad_cascade_df2T_init_f32.c"
+#include "arm_biquad_cascade_df2T_init_f64.c"
+#include "arm_biquad_cascade_stereo_df2T_f32.c"
+#include "arm_biquad_cascade_stereo_df2T_init_f32.c"
+#include "arm_conv_f32.c"
+#include "arm_conv_fast_opt_q15.c"
+#include "arm_conv_fast_q15.c"
+#include "arm_conv_fast_q31.c"
+#include "arm_conv_opt_q15.c"
+#include "arm_conv_opt_q7.c"
+#include "arm_conv_partial_f32.c"
+#include "arm_conv_partial_fast_opt_q15.c"
+#include "arm_conv_partial_fast_q15.c"
+#include "arm_conv_partial_fast_q31.c"
+#include "arm_conv_partial_opt_q15.c"
+#include "arm_conv_partial_opt_q7.c"
+#include "arm_conv_partial_q15.c"
+#include "arm_conv_partial_q31.c"
+#include "arm_conv_partial_q7.c"
+#include "arm_conv_q15.c"
+#include "arm_conv_q31.c"
+#include "arm_conv_q7.c"
+#include "arm_correlate_f32.c"
+#include "arm_correlate_fast_opt_q15.c"
+#include "arm_correlate_fast_q15.c"
+#include "arm_correlate_fast_q31.c"
+#include "arm_correlate_opt_q15.c"
+#include "arm_correlate_opt_q7.c"
+#include "arm_correlate_q15.c"
+#include "arm_correlate_q31.c"
+#include "arm_correlate_q7.c"
+#include "arm_fir_decimate_f32.c"
+#include "arm_fir_decimate_fast_q15.c"
+#include "arm_fir_decimate_fast_q31.c"
+#include "arm_fir_decimate_init_f32.c"
+#include "arm_fir_decimate_init_q15.c"
+#include "arm_fir_decimate_init_q31.c"
+#include "arm_fir_decimate_q15.c"
+#include "arm_fir_decimate_q31.c"
+#include "arm_fir_f32.c"
+#include "arm_fir_fast_q15.c"
+#include "arm_fir_fast_q31.c"
+#include "arm_fir_init_f32.c"
+#include "arm_fir_init_q15.c"
+#include "arm_fir_init_q31.c"
+#include "arm_fir_init_q7.c"
+#include "arm_fir_interpolate_f32.c"
+#include "arm_fir_interpolate_init_f32.c"
+#include "arm_fir_interpolate_init_q15.c"
+#include "arm_fir_interpolate_init_q31.c"
+#include "arm_fir_interpolate_q15.c"
+#include "arm_fir_interpolate_q31.c"
+#include "arm_fir_lattice_f32.c"
+#include "arm_fir_lattice_init_f32.c"
+#include "arm_fir_lattice_init_q15.c"
+#include "arm_fir_lattice_init_q31.c"
+#include "arm_fir_lattice_q15.c"
+#include "arm_fir_lattice_q31.c"
+#include "arm_fir_q15.c"
+#include "arm_fir_q31.c"
+#include "arm_fir_q7.c"
+#include "arm_fir_sparse_f32.c"
+#include "arm_fir_sparse_init_f32.c"
+#include "arm_fir_sparse_init_q15.c"
+#include "arm_fir_sparse_init_q31.c"
+#include "arm_fir_sparse_init_q7.c"
+#include "arm_fir_sparse_q15.c"
+#include "arm_fir_sparse_q31.c"
+#include "arm_fir_sparse_q7.c"
+#include "arm_iir_lattice_f32.c"
+#include "arm_iir_lattice_init_f32.c"
+#include "arm_iir_lattice_init_q15.c"
+#include "arm_iir_lattice_init_q31.c"
+#include "arm_iir_lattice_q15.c"
+#include "arm_iir_lattice_q31.c"
+#include "arm_lms_f32.c"
+#include "arm_lms_init_f32.c"
+#include "arm_lms_init_q15.c"
+#include "arm_lms_init_q31.c"
+#include "arm_lms_norm_f32.c"
+#include "arm_lms_norm_init_f32.c"
+#include "arm_lms_norm_init_q15.c"
+#include "arm_lms_norm_init_q31.c"
+#include "arm_lms_norm_q15.c"
+#include "arm_lms_norm_q31.c"
+#include "arm_lms_q15.c"
+#include "arm_lms_q31.c"
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
index 8f92496..a961380 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_df1_32x64_init_q31.c
* Description: High precision Q31 Biquad cascade filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,53 +29,49 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup BiquadCascadeDF1_32x64
- * @{
+ @addtogroup BiquadCascadeDF1_32x64
+ @{
*/
/**
- * @details
- *
- * @param[in,out] *S points to an instance of the high precision Q31 Biquad cascade filter structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] postShift Shift to be applied after the accumulator. Varies according to the coefficients format.
- * @return none
- *
- * <b>Coefficient and State Ordering:</b>
- *
- * \par
- * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
- * <pre>
- * {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
- * </pre>
- * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
- * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
- * and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
- *
- * \par
- * The <code>pState</code> points to state variables array and size of each state variable is 1.63 format.
- * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
- * The state variables are arranged in the state array as:
- * <pre>
- * {x[n-1], x[n-2], y[n-1], y[n-2]}
- * </pre>
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
- * The state array has a total length of <code>4*numStages</code> values.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
+ @brief Initialization function for the Q31 Biquad cascade 32x64 filter.
+ @param[in,out] S points to an instance of the high precision Q31 Biquad cascade filter structure
+ @param[in] numStages number of 2nd order stages in the filter
+ @param[in] pCoeffs points to the filter coefficients
+ @param[in] pState points to the state buffer
+ @param[in] postShift Shift to be applied after the accumulator. Varies according to the coefficients format
+ @return none
+
+ @par Coefficient and State Ordering
+ The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+ <pre>
+ {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+ </pre>
+ where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+ <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+ and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+ @par
+ The <code>pState</code> points to state variables array and size of each state variable is 1.63 format.
+ Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+ The state variables are arranged in the state array as:
+ <pre>
+ {x[n-1], x[n-2], y[n-1], y[n-2]}
+ </pre>
+ The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+ The state array has a total length of <code>4*numStages</code> values.
+ The state variables are updated after each block of data is processed; the coefficients are untouched.
*/
void arm_biquad_cas_df1_32x64_init_q31(
- arm_biquad_cas_df1_32x64_ins_q31 * S,
- uint8_t numStages,
- q31_t * pCoeffs,
- q63_t * pState,
- uint8_t postShift)
+ arm_biquad_cas_df1_32x64_ins_q31 * S,
+ uint8_t numStages,
+ const q31_t * pCoeffs,
+ q63_t * pState,
+ uint8_t postShift)
{
/* Assign filter stages */
S->numStages = numStages;
@@ -94,5 +90,5 @@
}
/**
- * @} end of BiquadCascadeDF1_32x64 group
+ @} end of BiquadCascadeDF1_32x64 group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
index c77cc8e..0824278 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_df1_32x64_q31.c
* Description: High precision Q31 Biquad cascade filter processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,174 +29,169 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter
- *
- * This function implements a high precision Biquad cascade filter which operates on
- * Q31 data values. The filter coefficients are in 1.31 format and the state variables
- * are in 1.63 format. The double precision state variables reduce quantization noise
- * in the filter and provide a cleaner output.
- * These filters are particularly useful when implementing filters in which the
- * singularities are close to the unit circle. This is common for low pass or high
- * pass filters with very low cutoff frequencies.
- *
- * The function operates on blocks of input and output data
- * and each call to the function processes <code>blockSize</code> samples through
- * the filter. <code>pSrc</code> and <code>pDst</code> points to input and output arrays
- * containing <code>blockSize</code> Q31 values.
- *
- * \par Algorithm
- * Each Biquad stage implements a second order filter using the difference equation:
- * <pre>
- * y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
- * </pre>
- * A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
- * \image html Biquad.gif "Single Biquad filter stage"
- * Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
- * Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
- * Pay careful attention to the sign of the feedback coefficients.
- * Some design tools use the difference equation
- * <pre>
- * y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
- * </pre>
- * In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
- *
- * \par
- * Higher order filters are realized as a cascade of second order sections.
- * <code>numStages</code> refers to the number of second order stages used.
- * For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
- * \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
- * A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
- *
- * \par
- * The <code>pState</code> points to state variables array .
- * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code> and each state variable in 1.63 format to improve precision.
- * The state variables are arranged in the array as:
- * <pre>
- * {x[n-1], x[n-2], y[n-1], y[n-2]}
- * </pre>
- *
- * \par
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
- * The state array has a total length of <code>4*numStages</code> values of data in 1.63 format.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
- *
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter.
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
- *
- * \par Init Function
- * There is also an associated initialization function which performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pCoeffs, postShift, pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * Set the values in the state buffer to zeros before static initialization.
- * For example, to statically initialize the filter instance structure use
- * <pre>
- * arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};
- * </pre>
- * where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer;
- * <code>pCoeffs</code> is the address of the coefficient buffer; <code>postShift</code> shift to be applied which is described in detail below.
- * \par Fixed-Point Behavior
- * Care must be taken while using Biquad Cascade 32x64 filter function.
- * Following issues must be considered:
- * - Scaling of coefficients
- * - Filter gain
- * - Overflow and saturation
- *
- * \par
- * Filter coefficients are represented as fractional values and
- * restricted to lie in the range <code>[-1 +1)</code>.
- * The processing function has an additional scaling parameter <code>postShift</code>
- * which allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
- * At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
- * \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
- * This essentially scales the filter coefficients by <code>2^postShift</code>.
- * For example, to realize the coefficients
- * <pre>
- * {1.5, -0.8, 1.2, 1.6, -0.9}
- * </pre>
- * set the Coefficient array to:
- * <pre>
- * {0.75, -0.4, 0.6, 0.8, -0.45}
- * </pre>
- * and set <code>postShift=1</code>
- *
- * \par
- * The second thing to keep in mind is the gain through the filter.
- * The frequency response of a Biquad filter is a function of its coefficients.
- * It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.
- * This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.
- * To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
- *
- * \par
- * The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version.
- * This is described in the function specific documentation below.
+ @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter
+
+ This function implements a high precision Biquad cascade filter which operates on
+ Q31 data values. The filter coefficients are in 1.31 format and the state variables
+ are in 1.63 format. The double precision state variables reduce quantization noise
+ in the filter and provide a cleaner output.
+ These filters are particularly useful when implementing filters in which the
+ singularities are close to the unit circle. This is common for low pass or high
+ pass filters with very low cutoff frequencies.
+
+ The function operates on blocks of input and output data
+ and each call to the function processes <code>blockSize</code> samples through
+ the filter. <code>pSrc</code> and <code>pDst</code> points to input and output arrays
+ containing <code>blockSize</code> Q31 values.
+
+ @par Algorithm
+ Each Biquad stage implements a second order filter using the difference equation:
+ <pre>
+ y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+ </pre>
+ A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
+ \image html Biquad.gif "Single Biquad filter stage"
+ Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
+ Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
+ Pay careful attention to the sign of the feedback coefficients.
+ Some design tools use the difference equation
+ <pre>
+ y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
+ </pre>
+ In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
+ @par
+ Higher order filters are realized as a cascade of second order sections.
+ <code>numStages</code> refers to the number of second order stages used.
+ For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
+ \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
+ A 9th order filter would be realized with <code>numStages=5</code> second order stages
+ with the coefficients for one of the stages configured as a first order filter
+ (<code>b2=0</code> and <code>a2=0</code>).
+ @par
+ The <code>pState</code> points to state variables array.
+ Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code> and each state variable in 1.63 format to improve precision.
+ The state variables are arranged in the array as:
+ <pre>
+ {x[n-1], x[n-2], y[n-1], y[n-2]}
+ </pre>
+ @par
+ The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+ The state array has a total length of <code>4*numStages</code> values of data in 1.63 format.
+ The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+ @par Instance Structure
+ The coefficients and state variables for a filter are stored together in an instance data structure.
+ A separate instance structure must be defined for each filter.
+ Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+
+ @par Init Function
+ There is also an associated initialization function which performs the following operations:
+ - Sets the values of the internal structure fields.
+ - Zeros out the values in the state buffer.
+ To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ numStages, pCoeffs, postShift, pState. Also set all of the values in pState to zero.
+
+ @par
+ Use of the initialization function is optional.
+ However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+ To place an instance structure into a const data section, the instance structure must be manually initialized.
+ Set the values in the state buffer to zeros before static initialization.
+ For example, to statically initialize the filter instance structure use
+ <pre>
+ arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};
+ </pre>
+ where <code>numStages</code> is the number of Biquad stages in the filter;
+ <code>pState</code> is the address of the state buffer;
+ <code>pCoeffs</code> is the address of the coefficient buffer;
+ <code>postShift</code> shift to be applied which is described in detail below.
+ @par Fixed-Point Behavior
+ Care must be taken while using Biquad Cascade 32x64 filter function.
+ Following issues must be considered:
+ - Scaling of coefficients
+ - Filter gain
+ - Overflow and saturation
+
+ @par
+ Filter coefficients are represented as fractional values and
+ restricted to lie in the range <code>[-1 +1)</code>.
+ The processing function has an additional scaling parameter <code>postShift</code>
+ which allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
+ At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
+ \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
+ This essentially scales the filter coefficients by <code>2^postShift</code>.
+ For example, to realize the coefficients
+ <pre>
+ {1.5, -0.8, 1.2, 1.6, -0.9}
+ </pre>
+ set the Coefficient array to:
+ <pre>
+ {0.75, -0.4, 0.6, 0.8, -0.45}
+ </pre>
+ and set <code>postShift=1</code>
+ @par
+ The second thing to keep in mind is the gain through the filter.
+ The frequency response of a Biquad filter is a function of its coefficients.
+ It is possible for the gain through the filter to exceed 1.0 meaning that the
+ filter increases the amplitude of certain frequencies.
+ This means that an input signal with amplitude < 1.0 may result in an output > 1.0
+ and these are saturated or overflowed based on the implementation of the filter.
+ To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0
+ or the input signal must be scaled down so that the combination of input and filter are never overflowed.
+ @par
+ The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version.
+ This is described in the function specific documentation below.
*/
/**
- * @addtogroup BiquadCascadeDF1_32x64
- * @{
+ @addtogroup BiquadCascadeDF1_32x64
+ @{
*/
/**
- * @details
+ @brief Processing function for the Q31 Biquad cascade 32x64 filter.
+ @param[in] S points to an instance of the high precision Q31 Biquad cascade filter
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
- * @param[in] *S points to an instance of the high precision Q31 Biquad cascade filter.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- *
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
- * After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
- * 1.31 format by discarding the low 32 bits.
- *
- * \par
- * Two related functions are provided in the CMSIS DSP library.
- * <code>arm_biquad_cascade_df1_q31()</code> implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator.
- * <code>arm_biquad_cascade_df1_fast_q31()</code> implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator.
+ @par Details
+ The function is implemented using an internal 64-bit accumulator.
+ The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ Thus, if the accumulator result overflows it wraps around rather than clip.
+ In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
+ After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
+ 1.31 format by discarding the low 32 bits.
+ @par
+ Two related functions are provided in the CMSIS DSP library.
+ - \ref arm_biquad_cascade_df1_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator.
+ - \ref arm_biquad_cascade_df1_fast_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator.
*/
void arm_biquad_cas_df1_32x64_q31(
const arm_biquad_cas_df1_32x64_ins_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pIn = pSrc; /* input pointer initialization */
- q31_t *pOut = pDst; /* output pointer initialization */
- q63_t *pState = S->pState; /* state pointer initialization */
- q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */
- q63_t acc; /* accumulator */
- q31_t Xn1, Xn2; /* Input Filter state variables */
- q63_t Yn1, Yn2; /* Output Filter state variables */
- q31_t b0, b1, b2, a1, a2; /* Filter coefficients */
- q31_t Xn; /* temporary input */
- int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */
- uint32_t sample, stage = S->numStages; /* loop counters */
- q31_t acc_l, acc_h; /* temporary output */
- uint32_t uShift = ((uint32_t) S->postShift + 1U);
- uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */
-
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t *pIn = pSrc; /* input pointer initialization */
+ q31_t *pOut = pDst; /* output pointer initialization */
+ q63_t *pState = S->pState; /* state pointer initialization */
+ const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */
+ q63_t acc; /* accumulator */
+ q31_t Xn1, Xn2; /* Input Filter state variables */
+ q63_t Yn1, Yn2; /* Output Filter state variables */
+ q31_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ q31_t Xn; /* temporary input */
+ int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */
+ uint32_t sample, stage = S->numStages; /* loop counters */
+ q31_t acc_l, acc_h; /* temporary output */
+ uint32_t uShift = ((uint32_t) S->postShift + 1U);
+ uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */
do
{
@@ -213,16 +208,16 @@
Yn1 = pState[2];
Yn2 = pState[3];
+#if defined (ARM_MATH_LOOPUNROLL)
+
/* Apply loop unrolling and compute 4 output values simultaneously. */
- /* The variable acc hold output value that is being computed and
- * stored in the destination buffer
+ /* Variable acc hold output value that is being computed and stored in destination buffer
* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
*/
+ /* Loop unrolling: Compute 4 outputs at a time */
sample = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (sample > 0U)
{
/* Read the input */
@@ -231,13 +226,13 @@
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc = b0 * x[n] */
- acc = (q63_t) Xn *b0;
+ acc = (q63_t) Xn * b0;
/* acc += b1 * x[n-1] */
- acc += (q63_t) Xn1 *b1;
+ acc += (q63_t) Xn1 * b1;
/* acc += b[2] * x[n-2] */
- acc += (q63_t) Xn2 *b2;
+ acc += (q63_t) Xn2 * b2;
/* acc += a1 * y[n-1] */
acc += mult32x64(Yn1, a1);
@@ -266,13 +261,13 @@
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc += b1 * x[n-1] */
- acc = (q63_t) Xn *b1;
+ acc = (q63_t) Xn * b1;
/* acc = b0 * x[n] */
- acc += (q63_t) Xn2 *b0;
+ acc += (q63_t) Xn2 * b0;
/* acc += b[2] * x[n-2] */
- acc += (q63_t) Xn1 *b2;
+ acc += (q63_t) Xn1 * b2;
/* acc += a1 * y[n-1] */
acc += mult32x64(Yn2, a1);
@@ -302,13 +297,13 @@
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc = b0 * x[n] */
- acc = (q63_t) Xn1 *b0;
+ acc = (q63_t) Xn1 * b0;
/* acc += b1 * x[n-1] */
- acc += (q63_t) Xn2 *b1;
+ acc += (q63_t) Xn2 * b1;
/* acc += b[2] * x[n-2] */
- acc += (q63_t) Xn *b2;
+ acc += (q63_t) Xn * b2;
/* acc += a1 * y[n-1] */
acc += mult32x64(Yn1, a1);
@@ -336,13 +331,13 @@
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc = b0 * x[n] */
- acc = (q63_t) Xn *b0;
+ acc = (q63_t) Xn * b0;
/* acc += b1 * x[n-1] */
- acc += (q63_t) Xn1 *b1;
+ acc += (q63_t) Xn1 * b1;
/* acc += b[2] * x[n-2] */
- acc += (q63_t) Xn2 *b2;
+ acc += (q63_t) Xn2 * b2;
/* acc += a1 * y[n-1] */
acc += mult32x64(Yn2, a1);
@@ -366,139 +361,55 @@
*(pOut + 3U) = acc_h;
/* Every time after the output is computed state should be updated. */
- /* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* The states should be updated as: */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
Xn2 = Xn1;
Xn1 = Xn;
/* update output pointer */
pOut += 4U;
- /* decrement the loop counter */
+ /* decrement loop counter */
sample--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- sample = (blockSize & 0x3U);
-
- while (sample > 0U)
- {
- /* Read the input */
- Xn = *pIn++;
-
- /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
- /* acc = b0 * x[n] */
- acc = (q63_t) Xn *b0;
- /* acc += b1 * x[n-1] */
- acc += (q63_t) Xn1 *b1;
- /* acc += b[2] * x[n-2] */
- acc += (q63_t) Xn2 *b2;
- /* acc += a1 * y[n-1] */
- acc += mult32x64(Yn1, a1);
- /* acc += a2 * y[n-2] */
- acc += mult32x64(Yn2, a2);
-
- /* Every time after the output is computed state should be updated. */
- /* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
- Xn2 = Xn1;
- Xn1 = Xn;
- Yn2 = Yn1;
- /* The result is converted to 1.63, Yn1 variable is reused */
- Yn1 = acc << shift;
-
- /* Calc lower part of acc */
- acc_l = acc & 0xffffffff;
-
- /* Calc upper part of acc */
- acc_h = (acc >> 32) & 0xffffffff;
-
- /* Apply shift for lower part of acc and upper part of acc */
- acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
- /* Store the output in the destination buffer in 1.31 format. */
- *pOut++ = acc_h;
- /* Yn1 = acc << shift; */
-
- /* Store the output in the destination buffer in 1.31 format. */
-/* *pOut++ = (q31_t) (acc >> (32 - shift)); */
-
- /* decrement the loop counter */
- sample--;
- }
-
- /* The first stage output is given as input to the second stage. */
- pIn = pDst;
-
- /* Reset to destination buffer working pointer */
- pOut = pDst;
-
- /* Store the updated state variables back into the pState array */
- /* Store the updated state variables back into the pState array */
- *pState++ = (q63_t) Xn1;
- *pState++ = (q63_t) Xn2;
- *pState++ = Yn1;
- *pState++ = Yn2;
-
- } while (--stage);
+ /* Loop unrolling: Compute remaining outputs */
+ sample = blockSize & 0x3U;
#else
- /* Run the below code for Cortex-M0 */
-
- do
- {
- /* Reading the coefficients */
- b0 = *pCoeffs++;
- b1 = *pCoeffs++;
- b2 = *pCoeffs++;
- a1 = *pCoeffs++;
- a2 = *pCoeffs++;
-
- /* Reading the state values */
- Xn1 = pState[0];
- Xn2 = pState[1];
- Yn1 = pState[2];
- Yn2 = pState[3];
-
- /* The variable acc hold output value that is being computed and
- * stored in the destination buffer
- * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
- */
-
+ /* Initialize blkCnt with number of samples */
sample = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (sample > 0U)
{
/* Read the input */
Xn = *pIn++;
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+
/* acc = b0 * x[n] */
- acc = (q63_t) Xn *b0;
+ acc = (q63_t) Xn * b0;
/* acc += b1 * x[n-1] */
- acc += (q63_t) Xn1 *b1;
+ acc += (q63_t) Xn1 * b1;
/* acc += b[2] * x[n-2] */
- acc += (q63_t) Xn2 *b2;
+ acc += (q63_t) Xn2 * b2;
/* acc += a1 * y[n-1] */
acc += mult32x64(Yn1, a1);
/* acc += a2 * y[n-2] */
acc += mult32x64(Yn2, a2);
/* Every time after the output is computed state should be updated. */
- /* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* The states should be updated as: */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
Xn2 = Xn1;
Xn1 = Xn;
Yn2 = Yn1;
@@ -517,17 +428,16 @@
/* Store the output in the destination buffer in 1.31 format. */
*pOut++ = acc_h;
-
/* Yn1 = acc << shift; */
/* Store the output in the destination buffer in 1.31 format. */
- /* *pOut++ = (q31_t) (acc >> (32 - shift)); */
+/* *pOut++ = (q31_t) (acc >> (32 - shift)); */
- /* decrement the loop counter */
+ /* decrement loop counter */
sample--;
}
- /* The first stage output is given as input to the second stage. */
+ /* The first stage output is given as input to the second stage. */
pIn = pDst;
/* Reset to destination buffer working pointer */
@@ -541,9 +451,8 @@
} while (--stage);
-#endif /* #if defined (ARM_MATH_DSP) */
}
- /**
- * @} end of BiquadCascadeDF1_32x64 group
- */
+/**
+ @} end of BiquadCascadeDF1_32x64 group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
index 0ffb29e..33978c6 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_df1_f32.c
* Description: Processing function for the floating-point Biquad cascade DirectFormI(DF1) filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,159 +29,154 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure
- *
- * This set of functions implements arbitrary order recursive (IIR) filters.
- * The filters are implemented as a cascade of second order Biquad sections.
- * The functions support Q15, Q31 and floating-point data types.
- * Fast version of Q15 and Q31 also supported on CortexM4 and Cortex-M3.
- *
- * The functions operate on blocks of input and output data and each call to the function
- * processes <code>blockSize</code> samples through the filter.
- * <code>pSrc</code> points to the array of input data and
- * <code>pDst</code> points to the array of output data.
- * Both arrays contain <code>blockSize</code> values.
- *
- * \par Algorithm
- * Each Biquad stage implements a second order filter using the difference equation:
- * <pre>
- * y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
- * </pre>
- * A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
- * \image html Biquad.gif "Single Biquad filter stage"
- * Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
- * Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
- * Pay careful attention to the sign of the feedback coefficients.
- * Some design tools use the difference equation
- * <pre>
- * y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
- * </pre>
- * In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
- *
- * \par
- * Higher order filters are realized as a cascade of second order sections.
- * <code>numStages</code> refers to the number of second order stages used.
- * For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
- * \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
- * A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
- *
- * \par
- * The <code>pState</code> points to state variables array.
- * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
- * The state variables are arranged in the <code>pState</code> array as:
- * <pre>
- * {x[n-1], x[n-2], y[n-1], y[n-2]}
- * </pre>
- *
- * \par
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
- * The state array has a total length of <code>4*numStages</code> values.
- * The state variables are updated after each block of data is processed, the coefficients are untouched.
- *
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter.
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Init Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pCoeffs, pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * Set the values in the state buffer to zeros before static initialization.
- * The code below statically initializes each of the 3 different data type filter instance structures
- * <pre>
- * arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};
- * arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};
- * arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};
- * </pre>
- * where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer;
- * <code>pCoeffs</code> is the address of the coefficient buffer; <code>postShift</code> shift to be applied.
- *
- * \par Fixed-Point Behavior
- * Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions.
- * Following issues must be considered:
- * - Scaling of coefficients
- * - Filter gain
- * - Overflow and saturation
- *
- * \par
- * <b>Scaling of coefficients: </b>
- * Filter coefficients are represented as fractional values and
- * coefficients are restricted to lie in the range <code>[-1 +1)</code>.
- * The fixed-point functions have an additional scaling parameter <code>postShift</code>
- * which allow the filter coefficients to exceed the range <code>[+1 -1)</code>.
- * At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
- * \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
- * This essentially scales the filter coefficients by <code>2^postShift</code>.
- * For example, to realize the coefficients
- * <pre>
- * {1.5, -0.8, 1.2, 1.6, -0.9}
- * </pre>
- * set the pCoeffs array to:
- * <pre>
- * {0.75, -0.4, 0.6, 0.8, -0.45}
- * </pre>
- * and set <code>postShift=1</code>
- *
- * \par
- * <b>Filter gain: </b>
- * The frequency response of a Biquad filter is a function of its coefficients.
- * It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.
- * This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.
- * To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
- *
- * \par
- * <b>Overflow and saturation: </b>
- * For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.
+ @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure
+
+ This set of functions implements arbitrary order recursive (IIR) filters.
+ The filters are implemented as a cascade of second order Biquad sections.
+ The functions support Q15, Q31 and floating-point data types.
+ Fast version of Q15 and Q31 also available.
+
+ The functions operate on blocks of input and output data and each call to the function
+ processes <code>blockSize</code> samples through the filter.
+ <code>pSrc</code> points to the array of input data and
+ <code>pDst</code> points to the array of output data.
+ Both arrays contain <code>blockSize</code> values.
+
+ @par Algorithm
+ Each Biquad stage implements a second order filter using the difference equation:
+ <pre>
+ y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+ </pre>
+ A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
+ \image html Biquad.gif "Single Biquad filter stage"
+ Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
+ Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
+ Pay careful attention to the sign of the feedback coefficients.
+ Some design tools use the difference equation
+ <pre>
+ y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
+ </pre>
+ In this case the feedback coefficients <code>a1</code> and <code>a2</code>
+ must be negated when used with the CMSIS DSP Library.
+
+ @par
+ Higher order filters are realized as a cascade of second order sections.
+ <code>numStages</code> refers to the number of second order stages used.
+ For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
+ \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
+ A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
+
+ @par
+ The <code>pState</code> points to state variables array.
+ Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+ The state variables are arranged in the <code>pState</code> array as:
+ <pre>
+ {x[n-1], x[n-2], y[n-1], y[n-2]}
+ </pre>
+
+ @par
+ The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+ The state array has a total length of <code>4*numStages</code> values.
+ The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+ @par Instance Structure
+ The coefficients and state variables for a filter are stored together in an instance data structure.
+ A separate instance structure must be defined for each filter.
+ Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+ There are separate instance structure declarations for each of the 3 supported data types.
+
+ @par Init Function
+ There is also an associated initialization function for each data type.
+ The initialization function performs following operations:
+ - Sets the values of the internal structure fields.
+ - Zeros out the values in the state buffer.
+ To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ numStages, pCoeffs, pState. Also set all of the values in pState to zero.
+
+ @par
+ Use of the initialization function is optional.
+ However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+ To place an instance structure into a const data section, the instance structure must be manually initialized.
+ Set the values in the state buffer to zeros before static initialization.
+ The code below statically initializes each of the 3 different data type filter instance structures
+ <pre>
+ arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};
+ arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};
+ arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};
+ </pre>
+ where <code>numStages</code> is the number of Biquad stages in the filter;
+ <code>pState</code> is the address of the state buffer;
+ <code>pCoeffs</code> is the address of the coefficient buffer;
+ <code>postShift</code> shift to be applied.
+
+ @par Fixed-Point Behavior
+ Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions.
+ Following issues must be considered:
+ - Scaling of coefficients
+ - Filter gain
+ - Overflow and saturation
+
+ @par Scaling of coefficients
+ Filter coefficients are represented as fractional values and
+ coefficients are restricted to lie in the range <code>[-1 +1)</code>.
+ The fixed-point functions have an additional scaling parameter <code>postShift</code>
+ which allow the filter coefficients to exceed the range <code>[+1 -1)</code>.
+ At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
+ \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
+ This essentially scales the filter coefficients by <code>2^postShift</code>.
+ For example, to realize the coefficients
+ <pre>
+ {1.5, -0.8, 1.2, 1.6, -0.9}
+ </pre>
+ set the pCoeffs array to:
+ <pre>
+ {0.75, -0.4, 0.6, 0.8, -0.45}
+ </pre>
+ and set <code>postShift=1</code>
+
+ @par Filter gain
+ The frequency response of a Biquad filter is a function of its coefficients.
+ It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.
+ This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.
+ To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
+
+ @par Overflow and saturation
+ For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.
*/
/**
- * @addtogroup BiquadCascadeDF1
- * @{
+ @addtogroup BiquadCascadeDF1
+ @{
*/
/**
- * @param[in] *S points to an instance of the floating-point Biquad cascade structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- *
+ @brief Processing function for the floating-point Biquad cascade filter.
+ @param[in] S points to an instance of the floating-point Biquad cascade structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
*/
void arm_biquad_cascade_df1_f32(
const arm_biquad_casd_df1_inst_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- float32_t *pIn = pSrc; /* source pointer */
- float32_t *pOut = pDst; /* destination pointer */
- float32_t *pState = S->pState; /* pState pointer */
- float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */
- float32_t acc; /* Simulates the accumulator */
- float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
- float32_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */
- float32_t Xn; /* temporary input */
- uint32_t sample, stage = S->numStages; /* loop counters */
-
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ const float32_t *pIn = pSrc; /* Source pointer */
+ float32_t *pOut = pDst; /* Destination pointer */
+ float32_t *pState = S->pState; /* pState pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t acc; /* Accumulator */
+ float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ float32_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */
+ float32_t Xn; /* Temporary input */
+ uint32_t sample, stage = S->numStages; /* Loop counters */
do
{
@@ -198,19 +193,20 @@
Yn1 = pState[2];
Yn2 = pState[3];
+#if defined (ARM_MATH_LOOPUNROLL)
+
/* Apply loop unrolling and compute 4 output values simultaneously. */
- /* The variable acc hold output values that are being computed:
+ /* Variable acc hold output values that are being computed:
*
- * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
- * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
- * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
- * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+ * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+ * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+ * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+ * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
*/
+ /* Loop unrolling: Compute 4 outputs at a time */
sample = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (sample > 0U)
{
/* Read the first input */
@@ -219,15 +215,15 @@
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
- /* Store the result in the accumulator in the destination buffer. */
+ /* Store output in destination buffer. */
*pOut++ = Yn2;
/* Every time after the output is computed state should be updated. */
- /* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* The states should be updated as: */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
/* Read the second input */
Xn2 = *pIn++;
@@ -235,15 +231,15 @@
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1);
- /* Store the result in the accumulator in the destination buffer. */
+ /* Store output in destination buffer. */
*pOut++ = Yn1;
/* Every time after the output is computed state should be updated. */
- /* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* The states should be updated as: */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
/* Read the third input */
Xn1 = *pIn++;
@@ -251,15 +247,15 @@
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2);
- /* Store the result in the accumulator in the destination buffer. */
+ /* Store output in destination buffer. */
*pOut++ = Yn2;
/* Every time after the output is computed state should be updated. */
/* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
/* Read the forth input */
Xn = *pIn++;
@@ -267,97 +263,32 @@
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1);
- /* Store the result in the accumulator in the destination buffer. */
+ /* Store output in destination buffer. */
*pOut++ = Yn1;
/* Every time after the output is computed state should be updated. */
- /* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* The states should be updated as: */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
Xn2 = Xn1;
Xn1 = Xn;
- /* decrement the loop counter */
+ /* decrement loop counter */
sample--;
-
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
sample = blockSize & 0x3U;
- while (sample > 0U)
- {
- /* Read the input */
- Xn = *pIn++;
-
- /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
- acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = acc;
-
- /* Every time after the output is computed state should be updated. */
- /* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
- Xn2 = Xn1;
- Xn1 = Xn;
- Yn2 = Yn1;
- Yn1 = acc;
-
- /* decrement the loop counter */
- sample--;
-
- }
-
- /* Store the updated state variables back into the pState array */
- *pState++ = Xn1;
- *pState++ = Xn2;
- *pState++ = Yn1;
- *pState++ = Yn2;
-
- /* The first stage goes from the input buffer to the output buffer. */
- /* Subsequent numStages occur in-place in the output buffer */
- pIn = pDst;
-
- /* Reset the output pointer */
- pOut = pDst;
-
- /* decrement the loop counter */
- stage--;
-
- } while (stage > 0U);
-
#else
- /* Run the below code for Cortex-M0 */
-
- do
- {
- /* Reading the coefficients */
- b0 = *pCoeffs++;
- b1 = *pCoeffs++;
- b2 = *pCoeffs++;
- a1 = *pCoeffs++;
- a2 = *pCoeffs++;
-
- /* Reading the pState values */
- Xn1 = pState[0];
- Xn2 = pState[1];
- Yn1 = pState[2];
- Yn2 = pState[3];
-
- /* The variables acc holds the output value that is computed:
- * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
- */
-
+ /* Initialize blkCnt with number of samples */
sample = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (sample > 0U)
{
/* Read the input */
@@ -366,47 +297,44 @@
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
- /* Store the result in the accumulator in the destination buffer. */
+ /* Store output in destination buffer. */
*pOut++ = acc;
/* Every time after the output is computed state should be updated. */
- /* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* The states should be updated as: */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
Xn2 = Xn1;
Xn1 = Xn;
Yn2 = Yn1;
Yn1 = acc;
- /* decrement the loop counter */
+ /* decrement loop counter */
sample--;
}
- /* Store the updated state variables back into the pState array */
+ /* Store the updated state variables back into the pState array */
*pState++ = Xn1;
*pState++ = Xn2;
*pState++ = Yn1;
*pState++ = Yn2;
- /* The first stage goes from the input buffer to the output buffer. */
- /* Subsequent numStages occur in-place in the output buffer */
+ /* The first stage goes from the input buffer to the output buffer. */
+ /* Subsequent numStages occur in-place in the output buffer */
pIn = pDst;
- /* Reset the output pointer */
+ /* Reset output pointer */
pOut = pDst;
- /* decrement the loop counter */
+ /* decrement loop counter */
stage--;
} while (stage > 0U);
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
-
- /**
- * @} end of BiquadCascadeDF1 group
- */
+/**
+ @} end of BiquadCascadeDF1 group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
index ab517d8..9df8e4f 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_df1_fast_q15.c
* Description: Fast processing function for the Q15 Biquad cascade filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,90 +29,87 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup BiquadCascadeDF1
- * @{
+ @addtogroup BiquadCascadeDF1
+ @{
*/
/**
- * @details
- * @param[in] *S points to an instance of the Q15 Biquad cascade structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * This fast version uses a 32-bit accumulator with 2.30 format.
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around and distorts the result.
- * In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25).
- * The 2.30 accumulator is then shifted by <code>postShift</code> bits and the result truncated to 1.15 format by discarding the low 16 bits.
- *
- * \par
- * Refer to the function <code>arm_biquad_cascade_df1_q15()</code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure.
- * Use the function <code>arm_biquad_cascade_df1_init_q15()</code> to initialize the filter structure.
- *
+ @brief Processing function for the Q15 Biquad cascade filter (fast variant).
+ @param[in] S points to an instance of the Q15 Biquad cascade structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process per call
+ @return none
+
+ @par Scaling and Overflow Behavior
+ This fast version uses a 32-bit accumulator with 2.30 format.
+ The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ Thus, if the accumulator result overflows it wraps around and distorts the result.
+ In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25).
+ The 2.30 accumulator is then shifted by <code>postShift</code> bits and the result truncated to 1.15 format by discarding the low 16 bits.
+ @remark
+ Refer to \ref arm_biquad_cascade_df1_q15() for a slower implementation of this function
+ which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure.
+ Use the function \ref arm_biquad_cascade_df1_init_q15() to initialize the filter structure.
*/
void arm_biquad_cascade_df1_fast_q15(
const arm_biquad_casd_df1_inst_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pIn = pSrc; /* Source pointer */
- q15_t *pOut = pDst; /* Destination pointer */
- q31_t in; /* Temporary variable to hold input value */
- q31_t out; /* Temporary variable to hold output value */
- q31_t b0; /* Temporary variable to hold bo value */
- q31_t b1, a1; /* Filter coefficients */
- q31_t state_in, state_out; /* Filter state variables */
- q31_t acc; /* Accumulator */
- int32_t shift = (int32_t) (15 - S->postShift); /* Post shift */
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- uint32_t sample, stage = S->numStages; /* Stage loop counter */
-
-
+ const q15_t *pIn = pSrc; /* Source pointer */
+ q15_t *pOut = pDst; /* Destination pointer */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t acc; /* Accumulator */
+ q31_t in; /* Temporary variable to hold input value */
+ q31_t out; /* Temporary variable to hold output value */
+ q31_t b0; /* Temporary variable to hold bo value */
+ q31_t b1, a1; /* Filter coefficients */
+ q31_t state_in, state_out; /* Filter state variables */
+ int32_t shift = (int32_t) (15 - S->postShift); /* Post shift */
+ uint32_t sample, stage = S->numStages; /* Loop counters */
do
{
-
/* Read the b0 and 0 coefficients using SIMD */
- b0 = *__SIMD32(pCoeffs)++;
+ b0 = read_q15x2_ia ((q15_t **) &pCoeffs);
/* Read the b1 and b2 coefficients using SIMD */
- b1 = *__SIMD32(pCoeffs)++;
+ b1 = read_q15x2_ia ((q15_t **) &pCoeffs);
/* Read the a1 and a2 coefficients using SIMD */
- a1 = *__SIMD32(pCoeffs)++;
+ a1 = read_q15x2_ia ((q15_t **) &pCoeffs);
/* Read the input state values from the state buffer: x[n-1], x[n-2] */
- state_in = *__SIMD32(pState)++;
+ state_in = read_q15x2_ia (&pState);
/* Read the output state values from the state buffer: y[n-1], y[n-2] */
- state_out = *__SIMD32(pState)--;
+ state_out = read_q15x2_da (&pState);
+
+#if defined (ARM_MATH_LOOPUNROLL)
/* Apply loop unrolling and compute 2 output values simultaneously. */
- /* The variable acc hold output values that are being computed:
+ /* Variable acc hold output values that are being computed:
*
- * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
- * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+ * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+ * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
*/
+
+ /* Loop unrolling: Compute 2 outputs at a time */
sample = blockSize >> 1U;
- /* First part of the processing with loop unrolling. Compute 2 outputs at a time.
- ** a second loop below computes the remaining 1 sample. */
while (sample > 0U)
{
/* Read the input */
- in = *__SIMD32(pIn)++;
+ in = read_q15x2_ia ((q15_t **) &pIn);
/* out = b0 * x[n] + 0 * 0 */
out = __SMUAD(b0, in);
@@ -126,24 +123,20 @@
/* Every time after the output is computed state should be updated. */
/* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
/* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
/* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
#ifndef ARM_MATH_BIG_ENDIAN
-
- state_in = __PKHBT(in, state_in, 16);
+ state_in = __PKHBT(in, state_in, 16);
state_out = __PKHBT(out, state_out, 16);
-
#else
-
- state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
+ state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
state_out = __PKHBT(state_out >> 16, (out), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* out = b0 * x[n] + 0 * 0 */
out = __SMUADX(b0, in);
@@ -155,64 +148,53 @@
/* The result is converted from 3.29 to 1.31 and then saturation is applied */
out = __SSAT((acc >> shift), 16);
-
/* Store the output in the destination buffer. */
-
#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
-
+ write_q15x2_ia (&pOut, __PKHBT(state_out, out, 16));
#else
-
- *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
-
+ write_q15x2_ia (&pOut, __PKHBT(out, state_out >> 16, 16));
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Every time after the output is computed state should be updated. */
/* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
/* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
/* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
#ifndef ARM_MATH_BIG_ENDIAN
-
- state_in = __PKHBT(in >> 16, state_in, 16);
+ state_in = __PKHBT(in >> 16, state_in, 16);
state_out = __PKHBT(out, state_out, 16);
+#else
+ state_in = __PKHBT(state_in >> 16, in, 16);
+ state_out = __PKHBT(state_out >> 16, out, 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+ /* Decrement loop counter */
+ sample--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ sample = (blockSize & 0x1U);
#else
- state_in = __PKHBT(state_in >> 16, in, 16);
- state_out = __PKHBT(state_out >> 16, out, 16);
+ /* Initialize blkCnt with number of samples */
+ sample = blockSize;
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
- /* Decrement the loop counter */
- sample--;
-
- }
-
- /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
- ** No loop unrolling is used. */
-
- if ((blockSize & 0x1U) != 0U)
+ while (sample > 0U)
{
/* Read the input */
in = *pIn++;
/* out = b0 * x[n] + 0 * 0 */
-
#ifndef ARM_MATH_BIG_ENDIAN
-
out = __SMUAD(b0, in);
-
#else
-
out = __SMUADX(b0, in);
-
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* acc = b1 * x[n-1], acc += b2 * x[n-2] + out */
@@ -228,46 +210,41 @@
/* Every time after the output is computed state should be updated. */
/* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
/* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
/* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
#ifndef ARM_MATH_BIG_ENDIAN
-
state_in = __PKHBT(in, state_in, 16);
state_out = __PKHBT(out, state_out, 16);
-
#else
-
state_in = __PKHBT(state_in >> 16, in, 16);
state_out = __PKHBT(state_out >> 16, out, 16);
-
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ /* decrement loop counter */
+ sample--;
}
- /* The first stage goes from the input buffer to the output buffer. */
- /* Subsequent (numStages - 1) occur in-place in the output buffer */
+ /* The first stage goes from the input buffer to the output buffer. */
+ /* Subsequent (numStages - 1) occur in-place in the output buffer */
pIn = pDst;
/* Reset the output pointer */
pOut = pDst;
- /* Store the updated state variables back into the state array */
- *__SIMD32(pState)++ = state_in;
- *__SIMD32(pState)++ = state_out;
+ /* Store the updated state variables back into the state array */
+ write_q15x2_ia(&pState, state_in);
+ write_q15x2_ia(&pState, state_out);
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
stage--;
} while (stage > 0U);
}
-
/**
- * @} end of BiquadCascadeDF1 group
+ @} end of BiquadCascadeDF1 group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
index 00dbae1..db0fb28 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_df1_fast_q31.c
* Description: Processing function for the Q31 Fast Biquad cascade DirectFormI(DF1) filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,55 +29,52 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup BiquadCascadeDF1
- * @{
+ @addtogroup BiquadCascadeDF1
+ @{
*/
/**
- * @details
- *
- * @param[in] *S points to an instance of the Q31 Biquad cascade structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
- * These intermediate results are added to a 2.30 accumulator.
- * Finally, the accumulator is saturated and converted to a 1.31 result.
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
- * In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function
- * arm_biquad_cascade_df1_init_q31() to initialize filter structure.
- *
- * \par
- * Refer to the function <code>arm_biquad_cascade_df1_q31()</code> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. Both the slow and the fast versions use the same instance structure.
- * Use the function <code>arm_biquad_cascade_df1_init_q31()</code> to initialize the filter structure.
+ @brief Processing function for the Q31 Biquad cascade filter (fast variant).
+ @param[in] S points to an instance of the Q31 Biquad cascade structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process per call
+ @return none
+
+ @par Scaling and Overflow Behavior
+ This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+ The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+ These intermediate results are added to a 2.30 accumulator.
+ Finally, the accumulator is saturated and converted to a 1.31 result.
+ The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
+ In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function
+ arm_biquad_cascade_df1_init_q31() to initialize filter structure.
+ @remark
+ Refer to \ref arm_biquad_cascade_df1_q31() for a slower implementation of this function
+ which uses 64-bit accumulation to provide higher precision. Both the slow and the fast versions use the same instance structure.
+ Use the function \ref arm_biquad_cascade_df1_init_q31() to initialize the filter structure.
*/
void arm_biquad_cascade_df1_fast_q31(
const arm_biquad_casd_df1_inst_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q31_t acc = 0; /* accumulator */
- q31_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */
- q31_t b0, b1, b2, a1, a2; /* Filter coefficients */
- q31_t *pIn = pSrc; /* input pointer initialization */
- q31_t *pOut = pDst; /* output pointer initialization */
- q31_t *pState = S->pState; /* pState pointer initialization */
- q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */
- q31_t Xn; /* temporary input */
- int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */
- uint32_t sample, stage = S->numStages; /* loop counters */
-
+ const q31_t *pIn = pSrc; /* Source pointer */
+ q31_t *pOut = pDst; /* Destination pointer */
+ q31_t *pState = S->pState; /* pState pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t acc = 0; /* Accumulator */
+ q31_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ q31_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */
+ q31_t Xn; /* Temporary input */
+ int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */
+ uint32_t sample, stage = S->numStages; /* Loop counters */
do
{
@@ -88,22 +85,23 @@
a1 = *pCoeffs++;
a2 = *pCoeffs++;
- /* Reading the state values */
+ /* Reading the pState values */
Xn1 = pState[0];
Xn2 = pState[1];
Yn1 = pState[2];
Yn2 = pState[3];
+#if defined (ARM_MATH_LOOPUNROLL)
+
/* Apply loop unrolling and compute 4 output values simultaneously. */
- /* The variables acc ... acc3 hold output values that are being computed:
+ /* Variables acc ... acc3 hold output values that are being computed:
*
- * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+ * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
*/
+ /* Loop unrolling: Compute 4 outputs at a time */
sample = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (sample > 0U)
{
/* Read the input */
@@ -111,19 +109,19 @@
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc = b0 * x[n] */
- /*acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);*/
+ /* acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);*/
mult_32x32_keep32_R(acc, b1, Xn1);
/* acc += b1 * x[n-1] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);*/
multAcc_32x32_keep32_R(acc, b0, Xn);
/* acc += b[2] * x[n-2] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
multAcc_32x32_keep32_R(acc, b2, Xn2);
/* acc += a1 * y[n-1] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
multAcc_32x32_keep32_R(acc, a1, Yn1);
/* acc += a2 * y[n-2] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
multAcc_32x32_keep32_R(acc, a2, Yn2);
/* The result is converted to 1.31 , Yn2 variable is reused */
@@ -137,19 +135,19 @@
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc = b0 * x[n] */
- /*acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);*/
+ /* acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);*/
mult_32x32_keep32_R(acc, b0, Xn2);
/* acc += b1 * x[n-1] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);*/
multAcc_32x32_keep32_R(acc, b1, Xn);
/* acc += b[2] * x[n-2] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);*/
multAcc_32x32_keep32_R(acc, b2, Xn1);
/* acc += a1 * y[n-1] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/
multAcc_32x32_keep32_R(acc, a1, Yn2);
/* acc += a2 * y[n-2] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/
multAcc_32x32_keep32_R(acc, a2, Yn1);
/* The result is converted to 1.31, Yn1 variable is reused */
@@ -163,19 +161,19 @@
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc = b0 * x[n] */
- /*acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);*/
+ /* acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);*/
mult_32x32_keep32_R(acc, b0, Xn1);
/* acc += b1 * x[n-1] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);*/
multAcc_32x32_keep32_R(acc, b1, Xn2);
/* acc += b[2] * x[n-2] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);*/
multAcc_32x32_keep32_R(acc, b2, Xn);
/* acc += a1 * y[n-1] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
multAcc_32x32_keep32_R(acc, a1, Yn1);
/* acc += a2 * y[n-2] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
multAcc_32x32_keep32_R(acc, a2, Yn2);
/* The result is converted to 1.31, Yn2 variable is reused */
@@ -190,7 +188,7 @@
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc = b0 * x[n] */
- /*acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
+ /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
mult_32x32_keep32_R(acc, b0, Xn);
/* acc += b1 * x[n-1] */
/*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/
@@ -207,47 +205,53 @@
/* Every time after the output is computed state should be updated. */
/* The states should be updated as: */
- /* Xn2 = Xn1 */
+ /* Xn2 = Xn1 */
Xn2 = Xn1;
/* The result is converted to 1.31, Yn1 variable is reused */
Yn1 = acc << shift;
- /* Xn1 = Xn */
+ /* Xn1 = Xn */
Xn1 = Xn;
/* Store the output in the destination buffer. */
*(pOut + 3U) = Yn1;
pOut += 4U;
- /* decrement the loop counter */
+ /* decrement loop counter */
sample--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
sample = (blockSize & 0x3U);
- while (sample > 0U)
- {
+#else
+
+ /* Initialize blkCnt with number of samples */
+ sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (sample > 0U)
+ {
/* Read the input */
Xn = *pIn++;
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc = b0 * x[n] */
- /*acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
+ /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
mult_32x32_keep32_R(acc, b0, Xn);
/* acc += b1 * x[n-1] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/
multAcc_32x32_keep32_R(acc, b1, Xn1);
/* acc += b[2] * x[n-2] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
multAcc_32x32_keep32_R(acc, b2, Xn2);
/* acc += a1 * y[n-1] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
multAcc_32x32_keep32_R(acc, a1, Yn1);
/* acc += a2 * y[n-2] */
- /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
+ /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
multAcc_32x32_keep32_R(acc, a2, Yn2);
/* The result is converted to 1.31 */
@@ -255,10 +259,10 @@
/* Every time after the output is computed state should be updated. */
/* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
Xn2 = Xn1;
Xn1 = Xn;
Yn2 = Yn1;
@@ -267,18 +271,18 @@
/* Store the output in the destination buffer. */
*pOut++ = acc;
- /* decrement the loop counter */
+ /* decrement loop counter */
sample--;
- }
+ }
- /* The first stage goes from the input buffer to the output buffer. */
- /* Subsequent stages occur in-place in the output buffer */
+ /* The first stage goes from the input buffer to the output buffer. */
+ /* Subsequent stages occur in-place in the output buffer */
pIn = pDst;
/* Reset to destination pointer */
pOut = pDst;
- /* Store the updated state variables back into the pState array */
+ /* Store the updated state variables back into the pState array */
*pState++ = Xn1;
*pState++ = Xn2;
*pState++ = Yn1;
@@ -288,5 +292,5 @@
}
/**
- * @} end of BiquadCascadeDF1 group
- */
+ @} end of BiquadCascadeDF1 group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
index 35ceed4..7ea233a 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_df1_init_f32.c
* Description: Floating-point Biquad cascade DirectFormI(DF1) filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,55 +29,49 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup BiquadCascadeDF1
- * @{
+ @addtogroup BiquadCascadeDF1
+ @{
*/
/**
- * @details
- * @brief Initialization function for the floating-point Biquad cascade filter.
- * @param[in,out] *S points to an instance of the floating-point Biquad cascade structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] *pCoeffs points to the filter coefficients array.
- * @param[in] *pState points to the state array.
- * @return none
- *
- *
- * <b>Coefficient and State Ordering:</b>
- *
- * \par
- * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
- * <pre>
- * {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
- * </pre>
- *
- * \par
- * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
- * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
- * and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
- *
- * \par
- * The <code>pState</code> is a pointer to state array.
- * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
- * The state variables are arranged in the <code>pState</code> array as:
- * <pre>
- * {x[n-1], x[n-2], y[n-1], y[n-2]}
- * </pre>
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
- * The state array has a total length of <code>4*numStages</code> values.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
- *
+ @brief Initialization function for the floating-point Biquad cascade filter.
+ @param[in,out] S points to an instance of the floating-point Biquad cascade structure.
+ @param[in] numStages number of 2nd order stages in the filter.
+ @param[in] pCoeffs points to the filter coefficients.
+ @param[in] pState points to the state buffer.
+ @return none
+
+ @par Coefficient and State Ordering
+ The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+ <pre>
+ {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+ </pre>
+
+ @par
+ where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+ <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+ and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+ @par
+ The <code>pState</code> is a pointer to state array.
+ Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+ The state variables are arranged in the <code>pState</code> array as:
+ <pre>
+ {x[n-1], x[n-2], y[n-1], y[n-2]}
+ </pre>
+ The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+ The state array has a total length of <code>4*numStages</code> values.
+ The state variables are updated after each block of data is processed; the coefficients are untouched.
*/
void arm_biquad_cascade_df1_init_f32(
- arm_biquad_casd_df1_inst_f32 * S,
- uint8_t numStages,
- float32_t * pCoeffs,
- float32_t * pState)
+ arm_biquad_casd_df1_inst_f32 * S,
+ uint8_t numStages,
+ const float32_t * pCoeffs,
+ float32_t * pState)
{
/* Assign filter stages */
S->numStages = numStages;
@@ -93,5 +87,5 @@
}
/**
- * @} end of BiquadCascadeDF1 group
+ @} end of BiquadCascadeDF1 group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
index 2b3243d..b3d0e88 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_df1_init_q15.c
* Description: Q15 Biquad cascade DirectFormI(DF1) filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,54 +29,51 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup BiquadCascadeDF1
- * @{
+ @addtogroup BiquadCascadeDF1
+ @{
*/
/**
- * @details
- *
- * @param[in,out] *S points to an instance of the Q15 Biquad cascade structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] postShift Shift to be applied to the accumulator result. Varies according to the coefficients format
- * @return none
- *
- * <b>Coefficient and State Ordering:</b>
- *
- * \par
- * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
- * <pre>
- * {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}
- * </pre>
- * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
- * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
- * and so on. The <code>pCoeffs</code> array contains a total of <code>6*numStages</code> values.
- * The zero coefficient between <code>b1</code> and <code>b2</code> facilities use of 16-bit SIMD instructions on the Cortex-M4.
- *
- * \par
- * The state variables are stored in the array <code>pState</code>.
- * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
- * The state variables are arranged in the <code>pState</code> array as:
- * <pre>
- * {x[n-1], x[n-2], y[n-1], y[n-2]}
- * </pre>
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
- * The state array has a total length of <code>4*numStages</code> values.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
+ @brief Initialization function for the Q15 Biquad cascade filter.
+ @param[in,out] S points to an instance of the Q15 Biquad cascade structure.
+ @param[in] numStages number of 2nd order stages in the filter.
+ @param[in] pCoeffs points to the filter coefficients.
+ @param[in] pState points to the state buffer.
+ @param[in] postShift Shift to be applied to the accumulator result. Varies according to the coefficients format
+ @return none
+
+ @par Coefficient and State Ordering
+ The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+ <pre>
+ {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}
+ </pre>
+ @par
+ where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+ <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+ and so on. The <code>pCoeffs</code> array contains a total of <code>6*numStages</code> values.
+ The zero coefficient between <code>b1</code> and <code>b2</code> facilities use of 16-bit SIMD instructions on the Cortex-M4.
+ @par
+ The state variables are stored in the array <code>pState</code>.
+ Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+ The state variables are arranged in the <code>pState</code> array as:
+ <pre>
+ {x[n-1], x[n-2], y[n-1], y[n-2]}
+ </pre>
+ The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+ The state array has a total length of <code>4*numStages</code> values.
+ The state variables are updated after each block of data is processed; the coefficients are untouched.
*/
void arm_biquad_cascade_df1_init_q15(
- arm_biquad_casd_df1_inst_q15 * S,
- uint8_t numStages,
- q15_t * pCoeffs,
- q15_t * pState,
- int8_t postShift)
+ arm_biquad_casd_df1_inst_q15 * S,
+ uint8_t numStages,
+ const q15_t * pCoeffs,
+ q15_t * pState,
+ int8_t postShift)
{
/* Assign filter stages */
S->numStages = numStages;
@@ -95,5 +92,5 @@
}
/**
- * @} end of BiquadCascadeDF1 group
+ @} end of BiquadCascadeDF1 group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
index 5c60e4a..1efe86e 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_df1_init_q31.c
* Description: Q31 Biquad cascade DirectFormI(DF1) filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,53 +29,50 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup BiquadCascadeDF1
- * @{
+ @addtogroup BiquadCascadeDF1
+ @{
*/
/**
- * @details
- *
- * @param[in,out] *S points to an instance of the Q31 Biquad cascade structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] *pCoeffs points to the filter coefficients buffer.
- * @param[in] *pState points to the state buffer.
- * @param[in] postShift Shift to be applied after the accumulator. Varies according to the coefficients format
- * @return none
- *
- * <b>Coefficient and State Ordering:</b>
- *
- * \par
- * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
- * <pre>
- * {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
- * </pre>
- * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
- * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
- * and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
- *
- * \par
- * The <code>pState</code> points to state variables array.
- * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
- * The state variables are arranged in the <code>pState</code> array as:
- * <pre>
- * {x[n-1], x[n-2], y[n-1], y[n-2]}
- * </pre>
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
- * The state array has a total length of <code>4*numStages</code> values.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
+ @brief Initialization function for the Q31 Biquad cascade filter.
+ @param[in,out] S points to an instance of the Q31 Biquad cascade structure.
+ @param[in] numStages number of 2nd order stages in the filter.
+ @param[in] pCoeffs points to the filter coefficients.
+ @param[in] pState points to the state buffer.
+ @param[in] postShift Shift to be applied after the accumulator. Varies according to the coefficients format
+ @return none
+
+ @par Coefficient and State Ordering
+ The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+ <pre>
+ {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+ </pre>
+ @par
+ where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+ <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+ and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+ @par
+ The <code>pState</code> points to state variables array.
+ Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+ The state variables are arranged in the <code>pState</code> array as:
+ <pre>
+ {x[n-1], x[n-2], y[n-1], y[n-2]}
+ </pre>
+ The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+ The state array has a total length of <code>4*numStages</code> values.
+ The state variables are updated after each block of data is processed; the coefficients are untouched.
*/
void arm_biquad_cascade_df1_init_q31(
- arm_biquad_casd_df1_inst_q31 * S,
- uint8_t numStages,
- q31_t * pCoeffs,
- q31_t * pState,
- int8_t postShift)
+ arm_biquad_casd_df1_inst_q31 * S,
+ uint8_t numStages,
+ const q31_t * pCoeffs,
+ q31_t * pState,
+ int8_t postShift)
{
/* Assign filter stages */
S->numStages = numStages;
@@ -94,5 +91,5 @@
}
/**
- * @} end of BiquadCascadeDF1 group
+ @} end of BiquadCascadeDF1 group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
index 382b744..2455904 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_df1_q15.c
* Description: Processing function for the Q15 Biquad cascade DirectFormI(DF1) filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,79 +29,74 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup BiquadCascadeDF1
- * @{
+ @addtogroup BiquadCascadeDF1
+ @{
*/
/**
- * @brief Processing function for the Q15 Biquad cascade filter.
- * @param[in] *S points to an instance of the Q15 Biquad cascade structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the location where the output result is written.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * The accumulator is then shifted by <code>postShift</code> bits to truncate the result to 1.15 format by discarding the low 16 bits.
- * Finally, the result is saturated to 1.15 format.
- *
- * \par
- * Refer to the function <code>arm_biquad_cascade_df1_fast_q15()</code> for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.
+ @brief Processing function for the Q15 Biquad cascade filter.
+ @param[in] S points to an instance of the Q15 Biquad cascade structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the location where the output result is written
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+ The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+ There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+ The accumulator is then shifted by <code>postShift</code> bits to truncate the result to 1.15 format by discarding the low 16 bits.
+ Finally, the result is saturated to 1.15 format.
+ @remark
+ Refer to \ref arm_biquad_cascade_df1_fast_q15() for a faster but less precise implementation of this filter.
*/
void arm_biquad_cascade_df1_q15(
const arm_biquad_casd_df1_inst_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q15_t *pIn = pSrc; /* Source pointer */
- q15_t *pOut = pDst; /* Destination pointer */
- q31_t in; /* Temporary variable to hold input value */
- q31_t out; /* Temporary variable to hold output value */
- q31_t b0; /* Temporary variable to hold bo value */
- q31_t b1, a1; /* Filter coefficients */
- q31_t state_in, state_out; /* Filter state variables */
- q31_t acc_l, acc_h;
- q63_t acc; /* Accumulator */
- int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */
- int32_t uShift = (32 - lShift);
+ const q15_t *pIn = pSrc; /* Source pointer */
+ q15_t *pOut = pDst; /* Destination pointer */
+ q31_t in; /* Temporary variable to hold input value */
+ q31_t out; /* Temporary variable to hold output value */
+ q31_t b0; /* Temporary variable to hold bo value */
+ q31_t b1, a1; /* Filter coefficients */
+ q31_t state_in, state_out; /* Filter state variables */
+ q31_t acc_l, acc_h;
+ q63_t acc; /* Accumulator */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */
+ uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */
+ int32_t uShift = (32 - lShift);
do
{
/* Read the b0 and 0 coefficients using SIMD */
- b0 = *__SIMD32(pCoeffs)++;
+ b0 = read_q15x2_ia ((q15_t **) &pCoeffs);
/* Read the b1 and b2 coefficients using SIMD */
- b1 = *__SIMD32(pCoeffs)++;
+ b1 = read_q15x2_ia ((q15_t **) &pCoeffs);
/* Read the a1 and a2 coefficients using SIMD */
- a1 = *__SIMD32(pCoeffs)++;
+ a1 = read_q15x2_ia ((q15_t **) &pCoeffs);
/* Read the input state values from the state buffer: x[n-1], x[n-2] */
- state_in = *__SIMD32(pState)++;
+ state_in = read_q15x2_ia (&pState);
/* Read the output state values from the state buffer: y[n-1], y[n-2] */
- state_out = *__SIMD32(pState)--;
+ state_out = read_q15x2_da (&pState);
/* Apply loop unrolling and compute 2 output values simultaneously. */
/* The variable acc hold output values that are being computed:
@@ -117,7 +112,7 @@
{
/* Read the input */
- in = *__SIMD32(pIn)++;
+ in = read_q15x2_ia ((q15_t **) &pIn);
/* out = b0 * x[n] + 0 * 0 */
out = __SMUAD(b0, in);
@@ -141,23 +136,19 @@
/* Every time after the output is computed state should be updated. */
/* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
/* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
/* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
#ifndef ARM_MATH_BIG_ENDIAN
-
- state_in = __PKHBT(in, state_in, 16);
+ state_in = __PKHBT(in, state_in, 16);
state_out = __PKHBT(out, state_out, 16);
-
#else
-
- state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
+ state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
state_out = __PKHBT(state_out >> 16, (out), 16);
-
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* out = b0 * x[n] + 0 * 0 */
@@ -180,41 +171,30 @@
out = __SSAT(out, 16);
/* Store the output in the destination buffer. */
-
#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
-
+ write_q15x2_ia (&pOut, __PKHBT(state_out, out, 16));
#else
-
- *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
-
+ write_q15x2_ia (&pOut, __PKHBT(out, state_out >> 16, 16));
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Every time after the output is computed state should be updated. */
/* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
/* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
/* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
#ifndef ARM_MATH_BIG_ENDIAN
-
- state_in = __PKHBT(in >> 16, state_in, 16);
+ state_in = __PKHBT(in >> 16, state_in, 16);
state_out = __PKHBT(out, state_out, 16);
-
#else
-
- state_in = __PKHBT(state_in >> 16, in, 16);
+ state_in = __PKHBT(state_in >> 16, in, 16);
state_out = __PKHBT(state_out >> 16, out, 16);
-
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
sample--;
-
}
/* If the blockSize is not a multiple of 2, compute any remaining output samples here.
@@ -226,15 +206,10 @@
in = *pIn++;
/* out = b0 * x[n] + 0 * 0 */
-
#ifndef ARM_MATH_BIG_ENDIAN
-
out = __SMUAD(b0, in);
-
#else
-
out = __SMUADX(b0, in);
-
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* acc = b1 * x[n-1] + b2 * x[n-2] + out */
@@ -259,58 +234,49 @@
/* Every time after the output is computed state should be updated. */
/* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
/* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
/* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
#ifndef ARM_MATH_BIG_ENDIAN
-
state_in = __PKHBT(in, state_in, 16);
state_out = __PKHBT(out, state_out, 16);
-
#else
-
state_in = __PKHBT(state_in >> 16, in, 16);
state_out = __PKHBT(state_out >> 16, out, 16);
-
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
}
- /* The first stage goes from the input wire to the output wire. */
- /* Subsequent numStages occur in-place in the output wire */
+ /* The first stage goes from the input wire to the output wire. */
+ /* Subsequent numStages occur in-place in the output wire */
pIn = pDst;
/* Reset the output pointer */
pOut = pDst;
- /* Store the updated state variables back into the state array */
- *__SIMD32(pState)++ = state_in;
- *__SIMD32(pState)++ = state_out;
+ /* Store the updated state variables back into the state array */
+ write_q15x2_ia (&pState, state_in);
+ write_q15x2_ia (&pState, state_out);
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
stage--;
} while (stage > 0U);
#else
- /* Run the below code for Cortex-M0 */
-
- q15_t *pIn = pSrc; /* Source pointer */
- q15_t *pOut = pDst; /* Destination pointer */
- q15_t b0, b1, b2, a1, a2; /* Filter coefficients */
- q15_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */
- q15_t Xn; /* temporary input */
- q63_t acc; /* Accumulator */
- int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */
+ const q15_t *pIn = pSrc; /* Source pointer */
+ q15_t *pOut = pDst; /* Destination pointer */
+ q15_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ q15_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */
+ q15_t Xn; /* temporary input */
+ q63_t acc; /* Accumulator */
+ int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */
do
{
@@ -328,7 +294,7 @@
Yn1 = pState[2];
Yn2 = pState[3];
- /* The variables acc holds the output value that is computed:
+ /* The variables acc holds the output value that is computed:
* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
*/
@@ -357,10 +323,10 @@
/* Every time after the output is computed state should be updated. */
/* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
Xn2 = Xn1;
Xn1 = Xn;
Yn2 = Yn1;
@@ -392,7 +358,6 @@
}
-
/**
- * @} end of BiquadCascadeDF1 group
+ @} end of BiquadCascadeDF1 group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
index 4ca3f85..463b829 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_df1_q31.c
* Description: Processing function for the Q31 Biquad cascade filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,59 +29,54 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup BiquadCascadeDF1
- * @{
+ @addtogroup BiquadCascadeDF1
+ @{
*/
/**
- * @brief Processing function for the Q31 Biquad cascade filter.
- * @param[in] *S points to an instance of the Q31 Biquad cascade structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
- * After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
- * 1.31 format by discarding the low 32 bits.
- *
- * \par
- * Refer to the function <code>arm_biquad_cascade_df1_fast_q31()</code> for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.
+ @brief Processing function for the Q31 Biquad cascade filter.
+ @param[in] S points to an instance of the Q31 Biquad cascade structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ Thus, if the accumulator result overflows it wraps around rather than clip.
+ In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
+ After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
+ 1.31 format by discarding the low 32 bits.
+ @remark
+ Refer to \ref arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter.
*/
void arm_biquad_cascade_df1_q31(
const arm_biquad_casd_df1_inst_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q63_t acc; /* accumulator */
- uint32_t uShift = ((uint32_t) S->postShift + 1U);
- uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */
- q31_t *pIn = pSrc; /* input pointer initialization */
- q31_t *pOut = pDst; /* output pointer initialization */
- q31_t *pState = S->pState; /* pState pointer initialization */
- q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */
- q31_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */
- q31_t b0, b1, b2, a1, a2; /* Filter coefficients */
- q31_t Xn; /* temporary input */
- uint32_t sample, stage = S->numStages; /* loop counters */
+ const q31_t *pIn = pSrc; /* Source pointer */
+ q31_t *pOut = pDst; /* Destination pointer */
+ q31_t *pState = S->pState; /* pState pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q63_t acc; /* Accumulator */
+ q31_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ q31_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */
+ q31_t Xn; /* Temporary input */
+ uint32_t uShift = ((uint32_t) S->postShift + 1U);
+ uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */
+ uint32_t sample, stage = S->numStages; /* Loop counters */
-
-#if defined (ARM_MATH_DSP)
-
- q31_t acc_l, acc_h; /* temporary output variables */
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t acc_l, acc_h; /* temporary output variables */
+#endif
do
{
@@ -92,301 +87,161 @@
a1 = *pCoeffs++;
a2 = *pCoeffs++;
- /* Reading the state values */
+ /* Reading the pState values */
Xn1 = pState[0];
Xn2 = pState[1];
Yn1 = pState[2];
Yn2 = pState[3];
+#if defined (ARM_MATH_LOOPUNROLL)
+
/* Apply loop unrolling and compute 4 output values simultaneously. */
- /* The variable acc hold output values that are being computed:
+ /* Variable acc hold output values that are being computed:
*
- * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+ * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
*/
+ /* Loop unrolling: Compute 4 outputs at a time */
sample = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (sample > 0U)
{
- /* Read the input */
+ /* Read the first input */
Xn = *pIn++;
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
- /* acc = b0 * x[n] */
- acc = (q63_t) b0 *Xn;
- /* acc += b1 * x[n-1] */
- acc += (q63_t) b1 *Xn1;
- /* acc += b[2] * x[n-2] */
- acc += (q63_t) b2 *Xn2;
- /* acc += a1 * y[n-1] */
- acc += (q63_t) a1 *Yn1;
- /* acc += a2 * y[n-2] */
- acc += (q63_t) a2 *Yn2;
+ acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
/* The result is converted to 1.31 , Yn2 variable is reused */
-
- /* Calc lower part of acc */
- acc_l = acc & 0xffffffff;
-
- /* Calc upper part of acc */
- acc_h = (acc >> 32) & 0xffffffff;
+ acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */
+ acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
/* Apply shift for lower part of acc and upper part of acc */
Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
- /* Store the output in the destination buffer. */
+ /* Store output in destination buffer. */
*pOut++ = Yn2;
/* Read the second input */
Xn2 = *pIn++;
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
- /* acc = b0 * x[n] */
- acc = (q63_t) b0 *Xn2;
- /* acc += b1 * x[n-1] */
- acc += (q63_t) b1 *Xn;
- /* acc += b[2] * x[n-2] */
- acc += (q63_t) b2 *Xn1;
- /* acc += a1 * y[n-1] */
- acc += (q63_t) a1 *Yn2;
- /* acc += a2 * y[n-2] */
- acc += (q63_t) a2 *Yn1;
-
+ acc = ((q63_t) b0 * Xn2) + ((q63_t) b1 * Xn) + ((q63_t) b2 * Xn1) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1);
/* The result is converted to 1.31, Yn1 variable is reused */
-
- /* Calc lower part of acc */
- acc_l = acc & 0xffffffff;
-
- /* Calc upper part of acc */
- acc_h = (acc >> 32) & 0xffffffff;
-
+ acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */
+ acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
/* Apply shift for lower part of acc and upper part of acc */
Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
- /* Store the output in the destination buffer. */
+ /* Store output in destination buffer. */
*pOut++ = Yn1;
- /* Read the third input */
+ /* Read the third input */
Xn1 = *pIn++;
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
- /* acc = b0 * x[n] */
- acc = (q63_t) b0 *Xn1;
- /* acc += b1 * x[n-1] */
- acc += (q63_t) b1 *Xn2;
- /* acc += b[2] * x[n-2] */
- acc += (q63_t) b2 *Xn;
- /* acc += a1 * y[n-1] */
- acc += (q63_t) a1 *Yn1;
- /* acc += a2 * y[n-2] */
- acc += (q63_t) a2 *Yn2;
+ acc = ((q63_t) b0 * Xn1) + ((q63_t) b1 * Xn2) + ((q63_t) b2 * Xn) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
/* The result is converted to 1.31, Yn2 variable is reused */
- /* Calc lower part of acc */
- acc_l = acc & 0xffffffff;
-
- /* Calc upper part of acc */
- acc_h = (acc >> 32) & 0xffffffff;
-
+ acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */
+ acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
/* Apply shift for lower part of acc and upper part of acc */
Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
- /* Store the output in the destination buffer. */
+ /* Store output in destination buffer. */
*pOut++ = Yn2;
/* Read the forth input */
Xn = *pIn++;
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
- /* acc = b0 * x[n] */
- acc = (q63_t) b0 *Xn;
- /* acc += b1 * x[n-1] */
- acc += (q63_t) b1 *Xn1;
- /* acc += b[2] * x[n-2] */
- acc += (q63_t) b2 *Xn2;
- /* acc += a1 * y[n-1] */
- acc += (q63_t) a1 *Yn2;
- /* acc += a2 * y[n-2] */
- acc += (q63_t) a2 *Yn1;
+ acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1);
/* The result is converted to 1.31, Yn1 variable is reused */
- /* Calc lower part of acc */
- acc_l = acc & 0xffffffff;
-
- /* Calc upper part of acc */
- acc_h = (acc >> 32) & 0xffffffff;
+ acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */
+ acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
/* Apply shift for lower part of acc and upper part of acc */
Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
- /* Every time after the output is computed state should be updated. */
- /* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
- Xn2 = Xn1;
- Xn1 = Xn;
-
- /* Store the output in the destination buffer. */
+ /* Store output in destination buffer. */
*pOut++ = Yn1;
- /* decrement the loop counter */
- sample--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- sample = (blockSize & 0x3U);
-
- while (sample > 0U)
- {
- /* Read the input */
- Xn = *pIn++;
-
- /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
- /* acc = b0 * x[n] */
- acc = (q63_t) b0 *Xn;
- /* acc += b1 * x[n-1] */
- acc += (q63_t) b1 *Xn1;
- /* acc += b[2] * x[n-2] */
- acc += (q63_t) b2 *Xn2;
- /* acc += a1 * y[n-1] */
- acc += (q63_t) a1 *Yn1;
- /* acc += a2 * y[n-2] */
- acc += (q63_t) a2 *Yn2;
-
- /* The result is converted to 1.31 */
- acc = acc >> lShift;
-
/* Every time after the output is computed state should be updated. */
- /* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* The states should be updated as: */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
Xn2 = Xn1;
Xn1 = Xn;
- Yn2 = Yn1;
- Yn1 = (q31_t) acc;
- /* Store the output in the destination buffer. */
- *pOut++ = (q31_t) acc;
-
- /* decrement the loop counter */
+ /* decrement loop counter */
sample--;
}
- /* The first stage goes from the input buffer to the output buffer. */
- /* Subsequent stages occur in-place in the output buffer */
- pIn = pDst;
-
- /* Reset to destination pointer */
- pOut = pDst;
-
- /* Store the updated state variables back into the pState array */
- *pState++ = Xn1;
- *pState++ = Xn2;
- *pState++ = Yn1;
- *pState++ = Yn2;
-
- } while (--stage);
+ /* Loop unrolling: Compute remaining outputs */
+ sample = blockSize & 0x3U;
#else
- /* Run the below code for Cortex-M0 */
-
- do
- {
- /* Reading the coefficients */
- b0 = *pCoeffs++;
- b1 = *pCoeffs++;
- b2 = *pCoeffs++;
- a1 = *pCoeffs++;
- a2 = *pCoeffs++;
-
- /* Reading the state values */
- Xn1 = pState[0];
- Xn2 = pState[1];
- Yn1 = pState[2];
- Yn2 = pState[3];
-
- /* The variables acc holds the output value that is computed:
- * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
- */
-
+ /* Initialize blkCnt with number of samples */
sample = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (sample > 0U)
{
/* Read the input */
Xn = *pIn++;
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
- /* acc = b0 * x[n] */
- acc = (q63_t) b0 *Xn;
-
- /* acc += b1 * x[n-1] */
- acc += (q63_t) b1 *Xn1;
- /* acc += b[2] * x[n-2] */
- acc += (q63_t) b2 *Xn2;
- /* acc += a1 * y[n-1] */
- acc += (q63_t) a1 *Yn1;
- /* acc += a2 * y[n-2] */
- acc += (q63_t) a2 *Yn2;
+ acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
/* The result is converted to 1.31 */
acc = acc >> lShift;
+ /* Store output in destination buffer. */
+ *pOut++ = (q31_t) acc;
+
/* Every time after the output is computed state should be updated. */
- /* The states should be updated as: */
- /* Xn2 = Xn1 */
- /* Xn1 = Xn */
- /* Yn2 = Yn1 */
- /* Yn1 = acc */
+ /* The states should be updated as: */
+ /* Xn2 = Xn1 */
+ /* Xn1 = Xn */
+ /* Yn2 = Yn1 */
+ /* Yn1 = acc */
Xn2 = Xn1;
Xn1 = Xn;
Yn2 = Yn1;
Yn1 = (q31_t) acc;
- /* Store the output in the destination buffer. */
- *pOut++ = (q31_t) acc;
-
- /* decrement the loop counter */
+ /* decrement loop counter */
sample--;
}
- /* The first stage goes from the input buffer to the output buffer. */
- /* Subsequent stages occur in-place in the output buffer */
- pIn = pDst;
-
- /* Reset to destination pointer */
- pOut = pDst;
-
- /* Store the updated state variables back into the pState array */
+ /* Store the updated state variables back into the pState array */
*pState++ = Xn1;
*pState++ = Xn2;
*pState++ = Yn1;
*pState++ = Yn2;
- } while (--stage);
+ /* The first stage goes from the input buffer to the output buffer. */
+ /* Subsequent numStages occur in-place in the output buffer */
+ pIn = pDst;
-#endif /* #if defined (ARM_MATH_DSP) */
+ /* Reset output pointer */
+ pOut = pDst;
+
+ /* decrement loop counter */
+ stage--;
+
+ } while (stage > 0U);
+
}
-
-
-
/**
- * @} end of BiquadCascadeDF1 group
- */
+ @} end of BiquadCascadeDF1 group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
index 7d2264e..ae6168c 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_df2T_f32.c
* Description: Processing function for floating-point transposed direct form II Biquad cascade filter
*
- * $Date: 10. December 2018
- * $Revision: V.1.5.2
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2018 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,438 +29,326 @@
#include "arm_math.h"
/**
-* @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
-* @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
-*
-* This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.
-* The filters are implemented as a cascade of second order Biquad sections.
-* These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.
-* Only floating-point data is supported.
-*
-* This function operate on blocks of input and output data and each call to the function
-* processes <code>blockSize</code> samples through the filter.
-* <code>pSrc</code> points to the array of input data and
-* <code>pDst</code> points to the array of output data.
-* Both arrays contain <code>blockSize</code> values.
-*
-* \par Algorithm
-* Each Biquad stage implements a second order filter using the difference equation:
-* <pre>
-* y[n] = b0 * x[n] + d1
-* d1 = b1 * x[n] + a1 * y[n] + d2
-* d2 = b2 * x[n] + a2 * y[n]
-* </pre>
-* where d1 and d2 represent the two state values.
-*
-* \par
-* A Biquad filter using a transposed Direct Form II structure is shown below.
-* \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"
-* Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
-* Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
-* Pay careful attention to the sign of the feedback coefficients.
-* Some design tools flip the sign of the feedback coefficients:
-* <pre>
-* y[n] = b0 * x[n] + d1;
-* d1 = b1 * x[n] - a1 * y[n] + d2;
-* d2 = b2 * x[n] - a2 * y[n];
-* </pre>
-* In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
-*
-* \par
-* Higher order filters are realized as a cascade of second order sections.
-* <code>numStages</code> refers to the number of second order stages used.
-* For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
-* A 9th order filter would be realized with <code>numStages=5</code> second order stages with the
-* coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
-*
-* \par
-* <code>pState</code> points to the state variable array.
-* Each Biquad stage has 2 state variables <code>d1</code> and <code>d2</code>.
-* The state variables are arranged in the <code>pState</code> array as:
-* <pre>
-* {d11, d12, d21, d22, ...}
-* </pre>
-* where <code>d1x</code> refers to the state variables for the first Biquad and
-* <code>d2x</code> refers to the state variables for the second Biquad.
-* The state array has a total length of <code>2*numStages</code> values.
-* The state variables are updated after each block of data is processed; the coefficients are untouched.
-*
-* \par
-* The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.
-* The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.
-* That is why the Direct Form I structure supports Q15 and Q31 data types.
-* The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables <code>d1</code> and <code>d2</code>.
-* Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.
-* The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
-*
-* \par Instance Structure
-* The coefficients and state variables for a filter are stored together in an instance data structure.
-* A separate instance structure must be defined for each filter.
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
-*
-* \par Init Functions
-* There is also an associated initialization function.
-* The initialization function performs following operations:
-* - Sets the values of the internal structure fields.
-* - Zeros out the values in the state buffer.
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numStages, pCoeffs, pState. Also set all of the values in pState to zero.
-*
-* \par
-* Use of the initialization function is optional.
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-* To place an instance structure into a const data section, the instance structure must be manually initialized.
-* Set the values in the state buffer to zeros before static initialization.
-* For example, to statically initialize the instance structure use
-* <pre>
-* arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};
-* </pre>
-* where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer.
-* <code>pCoeffs</code> is the address of the coefficient buffer;
-*
-*/
+ @addtogroup BiquadCascadeDF2T
+ @{
+ */
/**
-* @addtogroup BiquadCascadeDF2T
-* @{
-*/
-
-/**
-* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
-* @param[in] *S points to an instance of the filter data structure.
-* @param[in] *pSrc points to the block of input data.
-* @param[out] *pDst points to the block of output data
-* @param[in] blockSize number of samples to process.
-* @return none.
-*/
-
+ @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
+ @param[in] S points to an instance of the filter data structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+ */
LOW_OPTIMIZATION_ENTER
void arm_biquad_cascade_df2T_f32(
-const arm_biquad_cascade_df2T_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
+ const arm_biquad_cascade_df2T_instance_f32 * S,
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
-
- float32_t *pIn = pSrc; /* source pointer */
- float32_t *pOut = pDst; /* destination pointer */
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */
- float32_t acc1; /* accumulator */
- float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
- float32_t Xn1; /* temporary input */
- float32_t d1, d2; /* state variables */
- uint32_t sample, stage = S->numStages; /* loop counters */
-
-#if defined(ARM_MATH_CM0_FAMILY)
-
- /* Run the below code for Cortex-M0 */
-
- do
- {
- /* Reading the coefficients */
- b0 = *pCoeffs++;
- b1 = *pCoeffs++;
- b2 = *pCoeffs++;
- a1 = *pCoeffs++;
- a2 = *pCoeffs++;
-
- /*Reading the state values */
- d1 = pState[0];
- d2 = pState[1];
+ const float32_t *pIn = pSrc; /* Source pointer */
+ float32_t *pOut = pDst; /* Destination pointer */
+ float32_t *pState = S->pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t acc1; /* Accumulator */
+ float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ float32_t Xn1; /* Temporary input */
+ float32_t d1, d2; /* State variables */
+ uint32_t sample, stage = S->numStages; /* Loop counters */
- sample = blockSize;
+ do
+ {
+ /* Reading the coefficients */
+ b0 = pCoeffs[0];
+ b1 = pCoeffs[1];
+ b2 = pCoeffs[2];
+ a1 = pCoeffs[3];
+ a2 = pCoeffs[4];
- while (sample > 0U)
- {
- /* Read the input */
+ /* Reading the state values */
+ d1 = pState[0];
+ d2 = pState[1];
+
+ pCoeffs += 5U;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 16 outputs at a time */
+ sample = blockSize >> 4U;
+
+ while (sample > 0U) {
+
+ /* y[n] = b0 * x[n] + d1 */
+ /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+ /* d2 = b2 * x[n] + a2 * y[n] */
+
+/* 1 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 2 */
Xn1 = *pIn++;
- /* y[n] = b0 * x[n] + d1 */
- acc1 = (b0 * Xn1) + d1;
+ acc1 = b0 * Xn1 + d1;
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = acc1;
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
- /* Every time after the output is computed state should be updated. */
- /* d1 = b1 * x[n] + a1 * y[n] + d2 */
- d1 = ((b1 * Xn1) + (a1 * acc1)) + d2;
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
- /* d2 = b2 * x[n] + a2 * y[n] */
- d2 = (b2 * Xn1) + (a2 * acc1);
+ *pOut++ = acc1;
- /* decrement the loop counter */
- sample--;
+/* 3 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 4 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 5 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 6 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 7 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 8 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 9 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 10 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 11 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 12 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 13 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 14 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 15 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 16 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+ /* decrement loop counter */
+ sample--;
}
- /* Store the updated state variables back into the state array */
- *pState++ = d1;
- *pState++ = d2;
-
- /* The current stage input is given as the output to the next stage */
- pIn = pDst;
-
- /*Reset the output working pointer */
- pOut = pDst;
-
- /* decrement the loop counter */
- stage--;
-
- } while (stage > 0U);
+ /* Loop unrolling: Compute remaining outputs */
+ sample = blockSize & 0xFU;
#else
- float32_t Xn2, Xn3, Xn4, Xn5, Xn6, Xn7, Xn8; /* Input State variables */
- float32_t Xn9, Xn10, Xn11, Xn12, Xn13, Xn14, Xn15, Xn16;
- float32_t acc2, acc3, acc4, acc5, acc6, acc7; /* Simulates the accumulator */
- float32_t acc8, acc9, acc10, acc11, acc12, acc13, acc14, acc15, acc16;
+ /* Initialize blkCnt with number of samples */
+ sample = blockSize;
- do
- {
- /* Reading the coefficients */
- b0 = pCoeffs[0];
- b1 = pCoeffs[1];
- b2 = pCoeffs[2];
- a1 = pCoeffs[3];
- /* Apply loop unrolling and compute 16 output values simultaneously. */
- sample = blockSize >> 4U;
- a2 = pCoeffs[4];
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
- /*Reading the state values */
- d1 = pState[0];
- d2 = pState[1];
-
- pCoeffs += 5U;
-
-
- /* First part of the processing with loop unrolling. Compute 16 outputs at a time.
- ** a second loop below computes the remaining 1 to 15 samples. */
while (sample > 0U) {
+ Xn1 = *pIn++;
- /* y[n] = b0 * x[n] + d1 */
- /* d1 = b1 * x[n] + a1 * y[n] + d2 */
- /* d2 = b2 * x[n] + a2 * y[n] */
+ acc1 = b0 * Xn1 + d1;
- /* Read the first 2 inputs. 2 cycles */
- Xn1 = pIn[0 ];
- Xn2 = pIn[1 ];
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
- /* Sample 1. 5 cycles */
- Xn3 = pIn[2 ];
- acc1 = b0 * Xn1 + d1;
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
- Xn4 = pIn[3 ];
- d1 = b1 * Xn1 + d2;
+ *pOut++ = acc1;
- Xn5 = pIn[4 ];
- d2 = b2 * Xn1;
-
- Xn6 = pIn[5 ];
- d1 += a1 * acc1;
-
- Xn7 = pIn[6 ];
- d2 += a2 * acc1;
-
- /* Sample 2. 5 cycles */
- Xn8 = pIn[7 ];
- acc2 = b0 * Xn2 + d1;
-
- Xn9 = pIn[8 ];
- d1 = b1 * Xn2 + d2;
-
- Xn10 = pIn[9 ];
- d2 = b2 * Xn2;
-
- Xn11 = pIn[10];
- d1 += a1 * acc2;
-
- Xn12 = pIn[11];
- d2 += a2 * acc2;
-
- /* Sample 3. 5 cycles */
- Xn13 = pIn[12];
- acc3 = b0 * Xn3 + d1;
-
- Xn14 = pIn[13];
- d1 = b1 * Xn3 + d2;
-
- Xn15 = pIn[14];
- d2 = b2 * Xn3;
-
- Xn16 = pIn[15];
- d1 += a1 * acc3;
-
- pIn += 16;
- d2 += a2 * acc3;
-
- /* Sample 4. 5 cycles */
- acc4 = b0 * Xn4 + d1;
- d1 = b1 * Xn4 + d2;
- d2 = b2 * Xn4;
- d1 += a1 * acc4;
- d2 += a2 * acc4;
-
- /* Sample 5. 5 cycles */
- acc5 = b0 * Xn5 + d1;
- d1 = b1 * Xn5 + d2;
- d2 = b2 * Xn5;
- d1 += a1 * acc5;
- d2 += a2 * acc5;
-
- /* Sample 6. 5 cycles */
- acc6 = b0 * Xn6 + d1;
- d1 = b1 * Xn6 + d2;
- d2 = b2 * Xn6;
- d1 += a1 * acc6;
- d2 += a2 * acc6;
-
- /* Sample 7. 5 cycles */
- acc7 = b0 * Xn7 + d1;
- d1 = b1 * Xn7 + d2;
- d2 = b2 * Xn7;
- d1 += a1 * acc7;
- d2 += a2 * acc7;
-
- /* Sample 8. 5 cycles */
- acc8 = b0 * Xn8 + d1;
- d1 = b1 * Xn8 + d2;
- d2 = b2 * Xn8;
- d1 += a1 * acc8;
- d2 += a2 * acc8;
-
- /* Sample 9. 5 cycles */
- acc9 = b0 * Xn9 + d1;
- d1 = b1 * Xn9 + d2;
- d2 = b2 * Xn9;
- d1 += a1 * acc9;
- d2 += a2 * acc9;
-
- /* Sample 10. 5 cycles */
- acc10 = b0 * Xn10 + d1;
- d1 = b1 * Xn10 + d2;
- d2 = b2 * Xn10;
- d1 += a1 * acc10;
- d2 += a2 * acc10;
-
- /* Sample 11. 5 cycles */
- acc11 = b0 * Xn11 + d1;
- d1 = b1 * Xn11 + d2;
- d2 = b2 * Xn11;
- d1 += a1 * acc11;
- d2 += a2 * acc11;
-
- /* Sample 12. 5 cycles */
- acc12 = b0 * Xn12 + d1;
- d1 = b1 * Xn12 + d2;
- d2 = b2 * Xn12;
- d1 += a1 * acc12;
- d2 += a2 * acc12;
-
- /* Sample 13. 5 cycles */
- acc13 = b0 * Xn13 + d1;
- d1 = b1 * Xn13 + d2;
- d2 = b2 * Xn13;
-
- pOut[0 ] = acc1 ;
- d1 += a1 * acc13;
-
- pOut[1 ] = acc2 ;
- d2 += a2 * acc13;
-
- /* Sample 14. 5 cycles */
- pOut[2 ] = acc3 ;
- acc14 = b0 * Xn14 + d1;
-
- pOut[3 ] = acc4 ;
- d1 = b1 * Xn14 + d2;
-
- pOut[4 ] = acc5 ;
- d2 = b2 * Xn14;
-
- pOut[5 ] = acc6 ;
- d1 += a1 * acc14;
-
- pOut[6 ] = acc7 ;
- d2 += a2 * acc14;
-
- /* Sample 15. 5 cycles */
- pOut[7 ] = acc8 ;
- pOut[8 ] = acc9 ;
- acc15 = b0 * Xn15 + d1;
-
- pOut[9 ] = acc10;
- d1 = b1 * Xn15 + d2;
-
- pOut[10] = acc11;
- d2 = b2 * Xn15;
-
- pOut[11] = acc12;
- d1 += a1 * acc15;
-
- pOut[12] = acc13;
- d2 += a2 * acc15;
-
- /* Sample 16. 5 cycles */
- pOut[13] = acc14;
- acc16 = b0 * Xn16 + d1;
-
- pOut[14] = acc15;
- d1 = b1 * Xn16 + d2;
-
- pOut[15] = acc16;
- d2 = b2 * Xn16;
-
- sample--;
- d1 += a1 * acc16;
-
- pOut += 16;
- d2 += a2 * acc16;
- }
-
- sample = blockSize & 0xFu;
- while (sample > 0U) {
- Xn1 = *pIn;
- acc1 = b0 * Xn1 + d1;
-
- pIn++;
- d1 = b1 * Xn1 + d2;
-
- *pOut = acc1;
- d2 = b2 * Xn1;
-
- pOut++;
- d1 += a1 * acc1;
-
- sample--;
- d2 += a2 * acc1;
+ /* decrement loop counter */
+ sample--;
}
/* Store the updated state variables back into the state array */
pState[0] = d1;
- /* The current stage input is given as the output to the next stage */
- pIn = pDst;
-
pState[1] = d2;
- /* decrement the loop counter */
- stage--;
pState += 2U;
- /*Reset the output working pointer */
+ /* The current stage input is given as the output to the next stage */
+ pIn = pDst;
+
+ /* Reset the output working pointer */
pOut = pDst;
- } while (stage > 0U);
+ /* decrement loop counter */
+ stage--;
-#endif
+ } while (stage > 0U);
}
LOW_OPTIMIZATION_EXIT
/**
- * @} end of BiquadCascadeDF2T group
- */
+ @} end of BiquadCascadeDF2T group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
index 32f9855..38c0ea5 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_df2T_f64.c
* Description: Processing function for floating-point transposed direct form II Biquad cascade filter
*
- * $Date: 10. December 2018
- * $Revision: V.1.5.2
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2018 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,196 +29,128 @@
#include "arm_math.h"
/**
-* @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
-* @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
-*
-* This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.
-* The filters are implemented as a cascade of second order Biquad sections.
-* These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.
-* Only floating-point data is supported.
-*
-* This function operate on blocks of input and output data and each call to the function
-* processes <code>blockSize</code> samples through the filter.
-* <code>pSrc</code> points to the array of input data and
-* <code>pDst</code> points to the array of output data.
-* Both arrays contain <code>blockSize</code> values.
-*
-* \par Algorithm
-* Each Biquad stage implements a second order filter using the difference equation:
-* <pre>
-* y[n] = b0 * x[n] + d1
-* d1 = b1 * x[n] + a1 * y[n] + d2
-* d2 = b2 * x[n] + a2 * y[n]
-* </pre>
-* where d1 and d2 represent the two state values.
-*
-* \par
-* A Biquad filter using a transposed Direct Form II structure is shown below.
-* \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"
-* Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
-* Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
-* Pay careful attention to the sign of the feedback coefficients.
-* Some design tools flip the sign of the feedback coefficients:
-* <pre>
-* y[n] = b0 * x[n] + d1;
-* d1 = b1 * x[n] - a1 * y[n] + d2;
-* d2 = b2 * x[n] - a2 * y[n];
-* </pre>
-* In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
-*
-* \par
-* Higher order filters are realized as a cascade of second order sections.
-* <code>numStages</code> refers to the number of second order stages used.
-* For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
-* A 9th order filter would be realized with <code>numStages=5</code> second order stages with the
-* coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
-*
-* \par
-* <code>pState</code> points to the state variable array.
-* Each Biquad stage has 2 state variables <code>d1</code> and <code>d2</code>.
-* The state variables are arranged in the <code>pState</code> array as:
-* <pre>
-* {d11, d12, d21, d22, ...}
-* </pre>
-* where <code>d1x</code> refers to the state variables for the first Biquad and
-* <code>d2x</code> refers to the state variables for the second Biquad.
-* The state array has a total length of <code>2*numStages</code> values.
-* The state variables are updated after each block of data is processed; the coefficients are untouched.
-*
-* \par
-* The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.
-* The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.
-* That is why the Direct Form I structure supports Q15 and Q31 data types.
-* The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables <code>d1</code> and <code>d2</code>.
-* Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.
-* The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
-*
-* \par Instance Structure
-* The coefficients and state variables for a filter are stored together in an instance data structure.
-* A separate instance structure must be defined for each filter.
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
-*
-* \par Init Functions
-* There is also an associated initialization function.
-* The initialization function performs following operations:
-* - Sets the values of the internal structure fields.
-* - Zeros out the values in the state buffer.
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numStages, pCoeffs, pState. Also set all of the values in pState to zero.
-*
-* \par
-* Use of the initialization function is optional.
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-* To place an instance structure into a const data section, the instance structure must be manually initialized.
-* Set the values in the state buffer to zeros before static initialization.
-* For example, to statically initialize the instance structure use
-* <pre>
-* arm_biquad_cascade_df2T_instance_f64 S1 = {numStages, pState, pCoeffs};
-* </pre>
-* where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer.
-* <code>pCoeffs</code> is the address of the coefficient buffer;
-*
+ @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
+
+ This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.
+ The filters are implemented as a cascade of second order Biquad sections.
+ These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.
+ Only floating-point data is supported.
+
+ This function operate on blocks of input and output data and each call to the function
+ processes <code>blockSize</code> samples through the filter.
+ <code>pSrc</code> points to the array of input data and
+ <code>pDst</code> points to the array of output data.
+ Both arrays contain <code>blockSize</code> values.
+
+ @par Algorithm
+ Each Biquad stage implements a second order filter using the difference equation:
+ <pre>
+ y[n] = b0 * x[n] + d1
+ d1 = b1 * x[n] + a1 * y[n] + d2
+ d2 = b2 * x[n] + a2 * y[n]
+ </pre>
+ where d1 and d2 represent the two state values.
+ @par
+ A Biquad filter using a transposed Direct Form II structure is shown below.
+ \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"
+ Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
+ Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
+ Pay careful attention to the sign of the feedback coefficients.
+ Some design tools flip the sign of the feedback coefficients:
+ <pre>
+ y[n] = b0 * x[n] + d1;
+ d1 = b1 * x[n] - a1 * y[n] + d2;
+ d2 = b2 * x[n] - a2 * y[n];
+ </pre>
+ In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
+ @par
+ Higher order filters are realized as a cascade of second order sections.
+ <code>numStages</code> refers to the number of second order stages used.
+ For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
+ A 9th order filter would be realized with <code>numStages=5</code> second order stages with the
+ coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
+ @par
+ <code>pState</code> points to the state variable array.
+ Each Biquad stage has 2 state variables <code>d1</code> and <code>d2</code>.
+ The state variables are arranged in the <code>pState</code> array as:
+ <pre>
+ {d11, d12, d21, d22, ...}
+ </pre>
+ where <code>d1x</code> refers to the state variables for the first Biquad and
+ <code>d2x</code> refers to the state variables for the second Biquad.
+ The state array has a total length of <code>2*numStages</code> values.
+ The state variables are updated after each block of data is processed; the coefficients are untouched.
+ @par
+ The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.
+ The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.
+ That is why the Direct Form I structure supports Q15 and Q31 data types.
+ The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables <code>d1</code> and <code>d2</code>.
+ Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.
+ The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
+
+ @par Instance Structure
+ The coefficients and state variables for a filter are stored together in an instance data structure.
+ A separate instance structure must be defined for each filter.
+ Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+
+ @par Init Functions
+ There is also an associated initialization function.
+ The initialization function performs following operations:
+ - Sets the values of the internal structure fields.
+ - Zeros out the values in the state buffer.
+ To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ numStages, pCoeffs, pState. Also set all of the values in pState to zero.
+ @par
+ Use of the initialization function is optional.
+ However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+ To place an instance structure into a const data section, the instance structure must be manually initialized.
+ Set the values in the state buffer to zeros before static initialization.
+ For example, to statically initialize the instance structure use
+ <pre>
+ arm_biquad_cascade_df2T_instance_f64 S1 = {numStages, pState, pCoeffs};
+ arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};
+ </pre>
+ where <code>numStages</code> is the number of Biquad stages in the filter;
+ <code>pState</code> is the address of the state buffer.
+ <code>pCoeffs</code> is the address of the coefficient buffer;
*/
/**
-* @addtogroup BiquadCascadeDF2T
-* @{
-*/
+ @addtogroup BiquadCascadeDF2T
+ @{
+ */
/**
-* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
-* @param[in] *S points to an instance of the filter data structure.
-* @param[in] *pSrc points to the block of input data.
-* @param[out] *pDst points to the block of output data
-* @param[in] blockSize number of samples to process.
-* @return none.
-*/
-
+ @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
+ @param[in] S points to an instance of the filter data structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+ */
LOW_OPTIMIZATION_ENTER
void arm_biquad_cascade_df2T_f64(
-const arm_biquad_cascade_df2T_instance_f64 * S,
-float64_t * pSrc,
-float64_t * pDst,
-uint32_t blockSize)
+ const arm_biquad_cascade_df2T_instance_f64 * S,
+ float64_t * pSrc,
+ float64_t * pDst,
+ uint32_t blockSize)
{
- float64_t *pIn = pSrc; /* source pointer */
- float64_t *pOut = pDst; /* destination pointer */
- float64_t *pState = S->pState; /* State pointer */
- float64_t *pCoeffs = S->pCoeffs; /* coefficient pointer */
- float64_t acc1; /* accumulator */
- float64_t b0, b1, b2, a1, a2; /* Filter coefficients */
- float64_t Xn1; /* temporary input */
- float64_t d1, d2; /* state variables */
- uint32_t sample, stage = S->numStages; /* loop counters */
+ float64_t *pIn = pSrc; /* Source pointer */
+ float64_t *pOut = pDst; /* Destination pointer */
+ float64_t *pState = S->pState; /* State pointer */
+ float64_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float64_t acc1; /* Accumulator */
+ float64_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ float64_t Xn1; /* Temporary input */
+ float64_t d1, d2; /* State variables */
+ uint32_t sample, stage = S->numStages; /* Loop counters */
-#if defined (ARM_MATH_CM0_FAMILY)
-
- /* Run the below code for Cortex-M0 */
-
- do
- {
- /* Reading the coefficients */
- b0 = *pCoeffs++;
- b1 = *pCoeffs++;
- b2 = *pCoeffs++;
- a1 = *pCoeffs++;
- a2 = *pCoeffs++;
-
- /*Reading the state values */
- d1 = pState[0];
- d2 = pState[1];
-
-
- sample = blockSize;
-
- while (sample > 0U)
- {
- /* Read the input */
- Xn1 = *pIn++;
-
- /* y[n] = b0 * x[n] + d1 */
- acc1 = (b0 * Xn1) + d1;
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = acc1;
-
- /* Every time after the output is computed state should be updated. */
- /* d1 = b1 * x[n] + a1 * y[n] + d2 */
- d1 = ((b1 * Xn1) + (a1 * acc1)) + d2;
-
- /* d2 = b2 * x[n] + a2 * y[n] */
- d2 = (b2 * Xn1) + (a2 * acc1);
-
- /* decrement the loop counter */
- sample--;
- }
-
- /* Store the updated state variables back into the state array */
- *pState++ = d1;
- *pState++ = d2;
-
- /* The current stage input is given as the output to the next stage */
- pIn = pDst;
-
- /*Reset the output working pointer */
- pOut = pDst;
-
- /* decrement the loop counter */
- stage--;
-
- } while (stage > 0U);
-
-#else
-
- float64_t Xn2, Xn3, Xn4, Xn5, Xn6, Xn7, Xn8; /* Input State variables */
- float64_t Xn9, Xn10, Xn11, Xn12, Xn13, Xn14, Xn15, Xn16;
- float64_t acc2, acc3, acc4, acc5, acc6, acc7; /* Simulates the accumulator */
- float64_t acc8, acc9, acc10, acc11, acc12, acc13, acc14, acc15, acc16;
do
{
@@ -227,240 +159,285 @@
b1 = pCoeffs[1];
b2 = pCoeffs[2];
a1 = pCoeffs[3];
- /* Apply loop unrolling and compute 16 output values simultaneously. */
- sample = blockSize >> 4U;
a2 = pCoeffs[4];
- /*Reading the state values */
+ /* Reading the state values */
d1 = pState[0];
d2 = pState[1];
pCoeffs += 5U;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* First part of the processing with loop unrolling. Compute 16 outputs at a time.
- ** a second loop below computes the remaining 1 to 15 samples. */
+ /* Loop unrolling: Compute 16 outputs at a time */
+ sample = blockSize >> 4U;
+
while (sample > 0U) {
/* y[n] = b0 * x[n] + d1 */
/* d1 = b1 * x[n] + a1 * y[n] + d2 */
/* d2 = b2 * x[n] + a2 * y[n] */
- /* Read the first 2 inputs. 2 cycles */
- Xn1 = pIn[0 ];
- Xn2 = pIn[1 ];
+/* 1 */
+ Xn1 = *pIn++;
- /* Sample 1. 5 cycles */
- Xn3 = pIn[2 ];
acc1 = b0 * Xn1 + d1;
- Xn4 = pIn[3 ];
d1 = b1 * Xn1 + d2;
-
- Xn5 = pIn[4 ];
- d2 = b2 * Xn1;
-
- Xn6 = pIn[5 ];
d1 += a1 * acc1;
- Xn7 = pIn[6 ];
+ d2 = b2 * Xn1;
d2 += a2 * acc1;
- /* Sample 2. 5 cycles */
- Xn8 = pIn[7 ];
- acc2 = b0 * Xn2 + d1;
+ *pOut++ = acc1;
- Xn9 = pIn[8 ];
- d1 = b1 * Xn2 + d2;
- Xn10 = pIn[9 ];
- d2 = b2 * Xn2;
+/* 2 */
+ Xn1 = *pIn++;
- Xn11 = pIn[10];
- d1 += a1 * acc2;
+ acc1 = b0 * Xn1 + d1;
- Xn12 = pIn[11];
- d2 += a2 * acc2;
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
- /* Sample 3. 5 cycles */
- Xn13 = pIn[12];
- acc3 = b0 * Xn3 + d1;
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
- Xn14 = pIn[13];
- d1 = b1 * Xn3 + d2;
+ *pOut++ = acc1;
- Xn15 = pIn[14];
- d2 = b2 * Xn3;
+/* 3 */
+ Xn1 = *pIn++;
- Xn16 = pIn[15];
- d1 += a1 * acc3;
+ acc1 = b0 * Xn1 + d1;
- pIn += 16;
- d2 += a2 * acc3;
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
- /* Sample 4. 5 cycles */
- acc4 = b0 * Xn4 + d1;
- d1 = b1 * Xn4 + d2;
- d2 = b2 * Xn4;
- d1 += a1 * acc4;
- d2 += a2 * acc4;
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
- /* Sample 5. 5 cycles */
- acc5 = b0 * Xn5 + d1;
- d1 = b1 * Xn5 + d2;
- d2 = b2 * Xn5;
- d1 += a1 * acc5;
- d2 += a2 * acc5;
+ *pOut++ = acc1;
- /* Sample 6. 5 cycles */
- acc6 = b0 * Xn6 + d1;
- d1 = b1 * Xn6 + d2;
- d2 = b2 * Xn6;
- d1 += a1 * acc6;
- d2 += a2 * acc6;
+/* 4 */
+ Xn1 = *pIn++;
- /* Sample 7. 5 cycles */
- acc7 = b0 * Xn7 + d1;
- d1 = b1 * Xn7 + d2;
- d2 = b2 * Xn7;
- d1 += a1 * acc7;
- d2 += a2 * acc7;
+ acc1 = b0 * Xn1 + d1;
- /* Sample 8. 5 cycles */
- acc8 = b0 * Xn8 + d1;
- d1 = b1 * Xn8 + d2;
- d2 = b2 * Xn8;
- d1 += a1 * acc8;
- d2 += a2 * acc8;
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
- /* Sample 9. 5 cycles */
- acc9 = b0 * Xn9 + d1;
- d1 = b1 * Xn9 + d2;
- d2 = b2 * Xn9;
- d1 += a1 * acc9;
- d2 += a2 * acc9;
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
- /* Sample 10. 5 cycles */
- acc10 = b0 * Xn10 + d1;
- d1 = b1 * Xn10 + d2;
- d2 = b2 * Xn10;
- d1 += a1 * acc10;
- d2 += a2 * acc10;
+ *pOut++ = acc1;
- /* Sample 11. 5 cycles */
- acc11 = b0 * Xn11 + d1;
- d1 = b1 * Xn11 + d2;
- d2 = b2 * Xn11;
- d1 += a1 * acc11;
- d2 += a2 * acc11;
+/* 5 */
+ Xn1 = *pIn++;
- /* Sample 12. 5 cycles */
- acc12 = b0 * Xn12 + d1;
- d1 = b1 * Xn12 + d2;
- d2 = b2 * Xn12;
- d1 += a1 * acc12;
- d2 += a2 * acc12;
+ acc1 = b0 * Xn1 + d1;
- /* Sample 13. 5 cycles */
- acc13 = b0 * Xn13 + d1;
- d1 = b1 * Xn13 + d2;
- d2 = b2 * Xn13;
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
- pOut[0 ] = acc1 ;
- d1 += a1 * acc13;
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
- pOut[1 ] = acc2 ;
- d2 += a2 * acc13;
+ *pOut++ = acc1;
- /* Sample 14. 5 cycles */
- pOut[2 ] = acc3 ;
- acc14 = b0 * Xn14 + d1;
+/* 6 */
+ Xn1 = *pIn++;
- pOut[3 ] = acc4 ;
- d1 = b1 * Xn14 + d2;
+ acc1 = b0 * Xn1 + d1;
- pOut[4 ] = acc5 ;
- d2 = b2 * Xn14;
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
- pOut[5 ] = acc6 ;
- d1 += a1 * acc14;
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
- pOut[6 ] = acc7 ;
- d2 += a2 * acc14;
+ *pOut++ = acc1;
- /* Sample 15. 5 cycles */
- pOut[7 ] = acc8 ;
- pOut[8 ] = acc9 ;
- acc15 = b0 * Xn15 + d1;
+/* 7 */
+ Xn1 = *pIn++;
- pOut[9 ] = acc10;
- d1 = b1 * Xn15 + d2;
+ acc1 = b0 * Xn1 + d1;
- pOut[10] = acc11;
- d2 = b2 * Xn15;
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
- pOut[11] = acc12;
- d1 += a1 * acc15;
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
- pOut[12] = acc13;
- d2 += a2 * acc15;
+ *pOut++ = acc1;
- /* Sample 16. 5 cycles */
- pOut[13] = acc14;
- acc16 = b0 * Xn16 + d1;
+/* 8 */
+ Xn1 = *pIn++;
- pOut[14] = acc15;
- d1 = b1 * Xn16 + d2;
+ acc1 = b0 * Xn1 + d1;
- pOut[15] = acc16;
- d2 = b2 * Xn16;
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 9 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 10 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 11 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 12 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 13 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 14 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 15 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+/* 16 */
+ Xn1 = *pIn++;
+
+ acc1 = b0 * Xn1 + d1;
+
+ d1 = b1 * Xn1 + d2;
+ d1 += a1 * acc1;
+
+ d2 = b2 * Xn1;
+ d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+ /* decrement loop counter */
sample--;
- d1 += a1 * acc16;
-
- pOut += 16;
- d2 += a2 * acc16;
}
- sample = blockSize & 0xFu;
+ /* Loop unrolling: Compute remaining outputs */
+ sample = blockSize & 0xFU;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (sample > 0U) {
- Xn1 = *pIn;
+ Xn1 = *pIn++;
+
acc1 = b0 * Xn1 + d1;
- pIn++;
d1 = b1 * Xn1 + d2;
-
- *pOut = acc1;
- d2 = b2 * Xn1;
-
- pOut++;
d1 += a1 * acc1;
- sample--;
+ d2 = b2 * Xn1;
d2 += a2 * acc1;
+
+ *pOut++ = acc1;
+
+ /* decrement loop counter */
+ sample--;
}
/* Store the updated state variables back into the state array */
pState[0] = d1;
- /* The current stage input is given as the output to the next stage */
- pIn = pDst;
-
pState[1] = d2;
- /* decrement the loop counter */
- stage--;
pState += 2U;
- /*Reset the output working pointer */
+ /* The current stage input is given as the output to the next stage */
+ pIn = pDst;
+
+ /* Reset the output working pointer */
pOut = pDst;
- } while (stage > 0U);
+ /* decrement loop counter */
+ stage--;
-#endif
+ } while (stage > 0U);
}
LOW_OPTIMIZATION_EXIT
/**
- * @} end of BiquadCascadeDF2T group
- */
+ @} end of BiquadCascadeDF2T group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
index 1801799..5154ef4 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_df2T_init_f32.c
* Description: Initialization function for floating-point transposed direct form II Biquad cascade filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,47 +29,44 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup BiquadCascadeDF2T
- * @{
+ @addtogroup BiquadCascadeDF2T
+ @{
*/
/**
- * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
- * @param[in,out] *S points to an instance of the filter data structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @return none
- *
- * <b>Coefficient and State Ordering:</b>
- * \par
- * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
- * <pre>
- * {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
- * </pre>
- *
- * \par
- * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
- * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
- * and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
- *
- * \par
- * The <code>pState</code> is a pointer to state array.
- * Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>.
- * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
- * The state array has a total length of <code>2*numStages</code> values.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
+ @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+ @param[in,out] S points to an instance of the filter data structure.
+ @param[in] numStages number of 2nd order stages in the filter.
+ @param[in] pCoeffs points to the filter coefficients.
+ @param[in] pState points to the state buffer.
+ @return none
+
+ @par Coefficient and State Ordering
+ The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+ <pre>
+ {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+ </pre>
+ @par
+ where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+ <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+ and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+ @par
+ The <code>pState</code> is a pointer to state array.
+ Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>.
+ The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
+ The state array has a total length of <code>2*numStages</code> values.
+ The state variables are updated after each block of data is processed; the coefficients are untouched.
*/
void arm_biquad_cascade_df2T_init_f32(
- arm_biquad_cascade_df2T_instance_f32 * S,
- uint8_t numStages,
- float32_t * pCoeffs,
- float32_t * pState)
+ arm_biquad_cascade_df2T_instance_f32 * S,
+ uint8_t numStages,
+ const float32_t * pCoeffs,
+ float32_t * pState)
{
/* Assign filter stages */
S->numStages = numStages;
@@ -85,5 +82,5 @@
}
/**
- * @} end of BiquadCascadeDF2T group
+ @} end of BiquadCascadeDF2T group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
index 3d0a508..465ab00 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_df2T_init_f64.c
* Description: Initialization function for floating-point transposed direct form II Biquad cascade filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,47 +29,44 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup BiquadCascadeDF2T
- * @{
+ @addtogroup BiquadCascadeDF2T
+ @{
*/
/**
- * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
- * @param[in,out] *S points to an instance of the filter data structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @return none
- *
- * <b>Coefficient and State Ordering:</b>
- * \par
- * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
- * <pre>
- * {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
- * </pre>
- *
- * \par
- * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
- * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
- * and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
- *
- * \par
- * The <code>pState</code> is a pointer to state array.
- * Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>.
- * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
- * The state array has a total length of <code>2*numStages</code> values.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
+ @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+ @param[in,out] S points to an instance of the filter data structure
+ @param[in] numStages number of 2nd order stages in the filter
+ @param[in] pCoeffs points to the filter coefficients
+ @param[in] pState points to the state buffer
+ @return none
+
+ @par Coefficient and State Ordering
+ The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+ <pre>
+ {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+ </pre>
+ @par
+ where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+ <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+ and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+ @par
+ The <code>pState</code> is a pointer to state array.
+ Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>.
+ The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
+ The state array has a total length of <code>2*numStages</code> values.
+ The state variables are updated after each block of data is processed; the coefficients are untouched.
*/
void arm_biquad_cascade_df2T_init_f64(
- arm_biquad_cascade_df2T_instance_f64 * S,
- uint8_t numStages,
- float64_t * pCoeffs,
- float64_t * pState)
+ arm_biquad_cascade_df2T_instance_f64 * S,
+ uint8_t numStages,
+ float64_t * pCoeffs,
+ float64_t * pState)
{
/* Assign filter stages */
S->numStages = numStages;
@@ -85,5 +82,5 @@
}
/**
- * @} end of BiquadCascadeDF2T group
+ @} end of BiquadCascadeDF2T group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
index 19803e3..f7a235d 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_stereo_df2T_f32.c
* Description: Processing function for floating-point transposed direct form II Biquad cascade filter. 2 channels
*
- * $Date: 10. December 2018
- * $Revision: V.1.5.2
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2018 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,202 +29,39 @@
#include "arm_math.h"
/**
-* @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
-* @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
-*
-* This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.
-* The filters are implemented as a cascade of second order Biquad sections.
-* These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.
-* Only floating-point data is supported.
-*
-* This function operate on blocks of input and output data and each call to the function
-* processes <code>blockSize</code> samples through the filter.
-* <code>pSrc</code> points to the array of input data and
-* <code>pDst</code> points to the array of output data.
-* Both arrays contain <code>blockSize</code> values.
-*
-* \par Algorithm
-* Each Biquad stage implements a second order filter using the difference equation:
-* <pre>
-* y[n] = b0 * x[n] + d1
-* d1 = b1 * x[n] + a1 * y[n] + d2
-* d2 = b2 * x[n] + a2 * y[n]
-* </pre>
-* where d1 and d2 represent the two state values.
-*
-* \par
-* A Biquad filter using a transposed Direct Form II structure is shown below.
-* \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"
-* Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
-* Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
-* Pay careful attention to the sign of the feedback coefficients.
-* Some design tools flip the sign of the feedback coefficients:
-* <pre>
-* y[n] = b0 * x[n] + d1;
-* d1 = b1 * x[n] - a1 * y[n] + d2;
-* d2 = b2 * x[n] - a2 * y[n];
-* </pre>
-* In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
-*
-* \par
-* Higher order filters are realized as a cascade of second order sections.
-* <code>numStages</code> refers to the number of second order stages used.
-* For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
-* A 9th order filter would be realized with <code>numStages=5</code> second order stages with the
-* coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
-*
-* \par
-* <code>pState</code> points to the state variable array.
-* Each Biquad stage has 2 state variables <code>d1</code> and <code>d2</code>.
-* The state variables are arranged in the <code>pState</code> array as:
-* <pre>
-* {d11, d12, d21, d22, ...}
-* </pre>
-* where <code>d1x</code> refers to the state variables for the first Biquad and
-* <code>d2x</code> refers to the state variables for the second Biquad.
-* The state array has a total length of <code>2*numStages</code> values.
-* The state variables are updated after each block of data is processed; the coefficients are untouched.
-*
-* \par
-* The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.
-* The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.
-* That is why the Direct Form I structure supports Q15 and Q31 data types.
-* The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables <code>d1</code> and <code>d2</code>.
-* Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.
-* The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
-*
-* \par Instance Structure
-* The coefficients and state variables for a filter are stored together in an instance data structure.
-* A separate instance structure must be defined for each filter.
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
-*
-* \par Init Functions
-* There is also an associated initialization function.
-* The initialization function performs following operations:
-* - Sets the values of the internal structure fields.
-* - Zeros out the values in the state buffer.
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numStages, pCoeffs, pState. Also set all of the values in pState to zero.
-*
-* \par
-* Use of the initialization function is optional.
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-* To place an instance structure into a const data section, the instance structure must be manually initialized.
-* Set the values in the state buffer to zeros before static initialization.
-* For example, to statically initialize the instance structure use
-* <pre>
-* arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};
-* </pre>
-* where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer.
-* <code>pCoeffs</code> is the address of the coefficient buffer;
-*
-*/
+ @addtogroup BiquadCascadeDF2T
+ @{
+ */
/**
-* @addtogroup BiquadCascadeDF2T
-* @{
-*/
-
-/**
-* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
-* @param[in] *S points to an instance of the filter data structure.
-* @param[in] *pSrc points to the block of input data.
-* @param[out] *pDst points to the block of output data
-* @param[in] blockSize number of samples to process.
-* @return none.
-*/
-
+ @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
+ @param[in] S points to an instance of the filter data structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+ */
LOW_OPTIMIZATION_ENTER
void arm_biquad_cascade_stereo_df2T_f32(
-const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
+ const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
-
- float32_t *pIn = pSrc; /* source pointer */
- float32_t *pOut = pDst; /* destination pointer */
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */
- float32_t acc1a, acc1b; /* accumulator */
- float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
- float32_t Xn1a, Xn1b; /* temporary input */
- float32_t d1a, d2a, d1b, d2b; /* state variables */
- uint32_t sample, stage = S->numStages; /* loop counters */
-
-#if defined(ARM_MATH_CM0_FAMILY)
- do
- {
- /* Reading the coefficients */
- b0 = *pCoeffs++;
- b1 = *pCoeffs++;
- b2 = *pCoeffs++;
- a1 = *pCoeffs++;
- a2 = *pCoeffs++;
-
- /*Reading the state values */
- d1a = pState[0];
- d2a = pState[1];
- d1b = pState[2];
- d2b = pState[3];
-
-
- sample = blockSize;
-
- while (sample > 0U)
- {
- /* Read the input */
- Xn1a = *pIn++; //Channel a
- Xn1b = *pIn++; //Channel b
-
- /* y[n] = b0 * x[n] + d1 */
- acc1a = (b0 * Xn1a) + d1a;
- acc1b = (b0 * Xn1b) + d1b;
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = acc1a;
- *pOut++ = acc1b;
-
- /* Every time after the output is computed state should be updated. */
- /* d1 = b1 * x[n] + a1 * y[n] + d2 */
- d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
- d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
- /* d2 = b2 * x[n] + a2 * y[n] */
- d2a = (b2 * Xn1a) + (a2 * acc1a);
- d2b = (b2 * Xn1b) + (a2 * acc1b);
-
- /* decrement the loop counter */
- sample--;
- }
-
- /* Store the updated state variables back into the state array */
- *pState++ = d1a;
- *pState++ = d2a;
- *pState++ = d1b;
- *pState++ = d2b;
-
- /* The current stage input is given as the output to the next stage */
- pIn = pDst;
-
- /*Reset the output working pointer */
- pOut = pDst;
-
- /* decrement the loop counter */
- stage--;
-
- } while (stage > 0U);
-
-#else
-
- float32_t Xn2a, Xn3a, Xn4a, Xn5a, Xn6a, Xn7a, Xn8a; /* Input State variables */
- float32_t Xn2b, Xn3b, Xn4b, Xn5b, Xn6b, Xn7b, Xn8b; /* Input State variables */
- float32_t acc2a, acc3a, acc4a, acc5a, acc6a, acc7a, acc8a; /* Simulates the accumulator */
- float32_t acc2b, acc3b, acc4b, acc5b, acc6b, acc7b, acc8b; /* Simulates the accumulator */
+ const float32_t *pIn = pSrc; /* Source pointer */
+ float32_t *pOut = pDst; /* Destination pointer */
+ float32_t *pState = S->pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t acc1a, acc1b; /* Accumulator */
+ float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
+ float32_t Xn1a, Xn1b; /* Temporary input */
+ float32_t d1a, d2a, d1b, d2b; /* State variables */
+ uint32_t sample, stage = S->numStages; /* Loop counters */
do
{
@@ -233,11 +70,9 @@
b1 = pCoeffs[1];
b2 = pCoeffs[2];
a1 = pCoeffs[3];
- /* Apply loop unrolling and compute 8 output values simultaneously. */
- sample = blockSize >> 3U;
a2 = pCoeffs[4];
- /*Reading the state values */
+ /* Reading the state values */
d1a = pState[0];
d2a = pState[1];
d1b = pState[2];
@@ -245,215 +80,182 @@
pCoeffs += 5U;
- /* First part of the processing with loop unrolling. Compute 8 outputs at a time.
- ** a second loop below computes the remaining 1 to 7 samples. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 8 outputs at a time */
+ sample = blockSize >> 3U;
+
while (sample > 0U) {
+ /* y[n] = b0 * x[n] + d1 */
+ /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+ /* d2 = b2 * x[n] + a2 * y[n] */
- /* y[n] = b0 * x[n] + d1 */
- /* d1 = b1 * x[n] + a1 * y[n] + d2 */
- /* d2 = b2 * x[n] + a2 * y[n] */
+/* 1 */
+ Xn1a = *pIn++; /* Channel a */
+ Xn1b = *pIn++; /* Channel b */
- /* Read the first 2 inputs. 2 cycles */
- Xn1a = pIn[0 ];
- Xn1b = pIn[1 ];
+ acc1a = (b0 * Xn1a) + d1a;
+ acc1b = (b0 * Xn1b) + d1b;
- /* Sample 1. 5 cycles */
- Xn2a = pIn[2 ];
- acc1a = b0 * Xn1a + d1a;
+ *pOut++ = acc1a;
+ *pOut++ = acc1b;
- Xn2b = pIn[3 ];
- d1a = b1 * Xn1a + d2a;
+ d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+ d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
- Xn3a = pIn[4 ];
- d2a = b2 * Xn1a;
+ d2a = (b2 * Xn1a) + (a2 * acc1a);
+ d2b = (b2 * Xn1b) + (a2 * acc1b);
- Xn3b = pIn[5 ];
- d1a += a1 * acc1a;
+/* 2 */
+ Xn1a = *pIn++; /* Channel a */
+ Xn1b = *pIn++; /* Channel b */
- Xn4a = pIn[6 ];
- d2a += a2 * acc1a;
+ acc1a = (b0 * Xn1a) + d1a;
+ acc1b = (b0 * Xn1b) + d1b;
- /* Sample 2. 5 cycles */
- Xn4b = pIn[7 ];
- acc1b = b0 * Xn1b + d1b;
+ *pOut++ = acc1a;
+ *pOut++ = acc1b;
- Xn5a = pIn[8 ];
- d1b = b1 * Xn1b + d2b;
+ d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+ d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
- Xn5b = pIn[9 ];
- d2b = b2 * Xn1b;
+ d2a = (b2 * Xn1a) + (a2 * acc1a);
+ d2b = (b2 * Xn1b) + (a2 * acc1b);
- Xn6a = pIn[10];
- d1b += a1 * acc1b;
+/* 3 */
+ Xn1a = *pIn++; /* Channel a */
+ Xn1b = *pIn++; /* Channel b */
- Xn6b = pIn[11];
- d2b += a2 * acc1b;
+ acc1a = (b0 * Xn1a) + d1a;
+ acc1b = (b0 * Xn1b) + d1b;
- /* Sample 3. 5 cycles */
- Xn7a = pIn[12];
- acc2a = b0 * Xn2a + d1a;
+ *pOut++ = acc1a;
+ *pOut++ = acc1b;
- Xn7b = pIn[13];
- d1a = b1 * Xn2a + d2a;
+ d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+ d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
- Xn8a = pIn[14];
- d2a = b2 * Xn2a;
+ d2a = (b2 * Xn1a) + (a2 * acc1a);
+ d2b = (b2 * Xn1b) + (a2 * acc1b);
- Xn8b = pIn[15];
- d1a += a1 * acc2a;
+/* 4 */
+ Xn1a = *pIn++; /* Channel a */
+ Xn1b = *pIn++; /* Channel b */
- pIn += 16;
- d2a += a2 * acc2a;
+ acc1a = (b0 * Xn1a) + d1a;
+ acc1b = (b0 * Xn1b) + d1b;
- /* Sample 4. 5 cycles */
- acc2b = b0 * Xn2b + d1b;
- d1b = b1 * Xn2b + d2b;
- d2b = b2 * Xn2b;
- d1b += a1 * acc2b;
- d2b += a2 * acc2b;
+ *pOut++ = acc1a;
+ *pOut++ = acc1b;
- /* Sample 5. 5 cycles */
- acc3a = b0 * Xn3a + d1a;
- d1a = b1 * Xn3a + d2a;
- d2a = b2 * Xn3a;
- d1a += a1 * acc3a;
- d2a += a2 * acc3a;
+ d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+ d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
- /* Sample 6. 5 cycles */
- acc3b = b0 * Xn3b + d1b;
- d1b = b1 * Xn3b + d2b;
- d2b = b2 * Xn3b;
- d1b += a1 * acc3b;
- d2b += a2 * acc3b;
+ d2a = (b2 * Xn1a) + (a2 * acc1a);
+ d2b = (b2 * Xn1b) + (a2 * acc1b);
- /* Sample 7. 5 cycles */
- acc4a = b0 * Xn4a + d1a;
- d1a = b1 * Xn4a + d2a;
- d2a = b2 * Xn4a;
- d1a += a1 * acc4a;
- d2a += a2 * acc4a;
+/* 5 */
+ Xn1a = *pIn++; /* Channel a */
+ Xn1b = *pIn++; /* Channel b */
- /* Sample 8. 5 cycles */
- acc4b = b0 * Xn4b + d1b;
- d1b = b1 * Xn4b + d2b;
- d2b = b2 * Xn4b;
- d1b += a1 * acc4b;
- d2b += a2 * acc4b;
+ acc1a = (b0 * Xn1a) + d1a;
+ acc1b = (b0 * Xn1b) + d1b;
- /* Sample 9. 5 cycles */
- acc5a = b0 * Xn5a + d1a;
- d1a = b1 * Xn5a + d2a;
- d2a = b2 * Xn5a;
- d1a += a1 * acc5a;
- d2a += a2 * acc5a;
+ *pOut++ = acc1a;
+ *pOut++ = acc1b;
- /* Sample 10. 5 cycles */
- acc5b = b0 * Xn5b + d1b;
- d1b = b1 * Xn5b + d2b;
- d2b = b2 * Xn5b;
- d1b += a1 * acc5b;
- d2b += a2 * acc5b;
+ d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+ d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
- /* Sample 11. 5 cycles */
- acc6a = b0 * Xn6a + d1a;
- d1a = b1 * Xn6a + d2a;
- d2a = b2 * Xn6a;
- d1a += a1 * acc6a;
- d2a += a2 * acc6a;
+ d2a = (b2 * Xn1a) + (a2 * acc1a);
+ d2b = (b2 * Xn1b) + (a2 * acc1b);
- /* Sample 12. 5 cycles */
- acc6b = b0 * Xn6b + d1b;
- d1b = b1 * Xn6b + d2b;
- d2b = b2 * Xn6b;
- d1b += a1 * acc6b;
- d2b += a2 * acc6b;
+/* 6 */
+ Xn1a = *pIn++; /* Channel a */
+ Xn1b = *pIn++; /* Channel b */
- /* Sample 13. 5 cycles */
- acc7a = b0 * Xn7a + d1a;
- d1a = b1 * Xn7a + d2a;
+ acc1a = (b0 * Xn1a) + d1a;
+ acc1b = (b0 * Xn1b) + d1b;
- pOut[0 ] = acc1a ;
- d2a = b2 * Xn7a;
+ *pOut++ = acc1a;
+ *pOut++ = acc1b;
- pOut[1 ] = acc1b ;
- d1a += a1 * acc7a;
+ d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+ d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
- pOut[2 ] = acc2a ;
- d2a += a2 * acc7a;
+ d2a = (b2 * Xn1a) + (a2 * acc1a);
+ d2b = (b2 * Xn1b) + (a2 * acc1b);
- /* Sample 14. 5 cycles */
- pOut[3 ] = acc2b ;
- acc7b = b0 * Xn7b + d1b;
+/* 7 */
+ Xn1a = *pIn++; /* Channel a */
+ Xn1b = *pIn++; /* Channel b */
- pOut[4 ] = acc3a ;
- d1b = b1 * Xn7b + d2b;
+ acc1a = (b0 * Xn1a) + d1a;
+ acc1b = (b0 * Xn1b) + d1b;
- pOut[5 ] = acc3b ;
- d2b = b2 * Xn7b;
+ *pOut++ = acc1a;
+ *pOut++ = acc1b;
- pOut[6 ] = acc4a ;
- d1b += a1 * acc7b;
+ d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+ d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
- pOut[7 ] = acc4b ;
- d2b += a2 * acc7b;
+ d2a = (b2 * Xn1a) + (a2 * acc1a);
+ d2b = (b2 * Xn1b) + (a2 * acc1b);
- /* Sample 15. 5 cycles */
- pOut[8 ] = acc5a ;
- acc8a = b0 * Xn8a + d1a;
+/* 8 */
+ Xn1a = *pIn++; /* Channel a */
+ Xn1b = *pIn++; /* Channel b */
- pOut[9 ] = acc5b;
- d1a = b1 * Xn8a + d2a;
+ acc1a = (b0 * Xn1a) + d1a;
+ acc1b = (b0 * Xn1b) + d1b;
- pOut[10] = acc6a;
- d2a = b2 * Xn8a;
+ *pOut++ = acc1a;
+ *pOut++ = acc1b;
- pOut[11] = acc6b;
- d1a += a1 * acc8a;
+ d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+ d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
- pOut[12] = acc7a;
- d2a += a2 * acc8a;
+ d2a = (b2 * Xn1a) + (a2 * acc1a);
+ d2b = (b2 * Xn1b) + (a2 * acc1b);
- /* Sample 16. 5 cycles */
- pOut[13] = acc7b;
- acc8b = b0 * Xn8b + d1b;
-
- pOut[14] = acc8a;
- d1b = b1 * Xn8b + d2b;
-
- pOut[15] = acc8b;
- d2b = b2 * Xn8b;
-
- sample--;
- d1b += a1 * acc8b;
-
- pOut += 16;
- d2b += a2 * acc8b;
+ /* decrement loop counter */
+ sample--;
}
+ /* Loop unrolling: Compute remaining outputs */
sample = blockSize & 0x7U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (sample > 0U) {
- /* Read the input */
- Xn1a = *pIn++; //Channel a
- Xn1b = *pIn++; //Channel b
+ /* Read the input */
+ Xn1a = *pIn++; /* Channel a */
+ Xn1b = *pIn++; /* Channel b */
- /* y[n] = b0 * x[n] + d1 */
- acc1a = (b0 * Xn1a) + d1a;
- acc1b = (b0 * Xn1b) + d1b;
+ /* y[n] = b0 * x[n] + d1 */
+ acc1a = (b0 * Xn1a) + d1a;
+ acc1b = (b0 * Xn1b) + d1b;
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = acc1a;
- *pOut++ = acc1b;
+ /* Store the result in the accumulator in the destination buffer. */
+ *pOut++ = acc1a;
+ *pOut++ = acc1b;
- /* Every time after the output is computed state should be updated. */
- /* d1 = b1 * x[n] + a1 * y[n] + d2 */
- d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
- d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+ /* Every time after the output is computed state should be updated. */
+ /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+ d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+ d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
- /* d2 = b2 * x[n] + a2 * y[n] */
- d2a = (b2 * Xn1a) + (a2 * acc1a);
- d2b = (b2 * Xn1b) + (a2 * acc1b);
+ /* d2 = b2 * x[n] + a2 * y[n] */
+ d2a = (b2 * Xn1a) + (a2 * acc1a);
+ d2b = (b2 * Xn1b) + (a2 * acc1b);
- sample--;
+ /* decrement loop counter */
+ sample--;
}
/* Store the updated state variables back into the state array */
@@ -463,22 +265,22 @@
pState[2] = d1b;
pState[3] = d2b;
+ pState += 4U;
+
/* The current stage input is given as the output to the next stage */
pIn = pDst;
+
+ /* Reset the output working pointer */
+ pOut = pDst;
+
/* decrement the loop counter */
stage--;
- pState += 4U;
- /*Reset the output working pointer */
- pOut = pDst;
-
} while (stage > 0U);
-#endif
-
}
LOW_OPTIMIZATION_EXIT
/**
- * @} end of BiquadCascadeDF2T group
- */
+ @} end of BiquadCascadeDF2T group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
index 4940ec9..2e1f311 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_biquad_cascade_stereo_df2T_init_f32.c
* Description: Initialization function for floating-point transposed direct form II Biquad cascade filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,47 +29,44 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup BiquadCascadeDF2T
- * @{
+ @addtogroup BiquadCascadeDF2T
+ @{
*/
/**
- * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
- * @param[in,out] *S points to an instance of the filter data structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @return none
- *
- * <b>Coefficient and State Ordering:</b>
- * \par
- * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
- * <pre>
- * {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
- * </pre>
- *
- * \par
- * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
- * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
- * and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
- *
- * \par
- * The <code>pState</code> is a pointer to state array.
- * Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code> for each channel.
- * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
- * The state array has a total length of <code>2*numStages</code> values.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
+ @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+ @param[in,out] S points to an instance of the filter data structure.
+ @param[in] numStages number of 2nd order stages in the filter.
+ @param[in] pCoeffs points to the filter coefficients.
+ @param[in] pState points to the state buffer.
+ @return none
+
+ @par Coefficient and State Ordering
+ The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+ <pre>
+ {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+ </pre>
+ @par
+ where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+ <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+ and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+ @par
+ The <code>pState</code> is a pointer to state array.
+ Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code> for each channel.
+ The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
+ The state array has a total length of <code>2*numStages</code> values.
+ The state variables are updated after each block of data is processed; the coefficients are untouched.
*/
void arm_biquad_cascade_stereo_df2T_init_f32(
- arm_biquad_cascade_stereo_df2T_instance_f32 * S,
- uint8_t numStages,
- float32_t * pCoeffs,
- float32_t * pState)
+ arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+ uint8_t numStages,
+ const float32_t * pCoeffs,
+ float32_t * pState)
{
/* Assign filter stages */
S->numStages = numStages;
@@ -85,5 +82,5 @@
}
/**
- * @} end of BiquadCascadeDF2T group
+ @} end of BiquadCascadeDF2T group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c
index 5c82326..e055c20 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c
@@ -3,13 +3,13 @@
* Title: arm_conv_f32.c
* Description: Convolution of floating-point sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,108 +29,97 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @defgroup Conv Convolution
- *
- * Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector.
- * Convolution is similar to correlation and is frequently used in filtering and data analysis.
- * The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types.
- * The library also provides fast versions of the Q15 and Q31 functions on Cortex-M4 and Cortex-M3.
- *
- * \par Algorithm
- * Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and <code>srcBLen</code> samples respectively.
- * Then the convolution
- *
- * <pre>
- * c[n] = a[n] * b[n]
- * </pre>
- *
- * \par
- * is defined as
- * \image html ConvolutionEquation.gif
- * \par
- * Note that <code>c[n]</code> is of length <code>srcALen + srcBLen - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., srcALen + srcBLen - 2</code>.
- * <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and
- * <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>.
- * The output result is written to <code>pDst</code> and the calling function must allocate <code>srcALen+srcBLen-1</code> words for the result.
- *
- * \par
- * Conceptually, when two signals <code>a[n]</code> and <code>b[n]</code> are convolved,
- * the signal <code>b[n]</code> slides over <code>a[n]</code>.
- * For each offset \c n, the overlapping portions of a[n] and b[n] are multiplied and summed together.
- *
- * \par
- * Note that convolution is a commutative operation:
- *
- * <pre>
- * a[n] * b[n] = b[n] * a[n].
- * </pre>
- *
- * \par
- * This means that switching the A and B arguments to the convolution functions has no effect.
- *
- * <b>Fixed-Point Behavior</b>
- *
- * \par
- * Convolution requires summing up a large number of intermediate products.
- * As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
- * Refer to the function specific documentation below for further details of the particular algorithm used.
- *
- *
- * <b>Fast Versions</b>
- *
- * \par
- * Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.
- *
- *
- * <b>Opt Versions</b>
- *
- * \par
- * Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions
+ @defgroup Conv Convolution
+
+ Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector.
+ Convolution is similar to correlation and is frequently used in filtering and data analysis.
+ The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types.
+ The library also provides fast versions of the Q15 and Q31 functions.
+
+ @par Algorithm
+ Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and
+ <code>srcBLen</code> samples respectively. Then the convolution
+ <pre>
+ c[n] = a[n] * b[n]
+ </pre>
+ @par
+ is defined as
+ \image html ConvolutionEquation.gif
+ @par
+ Note that <code>c[n]</code> is of length <code>srcALen + srcBLen - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., srcALen + srcBLen - 2</code>.
+ <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and
+ <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>.
+ The output result is written to <code>pDst</code> and the calling function must allocate <code>srcALen+srcBLen-1</code> words for the result.
+ @par
+ Conceptually, when two signals <code>a[n]</code> and <code>b[n]</code> are convolved,
+ the signal <code>b[n]</code> slides over <code>a[n]</code>.
+ For each offset \c n, the overlapping portions of a[n] and b[n] are multiplied and summed together.
+ @par
+ Note that convolution is a commutative operation:
+ <pre>
+ a[n] * b[n] = b[n] * a[n].
+ </pre>
+ @par
+ This means that switching the A and B arguments to the convolution functions has no effect.
+
+ @par Fixed-Point Behavior
+ Convolution requires summing up a large number of intermediate products.
+ As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
+ Refer to the function specific documentation below for further details of the particular algorithm used.
+
+ @par Fast Versions
+ Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires
+ the input signals should be scaled down to avoid intermediate overflows.
+
+ @par Opt Versions
+ Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation.
+ These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions
*/
/**
- * @addtogroup Conv
- * @{
+ @addtogroup Conv
+ @{
*/
/**
- * @brief Convolution of floating-point sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
- * @return none.
+ @brief Convolution of floating-point sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
+ @return none
*/
void arm_conv_f32(
- float32_t * pSrcA,
- uint32_t srcALen,
- float32_t * pSrcB,
- uint32_t srcBLen,
- float32_t * pDst)
+ const float32_t * pSrcA,
+ uint32_t srcALen,
+ const float32_t * pSrcB,
+ uint32_t srcBLen,
+ float32_t * pDst)
{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
-#if defined (ARM_MATH_DSP)
+ const float32_t *pIn1; /* InputA pointer */
+ const float32_t *pIn2; /* InputB pointer */
+ float32_t *pOut = pDst; /* Output pointer */
+ const float32_t *px; /* Intermediate inputA pointer */
+ const float32_t *py; /* Intermediate inputB pointer */
+ const float32_t *pSrc1, *pSrc2; /* Intermediate pointers */
+ float32_t sum; /* Accumulators */
+ uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ uint32_t j, k, count, blkCnt; /* Loop counters */
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- float32_t *pIn1; /* inputA pointer */
- float32_t *pIn2; /* inputB pointer */
- float32_t *pOut = pDst; /* output pointer */
- float32_t *px; /* Intermediate inputA pointer */
- float32_t *py; /* Intermediate inputB pointer */
- float32_t *pSrc1, *pSrc2; /* Intermediate pointers */
- float32_t sum, acc0, acc1, acc2, acc3; /* Accumulator */
- float32_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3; /* loop counters */
+#if defined (ARM_MATH_LOOPUNROLL)
+ float32_t acc0, acc1, acc2, acc3; /* Accumulators */
+ float32_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */
+#endif
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -173,7 +162,7 @@
blockSize3 = blockSize1;
/* --------------------------
- * initializations of stage1
+ * Initializations of stage1
* -------------------------*/
/* sum = x[0] * y[0]
@@ -203,11 +192,11 @@
/* Accumulator is made zero for every iteration */
sum = 0.0f;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* x[0] * y[srcBLen - 1] */
@@ -222,20 +211,26 @@
/* x[3] * y[srcBLen - 4] */
sum += *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize k with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* Perform the multiply-accumulate */
sum += *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -246,10 +241,10 @@
py = pIn2 + count;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -258,7 +253,7 @@
* ------------------------*/
/* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
- * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+ * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
* ....
* sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
*/
@@ -282,7 +277,9 @@
* srcBLen should be greater than or equal to 4 */
if (srcBLen >= 4U)
{
- /* Loop unroll over blockSize2, by 4 */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize2 >> 2U;
while (blkCnt > 0U)
@@ -307,26 +304,21 @@
{
/* Read y[srcBLen - 1] sample */
c0 = *py--;
-
/* Read x[3] sample */
x3 = *(px);
/* Perform the multiply-accumulate */
/* acc0 += x[0] * y[srcBLen - 1] */
acc0 += x0 * c0;
-
/* acc1 += x[1] * y[srcBLen - 1] */
acc1 += x1 * c0;
-
/* acc2 += x[2] * y[srcBLen - 1] */
acc2 += x2 * c0;
-
/* acc3 += x[3] * y[srcBLen - 1] */
acc3 += x3 * c0;
/* Read y[srcBLen - 2] sample */
c0 = *py--;
-
/* Read x[4] sample */
x0 = *(px + 1U);
@@ -342,11 +334,10 @@
/* Read y[srcBLen - 3] sample */
c0 = *py--;
-
/* Read x[5] sample */
x1 = *(px + 2U);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[2] * y[srcBLen - 3] */
acc0 += x2 * c0;
/* acc1 += x[3] * y[srcBLen - 2] */
@@ -358,12 +349,11 @@
/* Read y[srcBLen - 4] sample */
c0 = *py--;
-
/* Read x[6] sample */
x2 = *(px + 3U);
px += 4U;
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[3] * y[srcBLen - 4] */
acc0 += x3 * c0;
/* acc1 += x[4] * y[srcBLen - 4] */
@@ -373,7 +363,6 @@
/* acc3 += x[6] * y[srcBLen - 4] */
acc3 += x2 * c0;
-
} while (--k);
/* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
@@ -384,11 +373,10 @@
{
/* Read y[srcBLen - 5] sample */
c0 = *py--;
-
/* Read x[7] sample */
x3 = *px++;
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[4] * y[srcBLen - 5] */
acc0 += x0 * c0;
/* acc1 += x[5] * y[srcBLen - 5] */
@@ -420,42 +408,52 @@
px = pIn1 + count;
py = pSrc2;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
-
- /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize2 % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0.0f;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = srcBLen >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum += *px++ * *py--;
sum += *px++ * *py--;
sum += *px++ * *py--;
sum += *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = srcBLen % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* Perform the multiply-accumulate */
@@ -533,7 +531,7 @@
The blockSize3 variable holds the number of MAC operations performed */
/* Working pointer of inputA */
- pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+ pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
px = pSrc1;
/* Working pointer of inputB */
@@ -549,13 +547,14 @@
/* Accumulator is made zero for every iteration */
sum = 0.0f;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = blockSize3 >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
+ /* Perform the multiply-accumulate */
/* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
sum += *px++ * *py--;
@@ -568,21 +567,27 @@
/* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
sum += *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = blockSize3 % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = blockSize3;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* sum += x[srcALen-1] * y[srcBLen-1] */
sum += *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -598,16 +603,15 @@
}
#else
+/* alternate version for CM0_FAMILY */
- /* Run the below code for Cortex-M0 */
-
- float32_t *pIn1 = pSrcA; /* inputA pointer */
- float32_t *pIn2 = pSrcB; /* inputB pointer */
- float32_t sum; /* Accumulator */
- uint32_t i, j; /* loop counters */
+ const float32_t *pIn1 = pSrcA; /* InputA pointer */
+ const float32_t *pIn2 = pSrcB; /* InputB pointer */
+ float32_t sum; /* Accumulator */
+ uint32_t i, j; /* Loop counters */
/* Loop to calculate convolution for output length number of times */
- for (i = 0U; i < ((srcALen + srcBLen) - 1U); i++)
+ for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
{
/* Initialize sum with zero to carry out MAC operations */
sum = 0.0f;
@@ -616,20 +620,21 @@
for (j = 0U; j <= i; j++)
{
/* Check the array limitations */
- if ((((i - j) < srcBLen) && (j < srcALen)))
+ if (((i - j) < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
- sum += pIn1[j] * pIn2[i - j];
+ sum += ( pIn1[j] * pIn2[i - j]);
}
}
+
/* Store the output in the destination buffer */
pDst[i] = sum;
}
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
}
/**
- * @} end of Conv group
+ @} end of Conv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
index c6e05b8..e55f301 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
@@ -3,13 +3,13 @@
* Title: arm_conv_fast_opt_q15.c
* Description: Fast Q15 Convolution
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,71 +29,65 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Conv
- * @{
+ @addtogroup Conv
+ @{
*/
/**
- * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
- * @param[in] *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- * @return none.
- *
- * \par Restrictions
- * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- * In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
- *
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This fast version uses a 32-bit accumulator with 2.30 format.
- * The accumulator maintains full precision of the intermediate multiplication results
- * but provides only a single guard bit. There is no saturation on intermediate additions.
- * Thus, if the accumulator overflows it wraps around and distorts the result.
- * The input signals should be scaled down to avoid intermediate overflows.
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
- *
- * \par
- * See <code>arm_conv_q15()</code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
+ @brief Convolution of Q15 sequences (fast version).
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1
+ @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2
+ @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen
+ @return none
+
+ @par Scaling and Overflow Behavior
+ This fast version uses a 32-bit accumulator with 2.30 format.
+ The accumulator maintains full precision of the intermediate multiplication results
+ but provides only a single guard bit. There is no saturation on intermediate additions.
+ Thus, if the accumulator overflows it wraps around and distorts the result.
+ The input signals should be scaled down to avoid intermediate overflows.
+ Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+ as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+ The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+ @remark
+ Refer to \ref arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
*/
void arm_conv_fast_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2)
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ q15_t * pScratch1,
+ q15_t * pScratch2)
{
- q31_t acc0, acc1, acc2, acc3; /* Accumulators */
- q31_t x1, x2, x3; /* Temporary variables to hold state and coefficient values */
- q31_t y1, y2; /* State variables */
- q15_t *pOut = pDst; /* output pointer */
- q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */
- q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- uint32_t j, k, blkCnt; /* loop counter */
- uint32_t tapCnt; /* loop count */
-#ifdef UNALIGNED_SUPPORT_DISABLE
+ q31_t acc0; /* Accumulators */
+ const q15_t *pIn1; /* InputA pointer */
+ const q15_t *pIn2; /* InputB pointer */
+ q15_t *pOut = pDst; /* Output pointer */
+ q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */
+ q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */
+ const q15_t *px; /* Intermediate inputA pointer */
+ q15_t *py; /* Intermediate inputB pointer */
+ uint32_t j, k, blkCnt; /* Loop counter */
+ uint32_t tapCnt; /* Loop count */
- q15_t a, b;
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t acc1, acc2, acc3; /* Accumulators */
+ q31_t x1, x2, x3; /* Temporary variables to hold state and coefficient values */
+ q31_t y1, y2; /* State variables */
+#endif
-#endif /* #ifdef UNALIGNED_SUPPORT_DISABLE */
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -126,11 +120,10 @@
/* points to smaller length sequence */
px = pIn2;
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = srcBLen >> 2U;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
+ /* Loop unrolling: Compute 4 outputs at a time */
+ k = srcBLen >> 2U;
/* Copy smaller length input sequence in reverse order into second scratch buffer */
while (k > 0U)
@@ -141,20 +134,26 @@
*pScr2-- = *px++;
*pScr2-- = *px++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = srcBLen % 0x4U;
+#else
+
+ /* Initialize k with number of samples */
+ k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* copy second buffer in reversal manner for remaining samples */
*pScr2-- = *px++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -170,50 +169,12 @@
/* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
/* Copy (srcALen) samples in scratch buffer */
arm_copy_q15(pIn1, pScr1, srcALen);
/* Update pointers */
pScr1 += srcALen;
-#else
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = srcALen >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr1++ = *pIn1++;
- *pScr1++ = *pIn1++;
- *pScr1++ = *pIn1++;
- *pScr1++ = *pIn1++;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = srcALen % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr1++ = *pIn1++;
-
- /* Decrement the loop counter */
- k--;
- }
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
/* Fill (srcBLen - 1U) zeros at end of scratch buffer */
arm_fill_q15(0, pScr1, (srcBLen - 1U));
@@ -221,40 +182,6 @@
/* Update pointer */
pScr1 += (srcBLen - 1U);
-#else
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = (srcBLen - 1U) >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr1++ = 0;
- *pScr1++ = 0;
- *pScr1++ = 0;
- *pScr1++ = 0;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = (srcBLen - 1U) % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr1++ = 0;
-
- /* Decrement the loop counter */
- k--;
- }
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
/* Temporary pointer for scratch2 */
py = pScratch2;
@@ -262,10 +189,9 @@
/* Initialization of pIn2 pointer */
pIn2 = py;
- /* First part of the processing with loop unrolling process 4 data points at a time.
- ** a second loop below process for the remaining 1 to 3 samples. */
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Actual convolution process starts here */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = (srcALen + srcBLen - 1U) >> 2;
while (blkCnt > 0)
@@ -280,21 +206,19 @@
acc3 = 0;
/* Read two samples from scratch1 buffer */
- x1 = *__SIMD32(pScr1)++;
+ x1 = read_q15x2_ia (&pScr1);
/* Read next two samples from scratch1 buffer */
- x2 = *__SIMD32(pScr1)++;
+ x2 = read_q15x2_ia (&pScr1);
tapCnt = (srcBLen) >> 2U;
while (tapCnt > 0U)
{
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
/* Read four samples from smaller buffer */
- y1 = _SIMD32_OFFSET(pIn2);
- y2 = _SIMD32_OFFSET(pIn2 + 2U);
+ y1 = read_q15x2_ia ((q15_t **) &pIn2);
+ y2 = read_q15x2_ia ((q15_t **) &pIn2);
/* multiply and accumlate */
acc0 = __SMLAD(x1, y1, acc0);
@@ -311,7 +235,7 @@
acc1 = __SMLADX(x3, y1, acc1);
/* Read next two samples from scratch1 buffer */
- x1 = _SIMD32_OFFSET(pScr1);
+ x1 = read_q15x2_ia (&pScr1);
/* multiply and accumlate */
acc0 = __SMLAD(x2, y2, acc0);
@@ -327,7 +251,7 @@
acc3 = __SMLADX(x3, y1, acc3);
acc1 = __SMLADX(x3, y2, acc1);
- x2 = _SIMD32_OFFSET(pScr1 + 2U);
+ x2 = read_q15x2_ia (&pScr1);
#ifndef ARM_MATH_BIG_ENDIAN
x3 = __PKHBT(x2, x1, 0);
@@ -337,86 +261,7 @@
acc3 = __SMLADX(x3, y2, acc3);
-#else
-
- /* Read four samples from smaller buffer */
- a = *pIn2;
- b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- y1 = __PKHBT(a, b, 16);
-#else
- y1 = __PKHBT(b, a, 16);
-#endif
-
- a = *(pIn2 + 2);
- b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
- y2 = __PKHBT(a, b, 16);
-#else
- y2 = __PKHBT(b, a, 16);
-#endif
-
- acc0 = __SMLAD(x1, y1, acc0);
-
- acc2 = __SMLAD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x3 = __PKHBT(x2, x1, 0);
-#else
- x3 = __PKHBT(x1, x2, 0);
-#endif
-
- acc1 = __SMLADX(x3, y1, acc1);
-
- a = *pScr1;
- b = *(pScr1 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x1 = __PKHBT(a, b, 16);
-#else
- x1 = __PKHBT(b, a, 16);
-#endif
-
- acc0 = __SMLAD(x2, y2, acc0);
-
- acc2 = __SMLAD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x3 = __PKHBT(x1, x2, 0);
-#else
- x3 = __PKHBT(x2, x1, 0);
-#endif
-
- acc3 = __SMLADX(x3, y1, acc3);
-
- acc1 = __SMLADX(x3, y2, acc1);
-
- a = *(pScr1 + 2);
- b = *(pScr1 + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x2 = __PKHBT(a, b, 16);
-#else
- x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x3 = __PKHBT(x2, x1, 0);
-#else
- x3 = __PKHBT(x1, x2, 0);
-#endif
-
- acc3 = __SMLADX(x3, y2, acc3);
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
- /* update scratch pointers */
- pIn2 += 4U;
- pScr1 += 4U;
-
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -428,7 +273,6 @@
while (tapCnt > 0U)
{
-
/* accumlate the results */
acc0 += (*pScr1++ * *pIn2);
acc1 += (*pScr1++ * *pIn2);
@@ -437,46 +281,37 @@
pScr1 -= 3U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
blkCnt--;
-
/* Store the results in the accumulators in the destination buffer. */
-
#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
#else
-
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Initialization of inputB pointer */
pIn2 = py;
pScratch1 += 4U;
-
}
-
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
/* Calculate convolution for remaining samples of Bigger length sequence */
while (blkCnt > 0)
{
@@ -491,10 +326,11 @@
while (tapCnt > 0U)
{
+ /* Read next two samples from scratch1 buffer */
acc0 += (*pScr1++ * *pIn2++);
acc0 += (*pScr1++ * *pIn2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -507,25 +343,24 @@
/* accumlate the results */
acc0 += (*pScr1++ * *pIn2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
blkCnt--;
/* The result is in 2.30 format. Convert to 1.15 with saturation.
- ** Then store the output in the destination buffer. */
+ Then store the output in the destination buffer. */
*pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
/* Initialization of inputB pointer */
pIn2 = py;
pScratch1 += 1U;
-
}
}
/**
- * @} end of Conv group
+ @} end of Conv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c
index 9625ae5..f23a252 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c
@@ -3,13 +3,13 @@
* Title: arm_conv_fast_q15.c
* Description: Fast Q15 Convolution
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,56 +29,54 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Conv
- * @{
+ @addtogroup Conv
+ @{
*/
/**
- * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This fast version uses a 32-bit accumulator with 2.30 format.
- * The accumulator maintains full precision of the intermediate multiplication results
- * but provides only a single guard bit. There is no saturation on intermediate additions.
- * Thus, if the accumulator overflows it wraps around and distorts the result.
- * The input signals should be scaled down to avoid intermediate overflows.
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
- *
- * \par
- * See <code>arm_conv_q15()</code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
+ @brief Convolution of Q15 sequences (fast version).
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1
+ @return none
+
+ @par Scaling and Overflow Behavior
+ This fast version uses a 32-bit accumulator with 2.30 format.
+ The accumulator maintains full precision of the intermediate multiplication results
+ but provides only a single guard bit. There is no saturation on intermediate additions.
+ Thus, if the accumulator overflows it wraps around and distorts the result.
+ The input signals should be scaled down to avoid intermediate overflows.
+ Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+ as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+ The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+ @remark
+ Refer to \ref arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
*/
void arm_conv_fast_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst)
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst)
{
-#ifndef UNALIGNED_SUPPORT_DISABLE
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *pOut = pDst; /* output pointer */
- q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- q15_t *pSrc1, *pSrc2; /* Intermediate pointers */
- q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt; /* loop counter */
+ const q15_t *pIn1; /* InputA pointer */
+ const q15_t *pIn2; /* InputB pointer */
+ q15_t *pOut = pDst; /* Output pointer */
+ q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */
+ const q15_t *px; /* Intermediate inputA pointer */
+ const q15_t *py; /* Intermediate inputB pointer */
+ const q15_t *pSrc1, *pSrc2; /* Intermediate pointers */
+ q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */
+ uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ uint32_t j, k, count, blkCnt; /* Loop counters */
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -175,10 +173,10 @@
py = pIn2 + count;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -202,11 +200,11 @@
{
/* Perform the multiply-accumulates */
/* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
- sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
/* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
- sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -234,10 +232,10 @@
py = pIn2 + (count - 1U);
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -261,7 +259,6 @@
/* count is the index by which the pointer pIn1 to be incremented */
count = 0U;
-
/* --------------------
* Stage2 process
* -------------------*/
@@ -284,13 +281,11 @@
acc2 = 0;
acc3 = 0;
-
/* read x[0], x[1] samples */
- x0 = *__SIMD32(px);
+ x0 = read_q15x2 ((q15_t *) px);
/* read x[1], x[2] samples */
- x1 = _SIMD32_OFFSET(px+1);
- px+= 2U;
-
+ x1 = read_q15x2 ((q15_t *) px + 1);
+ px += 2U;
/* Apply loop unrolling and compute 4 MACs simultaneously. */
k = srcBLen >> 2U;
@@ -301,7 +296,7 @@
{
/* Read the last two inputB samples using SIMD:
* y[srcBLen - 1] and y[srcBLen - 2] */
- c0 = *__SIMD32(py)--;
+ c0 = read_q15x2_da ((q15_t **) &py);
/* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
acc0 = __SMLADX(x0, c0, acc0);
@@ -310,10 +305,10 @@
acc1 = __SMLADX(x1, c0, acc1);
/* Read x[2], x[3] */
- x2 = *__SIMD32(px);
+ x2 = read_q15x2 ((q15_t *) px);
/* Read x[3], x[4] */
- x3 = _SIMD32_OFFSET(px+1);
+ x3 = read_q15x2 ((q15_t *) px + 1);
/* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
acc2 = __SMLADX(x2, c0, acc2);
@@ -322,7 +317,7 @@
acc3 = __SMLADX(x3, c0, acc3);
/* Read y[srcBLen - 3] and y[srcBLen - 4] */
- c0 = *__SIMD32(py)--;
+ c0 = read_q15x2_da ((q15_t **) &py);
/* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
acc0 = __SMLADX(x2, c0, acc0);
@@ -331,10 +326,10 @@
acc1 = __SMLADX(x3, c0, acc1);
/* Read x[4], x[5] */
- x0 = _SIMD32_OFFSET(px+2);
+ x0 = read_q15x2 ((q15_t *) px + 2);
/* Read x[5], x[6] */
- x1 = _SIMD32_OFFSET(px+3);
+ x1 = read_q15x2 ((q15_t *) px + 3);
px += 4U;
/* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
@@ -358,17 +353,13 @@
c0 = *(py+1);
#ifdef ARM_MATH_BIG_ENDIAN
-
c0 = c0 << 16U;
-
#else
-
c0 = c0 & 0x0000FFFF;
-
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
/* Read x[7] */
- x3 = *__SIMD32(px);
+ x3 = read_q15x2 ((q15_t *) px);
px++;
/* Perform the multiply-accumulates */
@@ -381,13 +372,13 @@
if (k == 2U)
{
/* Read y[srcBLen - 5], y[srcBLen - 6] */
- c0 = _SIMD32_OFFSET(py);
+ c0 = read_q15x2 ((q15_t *) py);
/* Read x[7], x[8] */
- x3 = *__SIMD32(px);
+ x3 = read_q15x2 ((q15_t *) px);
/* Read x[9] */
- x2 = _SIMD32_OFFSET(px+1);
+ x2 = read_q15x2 ((q15_t *) px + 1);
px += 2U;
/* Perform the multiply-accumulates */
@@ -400,13 +391,13 @@
if (k == 3U)
{
/* Read y[srcBLen - 5], y[srcBLen - 6] */
- c0 = _SIMD32_OFFSET(py);
+ c0 = read_q15x2 ((q15_t *) py);
/* Read x[7], x[8] */
- x3 = *__SIMD32(px);
+ x3 = read_q15x2 ((q15_t *) px);
/* Read x[9] */
- x2 = _SIMD32_OFFSET(px+1);
+ x2 = read_q15x2 ((q15_t *) px + 1);
/* Perform the multiply-accumulates */
acc0 = __SMLADX(x0, c0, acc0);
@@ -417,15 +408,13 @@
/* Read y[srcBLen - 7] */
c0 = *(py-1);
#ifdef ARM_MATH_BIG_ENDIAN
-
c0 = c0 << 16U;
#else
-
c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
/* Read x[10] */
- x3 = _SIMD32_OFFSET(px+2);
+ x3 = read_q15x2 ((q15_t *) px + 2);
px += 3U;
/* Perform the multiply-accumulates */
@@ -435,18 +424,14 @@
acc3 = __SMLADX(x3, c0, acc3);
}
- /* Store the results in the accumulators in the destination buffer. */
+ /* Store the result in the accumulator in the destination buffer. */
#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pOut)++ = __PKHBT((acc0 >> 15), (acc1 >> 15), 16);
- *__SIMD32(pOut)++ = __PKHBT((acc2 >> 15), (acc3 >> 15), 16);
-
+ write_q15x2_ia (&pOut, __PKHBT((acc0 >> 15), (acc1 >> 15), 16));
+ write_q15x2_ia (&pOut, __PKHBT((acc2 >> 15), (acc3 >> 15), 16));
#else
-
- *__SIMD32(pOut)++ = __PKHBT((acc1 >> 15), (acc0 >> 15), 16);
- *__SIMD32(pOut)++ = __PKHBT((acc3 >> 15), (acc2 >> 15), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ write_q15x2_ia (&pOut, __PKHBT((acc1 >> 15), (acc0 >> 15), 16));
+ write_q15x2_ia (&pOut, __PKHBT((acc3 >> 15), (acc2 >> 15), 16));
+#endif /*#ifndef ARM_MATH_BIG_ENDIAN*/
/* Increment the pointer pIn1 index, count by 4 */
count += 4U;
@@ -455,7 +440,7 @@
px = pIn1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -476,12 +461,12 @@
while (k > 0U)
{
/* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
+ sum += ((q31_t) *px++ * *py--);
+ sum += ((q31_t) *px++ * *py--);
+ sum += ((q31_t) *px++ * *py--);
+ sum += ((q31_t) *px++ * *py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -492,9 +477,9 @@
while (k > 0U)
{
/* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
+ sum += ((q31_t) *px++ * *py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -508,7 +493,7 @@
px = pIn1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -529,28 +514,27 @@
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += ((q31_t) * px++ * *py--);
+ sum += ((q31_t) *px++ * *py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
/* Store the result in the accumulator in the destination buffer. */
*pOut++ = (q15_t) (sum >> 15);
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pIn1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
-
/* --------------------------
* Initializations of stage3
* -------------------------*/
@@ -599,12 +583,12 @@
{
/* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
* with y[srcBLen - 1], y[srcBLen - 2] respectively */
- sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
/* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
* with y[srcBLen - 3], y[srcBLen - 4] respectively */
- sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -621,7 +605,7 @@
/* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
sum = __SMLAD(*px++, *py--, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -632,7 +616,7 @@
px = ++pSrc1;
py = pIn2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize3--;
j--;
@@ -657,7 +641,7 @@
/* sum += x[srcALen-1] * y[srcBLen-1] */
sum = __SMLAD(*px++, *py--, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -672,727 +656,8 @@
blockSize3--;
}
-#else
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *pOut = pDst; /* output pointer */
- q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- q15_t *pSrc1, *pSrc2; /* Intermediate pointers */
- q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt; /* loop counter */
- q15_t a, b;
-
- /* The algorithm implementation is based on the lengths of the inputs. */
- /* srcB is always made to slide across srcA. */
- /* So srcBLen is always considered as shorter or equal to srcALen */
- if (srcALen >= srcBLen)
- {
- /* Initialization of inputA pointer */
- pIn1 = pSrcA;
-
- /* Initialization of inputB pointer */
- pIn2 = pSrcB;
- }
- else
- {
- /* Initialization of inputA pointer */
- pIn1 = pSrcB;
-
- /* Initialization of inputB pointer */
- pIn2 = pSrcA;
-
- /* srcBLen is always considered as shorter or equal to srcALen */
- j = srcBLen;
- srcBLen = srcALen;
- srcALen = j;
- }
-
- /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
- /* The function is internally
- * divided into three stages according to the number of multiplications that has to be
- * taken place between inputA samples and inputB samples. In the first stage of the
- * algorithm, the multiplications increase by one for every iteration.
- * In the second stage of the algorithm, srcBLen number of multiplications are done.
- * In the third stage of the algorithm, the multiplications decrease by one
- * for every iteration. */
-
- /* The algorithm is implemented in three stages.
- The loop counters of each stage is initiated here. */
- blockSize1 = srcBLen - 1U;
- blockSize2 = srcALen - (srcBLen - 1U);
- blockSize3 = blockSize1;
-
- /* --------------------------
- * Initializations of stage1
- * -------------------------*/
-
- /* sum = x[0] * y[0]
- * sum = x[0] * y[1] + x[1] * y[0]
- * ....
- * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
- */
-
- /* In this stage the MAC operations are increased by 1 for every iteration.
- The count variable holds the number of MAC operations performed */
- count = 1U;
-
- /* Working pointer of inputA */
- px = pIn1;
-
- /* Working pointer of inputB */
- py = pIn2;
-
-
- /* ------------------------
- * Stage1 process
- * ----------------------*/
-
- /* For loop unrolling by 4, this stage is divided into two. */
- /* First part of this stage computes the MAC operations less than 4 */
- /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
- /* The first part of the stage starts here */
- while ((count < 4U) && (blockSize1 > 0U))
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* Loop over number of MAC operations between
- * inputA samples and inputB samples */
- k = count;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q15_t) (sum >> 15);
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- py = pIn2 + count;
- px = pIn1;
-
- /* Increment the MAC count */
- count++;
-
- /* Decrement the loop counter */
- blockSize1--;
- }
-
- /* The second part of the stage starts here */
- /* The internal loop, over count, is unrolled by 4 */
- /* To, read the last two inputB samples using SIMD:
- * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
- py = py - 1;
-
- while (blockSize1 > 0U)
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = count >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
- py++;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
- k = count % 0x4U;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q15_t) (sum >> 15);
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- py = pIn2 + (count - 1U);
- px = pIn1;
-
- /* Increment the MAC count */
- count++;
-
- /* Decrement the loop counter */
- blockSize1--;
- }
-
- /* --------------------------
- * Initializations of stage2
- * ------------------------*/
-
- /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
- * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
- * ....
- * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
- */
-
- /* Working pointer of inputA */
- px = pIn1;
-
- /* Working pointer of inputB */
- pSrc2 = pIn2 + (srcBLen - 1U);
- py = pSrc2;
-
- /* count is the index by which the pointer pIn1 to be incremented */
- count = 0U;
-
-
- /* --------------------
- * Stage2 process
- * -------------------*/
-
- /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
- * So, to loop unroll over blockSize2,
- * srcBLen should be greater than or equal to 4 */
- if (srcBLen >= 4U)
- {
- /* Loop unroll over blockSize2, by 4 */
- blkCnt = blockSize2 >> 2U;
-
- while (blkCnt > 0U)
- {
- py = py - 1U;
-
- /* Set all accumulators to zero */
- acc0 = 0;
- acc1 = 0;
- acc2 = 0;
- acc3 = 0;
-
- /* read x[0], x[1] samples */
- a = *px++;
- b = *px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x0 = __PKHBT(a, b, 16);
- a = *px;
- x1 = __PKHBT(b, a, 16);
-
-#else
-
- x0 = __PKHBT(b, a, 16);
- a = *px;
- x1 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = srcBLen >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
- do
- {
- /* Read the last two inputB samples using SIMD:
- * y[srcBLen - 1] and y[srcBLen - 2] */
- a = *py;
- b = *(py+1);
- py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- c0 = __PKHBT(a, b, 16);
-
-#else
-
- c0 = __PKHBT(b, a, 16);;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
- acc0 = __SMLADX(x0, c0, acc0);
-
- /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
- acc1 = __SMLADX(x1, c0, acc1);
-
- a = *px;
- b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x2 = __PKHBT(a, b, 16);
- a = *(px + 2);
- x3 = __PKHBT(b, a, 16);
-
-#else
-
- x2 = __PKHBT(b, a, 16);
- a = *(px + 2);
- x3 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
- acc2 = __SMLADX(x2, c0, acc2);
-
- /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
- acc3 = __SMLADX(x3, c0, acc3);
-
- /* Read y[srcBLen - 3] and y[srcBLen - 4] */
- a = *py;
- b = *(py+1);
- py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- c0 = __PKHBT(a, b, 16);
-
-#else
-
- c0 = __PKHBT(b, a, 16);;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
- acc0 = __SMLADX(x2, c0, acc0);
-
- /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
- acc1 = __SMLADX(x3, c0, acc1);
-
- /* Read x[4], x[5], x[6] */
- a = *(px + 2);
- b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x0 = __PKHBT(a, b, 16);
- a = *(px + 4);
- x1 = __PKHBT(b, a, 16);
-
-#else
-
- x0 = __PKHBT(b, a, 16);
- a = *(px + 4);
- x1 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- px += 4U;
-
- /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
- acc2 = __SMLADX(x0, c0, acc2);
-
- /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
- acc3 = __SMLADX(x1, c0, acc3);
-
- } while (--k);
-
- /* For the next MAC operations, SIMD is not used
- * So, the 16 bit pointer if inputB, py is updated */
-
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
- k = srcBLen % 0x4U;
-
- if (k == 1U)
- {
- /* Read y[srcBLen - 5] */
- c0 = *(py+1);
-
-#ifdef ARM_MATH_BIG_ENDIAN
-
- c0 = c0 << 16U;
-
-#else
-
- c0 = c0 & 0x0000FFFF;
-
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
-
- /* Read x[7] */
- a = *px;
- b = *(px+1);
- px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x3 = __PKHBT(a, b, 16);
-
-#else
-
- x3 = __PKHBT(b, a, 16);;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-
- /* Perform the multiply-accumulates */
- acc0 = __SMLAD(x0, c0, acc0);
- acc1 = __SMLAD(x1, c0, acc1);
- acc2 = __SMLADX(x1, c0, acc2);
- acc3 = __SMLADX(x3, c0, acc3);
- }
-
- if (k == 2U)
- {
- /* Read y[srcBLen - 5], y[srcBLen - 6] */
- a = *py;
- b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- c0 = __PKHBT(a, b, 16);
-
-#else
-
- c0 = __PKHBT(b, a, 16);;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Read x[7], x[8], x[9] */
- a = *px;
- b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x3 = __PKHBT(a, b, 16);
- a = *(px + 2);
- x2 = __PKHBT(b, a, 16);
-
-#else
-
- x3 = __PKHBT(b, a, 16);
- a = *(px + 2);
- x2 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- px += 2U;
-
- /* Perform the multiply-accumulates */
- acc0 = __SMLADX(x0, c0, acc0);
- acc1 = __SMLADX(x1, c0, acc1);
- acc2 = __SMLADX(x3, c0, acc2);
- acc3 = __SMLADX(x2, c0, acc3);
- }
-
- if (k == 3U)
- {
- /* Read y[srcBLen - 5], y[srcBLen - 6] */
- a = *py;
- b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- c0 = __PKHBT(a, b, 16);
-
-#else
-
- c0 = __PKHBT(b, a, 16);;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Read x[7], x[8], x[9] */
- a = *px;
- b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x3 = __PKHBT(a, b, 16);
- a = *(px + 2);
- x2 = __PKHBT(b, a, 16);
-
-#else
-
- x3 = __PKHBT(b, a, 16);
- a = *(px + 2);
- x2 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Perform the multiply-accumulates */
- acc0 = __SMLADX(x0, c0, acc0);
- acc1 = __SMLADX(x1, c0, acc1);
- acc2 = __SMLADX(x3, c0, acc2);
- acc3 = __SMLADX(x2, c0, acc3);
-
- /* Read y[srcBLen - 7] */
- c0 = *(py-1);
-#ifdef ARM_MATH_BIG_ENDIAN
-
- c0 = c0 << 16U;
-#else
-
- c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
-
- /* Read x[10] */
- a = *(px+2);
- b = *(px+3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x3 = __PKHBT(a, b, 16);
-
-#else
-
- x3 = __PKHBT(b, a, 16);;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- px += 3U;
-
- /* Perform the multiply-accumulates */
- acc0 = __SMLADX(x1, c0, acc0);
- acc1 = __SMLAD(x2, c0, acc1);
- acc2 = __SMLADX(x2, c0, acc2);
- acc3 = __SMLADX(x3, c0, acc3);
- }
-
- /* Store the results in the accumulators in the destination buffer. */
- *pOut++ = (q15_t)(acc0 >> 15);
- *pOut++ = (q15_t)(acc1 >> 15);
- *pOut++ = (q15_t)(acc2 >> 15);
- *pOut++ = (q15_t)(acc3 >> 15);
-
- /* Increment the pointer pIn1 index, count by 4 */
- count += 4U;
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = pIn1 + count;
- py = pSrc2;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize2 % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = srcBLen >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
- k = srcBLen % 0x4U;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q15_t) (sum >> 15);
-
- /* Increment the pointer pIn1 index, count by 1 */
- count++;
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = pIn1 + count;
- py = pSrc2;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
- else
- {
- /* If the srcBLen is not a multiple of 4,
- * the blockSize2 loop cannot be unrolled by 4 */
- blkCnt = blockSize2;
-
- while (blkCnt > 0U)
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* srcBLen number of MACS should be performed */
- k = srcBLen;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulate */
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q15_t) (sum >> 15);
-
- /* Increment the MAC count */
- count++;
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = pIn1 + count;
- py = pSrc2;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
-
-
- /* --------------------------
- * Initializations of stage3
- * -------------------------*/
-
- /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
- * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
- * ....
- * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
- * sum += x[srcALen-1] * y[srcBLen-1]
- */
-
- /* In this stage the MAC operations are decreased by 1 for every iteration.
- The blockSize3 variable holds the number of MAC operations performed */
-
- /* Working pointer of inputA */
- pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
- px = pSrc1;
-
- /* Working pointer of inputB */
- pSrc2 = pIn2 + (srcBLen - 1U);
- pIn2 = pSrc2 - 1U;
- py = pIn2;
-
- /* -------------------
- * Stage3 process
- * ------------------*/
-
- /* For loop unrolling by 4, this stage is divided into two. */
- /* First part of this stage computes the MAC operations greater than 4 */
- /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
- /* The first part of the stage starts here */
- j = blockSize3 >> 2U;
-
- while ((j > 0U) && (blockSize3 > 0U))
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = blockSize3 >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
- py++;
-
- while (k > 0U)
- {
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
- k = blockSize3 % 0x4U;
-
- while (k > 0U)
- {
- /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q15_t) (sum >> 15);
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = ++pSrc1;
- py = pIn2;
-
- /* Decrement the loop counter */
- blockSize3--;
-
- j--;
- }
-
- /* The second part of the stage starts here */
- /* SIMD is not used for the next MAC operations,
- * so pointer py is updated to read only one sample at a time */
- py = py + 1U;
-
- while (blockSize3 > 0U)
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = blockSize3;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- /* sum += x[srcALen-1] * y[srcBLen-1] */
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q15_t) (sum >> 15);
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = ++pSrc1;
- py = pSrc2;
-
- /* Decrement the loop counter */
- blockSize3--;
- }
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
}
/**
- * @} end of Conv group
+ @} end of Conv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c
index 9a7feaa..a276327 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c
@@ -3,13 +3,13 @@
* Title: arm_conv_fast_q31.c
* Description: Fast Q31 Convolution
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,57 +29,54 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Conv
- * @{
+ @addtogroup Conv
+ @{
*/
/**
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
- * These intermediate results are accumulated in a 32-bit register in 2.30 format.
- * Finally, the accumulator is saturated and converted to a 1.31 result.
- *
- * \par
- * The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.
- * In order to avoid overflows completely the input signals must be scaled down.
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.
- *
- * \par
- * See <code>arm_conv_q31()</code> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
+ @brief Convolution of Q31 sequences (fast version).
+ @param[in] pSrcA points to the first input sequence.
+ @param[in] srcALen length of the first input sequence.
+ @param[in] pSrcB points to the second input sequence.
+ @param[in] srcBLen length of the second input sequence.
+ @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+ The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+ These intermediate results are accumulated in a 32-bit register in 2.30 format.
+ Finally, the accumulator is saturated and converted to a 1.31 result.
+ @par
+ The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.
+ In order to avoid overflows completely the input signals must be scaled down.
+ Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+ as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+ @remark
+ Refer to \ref arm_conv_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
*/
void arm_conv_fast_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst)
+ const q31_t * pSrcA,
+ uint32_t srcALen,
+ const q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst)
{
- q31_t *pIn1; /* inputA pointer */
- q31_t *pIn2; /* inputB pointer */
- q31_t *pOut = pDst; /* output pointer */
- q31_t *px; /* Intermediate inputA pointer */
- q31_t *py; /* Intermediate inputB pointer */
- q31_t *pSrc1, *pSrc2; /* Intermediate pointers */
- q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */
- q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3; /* loop counter */
+ const q31_t *pIn1; /* InputA pointer */
+ const q31_t *pIn2; /* InputB pointer */
+ q31_t *pOut = pDst; /* Output pointer */
+ const q31_t *px; /* Intermediate inputA pointer */
+ const q31_t *py; /* Intermediate inputB pointer */
+ const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */
+ q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */
+ q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */
+ uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ uint32_t j, k, count, blkCnt; /* Loop counters */
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -161,21 +158,21 @@
{
/* x[0] * y[srcBLen - 1] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
/* x[1] * y[srcBLen - 2] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
/* x[2] * y[srcBLen - 3] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
/* x[3] * y[srcBLen - 4] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -187,9 +184,9 @@
{
/* Perform the multiply-accumulate */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -200,10 +197,10 @@
py = pIn2 + count;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -261,26 +258,22 @@
{
/* Read y[srcBLen - 1] sample */
c0 = *py--;
-
/* Read x[3] sample */
x3 = *px++;
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[0] * y[srcBLen - 1] */
acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
/* acc1 += x[1] * y[srcBLen - 1] */
acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
/* acc2 += x[2] * y[srcBLen - 1] */
acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-
/* acc3 += x[3] * y[srcBLen - 1] */
acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
/* Read y[srcBLen - 2] sample */
c0 = *py--;
-
/* Read x[4] sample */
x0 = *px++;
@@ -294,9 +287,9 @@
/* acc3 += x[4] * y[srcBLen - 2] */
acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
+
/* Read y[srcBLen - 3] sample */
c0 = *py--;
-
/* Read x[5] sample */
x1 = *px++;
@@ -310,9 +303,9 @@
/* acc3 += x[5] * y[srcBLen - 3] */
acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
+
/* Read y[srcBLen - 4] sample */
c0 = *py--;
-
/* Read x[6] sample */
x2 = *px++;
@@ -337,7 +330,6 @@
{
/* Read y[srcBLen - 5] sample */
c0 = *py--;
-
/* Read x[7] sample */
x3 = *px++;
@@ -356,11 +348,11 @@
x1 = x2;
x2 = x3;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* Store the results in the accumulators in the destination buffer. */
+ /* Store the result in the accumulator in the destination buffer. */
*pOut++ = (q31_t) (acc0 << 1);
*pOut++ = (q31_t) (acc1 << 1);
*pOut++ = (q31_t) (acc2 << 1);
@@ -373,7 +365,7 @@
px = pIn1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -395,15 +387,15 @@
{
/* Perform the multiply-accumulates */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -415,23 +407,23 @@
{
/* Perform the multiply-accumulate */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
/* Store the result in the accumulator in the destination buffer. */
*pOut++ = sum << 1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pIn1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -453,23 +445,23 @@
{
/* Perform the multiply-accumulate */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
/* Store the result in the accumulator in the destination buffer. */
*pOut++ = sum << 1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pIn1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -513,23 +505,24 @@
** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
+ /* Perform the multiply-accumulate */
/* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
/* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
/* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
/* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -541,9 +534,9 @@
{
/* Perform the multiply-accumulate */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -554,12 +547,12 @@
px = ++pSrc1;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize3--;
}
}
/**
- * @} end of Conv group
+ @} end of Conv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c
index 1b20399..0a7e371 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c
@@ -3,13 +3,13 @@
* Title: arm_conv_opt_q15.c
* Description: Convolution of Q15 sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,73 +29,61 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Conv
- * @{
+ @addtogroup Conv
+ @{
*/
/**
- * @brief Convolution of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
- * @param[in] *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- * @return none.
- *
- * \par Restrictions
- * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- * In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
- *
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * This approach provides 33 guard bits and there is no risk of overflow.
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
- *
- *
- * \par
- * Refer to <code>arm_conv_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
- *
- *
+ @brief Convolution of Q15 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
+ @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+ The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+ This approach provides 33 guard bits and there is no risk of overflow.
+ The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+ @remark
+ Refer to \ref arm_conv_fast_q15() for a faster but less precise version of this function.
*/
void arm_conv_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2)
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ q15_t * pScratch1,
+ q15_t * pScratch2)
{
- q63_t acc0, acc1, acc2, acc3; /* Accumulator */
- q31_t x1, x2, x3; /* Temporary variables to hold state and coefficient values */
- q31_t y1, y2; /* State variables */
- q15_t *pOut = pDst; /* output pointer */
- q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */
- q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- uint32_t j, k, blkCnt; /* loop counter */
- uint32_t tapCnt; /* loop count */
-#ifdef UNALIGNED_SUPPORT_DISABLE
+ q63_t acc0; /* Accumulators */
+ const q15_t *pIn1; /* InputA pointer */
+ const q15_t *pIn2; /* InputB pointer */
+ q15_t *pOut = pDst; /* Output pointer */
+ q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */
+ q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */
+ const q15_t *px; /* Intermediate inputA pointer */
+ q15_t *py; /* Intermediate inputB pointer */
+ uint32_t j, k, blkCnt; /* Loop counter */
+ uint32_t tapCnt; /* Loop count */
- q15_t a, b;
+#if defined (ARM_MATH_LOOPUNROLL)
+ q63_t acc1, acc2, acc3; /* Accumulators */
+ q31_t x1, x2, x3; /* Temporary variables to hold state and coefficient values */
+ q31_t y1, y2; /* State variables */
+#endif
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -107,7 +95,6 @@
/* Initialization of inputB pointer */
pIn2 = pSrcB;
-
}
else
{
@@ -123,17 +110,17 @@
srcALen = j;
}
- /* pointer to take end of scratch2 buffer */
+ /* Pointer to take end of scratch2 buffer */
pScr2 = pScratch2 + srcBLen - 1;
/* points to smaller length sequence */
px = pIn2;
- /* Apply loop unrolling and do 4 Copies simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = srcBLen >> 2U;
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
/* Copy smaller length input sequence in reverse order into second scratch buffer */
while (k > 0U)
{
@@ -143,20 +130,26 @@
*pScr2-- = *px++;
*pScr2-- = *px++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = srcBLen % 0x4U;
+#else
+
+ /* Initialize k with number of samples */
+ k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* copy second buffer in reversal manner for remaining samples */
*pScr2-- = *px++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -164,7 +157,7 @@
pScr1 = pScratch1;
/* Assuming scratch1 buffer is aligned by 32-bit */
- /* Fill (srcBLen - 1U) zeros in scratch buffer */
+ /* Fill (srcBLen - 1U) zeros in scratch1 buffer */
arm_fill_q15(0, pScr1, (srcBLen - 1U));
/* Update temporary scratch pointer */
@@ -172,50 +165,12 @@
/* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
/* Copy (srcALen) samples in scratch buffer */
arm_copy_q15(pIn1, pScr1, srcALen);
/* Update pointers */
pScr1 += srcALen;
-#else
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = srcALen >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr1++ = *pIn1++;
- *pScr1++ = *pIn1++;
- *pScr1++ = *pIn1++;
- *pScr1++ = *pIn1++;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = srcALen % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr1++ = *pIn1++;
-
- /* Decrement the loop counter */
- k--;
- }
-
-#endif
-
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
/* Fill (srcBLen - 1U) zeros at end of scratch buffer */
arm_fill_q15(0, pScr1, (srcBLen - 1U));
@@ -223,40 +178,6 @@
/* Update pointer */
pScr1 += (srcBLen - 1U);
-#else
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = (srcBLen - 1U) >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr1++ = 0;
- *pScr1++ = 0;
- *pScr1++ = 0;
- *pScr1++ = 0;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = (srcBLen - 1U) % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr1++ = 0;
-
- /* Decrement the loop counter */
- k--;
- }
-
-#endif
-
/* Temporary pointer for scratch2 */
py = pScratch2;
@@ -264,10 +185,9 @@
/* Initialization of pIn2 pointer */
pIn2 = py;
- /* First part of the processing with loop unrolling process 4 data points at a time.
- ** a second loop below process for the remaining 1 to 3 samples. */
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Actual convolution process starts here */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = (srcALen + srcBLen - 1U) >> 2;
while (blkCnt > 0)
@@ -282,21 +202,19 @@
acc3 = 0;
/* Read two samples from scratch1 buffer */
- x1 = *__SIMD32(pScr1)++;
+ x1 = read_q15x2_ia (&pScr1);
/* Read next two samples from scratch1 buffer */
- x2 = *__SIMD32(pScr1)++;
+ x2 = read_q15x2_ia (&pScr1);
tapCnt = (srcBLen) >> 2U;
while (tapCnt > 0U)
{
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
/* Read four samples from smaller buffer */
- y1 = _SIMD32_OFFSET(pIn2);
- y2 = _SIMD32_OFFSET(pIn2 + 2U);
+ y1 = read_q15x2_ia ((q15_t **) &pIn2);
+ y2 = read_q15x2_ia ((q15_t **) &pIn2);
/* multiply and accumlate */
acc0 = __SMLALD(x1, y1, acc0);
@@ -313,7 +231,7 @@
acc1 = __SMLALDX(x3, y1, acc1);
/* Read next two samples from scratch1 buffer */
- x1 = _SIMD32_OFFSET(pScr1);
+ x1 = read_q15x2_ia (&pScr1);
/* multiply and accumlate */
acc0 = __SMLALD(x2, y2, acc0);
@@ -329,7 +247,7 @@
acc3 = __SMLALDX(x3, y1, acc3);
acc1 = __SMLALDX(x3, y2, acc1);
- x2 = _SIMD32_OFFSET(pScr1 + 2U);
+ x2 = read_q15x2_ia (&pScr1);
#ifndef ARM_MATH_BIG_ENDIAN
x3 = __PKHBT(x2, x1, 0);
@@ -339,85 +257,7 @@
acc3 = __SMLALDX(x3, y2, acc3);
-#else
-
- /* Read four samples from smaller buffer */
- a = *pIn2;
- b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- y1 = __PKHBT(a, b, 16);
-#else
- y1 = __PKHBT(b, a, 16);
-#endif
-
- a = *(pIn2 + 2);
- b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
- y2 = __PKHBT(a, b, 16);
-#else
- y2 = __PKHBT(b, a, 16);
-#endif
-
- acc0 = __SMLALD(x1, y1, acc0);
-
- acc2 = __SMLALD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x3 = __PKHBT(x2, x1, 0);
-#else
- x3 = __PKHBT(x1, x2, 0);
-#endif
-
- acc1 = __SMLALDX(x3, y1, acc1);
-
- a = *pScr1;
- b = *(pScr1 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x1 = __PKHBT(a, b, 16);
-#else
- x1 = __PKHBT(b, a, 16);
-#endif
-
- acc0 = __SMLALD(x2, y2, acc0);
-
- acc2 = __SMLALD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x3 = __PKHBT(x1, x2, 0);
-#else
- x3 = __PKHBT(x2, x1, 0);
-#endif
-
- acc3 = __SMLALDX(x3, y1, acc3);
-
- acc1 = __SMLALDX(x3, y2, acc1);
-
- a = *(pScr1 + 2);
- b = *(pScr1 + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x2 = __PKHBT(a, b, 16);
-#else
- x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x3 = __PKHBT(x2, x1, 0);
-#else
- x3 = __PKHBT(x1, x2, 0);
-#endif
-
- acc3 = __SMLALDX(x3, y2, acc3);
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
- pIn2 += 4U;
- pScr1 += 4U;
-
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -429,7 +269,6 @@
while (tapCnt > 0U)
{
-
/* accumlate the results */
acc0 += (*pScr1++ * *pIn2);
acc1 += (*pScr1++ * *pIn2);
@@ -438,44 +277,37 @@
pScr1 -= 3U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
blkCnt--;
-
/* Store the results in the accumulators in the destination buffer. */
-
#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
#else
-
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Initialization of inputB pointer */
pIn2 = py;
pScratch1 += 4U;
-
}
-
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
/* Calculate convolution for remaining samples of Bigger length sequence */
while (blkCnt > 0)
{
@@ -494,7 +326,7 @@
acc0 += (*pScr1++ * *pIn2++);
acc0 += (*pScr1++ * *pIn2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -507,27 +339,24 @@
/* accumlate the results */
acc0 += (*pScr1++ * *pIn2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
blkCnt--;
/* The result is in 2.30 format. Convert to 1.15 with saturation.
- ** Then store the output in the destination buffer. */
+ Then store the output in the destination buffer. */
*pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
/* Initialization of inputB pointer */
pIn2 = py;
pScratch1 += 1U;
-
}
}
-
/**
- * @} end of Conv group
+ @} end of Conv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c
index 24d378b..2daf3b0 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c
@@ -3,13 +3,13 @@
* Title: arm_conv_opt_q7.c
* Description: Convolution of Q7 sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,61 +29,53 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Conv
- * @{
+ @addtogroup Conv
+ @{
*/
/**
- * @brief Convolution of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
- * @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
- * @return none.
- *
- * \par Restrictions
- * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- * In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
- * This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
- *
+ @brief Convolution of Q7 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
+ @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 32-bit internal accumulator.
+ Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+ The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+ This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
+ The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
*/
void arm_conv_opt_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2)
+ const q7_t * pSrcA,
+ uint32_t srcALen,
+ const q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst,
+ q15_t * pScratch1,
+ q15_t * pScratch2)
{
-
- q15_t *pScr2, *pScr1; /* Intermediate pointers for scratch pointers */
- q15_t x4; /* Temporary input variable */
- q7_t *pIn1, *pIn2; /* inputA and inputB pointer */
- uint32_t j, k, blkCnt, tapCnt; /* loop counter */
- q7_t *px; /* Temporary input1 pointer */
- q15_t *py; /* Temporary input2 pointer */
- q31_t acc0, acc1, acc2, acc3; /* Accumulator */
- q31_t x1, x2, x3, y1; /* Temporary input variables */
- q7_t *pOut = pDst; /* output pointer */
- q7_t out0, out1, out2, out3; /* temporary variables */
+ q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch */
+ q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch */
+ q15_t x4; /* Temporary input variable */
+ q15_t *py; /* Temporary input2 pointer */
+ q31_t acc0, acc1, acc2, acc3; /* Accumulators */
+ const q7_t *pIn1, *pIn2; /* InputA and inputB pointer */
+ uint32_t j, k, blkCnt, tapCnt; /* Loop counter */
+ q31_t x1, x2, x3, y1; /* Temporary input variables */
+ const q7_t *px; /* Temporary input1 pointer */
+ q7_t *pOut = pDst; /* Output pointer */
+ q7_t out0, out1, out2, out3; /* Temporary variables */
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -110,9 +102,6 @@
srcALen = j;
}
- /* pointer to take end of scratch2 buffer */
- pScr2 = pScratch2;
-
/* points to smaller length sequence */
px = pIn2 + srcBLen - 1;
@@ -124,16 +113,16 @@
while (k > 0U)
{
/* copy second buffer in reversal manner */
- x4 = (q15_t) * px--;
+ x4 = (q15_t) *px--;
*pScr2++ = x4;
- x4 = (q15_t) * px--;
+ x4 = (q15_t) *px--;
*pScr2++ = x4;
- x4 = (q15_t) * px--;
+ x4 = (q15_t) *px--;
*pScr2++ = x4;
- x4 = (q15_t) * px--;
+ x4 = (q15_t) *px--;
*pScr2++ = x4;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -144,16 +133,13 @@
while (k > 0U)
{
/* copy second buffer in reversal manner for remaining samples */
- x4 = (q15_t) * px--;
+ x4 = (q15_t) *px--;
*pScr2++ = x4;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* Initialze temporary scratch pointer */
- pScr1 = pScratch1;
-
/* Fill (srcBLen - 1U) zeros in scratch buffer */
arm_fill_q15(0, pScr1, (srcBLen - 1U));
@@ -169,16 +155,16 @@
while (k > 0U)
{
/* copy second buffer in reversal manner */
- x4 = (q15_t) * pIn1++;
+ x4 = (q15_t) *pIn1++;
*pScr1++ = x4;
- x4 = (q15_t) * pIn1++;
+ x4 = (q15_t) *pIn1++;
*pScr1++ = x4;
- x4 = (q15_t) * pIn1++;
+ x4 = (q15_t) *pIn1++;
*pScr1++ = x4;
- x4 = (q15_t) * pIn1++;
+ x4 = (q15_t) *pIn1++;
*pScr1++ = x4;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -196,48 +182,12 @@
k--;
}
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
/* Fill (srcBLen - 1U) zeros at end of scratch buffer */
arm_fill_q15(0, pScr1, (srcBLen - 1U));
/* Update pointer */
pScr1 += (srcBLen - 1U);
-#else
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = (srcBLen - 1U) >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr1++ = 0;
- *pScr1++ = 0;
- *pScr1++ = 0;
- *pScr1++ = 0;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = (srcBLen - 1U) % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr1++ = 0;
-
- /* Decrement the loop counter */
- k--;
- }
-
-#endif
-
/* Temporary pointer for scratch2 */
py = pScratch2;
@@ -247,7 +197,7 @@
pScr2 = py;
/* Actual convolution process starts here */
- blkCnt = (srcALen + srcBLen - 1U) >> 2;
+ blkCnt = (srcALen + srcBLen - 1U) >> 2U;
while (blkCnt > 0)
{
@@ -261,18 +211,17 @@
acc3 = 0;
/* Read two samples from scratch1 buffer */
- x1 = *__SIMD32(pScr1)++;
+ x1 = read_q15x2_ia (&pScr1);
/* Read next two samples from scratch1 buffer */
- x2 = *__SIMD32(pScr1)++;
+ x2 = read_q15x2_ia (&pScr1);
tapCnt = (srcBLen) >> 2U;
while (tapCnt > 0U)
{
-
/* Read four samples from smaller buffer */
- y1 = _SIMD32_OFFSET(pScr2);
+ y1 = read_q15x2_ia (&pScr2);
/* multiply and accumlate */
acc0 = __SMLAD(x1, y1, acc0);
@@ -289,7 +238,7 @@
acc1 = __SMLADX(x3, y1, acc1);
/* Read next two samples from scratch1 buffer */
- x1 = *__SIMD32(pScr1)++;
+ x1 = read_q15x2_ia (&pScr1);
/* pack input data */
#ifndef ARM_MATH_BIG_ENDIAN
@@ -301,7 +250,7 @@
acc3 = __SMLADX(x3, y1, acc3);
/* Read four samples from smaller buffer */
- y1 = _SIMD32_OFFSET(pScr2 + 2U);
+ y1 = read_q15x2_ia (&pScr2);
acc0 = __SMLAD(x2, y1, acc0);
@@ -309,7 +258,7 @@
acc1 = __SMLADX(x3, y1, acc1);
- x2 = *__SIMD32(pScr1)++;
+ x2 = read_q15x2_ia (&pScr1);
#ifndef ARM_MATH_BIG_ENDIAN
x3 = __PKHBT(x2, x1, 0);
@@ -319,25 +268,18 @@
acc3 = __SMLADX(x3, y1, acc3);
- pScr2 += 4U;
-
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
-
-
/* Update scratch pointer for remaining samples of smaller length sequence */
pScr1 -= 4U;
-
/* apply same above for remaining samples of smaller length sequence */
tapCnt = (srcBLen) & 3U;
while (tapCnt > 0U)
{
-
/* accumlate the results */
acc0 += (*pScr1++ * *pScr2);
acc1 += (*pScr1++ * *pScr2);
@@ -346,7 +288,7 @@
pScr1 -= 3U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -358,16 +300,14 @@
out2 = (q7_t) (__SSAT(acc2 >> 7U, 8));
out3 = (q7_t) (__SSAT(acc3 >> 7U, 8));
- *__SIMD32(pOut)++ = __PACKq7(out0, out1, out2, out3);
+ write_q7x4_ia (&pOut, __PACKq7(out0, out1, out2, out3));
/* Initialization of inputB pointer */
pScr2 = py;
pScratch1 += 4U;
-
}
-
blkCnt = (srcALen + srcBLen - 1U) & 0x3;
/* Calculate convolution for remaining samples of Bigger length sequence */
@@ -386,7 +326,7 @@
acc0 += (*pScr1++ * *pScr2++);
acc0 += (*pScr1++ * *pScr2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -395,11 +335,10 @@
/* apply same above for remaining samples of smaller length sequence */
while (tapCnt > 0U)
{
-
/* accumlate the results */
acc0 += (*pScr1++ * *pScr2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -412,12 +351,10 @@
pScr2 = py;
pScratch1 += 1U;
-
}
}
-
/**
- * @} end of Conv group
+ @} end of Conv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c
index 693cf89..ab6993a 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c
@@ -3,13 +3,13 @@
* Title: arm_conv_partial_f32.c
* Description: Partial convolution of floating-point sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,84 +29,82 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @defgroup PartialConv Partial Convolution
- *
- * Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated.
- * Each function has two additional arguments.
- * <code>firstIndex</code> specifies the starting index of the subset of output samples.
- * <code>numPoints</code> is the number of output samples to compute.
- * The function computes the output in the range
- * <code>[firstIndex, ..., firstIndex+numPoints-1]</code>.
- * The output array <code>pDst</code> contains <code>numPoints</code> values.
- *
- * The allowable range of output indices is [0 srcALen+srcBLen-2].
- * If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR.
- * Otherwise the functions return ARM_MATH_SUCCESS.
- * \note Refer arm_conv_f32() for details on fixed point behavior.
- *
- *
- * <b>Fast Versions</b>
- *
- * \par
- * Fast versions are supported for Q31 and Q15 of partial convolution. Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.
- *
- *
- * <b>Opt Versions</b>
- *
- * \par
- * Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of partial convolution
+ @defgroup PartialConv Partial Convolution
+
+ Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated.
+ Each function has two additional arguments.
+ <code>firstIndex</code> specifies the starting index of the subset of output samples.
+ <code>numPoints</code> is the number of output samples to compute.
+ The function computes the output in the range
+ <code>[firstIndex, ..., firstIndex+numPoints-1]</code>.
+ The output array <code>pDst</code> contains <code>numPoints</code> values.
+
+ The allowable range of output indices is [0 srcALen+srcBLen-2].
+ If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR.
+ Otherwise the functions return ARM_MATH_SUCCESS.
+ \note Refer to \ref arm_conv_f32() for details on fixed point behavior.
+
+ @par Fast Versions
+ Fast versions are supported for Q31 and Q15 of partial convolution.
+ Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires
+ the input signals should be scaled down to avoid intermediate overflows.
+
+ @par Opt Versions
+ Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation.
+ These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of partial convolution
*/
/**
- * @addtogroup PartialConv
- * @{
+ @addtogroup PartialConv
+ @{
*/
/**
- * @brief Partial convolution of floating-point sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+ @brief Partial convolution of floating-point sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written
+ @param[in] firstIndex is the first output sample to start with
+ @param[in] numPoints is the number of output points to be computed
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
*/
arm_status arm_conv_partial_f32(
- float32_t * pSrcA,
- uint32_t srcALen,
- float32_t * pSrcB,
- uint32_t srcBLen,
- float32_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints)
+ const float32_t * pSrcA,
+ uint32_t srcALen,
+ const float32_t * pSrcB,
+ uint32_t srcBLen,
+ float32_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints)
{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
-#if defined (ARM_MATH_DSP)
+ const float32_t *pIn1 = pSrcA; /* InputA pointer */
+ const float32_t *pIn2 = pSrcB; /* InputB pointer */
+ float32_t *pOut = pDst; /* Output pointer */
+ const float32_t *px; /* Intermediate inputA pointer */
+ const float32_t *py; /* Intermediate inputB pointer */
+ const float32_t *pSrc1, *pSrc2; /* Intermediate pointers */
+ float32_t sum; /* Accumulator */
+ uint32_t j, k, count, blkCnt, check;
+ int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ arm_status status; /* Status of Partial convolution */
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- float32_t *pIn1 = pSrcA; /* inputA pointer */
- float32_t *pIn2 = pSrcB; /* inputB pointer */
- float32_t *pOut = pDst; /* output pointer */
- float32_t *px; /* Intermediate inputA pointer */
- float32_t *py; /* Intermediate inputB pointer */
- float32_t *pSrc1, *pSrc2; /* Intermediate pointers */
- float32_t sum, acc0, acc1, acc2, acc3; /* Accumulator */
- float32_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t j, k, count = 0U, blkCnt, check;
- int32_t blockSize1, blockSize2, blockSize3; /* loop counters */
- arm_status status; /* status of Partial convolution */
-
+#if defined (ARM_MATH_LOOPUNROLL)
+ float32_t acc0, acc1, acc2, acc3; /* Accumulator */
+ float32_t x0, x1, x2, x3, c0; /* Temporary variables */
+#endif
/* Check for range of output samples to be calculated */
if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -116,7 +114,6 @@
}
else
{
-
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
/* So srcBLen is always considered as shorter or equal to srcALen */
@@ -148,10 +145,8 @@
blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
- blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :
- (int32_t) numPoints) : 0;
- blockSize2 = ((int32_t) check - blockSize3) -
- (blockSize1 + (int32_t) firstIndex);
+ blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+ blockSize2 = ((int32_t) check - blockSize3) - (blockSize1 + (int32_t) firstIndex);
blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
/* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
@@ -179,7 +174,7 @@
/* In this stage the MAC operations are increased by 1 for every iteration.
The count variable holds the number of MAC operations performed.
- Since the partial convolution starts from from firstIndex
+ Since the partial convolution starts from firstIndex
Number of Macs to be performed is firstIndex + 1 */
count = 1U + firstIndex;
@@ -195,16 +190,16 @@
* ----------------------*/
/* The first stage starts here */
- while (blockSize1 > 0)
+ while (blockSize1 > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0.0f;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* x[0] * y[srcBLen - 1] */
@@ -219,20 +214,26 @@
/* x[3] * y[srcBLen - 4] */
sum += *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize k with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum += *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -243,10 +244,10 @@
py = ++pSrc1;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -287,7 +288,9 @@
* srcBLen should be greater than or equal to 4 */
if (srcBLen >= 4U)
{
- /* Loop unroll over blockSize2, by 4 */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = ((uint32_t) blockSize2 >> 2U);
while (blkCnt > 0U)
@@ -312,26 +315,21 @@
{
/* Read y[srcBLen - 1] sample */
c0 = *py--;
-
/* Read x[3] sample */
x3 = *px++;
/* Perform the multiply-accumulate */
/* acc0 += x[0] * y[srcBLen - 1] */
acc0 += x0 * c0;
-
/* acc1 += x[1] * y[srcBLen - 1] */
acc1 += x1 * c0;
-
/* acc2 += x[2] * y[srcBLen - 1] */
acc2 += x2 * c0;
-
/* acc3 += x[3] * y[srcBLen - 1] */
acc3 += x3 * c0;
/* Read y[srcBLen - 2] sample */
c0 = *py--;
-
/* Read x[4] sample */
x0 = *px++;
@@ -347,11 +345,10 @@
/* Read y[srcBLen - 3] sample */
c0 = *py--;
-
/* Read x[5] sample */
x1 = *px++;
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[2] * y[srcBLen - 3] */
acc0 += x2 * c0;
/* acc1 += x[3] * y[srcBLen - 2] */
@@ -363,11 +360,10 @@
/* Read y[srcBLen - 4] sample */
c0 = *py--;
-
/* Read x[6] sample */
x2 = *px++;
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[3] * y[srcBLen - 4] */
acc0 += x3 * c0;
/* acc1 += x[4] * y[srcBLen - 4] */
@@ -377,7 +373,6 @@
/* acc3 += x[6] * y[srcBLen - 4] */
acc3 += x2 * c0;
-
} while (--k);
/* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
@@ -388,7 +383,6 @@
{
/* Read y[srcBLen - 5] sample */
c0 = *py--;
-
/* Read x[7] sample */
x3 = *px++;
@@ -417,31 +411,37 @@
*pOut++ = acc2;
*pOut++ = acc3;
- /* Increment the pointer pIn1 index, count by 1 */
+ /* Increment the pointer pIn1 index, count by 4 */
count += 4U;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pSrc1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (uint32_t) blockSize2 % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0.0f;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = srcBLen >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* Perform the multiply-accumulates */
@@ -450,34 +450,40 @@
sum += *px++ * *py--;
sum += *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = srcBLen % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* Perform the multiply-accumulate */
sum += *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
/* Store the result in the accumulator in the destination buffer. */
*pOut++ = sum;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pSrc1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -500,7 +506,7 @@
/* Perform the multiply-accumulate */
sum += *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -532,7 +538,7 @@
*/
/* In this stage the MAC operations are decreased by 1 for every iteration.
- The count variable holds the number of MAC operations performed */
+ The blockSize3 variable holds the number of MAC operations performed */
count = srcBLen - 1U;
/* Working pointer of inputA */
@@ -543,16 +549,20 @@
pSrc2 = pIn2 + (srcBLen - 1U);
py = pSrc2;
- while (blockSize3 > 0)
+ /* -------------------
+ * Stage3 process
+ * ------------------*/
+
+ while (blockSize3 > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0.0f;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
@@ -567,21 +577,27 @@
/* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
sum += *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* sum += x[srcALen-1] * y[srcBLen-1] */
sum += *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -592,15 +608,14 @@
px = ++pSrc1;
py = pSrc2;
- /* Decrement the MAC count */
+ /* Decrement MAC count */
count--;
/* Decrement the loop counter */
blockSize3--;
-
}
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
@@ -608,19 +623,18 @@
return (status);
#else
+/* alternate version for CM0_FAMILY */
- /* Run the below code for Cortex-M0 */
-
- float32_t *pIn1 = pSrcA; /* inputA pointer */
- float32_t *pIn2 = pSrcB; /* inputB pointer */
- float32_t sum; /* Accumulator */
- uint32_t i, j; /* loop counters */
- arm_status status; /* status of Partial convolution */
+ const float32_t *pIn1 = pSrcA; /* InputA pointer */
+ const float32_t *pIn2 = pSrcB; /* InputB pointer */
+ float32_t sum; /* Accumulator */
+ uint32_t i, j; /* Loop counters */
+ arm_status status; /* Status of Partial convolution */
/* Check for range of output samples to be calculated */
if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
{
- /* Set status as ARM_ARGUMENT_ERROR */
+ /* Set status as ARM_MATH_ARGUMENT_ERROR */
status = ARM_MATH_ARGUMENT_ERROR;
}
else
@@ -634,25 +648,29 @@
/* Loop to perform MAC operations according to convolution equation */
for (j = 0U; j <= i; j++)
{
- /* Check the array limitations for inputs */
- if ((((i - j) < srcBLen) && (j < srcALen)))
+ /* Check the array limitations */
+ if (((i - j) < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
- sum += pIn1[j] * pIn2[i - j];
+ sum += ( pIn1[j] * pIn2[i - j]);
}
}
+
/* Store the output in the destination buffer */
pDst[i] = sum;
}
- /* set status as ARM_SUCCESS as there are no argument errors */
+
+ /* Set status as ARM_SUCCESS */
status = ARM_MATH_SUCCESS;
}
+
+ /* Return to application */
return (status);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
}
/**
- * @} end of PartialConv group
+ @} end of PartialConv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
index cf2d711..cf52a74 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
@@ -3,13 +3,13 @@
* Title: arm_conv_partial_fast_opt_q15.c
* Description: Fast Q15 Partial convolution
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,63 +29,63 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup PartialConv
- * @{
+ @addtogroup PartialConv
+ @{
*/
/**
- * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @param[in] *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * See <code>arm_conv_partial_q15()</code> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
- *
- * \par Restrictions
- * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- * In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
- *
- */
+ @brief Partial convolution of Q15 sequences (fast version).
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written
+ @param[in] firstIndex is the first output sample to start with
+ @param[in] numPoints is the number of output points to be computed
+ @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2
+ @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen)
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
-#ifndef UNALIGNED_SUPPORT_DISABLE
+ @remark
+ Refer to \ref arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+ */
arm_status arm_conv_partial_fast_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2)
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints,
+ q15_t * pScratch1,
+ q15_t * pScratch2)
{
+ q15_t *pOut = pDst; /* Output pointer */
+ q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */
+ q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */
+ q31_t acc0; /* Accumulator */
+ const q15_t *pIn1; /* InputA pointer */
+ const q15_t *pIn2; /* InputB pointer */
+ const q15_t *px; /* Intermediate inputA pointer */
+ q15_t *py; /* Intermediate inputB pointer */
+ uint32_t j, k, blkCnt; /* Loop counter */
+ uint32_t tapCnt; /* Loop count */
+ arm_status status; /* Status variable */
+ q31_t x1; /* Temporary variables to hold state and coefficient values */
+ q31_t y1; /* State variables */
- q15_t *pOut = pDst; /* output pointer */
- q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */
- q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */
- q31_t acc0, acc1, acc2, acc3; /* Accumulator */
- q31_t x1, x2, x3; /* Temporary variables to hold state and coefficient values */
- q31_t y1, y2; /* State variables */
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- uint32_t j, k, blkCnt; /* loop counter */
- arm_status status;
-
- uint32_t tapCnt; /* loop count */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t acc1, acc2, acc3; /* Accumulator */
+ q31_t x2, x3; /* Temporary variables to hold state and coefficient values */
+ q31_t y2; /* State variables */
+#endif
/* Check for range of output samples to be calculated */
if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -95,7 +95,6 @@
}
else
{
-
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
/* So srcBLen is always considered as shorter or equal to srcALen */
@@ -130,11 +129,10 @@
/* points to smaller length sequence */
px = pIn2;
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = srcBLen >> 2U;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
+ /* Loop unrolling: Compute 4 outputs at a time */
+ k = srcBLen >> 2U;
/* Copy smaller length input sequence in reverse order into second scratch buffer */
while (k > 0U)
@@ -145,20 +143,26 @@
*pScr2-- = *px++;
*pScr2-- = *px++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = srcBLen % 0x4U;
+#else
+
+ /* Initialize k with number of samples */
+ k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* copy second buffer in reversal manner for remaining samples */
*pScr2-- = *px++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -193,10 +197,11 @@
pOut = pDst + firstIndex;
- /* First part of the processing with loop unrolling process 4 data points at a time.
- ** a second loop below process for the remaining 1 to 3 samples. */
-
/* Actual convolution process starts here */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = (numPoints) >> 2;
while (blkCnt > 0)
@@ -211,10 +216,10 @@
acc3 = 0;
/* Read two samples from scratch1 buffer */
- x1 = *__SIMD32(pScr1)++;
+ x1 = read_q15x2_ia (&pScr1);
/* Read next two samples from scratch1 buffer */
- x2 = *__SIMD32(pScr1)++;
+ x2 = read_q15x2_ia (&pScr1);
tapCnt = (srcBLen) >> 2U;
@@ -222,8 +227,8 @@
{
/* Read four samples from smaller buffer */
- y1 = _SIMD32_OFFSET(pIn2);
- y2 = _SIMD32_OFFSET(pIn2 + 2U);
+ y1 = read_q15x2_ia ((q15_t **) &pIn2);
+ y2 = read_q15x2_ia ((q15_t **) &pIn2);
/* multiply and accumlate */
acc0 = __SMLAD(x1, y1, acc0);
@@ -240,11 +245,10 @@
acc1 = __SMLADX(x3, y1, acc1);
/* Read next two samples from scratch1 buffer */
- x1 = _SIMD32_OFFSET(pScr1);
+ x1 = read_q15x2_ia (&pScr1);
/* multiply and accumlate */
acc0 = __SMLAD(x2, y2, acc0);
-
acc2 = __SMLAD(x1, y2, acc2);
/* pack input data */
@@ -257,7 +261,7 @@
acc3 = __SMLADX(x3, y1, acc3);
acc1 = __SMLADX(x3, y2, acc1);
- x2 = _SIMD32_OFFSET(pScr1 + 2U);
+ x2 = read_q15x2_ia (&pScr1);
#ifndef ARM_MATH_BIG_ENDIAN
x3 = __PKHBT(x2, x1, 0);
@@ -265,14 +269,10 @@
x3 = __PKHBT(x1, x2, 0);
#endif
+ /* multiply and accumlate */
acc3 = __SMLADX(x3, y2, acc3);
- /* update scratch pointers */
- pIn2 += 4U;
- pScr1 += 4U;
-
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -284,7 +284,6 @@
while (tapCnt > 0U)
{
-
/* accumlate the results */
acc0 += (*pScr1++ * *pIn2);
acc1 += (*pScr1++ * *pIn2);
@@ -293,41 +292,37 @@
pScr1 -= 3U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
blkCnt--;
-
/* Store the results in the accumulators in the destination buffer. */
-
#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
#else
-
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Initialization of inputB pointer */
pIn2 = py;
pScratch1 += 4U;
-
}
-
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numPoints & 0x3;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numPoints;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
/* Calculate convolution for remaining samples of Bigger length sequence */
while (blkCnt > 0)
{
@@ -341,16 +336,16 @@
while (tapCnt > 0U)
{
-
/* Read next two samples from scratch1 buffer */
- x1 = *__SIMD32(pScr1)++;
+ x1 = read_q15x2_ia (&pScr1);
/* Read two samples from smaller buffer */
- y1 = *__SIMD32(pIn2)++;
+ y1 = read_q15x2_ia ((q15_t **) &pIn2);
+ /* multiply and accumlate */
acc0 = __SMLAD(x1, y1, acc0);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -359,11 +354,10 @@
/* apply same above for remaining samples of smaller length sequence */
while (tapCnt > 0U)
{
-
/* accumlate the results */
acc0 += (*pScr1++ * *pIn2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -379,378 +373,15 @@
pScratch1 += 1U;
}
- /* set status as ARM_MATH_SUCCESS */
+
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
- /* Return to application */
- return (status);
-}
-
-#else
-
-arm_status arm_conv_partial_fast_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2)
-{
-
- q15_t *pOut = pDst; /* output pointer */
- q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */
- q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */
- q31_t acc0, acc1, acc2, acc3; /* Accumulator */
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- uint32_t j, k, blkCnt; /* loop counter */
- arm_status status; /* Status variable */
- uint32_t tapCnt; /* loop count */
- q15_t x10, x11, x20, x21; /* Temporary variables to hold srcA buffer */
- q15_t y10, y11; /* Temporary variables to hold srcB buffer */
-
-
- /* Check for range of output samples to be calculated */
- if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
- {
- /* Set status as ARM_MATH_ARGUMENT_ERROR */
- status = ARM_MATH_ARGUMENT_ERROR;
- }
- else
- {
-
- /* The algorithm implementation is based on the lengths of the inputs. */
- /* srcB is always made to slide across srcA. */
- /* So srcBLen is always considered as shorter or equal to srcALen */
- if (srcALen >= srcBLen)
- {
- /* Initialization of inputA pointer */
- pIn1 = pSrcA;
-
- /* Initialization of inputB pointer */
- pIn2 = pSrcB;
- }
- else
- {
- /* Initialization of inputA pointer */
- pIn1 = pSrcB;
-
- /* Initialization of inputB pointer */
- pIn2 = pSrcA;
-
- /* srcBLen is always considered as shorter or equal to srcALen */
- j = srcBLen;
- srcBLen = srcALen;
- srcALen = j;
- }
-
- /* Temporary pointer for scratch2 */
- py = pScratch2;
-
- /* pointer to take end of scratch2 buffer */
- pScr2 = pScratch2 + srcBLen - 1;
-
- /* points to smaller length sequence */
- px = pIn2;
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = srcBLen >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr2-- = *px++;
- *pScr2-- = *px++;
- *pScr2-- = *px++;
- *pScr2-- = *px++;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = srcBLen % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr2-- = *px++;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Initialze temporary scratch pointer */
- pScr1 = pScratch1;
-
- /* Fill (srcBLen - 1U) zeros in scratch buffer */
- arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
- /* Update temporary scratch pointer */
- pScr1 += (srcBLen - 1U);
-
- /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = srcALen >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr1++ = *pIn1++;
- *pScr1++ = *pIn1++;
- *pScr1++ = *pIn1++;
- *pScr1++ = *pIn1++;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = srcALen % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr1++ = *pIn1++;
-
- /* Decrement the loop counter */
- k--;
- }
-
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = (srcBLen - 1U) >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr1++ = 0;
- *pScr1++ = 0;
- *pScr1++ = 0;
- *pScr1++ = 0;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = (srcBLen - 1U) % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr1++ = 0;
-
- /* Decrement the loop counter */
- k--;
- }
-
-
- /* Initialization of pIn2 pointer */
- pIn2 = py;
-
- pScratch1 += firstIndex;
-
- pOut = pDst + firstIndex;
-
- /* Actual convolution process starts here */
- blkCnt = (numPoints) >> 2;
-
- while (blkCnt > 0)
- {
- /* Initialze temporary scratch pointer as scratch1 */
- pScr1 = pScratch1;
-
- /* Clear Accumlators */
- acc0 = 0;
- acc1 = 0;
- acc2 = 0;
- acc3 = 0;
-
- /* Read two samples from scratch1 buffer */
- x10 = *pScr1++;
- x11 = *pScr1++;
-
- /* Read next two samples from scratch1 buffer */
- x20 = *pScr1++;
- x21 = *pScr1++;
-
- tapCnt = (srcBLen) >> 2U;
-
- while (tapCnt > 0U)
- {
-
- /* Read two samples from smaller buffer */
- y10 = *pIn2;
- y11 = *(pIn2 + 1U);
-
- /* multiply and accumlate */
- acc0 += (q31_t) x10 *y10;
- acc0 += (q31_t) x11 *y11;
- acc2 += (q31_t) x20 *y10;
- acc2 += (q31_t) x21 *y11;
-
- /* multiply and accumlate */
- acc1 += (q31_t) x11 *y10;
- acc1 += (q31_t) x20 *y11;
-
- /* Read next two samples from scratch1 buffer */
- x10 = *pScr1;
- x11 = *(pScr1 + 1U);
-
- /* multiply and accumlate */
- acc3 += (q31_t) x21 *y10;
- acc3 += (q31_t) x10 *y11;
-
- /* Read next two samples from scratch2 buffer */
- y10 = *(pIn2 + 2U);
- y11 = *(pIn2 + 3U);
-
- /* multiply and accumlate */
- acc0 += (q31_t) x20 *y10;
- acc0 += (q31_t) x21 *y11;
- acc2 += (q31_t) x10 *y10;
- acc2 += (q31_t) x11 *y11;
- acc1 += (q31_t) x21 *y10;
- acc1 += (q31_t) x10 *y11;
-
- /* Read next two samples from scratch1 buffer */
- x20 = *(pScr1 + 2);
- x21 = *(pScr1 + 3);
-
- /* multiply and accumlate */
- acc3 += (q31_t) x11 *y10;
- acc3 += (q31_t) x20 *y11;
-
- /* update scratch pointers */
- pIn2 += 4U;
- pScr1 += 4U;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Update scratch pointer for remaining samples of smaller length sequence */
- pScr1 -= 4U;
-
- /* apply same above for remaining samples of smaller length sequence */
- tapCnt = (srcBLen) & 3U;
-
- while (tapCnt > 0U)
- {
- /* accumlate the results */
- acc0 += (*pScr1++ * *pIn2);
- acc1 += (*pScr1++ * *pIn2);
- acc2 += (*pScr1++ * *pIn2);
- acc3 += (*pScr1++ * *pIn2++);
-
- pScr1 -= 3U;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- blkCnt--;
-
-
- /* Store the results in the accumulators in the destination buffer. */
- *pOut++ = __SSAT((acc0 >> 15), 16);
- *pOut++ = __SSAT((acc1 >> 15), 16);
- *pOut++ = __SSAT((acc2 >> 15), 16);
- *pOut++ = __SSAT((acc3 >> 15), 16);
-
- /* Initialization of inputB pointer */
- pIn2 = py;
-
- pScratch1 += 4U;
-
- }
-
-
- blkCnt = numPoints & 0x3;
-
- /* Calculate convolution for remaining samples of Bigger length sequence */
- while (blkCnt > 0)
- {
- /* Initialze temporary scratch pointer as scratch1 */
- pScr1 = pScratch1;
-
- /* Clear Accumlators */
- acc0 = 0;
-
- tapCnt = (srcBLen) >> 1U;
-
- while (tapCnt > 0U)
- {
-
- /* Read next two samples from scratch1 buffer */
- x10 = *pScr1++;
- x11 = *pScr1++;
-
- /* Read two samples from smaller buffer */
- y10 = *pIn2++;
- y11 = *pIn2++;
-
- /* multiply and accumlate */
- acc0 += (q31_t) x10 *y10;
- acc0 += (q31_t) x11 *y11;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- tapCnt = (srcBLen) & 1U;
-
- /* apply same above for remaining samples of smaller length sequence */
- while (tapCnt > 0U)
- {
-
- /* accumlate the results */
- acc0 += (*pScr1++ * *pIn2++);
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- blkCnt--;
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
- /* Initialization of inputB pointer */
- pIn2 = py;
-
- pScratch1 += 1U;
-
- }
-
- /* set status as ARM_MATH_SUCCESS */
- status = ARM_MATH_SUCCESS;
-
- }
/* Return to application */
return (status);
}
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
/**
- * @} end of PartialConv group
+ @} end of PartialConv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
index 5097257..f6b7bed 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
@@ -3,13 +3,13 @@
* Title: arm_conv_partial_fast_q15.c
* Description: Fast Q15 Partial convolution
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,51 +29,50 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup PartialConv
- * @{
+ @addtogroup PartialConv
+ @{
*/
/**
- * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * See <code>arm_conv_partial_q15()</code> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+ @brief Partial convolution of Q15 sequences (fast version).
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written
+ @param[in] firstIndex is the first output sample to start with
+ @param[in] numPoints is the number of output points to be computed
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+ @remark
+ Refer to \ref arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
*/
-
arm_status arm_conv_partial_fast_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints)
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints)
{
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *pOut = pDst; /* output pointer */
- q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- q15_t *pSrc1, *pSrc2; /* Intermediate pointers */
- q31_t x0, x1, x2, x3, c0;
- uint32_t j, k, count, check, blkCnt;
- int32_t blockSize1, blockSize2, blockSize3; /* loop counters */
- arm_status status; /* status of Partial convolution */
+ const q15_t *pIn1; /* InputA pointer */
+ const q15_t *pIn2; /* InputB pointer */
+ q15_t *pOut = pDst; /* Output pointer */
+ q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */
+ const q15_t *px; /* Intermediate inputA pointer */
+ const q15_t *py; /* Intermediate inputB pointer */
+ const q15_t *pSrc1, *pSrc2; /* Intermediate pointers */
+ q31_t x0, x1, x2, x3, c0; /* Temporary input variables */
+ uint32_t j, k, count, blkCnt, check;
+ int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ arm_status status; /* Status of Partial convolution */
/* Check for range of output samples to be calculated */
if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -83,11 +82,10 @@
}
else
{
-
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
/* So srcBLen is always considered as shorter or equal to srcALen */
- if (srcALen >=srcBLen)
+ if (srcALen >= srcBLen)
{
/* Initialization of inputA pointer */
pIn1 = pSrcA;
@@ -114,11 +112,9 @@
check = firstIndex + numPoints;
blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
- blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
- blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :
- (int32_t) numPoints) : 0;
- blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
- (int32_t) firstIndex);
+ blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+ blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+ blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
/* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
@@ -180,7 +176,7 @@
/* Perform the multiply-accumulates */
sum = __SMLAD(*px++, *py--, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -191,10 +187,10 @@
py = ++pSrc2;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -213,25 +209,25 @@
k = count >> 2U;
/* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+ a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
- sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
/* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
- sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
/* For the next MAC operations, the pointer py is used without SIMD
- * So, py is incremented by 1 */
+ So, py is incremented by 1 */
py = py + 1U;
/* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ No loop unrolling is used. */
k = count % 0x4U;
while (k > 0U)
@@ -239,7 +235,7 @@
/* Perform the multiply-accumulates */
sum = __SMLAD(*px++, *py--, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -250,10 +246,10 @@
py = ++pSrc2 - 1U;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -285,22 +281,21 @@
/* count is the index by which the pointer pIn1 to be incremented */
count = 0U;
-
- /* --------------------
+ /* -------------------
* Stage2 process
- * -------------------*/
+ * ------------------*/
/* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
* So, to loop unroll over blockSize2,
* srcBLen should be greater than or equal to 4 */
if (srcBLen >= 4U)
{
- /* Loop unroll over blockSize2, by 4 */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = ((uint32_t) blockSize2 >> 2U);
while (blkCnt > 0U)
{
- py = py - 1U;
+ py = py - 1U;
/* Set all accumulators to zero */
acc0 = 0;
@@ -310,10 +305,10 @@
/* read x[0], x[1] samples */
- x0 = *__SIMD32(px);
+ x0 = read_q15x2 ((q15_t *) px);
/* read x[1], x[2] samples */
- x1 = _SIMD32_OFFSET(px+1);
- px+= 2U;
+ x1 = read_q15x2 ((q15_t *) px + 1);
+ px += 2U;
/* Apply loop unrolling and compute 4 MACs simultaneously. */
@@ -325,7 +320,7 @@
{
/* Read the last two inputB samples using SIMD:
* y[srcBLen - 1] and y[srcBLen - 2] */
- c0 = *__SIMD32(py)--;
+ c0 = read_q15x2_da ((q15_t **) &py);
/* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
acc0 = __SMLADX(x0, c0, acc0);
@@ -334,10 +329,10 @@
acc1 = __SMLADX(x1, c0, acc1);
/* Read x[2], x[3] */
- x2 = *__SIMD32(px);
+ x2 = read_q15x2 ((q15_t *) px);
/* Read x[3], x[4] */
- x3 = _SIMD32_OFFSET(px+1);
+ x3 = read_q15x2 ((q15_t *) px + 1);
/* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
acc2 = __SMLADX(x2, c0, acc2);
@@ -346,7 +341,7 @@
acc3 = __SMLADX(x3, c0, acc3);
/* Read y[srcBLen - 3] and y[srcBLen - 4] */
- c0 = *__SIMD32(py)--;
+ c0 = read_q15x2_da ((q15_t **) &py);
/* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
acc0 = __SMLADX(x2, c0, acc0);
@@ -355,11 +350,11 @@
acc1 = __SMLADX(x3, c0, acc1);
/* Read x[4], x[5] */
- x0 = _SIMD32_OFFSET(px+2);
+ x0 = read_q15x2 ((q15_t *) px + 2);
/* Read x[5], x[6] */
- x1 = _SIMD32_OFFSET(px+3);
- px += 4U;
+ x1 = read_q15x2 ((q15_t *) px + 3);
+ px += 4U;
/* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
acc2 = __SMLADX(x0, c0, acc2);
@@ -370,33 +365,29 @@
} while (--k);
/* For the next MAC operations, SIMD is not used
- * So, the 16 bit pointer if inputB, py is updated */
+ So, the 16 bit pointer if inputB, py is updated */
/* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ No loop unrolling is used. */
k = srcBLen % 0x4U;
if (k == 1U)
{
/* Read y[srcBLen - 5] */
- c0 = *(py+1);
+ c0 = *(py + 1);
#ifdef ARM_MATH_BIG_ENDIAN
-
- c0 = c0 << 16U;
-
+ c0 = c0 << 16U;
#else
-
- c0 = c0 & 0x0000FFFF;
-
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+ c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
/* Read x[7] */
- x3 = *__SIMD32(px);
- px++;
+ x3 = read_q15x2 ((q15_t *) px);
+ px++;
- /* Perform the multiply-accumulates */
- acc0 = __SMLAD(x0, c0, acc0);
- acc1 = __SMLAD(x1, c0, acc1);
+ /* Perform the multiply-accumulate */
+ acc0 = __SMLAD (x0, c0, acc0);
+ acc1 = __SMLAD (x1, c0, acc1);
acc2 = __SMLADX(x1, c0, acc2);
acc3 = __SMLADX(x3, c0, acc3);
}
@@ -404,16 +395,16 @@
if (k == 2U)
{
/* Read y[srcBLen - 5], y[srcBLen - 6] */
- c0 = _SIMD32_OFFSET(py);
+ c0 = read_q15x2 ((q15_t *) py);
/* Read x[7], x[8] */
- x3 = *__SIMD32(px);
+ x3 = read_q15x2 ((q15_t *) px);
- /* Read x[9] */
- x2 = _SIMD32_OFFSET(px+1);
- px += 2U;
+ /* Read x[9] */
+ x2 = read_q15x2 ((q15_t *) px + 1);
+ px += 2U;
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
acc0 = __SMLADX(x0, c0, acc0);
acc1 = __SMLADX(x1, c0, acc1);
acc2 = __SMLADX(x3, c0, acc2);
@@ -423,52 +414,46 @@
if (k == 3U)
{
/* Read y[srcBLen - 5], y[srcBLen - 6] */
- c0 = _SIMD32_OFFSET(py);
+ c0 = read_q15x2 ((q15_t *) py);
/* Read x[7], x[8] */
- x3 = *__SIMD32(px);
+ x3 = read_q15x2 ((q15_t *) px);
/* Read x[9] */
- x2 = _SIMD32_OFFSET(px+1);
+ x2 = read_q15x2 ((q15_t *) px + 1);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
acc0 = __SMLADX(x0, c0, acc0);
acc1 = __SMLADX(x1, c0, acc1);
acc2 = __SMLADX(x3, c0, acc2);
acc3 = __SMLADX(x2, c0, acc3);
- c0 = *(py-1);
+ c0 = *(py-1);
#ifdef ARM_MATH_BIG_ENDIAN
-
- c0 = c0 << 16U;
+ c0 = c0 << 16U;
#else
-
- c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+ c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
/* Read x[10] */
- x3 = _SIMD32_OFFSET(px+2);
- px += 3U;
+ x3 = read_q15x2 ((q15_t *) px + 2);
+ px += 3U;
/* Perform the multiply-accumulates */
acc0 = __SMLADX(x1, c0, acc0);
- acc1 = __SMLAD(x2, c0, acc1);
+ acc1 = __SMLAD (x2, c0, acc1);
acc2 = __SMLADX(x2, c0, acc2);
acc3 = __SMLADX(x3, c0, acc3);
}
/* Store the results in the accumulators in the destination buffer. */
#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pOut)++ = __PKHBT(acc0 >> 15, acc1 >> 15, 16);
- *__SIMD32(pOut)++ = __PKHBT(acc2 >> 15, acc3 >> 15, 16);
-
+ write_q15x2_ia (&pOut, __PKHBT(acc0 >> 15, acc1 >> 15, 16));
+ write_q15x2_ia (&pOut, __PKHBT(acc2 >> 15, acc3 >> 15, 16));
#else
-
- *__SIMD32(pOut)++ = __PKHBT(acc1 >> 15, acc0 >> 15, 16);
- *__SIMD32(pOut)++ = __PKHBT(acc3 >> 15, acc2 >> 15, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ write_q15x2_ia (&pOut, __PKHBT(acc1 >> 15, acc0 >> 15, 16));
+ write_q15x2_ia (&pOut, __PKHBT(acc3 >> 15, acc2 >> 15, 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Increment the pointer pIn1 index, count by 4 */
count += 4U;
@@ -482,7 +467,7 @@
}
/* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ No loop unrolling is used. */
blkCnt = (uint32_t) blockSize2 % 0x4U;
while (blkCnt > 0U)
@@ -494,16 +479,16 @@
k = srcBLen >> 2U;
/* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+ a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
+ sum += ((q31_t) *px++ * *py--);
+ sum += ((q31_t) *px++ * *py--);
+ sum += ((q31_t) *px++ * *py--);
+ sum += ((q31_t) *px++ * *py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -514,7 +499,7 @@
while (k > 0U)
{
/* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
+ sum += ((q31_t) *px++ * *py--);
/* Decrement the loop counter */
k--;
@@ -530,7 +515,7 @@
px = pSrc1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -551,7 +536,7 @@
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += ((q31_t) * px++ * *py--);
+ sum += ((q31_t) *px++ * *py--);
/* Decrement the loop counter */
k--;
@@ -622,21 +607,21 @@
{
/* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
* with y[srcBLen - 1], y[srcBLen - 2] respectively */
- sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
/* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
* with y[srcBLen - 3], y[srcBLen - 4] respectively */
- sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
/* For the next MAC operations, the pointer py is used without SIMD
- * So, py is incremented by 1 */
+ So, py is incremented by 1 */
py = py + 1U;
/* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ No loop unrolling is used. */
k = count % 0x4U;
while (k > 0U)
@@ -701,782 +686,15 @@
blockSize3--;
}
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
-#else
-
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *pOut = pDst; /* output pointer */
- q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- q15_t *pSrc1, *pSrc2; /* Intermediate pointers */
- q31_t x0, x1, x2, x3, c0;
- uint32_t j, k, count, check, blkCnt;
- int32_t blockSize1, blockSize2, blockSize3; /* loop counters */
- arm_status status; /* status of Partial convolution */
- q15_t a, b;
-
- /* Check for range of output samples to be calculated */
- if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
- {
- /* Set status as ARM_MATH_ARGUMENT_ERROR */
- status = ARM_MATH_ARGUMENT_ERROR;
- }
- else
- {
-
- /* The algorithm implementation is based on the lengths of the inputs. */
- /* srcB is always made to slide across srcA. */
- /* So srcBLen is always considered as shorter or equal to srcALen */
- if (srcALen >=srcBLen)
- {
- /* Initialization of inputA pointer */
- pIn1 = pSrcA;
-
- /* Initialization of inputB pointer */
- pIn2 = pSrcB;
- }
- else
- {
- /* Initialization of inputA pointer */
- pIn1 = pSrcB;
-
- /* Initialization of inputB pointer */
- pIn2 = pSrcA;
-
- /* srcBLen is always considered as shorter or equal to srcALen */
- j = srcBLen;
- srcBLen = srcALen;
- srcALen = j;
- }
-
- /* Conditions to check which loopCounter holds
- * the first and last indices of the output samples to be calculated. */
- check = firstIndex + numPoints;
- blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
- blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
- blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
- blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :
- (int32_t) numPoints) : 0;
- blockSize2 = ((int32_t) check - blockSize3) -
- (blockSize1 + (int32_t) firstIndex);
- blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
- /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
- /* The function is internally
- * divided into three stages according to the number of multiplications that has to be
- * taken place between inputA samples and inputB samples. In the first stage of the
- * algorithm, the multiplications increase by one for every iteration.
- * In the second stage of the algorithm, srcBLen number of multiplications are done.
- * In the third stage of the algorithm, the multiplications decrease by one
- * for every iteration. */
-
- /* Set the output pointer to point to the firstIndex
- * of the output sample to be calculated. */
- pOut = pDst + firstIndex;
-
- /* --------------------------
- * Initializations of stage1
- * -------------------------*/
-
- /* sum = x[0] * y[0]
- * sum = x[0] * y[1] + x[1] * y[0]
- * ....
- * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
- */
-
- /* In this stage the MAC operations are increased by 1 for every iteration.
- The count variable holds the number of MAC operations performed.
- Since the partial convolution starts from firstIndex
- Number of Macs to be performed is firstIndex + 1 */
- count = 1U + firstIndex;
-
- /* Working pointer of inputA */
- px = pIn1;
-
- /* Working pointer of inputB */
- pSrc2 = pIn2 + firstIndex;
- py = pSrc2;
-
- /* ------------------------
- * Stage1 process
- * ----------------------*/
-
- /* For loop unrolling by 4, this stage is divided into two. */
- /* First part of this stage computes the MAC operations less than 4 */
- /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
- /* The first part of the stage starts here */
- while ((count < 4U) && (blockSize1 > 0))
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* Loop over number of MAC operations between
- * inputA samples and inputB samples */
- k = count;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q15_t) (sum >> 15);
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- py = ++pSrc2;
- px = pIn1;
-
- /* Increment the MAC count */
- count++;
-
- /* Decrement the loop counter */
- blockSize1--;
- }
-
- /* The second part of the stage starts here */
- /* The internal loop, over count, is unrolled by 4 */
- /* To, read the last two inputB samples using SIMD:
- * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
- py = py - 1;
-
- while (blockSize1 > 0)
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = count >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
- py++;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
- k = count % 0x4U;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q15_t) (sum >> 15);
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- py = ++pSrc2 - 1U;
- px = pIn1;
-
- /* Increment the MAC count */
- count++;
-
- /* Decrement the loop counter */
- blockSize1--;
- }
-
- /* --------------------------
- * Initializations of stage2
- * ------------------------*/
-
- /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
- * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
- * ....
- * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
- */
-
- /* Working pointer of inputA */
- if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
- {
- pSrc1 = pIn1 + firstIndex - srcBLen + 1;
- }
- else
- {
- pSrc1 = pIn1;
- }
- px = pSrc1;
-
- /* Working pointer of inputB */
- pSrc2 = pIn2 + (srcBLen - 1U);
- py = pSrc2;
-
- /* count is the index by which the pointer pIn1 to be incremented */
- count = 0U;
-
-
- /* --------------------
- * Stage2 process
- * -------------------*/
-
- /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
- * So, to loop unroll over blockSize2,
- * srcBLen should be greater than or equal to 4 */
- if (srcBLen >= 4U)
- {
- /* Loop unroll over blockSize2, by 4 */
- blkCnt = ((uint32_t) blockSize2 >> 2U);
-
- while (blkCnt > 0U)
- {
- py = py - 1U;
-
- /* Set all accumulators to zero */
- acc0 = 0;
- acc1 = 0;
- acc2 = 0;
- acc3 = 0;
-
- /* read x[0], x[1] samples */
- a = *px++;
- b = *px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x0 = __PKHBT(a, b, 16);
- a = *px;
- x1 = __PKHBT(b, a, 16);
-
-#else
-
- x0 = __PKHBT(b, a, 16);
- a = *px;
- x1 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = srcBLen >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
- do
- {
- /* Read the last two inputB samples using SIMD:
- * y[srcBLen - 1] and y[srcBLen - 2] */
- a = *py;
- b = *(py+1);
- py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- c0 = __PKHBT(a, b, 16);
-
-#else
-
- c0 = __PKHBT(b, a, 16);;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
- acc0 = __SMLADX(x0, c0, acc0);
-
- /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
- acc1 = __SMLADX(x1, c0, acc1);
-
- a = *px;
- b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x2 = __PKHBT(a, b, 16);
- a = *(px + 2);
- x3 = __PKHBT(b, a, 16);
-
-#else
-
- x2 = __PKHBT(b, a, 16);
- a = *(px + 2);
- x3 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
- acc2 = __SMLADX(x2, c0, acc2);
-
- /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
- acc3 = __SMLADX(x3, c0, acc3);
-
- /* Read y[srcBLen - 3] and y[srcBLen - 4] */
- a = *py;
- b = *(py+1);
- py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- c0 = __PKHBT(a, b, 16);
-
-#else
-
- c0 = __PKHBT(b, a, 16);;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
- acc0 = __SMLADX(x2, c0, acc0);
-
- /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
- acc1 = __SMLADX(x3, c0, acc1);
-
- /* Read x[4], x[5], x[6] */
- a = *(px + 2);
- b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x0 = __PKHBT(a, b, 16);
- a = *(px + 4);
- x1 = __PKHBT(b, a, 16);
-
-#else
-
- x0 = __PKHBT(b, a, 16);
- a = *(px + 4);
- x1 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- px += 4U;
-
- /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
- acc2 = __SMLADX(x0, c0, acc2);
-
- /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
- acc3 = __SMLADX(x1, c0, acc3);
-
- } while (--k);
-
- /* For the next MAC operations, SIMD is not used
- * So, the 16 bit pointer if inputB, py is updated */
-
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
- k = srcBLen % 0x4U;
-
- if (k == 1U)
- {
- /* Read y[srcBLen - 5] */
- c0 = *(py+1);
-
-#ifdef ARM_MATH_BIG_ENDIAN
-
- c0 = c0 << 16U;
-
-#else
-
- c0 = c0 & 0x0000FFFF;
-
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
-
- /* Read x[7] */
- a = *px;
- b = *(px+1);
- px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x3 = __PKHBT(a, b, 16);
-
-#else
-
- x3 = __PKHBT(b, a, 16);;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-
- /* Perform the multiply-accumulates */
- acc0 = __SMLAD(x0, c0, acc0);
- acc1 = __SMLAD(x1, c0, acc1);
- acc2 = __SMLADX(x1, c0, acc2);
- acc3 = __SMLADX(x3, c0, acc3);
- }
-
- if (k == 2U)
- {
- /* Read y[srcBLen - 5], y[srcBLen - 6] */
- a = *py;
- b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- c0 = __PKHBT(a, b, 16);
-
-#else
-
- c0 = __PKHBT(b, a, 16);;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Read x[7], x[8], x[9] */
- a = *px;
- b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x3 = __PKHBT(a, b, 16);
- a = *(px + 2);
- x2 = __PKHBT(b, a, 16);
-
-#else
-
- x3 = __PKHBT(b, a, 16);
- a = *(px + 2);
- x2 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- px += 2U;
-
- /* Perform the multiply-accumulates */
- acc0 = __SMLADX(x0, c0, acc0);
- acc1 = __SMLADX(x1, c0, acc1);
- acc2 = __SMLADX(x3, c0, acc2);
- acc3 = __SMLADX(x2, c0, acc3);
- }
-
- if (k == 3U)
- {
- /* Read y[srcBLen - 5], y[srcBLen - 6] */
- a = *py;
- b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- c0 = __PKHBT(a, b, 16);
-
-#else
-
- c0 = __PKHBT(b, a, 16);;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Read x[7], x[8], x[9] */
- a = *px;
- b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x3 = __PKHBT(a, b, 16);
- a = *(px + 2);
- x2 = __PKHBT(b, a, 16);
-
-#else
-
- x3 = __PKHBT(b, a, 16);
- a = *(px + 2);
- x2 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Perform the multiply-accumulates */
- acc0 = __SMLADX(x0, c0, acc0);
- acc1 = __SMLADX(x1, c0, acc1);
- acc2 = __SMLADX(x3, c0, acc2);
- acc3 = __SMLADX(x2, c0, acc3);
-
- /* Read y[srcBLen - 7] */
- c0 = *(py-1);
-#ifdef ARM_MATH_BIG_ENDIAN
-
- c0 = c0 << 16U;
-#else
-
- c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
-
- /* Read x[10] */
- a = *(px+2);
- b = *(px+3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x3 = __PKHBT(a, b, 16);
-
-#else
-
- x3 = __PKHBT(b, a, 16);;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- px += 3U;
-
- /* Perform the multiply-accumulates */
- acc0 = __SMLADX(x1, c0, acc0);
- acc1 = __SMLAD(x2, c0, acc1);
- acc2 = __SMLADX(x2, c0, acc2);
- acc3 = __SMLADX(x3, c0, acc3);
- }
-
- /* Store the results in the accumulators in the destination buffer. */
- *pOut++ = (q15_t)(acc0 >> 15);
- *pOut++ = (q15_t)(acc1 >> 15);
- *pOut++ = (q15_t)(acc2 >> 15);
- *pOut++ = (q15_t)(acc3 >> 15);
-
- /* Increment the pointer pIn1 index, count by 4 */
- count += 4U;
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = pSrc1 + count;
- py = pSrc2;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = (uint32_t) blockSize2 % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = srcBLen >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
- k = srcBLen % 0x4U;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q15_t) (sum >> 15);
-
- /* Increment the pointer pIn1 index, count by 1 */
- count++;
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = pSrc1 + count;
- py = pSrc2;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
- else
- {
- /* If the srcBLen is not a multiple of 4,
- * the blockSize2 loop cannot be unrolled by 4 */
- blkCnt = (uint32_t) blockSize2;
-
- while (blkCnt > 0U)
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* srcBLen number of MACS should be performed */
- k = srcBLen;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulate */
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q15_t) (sum >> 15);
-
- /* Increment the MAC count */
- count++;
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = pSrc1 + count;
- py = pSrc2;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
-
-
- /* --------------------------
- * Initializations of stage3
- * -------------------------*/
-
- /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
- * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
- * ....
- * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
- * sum += x[srcALen-1] * y[srcBLen-1]
- */
-
- /* In this stage the MAC operations are decreased by 1 for every iteration.
- The count variable holds the number of MAC operations performed */
- count = srcBLen - 1U;
-
- /* Working pointer of inputA */
- pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
- px = pSrc1;
-
- /* Working pointer of inputB */
- pSrc2 = pIn2 + (srcBLen - 1U);
- pIn2 = pSrc2 - 1U;
- py = pIn2;
-
- /* -------------------
- * Stage3 process
- * ------------------*/
-
- /* For loop unrolling by 4, this stage is divided into two. */
- /* First part of this stage computes the MAC operations greater than 4 */
- /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
- /* The first part of the stage starts here */
- j = count >> 2U;
-
- while ((j > 0U) && (blockSize3 > 0))
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = count >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
- py++;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- sum += ((q31_t) * px++ * *py--);
- /* Decrement the loop counter */
- k--;
- }
-
-
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
- k = count % 0x4U;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q15_t) (sum >> 15);
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = ++pSrc1;
- py = pIn2;
-
- /* Decrement the MAC count */
- count--;
-
- /* Decrement the loop counter */
- blockSize3--;
-
- j--;
- }
-
- /* The second part of the stage starts here */
- /* SIMD is not used for the next MAC operations,
- * so pointer py is updated to read only one sample at a time */
- py = py + 1U;
-
- while (blockSize3 > 0)
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = count;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- /* sum += x[srcALen-1] * y[srcBLen-1] */
- sum += ((q31_t) * px++ * *py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q15_t) (sum >> 15);
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = ++pSrc1;
- py = pSrc2;
-
- /* Decrement the MAC count */
- count--;
-
- /* Decrement the loop counter */
- blockSize3--;
- }
-
- /* set status as ARM_MATH_SUCCESS */
- status = ARM_MATH_SUCCESS;
- }
-
- /* Return to application */
- return (status);
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
}
/**
- * @} end of PartialConv group
+ @} end of PartialConv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
index 8487276..64e18ff 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
@@ -3,13 +3,13 @@
* Title: arm_conv_partial_fast_q31.c
* Description: Fast Q31 Partial convolution
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,50 +29,55 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup PartialConv
- * @{
+ @addtogroup PartialConv
+ @{
*/
/**
- * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * \par
- * See <code>arm_conv_partial_q31()</code> for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
+ @brief Partial convolution of Q31 sequences (fast version).
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written
+ @param[in] firstIndex is the first output sample to start with
+ @param[in] numPoints is the number of output points to be computed
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+ @remark
+ Refer to \ref arm_conv_partial_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
*/
arm_status arm_conv_partial_fast_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints)
+ const q31_t * pSrcA,
+ uint32_t srcALen,
+ const q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints)
{
- q31_t *pIn1; /* inputA pointer */
- q31_t *pIn2; /* inputB pointer */
- q31_t *pOut = pDst; /* output pointer */
- q31_t *px; /* Intermediate inputA pointer */
- q31_t *py; /* Intermediate inputB pointer */
- q31_t *pSrc1, *pSrc2; /* Intermediate pointers */
- q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */
- q31_t x0, x1, x2, x3, c0;
- uint32_t j, k, count, check, blkCnt;
- int32_t blockSize1, blockSize2, blockSize3; /* loop counters */
- arm_status status; /* status of Partial convolution */
+ const q31_t *pIn1; /* InputA pointer */
+ const q31_t *pIn2; /* InputB pointer */
+ q31_t *pOut = pDst; /* Output pointer */
+ const q31_t *px; /* Intermediate inputA pointer */
+ const q31_t *py; /* Intermediate inputB pointer */
+ const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */
+ q31_t sum; /* Accumulators */
+ uint32_t j, k, count, check, blkCnt;
+ int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ arm_status status; /* Status of Partial convolution */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t acc0, acc1, acc2, acc3; /* Accumulators */
+ q31_t x0, x1, x2, x3, c0;
+#endif
/* Check for range of output samples to be calculated */
if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -82,7 +87,6 @@
}
else
{
-
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
/* So srcBLen is always considered as shorter or equal to srcALen */
@@ -113,11 +117,9 @@
check = firstIndex + numPoints;
blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
- blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
- blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :
- (int32_t) numPoints) : 0;
- blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
- (int32_t) firstIndex);
+ blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+ blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+ blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
/* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
@@ -160,50 +162,56 @@
* Stage1 process
* ----------------------*/
- /* The first loop starts here */
- while (blockSize1 > 0)
+ /* The first stage starts here */
+ while (blockSize1 > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* x[0] * y[srcBLen - 1] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
/* x[1] * y[srcBLen - 2] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
/* x[2] * y[srcBLen - 3] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
/* x[3] * y[srcBLen - 4] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize k with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -214,10 +222,10 @@
py = ++pSrc2;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -258,7 +266,9 @@
* srcBLen should be greater than or equal to 4 */
if (srcBLen >= 4U)
{
- /* Loop unroll over blockSize2 */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = ((uint32_t) blockSize2 >> 2U);
while (blkCnt > 0U)
@@ -283,26 +293,21 @@
{
/* Read y[srcBLen - 1] sample */
c0 = *py--;
-
/* Read x[3] sample */
x3 = *px++;
/* Perform the multiply-accumulate */
/* acc0 += x[0] * y[srcBLen - 1] */
acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
/* acc1 += x[1] * y[srcBLen - 1] */
acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
/* acc2 += x[2] * y[srcBLen - 1] */
acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-
/* acc3 += x[3] * y[srcBLen - 1] */
acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
/* Read y[srcBLen - 2] sample */
c0 = *py--;
-
/* Read x[4] sample */
x0 = *px++;
@@ -318,7 +323,6 @@
/* Read y[srcBLen - 3] sample */
c0 = *py--;
-
/* Read x[5] sample */
x1 = *px++;
@@ -334,7 +338,6 @@
/* Read y[srcBLen - 4] sample */
c0 = *py--;
-
/* Read x[6] sample */
x2 = *px++;
@@ -348,7 +351,6 @@
/* acc3 += x[6] * y[srcBLen - 4] */
acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
-
} while (--k);
/* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
@@ -359,7 +361,6 @@
{
/* Read y[srcBLen - 5] sample */
c0 = *py--;
-
/* Read x[7] sample */
x3 = *px++;
@@ -395,24 +396,30 @@
px = pSrc1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (uint32_t) blockSize2 % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = srcBLen >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* Perform the multiply-accumulates */
@@ -425,35 +432,41 @@
sum = (q31_t) ((((q63_t) sum << 32) +
((q63_t) * px++ * (*py--))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = srcBLen % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* Perform the multiply-accumulate */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
/* Store the result in the accumulator in the destination buffer. */
*pOut++ = sum << 1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pSrc1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -475,9 +488,9 @@
{
/* Perform the multiply-accumulate */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -524,50 +537,56 @@
* Stage3 process
* ------------------*/
- while (blockSize3 > 0)
+ while (blockSize3 > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
/* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
/* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
/* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* Perform the multiply-accumulates */
/* sum += x[srcALen-1] * y[srcBLen-1] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py--))) >> 32);
+ ((q63_t) *px++ * (*py--))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -578,15 +597,14 @@
px = ++pSrc1;
py = pSrc2;
- /* Decrement the MAC count */
+ /* Decrement MAC count */
count--;
/* Decrement the loop counter */
blockSize3--;
-
}
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
@@ -596,5 +614,5 @@
}
/**
- * @} end of PartialConv group
+ @} end of PartialConv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
index 44e368e..872e3bf 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
@@ -3,13 +3,13 @@
* Title: arm_conv_partial_opt_q15.c
* Description: Partial convolution of Q15 sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,63 +29,64 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup PartialConv
- * @{
+ @addtogroup PartialConv
+ @{
*/
/**
- * @brief Partial convolution of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @param[in] *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * \par Restrictions
- * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- * In this case input, output, state buffers should be aligned by 32-bit
- *
- * Refer to <code>arm_conv_partial_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
- *
- *
- */
+ @brief Partial convolution of Q15 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written
+ @param[in] firstIndex is the first output sample to start with
+ @param[in] numPoints is the number of output points to be computed
+ @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
-#ifndef UNALIGNED_SUPPORT_DISABLE
+ @remark
+ Refer to \ref arm_conv_partial_fast_q15() for a faster but less precise version of this function.
+ */
arm_status arm_conv_partial_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2)
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints,
+ q15_t * pScratch1,
+ q15_t * pScratch2)
{
- q15_t *pOut = pDst; /* output pointer */
- q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */
- q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */
- q63_t acc0, acc1, acc2, acc3; /* Accumulator */
- q31_t x1, x2, x3; /* Temporary variables to hold state and coefficient values */
- q31_t y1, y2; /* State variables */
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- uint32_t j, k, blkCnt; /* loop counter */
- arm_status status; /* Status variable */
- uint32_t tapCnt; /* loop count */
+ q15_t *pOut = pDst; /* Output pointer */
+ q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */
+ q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */
+ q63_t acc0; /* Accumulator */
+ q31_t x1; /* Temporary variables to hold state and coefficient values */
+ q31_t y1; /* State variables */
+ const q15_t *pIn1; /* InputA pointer */
+ const q15_t *pIn2; /* InputB pointer */
+ const q15_t *px; /* Intermediate inputA pointer */
+ q15_t *py; /* Intermediate inputB pointer */
+ uint32_t j, k, blkCnt; /* Loop counter */
+ uint32_t tapCnt; /* Loop count */
+ arm_status status; /* Status variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+ q63_t acc1, acc2, acc3; /* Accumulator */
+ q31_t x2, x3; /* Temporary variables to hold state and coefficient values */
+ q31_t y2; /* State variables */
+#endif
/* Check for range of output samples to be calculated */
if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -95,7 +96,6 @@
}
else
{
-
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
/* So srcBLen is always considered as shorter or equal to srcALen */
@@ -130,11 +130,12 @@
/* points to smaller length sequence */
px = pIn2;
- /* Apply loop unrolling and do 4 Copies simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = srcBLen >> 2U;
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
+ /* Copy smaller length input sequence in reverse order into second scratch buffer */
while (k > 0U)
{
/* copy second buffer in reversal manner */
@@ -143,26 +144,33 @@
*pScr2-- = *px++;
*pScr2-- = *px++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = srcBLen % 0x4U;
+#else
+
+ /* Initialize k with number of samples */
+ k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* copy second buffer in reversal manner for remaining samples */
*pScr2-- = *px++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
/* Initialze temporary scratch pointer */
pScr1 = pScratch1;
+ /* Assuming scratch1 buffer is aligned by 32-bit */
/* Fill (srcBLen - 1U) zeros in scratch buffer */
arm_fill_q15(0, pScr1, (srcBLen - 1U));
@@ -191,6 +199,10 @@
pOut = pDst + firstIndex;
/* Actual convolution process starts here */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = (numPoints) >> 2;
while (blkCnt > 0)
@@ -205,10 +217,10 @@
acc3 = 0;
/* Read two samples from scratch1 buffer */
- x1 = *__SIMD32(pScr1)++;
+ x1 = read_q15x2_ia (&pScr1);
/* Read next two samples from scratch1 buffer */
- x2 = *__SIMD32(pScr1)++;
+ x2 = read_q15x2_ia (&pScr1);
tapCnt = (srcBLen) >> 2U;
@@ -216,8 +228,8 @@
{
/* Read four samples from smaller buffer */
- y1 = _SIMD32_OFFSET(pIn2);
- y2 = _SIMD32_OFFSET(pIn2 + 2U);
+ y1 = read_q15x2_ia ((q15_t **) &pIn2);
+ y2 = read_q15x2_ia ((q15_t **) &pIn2);
/* multiply and accumlate */
acc0 = __SMLALD(x1, y1, acc0);
@@ -234,7 +246,7 @@
acc1 = __SMLALDX(x3, y1, acc1);
/* Read next two samples from scratch1 buffer */
- x1 = _SIMD32_OFFSET(pScr1);
+ x1 = read_q15x2_ia (&pScr1);
/* multiply and accumlate */
acc0 = __SMLALD(x2, y2, acc0);
@@ -250,7 +262,7 @@
acc3 = __SMLALDX(x3, y1, acc3);
acc1 = __SMLALDX(x3, y2, acc1);
- x2 = _SIMD32_OFFSET(pScr1 + 2U);
+ x2 = read_q15x2_ia (&pScr1);
#ifndef ARM_MATH_BIG_ENDIAN
x3 = __PKHBT(x2, x1, 0);
@@ -260,12 +272,7 @@
acc3 = __SMLALDX(x3, y2, acc3);
- /* update scratch pointers */
- pIn2 += 4U;
- pScr1 += 4U;
-
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -285,41 +292,37 @@
pScr1 -= 3U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
blkCnt--;
-
/* Store the results in the accumulators in the destination buffer. */
-
#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
#else
-
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Initialization of inputB pointer */
pIn2 = py;
pScratch1 += 4U;
-
}
-
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numPoints & 0x3;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = numPoints;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
/* Calculate convolution for remaining samples of Bigger length sequence */
while (blkCnt > 0)
{
@@ -333,12 +336,11 @@
while (tapCnt > 0U)
{
-
/* Read next two samples from scratch1 buffer */
- x1 = *__SIMD32(pScr1)++;
+ x1 = read_q15x2_ia (&pScr1);
/* Read two samples from smaller buffer */
- y1 = *__SIMD32(pIn2)++;
+ y1 = read_q15x2_ia ((q15_t **) &pIn2);
acc0 = __SMLALD(x1, y1, acc0);
@@ -351,17 +353,17 @@
/* apply same above for remaining samples of smaller length sequence */
while (tapCnt > 0U)
{
-
/* accumlate the results */
acc0 += (*pScr1++ * *pIn2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
blkCnt--;
- /* Store the result in the accumulator in the destination buffer. */
+ /* The result is in 2.30 format. Convert to 1.15 with saturation.
+ ** Then store the output in the destination buffer. */
*pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
/* Initialization of inputB pointer */
@@ -371,383 +373,14 @@
}
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
-
}
/* Return to application */
return (status);
}
-#else
-
-arm_status arm_conv_partial_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2)
-{
-
- q15_t *pOut = pDst; /* output pointer */
- q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */
- q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */
- q63_t acc0, acc1, acc2, acc3; /* Accumulator */
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- uint32_t j, k, blkCnt; /* loop counter */
- arm_status status; /* Status variable */
- uint32_t tapCnt; /* loop count */
- q15_t x10, x11, x20, x21; /* Temporary variables to hold srcA buffer */
- q15_t y10, y11; /* Temporary variables to hold srcB buffer */
-
-
- /* Check for range of output samples to be calculated */
- if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
- {
- /* Set status as ARM_MATH_ARGUMENT_ERROR */
- status = ARM_MATH_ARGUMENT_ERROR;
- }
- else
- {
-
- /* The algorithm implementation is based on the lengths of the inputs. */
- /* srcB is always made to slide across srcA. */
- /* So srcBLen is always considered as shorter or equal to srcALen */
- if (srcALen >= srcBLen)
- {
- /* Initialization of inputA pointer */
- pIn1 = pSrcA;
-
- /* Initialization of inputB pointer */
- pIn2 = pSrcB;
- }
- else
- {
- /* Initialization of inputA pointer */
- pIn1 = pSrcB;
-
- /* Initialization of inputB pointer */
- pIn2 = pSrcA;
-
- /* srcBLen is always considered as shorter or equal to srcALen */
- j = srcBLen;
- srcBLen = srcALen;
- srcALen = j;
- }
-
- /* Temporary pointer for scratch2 */
- py = pScratch2;
-
- /* pointer to take end of scratch2 buffer */
- pScr2 = pScratch2 + srcBLen - 1;
-
- /* points to smaller length sequence */
- px = pIn2;
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = srcBLen >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr2-- = *px++;
- *pScr2-- = *px++;
- *pScr2-- = *px++;
- *pScr2-- = *px++;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = srcBLen % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr2-- = *px++;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Initialze temporary scratch pointer */
- pScr1 = pScratch1;
-
- /* Fill (srcBLen - 1U) zeros in scratch buffer */
- arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
- /* Update temporary scratch pointer */
- pScr1 += (srcBLen - 1U);
-
- /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = srcALen >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr1++ = *pIn1++;
- *pScr1++ = *pIn1++;
- *pScr1++ = *pIn1++;
- *pScr1++ = *pIn1++;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = srcALen % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr1++ = *pIn1++;
-
- /* Decrement the loop counter */
- k--;
- }
-
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = (srcBLen - 1U) >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr1++ = 0;
- *pScr1++ = 0;
- *pScr1++ = 0;
- *pScr1++ = 0;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = (srcBLen - 1U) % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr1++ = 0;
-
- /* Decrement the loop counter */
- k--;
- }
-
-
- /* Initialization of pIn2 pointer */
- pIn2 = py;
-
- pScratch1 += firstIndex;
-
- pOut = pDst + firstIndex;
-
- /* Actual convolution process starts here */
- blkCnt = (numPoints) >> 2;
-
- while (blkCnt > 0)
- {
- /* Initialze temporary scratch pointer as scratch1 */
- pScr1 = pScratch1;
-
- /* Clear Accumlators */
- acc0 = 0;
- acc1 = 0;
- acc2 = 0;
- acc3 = 0;
-
- /* Read two samples from scratch1 buffer */
- x10 = *pScr1++;
- x11 = *pScr1++;
-
- /* Read next two samples from scratch1 buffer */
- x20 = *pScr1++;
- x21 = *pScr1++;
-
- tapCnt = (srcBLen) >> 2U;
-
- while (tapCnt > 0U)
- {
-
- /* Read two samples from smaller buffer */
- y10 = *pIn2;
- y11 = *(pIn2 + 1U);
-
- /* multiply and accumlate */
- acc0 += (q63_t) x10 *y10;
- acc0 += (q63_t) x11 *y11;
- acc2 += (q63_t) x20 *y10;
- acc2 += (q63_t) x21 *y11;
-
- /* multiply and accumlate */
- acc1 += (q63_t) x11 *y10;
- acc1 += (q63_t) x20 *y11;
-
- /* Read next two samples from scratch1 buffer */
- x10 = *pScr1;
- x11 = *(pScr1 + 1U);
-
- /* multiply and accumlate */
- acc3 += (q63_t) x21 *y10;
- acc3 += (q63_t) x10 *y11;
-
- /* Read next two samples from scratch2 buffer */
- y10 = *(pIn2 + 2U);
- y11 = *(pIn2 + 3U);
-
- /* multiply and accumlate */
- acc0 += (q63_t) x20 *y10;
- acc0 += (q63_t) x21 *y11;
- acc2 += (q63_t) x10 *y10;
- acc2 += (q63_t) x11 *y11;
- acc1 += (q63_t) x21 *y10;
- acc1 += (q63_t) x10 *y11;
-
- /* Read next two samples from scratch1 buffer */
- x20 = *(pScr1 + 2);
- x21 = *(pScr1 + 3);
-
- /* multiply and accumlate */
- acc3 += (q63_t) x11 *y10;
- acc3 += (q63_t) x20 *y11;
-
- /* update scratch pointers */
- pIn2 += 4U;
- pScr1 += 4U;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Update scratch pointer for remaining samples of smaller length sequence */
- pScr1 -= 4U;
-
- /* apply same above for remaining samples of smaller length sequence */
- tapCnt = (srcBLen) & 3U;
-
- while (tapCnt > 0U)
- {
- /* accumlate the results */
- acc0 += (*pScr1++ * *pIn2);
- acc1 += (*pScr1++ * *pIn2);
- acc2 += (*pScr1++ * *pIn2);
- acc3 += (*pScr1++ * *pIn2++);
-
- pScr1 -= 3U;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- blkCnt--;
-
-
- /* Store the results in the accumulators in the destination buffer. */
- *pOut++ = __SSAT((acc0 >> 15), 16);
- *pOut++ = __SSAT((acc1 >> 15), 16);
- *pOut++ = __SSAT((acc2 >> 15), 16);
- *pOut++ = __SSAT((acc3 >> 15), 16);
-
-
- /* Initialization of inputB pointer */
- pIn2 = py;
-
- pScratch1 += 4U;
-
- }
-
-
- blkCnt = numPoints & 0x3;
-
- /* Calculate convolution for remaining samples of Bigger length sequence */
- while (blkCnt > 0)
- {
- /* Initialze temporary scratch pointer as scratch1 */
- pScr1 = pScratch1;
-
- /* Clear Accumlators */
- acc0 = 0;
-
- tapCnt = (srcBLen) >> 1U;
-
- while (tapCnt > 0U)
- {
-
- /* Read next two samples from scratch1 buffer */
- x10 = *pScr1++;
- x11 = *pScr1++;
-
- /* Read two samples from smaller buffer */
- y10 = *pIn2++;
- y11 = *pIn2++;
-
- /* multiply and accumlate */
- acc0 += (q63_t) x10 *y10;
- acc0 += (q63_t) x11 *y11;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- tapCnt = (srcBLen) & 1U;
-
- /* apply same above for remaining samples of smaller length sequence */
- while (tapCnt > 0U)
- {
-
- /* accumlate the results */
- acc0 += (*pScr1++ * *pIn2++);
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- blkCnt--;
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-
- /* Initialization of inputB pointer */
- pIn2 = py;
-
- pScratch1 += 1U;
-
- }
-
- /* set status as ARM_MATH_SUCCESS */
- status = ARM_MATH_SUCCESS;
-
- }
-
- /* Return to application */
- return (status);
-}
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-
/**
- * @} end of PartialConv group
+ @} end of PartialConv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
index 00dbef1..2fd7d00 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
@@ -3,13 +3,13 @@
* Title: arm_conv_partial_opt_q7.c
* Description: Partial convolution of Q7 sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,61 +29,52 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup PartialConv
- * @{
+ @addtogroup PartialConv
+ @{
*/
/**
- * @brief Partial convolution of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * \par Restrictions
- * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- * In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
- *
- *
- *
+ @brief Partial convolution of Q7 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written
+ @param[in] firstIndex is the first output sample to start with
+ @param[in] numPoints is the number of output points to be computed
+ @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
*/
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
arm_status arm_conv_partial_opt_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2)
+ const q7_t * pSrcA,
+ uint32_t srcALen,
+ const q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints,
+ q15_t * pScratch1,
+ q15_t * pScratch2)
{
-
- q15_t *pScr2, *pScr1; /* Intermediate pointers for scratch pointers */
- q15_t x4; /* Temporary input variable */
- q7_t *pIn1, *pIn2; /* inputA and inputB pointer */
- uint32_t j, k, blkCnt, tapCnt; /* loop counter */
- q7_t *px; /* Temporary input1 pointer */
- q15_t *py; /* Temporary input2 pointer */
- q31_t acc0, acc1, acc2, acc3; /* Accumulator */
- q31_t x1, x2, x3, y1; /* Temporary input variables */
- arm_status status;
- q7_t *pOut = pDst; /* output pointer */
- q7_t out0, out1, out2, out3; /* temporary variables */
+ q15_t *pScr2, *pScr1; /* Intermediate pointers for scratch pointers */
+ q15_t x4; /* Temporary input variable */
+ const q7_t *pIn1, *pIn2; /* InputA and inputB pointer */
+ uint32_t j, k, blkCnt, tapCnt; /* Loop counter */
+ const q7_t *px; /* Temporary input1 pointer */
+ q15_t *py; /* Temporary input2 pointer */
+ q31_t acc0, acc1, acc2, acc3; /* Accumulator */
+ q31_t x1, x2, x3, y1; /* Temporary input variables */
+ arm_status status;
+ q7_t *pOut = pDst; /* Output pointer */
+ q7_t out0, out1, out2, out3; /* Temporary variables */
/* Check for range of output samples to be calculated */
if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -93,7 +84,6 @@
}
else
{
-
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
/* So srcBLen is always considered as shorter or equal to srcALen */
@@ -133,16 +123,16 @@
while (k > 0U)
{
/* copy second buffer in reversal manner */
- x4 = (q15_t) * px--;
+ x4 = (q15_t) *px--;
*pScr2++ = x4;
- x4 = (q15_t) * px--;
+ x4 = (q15_t) *px--;
*pScr2++ = x4;
- x4 = (q15_t) * px--;
+ x4 = (q15_t) *px--;
*pScr2++ = x4;
- x4 = (q15_t) * px--;
+ x4 = (q15_t) *px--;
*pScr2++ = x4;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -153,10 +143,10 @@
while (k > 0U)
{
/* copy second buffer in reversal manner for remaining samples */
- x4 = (q15_t) * px--;
+ x4 = (q15_t) *px--;
*pScr2++ = x4;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -178,16 +168,16 @@
while (k > 0U)
{
/* copy second buffer in reversal manner */
- x4 = (q15_t) * pIn1++;
+ x4 = (q15_t) *pIn1++;
*pScr1++ = x4;
- x4 = (q15_t) * pIn1++;
+ x4 = (q15_t) *pIn1++;
*pScr1++ = x4;
- x4 = (q15_t) * pIn1++;
+ x4 = (q15_t) *pIn1++;
*pScr1++ = x4;
- x4 = (q15_t) * pIn1++;
+ x4 = (q15_t) *pIn1++;
*pScr1++ = x4;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -198,7 +188,7 @@
while (k > 0U)
{
/* copy second buffer in reversal manner for remaining samples */
- x4 = (q15_t) * pIn1++;
+ x4 = (q15_t) *pIn1++;
*pScr1++ = x4;
/* Decrement the loop counter */
@@ -227,31 +217,29 @@
/* Actual convolution process starts here */
blkCnt = (numPoints) >> 2;
-
while (blkCnt > 0)
{
- /* Initialze temporary scratch pointer as scratch1 */
+ /* Initialize temporary scratch pointer as scratch1 */
pScr1 = pScratch1;
- /* Clear Accumlators */
+ /* Clear Accumulators */
acc0 = 0;
acc1 = 0;
acc2 = 0;
acc3 = 0;
/* Read two samples from scratch1 buffer */
- x1 = *__SIMD32(pScr1)++;
+ x1 = read_q15x2_ia (&pScr1);
/* Read next two samples from scratch1 buffer */
- x2 = *__SIMD32(pScr1)++;
+ x2 = read_q15x2_ia (&pScr1);
tapCnt = (srcBLen) >> 2U;
while (tapCnt > 0U)
{
-
/* Read four samples from smaller buffer */
- y1 = _SIMD32_OFFSET(pScr2);
+ y1 = read_q15x2_ia (&pScr2);
/* multiply and accumlate */
acc0 = __SMLAD(x1, y1, acc0);
@@ -268,7 +256,7 @@
acc1 = __SMLADX(x3, y1, acc1);
/* Read next two samples from scratch1 buffer */
- x1 = *__SIMD32(pScr1)++;
+ x1 = read_q15x2_ia (&pScr1);
/* pack input data */
#ifndef ARM_MATH_BIG_ENDIAN
@@ -280,7 +268,7 @@
acc3 = __SMLADX(x3, y1, acc3);
/* Read four samples from smaller buffer */
- y1 = _SIMD32_OFFSET(pScr2 + 2U);
+ y1 = read_q15x2_ia (&pScr2);
acc0 = __SMLAD(x2, y1, acc0);
@@ -288,7 +276,7 @@
acc1 = __SMLADX(x3, y1, acc1);
- x2 = *__SIMD32(pScr1)++;
+ x2 = read_q15x2_ia (&pScr1);
#ifndef ARM_MATH_BIG_ENDIAN
x3 = __PKHBT(x2, x1, 0);
@@ -298,25 +286,18 @@
acc3 = __SMLADX(x3, y1, acc3);
- pScr2 += 4U;
-
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
-
-
/* Update scratch pointer for remaining samples of smaller length sequence */
pScr1 -= 4U;
-
/* apply same above for remaining samples of smaller length sequence */
tapCnt = (srcBLen) & 3U;
while (tapCnt > 0U)
{
-
/* accumlate the results */
acc0 += (*pScr1++ * *pScr2);
acc1 += (*pScr1++ * *pScr2);
@@ -325,7 +306,7 @@
pScr1 -= 3U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -337,13 +318,12 @@
out2 = (q7_t) (__SSAT(acc2 >> 7U, 8));
out3 = (q7_t) (__SSAT(acc3 >> 7U, 8));
- *__SIMD32(pOut)++ = __PACKq7(out0, out1, out2, out3);
+ write_q7x4_ia (&pOut, __PACKq7(out0, out1, out2, out3));
/* Initialization of inputB pointer */
pScr2 = py;
pScratch1 += 4U;
-
}
blkCnt = (numPoints) & 0x3;
@@ -363,10 +343,10 @@
{
/* Read next two samples from scratch1 buffer */
- x1 = *__SIMD32(pScr1)++;
+ x1 = read_q15x2_ia (&pScr1);
/* Read two samples from smaller buffer */
- y1 = *__SIMD32(pScr2)++;
+ y1 = read_q15x2_ia (&pScr2);
acc0 = __SMLAD(x1, y1, acc0);
@@ -383,7 +363,7 @@
/* accumlate the results */
acc0 += (*pScr1++ * *pScr2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -396,396 +376,15 @@
pScr2 = py;
pScratch1 += 1U;
-
}
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
-
-
}
return (status);
-
}
-#else
-
-arm_status arm_conv_partial_opt_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2)
-{
-
- q15_t *pScr2, *pScr1; /* Intermediate pointers for scratch pointers */
- q15_t x4; /* Temporary input variable */
- q7_t *pIn1, *pIn2; /* inputA and inputB pointer */
- uint32_t j, k, blkCnt, tapCnt; /* loop counter */
- q7_t *px; /* Temporary input1 pointer */
- q15_t *py; /* Temporary input2 pointer */
- q31_t acc0, acc1, acc2, acc3; /* Accumulator */
- arm_status status;
- q7_t *pOut = pDst; /* output pointer */
- q15_t x10, x11, x20, x21; /* Temporary input variables */
- q15_t y10, y11; /* Temporary input variables */
-
- /* Check for range of output samples to be calculated */
- if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
- {
- /* Set status as ARM_MATH_ARGUMENT_ERROR */
- status = ARM_MATH_ARGUMENT_ERROR;
- }
- else
- {
-
- /* The algorithm implementation is based on the lengths of the inputs. */
- /* srcB is always made to slide across srcA. */
- /* So srcBLen is always considered as shorter or equal to srcALen */
- if (srcALen >= srcBLen)
- {
- /* Initialization of inputA pointer */
- pIn1 = pSrcA;
-
- /* Initialization of inputB pointer */
- pIn2 = pSrcB;
- }
- else
- {
- /* Initialization of inputA pointer */
- pIn1 = pSrcB;
-
- /* Initialization of inputB pointer */
- pIn2 = pSrcA;
-
- /* srcBLen is always considered as shorter or equal to srcALen */
- j = srcBLen;
- srcBLen = srcALen;
- srcALen = j;
- }
-
- /* pointer to take end of scratch2 buffer */
- pScr2 = pScratch2;
-
- /* points to smaller length sequence */
- px = pIn2 + srcBLen - 1;
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = srcBLen >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- x4 = (q15_t) * px--;
- *pScr2++ = x4;
- x4 = (q15_t) * px--;
- *pScr2++ = x4;
- x4 = (q15_t) * px--;
- *pScr2++ = x4;
- x4 = (q15_t) * px--;
- *pScr2++ = x4;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = srcBLen % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- x4 = (q15_t) * px--;
- *pScr2++ = x4;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Initialze temporary scratch pointer */
- pScr1 = pScratch1;
-
- /* Fill (srcBLen - 1U) zeros in scratch buffer */
- arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
- /* Update temporary scratch pointer */
- pScr1 += (srcBLen - 1U);
-
- /* Copy (srcALen) samples in scratch buffer */
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = srcALen >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- x4 = (q15_t) * pIn1++;
- *pScr1++ = x4;
- x4 = (q15_t) * pIn1++;
- *pScr1++ = x4;
- x4 = (q15_t) * pIn1++;
- *pScr1++ = x4;
- x4 = (q15_t) * pIn1++;
- *pScr1++ = x4;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = srcALen % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- x4 = (q15_t) * pIn1++;
- *pScr1++ = x4;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- k = (srcBLen - 1U) >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr1++ = 0;
- *pScr1++ = 0;
- *pScr1++ = 0;
- *pScr1++ = 0;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = (srcBLen - 1U) % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr1++ = 0;
-
- /* Decrement the loop counter */
- k--;
- }
-
-
- /* Temporary pointer for scratch2 */
- py = pScratch2;
-
- /* Initialization of pIn2 pointer */
- pIn2 = (q7_t *) py;
-
- pScr2 = py;
-
- pOut = pDst + firstIndex;
-
- pScratch1 += firstIndex;
-
- /* Actual convolution process starts here */
- blkCnt = (numPoints) >> 2;
-
-
- while (blkCnt > 0)
- {
- /* Initialze temporary scratch pointer as scratch1 */
- pScr1 = pScratch1;
-
- /* Clear Accumlators */
- acc0 = 0;
- acc1 = 0;
- acc2 = 0;
- acc3 = 0;
-
- /* Read two samples from scratch1 buffer */
- x10 = *pScr1++;
- x11 = *pScr1++;
-
- /* Read next two samples from scratch1 buffer */
- x20 = *pScr1++;
- x21 = *pScr1++;
-
- tapCnt = (srcBLen) >> 2U;
-
- while (tapCnt > 0U)
- {
-
- /* Read four samples from smaller buffer */
- y10 = *pScr2;
- y11 = *(pScr2 + 1U);
-
- /* multiply and accumlate */
- acc0 += (q31_t) x10 *y10;
- acc0 += (q31_t) x11 *y11;
- acc2 += (q31_t) x20 *y10;
- acc2 += (q31_t) x21 *y11;
-
-
- acc1 += (q31_t) x11 *y10;
- acc1 += (q31_t) x20 *y11;
-
- /* Read next two samples from scratch1 buffer */
- x10 = *pScr1;
- x11 = *(pScr1 + 1U);
-
- /* multiply and accumlate */
- acc3 += (q31_t) x21 *y10;
- acc3 += (q31_t) x10 *y11;
-
- /* Read next two samples from scratch2 buffer */
- y10 = *(pScr2 + 2U);
- y11 = *(pScr2 + 3U);
-
- /* multiply and accumlate */
- acc0 += (q31_t) x20 *y10;
- acc0 += (q31_t) x21 *y11;
- acc2 += (q31_t) x10 *y10;
- acc2 += (q31_t) x11 *y11;
- acc1 += (q31_t) x21 *y10;
- acc1 += (q31_t) x10 *y11;
-
- /* Read next two samples from scratch1 buffer */
- x20 = *(pScr1 + 2);
- x21 = *(pScr1 + 3);
-
- /* multiply and accumlate */
- acc3 += (q31_t) x11 *y10;
- acc3 += (q31_t) x20 *y11;
-
- /* update scratch pointers */
-
- pScr1 += 4U;
- pScr2 += 4U;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
-
-
- /* Update scratch pointer for remaining samples of smaller length sequence */
- pScr1 -= 4U;
-
-
- /* apply same above for remaining samples of smaller length sequence */
- tapCnt = (srcBLen) & 3U;
-
- while (tapCnt > 0U)
- {
-
- /* accumlate the results */
- acc0 += (*pScr1++ * *pScr2);
- acc1 += (*pScr1++ * *pScr2);
- acc2 += (*pScr1++ * *pScr2);
- acc3 += (*pScr1++ * *pScr2++);
-
- pScr1 -= 3U;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- blkCnt--;
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
- *pOut++ = (q7_t) (__SSAT(acc1 >> 7U, 8));
- *pOut++ = (q7_t) (__SSAT(acc2 >> 7U, 8));
- *pOut++ = (q7_t) (__SSAT(acc3 >> 7U, 8));
-
- /* Initialization of inputB pointer */
- pScr2 = py;
-
- pScratch1 += 4U;
-
- }
-
- blkCnt = (numPoints) & 0x3;
-
- /* Calculate convolution for remaining samples of Bigger length sequence */
- while (blkCnt > 0)
- {
- /* Initialze temporary scratch pointer as scratch1 */
- pScr1 = pScratch1;
-
- /* Clear Accumlators */
- acc0 = 0;
-
- tapCnt = (srcBLen) >> 1U;
-
- while (tapCnt > 0U)
- {
-
- /* Read next two samples from scratch1 buffer */
- x10 = *pScr1++;
- x11 = *pScr1++;
-
- /* Read two samples from smaller buffer */
- y10 = *pScr2++;
- y11 = *pScr2++;
-
- /* multiply and accumlate */
- acc0 += (q31_t) x10 *y10;
- acc0 += (q31_t) x11 *y11;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- tapCnt = (srcBLen) & 1U;
-
- /* apply same above for remaining samples of smaller length sequence */
- while (tapCnt > 0U)
- {
-
- /* accumlate the results */
- acc0 += (*pScr1++ * *pScr2++);
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- blkCnt--;
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
-
- /* Initialization of inputB pointer */
- pScr2 = py;
-
- pScratch1 += 1U;
-
- }
-
- /* set status as ARM_MATH_SUCCESS */
- status = ARM_MATH_SUCCESS;
-
- }
-
- return (status);
-
-}
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-
-
/**
- * @} end of PartialConv group
+ @} end of PartialConv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c
index 9ef33d0..6bc9125 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c
@@ -3,13 +3,13 @@
* Title: arm_conv_partial_q15.c
* Description: Partial convolution of Q15 sequences
*
- * $Date: 10. December 2018
- * $Revision: V.1.5.2
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2018 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,58 +29,56 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup PartialConv
- * @{
+ @addtogroup PartialConv
+ @{
*/
/**
- * @brief Partial convolution of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * Refer to <code>arm_conv_partial_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
- *
- * \par
- * Refer the function <code>arm_conv_partial_opt_q15()</code> for a faster implementation of this function using scratch buffers.
- *
+ @brief Partial convolution of Q15 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written
+ @param[in] firstIndex is the first output sample to start with
+ @param[in] numPoints is the number of output points to be computed
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+ @remark
+ Refer to \ref arm_conv_partial_fast_q15() for a faster but less precise version of this function.
+ @remark
+ Refer to \ref arm_conv_partial_opt_q15() for a faster implementation of this function using scratch buffers.
*/
arm_status arm_conv_partial_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints)
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints)
{
+#if defined (ARM_MATH_DSP)
-#if !defined(ARM_MATH_CM0_Family) && !defined(UNALIGNED_SUPPORT_DISABLE)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *pOut = pDst; /* output pointer */
- q63_t sum, acc0, acc1, acc2, acc3; /* Accumulator */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- q15_t *pSrc1, *pSrc2; /* Intermediate pointers */
- q31_t x0, x1, x2, x3, c0; /* Temporary input variables */
- uint32_t j, k, count, check, blkCnt;
- int32_t blockSize1, blockSize2, blockSize3; /* loop counter */
- arm_status status; /* status of Partial convolution */
+ const q15_t *pIn1; /* InputA pointer */
+ const q15_t *pIn2; /* InputB pointer */
+ q15_t *pOut = pDst; /* Output pointer */
+ q63_t sum, acc0, acc1, acc2, acc3; /* Accumulator */
+ const q15_t *px; /* Intermediate inputA pointer */
+ const q15_t *py; /* Intermediate inputB pointer */
+ const q15_t *pSrc1, *pSrc2; /* Intermediate pointers */
+ q31_t x0, x1, x2, x3, c0; /* Temporary input variables to hold state and coefficient values */
+ int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ uint32_t j, k, count, blkCnt, check;
+ arm_status status; /* Status of Partial convolution */
/* Check for range of output samples to be calculated */
if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -90,7 +88,6 @@
}
else
{
-
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
/* So srcBLen is always considered as shorter or equal to srcALen */
@@ -121,11 +118,9 @@
check = firstIndex + numPoints;
blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
- blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
- blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :
- (int32_t) numPoints) : 0;
- blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
- (int32_t) firstIndex);
+ blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+ blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+ blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
/* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
@@ -173,7 +168,7 @@
/* Second part of this stage computes the MAC operations greater than or equal to 4 */
/* The first part of the stage starts here */
- while ((count < 4U) && (blockSize1 > 0))
+ while ((count < 4U) && (blockSize1 > 0U))
{
/* Accumulator is made zero for every iteration */
sum = 0;
@@ -187,7 +182,7 @@
/* Perform the multiply-accumulates */
sum = __SMLALD(*px++, *py--, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -198,10 +193,10 @@
py = ++pSrc2;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -211,7 +206,7 @@
* y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
py = py - 1;
- while (blockSize1 > 0)
+ while (blockSize1 > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
@@ -220,16 +215,16 @@
k = count >> 2U;
/* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+ a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
- sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
/* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
- sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -238,7 +233,7 @@
py = py + 1U;
/* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ No loop unrolling is used. */
k = count % 0x4U;
while (k > 0U)
@@ -246,7 +241,7 @@
/* Perform the multiply-accumulates */
sum = __SMLALD(*px++, *py--, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -257,10 +252,10 @@
py = ++pSrc2 - 1U;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -292,212 +287,193 @@
/* count is the index by which the pointer pIn1 to be incremented */
count = 0U;
+ /* -------------------
+ * Stage2 process
+ * ------------------*/
- /* --------------------
- * Stage2 process
- * -------------------*/
-
- /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
- * So, to loop unroll over blockSize2,
- * srcBLen should be greater than or equal to 4 */
- if (srcBLen >= 4U)
- {
- /* Loop unroll over blockSize2, by 4 */
- blkCnt = blockSize2 >> 2U;
-
- while (blkCnt > 0U)
+ /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+ * So, to loop unroll over blockSize2,
+ * srcBLen should be greater than or equal to 4 */
+ if (srcBLen >= 4U)
{
- py = py - 1U;
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = ((uint32_t) blockSize2 >> 2U);
- /* Set all accumulators to zero */
- acc0 = 0;
- acc1 = 0;
- acc2 = 0;
- acc3 = 0;
-
-
- /* read x[0], x[1] samples */
- x0 = *__SIMD32(px);
- /* read x[1], x[2] samples */
- x1 = _SIMD32_OFFSET(px+1);
- px+= 2U;
-
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = srcBLen >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
- do
+ while (blkCnt > 0U)
{
- /* Read the last two inputB samples using SIMD:
- * y[srcBLen - 1] and y[srcBLen - 2] */
- c0 = *__SIMD32(py)--;
+ py = py - 1U;
- /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
- acc0 = __SMLALDX(x0, c0, acc0);
+ /* Set all accumulators to zero */
+ acc0 = 0;
+ acc1 = 0;
+ acc2 = 0;
+ acc3 = 0;
- /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
- acc1 = __SMLALDX(x1, c0, acc1);
- /* Read x[2], x[3] */
- x2 = *__SIMD32(px);
-
- /* Read x[3], x[4] */
- x3 = _SIMD32_OFFSET(px+1);
-
- /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
- acc2 = __SMLALDX(x2, c0, acc2);
-
- /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
- acc3 = __SMLALDX(x3, c0, acc3);
-
- /* Read y[srcBLen - 3] and y[srcBLen - 4] */
- c0 = *__SIMD32(py)--;
-
- /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
- acc0 = __SMLALDX(x2, c0, acc0);
-
- /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
- acc1 = __SMLALDX(x3, c0, acc1);
-
- /* Read x[4], x[5] */
- x0 = _SIMD32_OFFSET(px+2);
-
- /* Read x[5], x[6] */
- x1 = _SIMD32_OFFSET(px+3);
- px += 4U;
-
- /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
- acc2 = __SMLALDX(x0, c0, acc2);
-
- /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
- acc3 = __SMLALDX(x1, c0, acc3);
-
- } while (--k);
-
- /* For the next MAC operations, SIMD is not used
- * So, the 16 bit pointer if inputB, py is updated */
-
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
- k = srcBLen % 0x4U;
-
- if (k == 1U)
- {
- /* Read y[srcBLen - 5] */
- c0 = *(py+1);
-
-#ifdef ARM_MATH_BIG_ENDIAN
-
- c0 = c0 << 16U;
-
-#else
-
- c0 = c0 & 0x0000FFFF;
-
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
-
- /* Read x[7] */
- x3 = *__SIMD32(px);
- px++;
-
- /* Perform the multiply-accumulates */
- acc0 = __SMLALD(x0, c0, acc0);
- acc1 = __SMLALD(x1, c0, acc1);
- acc2 = __SMLALDX(x1, c0, acc2);
- acc3 = __SMLALDX(x3, c0, acc3);
- }
-
- if (k == 2U)
- {
- /* Read y[srcBLen - 5], y[srcBLen - 6] */
- c0 = _SIMD32_OFFSET(py);
-
- /* Read x[7], x[8] */
- x3 = *__SIMD32(px);
-
- /* Read x[9] */
- x2 = _SIMD32_OFFSET(px+1);
+ /* read x[0], x[1] samples */
+ x0 = read_q15x2 ((q15_t *) px);
+ /* read x[1], x[2] samples */
+ x1 = read_q15x2 ((q15_t *) px + 1);
px += 2U;
- /* Perform the multiply-accumulates */
- acc0 = __SMLALDX(x0, c0, acc0);
- acc1 = __SMLALDX(x1, c0, acc1);
- acc2 = __SMLALDX(x3, c0, acc2);
- acc3 = __SMLALDX(x2, c0, acc3);
- }
- if (k == 3U)
- {
- /* Read y[srcBLen - 5], y[srcBLen - 6] */
- c0 = _SIMD32_OFFSET(py);
+ /* Apply loop unrolling and compute 4 MACs simultaneously. */
+ k = srcBLen >> 2U;
- /* Read x[7], x[8] */
- x3 = *__SIMD32(px);
+ /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
+ ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+ do
+ {
+ /* Read the last two inputB samples using SIMD:
+ * y[srcBLen - 1] and y[srcBLen - 2] */
+ c0 = read_q15x2_da ((q15_t **) &py);
- /* Read x[9] */
- x2 = _SIMD32_OFFSET(px+1);
+ /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
+ acc0 = __SMLALDX(x0, c0, acc0);
- /* Perform the multiply-accumulates */
- acc0 = __SMLALDX(x0, c0, acc0);
- acc1 = __SMLALDX(x1, c0, acc1);
- acc2 = __SMLALDX(x3, c0, acc2);
- acc3 = __SMLALDX(x2, c0, acc3);
+ /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
+ acc1 = __SMLALDX(x1, c0, acc1);
- c0 = *(py-1);
+ /* Read x[2], x[3] */
+ x2 = read_q15x2 ((q15_t *) px);
+ /* Read x[3], x[4] */
+ x3 = read_q15x2 ((q15_t *) px + 1);
+
+ /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
+ acc2 = __SMLALDX(x2, c0, acc2);
+
+ /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
+ acc3 = __SMLALDX(x3, c0, acc3);
+
+ /* Read y[srcBLen - 3] and y[srcBLen - 4] */
+ c0 = read_q15x2_da ((q15_t **) &py);
+
+ /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
+ acc0 = __SMLALDX(x2, c0, acc0);
+
+ /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
+ acc1 = __SMLALDX(x3, c0, acc1);
+
+ /* Read x[4], x[5] */
+ x0 = read_q15x2 ((q15_t *) px + 2);
+
+ /* Read x[5], x[6] */
+ x1 = read_q15x2 ((q15_t *) px + 3);
+ px += 4U;
+
+ /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
+ acc2 = __SMLALDX(x0, c0, acc2);
+
+ /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
+ acc3 = __SMLALDX(x1, c0, acc3);
+
+ } while (--k);
+
+ /* For the next MAC operations, SIMD is not used
+ * So, the 16 bit pointer if inputB, py is updated */
+
+ /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+ ** No loop unrolling is used. */
+ k = srcBLen % 0x4U;
+
+ if (k == 1U)
+ {
+ /* Read y[srcBLen - 5] */
+ c0 = *(py+1);
#ifdef ARM_MATH_BIG_ENDIAN
-
- c0 = c0 << 16U;
+ c0 = c0 << 16U;
#else
+ c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
- c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+ /* Read x[7] */
+ x3 = read_q15x2 ((q15_t *) px);
+ px++;
- /* Read x[10] */
- x3 = _SIMD32_OFFSET(px+2);
- px += 3U;
+ /* Perform the multiply-accumulate */
+ acc0 = __SMLALD (x0, c0, acc0);
+ acc1 = __SMLALD (x1, c0, acc1);
+ acc2 = __SMLALDX(x1, c0, acc2);
+ acc3 = __SMLALDX(x3, c0, acc3);
+ }
- /* Perform the multiply-accumulates */
- acc0 = __SMLALDX(x1, c0, acc0);
- acc1 = __SMLALD(x2, c0, acc1);
- acc2 = __SMLALDX(x2, c0, acc2);
- acc3 = __SMLALDX(x3, c0, acc3);
- }
+ if (k == 2U)
+ {
+ /* Read y[srcBLen - 5], y[srcBLen - 6] */
+ c0 = read_q15x2 ((q15_t *) py);
+ /* Read x[7], x[8] */
+ x3 = read_q15x2 ((q15_t *) px);
- /* Store the results in the accumulators in the destination buffer. */
+ /* Read x[9] */
+ x2 = read_q15x2 ((q15_t *) px + 1);
+ px += 2U;
-#ifndef ARM_MATH_BIG_ENDIAN
+ /* Perform the multiply-accumulate */
+ acc0 = __SMLALDX(x0, c0, acc0);
+ acc1 = __SMLALDX(x1, c0, acc1);
+ acc2 = __SMLALDX(x3, c0, acc2);
+ acc3 = __SMLALDX(x2, c0, acc3);
+ }
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
+ if (k == 3U)
+ {
+ /* Read y[srcBLen - 5], y[srcBLen - 6] */
+ c0 = read_q15x2 ((q15_t *) py);
+ /* Read x[7], x[8] */
+ x3 = read_q15x2 ((q15_t *) px);
+
+ /* Read x[9] */
+ x2 = read_q15x2 ((q15_t *) px + 1);
+
+ /* Perform the multiply-accumulate */
+ acc0 = __SMLALDX(x0, c0, acc0);
+ acc1 = __SMLALDX(x1, c0, acc1);
+ acc2 = __SMLALDX(x3, c0, acc2);
+ acc3 = __SMLALDX(x2, c0, acc3);
+
+ c0 = *(py-1);
+#ifdef ARM_MATH_BIG_ENDIAN
+ c0 = c0 << 16U;
#else
+ c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
+ /* Read x[10] */
+ x3 = read_q15x2 ((q15_t *) px + 2);
+ px += 3U;
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ /* Perform the multiply-accumulates */
+ acc0 = __SMLALDX(x1, c0, acc0);
+ acc1 = __SMLALD (x2, c0, acc1);
+ acc2 = __SMLALDX(x2, c0, acc2);
+ acc3 = __SMLALDX(x3, c0, acc3);
+ }
- /* Increment the pointer pIn1 index, count by 4 */
- count += 4U;
+ /* Store the results in the accumulators in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = pSrc1 + count;
- py = pSrc2;
+ /* Increment the pointer pIn1 index, count by 4 */
+ count += 4U;
- /* Decrement the loop counter */
+ /* Update the inputA and inputB pointers for next MAC calculation */
+ px = pSrc1 + count;
+ py = pSrc2;
+
+ /* Decrement loop counter */
blkCnt--;
}
/* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ No loop unrolling is used. */
blkCnt = (uint32_t) blockSize2 % 0x4U;
while (blkCnt > 0U)
@@ -509,16 +485,16 @@
k = srcBLen >> 2U;
/* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+ a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* Perform the multiply-accumulates */
- sum += (q63_t) ((q31_t) * px++ * *py--);
- sum += (q63_t) ((q31_t) * px++ * *py--);
- sum += (q63_t) ((q31_t) * px++ * *py--);
- sum += (q63_t) ((q31_t) * px++ * *py--);
+ sum += (q63_t) ((q31_t) *px++ * *py--);
+ sum += (q63_t) ((q31_t) *px++ * *py--);
+ sum += (q63_t) ((q31_t) *px++ * *py--);
+ sum += (q63_t) ((q31_t) *px++ * *py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -528,10 +504,10 @@
while (k > 0U)
{
- /* Perform the multiply-accumulates */
- sum += (q63_t) ((q31_t) * px++ * *py--);
+ /* Perform the multiply-accumulate */
+ sum += (q63_t) ((q31_t) *px++ * *py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -545,7 +521,7 @@
px = pSrc1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -566,7 +542,7 @@
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += (q63_t) ((q31_t) * px++ * *py--);
+ sum += (q63_t) ((q31_t) *px++ * *py--);
/* Decrement the loop counter */
k--;
@@ -623,7 +599,7 @@
/* The first part of the stage starts here */
j = count >> 2U;
- while ((j > 0U) && (blockSize3 > 0))
+ while ((j > 0U) && (blockSize3 > 0U))
{
/* Accumulator is made zero for every iteration */
sum = 0;
@@ -637,12 +613,12 @@
{
/* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
* with y[srcBLen - 1], y[srcBLen - 2] respectively */
- sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
/* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
* with y[srcBLen - 3], y[srcBLen - 4] respectively */
- sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -659,7 +635,7 @@
/* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
sum = __SMLALD(*px++, *py--, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -670,10 +646,10 @@
px = ++pSrc1;
py = pIn2;
- /* Decrement the MAC count */
+ /* Decrement MAC count */
count--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize3--;
j--;
@@ -684,7 +660,7 @@
* so pointer py is updated to read only one sample at a time */
py = py + 1U;
- while (blockSize3 > 0)
+ while (blockSize3 > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
@@ -698,7 +674,7 @@
/* sum += x[srcALen-1] * y[srcBLen-1] */
sum = __SMLALD(*px++, *py--, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -709,34 +685,32 @@
px = ++pSrc1;
py = pSrc2;
- /* Decrement the MAC count */
+ /* Decrement MAC count */
count--;
/* Decrement the loop counter */
blockSize3--;
}
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
-#else
+#else /* #if defined (ARM_MATH_DSP) */
- /* Run the below code for Cortex-M0 */
-
- q15_t *pIn1 = pSrcA; /* inputA pointer */
- q15_t *pIn2 = pSrcB; /* inputB pointer */
- q63_t sum; /* Accumulator */
- uint32_t i, j; /* loop counters */
- arm_status status; /* status of Partial convolution */
+ const q15_t *pIn1 = pSrcA; /* InputA pointer */
+ const q15_t *pIn2 = pSrcB; /* InputB pointer */
+ q63_t sum; /* Accumulator */
+ uint32_t i, j; /* Loop counters */
+ arm_status status; /* Status of Partial convolution */
/* Check for range of output samples to be calculated */
if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
{
- /* Set status as ARM_ARGUMENT_ERROR */
+ /* Set status as ARM_MATH_ARGUMENT_ERROR */
status = ARM_MATH_ARGUMENT_ERROR;
}
else
@@ -748,28 +722,31 @@
sum = 0;
/* Loop to perform MAC operations according to convolution equation */
- for (j = 0; j <= i; j++)
+ for (j = 0U; j <= i; j++)
{
/* Check the array limitations */
if (((i - j) < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
- sum += ((q31_t) pIn1[j] * (pIn2[i - j]));
+ sum += ((q31_t) pIn1[j] * pIn2[i - j]);
}
}
/* Store the output in the destination buffer */
pDst[i] = (q15_t) __SSAT((sum >> 15U), 16U);
}
- /* set status as ARM_SUCCESS as there are no argument errors */
+
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
+
+ /* Return to application */
return (status);
-#endif /* #if !defined(ARM_MATH_CM0_Family) && !defined(UNALIGNED_SUPPORT_DISABLE) */
+#endif /* #if defined (ARM_MATH_DSP) */
}
/**
- * @} end of PartialConv group
+ @} end of PartialConv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c
index 9f6f315..b1eea36 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c
@@ -3,13 +3,13 @@
* Title: arm_conv_partial_q31.c
* Description: Partial convolution of Q31 sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,55 +29,59 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup PartialConv
- * @{
+ @addtogroup PartialConv
+ @{
*/
/**
- * @brief Partial convolution of Q31 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * See <code>arm_conv_partial_fast_q31()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
+ @brief Partial convolution of Q31 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written
+ @param[in] firstIndex is the first output sample to start with
+ @param[in] numPoints is the number of output points to be computed
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+ @remark
+ Refer to \ref arm_conv_partial_fast_q31() for a faster but less precise implementation of this function.
*/
arm_status arm_conv_partial_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints)
+ const q31_t * pSrcA,
+ uint32_t srcALen,
+ const q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints)
{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
-#if defined (ARM_MATH_DSP)
+ const q31_t *pIn1; /* InputA pointer */
+ const q31_t *pIn2; /* InputB pointer */
+ q31_t *pOut = pDst; /* Output pointer */
+ const q31_t *px; /* Intermediate inputA pointer */
+ const q31_t *py; /* Intermediate inputB pointer */
+ const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */
+ q63_t sum; /* Accumulator */
+ uint32_t j, k, count, blkCnt, check;
+ int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ arm_status status; /* Status of Partial convolution */
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q31_t *pIn1; /* inputA pointer */
- q31_t *pIn2; /* inputB pointer */
- q31_t *pOut = pDst; /* output pointer */
- q31_t *px; /* Intermediate inputA pointer */
- q31_t *py; /* Intermediate inputB pointer */
- q31_t *pSrc1, *pSrc2; /* Intermediate pointers */
- q63_t sum, acc0, acc1, acc2; /* Accumulator */
- q31_t x0, x1, x2, c0;
- uint32_t j, k, count, check, blkCnt;
- int32_t blockSize1, blockSize2, blockSize3; /* loop counter */
- arm_status status; /* status of Partial convolution */
-
+#if defined (ARM_MATH_LOOPUNROLL)
+ q63_t acc0, acc1, acc2; /* Accumulator */
+ q31_t x0, x1, x2, c0; /* Temporary variables */
+#endif
/* Check for range of output samples to be calculated */
if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -87,7 +91,6 @@
}
else
{
-
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
/* So srcBLen is always considered as shorter or equal to srcALen */
@@ -118,11 +121,9 @@
check = firstIndex + numPoints;
blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
- blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
- blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :
- (int32_t) numPoints) : 0;
- blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
- (int32_t) firstIndex);
+ blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+ blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+ blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
/* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
@@ -165,42 +166,51 @@
* Stage1 process
* ----------------------*/
- /* The first loop starts here */
- while (blockSize1 > 0)
+ /* The first stage starts here */
+ while (blockSize1 > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* x[0] * y[srcBLen - 1] */
- sum += (q63_t) * px++ * (*py--);
- /* x[1] * y[srcBLen - 2] */
- sum += (q63_t) * px++ * (*py--);
- /* x[2] * y[srcBLen - 3] */
- sum += (q63_t) * px++ * (*py--);
- /* x[3] * y[srcBLen - 4] */
- sum += (q63_t) * px++ * (*py--);
+ sum += (q63_t) *px++ * (*py--);
- /* Decrement the loop counter */
+ /* x[1] * y[srcBLen - 2] */
+ sum += (q63_t) *px++ * (*py--);
+
+ /* x[2] * y[srcBLen - 3] */
+ sum += (q63_t) *px++ * (*py--);
+
+ /* x[3] * y[srcBLen - 4] */
+ sum += (q63_t) *px++ * (*py--);
+
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize k with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += (q63_t) * px++ * (*py--);
+ sum += (q63_t) *px++ * (*py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -211,10 +221,10 @@
py = ++pSrc2;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -255,9 +265,11 @@
* srcBLen should be greater than or equal to 4 */
if (srcBLen >= 4U)
{
- /* Loop unroll over blkCnt */
+#if defined (ARM_MATH_LOOPUNROLL)
+ /* Loop unroll over blkCnt */
blkCnt = blockSize2 / 3;
+
while (blkCnt > 0U)
{
/* Set all accumulators to zero */
@@ -282,13 +294,13 @@
/* Read x[2] sample */
x2 = *(px);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[0] * y[srcBLen - 1] */
- acc0 += (q63_t) x0 *c0;
+ acc0 += (q63_t) x0 * c0;
/* acc1 += x[1] * y[srcBLen - 1] */
- acc1 += (q63_t) x1 *c0;
+ acc1 += (q63_t) x1 * c0;
/* acc2 += x[2] * y[srcBLen - 1] */
- acc2 += (q63_t) x2 *c0;
+ acc2 += (q63_t) x2 * c0;
/* Read y[srcBLen - 2] sample */
c0 = *(py - 1U);
@@ -298,11 +310,11 @@
/* Perform the multiply-accumulate */
/* acc0 += x[1] * y[srcBLen - 2] */
- acc0 += (q63_t) x1 *c0;
+ acc0 += (q63_t) x1 * c0;
/* acc1 += x[2] * y[srcBLen - 2] */
- acc1 += (q63_t) x2 *c0;
+ acc1 += (q63_t) x2 * c0;
/* acc2 += x[3] * y[srcBLen - 2] */
- acc2 += (q63_t) x0 *c0;
+ acc2 += (q63_t) x0 * c0;
/* Read y[srcBLen - 3] sample */
c0 = *(py - 2U);
@@ -310,13 +322,13 @@
/* Read x[4] sample */
x1 = *(px + 2U);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[2] * y[srcBLen - 3] */
- acc0 += (q63_t) x2 *c0;
+ acc0 += (q63_t) x2 * c0;
/* acc1 += x[3] * y[srcBLen - 2] */
- acc1 += (q63_t) x0 *c0;
+ acc1 += (q63_t) x0 * c0;
/* acc2 += x[4] * y[srcBLen - 2] */
- acc2 += (q63_t) x1 *c0;
+ acc2 += (q63_t) x1 * c0;
px += 3U;
@@ -333,17 +345,16 @@
{
/* Read y[srcBLen - 5] sample */
c0 = *py--;
-
/* Read x[7] sample */
x2 = *px++;
/* Perform the multiply-accumulates */
/* acc0 += x[4] * y[srcBLen - 5] */
- acc0 += (q63_t) x0 *c0;
+ acc0 += (q63_t) x0 * c0;
/* acc1 += x[5] * y[srcBLen - 5] */
- acc1 += (q63_t) x1 *c0;
+ acc1 += (q63_t) x1 * c0;
/* acc2 += x[6] * y[srcBLen - 5] */
- acc2 += (q63_t) x2 *c0;
+ acc2 += (q63_t) x2 * c0;
/* Reuse the present samples for the next MAC */
x0 = x1;
@@ -365,60 +376,72 @@
px = pSrc1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize2 - 3 * (blockSize2 / 3);
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = srcBLen >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* Perform the multiply-accumulates */
- sum += (q63_t) * px++ * (*py--);
- sum += (q63_t) * px++ * (*py--);
- sum += (q63_t) * px++ * (*py--);
- sum += (q63_t) * px++ * (*py--);
+ sum += (q63_t) *px++ * (*py--);
+ sum += (q63_t) *px++ * (*py--);
+ sum += (q63_t) *px++ * (*py--);
+ sum += (q63_t) *px++ * (*py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = srcBLen % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += (q63_t) * px++ * (*py--);
+ sum += (q63_t) *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
/* Store the result in the accumulator in the destination buffer. */
*pOut++ = (q31_t) (sum >> 31);
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pSrc1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -439,9 +462,9 @@
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += (q63_t) * px++ * (*py--);
+ sum += (q63_t) *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -488,37 +511,51 @@
* Stage3 process
* ------------------*/
- while (blockSize3 > 0)
+ while (blockSize3 > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
- sum += (q63_t) * px++ * (*py--);
- sum += (q63_t) * px++ * (*py--);
- sum += (q63_t) * px++ * (*py--);
- sum += (q63_t) * px++ * (*py--);
+ /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+ sum += (q63_t) *px++ * *py--;
- /* Decrement the loop counter */
+ /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+ sum += (q63_t) *px++ * *py--;
+
+ /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+ sum += (q63_t) *px++ * *py--;
+
+ /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+ sum += (q63_t) *px++ * *py--;
+
+ /* Decrement loop counter */
k--;
}
- /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += (q63_t) * px++ * (*py--);
+ /* sum += x[srcALen-1] * y[srcBLen-1] */
+ sum += (q63_t) *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -529,15 +566,14 @@
px = ++pSrc1;
py = pSrc2;
- /* Decrement the MAC count */
+ /* Decrement MAC count */
count--;
/* Decrement the loop counter */
blockSize3--;
-
}
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
@@ -545,19 +581,18 @@
return (status);
#else
+/* alternate version for CM0_FAMILY */
- /* Run the below code for Cortex-M0 */
-
- q31_t *pIn1 = pSrcA; /* inputA pointer */
- q31_t *pIn2 = pSrcB; /* inputB pointer */
- q63_t sum; /* Accumulator */
- uint32_t i, j; /* loop counters */
- arm_status status; /* status of Partial convolution */
+ const q31_t *pIn1 = pSrcA; /* InputA pointer */
+ const q31_t *pIn2 = pSrcB; /* InputB pointer */
+ q63_t sum; /* Accumulator */
+ uint32_t i, j; /* Loop counters */
+ arm_status status; /* Status of Partial convolution */
/* Check for range of output samples to be calculated */
if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
{
- /* Set status as ARM_ARGUMENT_ERROR */
+ /* Set status as ARM_MATH_ARGUMENT_ERROR */
status = ARM_MATH_ARGUMENT_ERROR;
}
else
@@ -569,28 +604,31 @@
sum = 0;
/* Loop to perform MAC operations according to convolution equation */
- for (j = 0; j <= i; j++)
+ for (j = 0U; j <= i; j++)
{
/* Check the array limitations */
if (((i - j) < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
- sum += ((q63_t) pIn1[j] * (pIn2[i - j]));
+ sum += ((q63_t) pIn1[j] * pIn2[i - j]);
}
}
/* Store the output in the destination buffer */
pDst[i] = (q31_t) (sum >> 31U);
}
- /* set status as ARM_SUCCESS as there are no argument errors */
+
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
+
+ /* Return to application */
return (status);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
}
/**
- * @} end of PartialConv group
+ @} end of PartialConv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c
index 4d95359..85c420e 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c
@@ -3,13 +3,13 @@
* Title: arm_conv_partial_q7.c
* Description: Partial convolution of Q7 sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,59 +29,61 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup PartialConv
- * @{
+ @addtogroup PartialConv
+ @{
*/
/**
- * @brief Partial convolution of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * \par
- * Refer the function <code>arm_conv_partial_opt_q7()</code> for a faster implementation of this function.
- *
+ @brief Partial convolution of Q7 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written
+ @param[in] firstIndex is the first output sample to start with
+ @param[in] numPoints is the number of output points to be computed
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+ @remark
+ Refer to \ref arm_conv_partial_opt_q7() for a faster implementation of this function.
*/
arm_status arm_conv_partial_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints)
+ const q7_t * pSrcA,
+ uint32_t srcALen,
+ const q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints)
{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
-#if defined (ARM_MATH_DSP)
+ const q7_t *pIn1; /* InputA pointer */
+ const q7_t *pIn2; /* InputB pointer */
+ q7_t *pOut = pDst; /* Output pointer */
+ const q7_t *px; /* Intermediate inputA pointer */
+ const q7_t *py; /* Intermediate inputB pointer */
+ const q7_t *pSrc1, *pSrc2; /* Intermediate pointers */
+ q31_t sum; /* Accumulator */
+ uint32_t j, k, count, blkCnt, check; /* Loop counters */
+ int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ arm_status status; /* Status of Partial convolution */
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q7_t *pIn1; /* inputA pointer */
- q7_t *pIn2; /* inputB pointer */
- q7_t *pOut = pDst; /* output pointer */
- q7_t *px; /* Intermediate inputA pointer */
- q7_t *py; /* Intermediate inputB pointer */
- q7_t *pSrc1, *pSrc2; /* Intermediate pointers */
- q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */
- q31_t input1, input2;
- q15_t in1, in2;
- q7_t x0, x1, x2, x3, c0, c1;
- uint32_t j, k, count, check, blkCnt;
- int32_t blockSize1, blockSize2, blockSize3; /* loop counter */
- arm_status status;
-
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t acc0, acc1, acc2, acc3; /* Accumulator */
+ q31_t input1, input2; /* Temporary input variables */
+ q15_t in1, in2; /* Temporary input variables */
+ q7_t x0, x1, x2, x3, c0, c1; /* Temporary variables to hold state and coefficient values */
+#endif
/* Check for range of output samples to be calculated */
if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -91,7 +93,6 @@
}
else
{
-
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
/* So srcBLen is always considered as shorter or equal to srcALen */
@@ -122,11 +123,9 @@
check = firstIndex + numPoints;
blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
- blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
- blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :
- (int32_t) numPoints) : 0;
- blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
- (int32_t) firstIndex);
+ blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+ blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+ blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
/* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
@@ -154,7 +153,7 @@
/* In this stage the MAC operations are increased by 1 for every iteration.
The count variable holds the number of MAC operations performed.
- Since the partial convolution starts from from firstIndex
+ Since the partial convolution starts from firstIndex
Number of Macs to be performed is firstIndex + 1 */
count = 1U + firstIndex;
@@ -170,26 +169,26 @@
* ----------------------*/
/* The first stage starts here */
- while (blockSize1 > 0)
+ while (blockSize1 > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* x[0] , x[1] */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* y[srcBLen - 1] , y[srcBLen - 2] */
- in1 = (q15_t) * py--;
- in2 = (q15_t) * py--;
+ in1 = (q15_t) *py--;
+ in2 = (q15_t) *py--;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* x[0] * y[srcBLen - 1] */
@@ -197,33 +196,39 @@
sum = __SMLAD(input1, input2, sum);
/* x[2] , x[3] */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* y[srcBLen - 3] , y[srcBLen - 4] */
- in1 = (q15_t) * py--;
- in2 = (q15_t) * py--;
+ in1 = (q15_t) *py--;
+ in2 = (q15_t) *py--;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* x[2] * y[srcBLen - 3] */
/* x[3] * y[srcBLen - 4] */
sum = __SMLAD(input1, input2, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize k with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum += ((q31_t) * px++ * *py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -234,10 +239,10 @@
py = ++pSrc2;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -266,7 +271,7 @@
pSrc2 = pIn2 + (srcBLen - 1U);
py = pSrc2;
- /* count is index by which the pointer pIn1 to be incremented */
+ /* count is the index by which the pointer pIn1 to be incremented */
count = 0U;
/* -------------------
@@ -278,7 +283,9 @@
* srcBLen should be greater than or equal to 4 */
if (srcBLen >= 4U)
{
- /* Loop unroll over blockSize2, by 4 */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = ((uint32_t) blockSize2 >> 2U);
while (blkCnt > 0U)
@@ -417,7 +424,6 @@
{
/* Read y[srcBLen - 5] sample */
c0 = *py--;
-
/* Read x[7] sample */
x3 = *px++;
@@ -453,68 +459,78 @@
px = pSrc1 + count;
py = pSrc2;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (uint32_t) blockSize2 % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = srcBLen >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
-
/* Reading two inputs of SrcA buffer and packing */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* Reading two inputs of SrcB buffer and packing */
- in1 = (q15_t) * py--;
- in2 = (q15_t) * py--;
+ in1 = (q15_t) *py--;
+ in2 = (q15_t) *py--;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum = __SMLAD(input1, input2, sum);
/* Reading two inputs of SrcA buffer and packing */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* Reading two inputs of SrcB buffer and packing */
- in1 = (q15_t) * py--;
- in2 = (q15_t) * py--;
+ in1 = (q15_t) *py--;
+ in2 = (q15_t) *py--;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum = __SMLAD(input1, input2, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = srcBLen % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum += ((q31_t) * px++ * *py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -522,13 +538,13 @@
*pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
/* Increment the pointer pIn1 index, count by 1 */
- count++;
+ count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pSrc1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -551,7 +567,7 @@
/* Perform the multiply-accumulate */
sum += ((q31_t) * px++ * *py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -598,26 +614,26 @@
* Stage3 process
* ------------------*/
- while (blockSize3 > 0)
+ while (blockSize3 > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
- in1 = (q15_t) * py--;
- in2 = (q15_t) * py--;
+ in1 = (q15_t) *py--;
+ in2 = (q15_t) *py--;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
@@ -625,34 +641,40 @@
sum = __SMLAD(input1, input2, sum);
/* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
- in1 = (q15_t) * py--;
- in2 = (q15_t) * py--;
+ in1 = (q15_t) *py--;
+ in2 = (q15_t) *py--;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
/* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
sum = __SMLAD(input1, input2, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* Perform the multiply-accumulates */
/* sum += x[srcALen-1] * y[srcBLen-1] */
sum += ((q31_t) * px++ * *py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -663,15 +685,14 @@
px = ++pSrc1;
py = pSrc2;
- /* Decrement the MAC count */
+ /* Decrement MAC count */
count--;
/* Decrement the loop counter */
blockSize3--;
-
}
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
@@ -679,19 +700,18 @@
return (status);
#else
+/* alternate version for CM0_FAMILY */
- /* Run the below code for Cortex-M0 */
-
- q7_t *pIn1 = pSrcA; /* inputA pointer */
- q7_t *pIn2 = pSrcB; /* inputB pointer */
- q31_t sum; /* Accumulator */
- uint32_t i, j; /* loop counters */
- arm_status status; /* status of Partial convolution */
+ const q7_t *pIn1 = pSrcA; /* InputA pointer */
+ const q7_t *pIn2 = pSrcB; /* InputB pointer */
+ q31_t sum; /* Accumulator */
+ uint32_t i, j; /* Loop counters */
+ arm_status status; /* Status of Partial convolution */
/* Check for range of output samples to be calculated */
if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
{
- /* Set status as ARM_ARGUMENT_ERROR */
+ /* Set status as ARM_MATH_ARGUMENT_ERROR */
status = ARM_MATH_ARGUMENT_ERROR;
}
else
@@ -703,7 +723,7 @@
sum = 0;
/* Loop to perform MAC operations according to convolution equation */
- for (j = 0; j <= i; j++)
+ for (j = 0U; j <= i; j++)
{
/* Check the array limitations */
if (((i - j) < srcBLen) && (j < srcALen))
@@ -716,15 +736,18 @@
/* Store the output in the destination buffer */
pDst[i] = (q7_t) __SSAT((sum >> 7U), 8U);
}
- /* set status as ARM_SUCCESS as there are no argument errors */
+
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
+
+ /* Return to application */
return (status);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
}
/**
- * @} end of PartialConv group
+ @} end of PartialConv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c
index 9c4590f..f2cdcae 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c
@@ -3,13 +3,13 @@
* Title: arm_conv_q15.c
* Description: Convolution of Q15 sequences
*
- * $Date: 10. December 2018
- * $Revision: V.1.5.2
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2018 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,62 +29,56 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Conv
- * @{
+ @addtogroup Conv
+ @{
*/
/**
- * @brief Convolution of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * This approach provides 33 guard bits and there is no risk of overflow.
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
- *
- * \par
- * Refer to <code>arm_conv_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
- *
- * \par
- * Refer the function <code>arm_conv_opt_q15()</code> for a faster implementation of this function using scratch buffers.
- *
+ @brief Convolution of Q15 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+ The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+ This approach provides 33 guard bits and there is no risk of overflow.
+ The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+
+ @remark
+ Refer to \ref arm_conv_fast_q15() for a faster but less precise version of this function.
+ @remark
+ Refer to \ref arm_conv_opt_q15() for a faster implementation of this function using scratch buffers.
*/
void arm_conv_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst)
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst)
{
-#if !defined(ARM_MATH_CM0_FAMILY) && !defined(UNALIGNED_SUPPORT_DISABLE)
+#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *pOut = pDst; /* output pointer */
- q63_t sum, acc0, acc1, acc2, acc3; /* Accumulator */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- q15_t *pSrc1, *pSrc2; /* Intermediate pointers */
- q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt; /* loop counter */
+ const q15_t *pIn1; /* InputA pointer */
+ const q15_t *pIn2; /* InputB pointer */
+ q15_t *pOut = pDst; /* Output pointer */
+ q63_t sum, acc0, acc1, acc2, acc3; /* Accumulators */
+ const q15_t *px; /* Intermediate inputA pointer */
+ const q15_t *py; /* Intermediate inputB pointer */
+ const q15_t *pSrc1, *pSrc2; /* Intermediate pointers */
+ q31_t x0, x1, x2, x3, c0; /* Temporary input variables to hold state and coefficient values */
+ uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ uint32_t j, k, count, blkCnt; /* Loop counters */
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -145,7 +139,6 @@
/* Working pointer of inputB */
py = pIn2;
-
/* ------------------------
* Stage1 process
* ----------------------*/
@@ -169,7 +162,7 @@
/* Perform the multiply-accumulates */
sum = __SMLALD(*px++, *py--, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -180,10 +173,10 @@
py = pIn2 + count;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -205,13 +198,13 @@
** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
- sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
/* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
- sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -225,10 +218,10 @@
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum = __SMLALD(*px++, *py--, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -239,10 +232,10 @@
py = pIn2 + (count - 1U);
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -266,17 +259,16 @@
/* count is the index by which the pointer pIn1 to be incremented */
count = 0U;
-
- /* --------------------
+ /* -------------------
* Stage2 process
- * -------------------*/
+ * ------------------*/
/* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
* So, to loop unroll over blockSize2,
* srcBLen should be greater than or equal to 4 */
if (srcBLen >= 4U)
{
- /* Loop unroll over blockSize2, by 4 */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize2 >> 2U;
while (blkCnt > 0U)
@@ -289,13 +281,12 @@
acc2 = 0;
acc3 = 0;
-
/* read x[0], x[1] samples */
- x0 = *__SIMD32(px);
- /* read x[1], x[2] samples */
- x1 = _SIMD32_OFFSET(px+1);
- px+= 2U;
+ x0 = read_q15x2 ((q15_t *) px);
+ /* read x[1], x[2] samples */
+ x1 = read_q15x2 ((q15_t *) px + 1);
+ px += 2U;
/* Apply loop unrolling and compute 4 MACs simultaneously. */
k = srcBLen >> 2U;
@@ -306,7 +297,7 @@
{
/* Read the last two inputB samples using SIMD:
* y[srcBLen - 1] and y[srcBLen - 2] */
- c0 = *__SIMD32(py)--;
+ c0 = read_q15x2_da ((q15_t **) &py);
/* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
acc0 = __SMLALDX(x0, c0, acc0);
@@ -315,10 +306,10 @@
acc1 = __SMLALDX(x1, c0, acc1);
/* Read x[2], x[3] */
- x2 = *__SIMD32(px);
+ x2 = read_q15x2 ((q15_t *) px);
/* Read x[3], x[4] */
- x3 = _SIMD32_OFFSET(px+1);
+ x3 = read_q15x2 ((q15_t *) px + 1);
/* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
acc2 = __SMLALDX(x2, c0, acc2);
@@ -327,7 +318,7 @@
acc3 = __SMLALDX(x3, c0, acc3);
/* Read y[srcBLen - 3] and y[srcBLen - 4] */
- c0 = *__SIMD32(py)--;
+ c0 = read_q15x2_da ((q15_t **) &py);
/* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
acc0 = __SMLALDX(x2, c0, acc0);
@@ -336,10 +327,11 @@
acc1 = __SMLALDX(x3, c0, acc1);
/* Read x[4], x[5] */
- x0 = _SIMD32_OFFSET(px+2);
+ x0 = read_q15x2 ((q15_t *) px + 2);
/* Read x[5], x[6] */
- x1 = _SIMD32_OFFSET(px+3);
+ x1 = read_q15x2 ((q15_t *) px + 3);
+
px += 4U;
/* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
@@ -360,22 +352,18 @@
if (k == 1U)
{
/* Read y[srcBLen - 5] */
- c0 = *(py+1);
-
+ c0 = *(py + 1);
#ifdef ARM_MATH_BIG_ENDIAN
-
c0 = c0 << 16U;
-
#else
-
c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
/* Read x[7] */
- x3 = *__SIMD32(px);
+ x3 = read_q15x2 ((q15_t *) px);
px++;
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
acc0 = __SMLALD(x0, c0, acc0);
acc1 = __SMLALD(x1, c0, acc1);
acc2 = __SMLALDX(x1, c0, acc2);
@@ -385,16 +373,16 @@
if (k == 2U)
{
/* Read y[srcBLen - 5], y[srcBLen - 6] */
- c0 = _SIMD32_OFFSET(py);
+ c0 = read_q15x2 ((q15_t *) py);
/* Read x[7], x[8] */
- x3 = *__SIMD32(px);
+ x3 = read_q15x2 ((q15_t *) px);
/* Read x[9] */
- x2 = _SIMD32_OFFSET(px+1);
+ x2 = read_q15x2 ((q15_t *) px + 1);
px += 2U;
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
acc0 = __SMLALDX(x0, c0, acc0);
acc1 = __SMLALDX(x1, c0, acc1);
acc2 = __SMLALDX(x3, c0, acc2);
@@ -404,31 +392,29 @@
if (k == 3U)
{
/* Read y[srcBLen - 5], y[srcBLen - 6] */
- c0 = _SIMD32_OFFSET(py);
+ c0 = read_q15x2 ((q15_t *) py);
/* Read x[7], x[8] */
- x3 = *__SIMD32(px);
+ x3 = read_q15x2 ((q15_t *) px);
/* Read x[9] */
- x2 = _SIMD32_OFFSET(px+1);
+ x2 = read_q15x2 ((q15_t *) px + 1);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
acc0 = __SMLALDX(x0, c0, acc0);
acc1 = __SMLALDX(x1, c0, acc1);
acc2 = __SMLALDX(x3, c0, acc2);
acc3 = __SMLALDX(x2, c0, acc3);
c0 = *(py-1);
-
#ifdef ARM_MATH_BIG_ENDIAN
-
c0 = c0 << 16U;
#else
-
c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+
/* Read x[10] */
- x3 = _SIMD32_OFFSET(px+2);
+ x3 = read_q15x2 ((q15_t *) px + 2);
px += 3U;
/* Perform the multiply-accumulates */
@@ -438,23 +424,13 @@
acc3 = __SMLALDX(x3, c0, acc3);
}
-
- /* Store the results in the accumulators in the destination buffer. */
-
+ /* Store the result in the accumulator in the destination buffer. */
#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
#else
-
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
- *__SIMD32(pOut)++ =
- __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+ write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Increment the pointer pIn1 index, count by 4 */
@@ -464,7 +440,7 @@
px = pIn1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -485,12 +461,12 @@
while (k > 0U)
{
/* Perform the multiply-accumulates */
- sum += (q63_t) ((q31_t) * px++ * *py--);
- sum += (q63_t) ((q31_t) * px++ * *py--);
- sum += (q63_t) ((q31_t) * px++ * *py--);
- sum += (q63_t) ((q31_t) * px++ * *py--);
+ sum += (q63_t) ((q31_t) *px++ * *py--);
+ sum += (q63_t) ((q31_t) *px++ * *py--);
+ sum += (q63_t) ((q31_t) *px++ * *py--);
+ sum += (q63_t) ((q31_t) *px++ * *py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -501,7 +477,7 @@
while (k > 0U)
{
/* Perform the multiply-accumulates */
- sum += (q63_t) ((q31_t) * px++ * *py--);
+ sum += (q63_t) ((q31_t) *px++ * *py--);
/* Decrement the loop counter */
k--;
@@ -538,7 +514,7 @@
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += (q63_t) ((q31_t) * px++ * *py--);
+ sum += (q63_t) ((q31_t) *px++ * *py--);
/* Decrement the loop counter */
k--;
@@ -573,7 +549,6 @@
/* In this stage the MAC operations are decreased by 1 for every iteration.
The blockSize3 variable holds the number of MAC operations performed */
-
blockSize3 = srcBLen - 1U;
/* Working pointer of inputA */
@@ -608,14 +583,15 @@
** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
+ /* Perform the multiply-accumulate */
/* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
* with y[srcBLen - 1], y[srcBLen - 2] respectively */
- sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
/* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
* with y[srcBLen - 3], y[srcBLen - 4] respectively */
- sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+ sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -632,7 +608,7 @@
/* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
sum = __SMLALD(*px++, *py--, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -643,7 +619,7 @@
px = ++pSrc1;
py = pIn2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize3--;
j--;
@@ -668,7 +644,7 @@
/* sum += x[srcALen-1] * y[srcBLen-1] */
sum = __SMLALD(*px++, *py--, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -679,33 +655,31 @@
px = ++pSrc1;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize3--;
}
-#else
+#else /* #if defined (ARM_MATH_DSP) */
-/* Run the below code for Cortex-M0 */
+ const q15_t *pIn1 = pSrcA; /* InputA pointer */
+ const q15_t *pIn2 = pSrcB; /* InputB pointer */
+ q63_t sum; /* Accumulator */
+ uint32_t i, j; /* Loop counters */
- q15_t *pIn1 = pSrcA; /* input pointer */
- q15_t *pIn2 = pSrcB; /* coefficient pointer */
- q63_t sum; /* Accumulator */
- uint32_t i, j; /* loop counter */
-
- /* Loop to calculate output of convolution for output length number of times */
+ /* Loop to calculate convolution for output length number of values */
for (i = 0; i < (srcALen + srcBLen - 1); i++)
{
/* Initialize sum with zero to carry on MAC operations */
sum = 0;
/* Loop to perform MAC operations according to convolution equation */
- for (j = 0; j <= i; j++)
+ for (j = 0U; j <= i; j++)
{
/* Check the array limitations */
if (((i - j) < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
- sum += (q31_t) pIn1[j] * (pIn2[i - j]);
+ sum += ((q31_t) pIn1[j] * pIn2[i - j]);
}
}
@@ -713,10 +687,10 @@
pDst[i] = (q15_t) __SSAT((sum >> 15U), 16U);
}
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) && !defined(UNALIGNED_SUPPORT_DISABLE) */
+#endif /* #if defined (ARM_MATH_DSP) */
}
/**
- * @} end of Conv group
+ @} end of Conv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c
index 2dda9d4..e3547cd 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c
@@ -3,13 +3,13 @@
* Title: arm_conv_q31.c
* Description: Convolution of Q31 sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,63 +29,62 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Conv
- * @{
+ @addtogroup Conv
+ @{
*/
/**
- * @brief Convolution of Q31 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * There is no saturation on intermediate additions.
- * Thus, if the accumulator overflows it wraps around and distorts the result.
- * The input signals should be scaled down to avoid intermediate overflows.
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
- *
- * \par
- * See <code>arm_conv_fast_q31()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
+ @brief Convolution of Q31 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ There is no saturation on intermediate additions.
+ Thus, if the accumulator overflows it wraps around and distorts the result.
+ The input signals should be scaled down to avoid intermediate overflows.
+ Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+ as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+ The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+
+ @remark
+ Refer to \ref arm_conv_fast_q31() for a faster but less precise implementation of this function.
*/
void arm_conv_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst)
+ const q31_t * pSrcA,
+ uint32_t srcALen,
+ const q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst)
{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
-#if defined (ARM_MATH_DSP)
+ const q31_t *pIn1; /* InputA pointer */
+ const q31_t *pIn2; /* InputB pointer */
+ q31_t *pOut = pDst; /* Output pointer */
+ const q31_t *px; /* Intermediate inputA pointer */
+ const q31_t *py; /* Intermediate inputB pointer */
+ const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */
+ q63_t sum; /* Accumulators */
+ uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ uint32_t j, k, count, blkCnt; /* Loop counters */
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q31_t *pIn1; /* inputA pointer */
- q31_t *pIn2; /* inputB pointer */
- q31_t *pOut = pDst; /* output pointer */
- q31_t *px; /* Intermediate inputA pointer */
- q31_t *py; /* Intermediate inputB pointer */
- q31_t *pSrc1, *pSrc2; /* Intermediate pointers */
- q63_t sum; /* Accumulator */
- q63_t acc0, acc1, acc2; /* Accumulator */
- q31_t x0, x1, x2, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3; /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q63_t acc0, acc1, acc2; /* Accumulators */
+ q31_t x0, x1, x2, c0; /* Temporary variables to hold state and coefficient values */
+#endif
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -101,10 +100,10 @@
else
{
/* Initialization of inputA pointer */
- pIn1 = (q31_t *) pSrcB;
+ pIn1 = pSrcB;
/* Initialization of inputB pointer */
- pIn2 = (q31_t *) pSrcA;
+ pIn2 = pSrcA;
/* srcBLen is always considered as shorter or equal to srcALen */
j = srcBLen;
@@ -158,36 +157,45 @@
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* x[0] * y[srcBLen - 1] */
- sum += (q63_t) * px++ * (*py--);
- /* x[1] * y[srcBLen - 2] */
- sum += (q63_t) * px++ * (*py--);
- /* x[2] * y[srcBLen - 3] */
- sum += (q63_t) * px++ * (*py--);
- /* x[3] * y[srcBLen - 4] */
- sum += (q63_t) * px++ * (*py--);
+ sum += (q63_t) *px++ * (*py--);
- /* Decrement the loop counter */
+ /* x[1] * y[srcBLen - 2] */
+ sum += (q63_t) *px++ * (*py--);
+
+ /* x[2] * y[srcBLen - 3] */
+ sum += (q63_t) *px++ * (*py--);
+
+ /* x[3] * y[srcBLen - 4] */
+ sum += (q63_t) *px++ * (*py--);
+
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize k with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += (q63_t) * px++ * (*py--);
+ sum += (q63_t) *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -198,10 +206,10 @@
py = pIn2 + count;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -210,7 +218,7 @@
* ------------------------*/
/* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
- * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+ * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
* ....
* sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
*/
@@ -234,6 +242,8 @@
* srcBLen should be greater than or equal to 4 */
if (srcBLen >= 4U)
{
+#if defined (ARM_MATH_LOOPUNROLL)
+
/* Loop unroll by 3 */
blkCnt = blockSize2 / 3;
@@ -257,11 +267,10 @@
{
/* Read y[srcBLen - 1] sample */
c0 = *(py);
-
/* Read x[3] sample */
x2 = *(px);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[0] * y[srcBLen - 1] */
acc0 += ((q63_t) x0 * c0);
/* acc1 += x[1] * y[srcBLen - 1] */
@@ -271,7 +280,6 @@
/* Read y[srcBLen - 2] sample */
c0 = *(py - 1U);
-
/* Read x[4] sample */
x0 = *(px + 1U);
@@ -285,11 +293,10 @@
/* Read y[srcBLen - 3] sample */
c0 = *(py - 2U);
-
/* Read x[5] sample */
x1 = *(px + 2U);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[2] * y[srcBLen - 3] */
acc0 += ((q63_t) x2 * c0);
/* acc1 += x[3] * y[srcBLen - 2] */
@@ -311,7 +318,6 @@
{
/* Read y[srcBLen - 5] sample */
c0 = *py--;
-
/* Read x[7] sample */
x2 = *px++;
@@ -327,11 +333,11 @@
x0 = x1;
x1 = x2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* Store the results in the accumulators in the destination buffer. */
+ /* Store the result in the accumulator in the destination buffer. */
*pOut++ = (q31_t) (acc0 >> 31);
*pOut++ = (q31_t) (acc1 >> 31);
*pOut++ = (q31_t) (acc2 >> 31);
@@ -343,44 +349,56 @@
px = pIn1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize2 - 3 * (blockSize2 / 3);
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = srcBLen >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* Perform the multiply-accumulates */
- sum += (q63_t) * px++ * (*py--);
- sum += (q63_t) * px++ * (*py--);
- sum += (q63_t) * px++ * (*py--);
- sum += (q63_t) * px++ * (*py--);
+ sum += (q63_t) *px++ * *py--;
+ sum += (q63_t) *px++ * *py--;
+ sum += (q63_t) *px++ * *py--;
+ sum += (q63_t) *px++ * *py--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = srcBLen % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += (q63_t) * px++ * (*py--);
+ sum += (q63_t) *px++ * *py--;
/* Decrement the loop counter */
k--;
@@ -389,14 +407,14 @@
/* Store the result in the accumulator in the destination buffer. */
*pOut++ = (q31_t) (sum >> 31);
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pIn1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -417,7 +435,7 @@
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += (q63_t) * px++ * (*py--);
+ sum += (q63_t) *px++ * *py--;
/* Decrement the loop counter */
k--;
@@ -426,14 +444,14 @@
/* Store the result in the accumulator in the destination buffer. */
*pOut++ = (q31_t) (sum >> 31);
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pIn1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -470,36 +488,47 @@
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = blockSize3 >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
- sum += (q63_t) * px++ * (*py--);
- /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
- sum += (q63_t) * px++ * (*py--);
- /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
- sum += (q63_t) * px++ * (*py--);
- /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
- sum += (q63_t) * px++ * (*py--);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
- k = blockSize3 % 0x4U;
-
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += (q63_t) * px++ * (*py--);
+ /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+ sum += (q63_t) *px++ * *py--;
- /* Decrement the loop counter */
+ /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+ sum += (q63_t) *px++ * *py--;
+
+ /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+ sum += (q63_t) *px++ * *py--;
+
+ /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+ sum += (q63_t) *px++ * *py--;
+
+ /* Decrement loop counter */
+ k--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ k = blockSize3 % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = blockSize3;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (k > 0U)
+ {
+ /* Perform the multiply-accumulate */
+ /* sum += x[srcALen-1] * y[srcBLen-1] */
+ sum += (q63_t) *px++ * *py--;
+
+ /* Decrement loop counter */
k--;
}
@@ -510,33 +539,32 @@
px = ++pSrc1;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize3--;
}
#else
+/* alternate version for CM0_FAMILY */
- /* Run the below code for Cortex-M0 */
+ const q31_t *pIn1 = pSrcA; /* InputA pointer */
+ const q31_t *pIn2 = pSrcB; /* InputB pointer */
+ q63_t sum; /* Accumulators */
+ uint32_t i, j; /* Loop counters */
- q31_t *pIn1 = pSrcA; /* input pointer */
- q31_t *pIn2 = pSrcB; /* coefficient pointer */
- q63_t sum; /* Accumulator */
- uint32_t i, j; /* loop counter */
-
- /* Loop to calculate output of convolution for output length number of times */
- for (i = 0; i < (srcALen + srcBLen - 1); i++)
+ /* Loop to calculate convolution for output length number of times */
+ for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
{
- /* Initialize sum with zero to carry on MAC operations */
+ /* Initialize sum with zero to carry out MAC operations */
sum = 0;
/* Loop to perform MAC operations according to convolution equation */
- for (j = 0; j <= i; j++)
+ for (j = 0U; j <= i; j++)
{
/* Check the array limitations */
if (((i - j) < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
- sum += ((q63_t) pIn1[j] * (pIn2[i - j]));
+ sum += ((q63_t) pIn1[j] * pIn2[i - j]);
}
}
@@ -544,10 +572,10 @@
pDst[i] = (q31_t) (sum >> 31U);
}
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
}
/**
- * @} end of Conv group
+ @} end of Conv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c
index 94ac620..a2f853e 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c
@@ -3,13 +3,13 @@
* Title: arm_conv_q7.c
* Description: Convolution of Q7 sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,62 +29,60 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Conv
- * @{
+ @addtogroup Conv
+ @{
*/
/**
- * @brief Convolution of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
- * This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
- *
- * \par
- * Refer the function <code>arm_conv_opt_q7()</code> for a faster implementation of this function.
- *
+ @brief Convolution of Q7 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 32-bit internal accumulator.
+ Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+ The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+ This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
+ The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
+ @remark
+ Refer to \ref arm_conv_opt_q7() for a faster implementation of this function.
*/
void arm_conv_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst)
+ const q7_t * pSrcA,
+ uint32_t srcALen,
+ const q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst)
{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
-#if defined (ARM_MATH_DSP)
+ const q7_t *pIn1; /* InputA pointer */
+ const q7_t *pIn2; /* InputB pointer */
+ q7_t *pOut = pDst; /* Output pointer */
+ const q7_t *px; /* Intermediate inputA pointer */
+ const q7_t *py; /* Intermediate inputB pointer */
+ const q7_t *pSrc1, *pSrc2; /* Intermediate pointers */
+ q31_t sum; /* Accumulators */
+ uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ uint32_t j, k, count, blkCnt; /* Loop counters */
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q7_t *pIn1; /* inputA pointer */
- q7_t *pIn2; /* inputB pointer */
- q7_t *pOut = pDst; /* output pointer */
- q7_t *px; /* Intermediate inputA pointer */
- q7_t *py; /* Intermediate inputB pointer */
- q7_t *pSrc1, *pSrc2; /* Intermediate pointers */
- q7_t x0, x1, x2, x3, c0, c1; /* Temporary variables to hold state and coefficient values */
- q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */
- q31_t input1, input2; /* Temporary input variables */
- q15_t in1, in2; /* Temporary input variables */
- uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3; /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t acc0, acc1, acc2, acc3; /* Accumulators */
+ q31_t input1, input2; /* Temporary input variables */
+ q15_t in1, in2; /* Temporary input variables */
+ q7_t x0, x1, x2, x3, c0, c1; /* Temporary variables to hold state and coefficient values */
+#endif
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -123,7 +121,7 @@
/* The algorithm is implemented in three stages.
The loop counters of each stage is initiated here. */
blockSize1 = srcBLen - 1U;
- blockSize2 = (srcALen - srcBLen) + 1U;
+ blockSize2 = srcALen - (srcBLen - 1U);
blockSize3 = blockSize1;
/* --------------------------
@@ -157,21 +155,21 @@
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* x[0] , x[1] */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* y[srcBLen - 1] , y[srcBLen - 2] */
- in1 = (q15_t) * py--;
- in2 = (q15_t) * py--;
+ in1 = (q15_t) *py--;
+ in2 = (q15_t) *py--;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* x[0] * y[srcBLen - 1] */
@@ -179,33 +177,39 @@
sum = __SMLAD(input1, input2, sum);
/* x[2] , x[3] */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* y[srcBLen - 3] , y[srcBLen - 4] */
- in1 = (q15_t) * py--;
- in2 = (q15_t) * py--;
+ in1 = (q15_t) *py--;
+ in2 = (q15_t) *py--;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* x[2] * y[srcBLen - 3] */
/* x[3] * y[srcBLen - 4] */
sum = __SMLAD(input1, input2, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize k with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
- sum += ((q15_t) * px++ * *py--);
+ /* Perform the multiply-accumulate */
+ sum += ((q15_t) *px++ * *py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -216,10 +220,10 @@
py = pIn2 + count;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -228,7 +232,7 @@
* ------------------------*/
/* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
- * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+ * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
* ....
* sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
*/
@@ -252,7 +256,9 @@
* srcBLen should be greater than or equal to 4 */
if (srcBLen >= 4U)
{
- /* Loop unroll over blockSize2, by 4 */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize2 >> 2U;
while (blkCnt > 0U)
@@ -391,7 +397,6 @@
{
/* Read y[srcBLen - 5] sample */
c0 = *py--;
-
/* Read x[7] sample */
x3 = *px++;
@@ -410,11 +415,10 @@
x1 = x2;
x2 = x3;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
-
/* Store the result in the accumulator in the destination buffer. */
*pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
*pOut++ = (q7_t) (__SSAT(acc1 >> 7U, 8));
@@ -428,65 +432,77 @@
px = pIn1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize2 % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = srcBLen >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* Reading two inputs of SrcA buffer and packing */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* Reading two inputs of SrcB buffer and packing */
- in1 = (q15_t) * py--;
- in2 = (q15_t) * py--;
+ in1 = (q15_t) *py--;
+ in2 = (q15_t) *py--;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum = __SMLAD(input1, input2, sum);
/* Reading two inputs of SrcA buffer and packing */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* Reading two inputs of SrcB buffer and packing */
- in1 = (q15_t) * py--;
- in2 = (q15_t) * py--;
+ in1 = (q15_t) *py--;
+ in2 = (q15_t) *py--;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum = __SMLAD(input1, input2, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = srcBLen % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
- sum += ((q15_t) * px++ * *py--);
+ /* Perform the multiply-accumulate */
+ sum += ((q15_t) *px++ * *py--);
/* Decrement the loop counter */
k--;
@@ -523,7 +539,7 @@
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += ((q15_t) * px++ * *py--);
+ sum += ((q15_t) *px++ * *py--);
/* Decrement the loop counter */
k--;
@@ -539,7 +555,7 @@
px = pIn1 + count;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -576,21 +592,21 @@
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = blockSize3 >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
- in1 = (q15_t) * py--;
- in2 = (q15_t) * py--;
+ in1 = (q15_t) *py--;
+ in2 = (q15_t) *py--;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
@@ -598,33 +614,40 @@
sum = __SMLAD(input1, input2, sum);
/* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
- in1 = (q15_t) * py--;
- in2 = (q15_t) * py--;
+ in1 = (q15_t) *py--;
+ in2 = (q15_t) *py--;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
/* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
sum = __SMLAD(input1, input2, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = blockSize3 % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = blockSize3;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
- sum += ((q15_t) * px++ * *py--);
+ /* Perform the multiply-accumulate */
+ /* sum += x[srcALen-1] * y[srcBLen-1] */
+ sum += ((q15_t) *px++ * *py--);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -635,33 +658,32 @@
px = ++pSrc1;
py = pSrc2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize3--;
}
#else
+/* alternate version for CM0_FAMILY */
- /* Run the below code for Cortex-M0 */
+ const q7_t *pIn1 = pSrcA; /* InputA pointer */
+ const q7_t *pIn2 = pSrcB; /* InputB pointer */
+ q31_t sum; /* Accumulator */
+ uint32_t i, j; /* Loop counters */
- q7_t *pIn1 = pSrcA; /* input pointer */
- q7_t *pIn2 = pSrcB; /* coefficient pointer */
- q31_t sum; /* Accumulator */
- uint32_t i, j; /* loop counter */
-
- /* Loop to calculate output of convolution for output length number of times */
- for (i = 0; i < (srcALen + srcBLen - 1); i++)
+ /* Loop to calculate convolution for output length number of times */
+ for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
{
- /* Initialize sum with zero to carry on MAC operations */
+ /* Initialize sum with zero to carry out MAC operations */
sum = 0;
/* Loop to perform MAC operations according to convolution equation */
- for (j = 0; j <= i; j++)
+ for (j = 0U; j <= i; j++)
{
/* Check the array limitations */
if (((i - j) < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
- sum += (q15_t) pIn1[j] * (pIn2[i - j]);
+ sum += ((q15_t) pIn1[j] * pIn2[i - j]);
}
}
@@ -669,10 +691,10 @@
pDst[i] = (q7_t) __SSAT((sum >> 7U), 8U);
}
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
}
/**
- * @} end of Conv group
+ @} end of Conv group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c
index 12031f1..2ff78b5 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c
@@ -3,13 +3,13 @@
* Title: arm_correlate_f32.c
* Description: Correlation of floating-point sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,102 +29,97 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @defgroup Corr Correlation
- *
- * Correlation is a mathematical operation that is similar to convolution.
- * As with convolution, correlation uses two signals to produce a third signal.
- * The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution.
- * Correlation is commonly used to measure the similarity between two signals.
- * It has applications in pattern recognition, cryptanalysis, and searching.
- * The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types.
- * Fast versions of the Q15 and Q31 functions are also provided.
- *
- * \par Algorithm
- * Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and <code>srcBLen</code> samples respectively.
- * The convolution of the two signals is denoted by
- * <pre>
- * c[n] = a[n] * b[n]
- * </pre>
- * In correlation, one of the signals is flipped in time
- * <pre>
- * c[n] = a[n] * b[-n]
- * </pre>
- *
- * \par
- * and this is mathematically defined as
- * \image html CorrelateEquation.gif
- * \par
- * The <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>.
- * The result <code>c[n]</code> is of length <code>2 * max(srcALen, srcBLen) - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2)</code>.
- * The output result is written to <code>pDst</code> and the calling function must allocate <code>2 * max(srcALen, srcBLen) - 1</code> words for the result.
- *
- * <b>Note</b>
- * \par
- * The <code>pDst</code> should be initialized to all zeros before being used.
- *
- * <b>Fixed-Point Behavior</b>
- * \par
- * Correlation requires summing up a large number of intermediate products.
- * As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
- * Refer to the function specific documentation below for further details of the particular algorithm used.
- *
- *
- * <b>Fast Versions</b>
- *
- * \par
- * Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.
- *
- *
- * <b>Opt Versions</b>
- *
- * \par
- * Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of correlate
+ @defgroup Corr Correlation
+
+ Correlation is a mathematical operation that is similar to convolution.
+ As with convolution, correlation uses two signals to produce a third signal.
+ The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution.
+ Correlation is commonly used to measure the similarity between two signals.
+ It has applications in pattern recognition, cryptanalysis, and searching.
+ The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types.
+ Fast versions of the Q15 and Q31 functions are also provided.
+
+ @par Algorithm
+ Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and <code>srcBLen</code> samples respectively.
+ The convolution of the two signals is denoted by
+ <pre>
+ c[n] = a[n] * b[n]
+ </pre>
+ In correlation, one of the signals is flipped in time
+ <pre>
+ c[n] = a[n] * b[-n]
+ </pre>
+ @par
+ and this is mathematically defined as
+ \image html CorrelateEquation.gif
+ @par
+ The <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>.
+ The result <code>c[n]</code> is of length <code>2 * max(srcALen, srcBLen) - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2)</code>.
+ The output result is written to <code>pDst</code> and the calling function must allocate <code>2 * max(srcALen, srcBLen) - 1</code> words for the result.
+
+ @note
+ The <code>pDst</code> should be initialized to all zeros before being used.
+
+ @par Fixed-Point Behavior
+ Correlation requires summing up a large number of intermediate products.
+ As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
+ Refer to the function specific documentation below for further details of the particular algorithm used.
+
+ @par Fast Versions
+ Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires
+ the input signals should be scaled down to avoid intermediate overflows.
+
+ @par Opt Versions
+ Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation.
+ These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of correlate
*/
/**
- * @addtogroup Corr
- * @{
+ @addtogroup Corr
+ @{
*/
+
/**
- * @brief Correlation of floating-point sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
+ @brief Correlation of floating-point sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
+ @return none
*/
void arm_correlate_f32(
- float32_t * pSrcA,
- uint32_t srcALen,
- float32_t * pSrcB,
- uint32_t srcBLen,
- float32_t * pDst)
+ const float32_t * pSrcA,
+ uint32_t srcALen,
+ const float32_t * pSrcB,
+ uint32_t srcBLen,
+ float32_t * pDst)
{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
-#if defined (ARM_MATH_DSP)
+ const float32_t *pIn1; /* InputA pointer */
+ const float32_t *pIn2; /* InputB pointer */
+ float32_t *pOut = pDst; /* Output pointer */
+ const float32_t *px; /* Intermediate inputA pointer */
+ const float32_t *py; /* Intermediate inputB pointer */
+ const float32_t *pSrc1; /* Intermediate pointers */
+ float32_t sum; /* Accumulators */
+ uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ uint32_t j, k, count, blkCnt; /* Loop counters */
+ uint32_t outBlockSize; /* Loop counter */
+ int32_t inc = 1; /* Destination address modifier */
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- float32_t *pIn1; /* inputA pointer */
- float32_t *pIn2; /* inputB pointer */
- float32_t *pOut = pDst; /* output pointer */
- float32_t *px; /* Intermediate inputA pointer */
- float32_t *py; /* Intermediate inputB pointer */
- float32_t *pSrc1; /* Intermediate pointers */
- float32_t sum, acc0, acc1, acc2, acc3; /* Accumulators */
- float32_t x0, x1, x2, x3, c0; /* temporary variables for holding input and coefficient values */
- uint32_t j, k = 0U, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3; /* loop counters */
- int32_t inc = 1; /* Destination address modifier */
-
+#if defined (ARM_MATH_LOOPUNROLL)
+ float32_t acc0, acc1, acc2, acc3; /* Accumulators */
+ float32_t x0, x1, x2, x3, c0; /* Temporary variables for holding input and coefficient values */
+#endif
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -192,14 +187,15 @@
}
/* The function is internally
- * divided into three parts according to the number of multiplications that has to be
- * taken place between inputA samples and inputB samples. In the first part of the
+ * divided into three stages according to the number of multiplications that has to be
+ * taken place between inputA samples and inputB samples. In the first stage of the
* algorithm, the multiplications increase by one for every iteration.
- * In the second part of the algorithm, srcBLen number of multiplications are done.
- * In the third part of the algorithm, the multiplications decrease by one
- * for every iteration.*/
+ * In the second stage of the algorithm, srcBLen number of multiplications are done.
+ * In the third stage of the algorithm, the multiplications decrease by one
+ * for every iteration. */
+
/* The algorithm is implemented in three stages.
- * The loop counters of each stage is initiated here. */
+ The loop counters of each stage is initiated here. */
blockSize1 = srcBLen - 1U;
blockSize2 = srcALen - (srcBLen - 1U);
blockSize3 = blockSize1;
@@ -235,37 +231,46 @@
/* Accumulator is made zero for every iteration */
sum = 0.0f;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* x[0] * y[srcBLen - 4] */
sum += *px++ * *py++;
+
/* x[1] * y[srcBLen - 3] */
sum += *px++ * *py++;
+
/* x[2] * y[srcBLen - 2] */
sum += *px++ * *py++;
+
/* x[3] * y[srcBLen - 1] */
sum += *px++ * *py++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize k with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* Perform the multiply-accumulate */
/* x[0] * y[srcBLen - 1] */
sum += *px++ * *py++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -278,10 +283,10 @@
py = pSrc1 - count;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -290,7 +295,7 @@
* ------------------------*/
/* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
- * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
+ * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
* ....
* sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
*/
@@ -310,10 +315,12 @@
/* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
* So, to loop unroll over blockSize2,
- * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
+ * srcBLen should be greater than or equal to 4 */
if (srcBLen >= 4U)
{
- /* Loop unroll over blockSize2, by 4 */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize2 >> 2U;
while (blkCnt > 0U)
@@ -325,9 +332,9 @@
acc3 = 0.0f;
/* read x[0], x[1], x[2] samples */
- x0 = *(px++);
- x1 = *(px++);
- x2 = *(px++);
+ x0 = *px++;
+ x1 = *px++;
+ x2 = *px++;
/* Apply loop unrolling and compute 4 MACs simultaneously. */
k = srcBLen >> 2U;
@@ -338,7 +345,6 @@
{
/* Read y[0] sample */
c0 = *(py++);
-
/* Read x[3] sample */
x3 = *(px++);
@@ -354,7 +360,6 @@
/* Read y[1] sample */
c0 = *(py++);
-
/* Read x[4] sample */
x0 = *(px++);
@@ -370,11 +375,10 @@
/* Read y[2] sample */
c0 = *(py++);
-
/* Read x[5] sample */
x1 = *(px++);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[2] * y[2] */
acc0 += x2 * c0;
/* acc1 += x[3] * y[2] */
@@ -386,11 +390,10 @@
/* Read y[3] sample */
c0 = *(py++);
-
/* Read x[6] sample */
x2 = *(px++);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[3] * y[3] */
acc0 += x3 * c0;
/* acc1 += x[4] * y[3] */
@@ -400,7 +403,6 @@
/* acc3 += x[6] * y[3] */
acc3 += x2 * c0;
-
} while (--k);
/* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
@@ -411,11 +413,10 @@
{
/* Read y[4] sample */
c0 = *(py++);
-
/* Read x[7] sample */
x3 = *(px++);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[4] * y[4] */
acc0 += x0 * c0;
/* acc1 += x[5] * y[4] */
@@ -455,40 +456,52 @@
px = pIn1 + count;
py = pIn2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize2 % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0.0f;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = srcBLen >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum += *px++ * *py++;
sum += *px++ * *py++;
sum += *px++ * *py++;
sum += *px++ * *py++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = srcBLen % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* Perform the multiply-accumulate */
@@ -554,6 +567,7 @@
}
}
+
/* --------------------------
* Initializations of stage3
* -------------------------*/
@@ -585,37 +599,46 @@
/* Accumulator is made zero for every iteration */
sum = 0.0f;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* sum += x[srcALen - srcBLen + 4] * y[3] */
sum += *px++ * *py++;
+
/* sum += x[srcALen - srcBLen + 3] * y[2] */
sum += *px++ * *py++;
+
/* sum += x[srcALen - srcBLen + 2] * y[1] */
sum += *px++ * *py++;
+
/* sum += x[srcALen - srcBLen + 1] * y[0] */
sum += *px++ * *py++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum += *px++ * *py++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -628,7 +651,7 @@
px = ++pSrc1;
py = pIn2;
- /* Decrement the MAC count */
+ /* Decrement MAC count */
count--;
/* Decrement the loop counter */
@@ -636,15 +659,14 @@
}
#else
+/* alternate version for CM0_FAMILY */
- /* Run the below code for Cortex-M0 */
-
- float32_t *pIn1 = pSrcA; /* inputA pointer */
- float32_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */
- float32_t sum; /* Accumulator */
- uint32_t i = 0U, j; /* loop counters */
- uint32_t inv = 0U; /* Reverse order flag */
- uint32_t tot = 0U; /* Length */
+ const float32_t *pIn1 = pSrcA; /* inputA pointer */
+ const float32_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */
+ float32_t sum; /* Accumulator */
+ uint32_t i = 0U, j; /* Loop counters */
+ uint32_t inv = 0U; /* Reverse order flag */
+ uint32_t tot = 0U; /* Length */
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -698,7 +720,7 @@
/* Loop to calculate convolution for output length number of times */
for (i = 0U; i <= tot; i++)
{
- /* Initialize sum with zero to carry on MAC operations */
+ /* Initialize sum with zero to carry out MAC operations */
sum = 0.0f;
/* Loop to perform MAC operations according to convolution equation */
@@ -711,6 +733,7 @@
sum += pIn1[j] * pIn2[-((int32_t) i - j)];
}
}
+
/* Store the output in the destination buffer */
if (inv == 1)
*pDst-- = sum;
@@ -718,10 +741,10 @@
*pDst++ = sum;
}
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
}
/**
- * @} end of Corr group
+ @} end of Corr group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
index a1b0dbd..d55d9d8 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
@@ -3,13 +3,13 @@
* Title: arm_correlate_fast_opt_q15.c
* Description: Fast Q15 Correlation
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,70 +29,61 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Corr
- * @{
+ @addtogroup Corr
+ @{
*/
/**
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
- * @param[in] *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @return none.
- *
- *
- * \par Restrictions
- * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- * In this case input, output, scratch buffers should be aligned by 32-bit
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This fast version uses a 32-bit accumulator with 2.30 format.
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * There is no saturation on intermediate additions.
- * Thus, if the accumulator overflows it wraps around and distorts the result.
- * The input signals should be scaled down to avoid intermediate overflows.
- * Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
- *
- * \par
- * See <code>arm_correlate_q15()</code> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+ @brief Correlation of Q15 sequences (fast version).
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence.
+ @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
+ @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ This fast version uses a 32-bit accumulator with 2.30 format.
+ The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ There is no saturation on intermediate additions.
+ Thus, if the accumulator overflows it wraps around and distorts the result.
+ The input signals should be scaled down to avoid intermediate overflows.
+ Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a
+ maximum of min(srcALen, srcBLen) number of additions is carried internally.
+ The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+ @remark
+ Refer to \ref arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
*/
void arm_correlate_fast_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch)
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ q15_t * pScratch)
{
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q31_t acc0, acc1, acc2, acc3; /* Accumulators */
- q15_t *py; /* Intermediate inputB pointer */
- q31_t x1, x2, x3; /* temporary variables for holding input and coefficient values */
- uint32_t j, blkCnt, outBlockSize; /* loop counter */
- int32_t inc = 1; /* Destination address modifier */
- uint32_t tapCnt;
- q31_t y1, y2;
- q15_t *pScr; /* Intermediate pointers */
- q15_t *pOut = pDst; /* output pointer */
-#ifdef UNALIGNED_SUPPORT_DISABLE
+ const q15_t *pIn1; /* InputA pointer */
+ const q15_t *pIn2; /* InputB pointer */
+ q31_t acc0; /* Accumulators */
+ q15_t *pOut = pDst; /* Output pointer */
+ q15_t *pScr1 = pScratch; /* Temporary pointer for scratch */
+ const q15_t *py; /* Intermediate inputB pointer */
+ uint32_t j, blkCnt, outBlockSize; /* Loop counter */
+ int32_t inc = 1; /* Destination address modifier */
+ uint32_t tapCnt; /* Loop count */
- q15_t a, b;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t acc1, acc2, acc3; /* Accumulators */
+ q31_t x1, x2, x3; /* Temporary variables for holding input and coefficient values */
+ q31_t y1, y2; /* State variables */
+#endif
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -110,10 +101,10 @@
if (srcALen >= srcBLen)
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcA);
+ pIn1 = pSrcA;
/* Initialization of inputB pointer */
- pIn2 = (pSrcB);
+ pIn2 = pSrcB;
/* Number of output samples is calculated */
outBlockSize = (2U * srcALen) - 1U;
@@ -126,15 +117,14 @@
/* Updating the pointer position to non zero value */
pOut += j;
-
}
else
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcB);
+ pIn1 = pSrcB;
/* Initialization of inputB pointer */
- pIn2 = (pSrcA);
+ pIn2 = pSrcA;
/* srcBLen is always considered as shorter or equal to srcALen */
j = srcBLen;
@@ -147,112 +137,45 @@
/* Destination address modifier is set to -1 */
inc = -1;
-
}
- pScr = pScratch;
+ pScr1 = pScratch;
/* Fill (srcBLen - 1U) zeros in scratch buffer */
- arm_fill_q15(0, pScr, (srcBLen - 1U));
+ arm_fill_q15(0, pScr1, (srcBLen - 1U));
/* Update temporary scratch pointer */
- pScr += (srcBLen - 1U);
+ pScr1 += (srcBLen - 1U);
-#ifndef UNALIGNED_SUPPORT_DISABLE
/* Copy (srcALen) samples in scratch buffer */
- arm_copy_q15(pIn1, pScr, srcALen);
+ arm_copy_q15(pIn1, pScr1, srcALen);
/* Update pointers */
- pScr += srcALen;
+ pScr1 += srcALen;
-#else
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- j = srcALen >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (j > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr++ = *pIn1++;
- *pScr++ = *pIn1++;
- *pScr++ = *pIn1++;
- *pScr++ = *pIn1++;
-
- /* Decrement the loop counter */
- j--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- j = srcALen % 0x4U;
-
- while (j > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr++ = *pIn1++;
-
- /* Decrement the loop counter */
- j--;
- }
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
/* Fill (srcBLen - 1U) zeros at end of scratch buffer */
- arm_fill_q15(0, pScr, (srcBLen - 1U));
+ arm_fill_q15(0, pScr1, (srcBLen - 1U));
/* Update pointer */
- pScr += (srcBLen - 1U);
-
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
- j = (srcBLen - 1U) >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (j > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr++ = 0;
- *pScr++ = 0;
- *pScr++ = 0;
- *pScr++ = 0;
-
- /* Decrement the loop counter */
- j--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- j = (srcBLen - 1U) % 0x4U;
-
- while (j > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr++ = 0;
-
- /* Decrement the loop counter */
- j--;
- }
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+ pScr1 += (srcBLen - 1U);
/* Temporary pointer for scratch2 */
py = pIn2;
/* Actual correlation process starts here */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = (srcALen + srcBLen - 1U) >> 2;
while (blkCnt > 0)
{
/* Initialze temporary scratch pointer as scratch1 */
- pScr = pScratch;
+ pScr1 = pScratch;
/* Clear Accumlators */
acc0 = 0;
@@ -260,41 +183,42 @@
acc2 = 0;
acc3 = 0;
- /* Read four samples from scratch1 buffer */
- x1 = *__SIMD32(pScr)++;
+ /* Read two samples from scratch buffer */
+ x1 = read_q15x2_ia (&pScr1);
- /* Read next four samples from scratch1 buffer */
- x2 = *__SIMD32(pScr)++;
+ /* Read next two samples from scratch buffer */
+ x2 = read_q15x2_ia (&pScr1);
tapCnt = (srcBLen) >> 2U;
while (tapCnt > 0U)
{
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
/* Read four samples from smaller buffer */
- y1 = _SIMD32_OFFSET(pIn2);
- y2 = _SIMD32_OFFSET(pIn2 + 2U);
+ y1 = read_q15x2_ia ((q15_t **) &pIn2);
+ y2 = read_q15x2_ia ((q15_t **) &pIn2);
+ /* multiply and accumlate */
acc0 = __SMLAD(x1, y1, acc0);
-
acc2 = __SMLAD(x2, y1, acc2);
+ /* pack input data */
#ifndef ARM_MATH_BIG_ENDIAN
x3 = __PKHBT(x2, x1, 0);
#else
x3 = __PKHBT(x1, x2, 0);
#endif
+ /* multiply and accumlate */
acc1 = __SMLADX(x3, y1, acc1);
- x1 = _SIMD32_OFFSET(pScr);
+ /* Read next two samples from scratch buffer */
+ x1 = read_q15x2_ia (&pScr1);
+ /* multiply and accumlate */
acc0 = __SMLAD(x2, y2, acc0);
-
acc2 = __SMLAD(x1, y2, acc2);
+ /* pack input data */
#ifndef ARM_MATH_BIG_ENDIAN
x3 = __PKHBT(x1, x2, 0);
#else
@@ -302,81 +226,9 @@
#endif
acc3 = __SMLADX(x3, y1, acc3);
-
acc1 = __SMLADX(x3, y2, acc1);
- x2 = _SIMD32_OFFSET(pScr + 2U);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x3 = __PKHBT(x2, x1, 0);
-#else
- x3 = __PKHBT(x1, x2, 0);
-#endif
-
- acc3 = __SMLADX(x3, y2, acc3);
-#else
-
- /* Read four samples from smaller buffer */
- a = *pIn2;
- b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- y1 = __PKHBT(a, b, 16);
-#else
- y1 = __PKHBT(b, a, 16);
-#endif
-
- a = *(pIn2 + 2);
- b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
- y2 = __PKHBT(a, b, 16);
-#else
- y2 = __PKHBT(b, a, 16);
-#endif
-
- acc0 = __SMLAD(x1, y1, acc0);
-
- acc2 = __SMLAD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x3 = __PKHBT(x2, x1, 0);
-#else
- x3 = __PKHBT(x1, x2, 0);
-#endif
-
- acc1 = __SMLADX(x3, y1, acc1);
-
- a = *pScr;
- b = *(pScr + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x1 = __PKHBT(a, b, 16);
-#else
- x1 = __PKHBT(b, a, 16);
-#endif
-
- acc0 = __SMLAD(x2, y2, acc0);
-
- acc2 = __SMLAD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x3 = __PKHBT(x1, x2, 0);
-#else
- x3 = __PKHBT(x2, x1, 0);
-#endif
-
- acc3 = __SMLADX(x3, y1, acc3);
-
- acc1 = __SMLADX(x3, y2, acc1);
-
- a = *(pScr + 2);
- b = *(pScr + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x2 = __PKHBT(a, b, 16);
-#else
- x2 = __PKHBT(b, a, 16);
-#endif
+ x2 = read_q15x2_ia (&pScr1);
#ifndef ARM_MATH_BIG_ENDIAN
x3 = __PKHBT(x2, x1, 0);
@@ -386,44 +238,32 @@
acc3 = __SMLADX(x3, y2, acc3);
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
- pIn2 += 4U;
-
- pScr += 4U;
-
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
-
-
/* Update scratch pointer for remaining samples of smaller length sequence */
- pScr -= 4U;
-
+ pScr1 -= 4U;
/* apply same above for remaining samples of smaller length sequence */
tapCnt = (srcBLen) & 3U;
while (tapCnt > 0U)
{
-
/* accumlate the results */
- acc0 += (*pScr++ * *pIn2);
- acc1 += (*pScr++ * *pIn2);
- acc2 += (*pScr++ * *pIn2);
- acc3 += (*pScr++ * *pIn2++);
+ acc0 += (*pScr1++ * *pIn2);
+ acc1 += (*pScr1++ * *pIn2);
+ acc2 += (*pScr1++ * *pIn2);
+ acc3 += (*pScr1++ * *pIn2++);
- pScr -= 3U;
+ pScr1 -= 3U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
blkCnt--;
-
/* Store the results in the accumulators in the destination buffer. */
*pOut = (__SSAT(acc0 >> 15U, 16));
pOut += inc;
@@ -434,22 +274,27 @@
*pOut = (__SSAT(acc3 >> 15U, 16));
pOut += inc;
-
/* Initialization of inputB pointer */
pIn2 = py;
pScratch += 4U;
-
}
-
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
/* Calculate correlation for remaining samples of Bigger length sequence */
while (blkCnt > 0)
{
/* Initialze temporary scratch pointer as scratch1 */
- pScr = pScratch;
+ pScr1 = pScratch;
/* Clear Accumlators */
acc0 = 0;
@@ -459,10 +304,11 @@
while (tapCnt > 0U)
{
- acc0 += (*pScr++ * *pIn2++);
- acc0 += (*pScr++ * *pIn2++);
+ /* Read next two samples from scratch buffer */
+ acc0 += (*pScr1++ * *pIn2++);
+ acc0 += (*pScr1++ * *pIn2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -473,28 +319,27 @@
{
/* accumlate the results */
- acc0 += (*pScr++ * *pIn2++);
+ acc0 += (*pScr1++ * *pIn2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
blkCnt--;
- /* Store the result in the accumulator in the destination buffer. */
-
+ /* The result is in 2.30 format. Convert to 1.15 with saturation.
+ ** Then store the output in the destination buffer. */
*pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
-
pOut += inc;
/* Initialization of inputB pointer */
pIn2 = py;
pScratch += 1U;
-
}
+
}
/**
- * @} end of Corr group
+ @} end of Corr group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c
index 383949d..b6b2ef9 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c
@@ -3,13 +3,13 @@
* Title: arm_correlate_fast_q15.c
* Description: Fast Q15 Correlation
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,58 +29,56 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Corr
- * @{
+ @addtogroup Corr
+ @{
*/
/**
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This fast version uses a 32-bit accumulator with 2.30 format.
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * There is no saturation on intermediate additions.
- * Thus, if the accumulator overflows it wraps around and distorts the result.
- * The input signals should be scaled down to avoid intermediate overflows.
- * Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
- *
- * \par
- * See <code>arm_correlate_q15()</code> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+ @brief Correlation of Q15 sequences (fast version).
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ This fast version uses a 32-bit accumulator with 2.30 format.
+ The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ There is no saturation on intermediate additions.
+ Thus, if the accumulator overflows it wraps around and distorts the result.
+ The input signals should be scaled down to avoid intermediate overflows.
+ Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a
+ maximum of min(srcALen, srcBLen) number of additions is carried internally.
+ The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+ @remark
+ Refer to \ref arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
*/
void arm_correlate_fast_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst)
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst)
{
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *pOut = pDst; /* output pointer */
- q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- q15_t *pSrc1; /* Intermediate pointers */
- q31_t x0, x1, x2, x3, c0; /* temporary variables for holding input and coefficient values */
- uint32_t j, k = 0U, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3; /* loop counter */
- int32_t inc = 1; /* Destination address modifier */
+ const q15_t *pIn1; /* InputA pointer */
+ const q15_t *pIn2; /* InputB pointer */
+ q15_t *pOut = pDst; /* Output pointer */
+ q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */
+ const q15_t *px; /* Intermediate inputA pointer */
+ const q15_t *py; /* Intermediate inputB pointer */
+ const q15_t *pSrc1; /* Intermediate pointers */
+ q31_t x0, x1, x2, x3, c0; /* Temporary variables for holding input and coefficient values */
+ uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ uint32_t j, k, count, blkCnt; /* Loop counters */
+ uint32_t outBlockSize;
+ int32_t inc = 1; /* Destination address modifier */
/* The algorithm implementation is based on the lengths of the inputs. */
@@ -99,10 +97,10 @@
if (srcALen >= srcBLen)
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcA);
+ pIn1 = pSrcA;
/* Initialization of inputB pointer */
- pIn2 = (pSrcB);
+ pIn2 = pSrcB;
/* Number of output samples is calculated */
outBlockSize = (2U * srcALen) - 1U;
@@ -120,10 +118,10 @@
else
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcB);
+ pIn1 = pSrcB;
/* Initialization of inputB pointer */
- pIn2 = (pSrcA);
+ pIn2 = pSrcA;
/* srcBLen is always considered as shorter or equal to srcALen */
j = srcBLen;
@@ -140,14 +138,15 @@
}
/* The function is internally
- * divided into three parts according to the number of multiplications that has to be
- * taken place between inputA samples and inputB samples. In the first part of the
+ * divided into three stages according to the number of multiplications that has to be
+ * taken place between inputA samples and inputB samples. In the first stage of the
* algorithm, the multiplications increase by one for every iteration.
- * In the second part of the algorithm, srcBLen number of multiplications are done.
- * In the third part of the algorithm, the multiplications decrease by one
- * for every iteration.*/
+ * In the second stage of the algorithm, srcBLen number of multiplications are done.
+ * In the third stage of the algorithm, the multiplications decrease by one
+ * for every iteration. */
+
/* The algorithm is implemented in three stages.
- * The loop counters of each stage is initiated here. */
+ The loop counters of each stage is initiated here. */
blockSize1 = srcBLen - 1U;
blockSize2 = srcALen - (srcBLen - 1U);
blockSize3 = blockSize1;
@@ -184,23 +183,23 @@
sum = 0;
/* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = count >> 2;
+ k = count >> 2U;
/* First part of the processing with loop unrolling. Compute 4 MACs at a time.
** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
- sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+ sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
/* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
- sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+ sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
/* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ No loop unrolling is used. */
k = count % 0x4U;
while (k > 0U)
@@ -222,10 +221,10 @@
py = pSrc1 - count;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -245,16 +244,16 @@
/* Working pointer of inputB */
py = pIn2;
- /* count is index by which the pointer pIn1 to be incremented */
+ /* count is the index by which the pointer pIn1 to be incremented */
count = 0U;
- /* -------------------
+ /* --------------------
* Stage2 process
- * ------------------*/
+ * -------------------*/
/* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
* So, to loop unroll over blockSize2,
- * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
+ * srcBLen should be greater than or equal to 4 */
if (srcBLen >= 4U)
{
/* Loop unroll over blockSize2, by 4 */
@@ -269,9 +268,9 @@
acc3 = 0;
/* read x[0], x[1] samples */
- x0 = *__SIMD32(px);
+ x0 = read_q15x2 ((q15_t *) px);
/* read x[1], x[2] samples */
- x1 = _SIMD32_OFFSET(px + 1);
+ x1 = read_q15x2 ((q15_t *) px + 1);
px += 2U;
/* Apply loop unrolling and compute 4 MACs simultaneously. */
@@ -283,7 +282,7 @@
{
/* Read the first two inputB samples using SIMD:
* y[0] and y[1] */
- c0 = *__SIMD32(py)++;
+ c0 = read_q15x2_ia ((q15_t **) &py);
/* acc0 += x[0] * y[0] + x[1] * y[1] */
acc0 = __SMLAD(x0, c0, acc0);
@@ -292,10 +291,10 @@
acc1 = __SMLAD(x1, c0, acc1);
/* Read x[2], x[3] */
- x2 = *__SIMD32(px);
+ x2 = read_q15x2 ((q15_t *) px);
/* Read x[3], x[4] */
- x3 = _SIMD32_OFFSET(px + 1);
+ x3 = read_q15x2 ((q15_t *) px + 1);
/* acc2 += x[2] * y[0] + x[3] * y[1] */
acc2 = __SMLAD(x2, c0, acc2);
@@ -304,7 +303,7 @@
acc3 = __SMLAD(x3, c0, acc3);
/* Read y[2] and y[3] */
- c0 = *__SIMD32(py)++;
+ c0 = read_q15x2_ia ((q15_t **) &py);
/* acc0 += x[2] * y[2] + x[3] * y[3] */
acc0 = __SMLAD(x2, c0, acc0);
@@ -313,10 +312,10 @@
acc1 = __SMLAD(x3, c0, acc1);
/* Read x[4], x[5] */
- x0 = _SIMD32_OFFSET(px + 2);
+ x0 = read_q15x2 ((q15_t *) px + 2);
/* Read x[5], x[6] */
- x1 = _SIMD32_OFFSET(px + 3);
+ x1 = read_q15x2 ((q15_t *) px + 3);
px += 4U;
/* acc2 += x[4] * y[2] + x[5] * y[3] */
@@ -338,23 +337,20 @@
{
/* Read y[4] */
c0 = *py;
+
#ifdef ARM_MATH_BIG_ENDIAN
-
c0 = c0 << 16U;
-
#else
-
c0 = c0 & 0x0000FFFF;
-
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
/* Read x[7] */
- x3 = *__SIMD32(px);
+ x3 = read_q15x2 ((q15_t *) px);
px++;
/* Perform the multiply-accumulates */
- acc0 = __SMLAD(x0, c0, acc0);
- acc1 = __SMLAD(x1, c0, acc1);
+ acc0 = __SMLAD (x0, c0, acc0);
+ acc1 = __SMLAD (x1, c0, acc1);
acc2 = __SMLADX(x1, c0, acc2);
acc3 = __SMLADX(x3, c0, acc3);
}
@@ -362,13 +358,13 @@
if (k == 2U)
{
/* Read y[4], y[5] */
- c0 = *__SIMD32(py);
+ c0 = read_q15x2 ((q15_t *) py);
/* Read x[7], x[8] */
- x3 = *__SIMD32(px);
+ x3 = read_q15x2 ((q15_t *) px);
/* Read x[9] */
- x2 = _SIMD32_OFFSET(px + 1);
+ x2 = read_q15x2 ((q15_t *) px + 1);
px += 2U;
/* Perform the multiply-accumulates */
@@ -381,13 +377,13 @@
if (k == 3U)
{
/* Read y[4], y[5] */
- c0 = *__SIMD32(py)++;
+ c0 = read_q15x2_ia ((q15_t **) &py);
/* Read x[7], x[8] */
- x3 = *__SIMD32(px);
+ x3 = read_q15x2 ((q15_t *) px);
/* Read x[9] */
- x2 = _SIMD32_OFFSET(px + 1);
+ x2 = read_q15x2 ((q15_t *) px + 1);
/* Perform the multiply-accumulates */
acc0 = __SMLAD(x0, c0, acc0);
@@ -398,20 +394,18 @@
c0 = (*py);
/* Read y[6] */
#ifdef ARM_MATH_BIG_ENDIAN
-
c0 = c0 << 16U;
#else
-
c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
/* Read x[10] */
- x3 = _SIMD32_OFFSET(px + 2);
+ x3 = read_q15x2 ((q15_t *) px + 2);
px += 3U;
/* Perform the multiply-accumulates */
acc0 = __SMLADX(x1, c0, acc0);
- acc1 = __SMLAD(x2, c0, acc1);
+ acc1 = __SMLAD (x2, c0, acc1);
acc2 = __SMLADX(x2, c0, acc2);
acc3 = __SMLADX(x3, c0, acc3);
}
@@ -430,15 +424,14 @@
*pOut = (q15_t) (acc3 >> 15);
pOut += inc;
- /* Increment the pointer pIn1 index, count by 1 */
+ /* Increment the pointer pIn1 index, count by 4 */
count += 4U;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pIn1 + count;
py = pIn2;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -459,12 +452,12 @@
while (k > 0U)
{
/* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py++);
- sum += ((q31_t) * px++ * *py++);
- sum += ((q31_t) * px++ * *py++);
- sum += ((q31_t) * px++ * *py++);
+ sum += ((q31_t) *px++ * *py++);
+ sum += ((q31_t) *px++ * *py++);
+ sum += ((q31_t) *px++ * *py++);
+ sum += ((q31_t) *px++ * *py++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -477,7 +470,7 @@
/* Perform the multiply-accumulates */
sum += ((q31_t) * px++ * *py++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -493,7 +486,7 @@
px = pIn1 + count;
py = pIn2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -508,15 +501,15 @@
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Loop over srcBLen */
+ /* srcBLen number of MACS should be performed */
k = srcBLen;
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += ((q31_t) * px++ * *py++);
+ sum += ((q31_t) *px++ * *py++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -525,14 +518,14 @@
/* Destination pointer is updated according to the address modifier, inc */
pOut += inc;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pIn1 + count;
py = pIn2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -577,11 +570,11 @@
{
/* Perform the multiply-accumulates */
/* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
- sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+ sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
/* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
- sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+ sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -594,7 +587,7 @@
/* Perform the multiply-accumulates */
sum = __SMLAD(*px++, *py++, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -614,694 +607,8 @@
blockSize3--;
}
-#else
-
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *pOut = pDst; /* output pointer */
- q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- q15_t *pSrc1; /* Intermediate pointers */
- q31_t x0, x1, x2, x3, c0; /* temporary variables for holding input and coefficient values */
- uint32_t j, k = 0U, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3; /* loop counter */
- int32_t inc = 1; /* Destination address modifier */
- q15_t a, b;
-
-
- /* The algorithm implementation is based on the lengths of the inputs. */
- /* srcB is always made to slide across srcA. */
- /* So srcBLen is always considered as shorter or equal to srcALen */
- /* But CORR(x, y) is reverse of CORR(y, x) */
- /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
- /* and the destination pointer modifier, inc is set to -1 */
- /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
- /* But to improve the performance,
- * we include zeroes in the output instead of zero padding either of the the inputs*/
- /* If srcALen > srcBLen,
- * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
- /* If srcALen < srcBLen,
- * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
- if (srcALen >= srcBLen)
- {
- /* Initialization of inputA pointer */
- pIn1 = (pSrcA);
-
- /* Initialization of inputB pointer */
- pIn2 = (pSrcB);
-
- /* Number of output samples is calculated */
- outBlockSize = (2U * srcALen) - 1U;
-
- /* When srcALen > srcBLen, zero padding is done to srcB
- * to make their lengths equal.
- * Instead, (outBlockSize - (srcALen + srcBLen - 1))
- * number of output samples are made zero */
- j = outBlockSize - (srcALen + (srcBLen - 1U));
-
- /* Updating the pointer position to non zero value */
- pOut += j;
-
- }
- else
- {
- /* Initialization of inputA pointer */
- pIn1 = (pSrcB);
-
- /* Initialization of inputB pointer */
- pIn2 = (pSrcA);
-
- /* srcBLen is always considered as shorter or equal to srcALen */
- j = srcBLen;
- srcBLen = srcALen;
- srcALen = j;
-
- /* CORR(x, y) = Reverse order(CORR(y, x)) */
- /* Hence set the destination pointer to point to the last output sample */
- pOut = pDst + ((srcALen + srcBLen) - 2U);
-
- /* Destination address modifier is set to -1 */
- inc = -1;
-
- }
-
- /* The function is internally
- * divided into three parts according to the number of multiplications that has to be
- * taken place between inputA samples and inputB samples. In the first part of the
- * algorithm, the multiplications increase by one for every iteration.
- * In the second part of the algorithm, srcBLen number of multiplications are done.
- * In the third part of the algorithm, the multiplications decrease by one
- * for every iteration.*/
- /* The algorithm is implemented in three stages.
- * The loop counters of each stage is initiated here. */
- blockSize1 = srcBLen - 1U;
- blockSize2 = srcALen - (srcBLen - 1U);
- blockSize3 = blockSize1;
-
- /* --------------------------
- * Initializations of stage1
- * -------------------------*/
-
- /* sum = x[0] * y[srcBlen - 1]
- * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
- * ....
- * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
- */
-
- /* In this stage the MAC operations are increased by 1 for every iteration.
- The count variable holds the number of MAC operations performed */
- count = 1U;
-
- /* Working pointer of inputA */
- px = pIn1;
-
- /* Working pointer of inputB */
- pSrc1 = pIn2 + (srcBLen - 1U);
- py = pSrc1;
-
- /* ------------------------
- * Stage1 process
- * ----------------------*/
-
- /* The first loop starts here */
- while (blockSize1 > 0U)
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = count >> 2;
-
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
- sum += ((q31_t) * px++ * *py++);
- sum += ((q31_t) * px++ * *py++);
- sum += ((q31_t) * px++ * *py++);
- sum += ((q31_t) * px++ * *py++);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
- k = count % 0x4U;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- /* x[0] * y[srcBLen - 1] */
- sum += ((q31_t) * px++ * *py++);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut = (q15_t) (sum >> 15);
- /* Destination pointer is updated according to the address modifier, inc */
- pOut += inc;
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- py = pSrc1 - count;
- px = pIn1;
-
- /* Increment the MAC count */
- count++;
-
- /* Decrement the loop counter */
- blockSize1--;
- }
-
- /* --------------------------
- * Initializations of stage2
- * ------------------------*/
-
- /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
- * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
- * ....
- * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
- */
-
- /* Working pointer of inputA */
- px = pIn1;
-
- /* Working pointer of inputB */
- py = pIn2;
-
- /* count is index by which the pointer pIn1 to be incremented */
- count = 0U;
-
- /* -------------------
- * Stage2 process
- * ------------------*/
-
- /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
- * So, to loop unroll over blockSize2,
- * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
- if (srcBLen >= 4U)
- {
- /* Loop unroll over blockSize2, by 4 */
- blkCnt = blockSize2 >> 2U;
-
- while (blkCnt > 0U)
- {
- /* Set all accumulators to zero */
- acc0 = 0;
- acc1 = 0;
- acc2 = 0;
- acc3 = 0;
-
- /* read x[0], x[1], x[2] samples */
- a = *px;
- b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x0 = __PKHBT(a, b, 16);
- a = *(px + 2);
- x1 = __PKHBT(b, a, 16);
-
-#else
-
- x0 = __PKHBT(b, a, 16);
- a = *(px + 2);
- x1 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- px += 2U;
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = srcBLen >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
- do
- {
- /* Read the first two inputB samples using SIMD:
- * y[0] and y[1] */
- a = *py;
- b = *(py + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- c0 = __PKHBT(a, b, 16);
-
-#else
-
- c0 = __PKHBT(b, a, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* acc0 += x[0] * y[0] + x[1] * y[1] */
- acc0 = __SMLAD(x0, c0, acc0);
-
- /* acc1 += x[1] * y[0] + x[2] * y[1] */
- acc1 = __SMLAD(x1, c0, acc1);
-
- /* Read x[2], x[3], x[4] */
- a = *px;
- b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x2 = __PKHBT(a, b, 16);
- a = *(px + 2);
- x3 = __PKHBT(b, a, 16);
-
-#else
-
- x2 = __PKHBT(b, a, 16);
- a = *(px + 2);
- x3 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* acc2 += x[2] * y[0] + x[3] * y[1] */
- acc2 = __SMLAD(x2, c0, acc2);
-
- /* acc3 += x[3] * y[0] + x[4] * y[1] */
- acc3 = __SMLAD(x3, c0, acc3);
-
- /* Read y[2] and y[3] */
- a = *(py + 2);
- b = *(py + 3);
-
- py += 4U;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- c0 = __PKHBT(a, b, 16);
-
-#else
-
- c0 = __PKHBT(b, a, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* acc0 += x[2] * y[2] + x[3] * y[3] */
- acc0 = __SMLAD(x2, c0, acc0);
-
- /* acc1 += x[3] * y[2] + x[4] * y[3] */
- acc1 = __SMLAD(x3, c0, acc1);
-
- /* Read x[4], x[5], x[6] */
- a = *(px + 2);
- b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x0 = __PKHBT(a, b, 16);
- a = *(px + 4);
- x1 = __PKHBT(b, a, 16);
-
-#else
-
- x0 = __PKHBT(b, a, 16);
- a = *(px + 4);
- x1 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- px += 4U;
-
- /* acc2 += x[4] * y[2] + x[5] * y[3] */
- acc2 = __SMLAD(x0, c0, acc2);
-
- /* acc3 += x[5] * y[2] + x[6] * y[3] */
- acc3 = __SMLAD(x1, c0, acc3);
-
- } while (--k);
-
- /* For the next MAC operations, SIMD is not used
- * So, the 16 bit pointer if inputB, py is updated */
-
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
- k = srcBLen % 0x4U;
-
- if (k == 1U)
- {
- /* Read y[4] */
- c0 = *py;
-#ifdef ARM_MATH_BIG_ENDIAN
-
- c0 = c0 << 16U;
-
-#else
-
- c0 = c0 & 0x0000FFFF;
-
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
-
- /* Read x[7] */
- a = *px;
- b = *(px + 1);
-
- px++;;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x3 = __PKHBT(a, b, 16);
-
-#else
-
- x3 = __PKHBT(b, a, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- px++;
-
- /* Perform the multiply-accumulates */
- acc0 = __SMLAD(x0, c0, acc0);
- acc1 = __SMLAD(x1, c0, acc1);
- acc2 = __SMLADX(x1, c0, acc2);
- acc3 = __SMLADX(x3, c0, acc3);
- }
-
- if (k == 2U)
- {
- /* Read y[4], y[5] */
- a = *py;
- b = *(py + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- c0 = __PKHBT(a, b, 16);
-
-#else
-
- c0 = __PKHBT(b, a, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Read x[7], x[8], x[9] */
- a = *px;
- b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x3 = __PKHBT(a, b, 16);
- a = *(px + 2);
- x2 = __PKHBT(b, a, 16);
-
-#else
-
- x3 = __PKHBT(b, a, 16);
- a = *(px + 2);
- x2 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- px += 2U;
-
- /* Perform the multiply-accumulates */
- acc0 = __SMLAD(x0, c0, acc0);
- acc1 = __SMLAD(x1, c0, acc1);
- acc2 = __SMLAD(x3, c0, acc2);
- acc3 = __SMLAD(x2, c0, acc3);
- }
-
- if (k == 3U)
- {
- /* Read y[4], y[5] */
- a = *py;
- b = *(py + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- c0 = __PKHBT(a, b, 16);
-
-#else
-
- c0 = __PKHBT(b, a, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- py += 2U;
-
- /* Read x[7], x[8], x[9] */
- a = *px;
- b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x3 = __PKHBT(a, b, 16);
- a = *(px + 2);
- x2 = __PKHBT(b, a, 16);
-
-#else
-
- x3 = __PKHBT(b, a, 16);
- a = *(px + 2);
- x2 = __PKHBT(a, b, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Perform the multiply-accumulates */
- acc0 = __SMLAD(x0, c0, acc0);
- acc1 = __SMLAD(x1, c0, acc1);
- acc2 = __SMLAD(x3, c0, acc2);
- acc3 = __SMLAD(x2, c0, acc3);
-
- c0 = (*py);
- /* Read y[6] */
-#ifdef ARM_MATH_BIG_ENDIAN
-
- c0 = c0 << 16U;
-#else
-
- c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
-
- /* Read x[10] */
- b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- x3 = __PKHBT(a, b, 16);
-
-#else
-
- x3 = __PKHBT(b, a, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- px += 3U;
-
- /* Perform the multiply-accumulates */
- acc0 = __SMLADX(x1, c0, acc0);
- acc1 = __SMLAD(x2, c0, acc1);
- acc2 = __SMLADX(x2, c0, acc2);
- acc3 = __SMLADX(x3, c0, acc3);
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut = (q15_t) (acc0 >> 15);
- /* Destination pointer is updated according to the address modifier, inc */
- pOut += inc;
-
- *pOut = (q15_t) (acc1 >> 15);
- pOut += inc;
-
- *pOut = (q15_t) (acc2 >> 15);
- pOut += inc;
-
- *pOut = (q15_t) (acc3 >> 15);
- pOut += inc;
-
- /* Increment the pointer pIn1 index, count by 1 */
- count += 4U;
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = pIn1 + count;
- py = pIn2;
-
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize2 % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = srcBLen >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py++);
- sum += ((q31_t) * px++ * *py++);
- sum += ((q31_t) * px++ * *py++);
- sum += ((q31_t) * px++ * *py++);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
- k = srcBLen % 0x4U;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py++);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut = (q15_t) (sum >> 15);
- /* Destination pointer is updated according to the address modifier, inc */
- pOut += inc;
-
- /* Increment the pointer pIn1 index, count by 1 */
- count++;
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = pIn1 + count;
- py = pIn2;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
- else
- {
- /* If the srcBLen is not a multiple of 4,
- * the blockSize2 loop cannot be unrolled by 4 */
- blkCnt = blockSize2;
-
- while (blkCnt > 0U)
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* Loop over srcBLen */
- k = srcBLen;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulate */
- sum += ((q31_t) * px++ * *py++);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut = (q15_t) (sum >> 15);
- /* Destination pointer is updated according to the address modifier, inc */
- pOut += inc;
-
- /* Increment the MAC count */
- count++;
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = pIn1 + count;
- py = pIn2;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
-
- /* --------------------------
- * Initializations of stage3
- * -------------------------*/
-
- /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
- * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
- * ....
- * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
- * sum += x[srcALen-1] * y[0]
- */
-
- /* In this stage the MAC operations are decreased by 1 for every iteration.
- The count variable holds the number of MAC operations performed */
- count = srcBLen - 1U;
-
- /* Working pointer of inputA */
- pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
- px = pSrc1;
-
- /* Working pointer of inputB */
- py = pIn2;
-
- /* -------------------
- * Stage3 process
- * ------------------*/
-
- while (blockSize3 > 0U)
- {
- /* Accumulator is made zero for every iteration */
- sum = 0;
-
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = count >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py++);
- sum += ((q31_t) * px++ * *py++);
- sum += ((q31_t) * px++ * *py++);
- sum += ((q31_t) * px++ * *py++);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
- k = count % 0x4U;
-
- while (k > 0U)
- {
- /* Perform the multiply-accumulates */
- sum += ((q31_t) * px++ * *py++);
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* Store the result in the accumulator in the destination buffer. */
- *pOut = (q15_t) (sum >> 15);
- /* Destination pointer is updated according to the address modifier, inc */
- pOut += inc;
-
- /* Update the inputA and inputB pointers for next MAC calculation */
- px = ++pSrc1;
- py = pIn2;
-
- /* Decrement the MAC count */
- count--;
-
- /* Decrement the loop counter */
- blockSize3--;
- }
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
}
/**
- * @} end of Corr group
+ @} end of Corr group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c
index 4a006aa..197b3f5 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c
@@ -3,13 +3,13 @@
* Title: arm_correlate_fast_q31.c
* Description: Fast Q31 Correlation
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,61 +29,58 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Corr
- * @{
+ @addtogroup Corr
+ @{
*/
/**
- * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
- * These intermediate results are accumulated in a 32-bit register in 2.30 format.
- * Finally, the accumulator is saturated and converted to a 1.31 result.
- *
- * \par
- * The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.
- * In order to avoid overflows completely the input signals must be scaled down.
- * The input signals should be scaled down to avoid intermediate overflows.
- * Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.
- *
- * \par
- * See <code>arm_correlate_q31()</code> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
+ @brief Correlation of Q31 sequences (fast version).
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+ The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+ These intermediate results are accumulated in a 32-bit register in 2.30 format.
+ Finally, the accumulator is saturated and converted to a 1.31 result.
+ @par
+ The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.
+ In order to avoid overflows completely the input signals must be scaled down.
+ The input signals should be scaled down to avoid intermediate overflows.
+ Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a
+ maximum of min(srcALen, srcBLen) number of additions is carried internally.
+
+ @remark
+ Refer to \ref arm_correlate_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
*/
void arm_correlate_fast_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst)
+ const q31_t * pSrcA,
+ uint32_t srcALen,
+ const q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst)
{
- q31_t *pIn1; /* inputA pointer */
- q31_t *pIn2; /* inputB pointer */
- q31_t *pOut = pDst; /* output pointer */
- q31_t *px; /* Intermediate inputA pointer */
- q31_t *py; /* Intermediate inputB pointer */
- q31_t *pSrc1; /* Intermediate pointers */
- q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */
- q31_t x0, x1, x2, x3, c0; /* temporary variables for holding input and coefficient values */
- uint32_t j, k = 0U, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3; /* loop counter */
- int32_t inc = 1; /* Destination address modifier */
-
+ const q31_t *pIn1; /* InputA pointer */
+ const q31_t *pIn2; /* InputB pointer */
+ q31_t *pOut = pDst; /* Output pointer */
+ const q31_t *px; /* Intermediate inputA pointer */
+ const q31_t *py; /* Intermediate inputB pointer */
+ const q31_t *pSrc1; /* Intermediate pointers */
+ q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */
+ q31_t x0, x1, x2, x3, c0; /* Temporary variables for holding input and coefficient values */
+ uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ uint32_t j, k, count, blkCnt; /* Loop counters */
+ uint32_t outBlockSize;
+ int32_t inc = 1; /* Destination address modifier */
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -91,10 +88,10 @@
if (srcALen >= srcBLen)
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcA);
+ pIn1 = pSrcA;
/* Initialization of inputB pointer */
- pIn2 = (pSrcB);
+ pIn2 = pSrcB;
/* Number of output samples is calculated */
outBlockSize = (2U * srcALen) - 1U;
@@ -112,10 +109,10 @@
else
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcB);
+ pIn1 = pSrcB;
/* Initialization of inputB pointer */
- pIn2 = (pSrcA);
+ pIn2 = pSrcA;
/* srcBLen is always considered as shorter or equal to srcALen */
j = srcBLen;
@@ -132,14 +129,15 @@
}
/* The function is internally
- * divided into three parts according to the number of multiplications that has to be
- * taken place between inputA samples and inputB samples. In the first part of the
+ * divided into three stages according to the number of multiplications that has to be
+ * taken place between inputA samples and inputB samples. In the first stage of the
* algorithm, the multiplications increase by one for every iteration.
- * In the second part of the algorithm, srcBLen number of multiplications are done.
- * In the third part of the algorithm, the multiplications decrease by one
- * for every iteration.*/
+ * In the second stage of the algorithm, srcBLen number of multiplications are done.
+ * In the third stage of the algorithm, the multiplications decrease by one
+ * for every iteration. */
+
/* The algorithm is implemented in three stages.
- * The loop counters of each stage is initiated here. */
+ The loop counters of each stage is initiated here. */
blockSize1 = srcBLen - 1U;
blockSize2 = srcALen - (srcBLen - 1U);
blockSize3 = blockSize1;
@@ -176,7 +174,7 @@
sum = 0;
/* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = count >> 2;
+ k = count >> 2U;
/* First part of the processing with loop unrolling. Compute 4 MACs at a time.
** a second loop below computes MACs for the remaining 1 to 3 samples. */
@@ -184,18 +182,21 @@
{
/* x[0] * y[srcBLen - 4] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
+
/* x[1] * y[srcBLen - 3] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
+
/* x[2] * y[srcBLen - 2] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
+
/* x[3] * y[srcBLen - 1] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -205,12 +206,12 @@
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* x[0] * y[srcBLen - 1] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -223,10 +224,10 @@
py = pSrc1 - count;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -270,9 +271,9 @@
acc3 = 0;
/* read x[0], x[1], x[2] samples */
- x0 = *(px++);
- x1 = *(px++);
- x2 = *(px++);
+ x0 = *px++;
+ x1 = *px++;
+ x2 = *px++;
/* Apply loop unrolling and compute 4 MACs simultaneously. */
k = srcBLen >> 2U;
@@ -282,10 +283,9 @@
do
{
/* Read y[0] sample */
- c0 = *(py++);
-
+ c0 = *py++;
/* Read x[3] sample */
- x3 = *(px++);
+ x3 = *px++;
/* Perform the multiply-accumulate */
/* acc0 += x[0] * y[0] */
@@ -297,13 +297,13 @@
/* acc3 += x[3] * y[0] */
acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
/* Read y[1] sample */
- c0 = *(py++);
-
+ c0 = *py++;
/* Read x[4] sample */
- x0 = *(px++);
+ x0 = *px++;
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[1] * y[1] */
acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
/* acc1 += x[2] * y[1] */
@@ -313,11 +313,11 @@
/* acc3 += x[4] * y[1] */
acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
- /* Read y[2] sample */
- c0 = *(py++);
+ /* Read y[2] sample */
+ c0 = *py++;
/* Read x[5] sample */
- x1 = *(px++);
+ x1 = *px++;
/* Perform the multiply-accumulates */
/* acc0 += x[2] * y[2] */
@@ -329,11 +329,11 @@
/* acc3 += x[5] * y[2] */
acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
- /* Read y[3] sample */
- c0 = *(py++);
+ /* Read y[3] sample */
+ c0 = *py++;
/* Read x[6] sample */
- x2 = *(px++);
+ x2 = *px++;
/* Perform the multiply-accumulates */
/* acc0 += x[3] * y[3] */
@@ -355,10 +355,9 @@
while (k > 0U)
{
/* Read y[4] sample */
- c0 = *(py++);
-
+ c0 = *py++;
/* Read x[7] sample */
- x3 = *(px++);
+ x3 = *px++;
/* Perform the multiply-accumulates */
/* acc0 += x[4] * y[4] */
@@ -375,7 +374,7 @@
x1 = x2;
x2 = x3;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -400,8 +399,7 @@
px = pIn1 + count;
py = pIn2;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -423,15 +421,15 @@
{
/* Perform the multiply-accumulates */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -443,9 +441,9 @@
{
/* Perform the multiply-accumulate */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -454,15 +452,14 @@
/* Destination pointer is updated according to the address modifier, inc */
pOut += inc;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pIn1 + count;
py = pIn2;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -477,16 +474,16 @@
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Loop over srcBLen */
+ /* srcBLen number of MACS should be performed */
k = srcBLen;
while (k > 0U)
{
/* Perform the multiply-accumulate */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -495,18 +492,19 @@
/* Destination pointer is updated according to the address modifier, inc */
pOut += inc;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pIn1 + count;
py = pIn2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
+
/* --------------------------
* Initializations of stage3
* -------------------------*/
@@ -545,21 +543,24 @@
** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* sum += x[srcALen - srcBLen + 4] * y[3] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
+
/* sum += x[srcALen - srcBLen + 3] * y[2] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
+
/* sum += x[srcALen - srcBLen + 2] * y[1] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
+
/* sum += x[srcALen - srcBLen + 1] * y[0] */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -569,11 +570,11 @@
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum = (q31_t) ((((q63_t) sum << 32) +
- ((q63_t) * px++ * (*py++))) >> 32);
+ ((q63_t) *px++ * (*py++))) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -586,15 +587,15 @@
px = ++pSrc1;
py = pIn2;
- /* Decrement the MAC count */
+ /* Decrement MAC count */
count--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize3--;
}
}
/**
- * @} end of Corr group
+ @} end of Corr group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c
index 1eda7197..5237c0d 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c
@@ -3,13 +3,13 @@
* Title: arm_correlate_opt_q15.c
* Description: Correlation of Q15 sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,69 +29,58 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Corr
- * @{
+ @addtogroup Corr
+ @{
*/
/**
- * @brief Correlation of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
- * @param[in] *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @return none.
- *
- * \par Restrictions
- * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- * In this case input, output, scratch buffers should be aligned by 32-bit
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * This approach provides 33 guard bits and there is no risk of overflow.
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
- *
- * \par
- * Refer to <code>arm_correlate_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
- *
- *
- */
+ @brief Correlation of Q15 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
+ @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ @return none
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+ The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+ This approach provides 33 guard bits and there is no risk of overflow.
+ The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+
+ @remark
+ Refer to \ref arm_correlate_fast_q15() for a faster but less precise version of this function.
+ */
void arm_correlate_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch)
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ q15_t * pScratch)
{
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q63_t acc0, acc1, acc2, acc3; /* Accumulators */
- q15_t *py; /* Intermediate inputB pointer */
- q31_t x1, x2, x3; /* temporary variables for holding input1 and input2 values */
- uint32_t j, blkCnt, outBlockSize; /* loop counter */
- int32_t inc = 1; /* output pointer increment */
- uint32_t tapCnt;
- q31_t y1, y2;
- q15_t *pScr; /* Intermediate pointers */
- q15_t *pOut = pDst; /* output pointer */
-#ifdef UNALIGNED_SUPPORT_DISABLE
+ q63_t acc0; /* Accumulators */
+ q15_t *pOut = pDst; /* Output pointer */
+ q15_t *pScr1; /* Temporary pointer for scratch1 */
+ const q15_t *pIn1; /* InputA pointer */
+ const q15_t *pIn2; /* InputB pointer */
+ const q15_t *py; /* Intermediate inputB pointer */
+ uint32_t j, blkCnt, outBlockSize; /* Loop counter */
+ int32_t inc = 1; /* Output pointer increment */
+ uint32_t tapCnt;
- q15_t a, b;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q63_t acc1, acc2, acc3; /* Accumulators */
+ q31_t x1, x2, x3; /* Temporary variables for holding input1 and input2 values */
+ q31_t y1, y2; /* State variables */
+#endif
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -109,13 +98,13 @@
if (srcALen >= srcBLen)
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcA);
+ pIn1 = pSrcA;
/* Initialization of inputB pointer */
- pIn2 = (pSrcB);
+ pIn2 = pSrcB;
/* Number of output samples is calculated */
- outBlockSize = (2U * srcALen) - 1U;
+ outBlockSize = (srcALen * 2U) - 1U;
/* When srcALen > srcBLen, zero padding is done to srcB
* to make their lengths equal.
@@ -125,15 +114,14 @@
/* Updating the pointer position to non zero value */
pOut += j;
-
}
else
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcB);
+ pIn1 = pSrcB;
/* Initialization of inputB pointer */
- pIn2 = (pSrcA);
+ pIn2 = pSrcA;
/* srcBLen is always considered as shorter or equal to srcALen */
j = srcBLen;
@@ -146,113 +134,43 @@
/* Destination address modifier is set to -1 */
inc = -1;
-
}
- pScr = pScratch;
+ pScr1 = pScratch;
/* Fill (srcBLen - 1U) zeros in scratch buffer */
- arm_fill_q15(0, pScr, (srcBLen - 1U));
+ arm_fill_q15(0, pScr1, (srcBLen - 1U));
/* Update temporary scratch pointer */
- pScr += (srcBLen - 1U);
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
+ pScr1 += (srcBLen - 1U);
/* Copy (srcALen) samples in scratch buffer */
- arm_copy_q15(pIn1, pScr, srcALen);
+ arm_copy_q15(pIn1, pScr1, srcALen);
/* Update pointers */
- //pIn1 += srcALen;
- pScr += srcALen;
+ pScr1 += srcALen;
-#else
-
- /* Apply loop unrolling and do 4 Copies simultaneously. */
- j = srcALen >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (j > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr++ = *pIn1++;
- *pScr++ = *pIn1++;
- *pScr++ = *pIn1++;
- *pScr++ = *pIn1++;
-
- /* Decrement the loop counter */
- j--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- j = srcALen % 0x4U;
-
- while (j > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr++ = *pIn1++;
-
- /* Decrement the loop counter */
- j--;
- }
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
/* Fill (srcBLen - 1U) zeros at end of scratch buffer */
- arm_fill_q15(0, pScr, (srcBLen - 1U));
+ arm_fill_q15(0, pScr1, (srcBLen - 1U));
/* Update pointer */
- pScr += (srcBLen - 1U);
-
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
- j = (srcBLen - 1U) >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (j > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr++ = 0;
- *pScr++ = 0;
- *pScr++ = 0;
- *pScr++ = 0;
-
- /* Decrement the loop counter */
- j--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- j = (srcBLen - 1U) % 0x4U;
-
- while (j > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr++ = 0;
-
- /* Decrement the loop counter */
- j--;
- }
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+ pScr1 += (srcBLen - 1U);
/* Temporary pointer for scratch2 */
py = pIn2;
/* Actual correlation process starts here */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = (srcALen + srcBLen - 1U) >> 2;
while (blkCnt > 0)
{
/* Initialze temporary scratch pointer as scratch1 */
- pScr = pScratch;
+ pScr1 = pScratch;
/* Clear Accumlators */
acc0 = 0;
@@ -260,41 +178,42 @@
acc2 = 0;
acc3 = 0;
- /* Read four samples from scratch1 buffer */
- x1 = *__SIMD32(pScr)++;
+ /* Read two samples from scratch1 buffer */
+ x1 = read_q15x2_ia (&pScr1);
- /* Read next four samples from scratch1 buffer */
- x2 = *__SIMD32(pScr)++;
+ /* Read next two samples from scratch1 buffer */
+ x2 = read_q15x2_ia (&pScr1);
tapCnt = (srcBLen) >> 2U;
while (tapCnt > 0U)
{
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
/* Read four samples from smaller buffer */
- y1 = _SIMD32_OFFSET(pIn2);
- y2 = _SIMD32_OFFSET(pIn2 + 2U);
+ y1 = read_q15x2_ia ((q15_t **) &pIn2);
+ y2 = read_q15x2_ia ((q15_t **) &pIn2);
+ /* multiply and accumlate */
acc0 = __SMLALD(x1, y1, acc0);
-
acc2 = __SMLALD(x2, y1, acc2);
+ /* pack input data */
#ifndef ARM_MATH_BIG_ENDIAN
x3 = __PKHBT(x2, x1, 0);
#else
x3 = __PKHBT(x1, x2, 0);
#endif
+ /* multiply and accumlate */
acc1 = __SMLALDX(x3, y1, acc1);
- x1 = _SIMD32_OFFSET(pScr);
+ /* Read next two samples from scratch1 buffer */
+ x1 = read_q15x2_ia (&pScr1);
+ /* multiply and accumlate */
acc0 = __SMLALD(x2, y2, acc0);
-
acc2 = __SMLALD(x1, y2, acc2);
+ /* pack input data */
#ifndef ARM_MATH_BIG_ENDIAN
x3 = __PKHBT(x1, x2, 0);
#else
@@ -302,10 +221,9 @@
#endif
acc3 = __SMLALDX(x3, y1, acc3);
-
acc1 = __SMLALDX(x3, y2, acc1);
- x2 = _SIMD32_OFFSET(pScr + 2U);
+ x2 = read_q15x2_ia (&pScr1);
#ifndef ARM_MATH_BIG_ENDIAN
x3 = __PKHBT(x2, x1, 0);
@@ -315,110 +233,27 @@
acc3 = __SMLALDX(x3, y2, acc3);
-#else
-
- /* Read four samples from smaller buffer */
- a = *pIn2;
- b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- y1 = __PKHBT(a, b, 16);
-#else
- y1 = __PKHBT(b, a, 16);
-#endif
-
- a = *(pIn2 + 2);
- b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
- y2 = __PKHBT(a, b, 16);
-#else
- y2 = __PKHBT(b, a, 16);
-#endif
-
- acc0 = __SMLALD(x1, y1, acc0);
-
- acc2 = __SMLALD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x3 = __PKHBT(x2, x1, 0);
-#else
- x3 = __PKHBT(x1, x2, 0);
-#endif
-
- acc1 = __SMLALDX(x3, y1, acc1);
-
- a = *pScr;
- b = *(pScr + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x1 = __PKHBT(a, b, 16);
-#else
- x1 = __PKHBT(b, a, 16);
-#endif
-
- acc0 = __SMLALD(x2, y2, acc0);
-
- acc2 = __SMLALD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x3 = __PKHBT(x1, x2, 0);
-#else
- x3 = __PKHBT(x2, x1, 0);
-#endif
-
- acc3 = __SMLALDX(x3, y1, acc3);
-
- acc1 = __SMLALDX(x3, y2, acc1);
-
- a = *(pScr + 2);
- b = *(pScr + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x2 = __PKHBT(a, b, 16);
-#else
- x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
- x3 = __PKHBT(x2, x1, 0);
-#else
- x3 = __PKHBT(x1, x2, 0);
-#endif
-
- acc3 = __SMLALDX(x3, y2, acc3);
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
- pIn2 += 4U;
-
- pScr += 4U;
-
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
-
-
/* Update scratch pointer for remaining samples of smaller length sequence */
- pScr -= 4U;
-
+ pScr1 -= 4U;
/* apply same above for remaining samples of smaller length sequence */
tapCnt = (srcBLen) & 3U;
while (tapCnt > 0U)
{
-
/* accumlate the results */
- acc0 += (*pScr++ * *pIn2);
- acc1 += (*pScr++ * *pIn2);
- acc2 += (*pScr++ * *pIn2);
- acc3 += (*pScr++ * *pIn2++);
+ acc0 += (*pScr1++ * *pIn2);
+ acc1 += (*pScr1++ * *pIn2);
+ acc2 += (*pScr1++ * *pIn2);
+ acc3 += (*pScr1++ * *pIn2++);
- pScr -= 3U;
+ pScr1 -= 3U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -439,17 +274,24 @@
pIn2 = py;
pScratch += 4U;
-
}
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
/* Calculate correlation for remaining samples of Bigger length sequence */
while (blkCnt > 0)
{
/* Initialze temporary scratch pointer as scratch1 */
- pScr = pScratch;
+ pScr1 = pScratch;
/* Clear Accumlators */
acc0 = 0;
@@ -459,10 +301,11 @@
while (tapCnt > 0U)
{
- acc0 += (*pScr++ * *pIn2++);
- acc0 += (*pScr++ * *pIn2++);
+ /* Read next two samples from scratch1 buffer */
+ acc0 += (*pScr1++ * *pIn2++);
+ acc0 += (*pScr1++ * *pIn2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -471,31 +314,28 @@
/* apply same above for remaining samples of smaller length sequence */
while (tapCnt > 0U)
{
-
/* accumlate the results */
- acc0 += (*pScr++ * *pIn2++);
+ acc0 += (*pScr1++ * *pIn2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
blkCnt--;
- /* Store the result in the accumulator in the destination buffer. */
+ /* The result is in 2.30 format. Convert to 1.15 with saturation.
+ Then store the output in the destination buffer. */
*pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
-
pOut += inc;
/* Initialization of inputB pointer */
pIn2 = py;
pScratch += 1U;
-
}
-
}
/**
- * @} end of Corr group
+ @} end of Corr group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c
index d4ff45e..9ca7b37 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c
@@ -3,13 +3,13 @@
* Title: arm_correlate_opt_q7.c
* Description: Correlation of Q7 sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,67 +29,53 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Corr
- * @{
+ @addtogroup Corr
+ @{
*/
/**
- * @brief Correlation of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
- * @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
- * @return none.
- *
- *
- * \par Restrictions
- * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- * In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
- * This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.
- *
- *
+ @brief Correlation of Q7 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
+ @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 32-bit internal accumulator.
+ Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+ The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+ This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
+ The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
*/
-
-
void arm_correlate_opt_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2)
+ const q7_t * pSrcA,
+ uint32_t srcALen,
+ const q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst,
+ q15_t * pScratch1,
+ q15_t * pScratch2)
{
- q7_t *pOut = pDst; /* output pointer */
- q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch */
- q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch */
- q7_t *pIn1; /* inputA pointer */
- q7_t *pIn2; /* inputB pointer */
- q15_t *py; /* Intermediate inputB pointer */
- q31_t acc0, acc1, acc2, acc3; /* Accumulators */
- uint32_t j, k = 0U, blkCnt; /* loop counter */
- int32_t inc = 1; /* output pointer increment */
- uint32_t outBlockSize; /* loop counter */
- q15_t x4; /* Temporary input variable */
- uint32_t tapCnt; /* loop counter */
- q31_t x1, x2, x3, y1; /* Temporary input variables */
+ q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch */
+ q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch */
+ q15_t x4; /* Temporary input variable */
+ q15_t *py; /* Temporary input2 pointer */
+ q31_t acc0, acc1, acc2, acc3; /* Accumulators */
+ const q7_t *pIn1, *pIn2; /* InputA and inputB pointer */
+ uint32_t j, k, blkCnt, tapCnt; /* Loop counter */
+ int32_t inc = 1; /* Output pointer increment */
+ uint32_t outBlockSize; /* Loop counter */
+ q31_t x1, x2, x3, y1; /* Temporary input variables */
+ q7_t *pOut = pDst; /* Output pointer */
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -107,13 +93,13 @@
if (srcALen >= srcBLen)
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcA);
+ pIn1 = pSrcA;
/* Initialization of inputB pointer */
- pIn2 = (pSrcB);
+ pIn2 = pSrcB;
/* Number of output samples is calculated */
- outBlockSize = (2U * srcALen) - 1U;
+ outBlockSize = (srcALen * 2U) - 1U;
/* When srcALen > srcBLen, zero padding is done to srcB
* to make their lengths equal.
@@ -123,15 +109,14 @@
/* Updating the pointer position to non zero value */
pOut += j;
-
}
else
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcB);
+ pIn1 = pSrcB;
/* Initialization of inputB pointer */
- pIn2 = (pSrcA);
+ pIn2 = pSrcA;
/* srcBLen is always considered as shorter or equal to srcALen */
j = srcBLen;
@@ -144,7 +129,6 @@
/* Destination address modifier is set to -1 */
inc = -1;
-
}
@@ -152,34 +136,34 @@
k = srcBLen >> 2U;
/* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
+ a second loop below copies for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* copy second buffer in reversal manner */
- x4 = (q15_t) * pIn2++;
+ x4 = (q15_t) *pIn2++;
*pScr2++ = x4;
- x4 = (q15_t) * pIn2++;
+ x4 = (q15_t) *pIn2++;
*pScr2++ = x4;
- x4 = (q15_t) * pIn2++;
+ x4 = (q15_t) *pIn2++;
*pScr2++ = x4;
- x4 = (q15_t) * pIn2++;
+ x4 = (q15_t) *pIn2++;
*pScr2++ = x4;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
/* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
+ No loop unrolling is used. */
k = srcBLen % 0x4U;
while (k > 0U)
{
/* copy second buffer in reversal manner for remaining samples */
- x4 = (q15_t) * pIn2++;
+ x4 = (q15_t) *pIn2++;
*pScr2++ = x4;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -190,28 +174,29 @@
pScr1 += (srcBLen - 1U);
/* Copy (srcALen) samples in scratch buffer */
+ /* Apply loop unrolling and do 4 Copies simultaneously. */
k = srcALen >> 2U;
/* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
+ a second loop below copies for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* copy second buffer in reversal manner */
- x4 = (q15_t) * pIn1++;
+ x4 = (q15_t) *pIn1++;
*pScr1++ = x4;
- x4 = (q15_t) * pIn1++;
+ x4 = (q15_t) *pIn1++;
*pScr1++ = x4;
- x4 = (q15_t) * pIn1++;
+ x4 = (q15_t) *pIn1++;
*pScr1++ = x4;
- x4 = (q15_t) * pIn1++;
+ x4 = (q15_t) *pIn1++;
*pScr1++ = x4;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
/* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
+ No loop unrolling is used. */
k = srcALen % 0x4U;
while (k > 0U)
@@ -224,49 +209,13 @@
k--;
}
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
/* Fill (srcBLen - 1U) zeros at end of scratch buffer */
arm_fill_q15(0, pScr1, (srcBLen - 1U));
/* Update pointer */
pScr1 += (srcBLen - 1U);
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
- k = (srcBLen - 1U) >> 2U;
-
- /* First part of the processing with loop unrolling copies 4 data points at a time.
- ** a second loop below copies for the remaining 1 to 3 samples. */
- while (k > 0U)
- {
- /* copy second buffer in reversal manner */
- *pScr1++ = 0;
- *pScr1++ = 0;
- *pScr1++ = 0;
- *pScr1++ = 0;
-
- /* Decrement the loop counter */
- k--;
- }
-
- /* If the count is not a multiple of 4, copy remaining samples here.
- ** No loop unrolling is used. */
- k = (srcBLen - 1U) % 0x4U;
-
- while (k > 0U)
- {
- /* copy second buffer in reversal manner for remaining samples */
- *pScr1++ = 0;
-
- /* Decrement the loop counter */
- k--;
- }
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
- /* Temporary pointer for second sequence */
+ /* Temporary pointer for scratch2 */
py = pScratch2;
/* Initialization of pScr2 pointer */
@@ -287,18 +236,17 @@
acc3 = 0;
/* Read two samples from scratch1 buffer */
- x1 = *__SIMD32(pScr1)++;
+ x1 = read_q15x2_ia (&pScr1);
/* Read next two samples from scratch1 buffer */
- x2 = *__SIMD32(pScr1)++;
+ x2 = read_q15x2_ia (&pScr1);
tapCnt = (srcBLen) >> 2U;
while (tapCnt > 0U)
{
-
/* Read four samples from smaller buffer */
- y1 = _SIMD32_OFFSET(pScr2);
+ y1 = read_q15x2_ia (&pScr2);
/* multiply and accumlate */
acc0 = __SMLAD(x1, y1, acc0);
@@ -315,7 +263,7 @@
acc1 = __SMLADX(x3, y1, acc1);
/* Read next two samples from scratch1 buffer */
- x1 = *__SIMD32(pScr1)++;
+ x1 = read_q15x2_ia (&pScr1);
/* pack input data */
#ifndef ARM_MATH_BIG_ENDIAN
@@ -327,7 +275,7 @@
acc3 = __SMLADX(x3, y1, acc3);
/* Read four samples from smaller buffer */
- y1 = _SIMD32_OFFSET(pScr2 + 2U);
+ y1 = read_q15x2_ia (&pScr2);
acc0 = __SMLAD(x2, y1, acc0);
@@ -335,7 +283,7 @@
acc1 = __SMLADX(x3, y1, acc1);
- x2 = *__SIMD32(pScr1)++;
+ x2 = read_q15x2_ia (&pScr1);
#ifndef ARM_MATH_BIG_ENDIAN
x3 = __PKHBT(x2, x1, 0);
@@ -345,25 +293,18 @@
acc3 = __SMLADX(x3, y1, acc3);
- pScr2 += 4U;
-
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
-
-
/* Update scratch pointer for remaining samples of smaller length sequence */
pScr1 -= 4U;
-
/* apply same above for remaining samples of smaller length sequence */
tapCnt = (srcBLen) & 3U;
while (tapCnt > 0U)
{
-
/* accumlate the results */
acc0 += (*pScr1++ * *pScr2);
acc1 += (*pScr1++ * *pScr2);
@@ -372,7 +313,7 @@
pScr1 -= 3U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -392,10 +333,8 @@
pScr2 = py;
pScratch1 += 4U;
-
}
-
blkCnt = (srcALen + srcBLen - 1U) & 0x3;
/* Calculate correlation for remaining samples of Bigger length sequence */
@@ -414,7 +353,7 @@
acc0 += (*pScr1++ * *pScr2++);
acc0 += (*pScr1++ * *pScr2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -423,11 +362,10 @@
/* apply same above for remaining samples of smaller length sequence */
while (tapCnt > 0U)
{
-
/* accumlate the results */
acc0 += (*pScr1++ * *pScr2++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -435,18 +373,16 @@
/* Store the result in the accumulator in the destination buffer. */
*pOut = (q7_t) (__SSAT(acc0 >> 7U, 8));
-
pOut += inc;
/* Initialization of inputB pointer */
pScr2 = py;
pScratch1 += 1U;
-
}
}
/**
- * @} end of Corr group
+ @} end of Corr group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c
index 54c14c4..b63c379 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c
@@ -3,13 +3,13 @@
* Title: arm_correlate_q15.c
* Description: Correlation of Q15 sequences
*
- * $Date: 10. December 2018
- * $Revision: V.1.5.2
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2018 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,64 +29,58 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Corr
- * @{
+ @addtogroup Corr
+ @{
*/
/**
- * @brief Correlation of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * This approach provides 33 guard bits and there is no risk of overflow.
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
- *
- * \par
- * Refer to <code>arm_correlate_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
- *
- * \par
- * Refer the function <code>arm_correlate_opt_q15()</code> for a faster implementation of this function using scratch buffers.
- *
+ @brief Correlation of Q15 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+ The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+ This approach provides 33 guard bits and there is no risk of overflow.
+ The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+
+ @remark
+ Refer to \ref arm_correlate_fast_q15() for a faster but less precise version of this function.
+ @remark
+ Refer to \ref arm_correlate_opt_q15() for a faster implementation of this function using scratch buffers.
*/
void arm_correlate_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst)
+ const q15_t * pSrcA,
+ uint32_t srcALen,
+ const q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst)
{
-#if !defined(ARM_MATH_CM0_FAMILY) && !defined(UNALIGNED_SUPPORT_DISABLE)
+#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q15_t *pIn1; /* inputA pointer */
- q15_t *pIn2; /* inputB pointer */
- q15_t *pOut = pDst; /* output pointer */
- q63_t sum, acc0, acc1, acc2, acc3; /* Accumulators */
- q15_t *px; /* Intermediate inputA pointer */
- q15_t *py; /* Intermediate inputB pointer */
- q15_t *pSrc1; /* Intermediate pointers */
- q31_t x0, x1, x2, x3, c0; /* temporary variables for holding input and coefficient values */
- uint32_t j, k = 0U, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3; /* loop counter */
- int32_t inc = 1; /* Destination address modifier */
-
+ const q15_t *pIn1; /* InputA pointer */
+ const q15_t *pIn2; /* InputB pointer */
+ q15_t *pOut = pDst; /* Output pointer */
+ q63_t sum, acc0, acc1, acc2, acc3; /* Accumulators */
+ const q15_t *px; /* Intermediate inputA pointer */
+ const q15_t *py; /* Intermediate inputB pointer */
+ const q15_t *pSrc1; /* Intermediate pointers */
+ q31_t x0, x1, x2, x3, c0; /* Temporary input variables for holding input and coefficient values */
+ uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ uint32_t j, k, count, blkCnt; /* Loop counters */
+ uint32_t outBlockSize;
+ int32_t inc = 1; /* Destination address modifier */
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -104,13 +98,13 @@
if (srcALen >= srcBLen)
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcA);
+ pIn1 = pSrcA;
/* Initialization of inputB pointer */
- pIn2 = (pSrcB);
+ pIn2 = pSrcB;
/* Number of output samples is calculated */
- outBlockSize = (2U * srcALen) - 1U;
+ outBlockSize = (srcALen * 2U) - 1U;
/* When srcALen > srcBLen, zero padding is done to srcB
* to make their lengths equal.
@@ -120,15 +114,14 @@
/* Updating the pointer position to non zero value */
pOut += j;
-
}
else
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcB);
+ pIn1 = pSrcB;
/* Initialization of inputB pointer */
- pIn2 = (pSrcA);
+ pIn2 = pSrcA;
/* srcBLen is always considered as shorter or equal to srcALen */
j = srcBLen;
@@ -141,18 +134,18 @@
/* Destination address modifier is set to -1 */
inc = -1;
-
}
/* The function is internally
- * divided into three parts according to the number of multiplications that has to be
- * taken place between inputA samples and inputB samples. In the first part of the
+ * divided into three stages according to the number of multiplications that has to be
+ * taken place between inputA samples and inputB samples. In the first stage of the
* algorithm, the multiplications increase by one for every iteration.
- * In the second part of the algorithm, srcBLen number of multiplications are done.
- * In the third part of the algorithm, the multiplications decrease by one
- * for every iteration.*/
+ * In the second stage of the algorithm, srcBLen number of multiplications are done.
+ * In the third stage of the algorithm, the multiplications decrease by one
+ * for every iteration. */
+
/* The algorithm is implemented in three stages.
- * The loop counters of each stage is initiated here. */
+ The loop counters of each stage is initiated here. */
blockSize1 = srcBLen - 1U;
blockSize2 = srcALen - (srcBLen - 1U);
blockSize3 = blockSize1;
@@ -189,18 +182,19 @@
sum = 0;
/* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = count >> 2;
+ k = count >> 2U;
/* First part of the processing with loop unrolling. Compute 4 MACs at a time.
** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
+ /* Perform the multiply-accumulate */
/* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
- sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+ sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
/* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
- sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+ sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -210,11 +204,11 @@
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* x[0] * y[srcBLen - 1] */
sum = __SMLALD(*px++, *py++, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -227,10 +221,10 @@
py = pSrc1 - count;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -250,7 +244,7 @@
/* Working pointer of inputB */
py = pIn2;
- /* count is index by which the pointer pIn1 to be incremented */
+ /* count is the index by which the pointer pIn1 to be incremented */
count = 0U;
/* -------------------
@@ -259,10 +253,10 @@
/* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
* So, to loop unroll over blockSize2,
- * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
+ * srcBLen should be greater than or equal to 4 */
if (srcBLen >= 4U)
{
- /* Loop unroll over blockSize2, by 4 */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize2 >> 2U;
while (blkCnt > 0U)
@@ -274,9 +268,10 @@
acc3 = 0;
/* read x[0], x[1] samples */
- x0 = *__SIMD32(px);
+ x0 = read_q15x2 ((q15_t *) px);
+
/* read x[1], x[2] samples */
- x1 = _SIMD32_OFFSET(px + 1);
+ x1 = read_q15x2 ((q15_t *) px + 1);
px += 2U;
/* Apply loop unrolling and compute 4 MACs simultaneously. */
@@ -288,7 +283,7 @@
{
/* Read the first two inputB samples using SIMD:
* y[0] and y[1] */
- c0 = *__SIMD32(py)++;
+ c0 = read_q15x2_ia ((q15_t **) &py);
/* acc0 += x[0] * y[0] + x[1] * y[1] */
acc0 = __SMLALD(x0, c0, acc0);
@@ -297,10 +292,10 @@
acc1 = __SMLALD(x1, c0, acc1);
/* Read x[2], x[3] */
- x2 = *__SIMD32(px);
+ x2 = read_q15x2 ((q15_t *) px);
/* Read x[3], x[4] */
- x3 = _SIMD32_OFFSET(px + 1);
+ x3 = read_q15x2 ((q15_t *) px + 1);
/* acc2 += x[2] * y[0] + x[3] * y[1] */
acc2 = __SMLALD(x2, c0, acc2);
@@ -309,7 +304,7 @@
acc3 = __SMLALD(x3, c0, acc3);
/* Read y[2] and y[3] */
- c0 = *__SIMD32(py)++;
+ c0 = read_q15x2_ia ((q15_t **) &py);
/* acc0 += x[2] * y[2] + x[3] * y[3] */
acc0 = __SMLALD(x2, c0, acc0);
@@ -318,11 +313,10 @@
acc1 = __SMLALD(x3, c0, acc1);
/* Read x[4], x[5] */
- x0 = _SIMD32_OFFSET(px + 2);
+ x0 = read_q15x2 ((q15_t *) px + 2);
/* Read x[5], x[6] */
- x1 = _SIMD32_OFFSET(px + 3);
-
+ x1 = read_q15x2 ((q15_t *) px + 3);
px += 4U;
/* acc2 += x[4] * y[2] + x[5] * y[3] */
@@ -342,21 +336,18 @@
/* Read y[4] */
c0 = *py;
#ifdef ARM_MATH_BIG_ENDIAN
-
c0 = c0 << 16U;
-
#else
-
c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
/* Read x[7] */
- x3 = *__SIMD32(px);
+ x3 = read_q15x2 ((q15_t *) px);
px++;
- /* Perform the multiply-accumulates */
- acc0 = __SMLALD(x0, c0, acc0);
- acc1 = __SMLALD(x1, c0, acc1);
+ /* Perform the multiply-accumulate */
+ acc0 = __SMLALD (x0, c0, acc0);
+ acc1 = __SMLALD (x1, c0, acc1);
acc2 = __SMLALDX(x1, c0, acc2);
acc3 = __SMLALDX(x3, c0, acc3);
}
@@ -364,16 +355,16 @@
if (k == 2U)
{
/* Read y[4], y[5] */
- c0 = *__SIMD32(py);
+ c0 = read_q15x2 ((q15_t *) py);
/* Read x[7], x[8] */
- x3 = *__SIMD32(px);
+ x3 = read_q15x2 ((q15_t *) px);
/* Read x[9] */
- x2 = _SIMD32_OFFSET(px + 1);
+ x2 = read_q15x2 ((q15_t *) px + 1);
px += 2U;
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
acc0 = __SMLALD(x0, c0, acc0);
acc1 = __SMLALD(x1, c0, acc1);
acc2 = __SMLALD(x3, c0, acc2);
@@ -383,15 +374,15 @@
if (k == 3U)
{
/* Read y[4], y[5] */
- c0 = *__SIMD32(py)++;
+ c0 = read_q15x2_ia ((q15_t **) &py);
/* Read x[7], x[8] */
- x3 = *__SIMD32(px);
+ x3 = read_q15x2 ((q15_t *) px);
/* Read x[9] */
- x2 = _SIMD32_OFFSET(px + 1);
+ x2 = read_q15x2 ((q15_t *) px + 1);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
acc0 = __SMLALD(x0, c0, acc0);
acc1 = __SMLALD(x1, c0, acc1);
acc2 = __SMLALD(x3, c0, acc2);
@@ -401,19 +392,18 @@
/* Read y[6] */
#ifdef ARM_MATH_BIG_ENDIAN
-
c0 = c0 << 16U;
#else
-
c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+
/* Read x[10] */
- x3 = _SIMD32_OFFSET(px + 2);
+ x3 = read_q15x2 ((q15_t *) px + 2);
px += 3U;
/* Perform the multiply-accumulates */
acc0 = __SMLALDX(x1, c0, acc0);
- acc1 = __SMLALD(x2, c0, acc1);
+ acc1 = __SMLALD (x2, c0, acc1);
acc2 = __SMLALDX(x2, c0, acc2);
acc3 = __SMLALDX(x3, c0, acc3);
}
@@ -439,7 +429,7 @@
px = pIn1 + count;
py = pIn2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -460,12 +450,12 @@
while (k > 0U)
{
/* Perform the multiply-accumulates */
- sum += ((q63_t) * px++ * *py++);
- sum += ((q63_t) * px++ * *py++);
- sum += ((q63_t) * px++ * *py++);
- sum += ((q63_t) * px++ * *py++);
+ sum += ((q63_t) *px++ * *py++);
+ sum += ((q63_t) *px++ * *py++);
+ sum += ((q63_t) *px++ * *py++);
+ sum += ((q63_t) *px++ * *py++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -476,7 +466,7 @@
while (k > 0U)
{
/* Perform the multiply-accumulates */
- sum += ((q63_t) * px++ * *py++);
+ sum += ((q63_t) *px++ * *py++);
/* Decrement the loop counter */
k--;
@@ -509,13 +499,13 @@
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Loop over srcBLen */
+ /* srcBLen number of MACS should be performed */
k = srcBLen;
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += ((q63_t) * px++ * *py++);
+ sum += ((q63_t) *px++ * *py++);
/* Decrement the loop counter */
k--;
@@ -538,6 +528,7 @@
}
}
+
/* --------------------------
* Initializations of stage3
* -------------------------*/
@@ -576,13 +567,13 @@
** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
- sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+ sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
/* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
- sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+ sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -592,10 +583,10 @@
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum = __SMLALD(*px++, *py++, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -608,23 +599,21 @@
px = ++pSrc1;
py = pIn2;
- /* Decrement the MAC count */
+ /* Decrement MAC count */
count--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize3--;
}
-#else
+#else /* #if defined (ARM_MATH_DSP) */
-/* Run the below code for Cortex-M0 */
-
- q15_t *pIn1 = pSrcA; /* inputA pointer */
- q15_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */
- q63_t sum; /* Accumulators */
- uint32_t i = 0U, j; /* loop counters */
- uint32_t inv = 0U; /* Reverse order flag */
- uint32_t tot = 0U; /* Length */
+ const q15_t *pIn1 = pSrcA; /* InputA pointer */
+ const q15_t *pIn2 = pSrcB + (srcBLen - 1U); /* InputB pointer */
+ q63_t sum; /* Accumulators */
+ uint32_t i = 0U, j; /* Loop counters */
+ uint32_t inv = 0U; /* Reverse order flag */
+ uint32_t tot = 0U; /* Length */
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -672,10 +661,9 @@
/* Setting the reverse flag */
inv = 1;
-
}
- /* Loop to calculate convolution for output length number of times */
+ /* Loop to calculate convolution for output length number of values */
for (i = 0U; i <= tot; i++)
{
/* Initialize sum with zero to carry on MAC operations */
@@ -685,12 +673,13 @@
for (j = 0U; j <= i; j++)
{
/* Check the array limitations */
- if ((((i - j) < srcBLen) && (j < srcALen)))
+ if (((i - j) < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
}
}
+
/* Store the output in the destination buffer */
if (inv == 1)
*pDst-- = (q15_t) __SSAT((sum >> 15U), 16U);
@@ -698,10 +687,10 @@
*pDst++ = (q15_t) __SSAT((sum >> 15U), 16U);
}
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) && !defined(UNALIGNED_SUPPORT_DISABLE) */
+#endif /* #if defined (ARM_MATH_DSP) */
}
/**
- * @} end of Corr group
+ @} end of Corr group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c
index 3d7d3d0..6cac17d 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c
@@ -3,13 +3,13 @@
* Title: arm_correlate_q31.c
* Description: Correlation of Q31 sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,63 +29,64 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Corr
- * @{
+ @addtogroup Corr
+ @{
*/
/**
- * @brief Correlation of Q31 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * There is no saturation on intermediate additions.
- * Thus, if the accumulator overflows it wraps around and distorts the result.
- * The input signals should be scaled down to avoid intermediate overflows.
- * Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
- *
- * \par
- * See <code>arm_correlate_fast_q31()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
+ @brief Correlation of Q31 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ There is no saturation on intermediate additions.
+ Thus, if the accumulator overflows it wraps around and distorts the result.
+ The input signals should be scaled down to avoid intermediate overflows.
+ Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a
+ maximum of min(srcALen, srcBLen) number of additions is carried internally.
+ The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+
+ @remark
+ Refer to \ref arm_correlate_fast_q31() for a faster but less precise implementation of this function.
*/
void arm_correlate_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst)
+ const q31_t * pSrcA,
+ uint32_t srcALen,
+ const q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst)
{
-#if defined (ARM_MATH_DSP)
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ const q31_t *pIn1; /* InputA pointer */
+ const q31_t *pIn2; /* InputB pointer */
+ q31_t *pOut = pDst; /* Output pointer */
+ const q31_t *px; /* Intermediate inputA pointer */
+ const q31_t *py; /* Intermediate inputB pointer */
+ const q31_t *pSrc1; /* Intermediate pointers */
+ q63_t sum; /* Accumulators */
+ uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ uint32_t j, k, count, blkCnt; /* Loop counters */
+ uint32_t outBlockSize;
+ int32_t inc = 1; /* Destination address modifier */
- q31_t *pIn1; /* inputA pointer */
- q31_t *pIn2; /* inputB pointer */
- q31_t *pOut = pDst; /* output pointer */
- q31_t *px; /* Intermediate inputA pointer */
- q31_t *py; /* Intermediate inputB pointer */
- q31_t *pSrc1; /* Intermediate pointers */
- q63_t sum, acc0, acc1, acc2; /* Accumulators */
- q31_t x0, x1, x2, c0; /* temporary variables for holding input and coefficient values */
- uint32_t j, k = 0U, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3; /* loop counter */
- int32_t inc = 1; /* Destination address modifier */
-
+#if defined (ARM_MATH_LOOPUNROLL)
+ q63_t acc0, acc1, acc2; /* Accumulators */
+ q31_t x0, x1, x2, c0; /* Temporary variables for holding input and coefficient values */
+#endif
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -103,10 +104,10 @@
if (srcALen >= srcBLen)
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcA);
+ pIn1 = pSrcA;
/* Initialization of inputB pointer */
- pIn2 = (pSrcB);
+ pIn2 = pSrcB;
/* Number of output samples is calculated */
outBlockSize = (2U * srcALen) - 1U;
@@ -119,15 +120,14 @@
/* Updating the pointer position to non zero value */
pOut += j;
-
}
else
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcB);
+ pIn1 = pSrcB;
/* Initialization of inputB pointer */
- pIn2 = (pSrcA);
+ pIn2 = pSrcA;
/* srcBLen is always considered as shorter or equal to srcALen */
j = srcBLen;
@@ -140,18 +140,18 @@
/* Destination address modifier is set to -1 */
inc = -1;
-
}
/* The function is internally
- * divided into three parts according to the number of multiplications that has to be
- * taken place between inputA samples and inputB samples. In the first part of the
+ * divided into three stages according to the number of multiplications that has to be
+ * taken place between inputA samples and inputB samples. In the first stage of the
* algorithm, the multiplications increase by one for every iteration.
- * In the second part of the algorithm, srcBLen number of multiplications are done.
- * In the third part of the algorithm, the multiplications decrease by one
- * for every iteration.*/
+ * In the second stage of the algorithm, srcBLen number of multiplications are done.
+ * In the third stage of the algorithm, the multiplications decrease by one
+ * for every iteration. */
+
/* The algorithm is implemented in three stages.
- * The loop counters of each stage is initiated here. */
+ The loop counters of each stage is initiated here. */
blockSize1 = srcBLen - 1U;
blockSize2 = srcALen - (srcBLen - 1U);
blockSize3 = blockSize1;
@@ -177,6 +177,7 @@
pSrc1 = pIn2 + (srcBLen - 1U);
py = pSrc1;
+
/* ------------------------
* Stage1 process
* ----------------------*/
@@ -187,37 +188,46 @@
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = count >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+ /* Loop unrolling: Compute 4 outputs at a time */
+ k = count >> 2U;
+
while (k > 0U)
{
/* x[0] * y[srcBLen - 4] */
- sum += (q63_t) * px++ * (*py++);
- /* x[1] * y[srcBLen - 3] */
- sum += (q63_t) * px++ * (*py++);
- /* x[2] * y[srcBLen - 2] */
- sum += (q63_t) * px++ * (*py++);
- /* x[3] * y[srcBLen - 1] */
- sum += (q63_t) * px++ * (*py++);
+ sum += (q63_t) *px++ * (*py++);
- /* Decrement the loop counter */
+ /* x[1] * y[srcBLen - 3] */
+ sum += (q63_t) *px++ * (*py++);
+
+ /* x[2] * y[srcBLen - 2] */
+ sum += (q63_t) *px++ * (*py++);
+
+ /* x[3] * y[srcBLen - 1] */
+ sum += (q63_t) *px++ * (*py++);
+
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize k with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* x[0] * y[srcBLen - 1] */
- sum += (q63_t) * px++ * (*py++);
+ sum += (q63_t) *px++ * (*py++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -230,10 +240,10 @@
py = pSrc1 - count;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -265,6 +275,8 @@
* srcBLen should be greater than or equal to 4 */
if (srcBLen >= 4U)
{
+#if defined (ARM_MATH_LOOPUNROLL)
+
/* Loop unroll by 3 */
blkCnt = blockSize2 / 3;
@@ -276,8 +288,8 @@
acc2 = 0;
/* read x[0], x[1] samples */
- x0 = *(px++);
- x1 = *(px++);
+ x0 = *px++;
+ x1 = *px++;
/* Apply loop unrolling and compute 3 MACs simultaneously. */
k = srcBLen / 3;
@@ -288,7 +300,6 @@
{
/* Read y[0] sample */
c0 = *(py);
-
/* Read x[2] sample */
x2 = *(px);
@@ -302,11 +313,10 @@
/* Read y[1] sample */
c0 = *(py + 1U);
-
/* Read x[3] sample */
x0 = *(px + 1U);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[1] * y[1] */
acc0 += ((q63_t) x1 * c0);
/* acc1 += x[2] * y[1] */
@@ -316,11 +326,10 @@
/* Read y[2] sample */
c0 = *(py + 2U);
-
/* Read x[4] sample */
x1 = *(px + 2U);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* acc0 += x[2] * y[2] */
acc0 += ((q63_t) x2 * c0);
/* acc1 += x[3] * y[2] */
@@ -358,7 +367,7 @@
x0 = x1;
x1 = x2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -380,45 +389,56 @@
px = pIn1 + count;
py = pIn2;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize2 - 3 * (blockSize2 / 3);
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = srcBLen >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* Perform the multiply-accumulates */
- sum += (q63_t) * px++ * (*py++);
- sum += (q63_t) * px++ * (*py++);
- sum += (q63_t) * px++ * (*py++);
- sum += (q63_t) * px++ * (*py++);
+ sum += (q63_t) *px++ * *py++;
+ sum += (q63_t) *px++ * *py++;
+ sum += (q63_t) *px++ * *py++;
+ sum += (q63_t) *px++ * *py++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = srcBLen % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += (q63_t) * px++ * (*py++);
+ sum += (q63_t) *px++ * *py++;
/* Decrement the loop counter */
k--;
@@ -429,14 +449,14 @@
/* Destination pointer is updated according to the address modifier, inc */
pOut += inc;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pIn1 + count;
py = pIn2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
@@ -451,13 +471,13 @@
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Loop over srcBLen */
+ /* srcBLen number of MACS should be performed */
k = srcBLen;
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += (q63_t) * px++ * (*py++);
+ sum += (q63_t) *px++ * *py++;
/* Decrement the loop counter */
k--;
@@ -468,18 +488,19 @@
/* Destination pointer is updated according to the address modifier, inc */
pOut += inc;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pIn1 + count;
py = pIn2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
+
/* --------------------------
* Initializations of stage3
* -------------------------*/
@@ -511,37 +532,46 @@
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* sum += x[srcALen - srcBLen + 4] * y[3] */
- sum += (q63_t) * px++ * (*py++);
- /* sum += x[srcALen - srcBLen + 3] * y[2] */
- sum += (q63_t) * px++ * (*py++);
- /* sum += x[srcALen - srcBLen + 2] * y[1] */
- sum += (q63_t) * px++ * (*py++);
- /* sum += x[srcALen - srcBLen + 1] * y[0] */
- sum += (q63_t) * px++ * (*py++);
+ sum += (q63_t) *px++ * *py++;
- /* Decrement the loop counter */
+ /* sum += x[srcALen - srcBLen + 3] * y[2] */
+ sum += (q63_t) *px++ * *py++;
+
+ /* sum += x[srcALen - srcBLen + 2] * y[1] */
+ sum += (q63_t) *px++ * *py++;
+
+ /* sum += x[srcALen - srcBLen + 1] * y[0] */
+ sum += (q63_t) *px++ * *py++;
+
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
- sum += (q63_t) * px++ * (*py++);
+ /* Perform the multiply-accumulate */
+ sum += (q63_t) *px++ * *py++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -554,23 +584,22 @@
px = ++pSrc1;
py = pIn2;
- /* Decrement the MAC count */
+ /* Decrement MAC count */
count--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize3--;
}
#else
+/* alternate version for CM0_FAMILY */
- /* Run the below code for Cortex-M0 */
-
- q31_t *pIn1 = pSrcA; /* inputA pointer */
- q31_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */
- q63_t sum; /* Accumulators */
- uint32_t i = 0U, j; /* loop counters */
- uint32_t inv = 0U; /* Reverse order flag */
- uint32_t tot = 0U; /* Length */
+ const q31_t *pIn1 = pSrcA; /* InputA pointer */
+ const q31_t *pIn2 = pSrcB + (srcBLen - 1U); /* InputB pointer */
+ q63_t sum; /* Accumulators */
+ uint32_t i = 0U, j; /* Loop counters */
+ uint32_t inv = 0U; /* Reverse order flag */
+ uint32_t tot = 0U; /* Length */
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -618,25 +647,25 @@
/* Setting the reverse flag */
inv = 1;
-
}
/* Loop to calculate correlation for output length number of times */
for (i = 0U; i <= tot; i++)
{
- /* Initialize sum with zero to carry on MAC operations */
+ /* Initialize sum with zero to carry out MAC operations */
sum = 0;
/* Loop to perform MAC operations according to correlation equation */
for (j = 0U; j <= i; j++)
{
/* Check the array limitations */
- if ((((i - j) < srcBLen) && (j < srcALen)))
+ if (((i - j) < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
sum += ((q63_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
}
}
+
/* Store the output in the destination buffer */
if (inv == 1)
*pDst-- = (q31_t) (sum >> 31U);
@@ -644,10 +673,10 @@
*pDst++ = (q31_t) (sum >> 31U);
}
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
}
/**
- * @} end of Corr group
+ @} end of Corr group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c
index dc5247f..47ef9c8 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c
@@ -3,13 +3,13 @@
* Title: arm_correlate_q7.c
* Description: Correlation of Q7 sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,64 +29,63 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup Corr
- * @{
+ @addtogroup Corr
+ @{
*/
/**
- * @brief Correlation of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
- * This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.
- *
- * \par
- * Refer the function <code>arm_correlate_opt_q7()</code> for a faster implementation of this function.
- *
+ @brief Correlation of Q7 sequences.
+ @param[in] pSrcA points to the first input sequence
+ @param[in] srcALen length of the first input sequence
+ @param[in] pSrcB points to the second input sequence
+ @param[in] srcBLen length of the second input sequence
+ @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 32-bit internal accumulator.
+ Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+ The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+ This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
+ The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.
+
+ @remark
+ Refer to \ref arm_correlate_opt_q7() for a faster implementation of this function.
*/
void arm_correlate_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst)
+ const q7_t * pSrcA,
+ uint32_t srcALen,
+ const q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst)
{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
-#if defined (ARM_MATH_DSP)
+ const q7_t *pIn1; /* InputA pointer */
+ const q7_t *pIn2; /* InputB pointer */
+ q7_t *pOut = pDst; /* Output pointer */
+ const q7_t *px; /* Intermediate inputA pointer */
+ const q7_t *py; /* Intermediate inputB pointer */
+ const q7_t *pSrc1; /* Intermediate pointers */
+ q31_t sum; /* Accumulators */
+ uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */
+ uint32_t j, k, count, blkCnt; /* Loop counters */
+ uint32_t outBlockSize;
+ int32_t inc = 1;
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q7_t *pIn1; /* inputA pointer */
- q7_t *pIn2; /* inputB pointer */
- q7_t *pOut = pDst; /* output pointer */
- q7_t *px; /* Intermediate inputA pointer */
- q7_t *py; /* Intermediate inputB pointer */
- q7_t *pSrc1; /* Intermediate pointers */
- q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */
- q31_t input1, input2; /* temporary variables */
- q15_t in1, in2; /* temporary variables */
- q7_t x0, x1, x2, x3, c0, c1; /* temporary variables for holding input and coefficient values */
- uint32_t j, k = 0U, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3; /* loop counter */
- int32_t inc = 1;
-
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t acc0, acc1, acc2, acc3; /* Accumulators */
+ q31_t input1, input2; /* Temporary input variables */
+ q15_t in1, in2; /* Temporary input variables */
+ q7_t x0, x1, x2, x3, c0, c1; /* Temporary variables for holding input and coefficient values */
+#endif
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -104,10 +103,10 @@
if (srcALen >= srcBLen)
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcA);
+ pIn1 = pSrcA;
/* Initialization of inputB pointer */
- pIn2 = (pSrcB);
+ pIn2 = pSrcB;
/* Number of output samples is calculated */
outBlockSize = (2U * srcALen) - 1U;
@@ -120,15 +119,14 @@
/* Updating the pointer position to non zero value */
pOut += j;
-
}
else
{
/* Initialization of inputA pointer */
- pIn1 = (pSrcB);
+ pIn1 = pSrcB;
/* Initialization of inputB pointer */
- pIn2 = (pSrcA);
+ pIn2 = pSrcA;
/* srcBLen is always considered as shorter or equal to srcALen */
j = srcBLen;
@@ -141,18 +139,18 @@
/* Destination address modifier is set to -1 */
inc = -1;
-
}
/* The function is internally
- * divided into three parts according to the number of multiplications that has to be
- * taken place between inputA samples and inputB samples. In the first part of the
+ * divided into three stages according to the number of multiplications that has to be
+ * taken place between inputA samples and inputB samples. In the first stage of the
* algorithm, the multiplications increase by one for every iteration.
- * In the second part of the algorithm, srcBLen number of multiplications are done.
- * In the third part of the algorithm, the multiplications decrease by one
- * for every iteration.*/
+ * In the second stage of the algorithm, srcBLen number of multiplications are done.
+ * In the third stage of the algorithm, the multiplications decrease by one
+ * for every iteration. */
+
/* The algorithm is implemented in three stages.
- * The loop counters of each stage is initiated here. */
+ The loop counters of each stage is initiated here. */
blockSize1 = srcBLen - 1U;
blockSize2 = srcALen - (srcBLen - 1U);
blockSize3 = blockSize1;
@@ -188,21 +186,21 @@
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- k = count >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+ /* Loop unrolling: Compute 4 outputs at a time */
+ k = count >> 2U;
+
while (k > 0U)
{
/* x[0] , x[1] */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* y[srcBLen - 4] , y[srcBLen - 3] */
- in1 = (q15_t) * py++;
- in2 = (q15_t) * py++;
+ in1 = (q15_t) *py++;
+ in2 = (q15_t) *py++;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* x[0] * y[srcBLen - 4] */
@@ -210,40 +208,45 @@
sum = __SMLAD(input1, input2, sum);
/* x[2] , x[3] */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* y[srcBLen - 2] , y[srcBLen - 1] */
- in1 = (q15_t) * py++;
- in2 = (q15_t) * py++;
+ in1 = (q15_t) *py++;
+ in2 = (q15_t) *py++;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* x[2] * y[srcBLen - 2] */
/* x[3] * y[srcBLen - 1] */
sum = __SMLAD(input1, input2, sum);
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize k with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
/* x[0] * y[srcBLen - 1] */
- sum += (q31_t) ((q15_t) * px++ * *py++);
+ sum += (q31_t) ((q15_t) *px++ * *py++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
/* Store the result in the accumulator in the destination buffer. */
- *pOut = (q7_t) (__SSAT(sum >> 7, 8));
+ *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
/* Destination pointer is updated according to the address modifier, inc */
pOut += inc;
@@ -251,10 +254,10 @@
py = pSrc1 - count;
px = pIn1;
- /* Increment the MAC count */
+ /* Increment MAC count */
count++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize1--;
}
@@ -286,7 +289,9 @@
* srcBLen should be greater than or equal to 4 */
if (srcBLen >= 4U)
{
- /* Loop unroll over blockSize2, by 4 */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize2 >> 2U;
while (blkCnt > 0U)
@@ -321,13 +326,13 @@
in1 = (q15_t) x0;
in2 = (q15_t) x1;
- input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* y[0] and y[1] are packed */
in1 = (q15_t) c0;
in2 = (q15_t) c1;
- input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* acc0 += x[0] * y[0] + x[1] * y[1] */
acc0 = __SMLAD(input1, input2, acc0);
@@ -336,7 +341,7 @@
in1 = (q15_t) x1;
in2 = (q15_t) x2;
- input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* acc1 += x[1] * y[0] + x[2] * y[1] */
acc1 = __SMLAD(input1, input2, acc1);
@@ -345,19 +350,19 @@
in1 = (q15_t) x2;
in2 = (q15_t) x3;
- input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* acc2 += x[2] * y[0] + x[3] * y[1] */
acc2 = __SMLAD(input1, input2, acc2);
/* Read x[4] sample */
- x0 = *(px++);
+ x0 = *px++;
/* x[3] and x[4] are packed */
in1 = (q15_t) x3;
in2 = (q15_t) x0;
- input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* acc3 += x[3] * y[0] + x[4] * y[1] */
acc3 = __SMLAD(input1, input2, acc3);
@@ -374,13 +379,13 @@
in1 = (q15_t) x2;
in2 = (q15_t) x3;
- input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* y[2] and y[3] are packed */
in1 = (q15_t) c0;
in2 = (q15_t) c1;
- input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* acc0 += x[2] * y[2] + x[3] * y[3] */
acc0 = __SMLAD(input1, input2, acc0);
@@ -389,7 +394,7 @@
in1 = (q15_t) x3;
in2 = (q15_t) x0;
- input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* acc1 += x[3] * y[2] + x[4] * y[3] */
acc1 = __SMLAD(input1, input2, acc1);
@@ -398,7 +403,7 @@
in1 = (q15_t) x0;
in2 = (q15_t) x1;
- input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* acc2 += x[4] * y[2] + x[5] * y[3] */
acc2 = __SMLAD(input1, input2, acc2);
@@ -410,7 +415,7 @@
in1 = (q15_t) x1;
in2 = (q15_t) x2;
- input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* acc3 += x[5] * y[2] + x[6] * y[3] */
acc3 = __SMLAD(input1, input2, acc3);
@@ -425,7 +430,6 @@
{
/* Read y[4] sample */
c0 = *py++;
-
/* Read x[7] sample */
x3 = *px++;
@@ -444,7 +448,7 @@
x1 = x2;
x2 = x3;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
@@ -467,76 +471,89 @@
px = pIn1 + count;
py = pIn2;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize2 % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = srcBLen >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
+
/* Reading two inputs of SrcA buffer and packing */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
- input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
+ input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* Reading two inputs of SrcB buffer and packing */
- in1 = (q15_t) * py++;
- in2 = (q15_t) * py++;
- input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ in1 = (q15_t) *py++;
+ in2 = (q15_t) *py++;
+ input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum = __SMLAD(input1, input2, sum);
/* Reading two inputs of SrcA buffer and packing */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
- input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
+ input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* Reading two inputs of SrcB buffer and packing */
- in1 = (q15_t) * py++;
- in2 = (q15_t) * py++;
- input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ in1 = (q15_t) *py++;
+ in2 = (q15_t) *py++;
+ input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
- /* Perform the multiply-accumulates */
+ /* Perform the multiply-accumulate */
sum = __SMLAD(input1, input2, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = srcBLen % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
- sum += ((q15_t) * px++ * *py++);
+ /* Perform the multiply-accumulate */
+ sum += ((q15_t) *px++ * *py++);
/* Decrement the loop counter */
k--;
}
/* Store the result in the accumulator in the destination buffer. */
- *pOut = (q7_t) (__SSAT(sum >> 7, 8));
+ *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
/* Destination pointer is updated according to the address modifier, inc */
pOut += inc;
/* Increment the pointer pIn1 index, count by 1 */
- count++;
+ count++;
/* Update the inputA and inputB pointers for next MAC calculation */
px = pIn1 + count;
@@ -557,20 +574,20 @@
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Loop over srcBLen */
+ /* srcBLen number of MACS should be performed */
k = srcBLen;
while (k > 0U)
{
/* Perform the multiply-accumulate */
- sum += ((q15_t) * px++ * *py++);
+ sum += ((q15_t) *px++ * *py++);
/* Decrement the loop counter */
k--;
}
/* Store the result in the accumulator in the destination buffer. */
- *pOut = (q7_t) (__SSAT(sum >> 7, 8));
+ *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
/* Destination pointer is updated according to the address modifier, inc */
pOut += inc;
@@ -581,12 +598,12 @@
px = pIn1 + count;
py = pIn2;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
+
/* --------------------------
* Initializations of stage3
* -------------------------*/
@@ -618,60 +635,66 @@
/* Accumulator is made zero for every iteration */
sum = 0;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
k = count >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 MACs at a time.
- ** a second loop below computes MACs for the remaining 1 to 3 samples. */
while (k > 0U)
{
/* x[srcALen - srcBLen + 1] , x[srcALen - srcBLen + 2] */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
- input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
+ input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* y[0] , y[1] */
- in1 = (q15_t) * py++;
- in2 = (q15_t) * py++;
- input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ in1 = (q15_t) *py++;
+ in2 = (q15_t) *py++;
+ input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* sum += x[srcALen - srcBLen + 1] * y[0] */
/* sum += x[srcALen - srcBLen + 2] * y[1] */
sum = __SMLAD(input1, input2, sum);
/* x[srcALen - srcBLen + 3] , x[srcALen - srcBLen + 4] */
- in1 = (q15_t) * px++;
- in2 = (q15_t) * px++;
- input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ in1 = (q15_t) *px++;
+ in2 = (q15_t) *px++;
+ input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* y[2] , y[3] */
- in1 = (q15_t) * py++;
- in2 = (q15_t) * py++;
- input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+ in1 = (q15_t) *py++;
+ in2 = (q15_t) *py++;
+ input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
/* sum += x[srcALen - srcBLen + 3] * y[2] */
/* sum += x[srcALen - srcBLen + 4] * y[3] */
sum = __SMLAD(input1, input2, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
- /* If the count is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
k = count % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (k > 0U)
{
- /* Perform the multiply-accumulates */
- sum += ((q15_t) * px++ * *py++);
+ /* Perform the multiply-accumulate */
+ sum += ((q15_t) *px++ * *py++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
}
/* Store the result in the accumulator in the destination buffer. */
- *pOut = (q7_t) (__SSAT(sum >> 7, 8));
+ *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
/* Destination pointer is updated according to the address modifier, inc */
pOut += inc;
@@ -679,23 +702,22 @@
px = ++pSrc1;
py = pIn2;
- /* Decrement the MAC count */
+ /* Decrement MAC count */
count--;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blockSize3--;
}
#else
+/* alternate version for CM0_FAMILY */
-/* Run the below code for Cortex-M0 */
-
- q7_t *pIn1 = pSrcA; /* inputA pointer */
- q7_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */
- q31_t sum; /* Accumulator */
- uint32_t i = 0U, j; /* loop counters */
- uint32_t inv = 0U; /* Reverse order flag */
- uint32_t tot = 0U; /* Length */
+ const q7_t *pIn1 = pSrcA; /* InputA pointer */
+ const q7_t *pIn2 = pSrcB + (srcBLen - 1U); /* InputB pointer */
+ q31_t sum; /* Accumulator */
+ uint32_t i = 0U, j; /* Loop counters */
+ uint32_t inv = 0U; /* Reverse order flag */
+ uint32_t tot = 0U; /* Length */
/* The algorithm implementation is based on the lengths of the inputs. */
/* srcB is always made to slide across srcA. */
@@ -743,25 +765,25 @@
/* Setting the reverse flag */
inv = 1;
-
}
/* Loop to calculate convolution for output length number of times */
for (i = 0U; i <= tot; i++)
{
- /* Initialize sum with zero to carry on MAC operations */
+ /* Initialize sum with zero to carry out MAC operations */
sum = 0;
/* Loop to perform MAC operations according to convolution equation */
for (j = 0U; j <= i; j++)
{
/* Check the array limitations */
- if ((((i - j) < srcBLen) && (j < srcALen)))
+ if (((i - j) < srcBLen) && (j < srcALen))
{
/* z[i] += x[i-j] * y[j] */
sum += ((q15_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
}
}
+
/* Store the output in the destination buffer */
if (inv == 1)
*pDst-- = (q7_t) __SSAT((sum >> 7U), 8U);
@@ -769,10 +791,10 @@
*pDst++ = (q7_t) __SSAT((sum >> 7U), 8U);
}
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
}
/**
- * @} end of Corr group
+ @} end of Corr group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c
index 160dc2a..4edfe41 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c
@@ -3,13 +3,13 @@
* Title: arm_fir_decimate_f32.c
* Description: FIR decimation for floating-point sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,143 +29,142 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @defgroup FIR_decimate Finite Impulse Response (FIR) Decimator
- *
- * These functions combine an FIR filter together with a decimator.
- * They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion.
- * Conceptually, the functions are equivalent to the block diagram below:
- * \image html FIRDecimator.gif "Components included in the FIR Decimator functions"
- * When decimating by a factor of <code>M</code>, the signal should be prefiltered by a lowpass filter with a normalized
- * cutoff frequency of <code>1/M</code> in order to prevent aliasing distortion.
- * The user of the function is responsible for providing the filter coefficients.
- *
- * The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner.
- * Instead of calculating all of the FIR filter outputs and discarding <code>M-1</code> out of every <code>M</code>, only the
- * samples output by the decimator are computed.
- * The functions operate on blocks of input and output data.
- * <code>pSrc</code> points to an array of <code>blockSize</code> input values and
- * <code>pDst</code> points to an array of <code>blockSize/M</code> output values.
- * In order to have an integer number of output samples <code>blockSize</code>
- * must always be a multiple of the decimation factor <code>M</code>.
- *
- * The library provides separate functions for Q15, Q31 and floating-point data types.
- *
- * \par Algorithm:
- * The FIR portion of the algorithm uses the standard form filter:
- * <pre>
- * y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
- * </pre>
- * where, <code>b[n]</code> are the filter coefficients.
- * \par
- * The <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
- * Coefficients are stored in time reversed order.
- * \par
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
- * Samples in the state buffer are stored in the order:
- * \par
- * <pre>
- * {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
- * </pre>
- * The state variables are updated after each block of data is processed, the coefficients are untouched.
- *
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter.
- * Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * - Checks to make sure that the size of the input is a multiple of the decimation factor.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * The code below statically initializes each of the 3 different data type filter instance structures
- * <pre>
- *arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};
- *arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};
- *arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};
- * </pre>
- * where <code>M</code> is the decimation factor; <code>numTaps</code> is the number of filter coefficients in the filter;
- * <code>pCoeffs</code> is the address of the coefficient buffer;
- * <code>pState</code> is the address of the state buffer.
- * Be sure to set the values in the state buffer to zeros when doing static initialization.
- *
- * \par Fixed-Point Behavior
- * Care must be taken when using the fixed-point versions of the FIR decimate filter functions.
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
- * Refer to the function specific documentation below for usage guidelines.
+ @defgroup FIR_decimate Finite Impulse Response (FIR) Decimator
+
+ These functions combine an FIR filter together with a decimator.
+ They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion.
+ Conceptually, the functions are equivalent to the block diagram below:
+ \image html FIRDecimator.gif "Components included in the FIR Decimator functions"
+ When decimating by a factor of <code>M</code>, the signal should be prefiltered by a lowpass filter with a normalized
+ cutoff frequency of <code>1/M</code> in order to prevent aliasing distortion.
+ The user of the function is responsible for providing the filter coefficients.
+
+ The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner.
+ Instead of calculating all of the FIR filter outputs and discarding <code>M-1</code> out of every <code>M</code>, only the
+ samples output by the decimator are computed.
+ The functions operate on blocks of input and output data.
+ <code>pSrc</code> points to an array of <code>blockSize</code> input values and
+ <code>pDst</code> points to an array of <code>blockSize/M</code> output values.
+ In order to have an integer number of output samples <code>blockSize</code>
+ must always be a multiple of the decimation factor <code>M</code>.
+
+ The library provides separate functions for Q15, Q31 and floating-point data types.
+
+ @par Algorithm:
+ The FIR portion of the algorithm uses the standard form filter:
+ <pre>
+ y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+ </pre>
+ where, <code>b[n]</code> are the filter coefficients.
+ @par
+ The <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+ Coefficients are stored in time reversed order.
+ @par
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ @par
+ <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
+ Samples in the state buffer are stored in the order:
+ @par
+ <pre>
+ {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+ </pre>
+ The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+ @par Instance Structure
+ The coefficients and state variables for a filter are stored together in an instance data structure.
+ A separate instance structure must be defined for each filter.
+ Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
+ There are separate instance structure declarations for each of the 3 supported data types.
+
+ @par Initialization Functions
+ There is also an associated initialization function for each data type.
+ The initialization function performs the following operations:
+ - Sets the values of the internal structure fields.
+ - Zeros out the values in the state buffer.
+ - Checks to make sure that the size of the input is a multiple of the decimation factor.
+ To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in pState to zero.
+ @par
+ Use of the initialization function is optional.
+ However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+ To place an instance structure into a const data section, the instance structure must be manually initialized.
+ The code below statically initializes each of the 3 different data type filter instance structures
+ <pre>
+ arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};
+ arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};
+ arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};
+ </pre>
+ where <code>M</code> is the decimation factor; <code>numTaps</code> is the number of filter coefficients in the filter;
+ <code>pCoeffs</code> is the address of the coefficient buffer;
+ <code>pState</code> is the address of the state buffer.
+ Be sure to set the values in the state buffer to zeros when doing static initialization.
+
+ @par Fixed-Point Behavior
+ Care must be taken when using the fixed-point versions of the FIR decimate filter functions.
+ In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+ Refer to the function specific documentation below for usage guidelines.
*/
/**
- * @addtogroup FIR_decimate
- * @{
+ @addtogroup FIR_decimate
+ @{
*/
- /**
- * @brief Processing function for the floating-point FIR decimator.
- * @param[in] *S points to an instance of the floating-point FIR decimator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- */
+/**
+ @brief Processing function for floating-point FIR decimator.
+ @param[in] S points to an instance of the floating-point FIR decimator structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+ */
void arm_fir_decimate_f32(
const arm_fir_decimate_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- float32_t *pStateCurnt; /* Points to the current sample of the state */
- float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
- float32_t sum0; /* Accumulator */
- float32_t x0, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */
+ float32_t *pState = S->pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t *pStateCur; /* Points to the current sample of the state */
+ float32_t *px0; /* Temporary pointer for state buffer */
+ const float32_t *pb; /* Temporary pointer for coefficient buffer */
+ float32_t x0, c0; /* Temporary variables to hold state and coefficient values */
+ float32_t acc0; /* Accumulator */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */
-#if defined (ARM_MATH_DSP)
-
- uint32_t blkCntN4;
- float32_t *px0, *px1, *px2, *px3;
- float32_t acc0, acc1, acc2, acc3;
- float32_t x1, x2, x3;
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
+ float32_t *px1, *px2, *px3;
+ float32_t x1, x2, x3;
+ float32_t acc1, acc2, acc3;
+#endif
/* S->pState buffer contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + (numTaps - 1U);
+ /* pStateCur points to the location where the new input data should be written */
+ pStateCur = S->pState + (numTaps - 1U);
- /* Total number of output samples to be computed */
- blkCnt = outBlockSize / 4;
- blkCntN4 = outBlockSize - (4 * blkCnt);
+#if defined (ARM_MATH_LOOPUNROLL)
+ /* Loop unrolling: Compute 4 samples at a time */
+ blkCnt = outBlockSize >> 2U;
+
+ /* Samples loop unrolled by 4 */
while (blkCnt > 0U)
{
/* Copy 4 * decimation factor number of new input samples into the state buffer */
- i = 4 * S->M;
+ i = S->M * 4;
do
{
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
} while (--i);
@@ -184,11 +183,8 @@
/* Initialize coeff pointer */
pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
-
- /* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-4 coefficients. */
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = numTaps >> 2U;
while (tapCnt > 0U)
{
@@ -255,11 +251,11 @@
acc2 += x2 * c0;
acc3 += x3 * c0;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
while (tapCnt > 0U)
@@ -267,7 +263,7 @@
/* Read coefficients */
c0 = *(pb++);
- /* Fetch state variables for acc0, acc1, acc2, acc3 */
+ /* Fetch state variables for acc0, acc1, acc2, acc3 */
x0 = *(px0++);
x1 = *(px1++);
x2 = *(px2++);
@@ -279,13 +275,13 @@
acc2 += x2 * c0;
acc3 += x3 * c0;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
/* Advance the state pointer by the decimation factor
* to process the next group of decimation factor number samples */
- pState = pState + 4 * S->M;
+ pState = pState + S->M * 4;
/* The result is in the accumulator, store in the destination buffer. */
*pDst++ = acc0;
@@ -293,149 +289,20 @@
*pDst++ = acc2;
*pDst++ = acc3;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- while (blkCntN4 > 0U)
- {
- /* Copy decimation factor number of new input samples into the state buffer */
- i = S->M;
-
- do
- {
- *pStateCurnt++ = *pSrc++;
-
- } while (--i);
-
- /* Set accumulator to zero */
- sum0 = 0.0f;
-
- /* Initialize state pointer */
- px = pState;
-
- /* Initialize coeff pointer */
- pb = pCoeffs;
-
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
-
- /* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-4 coefficients. */
- while (tapCnt > 0U)
- {
- /* Read the b[numTaps-1] coefficient */
- c0 = *(pb++);
-
- /* Read x[n-numTaps-1] sample */
- x0 = *(px++);
-
- /* Perform the multiply-accumulate */
- sum0 += x0 * c0;
-
- /* Read the b[numTaps-2] coefficient */
- c0 = *(pb++);
-
- /* Read x[n-numTaps-2] sample */
- x0 = *(px++);
-
- /* Perform the multiply-accumulate */
- sum0 += x0 * c0;
-
- /* Read the b[numTaps-3] coefficient */
- c0 = *(pb++);
-
- /* Read x[n-numTaps-3] sample */
- x0 = *(px++);
-
- /* Perform the multiply-accumulate */
- sum0 += x0 * c0;
-
- /* Read the b[numTaps-4] coefficient */
- c0 = *(pb++);
-
- /* Read x[n-numTaps-4] sample */
- x0 = *(px++);
-
- /* Perform the multiply-accumulate */
- sum0 += x0 * c0;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
- tapCnt = numTaps % 0x4U;
-
- while (tapCnt > 0U)
- {
- /* Read coefficients */
- c0 = *(pb++);
-
- /* Fetch 1 state variable */
- x0 = *(px++);
-
- /* Perform the multiply-accumulate */
- sum0 += x0 * c0;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Advance the state pointer by the decimation factor
- * to process the next group of decimation factor number samples */
- pState = pState + S->M;
-
- /* The result is in the accumulator, store in the destination buffer. */
- *pDst++ = sum0;
-
- /* Decrement the loop counter */
- blkCntN4--;
- }
-
- /* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
-
- /* Points to the start of the state buffer */
- pStateCurnt = S->pState;
-
- i = (numTaps - 1U) >> 2;
-
- /* copy data */
- while (i > 0U)
- {
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- i--;
- }
-
- i = (numTaps - 1U) % 0x04U;
-
- /* copy data */
- while (i > 0U)
- {
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- i--;
- }
+ /* Loop unrolling: Compute remaining samples */
+ blkCnt = outBlockSize % 0x4U;
#else
-/* Run the below code for Cortex-M0 */
-
- /* S->pState buffer contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + (numTaps - 1U);
-
- /* Total number of output samples to be computed */
+ /* Initialize blkCnt with number of samples */
blkCnt = outBlockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Copy decimation factor number of new input samples into the state buffer */
@@ -443,33 +310,88 @@
do
{
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
} while (--i);
/* Set accumulator to zero */
- sum0 = 0.0f;
+ acc0 = 0.0f;
/* Initialize state pointer */
- px = pState;
+ px0 = pState;
/* Initialize coeff pointer */
pb = pCoeffs;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = numTaps >> 2U;
+
+ while (tapCnt > 0U)
+ {
+ /* Read the b[numTaps-1] coefficient */
+ c0 = *pb++;
+
+ /* Read x[n-numTaps-1] sample */
+ x0 = *px0++;
+
+ /* Perform the multiply-accumulate */
+ acc0 += x0 * c0;
+
+ /* Read the b[numTaps-2] coefficient */
+ c0 = *pb++;
+
+ /* Read x[n-numTaps-2] sample */
+ x0 = *px0++;
+
+ /* Perform the multiply-accumulate */
+ acc0 += x0 * c0;
+
+ /* Read the b[numTaps-3] coefficient */
+ c0 = *pb++;
+
+ /* Read x[n-numTaps-3] sample */
+ x0 = *px0++;
+
+ /* Perform the multiply-accumulate */
+ acc0 += x0 * c0;
+
+ /* Read the b[numTaps-4] coefficient */
+ c0 = *pb++;
+
+ /* Read x[n-numTaps-4] sample */
+ x0 = *px0++;
+
+ /* Perform the multiply-accumulate */
+ acc0 += x0 * c0;
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = numTaps % 0x4U;
+
+#else
+
+ /* Initialize tapCnt with number of taps */
tapCnt = numTaps;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Read coefficients */
c0 = *pb++;
/* Fetch 1 state variable */
- x0 = *px++;
+ x0 = *px0++;
/* Perform the multiply-accumulate */
- sum0 += x0 * c0;
+ acc0 += x0 * c0;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -478,35 +400,57 @@
pState = pState + S->M;
/* The result is in the accumulator, store in the destination buffer. */
- *pDst++ = sum0;
+ *pDst++ = acc0;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
/* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the start of the state buffer.
- ** This prepares the state buffer for the next function call. */
+ Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
- pStateCurnt = S->pState;
+ pStateCur = S->pState;
- /* Copy numTaps number of values */
- i = (numTaps - 1U);
+#if defined (ARM_MATH_LOOPUNROLL)
- /* copy data */
- while (i > 0U)
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = (numTaps - 1U) >> 2U;
+
+ /* Copy data */
+ while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
- i--;
+ /* Decrement loop counter */
+ tapCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = (numTaps - 1U) % 0x04U;
+
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ /* Copy data */
+ while (tapCnt > 0U)
+ {
+ *pStateCur++ = *pState++;
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
}
/**
- * @} end of FIR_decimate group
+ @} end of FIR_decimate group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
index 00b2790..b4f3212 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
@@ -3,13 +3,13 @@
* Title: arm_fir_decimate_fast_q15.c
* Description: Fast Q15 FIR Decimator
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,80 +29,75 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_decimate
- * @{
+ @addtogroup FIR_decimate
+ @{
*/
/**
- * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
- * @param[in] *S points to an instance of the Q15 FIR decimator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- * @return none
- *
- * \par Restrictions
- * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- * In this case input, output, state buffers should be aligned by 32-bit
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * This fast version uses a 32-bit accumulator with 2.30 format.
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around and distorts the result.
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2).
- * The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
- *
- * \par
- * Refer to the function <code>arm_fir_decimate_q15()</code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
- * Both the slow and the fast versions use the same instance structure.
- * Use the function <code>arm_fir_decimate_init_q15()</code> to initialize the filter structure.
+ @brief Processing function for the Q15 FIR decimator (fast variant).
+ @param[in] S points to an instance of the Q15 FIR decimator structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of input samples to process per call
+ @return none
+
+ @par Scaling and Overflow Behavior
+ This fast version uses a 32-bit accumulator with 2.30 format.
+ The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ Thus, if the accumulator result overflows it wraps around and distorts the result.
+ In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2).
+ The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
+ @remark
+ Refer to \ref arm_fir_decimate_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
+ Both the slow and the fast versions use the same instance structure.
+ Use function \ref arm_fir_decimate_init_q15() to initialize the filter structure.
*/
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
void arm_fir_decimate_fast_q15(
const arm_fir_decimate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q15_t *px; /* Temporary pointer for state buffer */
- q15_t *pb; /* Temporary pointer coefficient buffer */
- q31_t x0, x1, c0, c1; /* Temporary variables to hold state and coefficient values */
- q31_t sum0; /* Accumulators */
- q31_t acc0, acc1;
- q15_t *px0, *px1;
- uint32_t blkCntN3;
- uint32_t numTaps = S->numTaps; /* Number of taps */
- uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCur; /* Points to the current sample of the state */
+ q15_t *px; /* Temporary pointer for state buffer */
+ const q15_t *pb; /* Temporary pointer for coefficient buffer */
+ q31_t x0, x1, c0; /* Temporary variables to hold state and coefficient values */
+ q31_t sum0; /* Accumulators */
+ q31_t acc0, acc1;
+ q15_t *px0, *px1;
+ uint32_t blkCntN3;
+ uint32_t numTaps = S->numTaps; /* Number of taps */
+ uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t c1; /* Temporary variables to hold state and coefficient values */
+#endif
/* S->pState buffer contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + (numTaps - 1U);
-
+ /* pStateCur points to the location where the new input data should be written */
+ pStateCur = S->pState + (numTaps - 1U);
/* Total number of output samples to be computed */
blkCnt = outBlockSize / 2;
blkCntN3 = outBlockSize - (2 * blkCnt);
-
while (blkCnt > 0U)
{
- /* Copy decimation factor number of new input samples into the state buffer */
- i = 2 * S->M;
+ /* Copy 2 * decimation factor number of new input samples into the state buffer */
+ i = S->M * 2;
do
{
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
} while (--i);
@@ -110,70 +105,70 @@
acc0 = 0;
acc1 = 0;
- /* Initialize state pointer */
+ /* Initialize state pointer for all the samples */
px0 = pState;
-
px1 = pState + S->M;
-
/* Initialize coeff pointer */
pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-4 coefficients. */
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = numTaps >> 2U;
+
while (tapCnt > 0U)
{
- /* Read the Read b[numTaps-1] and b[numTaps-2] coefficients */
- c0 = *__SIMD32(pb)++;
+ /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+ c0 = read_q15x2_ia ((q15_t **) &pb);
/* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
- x0 = *__SIMD32(px0)++;
-
- x1 = *__SIMD32(px1)++;
+ x0 = read_q15x2_ia (&px0);
+ x1 = read_q15x2_ia (&px1);
/* Perform the multiply-accumulate */
acc0 = __SMLAD(x0, c0, acc0);
-
acc1 = __SMLAD(x1, c0, acc1);
/* Read the b[numTaps-3] and b[numTaps-4] coefficient */
- c0 = *__SIMD32(pb)++;
+ c0 = read_q15x2_ia ((q15_t **) &pb);
/* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
- x0 = *__SIMD32(px0)++;
-
- x1 = *__SIMD32(px1)++;
+ x0 = read_q15x2_ia (&px0);
+ x1 = read_q15x2_ia (&px1);
/* Perform the multiply-accumulate */
acc0 = __SMLAD(x0, c0, acc0);
-
acc1 = __SMLAD(x1, c0, acc1);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Read coefficients */
c0 = *pb++;
- /* Fetch 1 state variable */
+ /* Fetch state variables for acc0, acc1 */
x0 = *px0++;
-
x1 = *px1++;
/* Perform the multiply-accumulate */
acc0 = __SMLAD(x0, c0, acc0);
acc1 = __SMLAD(x1, c0, acc1);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -186,12 +181,10 @@
*pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
*pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
-
-
while (blkCntN3 > 0U)
{
/* Copy decimation factor number of new input samples into the state buffer */
@@ -199,11 +192,11 @@
do
{
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
} while (--i);
- /*Set sum to zero */
+ /* Set accumulator to zero */
sum0 = 0;
/* Initialize state pointer */
@@ -212,38 +205,45 @@
/* Initialize coeff pointer */
pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-4 coefficients. */
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = numTaps >> 2U;
+
while (tapCnt > 0U)
{
- /* Read the Read b[numTaps-1] and b[numTaps-2] coefficients */
- c0 = *__SIMD32(pb)++;
+ /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+ c0 = read_q15x2_ia ((q15_t **) &pb);
- /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
- x0 = *__SIMD32(px)++;
+ /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */
+ x0 = read_q15x2_ia (&px);
- /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
- c1 = *__SIMD32(pb)++;
+ /* Read the b[numTaps-3] and b[numTaps-4] coefficients */
+ c1 = read_q15x2_ia ((q15_t **) &pb);
/* Perform the multiply-accumulate */
sum0 = __SMLAD(x0, c0, sum0);
/* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
- x0 = *__SIMD32(px)++;
+ x0 = read_q15x2_ia (&px);
/* Perform the multiply-accumulate */
sum0 = __SMLAD(x0, c1, sum0);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Read coefficients */
@@ -255,7 +255,7 @@
/* Perform the multiply-accumulate */
sum0 = __SMLAD(x0, c0, sum0);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -267,68 +267,67 @@
/* so downsacle by 15 to get output in 1.15 */
*pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCntN3--;
}
/* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
+ Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
- pStateCurnt = S->pState;
+ pStateCur = S->pState;
i = (numTaps - 1U) >> 2U;
/* copy data */
while (i > 0U)
{
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
+ write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+ write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
i = (numTaps - 1U) % 0x04U;
- /* copy data */
+ /* Copy data */
while (i > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
+
}
-#else
-
+#else /* #if defined (ARM_MATH_DSP) */
void arm_fir_decimate_fast_q15(
const arm_fir_decimate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q15_t *px; /* Temporary pointer for state buffer */
- q15_t *pb; /* Temporary pointer coefficient buffer */
- q15_t x0, x1, c0; /* Temporary variables to hold state and coefficient values */
- q31_t sum0; /* Accumulators */
- q31_t acc0, acc1;
- q15_t *px0, *px1;
- uint32_t blkCntN3;
- uint32_t numTaps = S->numTaps; /* Number of taps */
- uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCur; /* Points to the current sample of the state */
+ q15_t *px; /* Temporary pointer for state buffer */
+ const q15_t *pb; /* Temporary pointer for coefficient buffer */
+ q15_t x0, x1, c0; /* Temporary variables to hold state and coefficient values */
+ q31_t sum0; /* Accumulators */
+ q31_t acc0, acc1;
+ q15_t *px0, *px1;
+ uint32_t blkCntN3;
+ uint32_t numTaps = S->numTaps; /* Number of taps */
+ uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */
/* S->pState buffer contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + (numTaps - 1U);
-
+ /* pStateCur points to the location where the new input data should be written */
+ pStateCur = S->pState + (numTaps - 1U);
/* Total number of output samples to be computed */
blkCnt = outBlockSize / 2;
@@ -336,12 +335,12 @@
while (blkCnt > 0U)
{
- /* Copy decimation factor number of new input samples into the state buffer */
- i = 2 * S->M;
+ /* Copy 2 * decimation factor number of new input samples into the state buffer */
+ i = S->M * 2;
do
{
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
} while (--i);
@@ -351,18 +350,16 @@
/* Initialize state pointer */
px0 = pState;
-
px1 = pState + S->M;
-
/* Initialize coeff pointer */
pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-4 coefficients. */
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = numTaps >> 2U;
+
while (tapCnt > 0U)
{
/* Read the Read b[numTaps-1] coefficients */
@@ -387,7 +384,7 @@
acc0 += x0 * c0;
acc1 += x1 * c0;
- /* Read the b[numTaps-3] coefficients */
+ /* Read the b[numTaps-3] coefficients */
c0 = *pb++;
/* Read x[n-numTaps-3] for sample 0 and sample 1 */
@@ -413,9 +410,16 @@
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Read coefficients */
@@ -443,8 +447,7 @@
*pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
*pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -455,11 +458,11 @@
do
{
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
} while (--i);
- /*Set sum to zero */
+ /* Set accumulator to zero */
sum0 = 0;
/* Initialize state pointer */
@@ -468,17 +471,17 @@
/* Initialize coeff pointer */
pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-4 coefficients. */
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = numTaps >> 2U;
+
while (tapCnt > 0U)
{
- /* Read the Read b[numTaps-1] coefficients */
+ /* Read the b[numTaps-1] coefficient */
c0 = *pb++;
- /* Read x[n-numTaps-1] and sample */
+ /* Read x[n-numTaps-1] sample */
x0 = *px++;
/* Perform the multiply-accumulate */
@@ -487,13 +490,13 @@
/* Read the b[numTaps-2] coefficient */
c0 = *pb++;
- /* Read x[n-numTaps-2] and sample */
+ /* Read x[n-numTaps-2] sample */
x0 = *px++;
/* Perform the multiply-accumulate */
sum0 += x0 * c0;
- /* Read the b[numTaps-3] coefficients */
+ /* Read the b[numTaps-3] coefficient */
c0 = *pb++;
/* Read x[n-numTaps-3] sample */
@@ -511,13 +514,20 @@
/* Perform the multiply-accumulate */
sum0 += x0 * c0;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Read coefficients */
@@ -541,7 +551,7 @@
/* so downsacle by 15 to get output in 1.15 */
*pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCntN3--;
}
@@ -550,19 +560,19 @@
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
- pStateCurnt = S->pState;
+ pStateCur = S->pState;
i = (numTaps - 1U) >> 2U;
/* copy data */
while (i > 0U)
{
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
@@ -571,16 +581,15 @@
/* copy data */
while (i > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
}
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+#endif /* #if defined (ARM_MATH_DSP) */
/**
- * @} end of FIR_decimate group
+ @} end of FIR_decimate group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
index 3b3d817..d8becea 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
@@ -3,13 +3,13 @@
* Title: arm_fir_decimate_fast_q31.c
* Description: Fast Q31 FIR Decimator
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,151 +29,167 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_decimate
- * @{
+ @addtogroup FIR_decimate
+ @{
*/
/**
- * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
- * @param[in] *S points to an instance of the Q31 FIR decimator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- * @return none
- *
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
- * These intermediate results are added to a 2.30 accumulator.
- * Finally, the accumulator is saturated and converted to a 1.31 result.
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
- *
- * \par
- * Refer to the function <code>arm_fir_decimate_q31()</code> for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
- * Both the slow and the fast versions use the same instance structure.
- * Use the function <code>arm_fir_decimate_init_q31()</code> to initialize the filter structure.
+ @brief Processing function for the Q31 FIR decimator (fast variant).
+ @param[in] S points to an instance of the Q31 FIR decimator structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+ The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+ These intermediate results are added to a 2.30 accumulator.
+ Finally, the accumulator is saturated and converted to a 1.31 result.
+ The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
+ In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
+
+ @remark
+ Refer to \ref arm_fir_decimate_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
+ Both the slow and the fast versions use the same instance structure.
+ Use function \ref arm_fir_decimate_init_q31() to initialize the filter structure.
*/
void arm_fir_decimate_fast_q31(
- arm_fir_decimate_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ const arm_fir_decimate_instance_q31 * S,
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pState = S->pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *pStateCurnt; /* Points to the current sample of the state */
- q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
- q31_t *px; /* Temporary pointers for state buffer */
- q31_t *pb; /* Temporary pointers for coefficient buffer */
- q31_t sum0; /* Accumulator */
- uint32_t numTaps = S->numTaps; /* Number of taps */
- uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */
- uint32_t blkCntN2;
- q31_t x1;
- q31_t acc0, acc1;
- q31_t *px0, *px1;
+ q31_t *pState = S->pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *pStateCur; /* Points to the current sample of the state */
+ q31_t *px0; /* Temporary pointer for state buffer */
+ const q31_t *pb; /* Temporary pointer for coefficient buffer */
+ q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
+ q63_t acc0; /* Accumulator */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t *px1, *px2, *px3;
+ q31_t x1, x2, x3;
+ q63_t acc1, acc2, acc3;
+#endif
/* S->pState buffer contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + (numTaps - 1U);
+ /* pStateCur points to the location where the new input data should be written */
+ pStateCur = S->pState + (numTaps - 1U);
- /* Total number of output samples to be computed */
+#if defined (ARM_MATH_LOOPUNROLL)
- blkCnt = outBlockSize / 2;
- blkCntN2 = outBlockSize - (2 * blkCnt);
+ /* Loop unrolling: Compute 4 samples at a time */
+ blkCnt = outBlockSize >> 2U;
+ /* Samples loop unrolled by 4 */
while (blkCnt > 0U)
{
- /* Copy decimation factor number of new input samples into the state buffer */
- i = 2 * S->M;
+ /* Copy 4 * decimation factor number of new input samples into the state buffer */
+ i = S->M * 4;
do
{
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
} while (--i);
- /* Set accumulator to zero */
+ /* Set accumulators to zero */
acc0 = 0;
acc1 = 0;
+ acc2 = 0;
+ acc3 = 0;
- /* Initialize state pointer */
+ /* Initialize state pointer for all the samples */
px0 = pState;
px1 = pState + S->M;
+ px2 = pState + 2 * S->M;
+ px3 = pState + 3 * S->M;
/* Initialize coeff pointer */
pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = numTaps >> 2U;
- /* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-4 coefficients. */
while (tapCnt > 0U)
{
/* Read the b[numTaps-1] coefficient */
- c0 = *(pb);
+ c0 = *(pb++);
- /* Read x[n-numTaps-1] for sample 0 sample 1 */
- x0 = *(px0);
- x1 = *(px1);
+ /* Read x[n-numTaps-1] sample for acc0 */
+ x0 = *(px0++);
+ /* Read x[n-numTaps-1] sample for acc1 */
+ x1 = *(px1++);
+ /* Read x[n-numTaps-1] sample for acc2 */
+ x2 = *(px2++);
+ /* Read x[n-numTaps-1] sample for acc3 */
+ x3 = *(px3++);
/* Perform the multiply-accumulate */
acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+ acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+ acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
/* Read the b[numTaps-2] coefficient */
- c0 = *(pb + 1U);
+ c0 = *(pb++);
- /* Read x[n-numTaps-2] for sample 0 sample 1 */
- x0 = *(px0 + 1U);
- x1 = *(px1 + 1U);
+ /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
+ x0 = *(px0++);
+ x1 = *(px1++);
+ x2 = *(px2++);
+ x3 = *(px3++);
/* Perform the multiply-accumulate */
acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+ acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+ acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
/* Read the b[numTaps-3] coefficient */
- c0 = *(pb + 2U);
+ c0 = *(pb++);
- /* Read x[n-numTaps-3] for sample 0 sample 1 */
- x0 = *(px0 + 2U);
- x1 = *(px1 + 2U);
- pb += 4U;
+ /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
+ x0 = *(px0++);
+ x1 = *(px1++);
+ x2 = *(px2++);
+ x3 = *(px3++);
/* Perform the multiply-accumulate */
acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+ acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+ acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
/* Read the b[numTaps-4] coefficient */
- c0 = *(pb - 1U);
+ c0 = *(pb++);
- /* Read x[n-numTaps-4] for sample 0 sample 1 */
- x0 = *(px0 + 3U);
- x1 = *(px1 + 3U);
-
+ /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
+ x0 = *(px0++);
+ x1 = *(px1++);
+ x2 = *(px2++);
+ x3 = *(px3++);
/* Perform the multiply-accumulate */
acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+ acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+ acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
- /* update state pointers */
- px0 += 4U;
- px1 += 4U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
while (tapCnt > 0U)
@@ -181,112 +197,135 @@
/* Read coefficients */
c0 = *(pb++);
- /* Fetch 1 state variable */
+ /* Fetch state variables for acc0, acc1, acc2, acc3 */
x0 = *(px0++);
x1 = *(px1++);
+ x2 = *(px2++);
+ x3 = *(px3++);
/* Perform the multiply-accumulate */
acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+ acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+ acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
/* Advance the state pointer by the decimation factor
* to process the next group of decimation factor number samples */
- pState = pState + S->M * 2;
+ pState = pState + S->M * 4;
/* The result is in the accumulator, store in the destination buffer. */
*pDst++ = (q31_t) (acc0 << 1);
*pDst++ = (q31_t) (acc1 << 1);
+ *pDst++ = (q31_t) (acc2 << 1);
+ *pDst++ = (q31_t) (acc3 << 1);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- while (blkCntN2 > 0U)
+ /* Loop unrolling: Compute remaining samples */
+ blkCnt = outBlockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = outBlockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
{
/* Copy decimation factor number of new input samples into the state buffer */
i = S->M;
do
{
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
} while (--i);
/* Set accumulator to zero */
- sum0 = 0;
+ acc0 = 0;
/* Initialize state pointer */
- px = pState;
+ px0 = pState;
/* Initialize coeff pointer */
pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-4 coefficients. */
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = numTaps >> 2U;
+
while (tapCnt > 0U)
{
/* Read the b[numTaps-1] coefficient */
- c0 = *(pb++);
+ c0 = *pb++;
/* Read x[n-numTaps-1] sample */
- x0 = *(px++);
+ x0 = *px0++;
/* Perform the multiply-accumulate */
- sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
+ acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
/* Read the b[numTaps-2] coefficient */
- c0 = *(pb++);
+ c0 = *pb++;
/* Read x[n-numTaps-2] sample */
- x0 = *(px++);
+ x0 = *px0++;
/* Perform the multiply-accumulate */
- sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
+ acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
/* Read the b[numTaps-3] coefficient */
- c0 = *(pb++);
+ c0 = *pb++;
/* Read x[n-numTaps-3] sample */
- x0 = *(px++);
+ x0 = *px0++;
/* Perform the multiply-accumulate */
- sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
+ acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
/* Read the b[numTaps-4] coefficient */
- c0 = *(pb++);
+ c0 = *pb++;
/* Read x[n-numTaps-4] sample */
- x0 = *(px++);
+ x0 = *px0++;
/* Perform the multiply-accumulate */
- sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
+ acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Read coefficients */
- c0 = *(pb++);
+ c0 = *pb++;
/* Fetch 1 state variable */
- x0 = *(px++);
+ x0 = *px0++;
/* Perform the multiply-accumulate */
- sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
+ acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -295,45 +334,57 @@
pState = pState + S->M;
/* The result is in the accumulator, store in the destination buffer. */
- *pDst++ = (q31_t) (sum0 << 1);
+ *pDst++ = (q31_t) (acc0 << 1);
- /* Decrement the loop counter */
- blkCntN2--;
+ /* Decrement loop counter */
+ blkCnt--;
}
/* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
+ Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
- pStateCurnt = S->pState;
+ pStateCur = S->pState;
- i = (numTaps - 1U) >> 2U;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* copy data */
- while (i > 0U)
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = (numTaps - 1U) >> 2U;
+
+ /* Copy data */
+ while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
- i--;
+ /* Decrement loop counter */
+ tapCnt--;
}
- i = (numTaps - 1U) % 0x04U;
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = (numTaps - 1U) % 0x04U;
- /* copy data */
- while (i > 0U)
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ /* Copy data */
+ while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
- i--;
+ /* Decrement loop counter */
+ tapCnt--;
}
+
}
/**
- * @} end of FIR_decimate group
+ @} end of FIR_decimate group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
index 20eb959..8cccaad 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_fir_decimate_init_f32.c
* Description: Floating-point FIR Decimator initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,44 +29,44 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_decimate
- * @{
+ @addtogroup FIR_decimate
+ @{
*/
/**
- * @brief Initialization function for the floating-point FIR decimator.
- * @param[in,out] *S points to an instance of the floating-point FIR decimator structure.
- * @param[in] numTaps number of coefficients in the filter.
- * @param[in] M decimation factor.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
- * <code>blockSize</code> is not a multiple of <code>M</code>.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code>arm_fir_decimate_f32()</code>.
- * <code>M</code> is the decimation factor.
+ @brief Initialization function for the floating-point FIR decimator.
+ @param[in,out] S points to an instance of the floating-point FIR decimator structure
+ @param[in] numTaps number of coefficients in the filter
+ @param[in] M decimation factor
+ @param[in] pCoeffs points to the filter coefficients
+ @param[in] pState points to the state buffer
+ @param[in] blockSize number of input samples to process per call
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ @par
+ <code>pState</code> points to the array of state variables.
+ <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code>arm_fir_decimate_f32()</code>.
+ <code>M</code> is the decimation factor.
*/
arm_status arm_fir_decimate_init_f32(
- arm_fir_decimate_instance_f32 * S,
- uint16_t numTaps,
- uint8_t M,
- float32_t * pCoeffs,
- float32_t * pState,
- uint32_t blockSize)
+ arm_fir_decimate_instance_f32 * S,
+ uint16_t numTaps,
+ uint8_t M,
+ const float32_t * pCoeffs,
+ float32_t * pState,
+ uint32_t blockSize)
{
arm_status status;
@@ -84,7 +84,7 @@
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
- /* Clear state buffer and size is always (blockSize + numTaps - 1) */
+ /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));
/* Assign state pointer */
@@ -101,5 +101,5 @@
}
/**
- * @} end of FIR_decimate group
+ @} end of FIR_decimate group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
index 9094de5..cfa0f23 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
@@ -3,13 +3,13 @@
* Title: arm_fir_decimate_init_q15.c
* Description: Initialization function for the Q15 FIR Decimator
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,47 +29,46 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_decimate
- * @{
+ @addtogroup FIR_decimate
+ @{
*/
/**
- * @brief Initialization function for the Q15 FIR decimator.
- * @param[in,out] *S points to an instance of the Q15 FIR decimator structure.
- * @param[in] numTaps number of coefficients in the filter.
- * @param[in] M decimation factor.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
- * <code>blockSize</code> is not a multiple of <code>M</code>.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples
- * to the call <code>arm_fir_decimate_q15()</code>.
- * <code>M</code> is the decimation factor.
+ @brief Initialization function for the Q15 FIR decimator.
+ @param[in,out] S points to an instance of the Q15 FIR decimator structure
+ @param[in] numTaps number of coefficients in the filter
+ @param[in] M decimation factor
+ @param[in] pCoeffs points to the filter coefficients
+ @param[in] pState points to the state buffer
+ @param[in] blockSize number of input samples to process
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ @par
+ <code>pState</code> points to the array of state variables.
+ <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples
+ to the call <code>arm_fir_decimate_q15()</code>.
+ <code>M</code> is the decimation factor.
*/
arm_status arm_fir_decimate_init_q15(
- arm_fir_decimate_instance_q15 * S,
- uint16_t numTaps,
- uint8_t M,
- q15_t * pCoeffs,
- q15_t * pState,
- uint32_t blockSize)
+ arm_fir_decimate_instance_q15 * S,
+ uint16_t numTaps,
+ uint8_t M,
+ const q15_t * pCoeffs,
+ q15_t * pState,
+ uint32_t blockSize)
{
-
arm_status status;
/* The size of the input block must be a multiple of the decimation factor */
@@ -86,13 +85,13 @@
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
- /* Clear the state buffer. The size of buffer is always (blockSize + numTaps - 1) */
+ /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
/* Assign state pointer */
S->pState = pState;
- /* Assign Decimation factor */
+ /* Assign Decimation Factor */
S->M = M;
status = ARM_MATH_SUCCESS;
@@ -103,5 +102,5 @@
}
/**
- * @} end of FIR_decimate group
+ @} end of FIR_decimate group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
index a223a8e..c8dd5cc 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_fir_decimate_init_q31.c
* Description: Initialization function for Q31 FIR Decimation filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,44 +29,44 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_decimate
- * @{
+ @addtogroup FIR_decimate
+ @{
*/
/**
- * @brief Initialization function for the Q31 FIR decimator.
- * @param[in,out] *S points to an instance of the Q31 FIR decimator structure.
- * @param[in] numTaps number of coefficients in the filter.
- * @param[in] M decimation factor.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
- * <code>blockSize</code> is not a multiple of <code>M</code>.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code>arm_fir_decimate_q31()</code>.
- * <code>M</code> is the decimation factor.
+ @brief Initialization function for the Q31 FIR decimator.
+ @param[in,out] S points to an instance of the Q31 FIR decimator structure
+ @param[in] numTaps number of coefficients in the filter
+ @param[in] M decimation factor
+ @param[in] pCoeffs points to the filter coefficients
+ @param[in] pState points to the state buffer
+ @param[in] blockSize number of input samples to process
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ @par
+ <code>pState</code> points to the array of state variables.
+ <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code>arm_fir_decimate_q31()</code>.
+ <code>M</code> is the decimation factor.
*/
arm_status arm_fir_decimate_init_q31(
- arm_fir_decimate_instance_q31 * S,
- uint16_t numTaps,
- uint8_t M,
- q31_t * pCoeffs,
- q31_t * pState,
- uint32_t blockSize)
+ arm_fir_decimate_instance_q31 * S,
+ uint16_t numTaps,
+ uint8_t M,
+ const q31_t * pCoeffs,
+ q31_t * pState,
+ uint32_t blockSize)
{
arm_status status;
@@ -84,13 +84,13 @@
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
- /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
- memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(q31_t));
+ /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
+ memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
/* Assign state pointer */
S->pState = pState;
- /* Assign Decimation factor */
+ /* Assign Decimation Factor */
S->M = M;
status = ARM_MATH_SUCCESS;
@@ -101,5 +101,5 @@
}
/**
- * @} end of FIR_decimate group
+ @} end of FIR_decimate group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c
index 345aa9c..0ab961a 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c
@@ -3,13 +3,13 @@
* Title: arm_fir_decimate_q15.c
* Description: Q15 FIR Decimator
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,77 +29,75 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_decimate
- * @{
+ @addtogroup FIR_decimate
+ @{
*/
/**
- * @brief Processing function for the Q15 FIR decimator.
- * @param[in] *S points to an instance of the Q15 FIR decimator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the location where the output result is written.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.
- *
- * \par
- * Refer to the function <code>arm_fir_decimate_fast_q15()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
+ @brief Processing function for the Q15 FIR decimator.
+ @param[in] S points to an instance of the Q15 FIR decimator structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of input samples to process per call
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+ The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+ There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+ After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+ Lastly, the accumulator is saturated to yield a result in 1.15 format.
+
+ @remark
+ Refer to \ref arm_fir_decimate_fast_q15() for a faster but less precise implementation of this function.
*/
#if defined (ARM_MATH_DSP)
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
void arm_fir_decimate_q15(
const arm_fir_decimate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q15_t *px; /* Temporary pointer for state buffer */
- q15_t *pb; /* Temporary pointer coefficient buffer */
- q31_t x0, x1, c0, c1; /* Temporary variables to hold state and coefficient values */
- q63_t sum0; /* Accumulators */
- q63_t acc0, acc1;
- q15_t *px0, *px1;
- uint32_t blkCntN3;
- uint32_t numTaps = S->numTaps; /* Number of taps */
- uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCur; /* Points to the current sample of the state */
+ q15_t *px; /* Temporary pointer for state buffer */
+ const q15_t *pb; /* Temporary pointer for coefficient buffer */
+ q31_t x0, x1, c0; /* Temporary variables to hold state and coefficient values */
+ q63_t sum0; /* Accumulators */
+ q63_t acc0, acc1;
+ q15_t *px0, *px1;
+ uint32_t blkCntN3;
+ uint32_t numTaps = S->numTaps; /* Number of taps */
+ uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t c1; /* Temporary variables to hold state and coefficient values */
+#endif
/* S->pState buffer contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + (numTaps - 1U);
-
+ /* pStateCur points to the location where the new input data should be written */
+ pStateCur = S->pState + (numTaps - 1U);
/* Total number of output samples to be computed */
blkCnt = outBlockSize / 2;
blkCntN3 = outBlockSize - (2 * blkCnt);
-
while (blkCnt > 0U)
{
- /* Copy decimation factor number of new input samples into the state buffer */
- i = 2 * S->M;
+ /* Copy 2 * decimation factor number of new input samples into the state buffer */
+ i = S->M * 2;
do
{
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
} while (--i);
@@ -107,70 +105,70 @@
acc0 = 0;
acc1 = 0;
- /* Initialize state pointer */
+ /* Initialize state pointer for all the samples */
px0 = pState;
-
px1 = pState + S->M;
-
/* Initialize coeff pointer */
pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-4 coefficients. */
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = numTaps >> 2U;
+
while (tapCnt > 0U)
{
- /* Read the Read b[numTaps-1] and b[numTaps-2] coefficients */
- c0 = *__SIMD32(pb)++;
+ /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+ c0 = read_q15x2_ia ((q15_t **) &pb);
/* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
- x0 = *__SIMD32(px0)++;
-
- x1 = *__SIMD32(px1)++;
+ x0 = read_q15x2_ia (&px0);
+ x1 = read_q15x2_ia (&px1);
/* Perform the multiply-accumulate */
acc0 = __SMLALD(x0, c0, acc0);
-
acc1 = __SMLALD(x1, c0, acc1);
/* Read the b[numTaps-3] and b[numTaps-4] coefficient */
- c0 = *__SIMD32(pb)++;
+ c0 = read_q15x2_ia ((q15_t **) &pb);
/* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
- x0 = *__SIMD32(px0)++;
-
- x1 = *__SIMD32(px1)++;
+ x0 = read_q15x2_ia (&px0);
+ x1 = read_q15x2_ia (&px1);
/* Perform the multiply-accumulate */
acc0 = __SMLALD(x0, c0, acc0);
-
acc1 = __SMLALD(x1, c0, acc1);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Read coefficients */
c0 = *pb++;
- /* Fetch 1 state variable */
+ /* Fetch state variables for acc0, acc1 */
x0 = *px0++;
-
x1 = *px1++;
/* Perform the multiply-accumulate */
acc0 = __SMLALD(x0, c0, acc0);
acc1 = __SMLALD(x1, c0, acc1);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -183,12 +181,10 @@
*pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
*pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
-
-
while (blkCntN3 > 0U)
{
/* Copy decimation factor number of new input samples into the state buffer */
@@ -196,11 +192,11 @@
do
{
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
} while (--i);
- /*Set sum to zero */
+ /* Set accumulator to zero */
sum0 = 0;
/* Initialize state pointer */
@@ -209,38 +205,45 @@
/* Initialize coeff pointer */
pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-4 coefficients. */
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = numTaps >> 2U;
+
while (tapCnt > 0U)
{
- /* Read the Read b[numTaps-1] and b[numTaps-2] coefficients */
- c0 = *__SIMD32(pb)++;
+ /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+ c0 = read_q15x2_ia ((q15_t **) &pb);
- /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
- x0 = *__SIMD32(px)++;
+ /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */
+ x0 = read_q15x2_ia (&px);
- /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
- c1 = *__SIMD32(pb)++;
+ /* Read the b[numTaps-3] and b[numTaps-4] coefficients */
+ c1 = read_q15x2_ia ((q15_t **) &pb);
/* Perform the multiply-accumulate */
sum0 = __SMLALD(x0, c0, sum0);
/* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
- x0 = *__SIMD32(px)++;
+ x0 = read_q15x2_ia (&px);
/* Perform the multiply-accumulate */
sum0 = __SMLALD(x0, c1, sum0);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Read coefficients */
@@ -252,7 +255,7 @@
/* Perform the multiply-accumulate */
sum0 = __SMLALD(x0, c0, sum0);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -264,68 +267,67 @@
/* so downsacle by 15 to get output in 1.15 */
*pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCntN3--;
}
/* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
+ Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
- pStateCurnt = S->pState;
+ pStateCur = S->pState;
i = (numTaps - 1U) >> 2U;
/* copy data */
while (i > 0U)
{
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
+ write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+ write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
i = (numTaps - 1U) % 0x04U;
- /* copy data */
+ /* Copy data */
while (i > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
+
}
-#else
-
+#else /* #if defined (ARM_MATH_DSP) */
void arm_fir_decimate_q15(
const arm_fir_decimate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q15_t *px; /* Temporary pointer for state buffer */
- q15_t *pb; /* Temporary pointer coefficient buffer */
- q15_t x0, x1, c0; /* Temporary variables to hold state and coefficient values */
- q63_t sum0; /* Accumulators */
- q63_t acc0, acc1;
- q15_t *px0, *px1;
- uint32_t blkCntN3;
- uint32_t numTaps = S->numTaps; /* Number of taps */
- uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCur; /* Points to the current sample of the state */
+ q15_t *px; /* Temporary pointer for state buffer */
+ const q15_t *pb; /* Temporary pointer for coefficient buffer */
+ q15_t x0, x1, c0; /* Temporary variables to hold state and coefficient values */
+ q63_t sum0; /* Accumulators */
+ q63_t acc0, acc1;
+ q15_t *px0, *px1;
+ uint32_t blkCntN3;
+ uint32_t numTaps = S->numTaps; /* Number of taps */
+ uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */
/* S->pState buffer contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + (numTaps - 1U);
-
+ /* pStateCur points to the location where the new input data should be written */
+ pStateCur = S->pState + (numTaps - 1U);
/* Total number of output samples to be computed */
blkCnt = outBlockSize / 2;
@@ -333,12 +335,12 @@
while (blkCnt > 0U)
{
- /* Copy decimation factor number of new input samples into the state buffer */
- i = 2 * S->M;
+ /* Copy 2 * decimation factor number of new input samples into the state buffer */
+ i = S->M * 2;
do
{
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
} while (--i);
@@ -348,18 +350,16 @@
/* Initialize state pointer */
px0 = pState;
-
px1 = pState + S->M;
-
/* Initialize coeff pointer */
pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-4 coefficients. */
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = numTaps >> 2U;
+
while (tapCnt > 0U)
{
/* Read the Read b[numTaps-1] coefficients */
@@ -410,9 +410,16 @@
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Read coefficients */
@@ -440,7 +447,7 @@
*pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
*pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -451,11 +458,11 @@
do
{
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
} while (--i);
- /*Set sum to zero */
+ /* Set accumulator to zero */
sum0 = 0;
/* Initialize state pointer */
@@ -464,17 +471,17 @@
/* Initialize coeff pointer */
pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-4 coefficients. */
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = numTaps >> 2U;
+
while (tapCnt > 0U)
{
- /* Read the Read b[numTaps-1] coefficients */
+ /* Read the b[numTaps-1] coefficient */
c0 = *pb++;
- /* Read x[n-numTaps-1] and sample */
+ /* Read x[n-numTaps-1] sample */
x0 = *px++;
/* Perform the multiply-accumulate */
@@ -483,13 +490,13 @@
/* Read the b[numTaps-2] coefficient */
c0 = *pb++;
- /* Read x[n-numTaps-2] and sample */
+ /* Read x[n-numTaps-2] sample */
x0 = *px++;
/* Perform the multiply-accumulate */
sum0 += x0 * c0;
- /* Read the b[numTaps-3] coefficients */
+ /* Read the b[numTaps-3] coefficient */
c0 = *pb++;
/* Read x[n-numTaps-3] sample */
@@ -507,13 +514,20 @@
/* Perform the multiply-accumulate */
sum0 += x0 * c0;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Read coefficients */
@@ -537,7 +551,7 @@
/* so downsacle by 15 to get output in 1.15 */
*pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCntN3--;
}
@@ -546,19 +560,19 @@
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
- pStateCurnt = S->pState;
+ pStateCur = S->pState;
i = (numTaps - 1U) >> 2U;
/* copy data */
while (i > 0U)
{
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
@@ -567,118 +581,15 @@
/* copy data */
while (i > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
}
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-#else
-
-
-void arm_fir_decimate_q15(
- const arm_fir_decimate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
-{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q15_t *px; /* Temporary pointer for state buffer */
- q15_t *pb; /* Temporary pointer coefficient buffer */
- q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
- q63_t sum0; /* Accumulators */
- uint32_t numTaps = S->numTaps; /* Number of taps */
- uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */
-
-
-
-/* Run the below code for Cortex-M0 */
-
- /* S->pState buffer contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + (numTaps - 1U);
-
- /* Total number of output samples to be computed */
- blkCnt = outBlockSize;
-
- while (blkCnt > 0U)
- {
- /* Copy decimation factor number of new input samples into the state buffer */
- i = S->M;
-
- do
- {
- *pStateCurnt++ = *pSrc++;
-
- } while (--i);
-
- /*Set sum to zero */
- sum0 = 0;
-
- /* Initialize state pointer */
- px = pState;
-
- /* Initialize coeff pointer */
- pb = pCoeffs;
-
- tapCnt = numTaps;
-
- while (tapCnt > 0U)
- {
- /* Read coefficients */
- c0 = *pb++;
-
- /* Fetch 1 state variable */
- x0 = *px++;
-
- /* Perform the multiply-accumulate */
- sum0 += (q31_t) x0 *c0;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Advance the state pointer by the decimation factor
- * to process the next group of decimation factor number samples */
- pState = pState + S->M;
-
- /*Store filter output , smlad will return the values in 2.14 format */
- /* so downsacle by 15 to get output in 1.15 */
- *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the start of the state buffer.
- ** This prepares the state buffer for the next function call. */
-
- /* Points to the start of the state buffer */
- pStateCurnt = S->pState;
-
- i = numTaps - 1U;
-
- /* copy data */
- while (i > 0U)
- {
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- i--;
- }
-
-
-}
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_DSP) */
/**
- * @} end of FIR_decimate group
+ @} end of FIR_decimate group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c
index ed67442..e876c00 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c
@@ -3,13 +3,13 @@
* Title: arm_fir_decimate_q31.c
* Description: Q31 FIR Decimator
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,130 +29,164 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_decimate
- * @{
+ @addtogroup FIR_decimate
+ @{
*/
/**
- * @brief Processing function for the Q31 FIR decimator.
- * @param[in] *S points to an instance of the Q31 FIR decimator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- * @return none
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
- * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
- *
- * \par
- * Refer to the function <code>arm_fir_decimate_fast_q31()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
+ @brief Processing function for the Q31 FIR decimator.
+ @param[in] S points to an instance of the Q31 FIR decimator structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ Thus, if the accumulator result overflows it wraps around rather than clip.
+ In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
+ After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
+
+ @remark
+ Refer to \ref arm_fir_decimate_fast_q31() for a faster but less precise implementation of this function.
*/
void arm_fir_decimate_q31(
const arm_fir_decimate_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pState = S->pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *pStateCurnt; /* Points to the current sample of the state */
- q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
- q31_t *px; /* Temporary pointers for state buffer */
- q31_t *pb; /* Temporary pointers for coefficient buffer */
- q63_t sum0; /* Accumulator */
- uint32_t numTaps = S->numTaps; /* Number of taps */
- uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */
+ q31_t *pState = S->pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *pStateCur; /* Points to the current sample of the state */
+ q31_t *px0; /* Temporary pointer for state buffer */
+ const q31_t *pb; /* Temporary pointer for coefficient buffer */
+ q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
+ q63_t acc0; /* Accumulator */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t *px1, *px2, *px3;
+ q31_t x1, x2, x3;
+ q63_t acc1, acc2, acc3;
+#endif
/* S->pState buffer contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + (numTaps - 1U);
+ /* pStateCur points to the location where the new input data should be written */
+ pStateCur = S->pState + (numTaps - 1U);
- /* Total number of output samples to be computed */
- blkCnt = outBlockSize;
+#if defined (ARM_MATH_LOOPUNROLL)
+ /* Loop unrolling: Compute 4 samples at a time */
+ blkCnt = outBlockSize >> 2U;
+
+ /* Samples loop unrolled by 4 */
while (blkCnt > 0U)
{
- /* Copy decimation factor number of new input samples into the state buffer */
- i = S->M;
+ /* Copy 4 * decimation factor number of new input samples into the state buffer */
+ i = S->M * 4;
do
{
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
} while (--i);
- /* Set accumulator to zero */
- sum0 = 0;
+ /* Set accumulators to zero */
+ acc0 = 0;
+ acc1 = 0;
+ acc2 = 0;
+ acc3 = 0;
- /* Initialize state pointer */
- px = pState;
+ /* Initialize state pointer for all the samples */
+ px0 = pState;
+ px1 = pState + S->M;
+ px2 = pState + 2 * S->M;
+ px3 = pState + 3 * S->M;
/* Initialize coeff pointer */
pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = numTaps >> 2U;
- /* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-4 coefficients. */
while (tapCnt > 0U)
{
/* Read the b[numTaps-1] coefficient */
c0 = *(pb++);
- /* Read x[n-numTaps-1] sample */
- x0 = *(px++);
+ /* Read x[n-numTaps-1] sample for acc0 */
+ x0 = *(px0++);
+ /* Read x[n-numTaps-1] sample for acc1 */
+ x1 = *(px1++);
+ /* Read x[n-numTaps-1] sample for acc2 */
+ x2 = *(px2++);
+ /* Read x[n-numTaps-1] sample for acc3 */
+ x3 = *(px3++);
/* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
+ acc0 += (q63_t) x0 * c0;
+ acc1 += (q63_t) x1 * c0;
+ acc2 += (q63_t) x2 * c0;
+ acc3 += (q63_t) x3 * c0;
/* Read the b[numTaps-2] coefficient */
c0 = *(pb++);
- /* Read x[n-numTaps-2] sample */
- x0 = *(px++);
+ /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
+ x0 = *(px0++);
+ x1 = *(px1++);
+ x2 = *(px2++);
+ x3 = *(px3++);
/* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
+ acc0 += (q63_t) x0 * c0;
+ acc1 += (q63_t) x1 * c0;
+ acc2 += (q63_t) x2 * c0;
+ acc3 += (q63_t) x3 * c0;
/* Read the b[numTaps-3] coefficient */
c0 = *(pb++);
- /* Read x[n-numTaps-3] sample */
- x0 = *(px++);
+ /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
+ x0 = *(px0++);
+ x1 = *(px1++);
+ x2 = *(px2++);
+ x3 = *(px3++);
/* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
+ acc0 += (q63_t) x0 * c0;
+ acc1 += (q63_t) x1 * c0;
+ acc2 += (q63_t) x2 * c0;
+ acc3 += (q63_t) x3 * c0;
/* Read the b[numTaps-4] coefficient */
c0 = *(pb++);
- /* Read x[n-numTaps-4] sample */
- x0 = *(px++);
+ /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
+ x0 = *(px0++);
+ x1 = *(px1++);
+ x2 = *(px2++);
+ x3 = *(px3++);
/* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
+ acc0 += (q63_t) x0 * c0;
+ acc1 += (q63_t) x1 * c0;
+ acc2 += (q63_t) x2 * c0;
+ acc3 += (q63_t) x3 * c0;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
while (tapCnt > 0U)
@@ -160,70 +194,46 @@
/* Read coefficients */
c0 = *(pb++);
- /* Fetch 1 state variable */
- x0 = *(px++);
+ /* Fetch state variables for acc0, acc1, acc2, acc3 */
+ x0 = *(px0++);
+ x1 = *(px1++);
+ x2 = *(px2++);
+ x3 = *(px3++);
/* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
+ acc0 += (q63_t) x0 * c0;
+ acc1 += (q63_t) x1 * c0;
+ acc2 += (q63_t) x2 * c0;
+ acc3 += (q63_t) x3 * c0;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
/* Advance the state pointer by the decimation factor
* to process the next group of decimation factor number samples */
- pState = pState + S->M;
+ pState = pState + S->M * 4;
/* The result is in the accumulator, store in the destination buffer. */
- *pDst++ = (q31_t) (sum0 >> 31);
+ *pDst++ = (q31_t) (acc0 >> 31);
+ *pDst++ = (q31_t) (acc1 >> 31);
+ *pDst++ = (q31_t) (acc2 >> 31);
+ *pDst++ = (q31_t) (acc3 >> 31);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
-
- /* Points to the start of the state buffer */
- pStateCurnt = S->pState;
-
- i = (numTaps - 1U) >> 2U;
-
- /* copy data */
- while (i > 0U)
- {
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- i--;
- }
-
- i = (numTaps - 1U) % 0x04U;
-
- /* copy data */
- while (i > 0U)
- {
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- i--;
- }
+ /* Loop unrolling: Compute remaining samples */
+ blkCnt = outBlockSize % 0x4U;
#else
-/* Run the below code for Cortex-M0 */
-
- /* S->pState buffer contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + (numTaps - 1U);
-
- /* Total number of output samples to be computed */
+ /* Initialize blkCnt with number of samples */
blkCnt = outBlockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Copy decimation factor number of new input samples into the state buffer */
@@ -231,33 +241,88 @@
do
{
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
} while (--i);
/* Set accumulator to zero */
- sum0 = 0;
+ acc0 = 0;
/* Initialize state pointer */
- px = pState;
+ px0 = pState;
/* Initialize coeff pointer */
pb = pCoeffs;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = numTaps >> 2U;
+
+ while (tapCnt > 0U)
+ {
+ /* Read the b[numTaps-1] coefficient */
+ c0 = *pb++;
+
+ /* Read x[n-numTaps-1] sample */
+ x0 = *px0++;
+
+ /* Perform the multiply-accumulate */
+ acc0 += (q63_t) x0 * c0;
+
+ /* Read the b[numTaps-2] coefficient */
+ c0 = *pb++;
+
+ /* Read x[n-numTaps-2] sample */
+ x0 = *px0++;
+
+ /* Perform the multiply-accumulate */
+ acc0 += (q63_t) x0 * c0;
+
+ /* Read the b[numTaps-3] coefficient */
+ c0 = *pb++;
+
+ /* Read x[n-numTaps-3] sample */
+ x0 = *px0++;
+
+ /* Perform the multiply-accumulate */
+ acc0 += (q63_t) x0 * c0;
+
+ /* Read the b[numTaps-4] coefficient */
+ c0 = *pb++;
+
+ /* Read x[n-numTaps-4] sample */
+ x0 = *px0++;
+
+ /* Perform the multiply-accumulate */
+ acc0 += (q63_t) x0 * c0;
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = numTaps % 0x4U;
+
+#else
+
+ /* Initialize tapCnt with number of taps */
tapCnt = numTaps;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Read coefficients */
c0 = *pb++;
/* Fetch 1 state variable */
- x0 = *px++;
+ x0 = *px0++;
/* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
+ acc0 += (q63_t) x0 * c0;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -266,34 +331,57 @@
pState = pState + S->M;
/* The result is in the accumulator, store in the destination buffer. */
- *pDst++ = (q31_t) (sum0 >> 31);
+ *pDst++ = (q31_t) (acc0 >> 31);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
/* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the start of the state buffer.
- ** This prepares the state buffer for the next function call. */
+ Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
- pStateCurnt = S->pState;
+ pStateCur = S->pState;
- i = numTaps - 1U;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* copy data */
- while (i > 0U)
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = (numTaps - 1U) >> 2U;
+
+ /* Copy data */
+ while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
- i--;
+ /* Decrement loop counter */
+ tapCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = (numTaps - 1U) % 0x04U;
+
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ /* Copy data */
+ while (tapCnt > 0U)
+ {
+ *pStateCur++ = *pState++;
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
}
/**
- * @} end of FIR_decimate group
+ @} end of FIR_decimate group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c
index e6fe25a..c9f961f 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c
@@ -3,13 +3,13 @@
* Title: arm_fir_f32.c
* Description: Floating-point FIR filter processing function
*
- * $Date: 10. December 2018
- * $Revision: V.1.5.2
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2018 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,525 +29,465 @@
#include "arm_math.h"
/**
-* @ingroup groupFilters
-*/
+ @ingroup groupFilters
+ */
/**
-* @defgroup FIR Finite Impulse Response (FIR) Filters
-*
-* This set of functions implements Finite Impulse Response (FIR) filters
-* for Q7, Q15, Q31, and floating-point data types. Fast versions of Q15 and Q31 are also provided.
-* The functions operate on blocks of input and output data and each call to the function processes
-* <code>blockSize</code> samples through the filter. <code>pSrc</code> and
-* <code>pDst</code> points to input and output arrays containing <code>blockSize</code> values.
-*
-* \par Algorithm:
-* The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations.
-* Each filter coefficient <code>b[n]</code> is multiplied by a state variable which equals a previous input sample <code>x[n]</code>.
-* <pre>
-* y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
-* </pre>
-* \par
-* \image html FIR.gif "Finite Impulse Response filter"
-* \par
-* <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
-* Coefficients are stored in time reversed order.
-* \par
-* <pre>
-* {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-* </pre>
-* \par
-* <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
-* Samples in the state buffer are stored in the following order.
-* \par
-* <pre>
-* {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
-* </pre>
-* \par
-* Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code>.
-* The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters,
-* to be avoided and yields a significant speed improvement.
-* The state variables are updated after each block of data is processed; the coefficients are untouched.
-* \par Instance Structure
-* The coefficients and state variables for a filter are stored together in an instance data structure.
-* A separate instance structure must be defined for each filter.
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
-* There are separate instance structure declarations for each of the 4 supported data types.
-*
-* \par Initialization Functions
-* There is also an associated initialization function for each data type.
-* The initialization function performs the following operations:
-* - Sets the values of the internal structure fields.
-* - Zeros out the values in the state buffer.
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numTaps, pCoeffs, pState. Also set all of the values in pState to zero.
-*
-* \par
-* Use of the initialization function is optional.
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-* To place an instance structure into a const data section, the instance structure must be manually initialized.
-* Set the values in the state buffer to zeros before static initialization.
-* The code below statically initializes each of the 4 different data type filter instance structures
-* <pre>
-*arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};
-*arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};
-*arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};
-*arm_fir_instance_q7 S = {numTaps, pState, pCoeffs};
-* </pre>
-*
-* where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer;
-* <code>pCoeffs</code> is the address of the coefficient buffer.
-*
-* \par Fixed-Point Behavior
-* Care must be taken when using the fixed-point versions of the FIR filter functions.
-* In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
-* Refer to the function specific documentation below for usage guidelines.
-*/
+ @defgroup FIR Finite Impulse Response (FIR) Filters
+
+ This set of functions implements Finite Impulse Response (FIR) filters
+ for Q7, Q15, Q31, and floating-point data types. Fast versions of Q15 and Q31 are also provided.
+ The functions operate on blocks of input and output data and each call to the function processes
+ <code>blockSize</code> samples through the filter. <code>pSrc</code> and
+ <code>pDst</code> points to input and output arrays containing <code>blockSize</code> values.
+
+ @par Algorithm
+ The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations.
+ Each filter coefficient <code>b[n]</code> is multiplied by a state variable which equals a previous input sample <code>x[n]</code>.
+ <pre>
+ y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+ </pre>
+ @par
+ \image html FIR.GIF "Finite Impulse Response filter"
+ @par
+ <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+ Coefficients are stored in time reversed order.
+ @par
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ @par
+ <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
+ Samples in the state buffer are stored in the following order.
+ @par
+ <pre>
+ {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+ </pre>
+ @par
+ Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code>.
+ The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters,
+ to be avoided and yields a significant speed improvement.
+ The state variables are updated after each block of data is processed; the coefficients are untouched.
+
+ @par Instance Structure
+ The coefficients and state variables for a filter are stored together in an instance data structure.
+ A separate instance structure must be defined for each filter.
+ Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+ There are separate instance structure declarations for each of the 4 supported data types.
+
+ @par Initialization Functions
+ There is also an associated initialization function for each data type.
+ The initialization function performs the following operations:
+ - Sets the values of the internal structure fields.
+ - Zeros out the values in the state buffer.
+ To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ numTaps, pCoeffs, pState. Also set all of the values in pState to zero.
+ @par
+ Use of the initialization function is optional.
+ However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+ To place an instance structure into a const data section, the instance structure must be manually initialized.
+ Set the values in the state buffer to zeros before static initialization.
+ The code below statically initializes each of the 4 different data type filter instance structures
+ <pre>
+ arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};
+ arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};
+ arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};
+ arm_fir_instance_q7 S = {numTaps, pState, pCoeffs};
+ </pre>
+ where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer;
+ <code>pCoeffs</code> is the address of the coefficient buffer.
+
+ @par Fixed-Point Behavior
+ Care must be taken when using the fixed-point versions of the FIR filter functions.
+ In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+ Refer to the function specific documentation below for usage guidelines.
+ */
/**
-* @addtogroup FIR
-* @{
-*/
+ @addtogroup FIR
+ @{
+ */
/**
-*
-* @param[in] *S points to an instance of the floating-point FIR filter structure.
-* @param[in] *pSrc points to the block of input data.
-* @param[out] *pDst points to the block of output data.
-* @param[in] blockSize number of samples to process per call.
-* @return none.
-*
-*/
-
-#if defined(ARM_MATH_CM0_FAMILY)
+ @brief Processing function for floating-point FIR filter.
+ @param[in] S points to an instance of the floating-point FIR filter structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+ */
void arm_fir_f32(
-const arm_fir_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
+ const arm_fir_instance_f32 * S,
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- float32_t *pStateCurnt; /* Points to the current sample of the state */
- float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t i, tapCnt, blkCnt; /* Loop counters */
+ float32_t *pState = S->pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t *pStateCurnt; /* Points to the current sample of the state */
+ float32_t *px; /* Temporary pointer for state buffer */
+ const float32_t *pb; /* Temporary pointer for coefficient buffer */
+ float32_t acc0; /* Accumulator */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t i, tapCnt, blkCnt; /* Loop counters */
- /* Run the below code for Cortex-M0 */
+#if defined (ARM_MATH_LOOPUNROLL)
+ float32_t acc1, acc2, acc3, acc4, acc5, acc6, acc7; /* Accumulators */
+ float32_t x0, x1, x2, x3, x4, x5, x6, x7; /* Temporary variables to hold state values */
+ float32_t c0; /* Temporary variable to hold coefficient value */
+#endif
- float32_t acc;
+ /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+ /* pStateCurnt points to the location where the new input data should be written */
+ pStateCurnt = &(S->pState[(numTaps - 1U)]);
- /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = &(S->pState[(numTaps - 1U)]);
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Initialize blkCnt with blockSize */
- blkCnt = blockSize;
+ /* Loop unrolling: Compute 8 output values simultaneously.
+ * The variables acc0 ... acc7 hold output values that are being computed:
+ *
+ * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+ * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+ * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+ * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3]
+ */
- while (blkCnt > 0U)
- {
- /* Copy one sample at a time into state buffer */
- *pStateCurnt++ = *pSrc++;
+ blkCnt = blockSize >> 3U;
- /* Set the accumulator to zero */
- acc = 0.0f;
+ while (blkCnt > 0U)
+ {
+ /* Copy 4 new input samples into the state buffer. */
+ *pStateCurnt++ = *pSrc++;
+ *pStateCurnt++ = *pSrc++;
+ *pStateCurnt++ = *pSrc++;
+ *pStateCurnt++ = *pSrc++;
- /* Initialize state pointer */
- px = pState;
+ /* Set all accumulators to zero */
+ acc0 = 0.0f;
+ acc1 = 0.0f;
+ acc2 = 0.0f;
+ acc3 = 0.0f;
+ acc4 = 0.0f;
+ acc5 = 0.0f;
+ acc6 = 0.0f;
+ acc7 = 0.0f;
- /* Initialize Coefficient pointer */
- pb = pCoeffs;
+ /* Initialize state pointer */
+ px = pState;
- i = numTaps;
+ /* Initialize coefficient pointer */
+ pb = pCoeffs;
+
+ /* This is separated from the others to avoid
+ * a call to __aeabi_memmove which would be slower
+ */
+ *pStateCurnt++ = *pSrc++;
+ *pStateCurnt++ = *pSrc++;
+ *pStateCurnt++ = *pSrc++;
+ *pStateCurnt++ = *pSrc++;
+
+ /* Read the first 7 samples from the state buffer: x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
+ x0 = *px++;
+ x1 = *px++;
+ x2 = *px++;
+ x3 = *px++;
+ x4 = *px++;
+ x5 = *px++;
+ x6 = *px++;
+
+ /* Loop unrolling: process 8 taps at a time. */
+ tapCnt = numTaps >> 3U;
+
+ while (tapCnt > 0U)
+ {
+ /* Read the b[numTaps-1] coefficient */
+ c0 = *(pb++);
+
+ /* Read x[n-numTaps-3] sample */
+ x7 = *(px++);
+
+ /* acc0 += b[numTaps-1] * x[n-numTaps] */
+ acc0 += x0 * c0;
+
+ /* acc1 += b[numTaps-1] * x[n-numTaps-1] */
+ acc1 += x1 * c0;
+
+ /* acc2 += b[numTaps-1] * x[n-numTaps-2] */
+ acc2 += x2 * c0;
+
+ /* acc3 += b[numTaps-1] * x[n-numTaps-3] */
+ acc3 += x3 * c0;
+
+ /* acc4 += b[numTaps-1] * x[n-numTaps-4] */
+ acc4 += x4 * c0;
+
+ /* acc1 += b[numTaps-1] * x[n-numTaps-5] */
+ acc5 += x5 * c0;
+
+ /* acc2 += b[numTaps-1] * x[n-numTaps-6] */
+ acc6 += x6 * c0;
+
+ /* acc3 += b[numTaps-1] * x[n-numTaps-7] */
+ acc7 += x7 * c0;
+
+ /* Read the b[numTaps-2] coefficient */
+ c0 = *(pb++);
+
+ /* Read x[n-numTaps-4] sample */
+ x0 = *(px++);
+
+ /* Perform the multiply-accumulate */
+ acc0 += x1 * c0;
+ acc1 += x2 * c0;
+ acc2 += x3 * c0;
+ acc3 += x4 * c0;
+ acc4 += x5 * c0;
+ acc5 += x6 * c0;
+ acc6 += x7 * c0;
+ acc7 += x0 * c0;
+
+ /* Read the b[numTaps-3] coefficient */
+ c0 = *(pb++);
+
+ /* Read x[n-numTaps-5] sample */
+ x1 = *(px++);
/* Perform the multiply-accumulates */
- do
- {
- /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
- acc += *px++ * *pb++;
- i--;
+ acc0 += x2 * c0;
+ acc1 += x3 * c0;
+ acc2 += x4 * c0;
+ acc3 += x5 * c0;
+ acc4 += x6 * c0;
+ acc5 += x7 * c0;
+ acc6 += x0 * c0;
+ acc7 += x1 * c0;
- } while (i > 0U);
+ /* Read the b[numTaps-4] coefficient */
+ c0 = *(pb++);
- /* The result is store in the destination buffer. */
- *pDst++ = acc;
+ /* Read x[n-numTaps-6] sample */
+ x2 = *(px++);
- /* Advance state pointer by 1 for the next sample */
- pState = pState + 1;
+ /* Perform the multiply-accumulates */
+ acc0 += x3 * c0;
+ acc1 += x4 * c0;
+ acc2 += x5 * c0;
+ acc3 += x6 * c0;
+ acc4 += x7 * c0;
+ acc5 += x0 * c0;
+ acc6 += x1 * c0;
+ acc7 += x2 * c0;
- blkCnt--;
- }
+ /* Read the b[numTaps-4] coefficient */
+ c0 = *(pb++);
- /* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the starting of the state buffer.
- ** This prepares the state buffer for the next function call. */
+ /* Read x[n-numTaps-6] sample */
+ x3 = *(px++);
+ /* Perform the multiply-accumulates */
+ acc0 += x4 * c0;
+ acc1 += x5 * c0;
+ acc2 += x6 * c0;
+ acc3 += x7 * c0;
+ acc4 += x0 * c0;
+ acc5 += x1 * c0;
+ acc6 += x2 * c0;
+ acc7 += x3 * c0;
- /* Points to the start of the state buffer */
- pStateCurnt = S->pState;
+ /* Read the b[numTaps-4] coefficient */
+ c0 = *(pb++);
- /* Copy numTaps number of values */
- tapCnt = numTaps - 1U;
+ /* Read x[n-numTaps-6] sample */
+ x4 = *(px++);
- /* Copy data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
+ /* Perform the multiply-accumulates */
+ acc0 += x5 * c0;
+ acc1 += x6 * c0;
+ acc2 += x7 * c0;
+ acc3 += x0 * c0;
+ acc4 += x1 * c0;
+ acc5 += x2 * c0;
+ acc6 += x3 * c0;
+ acc7 += x4 * c0;
- /* Decrement the loop counter */
+ /* Read the b[numTaps-4] coefficient */
+ c0 = *(pb++);
+
+ /* Read x[n-numTaps-6] sample */
+ x5 = *(px++);
+
+ /* Perform the multiply-accumulates */
+ acc0 += x6 * c0;
+ acc1 += x7 * c0;
+ acc2 += x0 * c0;
+ acc3 += x1 * c0;
+ acc4 += x2 * c0;
+ acc5 += x3 * c0;
+ acc6 += x4 * c0;
+ acc7 += x5 * c0;
+
+ /* Read the b[numTaps-4] coefficient */
+ c0 = *(pb++);
+
+ /* Read x[n-numTaps-6] sample */
+ x6 = *(px++);
+
+ /* Perform the multiply-accumulates */
+ acc0 += x7 * c0;
+ acc1 += x0 * c0;
+ acc2 += x1 * c0;
+ acc3 += x2 * c0;
+ acc4 += x3 * c0;
+ acc5 += x4 * c0;
+ acc6 += x5 * c0;
+ acc7 += x6 * c0;
+
+ /* Decrement loop counter */
tapCnt--;
- }
+ }
-}
+ /* Loop unrolling: Compute remaining outputs */
+ tapCnt = numTaps % 0x8U;
+
+ while (tapCnt > 0U)
+ {
+ /* Read coefficients */
+ c0 = *(pb++);
+
+ /* Fetch 1 state variable */
+ x7 = *(px++);
+
+ /* Perform the multiply-accumulates */
+ acc0 += x0 * c0;
+ acc1 += x1 * c0;
+ acc2 += x2 * c0;
+ acc3 += x3 * c0;
+ acc4 += x4 * c0;
+ acc5 += x5 * c0;
+ acc6 += x6 * c0;
+ acc7 += x7 * c0;
+
+ /* Reuse the present sample states for next sample */
+ x0 = x1;
+ x1 = x2;
+ x2 = x3;
+ x3 = x4;
+ x4 = x5;
+ x5 = x6;
+ x6 = x7;
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+ /* Advance the state pointer by 8 to process the next group of 8 samples */
+ pState = pState + 8;
+
+ /* The results in the 8 accumulators, store in the destination buffer. */
+ *pDst++ = acc0;
+ *pDst++ = acc1;
+ *pDst++ = acc2;
+ *pDst++ = acc3;
+ *pDst++ = acc4;
+ *pDst++ = acc5;
+ *pDst++ = acc6;
+ *pDst++ = acc7;
+
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining output samples */
+ blkCnt = blockSize % 0x8U;
#else
-void arm_fir_f32(
-const arm_fir_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
-{
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- float32_t *pStateCurnt; /* Points to the current sample of the state */
- float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
- float32_t acc0, acc1, acc2, acc3, acc4, acc5, acc6, acc7; /* Accumulators */
- float32_t x0, x1, x2, x3, x4, x5, x6, x7, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t i, tapCnt, blkCnt; /* Loop counters */
+ /* Initialize blkCnt with number of taps */
+ blkCnt = blockSize;
- /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = &(S->pState[(numTaps - 1U)]);
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
- /* Apply loop unrolling and compute 8 output values simultaneously.
- * The variables acc0 ... acc7 hold output values that are being computed:
- *
- * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
- * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
- * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
- * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3]
- */
- blkCnt = blockSize >> 3;
+ while (blkCnt > 0U)
+ {
+ /* Copy one sample at a time into state buffer */
+ *pStateCurnt++ = *pSrc++;
- /* First part of the processing with loop unrolling. Compute 8 outputs at a time.
- ** a second loop below computes the remaining 1 to 7 samples. */
- while (blkCnt > 0U)
- {
- /* Copy four new input samples into the state buffer */
- *pStateCurnt++ = *pSrc++;
- *pStateCurnt++ = *pSrc++;
- *pStateCurnt++ = *pSrc++;
- *pStateCurnt++ = *pSrc++;
+ /* Set the accumulator to zero */
+ acc0 = 0.0f;
- /* Set all accumulators to zero */
- acc0 = 0.0f;
- acc1 = 0.0f;
- acc2 = 0.0f;
- acc3 = 0.0f;
- acc4 = 0.0f;
- acc5 = 0.0f;
- acc6 = 0.0f;
- acc7 = 0.0f;
+ /* Initialize state pointer */
+ px = pState;
- /* Initialize state pointer */
- px = pState;
+ /* Initialize Coefficient pointer */
+ pb = pCoeffs;
- /* Initialize coeff pointer */
- pb = (pCoeffs);
+ i = numTaps;
- /* This is separated from the others to avoid
- * a call to __aeabi_memmove which would be slower
- */
- *pStateCurnt++ = *pSrc++;
- *pStateCurnt++ = *pSrc++;
- *pStateCurnt++ = *pSrc++;
- *pStateCurnt++ = *pSrc++;
+ /* Perform the multiply-accumulates */
+ do
+ {
+ /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
+ acc0 += *px++ * *pb++;
- /* Read the first seven samples from the state buffer: x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
- x0 = *px++;
- x1 = *px++;
- x2 = *px++;
- x3 = *px++;
- x4 = *px++;
- x5 = *px++;
- x6 = *px++;
+ i--;
+ } while (i > 0U);
- /* Loop unrolling. Process 8 taps at a time. */
- tapCnt = numTaps >> 3U;
+ /* Store result in destination buffer. */
+ *pDst++ = acc0;
- /* Loop over the number of taps. Unroll by a factor of 8.
- ** Repeat until we've computed numTaps-8 coefficients. */
- while (tapCnt > 0U)
- {
- /* Read the b[numTaps-1] coefficient */
- c0 = *(pb++);
+ /* Advance state pointer by 1 for the next sample */
+ pState = pState + 1U;
- /* Read x[n-numTaps-3] sample */
- x7 = *(px++);
+ /* Decrement loop counter */
+ blkCnt--;
+ }
- /* acc0 += b[numTaps-1] * x[n-numTaps] */
- acc0 += x0 * c0;
+ /* Processing is complete.
+ Now copy the last numTaps - 1 samples to the start of the state buffer.
+ This prepares the state buffer for the next function call. */
- /* acc1 += b[numTaps-1] * x[n-numTaps-1] */
- acc1 += x1 * c0;
+ /* Points to the start of the state buffer */
+ pStateCurnt = S->pState;
- /* acc2 += b[numTaps-1] * x[n-numTaps-2] */
- acc2 += x2 * c0;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* acc3 += b[numTaps-1] * x[n-numTaps-3] */
- acc3 += x3 * c0;
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = (numTaps - 1U) >> 2U;
- /* acc4 += b[numTaps-1] * x[n-numTaps-4] */
- acc4 += x4 * c0;
+ /* Copy data */
+ while (tapCnt > 0U)
+ {
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
- /* acc1 += b[numTaps-1] * x[n-numTaps-5] */
- acc5 += x5 * c0;
+ /* Decrement loop counter */
+ tapCnt--;
+ }
- /* acc2 += b[numTaps-1] * x[n-numTaps-6] */
- acc6 += x6 * c0;
+ /* Calculate remaining number of copies */
+ tapCnt = (numTaps - 1U) % 0x4U;
- /* acc3 += b[numTaps-1] * x[n-numTaps-7] */
- acc7 += x7 * c0;
+#else
- /* Read the b[numTaps-2] coefficient */
- c0 = *(pb++);
+ /* Initialize tapCnt with number of taps */
+ tapCnt = (numTaps - 1U);
- /* Read x[n-numTaps-4] sample */
- x0 = *(px++);
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
- /* Perform the multiply-accumulate */
- acc0 += x1 * c0;
- acc1 += x2 * c0;
- acc2 += x3 * c0;
- acc3 += x4 * c0;
- acc4 += x5 * c0;
- acc5 += x6 * c0;
- acc6 += x7 * c0;
- acc7 += x0 * c0;
+ /* Copy remaining data */
+ while (tapCnt > 0U)
+ {
+ *pStateCurnt++ = *pState++;
- /* Read the b[numTaps-3] coefficient */
- c0 = *(pb++);
-
- /* Read x[n-numTaps-5] sample */
- x1 = *(px++);
-
- /* Perform the multiply-accumulates */
- acc0 += x2 * c0;
- acc1 += x3 * c0;
- acc2 += x4 * c0;
- acc3 += x5 * c0;
- acc4 += x6 * c0;
- acc5 += x7 * c0;
- acc6 += x0 * c0;
- acc7 += x1 * c0;
-
- /* Read the b[numTaps-4] coefficient */
- c0 = *(pb++);
-
- /* Read x[n-numTaps-6] sample */
- x2 = *(px++);
-
- /* Perform the multiply-accumulates */
- acc0 += x3 * c0;
- acc1 += x4 * c0;
- acc2 += x5 * c0;
- acc3 += x6 * c0;
- acc4 += x7 * c0;
- acc5 += x0 * c0;
- acc6 += x1 * c0;
- acc7 += x2 * c0;
-
- /* Read the b[numTaps-4] coefficient */
- c0 = *(pb++);
-
- /* Read x[n-numTaps-6] sample */
- x3 = *(px++);
- /* Perform the multiply-accumulates */
- acc0 += x4 * c0;
- acc1 += x5 * c0;
- acc2 += x6 * c0;
- acc3 += x7 * c0;
- acc4 += x0 * c0;
- acc5 += x1 * c0;
- acc6 += x2 * c0;
- acc7 += x3 * c0;
-
- /* Read the b[numTaps-4] coefficient */
- c0 = *(pb++);
-
- /* Read x[n-numTaps-6] sample */
- x4 = *(px++);
-
- /* Perform the multiply-accumulates */
- acc0 += x5 * c0;
- acc1 += x6 * c0;
- acc2 += x7 * c0;
- acc3 += x0 * c0;
- acc4 += x1 * c0;
- acc5 += x2 * c0;
- acc6 += x3 * c0;
- acc7 += x4 * c0;
-
- /* Read the b[numTaps-4] coefficient */
- c0 = *(pb++);
-
- /* Read x[n-numTaps-6] sample */
- x5 = *(px++);
-
- /* Perform the multiply-accumulates */
- acc0 += x6 * c0;
- acc1 += x7 * c0;
- acc2 += x0 * c0;
- acc3 += x1 * c0;
- acc4 += x2 * c0;
- acc5 += x3 * c0;
- acc6 += x4 * c0;
- acc7 += x5 * c0;
-
- /* Read the b[numTaps-4] coefficient */
- c0 = *(pb++);
-
- /* Read x[n-numTaps-6] sample */
- x6 = *(px++);
-
- /* Perform the multiply-accumulates */
- acc0 += x7 * c0;
- acc1 += x0 * c0;
- acc2 += x1 * c0;
- acc3 += x2 * c0;
- acc4 += x3 * c0;
- acc5 += x4 * c0;
- acc6 += x5 * c0;
- acc7 += x6 * c0;
-
- tapCnt--;
- }
-
- /* If the filter length is not a multiple of 8, compute the remaining filter taps */
- tapCnt = numTaps % 0x8U;
-
- while (tapCnt > 0U)
- {
- /* Read coefficients */
- c0 = *(pb++);
-
- /* Fetch 1 state variable */
- x7 = *(px++);
-
- /* Perform the multiply-accumulates */
- acc0 += x0 * c0;
- acc1 += x1 * c0;
- acc2 += x2 * c0;
- acc3 += x3 * c0;
- acc4 += x4 * c0;
- acc5 += x5 * c0;
- acc6 += x6 * c0;
- acc7 += x7 * c0;
-
- /* Reuse the present sample states for next sample */
- x0 = x1;
- x1 = x2;
- x2 = x3;
- x3 = x4;
- x4 = x5;
- x5 = x6;
- x6 = x7;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Advance the state pointer by 8 to process the next group of 8 samples */
- pState = pState + 8;
-
- /* The results in the 8 accumulators, store in the destination buffer. */
- *pDst++ = acc0;
- *pDst++ = acc1;
- *pDst++ = acc2;
- *pDst++ = acc3;
- *pDst++ = acc4;
- *pDst++ = acc5;
- *pDst++ = acc6;
- *pDst++ = acc7;
-
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 8, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x8U;
-
- while (blkCnt > 0U)
- {
- /* Copy one sample at a time into state buffer */
- *pStateCurnt++ = *pSrc++;
-
- /* Set the accumulator to zero */
- acc0 = 0.0f;
-
- /* Initialize state pointer */
- px = pState;
-
- /* Initialize Coefficient pointer */
- pb = (pCoeffs);
-
- i = numTaps;
-
- /* Perform the multiply-accumulates */
- do
- {
- acc0 += *px++ * *pb++;
- i--;
-
- } while (i > 0U);
-
- /* The result is store in the destination buffer. */
- *pDst++ = acc0;
-
- /* Advance state pointer by 1 for the next sample */
- pState = pState + 1;
-
- blkCnt--;
- }
-
- /* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the start of the state buffer.
- ** This prepares the state buffer for the next function call. */
-
- /* Points to the start of the state buffer */
- pStateCurnt = S->pState;
-
- tapCnt = (numTaps - 1U) >> 2U;
-
- /* copy data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Calculate remaining number of copies */
- tapCnt = (numTaps - 1U) % 0x4U;
-
- /* Copy the remaining q31_t data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
+ /* Decrement loop counter */
+ tapCnt--;
+ }
- /* Decrement the loop counter */
- tapCnt--;
- }
}
-#endif
-
/**
-* @} end of FIR group
-*/
+ @} end of FIR group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c
index 212990c..42724c3 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c
@@ -3,13 +3,13 @@
* Title: arm_fir_fast_q15.c
* Description: Q15 Fast FIR filter processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,78 +29,78 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR
- * @{
+ @addtogroup FIR
+ @{
*/
/**
- * @param[in] *S points to an instance of the Q15 FIR filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * This fast version uses a 32-bit accumulator with 2.30 format.
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around and distorts the result.
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
- * The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
- *
- * \par
- * Refer to the function <code>arm_fir_q15()</code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure.
- * Use the function <code>arm_fir_init_q15()</code> to initialize the filter structure.
+ @brief Processing function for the Q15 FIR filter (fast version).
+ @param[in] S points to an instance of the Q15 FIR filter structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ This fast version uses a 32-bit accumulator with 2.30 format.
+ The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ Thus, if the accumulator result overflows it wraps around and distorts the result.
+ In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
+ The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
+
+ @remark
+ Refer to \ref arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure.
+ Use function \ref arm_fir_init_q15() to initialize the filter structure.
*/
void arm_fir_fast_q15(
const arm_fir_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q31_t acc0, acc1, acc2, acc3; /* Accumulators */
- q15_t *pb; /* Temporary pointer for coefficient buffer */
- q15_t *px; /* Temporary q31 pointer for SIMD state buffer accesses */
- q31_t x0, x1, x2, c0; /* Temporary variables to hold SIMD state and coefficient values */
- uint32_t numTaps = S->numTaps; /* Number of taps in the filter */
- uint32_t tapCnt, blkCnt; /* Loop counters */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCurnt; /* Points to the current sample of the state */
+ q15_t *px; /* Temporary pointer for state buffer */
+ const q15_t *pb; /* Temporary pointer for coefficient buffer */
+ q31_t acc0; /* Accumulators */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t tapCnt, blkCnt; /* Loop counters */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t acc1, acc2, acc3; /* Accumulators */
+ q31_t x0, x1, x2, c0; /* Temporary variables to hold state and coefficient values */
+#endif
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1U)]);
- /* Apply loop unrolling and compute 4 output values simultaneously.
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 output values simultaneously.
* The variables acc0 ... acc3 hold output values that are being computed:
*
* acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
- * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
- * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+ * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+ * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
* acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3]
*/
+ blkCnt = blockSize >> 2U;
- blkCnt = blockSize >> 2;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* Copy four new input samples into the state buffer.
- ** Use 32-bit SIMD to move the 16-bit data. Only requires two copies. */
+ /* Copy 4 new input samples into the state buffer. */
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
-
/* Set all accumulators to zero */
acc0 = 0;
acc1 = 0;
@@ -114,19 +114,19 @@
pb = pCoeffs;
/* Read the first two samples from the state buffer: x[n-N], x[n-N-1] */
- x0 = *__SIMD32(px)++;
+ x0 = read_q15x2_ia (&px);
/* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
- x2 = *__SIMD32(px)++;
+ x2 = read_q15x2_ia (&px);
/* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-(numTaps%4) coefficients. */
- tapCnt = numTaps >> 2;
+ Repeat until we've computed numTaps-(numTaps%4) coefficients. */
+ tapCnt = numTaps >> 2U;
- while (tapCnt > 0)
+ while (tapCnt > 0U)
{
/* Read the first two coefficients using SIMD: b[N] and b[N-1] coefficients */
- c0 = *__SIMD32(pb)++;
+ c0 = read_q15x2_ia ((q15_t **) &pb);
/* acc0 += b[N] * x[n-N] + b[N-1] * x[n-N-1] */
acc0 = __SMLAD(x0, c0, acc0);
@@ -142,7 +142,7 @@
#endif
/* Read state x[n-N-4], x[n-N-5] */
- x0 = _SIMD32_OFFSET(px);
+ x0 = read_q15x2_ia (&px);
/* acc1 += b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
acc1 = __SMLADX(x1, c0, acc1);
@@ -158,13 +158,13 @@
acc3 = __SMLADX(x1, c0, acc3);
/* Read coefficients b[N-2], b[N-3] */
- c0 = *__SIMD32(pb)++;
+ c0 = read_q15x2_ia ((q15_t **) &pb);
/* acc0 += b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
acc0 = __SMLAD(x2, c0, acc0);
/* Read state x[n-N-6], x[n-N-7] with offset */
- x2 = _SIMD32_OFFSET(px + 2U);
+ x2 = read_q15x2_ia (&px);
/* acc2 += b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
acc2 = __SMLAD(x0, c0, acc2);
@@ -182,21 +182,16 @@
/* acc3 += b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
acc3 = __SMLADX(x1, c0, acc3);
- /* Update state pointer for next state reading */
- px += 4U;
-
/* Decrement tap count */
tapCnt--;
-
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps.
- ** This is always be 2 taps since the filter length is even. */
+ This is always be 2 taps since the filter length is even. */
if ((numTaps & 0x3U) != 0U)
{
-
/* Read last two coefficients */
- c0 = *__SIMD32(pb)++;
+ c0 = read_q15x2_ia ((q15_t **) &pb);
/* Perform the multiply-accumulates */
acc0 = __SMLAD(x0, c0, acc0);
@@ -210,7 +205,7 @@
#endif
/* Read last state variables */
- x0 = *__SIMD32(px);
+ x0 = read_q15x2 (px);
/* Perform the multiply-accumulates */
acc1 = __SMLADX(x1, c0, acc1);
@@ -226,38 +221,33 @@
acc3 = __SMLADX(x1, c0, acc3);
}
- /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
- ** Then store the 4 outputs in the destination buffer. */
-
+ /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
+ Then store the 4 outputs in the destination buffer. */
#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ =
- __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
- *__SIMD32(pDst)++ =
- __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
+ write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+ write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
#else
-
- *__SIMD32(pDst)++ =
- __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
- *__SIMD32(pDst)++ =
- __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+ write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Advance the state pointer by 4 to process the next group of 4 samples */
pState = pState + 4U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining output samples */
blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of taps */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Copy two samples into state buffer */
@@ -274,35 +264,37 @@
do
{
-
- acc0 += (q31_t) * px++ * *pb++;
- acc0 += (q31_t) * px++ * *pb++;
+ acc0 += (q31_t) *px++ * *pb++;
+ acc0 += (q31_t) *px++ * *pb++;
tapCnt--;
}
while (tapCnt > 0U);
- /* The result is in 2.30 format. Convert to 1.15 with saturation.
- ** Then store the output in the destination buffer. */
+ /* The result is in 2.30 format. Convert to 1.15 with saturation.
+ Then store the output in the destination buffer. */
*pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
/* Advance state pointer by 1 for the next sample */
pState = pState + 1U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
/* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
+ Now copy the last numTaps - 1 samples to the start of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
- /* Calculation of count for copying integer writes */
- tapCnt = (numTaps - 1U) >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = (numTaps - 1U) >> 2U;
+
+ /* Copy data */
while (tapCnt > 0U)
{
*pStateCurnt++ = *pState++;
@@ -310,24 +302,31 @@
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
+ /* Decrement loop counter */
tapCnt--;
-
}
- /* Calculation of count for remaining q15_t data */
+ /* Calculate remaining number of copies */
tapCnt = (numTaps - 1U) % 0x4U;
- /* copy remaining data */
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ /* Copy remaining data */
while (tapCnt > 0U)
{
*pStateCurnt++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
}
/**
- * @} end of FIR group
+ @} end of FIR group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c
index d37e13c..569c69a 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c
@@ -3,13 +3,13 @@
* Title: arm_fir_fast_q31.c
* Description: Processing function for the Q31 Fast FIR filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,73 +29,75 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR
- * @{
+ @addtogroup FIR
+ @{
*/
/**
- * @param[in] *S points to an instance of the Q31 structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block output data.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
- * These intermediate results are added to a 2.30 accumulator.
- * Finally, the accumulator is saturated and converted to a 1.31 result.
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
- *
- * \par
- * Refer to the function <code>arm_fir_q31()</code> for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. Both the slow and the fast versions use the same instance structure.
- * Use the function <code>arm_fir_init_q31()</code> to initialize the filter structure.
+ @brief Processing function for the Q31 FIR filter (fast version).
+ @param[in] S points to an instance of the Q31 structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+ The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+ These intermediate results are added to a 2.30 accumulator.
+ Finally, the accumulator is saturated and converted to a 1.31 result.
+ The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
+ In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
+
+ @remark
+ Refer to \ref arm_fir_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. Both the slow and the fast versions use the same instance structure.
+ Use function \ref arm_fir_init_q31() to initialize the filter structure.
*/
IAR_ONLY_LOW_OPTIMIZATION_ENTER
void arm_fir_fast_q31(
const arm_fir_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pState = S->pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *pStateCurnt; /* Points to the current sample of the state */
- q31_t x0, x1, x2, x3; /* Temporary variables to hold state */
- q31_t c0; /* Temporary variable to hold coefficient value */
- q31_t *px; /* Temporary pointer for state */
- q31_t *pb; /* Temporary pointer for coefficient buffer */
- q31_t acc0, acc1, acc2, acc3; /* Accumulators */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t i, tapCnt, blkCnt; /* Loop counters */
+ q31_t *pState = S->pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *pStateCurnt; /* Points to the current sample of the state */
+ q31_t *px; /* Temporary pointer for state buffer */
+ const q31_t *pb; /* Temporary pointer for coefficient buffer */
+ q31_t acc0; /* Accumulators */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t i, tapCnt, blkCnt; /* Loop counters */
- /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t acc1, acc2, acc3; /* Accumulators */
+ q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */
+#endif
+
+ /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1U)]);
- /* Apply loop unrolling and compute 4 output values simultaneously.
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 output values simultaneously.
* The variables acc0 ... acc3 hold output values that are being computed:
*
* acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
- * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
- * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+ * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+ * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
* acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3]
*/
- blkCnt = blockSize >> 2;
+ blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* Copy four new input samples into the state buffer */
+ /* Copy 4 new input samples into the state buffer. */
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
@@ -113,17 +115,18 @@
/* Initialize coefficient pointer */
pb = pCoeffs;
- /* Read the first three samples from the state buffer:
+ /* Read the first 3 samples from the state buffer:
* x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
- x0 = *(px++);
- x1 = *(px++);
- x2 = *(px++);
+ x0 = *px++;
+ x1 = *px++;
+ x2 = *px++;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
- i = tapCnt;
+ /* Loop unrolling. Process 4 taps at a time. */
+ tapCnt = numTaps >> 2U;
- while (i > 0U)
+ /* Loop over the number of taps. Unroll by a factor of 4.
+ Repeat until we've computed numTaps-4 coefficients. */
+ while (tapCnt > 0U)
{
/* Read the b[numTaps] coefficient */
c0 = *pb;
@@ -183,14 +186,14 @@
pb += 4U;
px += 4U;
- /* Decrement the loop counter */
- i--;
+ /* Decrement loop counter */
+ tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ tapCnt = numTaps % 0x4U;
- i = numTaps - (tapCnt * 4U);
- while (i > 0U)
+ while (tapCnt > 0U)
{
/* Read coefficients */
c0 = *(pb++);
@@ -209,28 +212,33 @@
x1 = x2;
x2 = x3;
- /* Decrement the loop counter */
- i--;
+ /* Decrement loop counter */
+ tapCnt--;
}
- /* Advance the state pointer by 4 to process the next group of 4 samples */
- pState = pState + 4;
-
- /* The results in the 4 accumulators are in 2.30 format. Convert to 1.31
- ** Then store the 4 outputs in the destination buffer. */
+ /* The results in the 4 accumulators are in 2.30 format. Convert to 1.31
+ Then store the 4 outputs in the destination buffer. */
*pDst++ = (q31_t) (acc0 << 1);
*pDst++ = (q31_t) (acc1 << 1);
*pDst++ = (q31_t) (acc2 << 1);
*pDst++ = (q31_t) (acc3 << 1);
- /* Decrement the samples loop counter */
+ /* Advance the state pointer by 4 to process the next group of 4 samples */
+ pState = pState + 4U;
+
+ /* Decrement loop counter */
blkCnt--;
}
+ /* Loop unrolling: Compute remaining output samples */
+ blkCnt = blockSize % 0x4U;
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 4U;
+#else
+
+ /* Initialize blkCnt with number of taps */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
@@ -244,39 +252,63 @@
px = pState;
/* Initialize Coefficient pointer */
- pb = (pCoeffs);
+ pb = pCoeffs;
i = numTaps;
/* Perform the multiply-accumulates */
do
{
- multAcc_32x32_keep32_R(acc0, (*px++), (*(pb++)));
+ multAcc_32x32_keep32_R(acc0, (*px++), (*pb++));
i--;
} while (i > 0U);
- /* The result is in 2.30 format. Convert to 1.31
- ** Then store the output in the destination buffer. */
+ /* The result is in 2.30 format. Convert to 1.31
+ Then store the output in the destination buffer. */
*pDst++ = (q31_t) (acc0 << 1);
/* Advance state pointer by 1 for the next sample */
- pState = pState + 1;
+ pState = pState + 1U;
- /* Decrement the samples loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
/* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the start of the state buffer.
- ** This prepares the state buffer for the next function call. */
+ Now copy the last numTaps - 1 samples to the start of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = (numTaps - 1U) >> 2U;
+
+ /* Copy data */
+ while (tapCnt > 0U)
+ {
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
/* Calculate remaining number of copies */
+ tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+ /* Initialize tapCnt with number of taps */
tapCnt = (numTaps - 1U);
- /* Copy the remaining q31_t data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ /* Copy remaining data */
while (tapCnt > 0U)
{
*pStateCurnt++ = *pState++;
@@ -285,9 +317,8 @@
tapCnt--;
}
-
}
IAR_ONLY_LOW_OPTIMIZATION_EXIT
/**
- * @} end of FIR group
+ @} end of FIR group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c
index 8bcb736..479a6ea 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_fir_init_f32.c
* Description: Floating-point FIR filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,41 +29,39 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR
- * @{
+ @addtogroup FIR
+ @{
*/
/**
- * @details
- *
- * @param[in,out] *S points to an instance of the floating-point FIR filter structure.
- * @param[in] numTaps Number of filter coefficients in the filter.
- * @param[in] *pCoeffs points to the filter coefficients buffer.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of samples that are processed per call.
- * @return none.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_f32()</code>.
+ @brief Initialization function for the floating-point FIR filter.
+ @param[in,out] S points to an instance of the floating-point FIR filter structure
+ @param[in] numTaps number of filter coefficients in the filter
+ @param[in] pCoeffs points to the filter coefficients buffer
+ @param[in] pState points to the state buffer
+ @param[in] blockSize number of samples processed per call
+ @return none
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ @par
+ <code>pState</code> points to the array of state variables.
+ <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_f32()</code>.
*/
void arm_fir_init_f32(
- arm_fir_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- uint32_t blockSize)
+ arm_fir_instance_f32 * S,
+ uint16_t numTaps,
+ const float32_t * pCoeffs,
+ float32_t * pState,
+ uint32_t blockSize)
{
/* Assign filter taps */
S->numTaps = numTaps;
@@ -71,14 +69,13 @@
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
- /* Clear state buffer and the size of state buffer is (blockSize + numTaps - 1) */
+ /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));
/* Assign state pointer */
S->pState = pState;
-
}
/**
- * @} end of FIR group
+ @} end of FIR group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c
index e4d6ef8..6de2b62 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c
@@ -3,13 +3,13 @@
* Title: arm_fir_init_q15.c
* Description: Q15 FIR filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,66 +29,63 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR
- * @{
+ @addtogroup FIR
+ @{
*/
/**
- * @param[in,out] *S points to an instance of the Q15 FIR filter structure.
- * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
- * @param[in] *pCoeffs points to the filter coefficients buffer.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize is number of samples processed per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if
- * <code>numTaps</code> is not greater than or equal to 4 and even.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * Note that <code>numTaps</code> must be even and greater than or equal to 4.
- * To implement an odd length filter simply increase <code>numTaps</code> by 1 and set the last coefficient to zero.
- * For example, to implement a filter with <code>numTaps=3</code> and coefficients
- * <pre>
- * {0.3, -0.8, 0.3}
- * </pre>
- * set <code>numTaps=4</code> and use the coefficients:
- * <pre>
- * {0.3, -0.8, 0.3, 0}.
- * </pre>
- * Similarly, to implement a two point filter
- * <pre>
- * {0.3, -0.3}
- * </pre>
- * set <code>numTaps=4</code> and use the coefficients:
- * <pre>
- * {0.3, -0.3, 0, 0}.
- * </pre>
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>numTaps+blockSize</code>, when running on Cortex-M4 and Cortex-M3 and is of length <code>numTaps+blockSize-1</code>, when running on Cortex-M0 where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q15()</code>.
+ @brief Initialization function for the Q15 FIR filter.
+ @param[in,out] S points to an instance of the Q15 FIR filter structure.
+ @param[in] numTaps number of filter coefficients in the filter. Must be even and greater than or equal to 4.
+ @param[in] pCoeffs points to the filter coefficients buffer.
+ @param[in] pState points to the state buffer.
+ @param[in] blockSize number of samples processed per call.
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : <code>numTaps</code> is not greater than or equal to 4 and even
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ Note that <code>numTaps</code> must be even and greater than or equal to 4.
+ To implement an odd length filter simply increase <code>numTaps</code> by 1 and set the last coefficient to zero.
+ For example, to implement a filter with <code>numTaps=3</code> and coefficients
+ <pre>
+ {0.3, -0.8, 0.3}
+ </pre>
+ set <code>numTaps=4</code> and use the coefficients:
+ <pre>
+ {0.3, -0.8, 0.3, 0}.
+ </pre>
+ Similarly, to implement a two point filter
+ <pre>
+ {0.3, -0.3}
+ </pre>
+ set <code>numTaps=4</code> and use the coefficients:
+ <pre>
+ {0.3, -0.3, 0, 0}.
+ </pre>
+ <code>pState</code> points to the array of state variables.
+ <code>pState</code> is of length <code>numTaps+blockSize</code>, when running on Cortex-M4 and Cortex-M3 and is of length <code>numTaps+blockSize-1</code>, when running on Cortex-M0 where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q15()</code>.
*/
arm_status arm_fir_init_q15(
- arm_fir_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- uint32_t blockSize)
+ arm_fir_instance_q15 * S,
+ uint16_t numTaps,
+ const q15_t * pCoeffs,
+ q15_t * pState,
+ uint32_t blockSize)
{
arm_status status;
-
#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
/* The Number of filter coefficients in the filter must be even and at least 4 */
if (numTaps & 0x1U)
{
@@ -115,15 +112,13 @@
#else
- /* Run the below code for Cortex-M0 */
-
/* Assign filter taps */
S->numTaps = numTaps;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
- /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
+ /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
/* Assign state pointer */
@@ -133,10 +128,10 @@
return (status);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_DSP) */
}
/**
- * @} end of FIR group
+ @} end of FIR group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c
index 3308438..63e6b14 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_fir_init_q31.c
* Description: Q31 FIR filter initialization function.
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,41 +29,38 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR
- * @{
+ @addtogroup FIR
+ @{
*/
/**
- * @details
- *
- * @param[in,out] *S points to an instance of the Q31 FIR filter structure.
- * @param[in] numTaps Number of filter coefficients in the filter.
- * @param[in] *pCoeffs points to the filter coefficients buffer.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of samples that are processed per call.
- * @return none.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q31()</code>.
+ @brief Initialization function for the Q31 FIR filter.
+ @param[in,out] S points to an instance of the Q31 FIR filter structure
+ @param[in] numTaps number of filter coefficients in the filter
+ @param[in] pCoeffs points to the filter coefficients buffer
+ @param[in] pState points to the state buffer
+ @param[in] blockSize number of samples processed
+ @return none
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ <code>pState</code> points to the array of state variables.
+ <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q31()</code>.
*/
void arm_fir_init_q31(
- arm_fir_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- uint32_t blockSize)
+ arm_fir_instance_q31 * S,
+ uint16_t numTaps,
+ const q31_t * pCoeffs,
+ q31_t * pState,
+ uint32_t blockSize)
{
/* Assign filter taps */
S->numTaps = numTaps;
@@ -71,14 +68,13 @@
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
- /* Clear state buffer and state array size is (blockSize + numTaps - 1) */
- memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1U)) * sizeof(q31_t));
+ /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
+ memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
/* Assign state pointer */
S->pState = pState;
-
}
/**
- * @} end of FIR group
+ @} end of FIR group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c
index 38cc7b4..dece501 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c
@@ -3,13 +3,13 @@
* Title: arm_fir_init_q7.c
* Description: Q7 FIR filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,54 +29,53 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR
- * @{
+ @addtogroup FIR
+ @{
*/
+
/**
- * @param[in,out] *S points to an instance of the Q7 FIR filter structure.
- * @param[in] numTaps Number of filter coefficients in the filter.
- * @param[in] *pCoeffs points to the filter coefficients buffer.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of samples that are processed per call.
- * @return none
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q7()</code>.
+ @brief Initialization function for the Q7 FIR filter.
+ @param[in,out] S points to an instance of the Q7 FIR filter structure
+ @param[in] numTaps number of filter coefficients in the filter
+ @param[in] pCoeffs points to the filter coefficients buffer
+ @param[in] pState points to the state buffer
+ @param[in] blockSize number of samples processed
+ @return none
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ @par
+ <code>pState</code> points to the array of state variables.
+ <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q7()</code>.
*/
void arm_fir_init_q7(
- arm_fir_instance_q7 * S,
- uint16_t numTaps,
- q7_t * pCoeffs,
- q7_t * pState,
- uint32_t blockSize)
+ arm_fir_instance_q7 * S,
+ uint16_t numTaps,
+ const q7_t * pCoeffs,
+ q7_t * pState,
+ uint32_t blockSize)
{
-
/* Assign filter taps */
S->numTaps = numTaps;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
- /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
+ /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q7_t));
/* Assign state pointer */
S->pState = pState;
-
}
/**
- * @} end of FIR group
+ @} end of FIR group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c
index 66cfcf8..b805801 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c
@@ -3,13 +3,13 @@
* Title: arm_fir_interpolate_f32.c
* Description: Floating-point FIR interpolation sequences
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,145 +29,147 @@
#include "arm_math.h"
/**
- * @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator
- *
- * These functions combine an upsampler (zero stuffer) and an FIR filter.
- * They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images.
- * Conceptually, the functions are equivalent to the block diagram below:
- * \image html FIRInterpolator.gif "Components included in the FIR Interpolator functions"
- * After upsampling by a factor of <code>L</code>, the signal should be filtered by a lowpass filter with a normalized
- * cutoff frequency of <code>1/L</code> in order to eliminate high frequency copies of the spectrum.
- * The user of the function is responsible for providing the filter coefficients.
- *
- * The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner.
- * The upsampler inserts <code>L-1</code> zeros between each sample.
- * Instead of multiplying by these zero values, the FIR filter is designed to skip them.
- * This leads to an efficient implementation without any wasted effort.
- * The functions operate on blocks of input and output data.
- * <code>pSrc</code> points to an array of <code>blockSize</code> input values and
- * <code>pDst</code> points to an array of <code>blockSize*L</code> output values.
- *
- * The library provides separate functions for Q15, Q31, and floating-point data types.
- *
- * \par Algorithm:
- * The functions use a polyphase filter structure:
- * <pre>
- * y[n] = b[0] * x[n] + b[L] * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
- * y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]
- * ...
- * y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]
- * </pre>
- * This approach is more efficient than straightforward upsample-then-filter algorithms.
- * With this method the computation is reduced by a factor of <code>1/L</code> when compared to using a standard FIR filter.
- * \par
- * <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
- * <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code> and this is checked by the
- * initialization functions.
- * Internally, the function divides the FIR filter's impulse response into shorter filters of length
- * <code>phaseLength=numTaps/L</code>.
- * Coefficients are stored in time reversed order.
- * \par
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to a state array of size <code>blockSize + phaseLength - 1</code>.
- * Samples in the state buffer are stored in the order:
- * \par
- * <pre>
- * {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}
- * </pre>
- * The state variables are updated after each block of data is processed, the coefficients are untouched.
- *
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter.
- * Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * - Checks to make sure that the length of the filter is a multiple of the interpolation factor.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * The code below statically initializes each of the 3 different data type filter instance structures
- * <pre>
- * arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};
- * arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};
- * arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};
- * </pre>
- * where <code>L</code> is the interpolation factor; <code>phaseLength=numTaps/L</code> is the
- * length of each of the shorter FIR filters used internally,
- * <code>pCoeffs</code> is the address of the coefficient buffer;
- * <code>pState</code> is the address of the state buffer.
- * Be sure to set the values in the state buffer to zeros when doing static initialization.
- *
- * \par Fixed-Point Behavior
- * Care must be taken when using the fixed-point versions of the FIR interpolate filter functions.
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
- * Refer to the function specific documentation below for usage guidelines.
+ @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator
+
+ These functions combine an upsampler (zero stuffer) and an FIR filter.
+ They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images.
+ Conceptually, the functions are equivalent to the block diagram below:
+ \image html FIRInterpolator.gif "Components included in the FIR Interpolator functions"
+ After upsampling by a factor of <code>L</code>, the signal should be filtered by a lowpass filter with a normalized
+ cutoff frequency of <code>1/L</code> in order to eliminate high frequency copies of the spectrum.
+ The user of the function is responsible for providing the filter coefficients.
+
+ The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner.
+ The upsampler inserts <code>L-1</code> zeros between each sample.
+ Instead of multiplying by these zero values, the FIR filter is designed to skip them.
+ This leads to an efficient implementation without any wasted effort.
+ The functions operate on blocks of input and output data.
+ <code>pSrc</code> points to an array of <code>blockSize</code> input values and
+ <code>pDst</code> points to an array of <code>blockSize*L</code> output values.
+
+ The library provides separate functions for Q15, Q31, and floating-point data types.
+
+ @par Algorithm
+ The functions use a polyphase filter structure:
+ <pre>
+ y[n] = b[0] * x[n] + b[L] * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
+ y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]
+ ...
+ y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]
+ </pre>
+ This approach is more efficient than straightforward upsample-then-filter algorithms.
+ With this method the computation is reduced by a factor of <code>1/L</code> when compared to using a standard FIR filter.
+ @par
+ <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+ <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code> and this is checked by the
+ initialization functions.
+ Internally, the function divides the FIR filter's impulse response into shorter filters of length
+ <code>phaseLength=numTaps/L</code>.
+ Coefficients are stored in time reversed order.
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ @par
+ <code>pState</code> points to a state array of size <code>blockSize + phaseLength - 1</code>.
+ Samples in the state buffer are stored in the order:
+ <pre>
+ {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}
+ </pre>
+ @par
+ The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+ @par Instance Structure
+ The coefficients and state variables for a filter are stored together in an instance data structure.
+ A separate instance structure must be defined for each filter.
+ Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
+ There are separate instance structure declarations for each of the 3 supported data types.
+
+ @par Initialization Functions
+ There is also an associated initialization function for each data type.
+ The initialization function performs the following operations:
+ - Sets the values of the internal structure fields.
+ - Zeros out the values in the state buffer.
+ - Checks to make sure that the length of the filter is a multiple of the interpolation factor.
+ To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero.
+ @par
+ Use of the initialization function is optional.
+ However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+ To place an instance structure into a const data section, the instance structure must be manually initialized.
+ The code below statically initializes each of the 3 different data type filter instance structures
+ <pre>
+ arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};
+ arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};
+ arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};
+ </pre>
+ @par
+ where <code>L</code> is the interpolation factor; <code>phaseLength=numTaps/L</code> is the
+ length of each of the shorter FIR filters used internally,
+ <code>pCoeffs</code> is the address of the coefficient buffer;
+ <code>pState</code> is the address of the state buffer.
+ Be sure to set the values in the state buffer to zeros when doing static initialization.
+
+ @par Fixed-Point Behavior
+ Care must be taken when using the fixed-point versions of the FIR interpolate filter functions.
+ In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+ Refer to the function specific documentation below for usage guidelines.
*/
/**
- * @addtogroup FIR_Interpolate
- * @{
+ @addtogroup FIR_Interpolate
+ @{
*/
/**
- * @brief Processing function for the floating-point FIR interpolator.
- * @param[in] *S points to an instance of the floating-point FIR interpolator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
+ @brief Processing function for floating-point FIR interpolator.
+ @param[in] S points to an instance of the floating-point FIR interpolator structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
*/
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
void arm_fir_interpolate_f32(
const arm_fir_interpolate_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- float32_t *pStateCurnt; /* Points to the current sample of the state */
- float32_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
- float32_t sum0; /* Accumulators */
- float32_t x0, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t i, blkCnt, j; /* Loop counters */
- uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */
- float32_t acc0, acc1, acc2, acc3;
- float32_t x1, x2, x3;
- uint32_t blkCntN4;
- float32_t c1, c2, c3;
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+ float32_t *pState = S->pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t *pStateCur; /* Points to the current sample of the state */
+ float32_t *ptr1; /* Temporary pointer for state buffer */
+ const float32_t *ptr2; /* Temporary pointer for coefficient buffer */
+ float32_t sum0; /* Accumulators */
+ uint32_t i, blkCnt, tapCnt; /* Loop counters */
+ uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
+ uint32_t j;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+ float32_t acc0, acc1, acc2, acc3;
+ float32_t x0, x1, x2, x3;
+ float32_t c0, c1, c2, c3;
+#endif
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + (phaseLen - 1U);
+ /* pStateCur points to the location where the new input data should be written */
+ pStateCur = S->pState + (phaseLen - 1U);
- /* Initialise blkCnt */
- blkCnt = blockSize / 4;
- blkCntN4 = blockSize - (4 * blkCnt);
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Samples loop unrolled by 4 */
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
+
while (blkCnt > 0U)
{
/* Copy new input sample into the state buffer */
- *pStateCurnt++ = *pSrc++;
- *pStateCurnt++ = *pSrc++;
- *pStateCurnt++ = *pSrc++;
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
/* Address modifier index of coefficient buffer */
j = 1U;
@@ -190,7 +192,7 @@
ptr2 = pCoeffs + (S->L - j);
/* Loop over the polyPhase length. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
+ Repeat until we've computed numTaps-(4*S->L) coefficients. */
tapCnt = phaseLen >> 2U;
x0 = *(ptr1++);
@@ -199,7 +201,6 @@
while (tapCnt > 0U)
{
-
/* Read the input sample */
x3 = *(ptr1++);
@@ -254,7 +255,7 @@
* Increment the coefficient pointer by interpolation factor times. */
ptr2 += 4 * S->L;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -263,7 +264,6 @@
while (tapCnt > 0U)
{
-
/* Read the input sample */
x3 = *(ptr1++);
@@ -284,13 +284,13 @@
x1 = x2;
x2 = x3;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
/* The result is in the accumulator, store in the destination buffer. */
- *pDst = acc0;
- *(pDst + S->L) = acc1;
+ *(pDst ) = acc0;
+ *(pDst + S->L) = acc1;
*(pDst + 2 * S->L) = acc2;
*(pDst + 3 * S->L) = acc3;
@@ -299,7 +299,7 @@
/* Increment the address modifier index of coefficient buffer */
j++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
@@ -309,17 +309,24 @@
pDst += S->L * 3;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
- while (blkCntN4 > 0U)
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
{
/* Copy new input sample into the state buffer */
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
/* Address modifier index of coefficient buffer */
j = 1U;
@@ -337,78 +344,58 @@
/* Initialize coefficient pointer */
ptr2 = pCoeffs + (S->L - j);
- /* Loop over the polyPhase length. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
+ /* Loop over the polyPhase length.
+ Repeat until we've computed numTaps-(4*S->L) coefficients. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
tapCnt = phaseLen >> 2U;
+
while (tapCnt > 0U)
{
-
- /* Read the coefficient */
- c0 = *(ptr2);
+ /* Perform the multiply-accumulate */
+ sum0 += *ptr1++ * *ptr2;
/* Upsampling is done by stuffing L-1 zeros between each sample.
* So instead of multiplying zeros with coefficients,
* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
- /* Read the input sample */
- x0 = *(ptr1++);
-
- /* Perform the multiply-accumulate */
- sum0 += x0 * c0;
-
- /* Read the coefficient */
- c0 = *(ptr2);
-
- /* Increment the coefficient pointer by interpolation factor times. */
+ sum0 += *ptr1++ * *ptr2;
ptr2 += S->L;
- /* Read the input sample */
- x0 = *(ptr1++);
-
- /* Perform the multiply-accumulate */
- sum0 += x0 * c0;
-
- /* Read the coefficient */
- c0 = *(ptr2);
-
- /* Increment the coefficient pointer by interpolation factor times. */
+ sum0 += *ptr1++ * *ptr2;
ptr2 += S->L;
- /* Read the input sample */
- x0 = *(ptr1++);
-
- /* Perform the multiply-accumulate */
- sum0 += x0 * c0;
-
- /* Read the coefficient */
- c0 = *(ptr2);
-
- /* Increment the coefficient pointer by interpolation factor times. */
+ sum0 += *ptr1++ * *ptr2;
ptr2 += S->L;
- /* Read the input sample */
- x0 = *(ptr1++);
-
- /* Perform the multiply-accumulate */
- sum0 += x0 * c0;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining outputs */
tapCnt = phaseLen % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of samples */
+ tapCnt = phaseLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
- sum0 += *(ptr1++) * (*ptr2);
+ sum0 += *ptr1++ * *ptr2;
- /* Increment the coefficient pointer by interpolation factor times. */
+ /* Upsampling is done by stuffing L-1 zeros between each sample.
+ * So instead of multiplying zeros with coefficients,
+ * Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -427,66 +414,67 @@
pState = pState + 1;
/* Decrement the loop counter */
- blkCntN4--;
+ blkCnt--;
}
/* Processing is complete.
- ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
+ Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
- pStateCurnt = S->pState;
+ pStateCur = S->pState;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
tapCnt = (phaseLen - 1U) >> 2U;
/* copy data */
while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
+ /* Loop unrolling: Compute remaining outputs */
tapCnt = (phaseLen - 1U) % 0x04U;
- /* copy data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-}
-
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize tapCnt with number of samples */
+ tapCnt = (phaseLen - 1U);
-void arm_fir_interpolate_f32(
- const arm_fir_interpolate_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
-{
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- float32_t *pStateCurnt; /* Points to the current sample of the state */
- float32_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+ /* Copy data */
+ while (tapCnt > 0U)
+ {
+ *pStateCur++ = *pState++;
- float32_t sum; /* Accumulator */
- uint32_t i, blkCnt; /* Loop counters */
- uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+#else
+/* alternate version for CM0_FAMILY */
+
+ float32_t *pState = S->pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t *pStateCur; /* Points to the current sample of the state */
+ float32_t *ptr1; /* Temporary pointer for state buffer */
+ const float32_t *ptr2; /* Temporary pointer for coefficient buffer */
+ float32_t sum0; /* Accumulators */
+ uint32_t i, blkCnt, tapCnt; /* Loop counters */
+ uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + (phaseLen - 1U);
+ /* pStateCur points to the location where the new input data should be written */
+ pStateCur = S->pState + (phaseLen - 1U);
/* Total number of intput samples */
blkCnt = blockSize;
@@ -495,7 +483,7 @@
while (blkCnt > 0U)
{
/* Copy new input sample into the state buffer */
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
/* Loop over the Interpolation factor. */
i = S->L;
@@ -503,7 +491,7 @@
while (i > 0U)
{
/* Set accumulator to zero */
- sum = 0.0f;
+ sum0 = 0.0f;
/* Initialize state pointer */
ptr1 = pState;
@@ -517,7 +505,7 @@
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
- sum += *ptr1++ * *ptr2;
+ sum0 += *ptr1++ * *ptr2;
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
@@ -527,9 +515,9 @@
}
/* The result is in the accumulator, store in the destination buffer. */
- *pDst++ = sum;
+ *pDst++ = sum0;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
@@ -537,7 +525,7 @@
* to process the next group of interpolation factor number samples */
pState = pState + 1;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -546,24 +534,23 @@
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
- pStateCurnt = S->pState;
+ pStateCur = S->pState;
tapCnt = phaseLen - 1U;
+ /* Copy data */
while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
-
- /**
- * @} end of FIR_Interpolate group
- */
+/**
+ @} end of FIR_Interpolate group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
index 05fc370..a7079cf 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_fir_interpolate_init_f32.c
* Description: Floating-point FIR interpolator initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,45 +29,46 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Interpolate
- * @{
+ @addtogroup FIR_Interpolate
+ @{
*/
/**
- * @brief Initialization function for the floating-point FIR interpolator.
- * @param[in,out] *S points to an instance of the floating-point FIR interpolator structure.
- * @param[in] L upsample factor.
- * @param[in] numTaps number of filter coefficients in the filter.
- * @param[in] *pCoeffs points to the filter coefficient buffer.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
- * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
- * </pre>
- * The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
- * where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_f32()</code>.
+ @brief Initialization function for the floating-point FIR interpolator.
+ @param[in,out] S points to an instance of the floating-point FIR interpolator structure
+ @param[in] L upsample factor
+ @param[in] numTaps number of filter coefficients in the filter
+ @param[in] pCoeffs points to the filter coefficient buffer
+ @param[in] pState points to the state buffer
+ @param[in] blockSize number of input samples to process per call
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+ </pre>
+ @par
+ The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
+ @par
+ <code>pState</code> points to the array of state variables.
+ <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
+ where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_f32()</code>.
*/
arm_status arm_fir_interpolate_init_f32(
- arm_fir_interpolate_instance_f32 * S,
- uint8_t L,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- uint32_t blockSize)
+ arm_fir_interpolate_instance_f32 * S,
+ uint8_t L,
+ uint16_t numTaps,
+ const float32_t * pCoeffs,
+ float32_t * pState,
+ uint32_t blockSize)
{
arm_status status;
@@ -79,7 +80,6 @@
}
else
{
-
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
@@ -89,10 +89,8 @@
/* Assign polyPhaseLength */
S->phaseLength = numTaps / L;
- /* Clear state buffer and size of state array is always phaseLength + blockSize - 1 */
- memset(pState, 0,
- (blockSize +
- ((uint32_t) S->phaseLength - 1U)) * sizeof(float32_t));
+ /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
+ memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(float32_t));
/* Assign state pointer */
S->pState = pState;
@@ -101,9 +99,8 @@
}
return (status);
-
}
- /**
- * @} end of FIR_Interpolate group
- */
+/**
+ @} end of FIR_Interpolate group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
index 3b3fb79..e0f2cf4 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
@@ -3,13 +3,13 @@
* Title: arm_fir_interpolate_init_q15.c
* Description: Q15 FIR interpolator initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,45 +29,46 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Interpolate
- * @{
+ @addtogroup FIR_Interpolate
+ @{
*/
/**
- * @brief Initialization function for the Q15 FIR interpolator.
- * @param[in,out] *S points to an instance of the Q15 FIR interpolator structure.
- * @param[in] L upsample factor.
- * @param[in] numTaps number of filter coefficients in the filter.
- * @param[in] *pCoeffs points to the filter coefficient buffer.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
- * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
- * </pre>
- * The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
- * where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_q15()</code>.
+ @brief Initialization function for the Q15 FIR interpolator.
+ @param[in,out] S points to an instance of the Q15 FIR interpolator structure
+ @param[in] L upsample factor
+ @param[in] numTaps number of filter coefficients in the filter
+ @param[in] pCoeffs points to the filter coefficient buffer
+ @param[in] pState points to the state buffer
+ @param[in] blockSize number of input samples to process per call
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>
+
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+ </pre>
+ The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
+ @par
+ <code>pState</code> points to the array of state variables.
+ <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
+ where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_q15()</code>.
*/
arm_status arm_fir_interpolate_init_q15(
- arm_fir_interpolate_instance_q15 * S,
- uint8_t L,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- uint32_t blockSize)
+ arm_fir_interpolate_instance_q15 * S,
+ uint8_t L,
+ uint16_t numTaps,
+ const q15_t * pCoeffs,
+ q15_t * pState,
+ uint32_t blockSize)
{
arm_status status;
@@ -79,7 +80,6 @@
}
else
{
-
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
@@ -90,8 +90,7 @@
S->phaseLength = numTaps / L;
/* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
- memset(pState, 0,
- (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q15_t));
+ memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q15_t));
/* Assign state pointer */
S->pState = pState;
@@ -100,9 +99,8 @@
}
return (status);
-
}
- /**
- * @} end of FIR_Interpolate group
- */
+/**
+ @} end of FIR_Interpolate group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
index 03959c0..1db0a3c 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_fir_interpolate_init_q31.c
* Description: Q31 FIR interpolator initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,46 +29,45 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Interpolate
- * @{
+ @addtogroup FIR_Interpolate
+ @{
*/
-
/**
- * @brief Initialization function for the Q31 FIR interpolator.
- * @param[in,out] *S points to an instance of the Q31 FIR interpolator structure.
- * @param[in] L upsample factor.
- * @param[in] numTaps number of filter coefficients in the filter.
- * @param[in] *pCoeffs points to the filter coefficient buffer.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
- * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
- * </pre>
- * The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
- * where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_q31()</code>.
+ @brief Initialization function for the Q31 FIR interpolator.
+ @param[in,out] S points to an instance of the Q31 FIR interpolator structure
+ @param[in] L upsample factor
+ @param[in] numTaps number of filter coefficients in the filter
+ @param[in] pCoeffs points to the filter coefficient buffer
+ @param[in] pState points to the state buffer
+ @param[in] blockSize number of input samples to process per call
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+ </pre>
+ The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
+ @par
+ <code>pState</code> points to the array of state variables.
+ <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
+ where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_q31()</code>.
*/
arm_status arm_fir_interpolate_init_q31(
- arm_fir_interpolate_instance_q31 * S,
- uint8_t L,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- uint32_t blockSize)
+ arm_fir_interpolate_instance_q31 * S,
+ uint8_t L,
+ uint16_t numTaps,
+ const q31_t * pCoeffs,
+ q31_t * pState,
+ uint32_t blockSize)
{
arm_status status;
@@ -80,7 +79,6 @@
}
else
{
-
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
@@ -91,8 +89,7 @@
S->phaseLength = numTaps / L;
/* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
- memset(pState, 0,
- (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q31_t));
+ memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q31_t));
/* Assign state pointer */
S->pState = pState;
@@ -101,9 +98,8 @@
}
return (status);
-
}
- /**
- * @} end of FIR_Interpolate group
- */
+/**
+ @} end of FIR_Interpolate group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c
index dc0cb4b..a74e8d1 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c
@@ -3,13 +3,13 @@
* Title: arm_fir_interpolate_q15.c
* Description: Q15 FIR interpolation
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,68 +29,72 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Interpolate
- * @{
+ @addtogroup FIR_Interpolate
+ @{
*/
/**
- * @brief Processing function for the Q15 FIR interpolator.
- * @param[in] *S points to an instance of the Q15 FIR interpolator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.
+ @brief Processing function for the Q15 FIR interpolator.
+ @param[in] S points to an instance of the Q15 FIR interpolator structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+ The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+ There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+ After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+ Lastly, the accumulator is saturated to yield a result in 1.15 format.
*/
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
void arm_fir_interpolate_q15(
const arm_fir_interpolate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q15_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
- q63_t sum0; /* Accumulators */
- q15_t x0, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t i, blkCnt, j, tapCnt; /* Loop counters */
- uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
- uint32_t blkCntN2;
- q63_t acc0, acc1;
- q15_t x1;
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCur; /* Points to the current sample of the state */
+ q15_t *ptr1; /* Temporary pointer for state buffer */
+ const q15_t *ptr2; /* Temporary pointer for coefficient buffer */
+ q63_t sum0; /* Accumulators */
+ uint32_t i, blkCnt, tapCnt; /* Loop counters */
+ uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
+ uint32_t j;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+ q63_t acc0, acc1, acc2, acc3;
+ q15_t x0, x1, x2, x3;
+ q15_t c0, c1, c2, c3;
+#endif
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
+ /* pStateCur points to the location where the new input data should be written */
+ pStateCur = S->pState + (phaseLen - 1U);
- /* Initialise blkCnt */
- blkCnt = blockSize / 2;
- blkCntN2 = blockSize - (2 * blkCnt);
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Samples loop unrolled by 2 */
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
+
while (blkCnt > 0U)
{
/* Copy new input sample into the state buffer */
- *pStateCurnt++ = *pSrc++;
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
/* Address modifier index of coefficient buffer */
j = 1U;
@@ -103,6 +107,8 @@
/* Set accumulator to zero */
acc0 = 0;
acc1 = 0;
+ acc2 = 0;
+ acc3 = 0;
/* Initialize state pointer */
ptr1 = pState;
@@ -111,55 +117,62 @@
ptr2 = pCoeffs + (S->L - j);
/* Loop over the polyPhase length. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
+ Repeat until we've computed numTaps-(4*S->L) coefficients. */
tapCnt = phaseLen >> 2U;
x0 = *(ptr1++);
+ x1 = *(ptr1++);
+ x2 = *(ptr1++);
while (tapCnt > 0U)
{
-
/* Read the input sample */
- x1 = *(ptr1++);
+ x3 = *(ptr1++);
/* Read the coefficient */
c0 = *(ptr2);
/* Perform the multiply-accumulate */
- acc0 += (q63_t) x0 *c0;
- acc1 += (q63_t) x1 *c0;
-
+ acc0 += (q63_t) x0 * c0;
+ acc1 += (q63_t) x1 * c0;
+ acc2 += (q63_t) x2 * c0;
+ acc3 += (q63_t) x3 * c0;
/* Read the coefficient */
- c0 = *(ptr2 + S->L);
+ c1 = *(ptr2 + S->L);
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
- acc0 += (q63_t) x1 *c0;
- acc1 += (q63_t) x0 *c0;
-
+ acc0 += (q63_t) x1 * c1;
+ acc1 += (q63_t) x2 * c1;
+ acc2 += (q63_t) x3 * c1;
+ acc3 += (q63_t) x0 * c1;
/* Read the coefficient */
- c0 = *(ptr2 + S->L * 2);
+ c2 = *(ptr2 + S->L * 2);
/* Read the input sample */
x1 = *(ptr1++);
/* Perform the multiply-accumulate */
- acc0 += (q63_t) x0 *c0;
- acc1 += (q63_t) x1 *c0;
+ acc0 += (q63_t) x2 * c2;
+ acc1 += (q63_t) x3 * c2;
+ acc2 += (q63_t) x0 * c2;
+ acc3 += (q63_t) x1 * c2;
/* Read the coefficient */
- c0 = *(ptr2 + S->L * 3);
+ c3 = *(ptr2 + S->L * 3);
/* Read the input sample */
- x0 = *(ptr1++);
+ x2 = *(ptr1++);
/* Perform the multiply-accumulate */
- acc0 += (q63_t) x1 *c0;
- acc1 += (q63_t) x0 *c0;
+ acc0 += (q63_t) x3 * c3;
+ acc1 += (q63_t) x0 * c3;
+ acc2 += (q63_t) x1 * c3;
+ acc3 += (q63_t) x2 * c3;
/* Upsampling is done by stuffing L-1 zeros between each sample.
@@ -167,7 +180,7 @@
* Increment the coefficient pointer by interpolation factor times. */
ptr2 += 4 * S->L;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -176,59 +189,69 @@
while (tapCnt > 0U)
{
-
/* Read the input sample */
- x1 = *(ptr1++);
+ x3 = *(ptr1++);
/* Read the coefficient */
c0 = *(ptr2);
/* Perform the multiply-accumulate */
- acc0 += (q63_t) x0 *c0;
- acc1 += (q63_t) x1 *c0;
+ acc0 += (q63_t) x0 * c0;
+ acc1 += (q63_t) x1 * c0;
+ acc2 += (q63_t) x2 * c0;
+ acc3 += (q63_t) x3 * c0;
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* update states for next sample processing */
x0 = x1;
+ x1 = x2;
+ x2 = x3;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
/* The result is in the accumulator, store in the destination buffer. */
- *pDst = (q15_t) (__SSAT((acc0 >> 15), 16));
- *(pDst + S->L) = (q15_t) (__SSAT((acc1 >> 15), 16));
+ *(pDst ) = (q15_t) (__SSAT((acc0 >> 15), 16));
+ *(pDst + S->L) = (q15_t) (__SSAT((acc1 >> 15), 16));
+ *(pDst + 2 * S->L) = (q15_t) (__SSAT((acc2 >> 15), 16));
+ *(pDst + 3 * S->L) = (q15_t) (__SSAT((acc3 >> 15), 16));
pDst++;
/* Increment the address modifier index of coefficient buffer */
j++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
/* Advance the state pointer by 1
* to process the next group of interpolation factor number samples */
- pState = pState + 2;
+ pState = pState + 4;
- pDst += S->L;
+ pDst += S->L * 3;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blkCntN2;
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
- /* Loop over the blockSize. */
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Copy new input sample into the state buffer */
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
/* Address modifier index of coefficient buffer */
j = 1U;
@@ -246,90 +269,65 @@
/* Initialize coefficient pointer */
ptr2 = pCoeffs + (S->L - j);
- /* Loop over the polyPhase length. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
- tapCnt = phaseLen >> 2;
+ /* Loop over the polyPhase length.
+ Repeat until we've computed numTaps-(4*S->L) coefficients. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
+ tapCnt = phaseLen >> 2U;
+
while (tapCnt > 0U)
{
-
- /* Read the coefficient */
- c0 = *(ptr2);
+ /* Perform the multiply-accumulate */
+ sum0 += (q63_t) *ptr1++ * *ptr2;
/* Upsampling is done by stuffing L-1 zeros between each sample.
* So instead of multiplying zeros with coefficients,
* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
- /* Read the input sample */
- x0 = *(ptr1++);
-
- /* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
-
- /* Read the coefficient */
- c0 = *(ptr2);
-
- /* Increment the coefficient pointer by interpolation factor times. */
+ sum0 += (q63_t) *ptr1++ * *ptr2;
ptr2 += S->L;
- /* Read the input sample */
- x0 = *(ptr1++);
-
- /* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
-
- /* Read the coefficient */
- c0 = *(ptr2);
-
- /* Increment the coefficient pointer by interpolation factor times. */
+ sum0 += (q63_t) *ptr1++ * *ptr2;
ptr2 += S->L;
- /* Read the input sample */
- x0 = *(ptr1++);
-
- /* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
-
- /* Read the coefficient */
- c0 = *(ptr2);
-
- /* Increment the coefficient pointer by interpolation factor times. */
+ sum0 += (q63_t) *ptr1++ * *ptr2;
ptr2 += S->L;
- /* Read the input sample */
- x0 = *(ptr1++);
-
- /* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
- tapCnt = phaseLen & 0x3U;
+ /* Loop unrolling: Compute remaining outputs */
+ tapCnt = phaseLen % 0x4U;
+
+#else
+
+ /* Initialize tapCnt with number of samples */
+ tapCnt = phaseLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (tapCnt > 0U)
{
- /* Read the coefficient */
- c0 = *(ptr2);
+ /* Perform the multiply-accumulate */
+ sum0 += (q63_t) *ptr1++ * *ptr2;
- /* Increment the coefficient pointer by interpolation factor times. */
+ /* Upsampling is done by stuffing L-1 zeros between each sample.
+ * So instead of multiplying zeros with coefficients,
+ * Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
- /* Read the input sample */
- x0 = *(ptr1++);
-
- /* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
/* The result is in the accumulator, store in the destination buffer. */
*pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+ /* Increment the address modifier index of coefficient buffer */
j++;
/* Decrement the loop counter */
@@ -344,71 +342,62 @@
blkCnt--;
}
-
/* Processing is complete.
- ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
+ Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
- pStateCurnt = S->pState;
+ pStateCur = S->pState;
- i = ((uint32_t) phaseLen - 1U) >> 2U;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
+ tapCnt = (phaseLen - 1U) >> 2U;
/* copy data */
- while (i > 0U)
+ while (tapCnt > 0U)
{
-#ifndef UNALIGNED_SUPPORT_DISABLE
+ write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+ write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ tapCnt = (phaseLen - 1U) % 0x04U;
#else
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
+ /* Initialize tapCnt with number of samples */
+ tapCnt = (phaseLen - 1U);
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
- /* Decrement the loop counter */
- i--;
- }
-
- i = ((uint32_t) phaseLen - 1U) % 0x04U;
-
- while (i > 0U)
+ /* Copy data */
+ while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
- i--;
+ /* Decrement loop counter */
+ tapCnt--;
}
-}
#else
+/* alternate version for CM0_FAMILY */
- /* Run the below code for Cortex-M0 */
-
-void arm_fir_interpolate_q15(
- const arm_fir_interpolate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
-{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q15_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
- q63_t sum; /* Accumulator */
- q15_t x0, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t i, blkCnt, tapCnt; /* Loop counters */
- uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
-
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCur; /* Points to the current sample of the state */
+ q15_t *ptr1; /* Temporary pointer for state buffer */
+ const q15_t *ptr2; /* Temporary pointer for coefficient buffer */
+ q63_t sum0; /* Accumulators */
+ uint32_t i, blkCnt, tapCnt; /* Loop counters */
+ uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + (phaseLen - 1U);
+ /* pStateCur points to the location where the new input data should be written */
+ pStateCur = S->pState + (phaseLen - 1U);
/* Total number of intput samples */
blkCnt = blockSize;
@@ -417,7 +406,7 @@
while (blkCnt > 0U)
{
/* Copy new input sample into the state buffer */
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
/* Loop over the Interpolation factor. */
i = S->L;
@@ -425,7 +414,7 @@
while (i > 0U)
{
/* Set accumulator to zero */
- sum = 0;
+ sum0 = 0;
/* Initialize state pointer */
ptr1 = pState;
@@ -434,30 +423,24 @@
ptr2 = pCoeffs + (i - 1U);
/* Loop over the polyPhase length */
- tapCnt = (uint32_t) phaseLen;
+ tapCnt = phaseLen;
while (tapCnt > 0U)
{
- /* Read the coefficient */
- c0 = *ptr2;
+ /* Perform the multiply-accumulate */
+ sum0 += ((q63_t) *ptr1++ * *ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
- /* Read the input sample */
- x0 = *ptr1++;
-
- /* Perform the multiply-accumulate */
- sum += ((q31_t) x0 * c0);
-
/* Decrement the loop counter */
tapCnt--;
}
- /* Store the result after converting to 1.15 format in the destination buffer */
- *pDst++ = (q15_t) (__SSAT((sum >> 15), 16));
+ /* Store the result after converting to 1.15 format in the destination buffer. */
+ *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
@@ -465,7 +448,7 @@
* to process the next group of interpolation factor number samples */
pState = pState + 1;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -474,23 +457,23 @@
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
- pStateCurnt = S->pState;
+ pStateCur = S->pState;
- i = (uint32_t) phaseLen - 1U;
+ tapCnt = phaseLen - 1U;
- while (i > 0U)
+ /* Copy data */
+ while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
- i--;
+ /* Decrement loop counter */
+ tapCnt--;
}
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
- /**
- * @} end of FIR_Interpolate group
- */
+/**
+ @} end of FIR_Interpolate group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c
index 2d23b37..00c36b4 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c
@@ -3,13 +3,13 @@
* Title: arm_fir_interpolate_q31.c
* Description: Q31 FIR interpolation
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,69 +29,72 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Interpolate
- * @{
+ @addtogroup FIR_Interpolate
+ @{
*/
/**
- * @brief Processing function for the Q31 FIR interpolator.
- * @param[in] *S points to an instance of the Q31 FIR interpolator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by <code>1/(numTaps/L)</code>.
- * since <code>numTaps/L</code> additions occur per output sample.
- * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
+ @brief Processing function for the Q31 FIR interpolator.
+ @param[in] S points to an instance of the Q31 FIR interpolator structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ Thus, if the accumulator result overflows it wraps around rather than clip.
+ In order to avoid overflows completely the input signal must be scaled down by <code>1/(numTaps/L)</code>.
+ since <code>numTaps/L</code> additions occur per output sample.
+ After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
*/
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
void arm_fir_interpolate_q31(
const arm_fir_interpolate_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pState = S->pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *pStateCurnt; /* Points to the current sample of the state */
- q31_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
- q63_t sum0; /* Accumulators */
- q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t i, blkCnt, j; /* Loop counters */
- uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
- uint32_t blkCntN2;
- q63_t acc0, acc1;
- q31_t x1;
+ q31_t *pState = S->pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *pStateCur; /* Points to the current sample of the state */
+ q31_t *ptr1; /* Temporary pointer for state buffer */
+ const q31_t *ptr2; /* Temporary pointer for coefficient buffer */
+ q63_t sum0; /* Accumulators */
+ uint32_t i, blkCnt, tapCnt; /* Loop counters */
+ uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
+ uint32_t j;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+ q63_t acc0, acc1, acc2, acc3;
+ q31_t x0, x1, x2, x3;
+ q31_t c0, c1, c2, c3;
+#endif
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
+ /* pStateCur points to the location where the new input data should be written */
+ pStateCur = S->pState + (phaseLen - 1U);
- /* Initialise blkCnt */
- blkCnt = blockSize / 2;
- blkCntN2 = blockSize - (2 * blkCnt);
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Samples loop unrolled by 2 */
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
+
while (blkCnt > 0U)
{
/* Copy new input sample into the state buffer */
- *pStateCurnt++ = *pSrc++;
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
/* Address modifier index of coefficient buffer */
j = 1U;
@@ -104,6 +107,8 @@
/* Set accumulator to zero */
acc0 = 0;
acc1 = 0;
+ acc2 = 0;
+ acc3 = 0;
/* Initialize state pointer */
ptr1 = pState;
@@ -112,55 +117,62 @@
ptr2 = pCoeffs + (S->L - j);
/* Loop over the polyPhase length. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
+ Repeat until we've computed numTaps-(4*S->L) coefficients. */
tapCnt = phaseLen >> 2U;
x0 = *(ptr1++);
+ x1 = *(ptr1++);
+ x2 = *(ptr1++);
while (tapCnt > 0U)
{
-
/* Read the input sample */
- x1 = *(ptr1++);
+ x3 = *(ptr1++);
/* Read the coefficient */
c0 = *(ptr2);
/* Perform the multiply-accumulate */
- acc0 += (q63_t) x0 *c0;
- acc1 += (q63_t) x1 *c0;
-
+ acc0 += (q63_t) x0 * c0;
+ acc1 += (q63_t) x1 * c0;
+ acc2 += (q63_t) x2 * c0;
+ acc3 += (q63_t) x3 * c0;
/* Read the coefficient */
- c0 = *(ptr2 + S->L);
+ c1 = *(ptr2 + S->L);
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
- acc0 += (q63_t) x1 *c0;
- acc1 += (q63_t) x0 *c0;
-
+ acc0 += (q63_t) x1 * c1;
+ acc1 += (q63_t) x2 * c1;
+ acc2 += (q63_t) x3 * c1;
+ acc3 += (q63_t) x0 * c1;
/* Read the coefficient */
- c0 = *(ptr2 + S->L * 2);
+ c2 = *(ptr2 + S->L * 2);
/* Read the input sample */
x1 = *(ptr1++);
/* Perform the multiply-accumulate */
- acc0 += (q63_t) x0 *c0;
- acc1 += (q63_t) x1 *c0;
+ acc0 += (q63_t) x2 * c2;
+ acc1 += (q63_t) x3 * c2;
+ acc2 += (q63_t) x0 * c2;
+ acc3 += (q63_t) x1 * c2;
/* Read the coefficient */
- c0 = *(ptr2 + S->L * 3);
+ c3 = *(ptr2 + S->L * 3);
/* Read the input sample */
- x0 = *(ptr1++);
+ x2 = *(ptr1++);
/* Perform the multiply-accumulate */
- acc0 += (q63_t) x1 *c0;
- acc1 += (q63_t) x0 *c0;
+ acc0 += (q63_t) x3 * c3;
+ acc1 += (q63_t) x0 * c3;
+ acc2 += (q63_t) x1 * c3;
+ acc3 += (q63_t) x2 * c3;
/* Upsampling is done by stuffing L-1 zeros between each sample.
@@ -168,7 +180,7 @@
* Increment the coefficient pointer by interpolation factor times. */
ptr2 += 4 * S->L;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -177,60 +189,69 @@
while (tapCnt > 0U)
{
-
/* Read the input sample */
- x1 = *(ptr1++);
+ x3 = *(ptr1++);
/* Read the coefficient */
c0 = *(ptr2);
/* Perform the multiply-accumulate */
- acc0 += (q63_t) x0 *c0;
- acc1 += (q63_t) x1 *c0;
+ acc0 += (q63_t) x0 * c0;
+ acc1 += (q63_t) x1 * c0;
+ acc2 += (q63_t) x2 * c0;
+ acc3 += (q63_t) x3 * c0;
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* update states for next sample processing */
x0 = x1;
+ x1 = x2;
+ x2 = x3;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
/* The result is in the accumulator, store in the destination buffer. */
- *pDst = (q31_t) (acc0 >> 31);
- *(pDst + S->L) = (q31_t) (acc1 >> 31);
-
+ *(pDst ) = (q31_t) (acc0 >> 31);
+ *(pDst + S->L) = (q31_t) (acc1 >> 31);
+ *(pDst + 2 * S->L) = (q31_t) (acc2 >> 31);
+ *(pDst + 3 * S->L) = (q31_t) (acc3 >> 31);
pDst++;
/* Increment the address modifier index of coefficient buffer */
j++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
/* Advance the state pointer by 1
* to process the next group of interpolation factor number samples */
- pState = pState + 2;
+ pState = pState + 4;
- pDst += S->L;
+ pDst += S->L * 3;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blkCntN2;
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
- /* Loop over the blockSize. */
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Copy new input sample into the state buffer */
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
/* Address modifier index of coefficient buffer */
j = 1U;
@@ -248,84 +269,58 @@
/* Initialize coefficient pointer */
ptr2 = pCoeffs + (S->L - j);
- /* Loop over the polyPhase length. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
- tapCnt = phaseLen >> 2;
+ /* Loop over the polyPhase length.
+ Repeat until we've computed numTaps-(4*S->L) coefficients. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
+ tapCnt = phaseLen >> 2U;
+
while (tapCnt > 0U)
{
-
- /* Read the coefficient */
- c0 = *(ptr2);
+ /* Perform the multiply-accumulate */
+ sum0 += (q63_t) *ptr1++ * *ptr2;
/* Upsampling is done by stuffing L-1 zeros between each sample.
* So instead of multiplying zeros with coefficients,
* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
- /* Read the input sample */
- x0 = *(ptr1++);
-
- /* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
-
- /* Read the coefficient */
- c0 = *(ptr2);
-
- /* Increment the coefficient pointer by interpolation factor times. */
+ sum0 += (q63_t) *ptr1++ * *ptr2;
ptr2 += S->L;
- /* Read the input sample */
- x0 = *(ptr1++);
-
- /* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
-
- /* Read the coefficient */
- c0 = *(ptr2);
-
- /* Increment the coefficient pointer by interpolation factor times. */
+ sum0 += (q63_t) *ptr1++ * *ptr2;
ptr2 += S->L;
- /* Read the input sample */
- x0 = *(ptr1++);
-
- /* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
-
- /* Read the coefficient */
- c0 = *(ptr2);
-
- /* Increment the coefficient pointer by interpolation factor times. */
+ sum0 += (q63_t) *ptr1++ * *ptr2;
ptr2 += S->L;
- /* Read the input sample */
- x0 = *(ptr1++);
-
- /* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
- tapCnt = phaseLen & 0x3U;
+ /* Loop unrolling: Compute remaining outputs */
+ tapCnt = phaseLen % 0x4U;
+
+#else
+
+ /* Initialize tapCnt with number of samples */
+ tapCnt = phaseLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (tapCnt > 0U)
{
- /* Read the coefficient */
- c0 = *(ptr2);
+ /* Perform the multiply-accumulate */
+ sum0 += (q63_t) *ptr1++ * *ptr2;
- /* Increment the coefficient pointer by interpolation factor times. */
+ /* Upsampling is done by stuffing L-1 zeros between each sample.
+ * So instead of multiplying zeros with coefficients,
+ * Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
- /* Read the input sample */
- x0 = *(ptr1++);
-
- /* Perform the multiply-accumulate */
- sum0 += (q63_t) x0 *c0;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -348,64 +343,63 @@
}
/* Processing is complete.
- ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
+ Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
- pStateCurnt = S->pState;
+ pStateCur = S->pState;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
tapCnt = (phaseLen - 1U) >> 2U;
/* copy data */
while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
+ /* Loop unrolling: Compute remaining outputs */
tapCnt = (phaseLen - 1U) % 0x04U;
- /* copy data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
-}
-
-
#else
-void arm_fir_interpolate_q31(
- const arm_fir_interpolate_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
-{
- q31_t *pState = S->pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *pStateCurnt; /* Points to the current sample of the state */
- q31_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
+ /* Initialize tapCnt with number of samples */
+ tapCnt = (phaseLen - 1U);
- /* Run the below code for Cortex-M0 */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
- q63_t sum; /* Accumulator */
- q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
- uint32_t i, blkCnt; /* Loop counters */
- uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */
+ /* Copy data */
+ while (tapCnt > 0U)
+ {
+ *pStateCur++ = *pState++;
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+ q31_t *pState = S->pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *pStateCur; /* Points to the current sample of the state */
+ q31_t *ptr1; /* Temporary pointer for state buffer */
+ const q31_t *ptr2; /* Temporary pointer for coefficient buffer */
+ q63_t sum0; /* Accumulators */
+ uint32_t i, blkCnt, tapCnt; /* Loop counters */
+ uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
+ /* pStateCur points to the location where the new input data should be written */
+ pStateCur = S->pState + (phaseLen - 1U);
/* Total number of intput samples */
blkCnt = blockSize;
@@ -414,7 +408,7 @@
while (blkCnt > 0U)
{
/* Copy new input sample into the state buffer */
- *pStateCurnt++ = *pSrc++;
+ *pStateCur++ = *pSrc++;
/* Loop over the Interpolation factor. */
i = S->L;
@@ -422,7 +416,7 @@
while (i > 0U)
{
/* Set accumulator to zero */
- sum = 0;
+ sum0 = 0;
/* Initialize state pointer */
ptr1 = pState;
@@ -430,30 +424,25 @@
/* Initialize coefficient pointer */
ptr2 = pCoeffs + (i - 1U);
+ /* Loop over the polyPhase length */
tapCnt = phaseLen;
while (tapCnt > 0U)
{
- /* Read the coefficient */
- c0 = *(ptr2);
+ /* Perform the multiply-accumulate */
+ sum0 += ((q63_t) *ptr1++ * *ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
- /* Read the input sample */
- x0 = *ptr1++;
-
- /* Perform the multiply-accumulate */
- sum += (q63_t) x0 *c0;
-
/* Decrement the loop counter */
tapCnt--;
}
/* The result is in the accumulator, store in the destination buffer. */
- *pDst++ = (q31_t) (sum >> 31);
+ *pDst++ = (q31_t) (sum0 >> 31);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
@@ -461,32 +450,32 @@
* to process the next group of interpolation factor number samples */
pState = pState + 1;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
/* Processing is complete.
- ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+ ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
- pStateCurnt = S->pState;
+ pStateCur = S->pState;
tapCnt = phaseLen - 1U;
- /* copy data */
+ /* Copy data */
while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
- /**
- * @} end of FIR_Interpolate group
- */
+/**
+ @} end of FIR_Interpolate group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c
index 369c9e4..9aa57cc 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c
@@ -1,15 +1,15 @@
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_lattice_f32.c
- * Description: Processing function for the floating-point FIR Lattice filter
+ * Description: Processing function for floating-point FIR Lattice filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,282 +29,305 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters
- *
- * This set of functions implements Finite Impulse Response (FIR) lattice filters
- * for Q15, Q31 and floating-point data types. Lattice filters are used in a
- * variety of adaptive filter applications. The filter structure is feedforward and
- * the net impulse response is finite length.
- * The functions operate on blocks
- * of input and output data and each call to the function processes
- * <code>blockSize</code> samples through the filter. <code>pSrc</code> and
- * <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
- *
- * \par Algorithm:
- * \image html FIRLattice.gif "Finite Impulse Response Lattice filter"
- * The following difference equation is implemented:
- * <pre>
- * f0[n] = g0[n] = x[n]
- * fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M
- * gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M
- * y[n] = fM[n]
- * </pre>
- * \par
- * <code>pCoeffs</code> points to tha array of reflection coefficients of size <code>numStages</code>.
- * Reflection Coefficients are stored in the following order.
- * \par
- * <pre>
- * {k1, k2, ..., kM}
- * </pre>
- * where M is number of stages
- * \par
- * <code>pState</code> points to a state array of size <code>numStages</code>.
- * The state variables (g values) hold previous inputs and are stored in the following order.
- * <pre>
- * {g0[n], g1[n], g2[n] ...gM-1[n]}
- * </pre>
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter.
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pCoeffs, pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
- * <pre>
- *arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};
- *arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};
- *arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};
- * </pre>
- * \par
- * where <code>numStages</code> is the number of stages in the filter; <code>pState</code> is the address of the state buffer;
- * <code>pCoeffs</code> is the address of the coefficient buffer.
- * \par Fixed-Point Behavior
- * Care must be taken when using the fixed-point versions of the FIR Lattice filter functions.
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
- * Refer to the function specific documentation below for usage guidelines.
+ @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters
+
+ This set of functions implements Finite Impulse Response (FIR) lattice filters
+ for Q15, Q31 and floating-point data types. Lattice filters are used in a
+ variety of adaptive filter applications. The filter structure is feedforward and
+ the net impulse response is finite length.
+ The functions operate on blocks
+ of input and output data and each call to the function processes
+ <code>blockSize</code> samples through the filter. <code>pSrc</code> and
+ <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
+
+ @par Algorithm
+ \image html FIRLattice.gif "Finite Impulse Response Lattice filter"
+ The following difference equation is implemented:
+ @par
+ <pre>
+ f0[n] = g0[n] = x[n]
+ fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M
+ gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M
+ y[n] = fM[n]
+ </pre>
+ @par
+ <code>pCoeffs</code> points to tha array of reflection coefficients of size <code>numStages</code>.
+ Reflection Coefficients are stored in the following order.
+ @par
+ <pre>
+ {k1, k2, ..., kM}
+ </pre>
+ where M is number of stages
+ @par
+ <code>pState</code> points to a state array of size <code>numStages</code>.
+ The state variables (g values) hold previous inputs and are stored in the following order.
+ <pre>
+ {g0[n], g1[n], g2[n] ...gM-1[n]}
+ </pre>
+ The state variables are updated after each block of data is processed; the coefficients are untouched.
+
+ @par Instance Structure
+ The coefficients and state variables for a filter are stored together in an instance data structure.
+ A separate instance structure must be defined for each filter.
+ Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+ There are separate instance structure declarations for each of the 3 supported data types.
+
+ @par Initialization Functions
+ There is also an associated initialization function for each data type.
+ The initialization function performs the following operations:
+ - Sets the values of the internal structure fields.
+ - Zeros out the values in the state buffer.
+ To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ numStages, pCoeffs, pState. Also set all of the values in pState to zero.
+ @par
+ Use of the initialization function is optional.
+ However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+ To place an instance structure into a const data section, the instance structure must be manually initialized.
+ Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
+ <pre>
+ arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};
+ arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};
+ arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};
+ </pre>
+ @par
+ where <code>numStages</code> is the number of stages in the filter;
+ <code>pState</code> is the address of the state buffer;
+ <code>pCoeffs</code> is the address of the coefficient buffer.
+
+ @par Fixed-Point Behavior
+ Care must be taken when using the fixed-point versions of the FIR Lattice filter functions.
+ In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+ Refer to the function specific documentation below for usage guidelines.
*/
/**
- * @addtogroup FIR_Lattice
- * @{
+ @addtogroup FIR_Lattice
+ @{
*/
-
- /**
- * @brief Processing function for the floating-point FIR lattice filter.
- * @param[in] *S points to an instance of the floating-point FIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
+/**
+ @brief Processing function for the floating-point FIR lattice filter.
+ @param[in] S points to an instance of the floating-point FIR lattice structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+ */
void arm_fir_lattice_f32(
const arm_fir_lattice_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- float32_t *pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- float32_t *px; /* temporary state pointer */
- float32_t *pk; /* temporary coefficient pointer */
+ float32_t *pState = S->pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t *px; /* Temporary state pointer */
+ const float32_t *pk; /* Temporary coefficient pointer */
+ uint32_t numStages = S->numStages; /* Number of stages in the filter */
+ uint32_t blkCnt, stageCnt; /* Loop counters */
+ float32_t fcurr0, fnext0, gnext0, gcurr0; /* Temporary variables */
+#if defined (ARM_MATH_LOOPUNROLL)
+ float32_t fcurr1, fnext1, gnext1; /* Temporary variables for second sample in loop unrolling */
+ float32_t fcurr2, fnext2, gnext2; /* Temporary variables for third sample in loop unrolling */
+ float32_t fcurr3, fnext3, gnext3; /* Temporary variables for fourth sample in loop unrolling */
+#endif
-#if defined (ARM_MATH_DSP)
+ gcurr0 = 0.0f;
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
- float32_t fcurr1, fnext1, gcurr1, gnext1; /* temporary variables for first sample in loop unrolling */
- float32_t fcurr2, fnext2, gnext2; /* temporary variables for second sample in loop unrolling */
- float32_t fcurr3, fnext3, gnext3; /* temporary variables for third sample in loop unrolling */
- float32_t fcurr4, fnext4, gnext4; /* temporary variables for fourth sample in loop unrolling */
- uint32_t numStages = S->numStages; /* Number of stages in the filter */
- uint32_t blkCnt, stageCnt; /* temporary variables for counts */
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
- gcurr1 = 0.0f;
- pState = &S->pState[0];
-
- blkCnt = blockSize >> 2;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
-
/* Read two samples from input buffer */
/* f0(n) = x(n) */
+ fcurr0 = *pSrc++;
fcurr1 = *pSrc++;
- fcurr2 = *pSrc++;
-
- /* Initialize coeff pointer */
- pk = (pCoeffs);
/* Initialize state pointer */
px = pState;
- /* Read g0(n-1) from state */
- gcurr1 = *px;
+ /* Initialize coeff pointer */
+ pk = pCoeffs;
+
+ /* Read g0(n-1) from state buffer */
+ gcurr0 = *px;
/* Process first sample for first tap */
/* f1(n) = f0(n) + K1 * g0(n-1) */
- fnext1 = fcurr1 + ((*pk) * gcurr1);
+ fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
/* g1(n) = f0(n) * K1 + g0(n-1) */
- gnext1 = (fcurr1 * (*pk)) + gcurr1;
+ gnext0 = (fcurr0 * (*pk)) + gcurr0;
/* Process second sample for first tap */
- /* for sample 2 processing */
- fnext2 = fcurr2 + ((*pk) * fcurr1);
- gnext2 = (fcurr2 * (*pk)) + fcurr1;
+ fnext1 = (fcurr0 * (*pk)) + fcurr1;
+ gnext1 = (fcurr1 * (*pk)) + fcurr0;
/* Read next two samples from input buffer */
/* f0(n+2) = x(n+2) */
+ fcurr2 = *pSrc++;
fcurr3 = *pSrc++;
- fcurr4 = *pSrc++;
-
- /* Copy only last input samples into the state buffer
- which will be used for next four samples processing */
- *px++ = fcurr4;
/* Process third sample for first tap */
- fnext3 = fcurr3 + ((*pk) * fcurr2);
- gnext3 = (fcurr3 * (*pk)) + fcurr2;
+ fnext2 = (fcurr1 * (*pk)) + fcurr2;
+ gnext2 = (fcurr2 * (*pk)) + fcurr1;
/* Process fourth sample for first tap */
- fnext4 = fcurr4 + ((*pk) * fcurr3);
- gnext4 = (fcurr4 * (*pk++)) + fcurr3;
+ fnext3 = (fcurr2 * (*pk )) + fcurr3;
+ gnext3 = (fcurr3 * (*pk++)) + fcurr2;
+
+ /* Copy only last input sample into the state buffer
+ which will be used for next samples processing */
+ *px++ = fcurr3;
/* Update of f values for next coefficient set processing */
+ fcurr0 = fnext0;
fcurr1 = fnext1;
fcurr2 = fnext2;
fcurr3 = fnext3;
- fcurr4 = fnext4;
/* Loop unrolling. Process 4 taps at a time . */
stageCnt = (numStages - 1U) >> 2U;
/* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numStages-3 coefficients. */
+ Repeat until we've computed numStages-3 coefficients. */
/* Process 2nd, 3rd, 4th and 5th taps ... here */
while (stageCnt > 0U)
{
/* Read g1(n-1), g3(n-1) .... from state */
- gcurr1 = *px;
+ gcurr0 = *px;
/* save g1(n) in state buffer */
- *px++ = gnext4;
+ *px++ = gnext3;
/* Process first sample for 2nd, 6th .. tap */
/* Sample processing for K2, K6.... */
/* f2(n) = f1(n) + K2 * g1(n-1) */
- fnext1 = fcurr1 + ((*pk) * gcurr1);
+ fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
/* Process second sample for 2nd, 6th .. tap */
/* for sample 2 processing */
- fnext2 = fcurr2 + ((*pk) * gnext1);
+ fnext1 = (gnext0 * (*pk)) + fcurr1;
+
/* Process third sample for 2nd, 6th .. tap */
- fnext3 = fcurr3 + ((*pk) * gnext2);
+ fnext2 = (gnext1 * (*pk)) + fcurr2;
+
/* Process fourth sample for 2nd, 6th .. tap */
- fnext4 = fcurr4 + ((*pk) * gnext3);
+ fnext3 = (gnext2 * (*pk)) + fcurr3;
/* g2(n) = f1(n) * K2 + g1(n-1) */
/* Calculation of state values for next stage */
- gnext4 = (fcurr4 * (*pk)) + gnext3;
gnext3 = (fcurr3 * (*pk)) + gnext2;
+
gnext2 = (fcurr2 * (*pk)) + gnext1;
- gnext1 = (fcurr1 * (*pk++)) + gcurr1;
+
+ gnext1 = (fcurr1 * (*pk)) + gnext0;
+
+ gnext0 = (fcurr0 * (*pk++)) + gcurr0;
/* Read g2(n-1), g4(n-1) .... from state */
- gcurr1 = *px;
+ gcurr0 = *px;
/* save g2(n) in state buffer */
- *px++ = gnext4;
+ *px++ = gnext3;
/* Sample processing for K3, K7.... */
/* Process first sample for 3rd, 7th .. tap */
/* f3(n) = f2(n) + K3 * g2(n-1) */
- fcurr1 = fnext1 + ((*pk) * gcurr1);
+ fcurr0 = (gcurr0 * (*pk)) + fnext0;
+
/* Process second sample for 3rd, 7th .. tap */
- fcurr2 = fnext2 + ((*pk) * gnext1);
+ fcurr1 = (gnext0 * (*pk)) + fnext1;
+
/* Process third sample for 3rd, 7th .. tap */
- fcurr3 = fnext3 + ((*pk) * gnext2);
+ fcurr2 = (gnext1 * (*pk)) + fnext2;
+
/* Process fourth sample for 3rd, 7th .. tap */
- fcurr4 = fnext4 + ((*pk) * gnext3);
+ fcurr3 = (gnext2 * (*pk)) + fnext3;
/* Calculation of state values for next stage */
/* g3(n) = f2(n) * K3 + g2(n-1) */
- gnext4 = (fnext4 * (*pk)) + gnext3;
gnext3 = (fnext3 * (*pk)) + gnext2;
+
gnext2 = (fnext2 * (*pk)) + gnext1;
- gnext1 = (fnext1 * (*pk++)) + gcurr1;
+
+ gnext1 = (fnext1 * (*pk)) + gnext0;
+
+ gnext0 = (fnext0 * (*pk++)) + gcurr0;
/* Read g1(n-1), g3(n-1) .... from state */
- gcurr1 = *px;
+ gcurr0 = *px;
/* save g3(n) in state buffer */
- *px++ = gnext4;
+ *px++ = gnext3;
/* Sample processing for K4, K8.... */
/* Process first sample for 4th, 8th .. tap */
/* f4(n) = f3(n) + K4 * g3(n-1) */
- fnext1 = fcurr1 + ((*pk) * gcurr1);
+ fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
/* Process second sample for 4th, 8th .. tap */
/* for sample 2 processing */
- fnext2 = fcurr2 + ((*pk) * gnext1);
+ fnext1 = (gnext0 * (*pk)) + fcurr1;
+
/* Process third sample for 4th, 8th .. tap */
- fnext3 = fcurr3 + ((*pk) * gnext2);
+ fnext2 = (gnext1 * (*pk)) + fcurr2;
+
/* Process fourth sample for 4th, 8th .. tap */
- fnext4 = fcurr4 + ((*pk) * gnext3);
+ fnext3 = (gnext2 * (*pk)) + fcurr3;
/* g4(n) = f3(n) * K4 + g3(n-1) */
/* Calculation of state values for next stage */
- gnext4 = (fcurr4 * (*pk)) + gnext3;
gnext3 = (fcurr3 * (*pk)) + gnext2;
+
gnext2 = (fcurr2 * (*pk)) + gnext1;
- gnext1 = (fcurr1 * (*pk++)) + gcurr1;
+
+ gnext1 = (fcurr1 * (*pk)) + gnext0;
+
+ gnext0 = (fcurr0 * (*pk++)) + gcurr0;
+
/* Read g2(n-1), g4(n-1) .... from state */
- gcurr1 = *px;
+ gcurr0 = *px;
/* save g4(n) in state buffer */
- *px++ = gnext4;
+ *px++ = gnext3;
/* Sample processing for K5, K9.... */
/* Process first sample for 5th, 9th .. tap */
/* f5(n) = f4(n) + K5 * g4(n-1) */
- fcurr1 = fnext1 + ((*pk) * gcurr1);
+ fcurr0 = (gcurr0 * (*pk)) + fnext0;
+
/* Process second sample for 5th, 9th .. tap */
- fcurr2 = fnext2 + ((*pk) * gnext1);
+ fcurr1 = (gnext0 * (*pk)) + fnext1;
+
/* Process third sample for 5th, 9th .. tap */
- fcurr3 = fnext3 + ((*pk) * gnext2);
+ fcurr2 = (gnext1 * (*pk)) + fnext2;
+
/* Process fourth sample for 5th, 9th .. tap */
- fcurr4 = fnext4 + ((*pk) * gnext3);
+ fcurr3 = (gnext2 * (*pk)) + fnext3;
/* Calculation of state values for next stage */
/* g5(n) = f4(n) * K5 + g4(n-1) */
- gnext4 = (fnext4 * (*pk)) + gnext3;
gnext3 = (fnext3 * (*pk)) + gnext2;
+
gnext2 = (fnext2 * (*pk)) + gnext1;
- gnext1 = (fnext1 * (*pk++)) + gcurr1;
+
+ gnext1 = (fnext1 * (*pk)) + gnext0;
+
+ gnext0 = (fnext0 * (*pk++)) + gcurr0;
stageCnt--;
}
@@ -314,144 +337,84 @@
while (stageCnt > 0U)
{
- gcurr1 = *px;
+ gcurr0 = *px;
/* save g value in state buffer */
- *px++ = gnext4;
+ *px++ = gnext3;
/* Process four samples for last three taps here */
- fnext1 = fcurr1 + ((*pk) * gcurr1);
- fnext2 = fcurr2 + ((*pk) * gnext1);
- fnext3 = fcurr3 + ((*pk) * gnext2);
- fnext4 = fcurr4 + ((*pk) * gnext3);
+ fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
+ fnext1 = (gnext0 * (*pk)) + fcurr1;
+
+ fnext2 = (gnext1 * (*pk)) + fcurr2;
+
+ fnext3 = (gnext2 * (*pk)) + fcurr3;
/* g1(n) = f0(n) * K1 + g0(n-1) */
- gnext4 = (fcurr4 * (*pk)) + gnext3;
gnext3 = (fcurr3 * (*pk)) + gnext2;
+
gnext2 = (fcurr2 * (*pk)) + gnext1;
- gnext1 = (fcurr1 * (*pk++)) + gcurr1;
+
+ gnext1 = (fcurr1 * (*pk)) + gnext0;
+
+ gnext0 = (fcurr0 * (*pk++)) + gcurr0;
/* Update of f values for next coefficient set processing */
+ fcurr0 = fnext0;
fcurr1 = fnext1;
fcurr2 = fnext2;
fcurr3 = fnext3;
- fcurr4 = fnext4;
stageCnt--;
-
}
/* The results in the 4 accumulators, store in the destination buffer. */
/* y(n) = fN(n) */
+ *pDst++ = fcurr0;
*pDst++ = fcurr1;
*pDst++ = fcurr2;
*pDst++ = fcurr3;
- *pDst++ = fcurr4;
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* f0(n) = x(n) */
- fcurr1 = *pSrc++;
-
- /* Initialize coeff pointer */
- pk = (pCoeffs);
-
- /* Initialize state pointer */
- px = pState;
-
- /* read g2(n) from state buffer */
- gcurr1 = *px;
-
- /* for sample 1 processing */
- /* f1(n) = f0(n) + K1 * g0(n-1) */
- fnext1 = fcurr1 + ((*pk) * gcurr1);
- /* g1(n) = f0(n) * K1 + g0(n-1) */
- gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
- /* save g1(n) in state buffer */
- *px++ = fcurr1;
-
- /* f1(n) is saved in fcurr1
- for next stage processing */
- fcurr1 = fnext1;
-
- stageCnt = (numStages - 1U);
-
- /* stage loop */
- while (stageCnt > 0U)
- {
- /* read g2(n) from state buffer */
- gcurr1 = *px;
-
- /* save g1(n) in state buffer */
- *px++ = gnext1;
-
- /* Sample processing for K2, K3.... */
- /* f2(n) = f1(n) + K2 * g1(n-1) */
- fnext1 = fcurr1 + ((*pk) * gcurr1);
- /* g2(n) = f1(n) * K2 + g1(n-1) */
- gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
- /* f1(n) is saved in fcurr1
- for next stage processing */
- fcurr1 = fnext1;
-
- stageCnt--;
-
- }
-
- /* y(n) = fN(n) */
- *pDst++ = fcurr1;
-
- blkCnt--;
-
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
- float32_t fcurr, fnext, gcurr, gnext; /* temporary variables */
- uint32_t numStages = S->numStages; /* Length of the filter */
- uint32_t blkCnt, stageCnt; /* temporary variables for counts */
-
- pState = &S->pState[0];
-
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* f0(n) = x(n) */
- fcurr = *pSrc++;
+ fcurr0 = *pSrc++;
+
+ /* Initialize state pointer */
+ px = pState;
/* Initialize coeff pointer */
pk = pCoeffs;
- /* Initialize state pointer */
- px = pState;
-
- /* read g0(n-1) from state buffer */
- gcurr = *px;
+ /* read g2(n) from state buffer */
+ gcurr0 = *px;
/* for sample 1 processing */
/* f1(n) = f0(n) + K1 * g0(n-1) */
- fnext = fcurr + ((*pk) * gcurr);
+ fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
/* g1(n) = f0(n) * K1 + g0(n-1) */
- gnext = (fcurr * (*pk++)) + gcurr;
+ gnext0 = (fcurr0 * (*pk++)) + gcurr0;
- /* save f0(n) in state buffer */
- *px++ = fcurr;
+ /* save g1(n) in state buffer */
+ *px++ = fcurr0;
- /* f1(n) is saved in fcurr
- for next stage processing */
- fcurr = fnext;
+ /* f1(n) is saved in fcurr0 for next stage processing */
+ fcurr0 = fnext0;
stageCnt = (numStages - 1U);
@@ -459,36 +422,32 @@
while (stageCnt > 0U)
{
/* read g2(n) from state buffer */
- gcurr = *px;
+ gcurr0 = *px;
/* save g1(n) in state buffer */
- *px++ = gnext;
+ *px++ = gnext0;
/* Sample processing for K2, K3.... */
/* f2(n) = f1(n) + K2 * g1(n-1) */
- fnext = fcurr + ((*pk) * gcurr);
- /* g2(n) = f1(n) * K2 + g1(n-1) */
- gnext = (fcurr * (*pk++)) + gcurr;
+ fnext0 = (gcurr0 * (*pk)) + fcurr0;
- /* f1(n) is saved in fcurr1
- for next stage processing */
- fcurr = fnext;
+ /* g2(n) = f1(n) * K2 + g1(n-1) */
+ gnext0 = (fcurr0 * (*pk++)) + gcurr0;
+
+ /* f1(n) is saved in fcurr0 for next stage processing */
+ fcurr0 = fnext0;
stageCnt--;
-
}
/* y(n) = fN(n) */
- *pDst++ = fcurr;
+ *pDst++ = fcurr0;
blkCnt--;
-
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of FIR_Lattice group
+ @} end of FIR_Lattice group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
index 2e31a15..075f144 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_fir_lattice_init_f32.c
* Description: Floating-point FIR Lattice filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,28 +29,28 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Lattice
- * @{
+ @addtogroup FIR_Lattice
+ @{
*/
/**
- * @brief Initialization function for the floating-point FIR lattice filter.
- * @param[in] *S points to an instance of the floating-point FIR lattice structure.
- * @param[in] numStages number of filter stages.
- * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
- * @param[in] *pState points to the state buffer. The array is of length numStages.
- * @return none.
+ @brief Initialization function for the floating-point FIR lattice filter.
+ @param[in] S points to an instance of the floating-point FIR lattice structure
+ @param[in] numStages number of filter stages
+ @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages
+ @param[in] pState points to the state buffer. The array is of length numStages
+ @return none
*/
void arm_fir_lattice_init_f32(
- arm_fir_lattice_instance_f32 * S,
- uint16_t numStages,
- float32_t * pCoeffs,
- float32_t * pState)
+ arm_fir_lattice_instance_f32 * S,
+ uint16_t numStages,
+ const float32_t * pCoeffs,
+ float32_t * pState)
{
/* Assign filter taps */
S->numStages = numStages;
@@ -63,9 +63,8 @@
/* Assign state pointer */
S->pState = pState;
-
}
/**
- * @} end of FIR_Lattice group
+ @} end of FIR_Lattice group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
index ab5afd6..21bcdb7 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
@@ -3,13 +3,13 @@
* Title: arm_fir_lattice_init_q15.c
* Description: Q15 FIR Lattice filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,28 +29,28 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Lattice
- * @{
+ @addtogroup FIR_Lattice
+ @{
*/
- /**
- * @brief Initialization function for the Q15 FIR lattice filter.
- * @param[in] *S points to an instance of the Q15 FIR lattice structure.
- * @param[in] numStages number of filter stages.
- * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
- * @param[in] *pState points to the state buffer. The array is of length numStages.
- * @return none.
- */
+/**
+ @brief Initialization function for the Q15 FIR lattice filter.
+ @param[in] S points to an instance of the Q15 FIR lattice structure
+ @param[in] numStages number of filter stages
+ @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages
+ @param[in] pState points to the state buffer. The array is of length numStages
+ @return none
+ */
void arm_fir_lattice_init_q15(
- arm_fir_lattice_instance_q15 * S,
- uint16_t numStages,
- q15_t * pCoeffs,
- q15_t * pState)
+ arm_fir_lattice_instance_q15 * S,
+ uint16_t numStages,
+ const q15_t * pCoeffs,
+ q15_t * pState)
{
/* Assign filter taps */
S->numStages = numStages;
@@ -63,9 +63,8 @@
/* Assign state pointer */
S->pState = pState;
-
}
/**
- * @} end of FIR_Lattice group
+ @} end of FIR_Lattice group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
index 4dc30cc..aa8ae53 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_fir_lattice_init_q31.c
* Description: Q31 FIR lattice filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,28 +29,28 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Lattice
- * @{
+ @addtogroup FIR_Lattice
+ @{
*/
- /**
- * @brief Initialization function for the Q31 FIR lattice filter.
- * @param[in] *S points to an instance of the Q31 FIR lattice structure.
- * @param[in] numStages number of filter stages.
- * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
- * @param[in] *pState points to the state buffer. The array is of length numStages.
- * @return none.
- */
+/**
+ @brief Initialization function for the Q31 FIR lattice filter.
+ @param[in] S points to an instance of the Q31 FIR lattice structure
+ @param[in] numStages number of filter stages
+ @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages
+ @param[in] pState points to the state buffer. The array is of length numStages
+ @return none
+ */
void arm_fir_lattice_init_q31(
- arm_fir_lattice_instance_q31 * S,
- uint16_t numStages,
- q31_t * pCoeffs,
- q31_t * pState)
+ arm_fir_lattice_instance_q31 * S,
+ uint16_t numStages,
+ const q31_t * pCoeffs,
+ q31_t * pState)
{
/* Assign filter taps */
S->numStages = numStages;
@@ -63,9 +63,8 @@
/* Assign state pointer */
S->pState = pState;
-
}
/**
- * @} end of FIR_Lattice group
+ @} end of FIR_Lattice group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c
index 4c4e849..c577022 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c
@@ -3,13 +3,13 @@
* Title: arm_fir_lattice_q15.c
* Description: Q15 FIR lattice filter processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,277 +29,275 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Lattice
- * @{
+ @addtogroup FIR_Lattice
+ @{
*/
-
/**
- * @brief Processing function for the Q15 FIR lattice filter.
- * @param[in] *S points to an instance of the Q15 FIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of samples to process.
- * @return none.
+ @brief Processing function for Q15 FIR lattice filter.
+ @param[in] S points to an instance of the Q15 FIR lattice structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
*/
void arm_fir_lattice_q15(
const arm_fir_lattice_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *px; /* temporary state pointer */
- q15_t *pk; /* temporary coefficient pointer */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *px; /* Temporary state pointer */
+ const q15_t *pk; /* Temporary coefficient pointer */
+ uint32_t numStages = S->numStages; /* Number of stages in the filter */
+ uint32_t blkCnt, stageCnt; /* Loop counters */
+ q31_t fcurr0, fnext0, gnext0, gcurr0; /* Temporary variables */
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t fcurr1, fnext1, gnext1; /* Temporary variables for second sample in loop unrolling */
+ q31_t fcurr2, fnext2, gnext2; /* Temporary variables for third sample in loop unrolling */
+ q31_t fcurr3, fnext3, gnext3; /* Temporary variables for fourth sample in loop unrolling */
+#endif
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ gcurr0 = 0;
- q31_t fcurnt1, fnext1, gcurnt1 = 0, gnext1; /* temporary variables for first sample in loop unrolling */
- q31_t fcurnt2, fnext2, gnext2; /* temporary variables for second sample in loop unrolling */
- q31_t fcurnt3, fnext3, gnext3; /* temporary variables for third sample in loop unrolling */
- q31_t fcurnt4, fnext4, gnext4; /* temporary variables for fourth sample in loop unrolling */
- uint32_t numStages = S->numStages; /* Number of stages in the filter */
- uint32_t blkCnt, stageCnt; /* temporary variables for counts */
+#if defined (ARM_MATH_LOOPUNROLL)
- pState = &S->pState[0];
-
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
-
/* Read two samples from input buffer */
/* f0(n) = x(n) */
- fcurnt1 = *pSrc++;
- fcurnt2 = *pSrc++;
-
- /* Initialize coeff pointer */
- pk = (pCoeffs);
+ fcurr0 = *pSrc++;
+ fcurr1 = *pSrc++;
/* Initialize state pointer */
px = pState;
- /* Read g0(n-1) from state */
- gcurnt1 = *px;
+ /* Initialize coeff pointer */
+ pk = pCoeffs;
+
+ /* Read g0(n-1) from state buffer */
+ gcurr0 = *px;
/* Process first sample for first tap */
/* f1(n) = f0(n) + K1 * g0(n-1) */
- fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15U) + fcurnt1;
- fnext1 = __SSAT(fnext1, 16);
+ fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+ fnext0 = __SSAT(fnext0, 16);
/* g1(n) = f0(n) * K1 + g0(n-1) */
- gnext1 = (q31_t) ((fcurnt1 * (*pk)) >> 15U) + gcurnt1;
- gnext1 = __SSAT(gnext1, 16);
+ gnext0 = (q31_t) ((fcurr0 * (*pk)) >> 15U) + gcurr0;
+ gnext0 = __SSAT(gnext0, 16);
/* Process second sample for first tap */
- /* for sample 2 processing */
- fnext2 = (q31_t) ((fcurnt1 * (*pk)) >> 15U) + fcurnt2;
- fnext2 = __SSAT(fnext2, 16);
-
- gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15U) + fcurnt1;
- gnext2 = __SSAT(gnext2, 16);
-
+ fnext1 = (q31_t) ((fcurr0 * (*pk)) >> 15U) + fcurr1;
+ fnext1 = __SSAT(fnext1, 16);
+ gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + fcurr0;
+ gnext1 = __SSAT(gnext1, 16);
/* Read next two samples from input buffer */
/* f0(n+2) = x(n+2) */
- fcurnt3 = *pSrc++;
- fcurnt4 = *pSrc++;
-
- /* Copy only last input samples into the state buffer
- which is used for next four samples processing */
- *px++ = (q15_t) fcurnt4;
+ fcurr2 = *pSrc++;
+ fcurr3 = *pSrc++;
/* Process third sample for first tap */
- fnext3 = (q31_t) ((fcurnt2 * (*pk)) >> 15U) + fcurnt3;
- fnext3 = __SSAT(fnext3, 16);
- gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15U) + fcurnt2;
- gnext3 = __SSAT(gnext3, 16);
+ fnext2 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + fcurr2;
+ fnext2 = __SSAT(fnext2, 16);
+ gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + fcurr1;
+ gnext2 = __SSAT(gnext2, 16);
/* Process fourth sample for first tap */
- fnext4 = (q31_t) ((fcurnt3 * (*pk)) >> 15U) + fcurnt4;
- fnext4 = __SSAT(fnext4, 16);
- gnext4 = (q31_t) ((fcurnt4 * (*pk++)) >> 15U) + fcurnt3;
- gnext4 = __SSAT(gnext4, 16);
+ fnext3 = (q31_t) ((fcurr2 * (*pk )) >> 15U) + fcurr3;
+ fnext3 = __SSAT(fnext3, 16);
+ gnext3 = (q31_t) ((fcurr3 * (*pk++)) >> 15U) + fcurr2;
+ gnext3 = __SSAT(gnext3, 16);
+
+ /* Copy only last input sample into the state buffer
+ which will be used for next samples processing */
+ *px++ = (q15_t) fcurr3;
/* Update of f values for next coefficient set processing */
- fcurnt1 = fnext1;
- fcurnt2 = fnext2;
- fcurnt3 = fnext3;
- fcurnt4 = fnext4;
-
+ fcurr0 = fnext0;
+ fcurr1 = fnext1;
+ fcurr2 = fnext2;
+ fcurr3 = fnext3;
/* Loop unrolling. Process 4 taps at a time . */
- stageCnt = (numStages - 1U) >> 2;
-
+ stageCnt = (numStages - 1U) >> 2U;
/* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numStages-3 coefficients. */
+ Repeat until we've computed numStages-3 coefficients. */
/* Process 2nd, 3rd, 4th and 5th taps ... here */
while (stageCnt > 0U)
{
/* Read g1(n-1), g3(n-1) .... from state */
- gcurnt1 = *px;
+ gcurr0 = *px;
/* save g1(n) in state buffer */
- *px++ = (q15_t) gnext4;
+ *px++ = (q15_t) gnext3;
/* Process first sample for 2nd, 6th .. tap */
/* Sample processing for K2, K6.... */
/* f1(n) = f0(n) + K1 * g0(n-1) */
- fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15U) + fcurnt1;
- fnext1 = __SSAT(fnext1, 16);
-
+ fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+ fnext0 = __SSAT(fnext0, 16);
/* Process second sample for 2nd, 6th .. tap */
/* for sample 2 processing */
- fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurnt2;
- fnext2 = __SSAT(fnext2, 16);
+ fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
+ fnext1 = __SSAT(fnext1, 16);
+
/* Process third sample for 2nd, 6th .. tap */
- fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurnt3;
- fnext3 = __SSAT(fnext3, 16);
+ fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
+ fnext2 = __SSAT(fnext2, 16);
+
/* Process fourth sample for 2nd, 6th .. tap */
- /* fnext4 = fcurnt4 + (*pk) * gnext3; */
- fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15U) + fcurnt4;
- fnext4 = __SSAT(fnext4, 16);
+ fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
+ fnext3 = __SSAT(fnext3, 16);
/* g1(n) = f0(n) * K1 + g0(n-1) */
/* Calculation of state values for next stage */
- gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15U) + gnext3;
- gnext4 = __SSAT(gnext4, 16);
- gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15U) + gnext2;
+ gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
gnext3 = __SSAT(gnext3, 16);
- gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15U) + gnext1;
+ gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
gnext2 = __SSAT(gnext2, 16);
- gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15U) + gcurnt1;
+ gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
gnext1 = __SSAT(gnext1, 16);
+ gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+ gnext0 = __SSAT(gnext0, 16);
+
/* Read g2(n-1), g4(n-1) .... from state */
- gcurnt1 = *px;
+ gcurr0 = *px;
/* save g1(n) in state buffer */
- *px++ = (q15_t) gnext4;
+ *px++ = (q15_t) gnext3;
/* Sample processing for K3, K7.... */
/* Process first sample for 3rd, 7th .. tap */
/* f3(n) = f2(n) + K3 * g2(n-1) */
- fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15U) + fnext1;
- fcurnt1 = __SSAT(fcurnt1, 16);
+ fcurr0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fnext0;
+ fcurr0 = __SSAT(fcurr0, 16);
/* Process second sample for 3rd, 7th .. tap */
- fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2;
- fcurnt2 = __SSAT(fcurnt2, 16);
+ fcurr1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fnext1;
+ fcurr1 = __SSAT(fcurr1, 16);
/* Process third sample for 3rd, 7th .. tap */
- fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3;
- fcurnt3 = __SSAT(fcurnt3, 16);
+ fcurr2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2;
+ fcurr2 = __SSAT(fcurr2, 16);
/* Process fourth sample for 3rd, 7th .. tap */
- fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15U) + fnext4;
- fcurnt4 = __SSAT(fcurnt4, 16);
+ fcurr3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3;
+ fcurr3 = __SSAT(fcurr3, 16);
/* Calculation of state values for next stage */
/* g3(n) = f2(n) * K3 + g2(n-1) */
- gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15U) + gnext3;
- gnext4 = __SSAT(gnext4, 16);
-
gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15U) + gnext2;
gnext3 = __SSAT(gnext3, 16);
gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15U) + gnext1;
gnext2 = __SSAT(gnext2, 16);
- gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15U) + gcurnt1;
+ gnext1 = (q31_t) ((fnext1 * (*pk)) >> 15U) + gnext0;
gnext1 = __SSAT(gnext1, 16);
+ gnext0 = (q31_t) ((fnext0 * (*pk++)) >> 15U) + gcurr0;
+ gnext0 = __SSAT(gnext0, 16);
+
/* Read g1(n-1), g3(n-1) .... from state */
- gcurnt1 = *px;
+ gcurr0 = *px;
/* save g1(n) in state buffer */
- *px++ = (q15_t) gnext4;
+ *px++ = (q15_t) gnext3;
/* Sample processing for K4, K8.... */
/* Process first sample for 4th, 8th .. tap */
/* f4(n) = f3(n) + K4 * g3(n-1) */
- fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15U) + fcurnt1;
- fnext1 = __SSAT(fnext1, 16);
+ fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+ fnext0 = __SSAT(fnext0, 16);
/* Process second sample for 4th, 8th .. tap */
/* for sample 2 processing */
- fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurnt2;
- fnext2 = __SSAT(fnext2, 16);
+ fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
+ fnext1 = __SSAT(fnext1, 16);
/* Process third sample for 4th, 8th .. tap */
- fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurnt3;
- fnext3 = __SSAT(fnext3, 16);
+ fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
+ fnext2 = __SSAT(fnext2, 16);
/* Process fourth sample for 4th, 8th .. tap */
- fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15U) + fcurnt4;
- fnext4 = __SSAT(fnext4, 16);
+ fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
+ fnext3 = __SSAT(fnext3, 16);
/* g4(n) = f3(n) * K4 + g3(n-1) */
/* Calculation of state values for next stage */
- gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15U) + gnext3;
- gnext4 = __SSAT(gnext4, 16);
-
- gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15U) + gnext2;
+ gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
gnext3 = __SSAT(gnext3, 16);
- gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15U) + gnext1;
+ gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
gnext2 = __SSAT(gnext2, 16);
- gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15U) + gcurnt1;
+
+ gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
gnext1 = __SSAT(gnext1, 16);
+ gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+ gnext0 = __SSAT(gnext0, 16);
/* Read g2(n-1), g4(n-1) .... from state */
- gcurnt1 = *px;
+ gcurr0 = *px;
/* save g4(n) in state buffer */
- *px++ = (q15_t) gnext4;
+ *px++ = (q15_t) gnext3;
/* Sample processing for K5, K9.... */
/* Process first sample for 5th, 9th .. tap */
/* f5(n) = f4(n) + K5 * g4(n-1) */
- fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15U) + fnext1;
- fcurnt1 = __SSAT(fcurnt1, 16);
+ fcurr0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fnext0;
+ fcurr0 = __SSAT(fcurr0, 16);
/* Process second sample for 5th, 9th .. tap */
- fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2;
- fcurnt2 = __SSAT(fcurnt2, 16);
+ fcurr1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fnext1;
+ fcurr1 = __SSAT(fcurr1, 16);
/* Process third sample for 5th, 9th .. tap */
- fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3;
- fcurnt3 = __SSAT(fcurnt3, 16);
+ fcurr2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2;
+ fcurr2 = __SSAT(fcurr2, 16);
/* Process fourth sample for 5th, 9th .. tap */
- fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15U) + fnext4;
- fcurnt4 = __SSAT(fcurnt4, 16);
+ fcurr3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3;
+ fcurr3 = __SSAT(fcurr3, 16);
/* Calculation of state values for next stage */
/* g5(n) = f4(n) * K5 + g4(n-1) */
- gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15U) + gnext3;
- gnext4 = __SSAT(gnext4, 16);
gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15U) + gnext2;
gnext3 = __SSAT(gnext3, 16);
+
gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15U) + gnext1;
gnext2 = __SSAT(gnext2, 16);
- gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15U) + gcurnt1;
+
+ gnext1 = (q31_t) ((fnext1 * (*pk)) >> 15U) + gnext0;
gnext1 = __SSAT(gnext1, 16);
+ gnext0 = (q31_t) ((fnext0 * (*pk++)) >> 15U) + gcurr0;
+ gnext0 = __SSAT(gnext0, 16);
+
stageCnt--;
}
@@ -308,95 +306,98 @@
while (stageCnt > 0U)
{
- gcurnt1 = *px;
+ gcurr0 = *px;
/* save g value in state buffer */
- *px++ = (q15_t) gnext4;
+ *px++ = (q15_t) gnext3;
/* Process four samples for last three taps here */
- fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15U) + fcurnt1;
+ fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+ fnext0 = __SSAT(fnext0, 16);
+
+ fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
fnext1 = __SSAT(fnext1, 16);
- fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurnt2;
+
+ fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
fnext2 = __SSAT(fnext2, 16);
- fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurnt3;
+ fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
fnext3 = __SSAT(fnext3, 16);
- fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15U) + fcurnt4;
- fnext4 = __SSAT(fnext4, 16);
-
/* g1(n) = f0(n) * K1 + g0(n-1) */
- gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15U) + gnext3;
- gnext4 = __SSAT(gnext4, 16);
- gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15U) + gnext2;
+ gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
gnext3 = __SSAT(gnext3, 16);
- gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15U) + gnext1;
+
+ gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
gnext2 = __SSAT(gnext2, 16);
- gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15U) + gcurnt1;
+
+ gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
gnext1 = __SSAT(gnext1, 16);
+ gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+ gnext0 = __SSAT(gnext0, 16);
+
/* Update of f values for next coefficient set processing */
- fcurnt1 = fnext1;
- fcurnt2 = fnext2;
- fcurnt3 = fnext3;
- fcurnt4 = fnext4;
+ fcurr0 = fnext0;
+ fcurr1 = fnext1;
+ fcurr2 = fnext2;
+ fcurr3 = fnext3;
stageCnt--;
-
}
/* The results in the 4 accumulators, store in the destination buffer. */
/* y(n) = fN(n) */
#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ = __PKHBT(fcurnt1, fcurnt2, 16);
- *__SIMD32(pDst)++ = __PKHBT(fcurnt3, fcurnt4, 16);
-
+ write_q15x2_ia (&pDst, __PKHBT(fcurr0, fcurr1, 16));
+ write_q15x2_ia (&pDst, __PKHBT(fcurr2, fcurr3, 16));
#else
-
- *__SIMD32(pDst)++ = __PKHBT(fcurnt2, fcurnt1, 16);
- *__SIMD32(pDst)++ = __PKHBT(fcurnt4, fcurnt3, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ write_q15x2_ia (&pDst, __PKHBT(fcurr1, fcurr0, 16));
+ write_q15x2_ia (&pDst, __PKHBT(fcurr3, fcurr2, 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* f0(n) = x(n) */
- fcurnt1 = *pSrc++;
-
- /* Initialize coeff pointer */
- pk = (pCoeffs);
+ fcurr0 = *pSrc++;
/* Initialize state pointer */
px = pState;
+ /* Initialize coeff pointer */
+ pk = pCoeffs;
+
/* read g2(n) from state buffer */
- gcurnt1 = *px;
+ gcurr0 = *px;
/* for sample 1 processing */
/* f1(n) = f0(n) + K1 * g0(n-1) */
- fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15U) + fcurnt1;
- fnext1 = __SSAT(fnext1, 16);
-
+ fnext0 = (((q31_t) gcurr0 * (*pk)) >> 15U) + fcurr0;
+ fnext0 = __SSAT(fnext0, 16);
/* g1(n) = f0(n) * K1 + g0(n-1) */
- gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15U) + gcurnt1;
- gnext1 = __SSAT(gnext1, 16);
+ gnext0 = (((q31_t) fcurr0 * (*pk++)) >> 15U) + gcurr0;
+ gnext0 = __SSAT(gnext0, 16);
/* save g1(n) in state buffer */
- *px++ = (q15_t) fcurnt1;
+ *px++ = (q15_t) fcurr0;
- /* f1(n) is saved in fcurnt1
- for next stage processing */
- fcurnt1 = fnext1;
+ /* f1(n) is saved in fcurr0 for next stage processing */
+ fcurr0 = fnext0;
stageCnt = (numStages - 1U);
@@ -404,79 +405,65 @@
while (stageCnt > 0U)
{
/* read g2(n) from state buffer */
- gcurnt1 = *px;
+ gcurr0 = *px;
/* save g1(n) in state buffer */
- *px++ = (q15_t) gnext1;
+ *px++ = (q15_t) gnext0;
/* Sample processing for K2, K3.... */
/* f2(n) = f1(n) + K2 * g1(n-1) */
- fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15U) + fcurnt1;
- fnext1 = __SSAT(fnext1, 16);
+ fnext0 = (((q31_t) gcurr0 * (*pk)) >> 15U) + fcurr0;
+ fnext0 = __SSAT(fnext0, 16);
/* g2(n) = f1(n) * K2 + g1(n-1) */
- gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15U) + gcurnt1;
- gnext1 = __SSAT(gnext1, 16);
+ gnext0 = (((q31_t) fcurr0 * (*pk++)) >> 15U) + gcurr0;
+ gnext0 = __SSAT(gnext0, 16);
-
- /* f1(n) is saved in fcurnt1
- for next stage processing */
- fcurnt1 = fnext1;
+ /* f1(n) is saved in fcurr0 for next stage processing */
+ fcurr0 = fnext0;
stageCnt--;
-
}
/* y(n) = fN(n) */
- *pDst++ = __SSAT(fcurnt1, 16);
-
+ *pDst++ = __SSAT(fcurr0, 16);
blkCnt--;
-
}
#else
-
- /* Run the below code for Cortex-M0 */
-
- q31_t fcurnt, fnext, gcurnt, gnext; /* temporary variables */
- uint32_t numStages = S->numStages; /* Length of the filter */
- uint32_t blkCnt, stageCnt; /* temporary variables for counts */
-
- pState = &S->pState[0];
+/* alternate version for CM0_FAMILY */
blkCnt = blockSize;
while (blkCnt > 0U)
{
/* f0(n) = x(n) */
- fcurnt = *pSrc++;
-
- /* Initialize coeff pointer */
- pk = (pCoeffs);
+ fcurr0 = *pSrc++;
/* Initialize state pointer */
px = pState;
+ /* Initialize coeff pointer */
+ pk = pCoeffs;
+
/* read g0(n-1) from state buffer */
- gcurnt = *px;
+ gcurr0 = *px;
/* for sample 1 processing */
/* f1(n) = f0(n) + K1 * g0(n-1) */
- fnext = ((gcurnt * (*pk)) >> 15U) + fcurnt;
- fnext = __SSAT(fnext, 16);
-
+ fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+ fnext0 = __SSAT(fnext, 16);
/* g1(n) = f0(n) * K1 + g0(n-1) */
- gnext = ((fcurnt * (*pk++)) >> 15U) + gcurnt;
- gnext = __SSAT(gnext, 16);
+ gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+ gnext0 = __SSAT(gnext0, 16);
/* save f0(n) in state buffer */
- *px++ = (q15_t) fcurnt;
+ *px++ = (q15_t) fcurr0;
- /* f1(n) is saved in fcurnt
- for next stage processing */
- fcurnt = fnext;
+ /* f1(n) is saved in fcurr for next stage processing */
+ fcurr0 = fnext0;
stageCnt = (numStages - 1U);
@@ -484,41 +471,36 @@
while (stageCnt > 0U)
{
/* read g1(n-1) from state buffer */
- gcurnt = *px;
+ gcurr0 = *px;
/* save g0(n-1) in state buffer */
- *px++ = (q15_t) gnext;
+ *px++ = (q15_t) gnext0;
/* Sample processing for K2, K3.... */
/* f2(n) = f1(n) + K2 * g1(n-1) */
- fnext = ((gcurnt * (*pk)) >> 15U) + fcurnt;
- fnext = __SSAT(fnext, 16);
+ fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+ fnext0 = __SSAT(fnext0, 16);
/* g2(n) = f1(n) * K2 + g1(n-1) */
- gnext = ((fcurnt * (*pk++)) >> 15U) + gcurnt;
- gnext = __SSAT(gnext, 16);
+ gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+ gnext0 = __SSAT(gnext0, 16);
-
- /* f1(n) is saved in fcurnt
- for next stage processing */
- fcurnt = fnext;
+ /* f1(n) is saved in fcurr0 for next stage processing */
+ fcurr0 = fnext0;
stageCnt--;
-
}
/* y(n) = fN(n) */
- *pDst++ = __SSAT(fcurnt, 16);
-
+ *pDst++ = __SSAT(fcurr0, 16);
blkCnt--;
-
}
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
}
/**
- * @} end of FIR_Lattice group
+ @} end of FIR_Lattice group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c
index 8acfd34..4dfaed1 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c
@@ -3,13 +3,13 @@
* Title: arm_fir_lattice_q31.c
* Description: Q31 FIR lattice filter processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,313 +29,477 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Lattice
- * @{
+ @addtogroup FIR_Lattice
+ @{
*/
-
/**
- * @brief Processing function for the Q31 FIR lattice filter.
- * @param[in] *S points to an instance of the Q31 FIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of samples to process.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.
+ @brief Processing function for the Q31 FIR lattice filter.
+ @param[in] S points to an instance of the Q31 FIR lattice structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.
*/
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
void arm_fir_lattice_q31(
const arm_fir_lattice_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *px; /* temporary state pointer */
- q31_t *pk; /* temporary coefficient pointer */
- q31_t fcurr1, fnext1, gcurr1 = 0, gnext1; /* temporary variables for first sample in loop unrolling */
- q31_t fcurr2, fnext2, gnext2; /* temporary variables for second sample in loop unrolling */
- uint32_t numStages = S->numStages; /* Length of the filter */
- uint32_t blkCnt, stageCnt; /* temporary variables for counts */
- q31_t k;
+ q31_t *pState = S->pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *px; /* Temporary state pointer */
+ const q31_t *pk; /* Temporary coefficient pointer */
+ uint32_t numStages = S->numStages; /* Number of stages in the filter */
+ uint32_t blkCnt, stageCnt; /* Loop counters */
+ q31_t fcurr0, fnext0, gnext0, gcurr0; /* Temporary variables */
- pState = &S->pState[0];
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
- blkCnt = blockSize >> 1U;
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t fcurr1, fnext1, gnext1; /* Temporary variables for second sample in loop unrolling */
+ q31_t fcurr2, fnext2, gnext2; /* Temporary variables for third sample in loop unrolling */
+ q31_t fcurr3, fnext3, gnext3; /* Temporary variables for fourth sample in loop unrolling */
+#endif
- /* First part of the processing with loop unrolling. Compute 2 outputs at a time.
- a second loop below computes the remaining 1 sample. */
+ gcurr0 = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
+
while (blkCnt > 0U)
{
+ /* Read two samples from input buffer */
/* f0(n) = x(n) */
+ fcurr0 = *pSrc++;
fcurr1 = *pSrc++;
- /* f0(n) = x(n) */
- fcurr2 = *pSrc++;
-
- /* Initialize coeff pointer */
- pk = (pCoeffs);
-
/* Initialize state pointer */
px = pState;
- /* read g0(n - 1) from state buffer */
- gcurr1 = *px;
+ /* Initialize coeff pointer */
+ pk = pCoeffs;
- /* Read the reflection coefficient */
- k = *pk++;
+ /* Read g0(n-1) from state buffer */
+ gcurr0 = *px;
- /* for sample 1 processing */
+ /* Process first sample for first tap */
/* f1(n) = f0(n) + K1 * g0(n-1) */
- fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
+ fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+ fnext0 = (fnext0 << 1U) + fcurr0;
/* g1(n) = f0(n) * K1 + g0(n-1) */
- gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
- fnext1 = fcurr1 + (fnext1 << 1U);
- gnext1 = gcurr1 + (gnext1 << 1U);
+ gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk)) >> 32U);
+ gnext0 = (gnext0 << 1U) + gcurr0;
- /* for sample 1 processing */
- /* f1(n) = f0(n) + K1 * g0(n-1) */
- fnext2 = (q31_t) (((q63_t) fcurr1 * k) >> 32);
+ /* Process second sample for first tap */
+ fnext1 = (q31_t) (((q63_t) fcurr0 * (*pk)) >> 32U);
+ fnext1 = (fnext1 << 1U) + fcurr1;
+ gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+ gnext1 = (gnext1 << 1U) + fcurr0;
- /* g1(n) = f0(n) * K1 + g0(n-1) */
- gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32);
- fnext2 = fcurr2 + (fnext2 << 1U);
- gnext2 = fcurr1 + (gnext2 << 1U);
+ /* Read next two samples from input buffer */
+ /* f0(n+2) = x(n+2) */
+ fcurr2 = *pSrc++;
+ fcurr3 = *pSrc++;
- /* save g1(n) in state buffer */
- *px++ = fcurr2;
+ /* Process third sample for first tap */
+ fnext2 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+ fnext2 = (fnext2 << 1U) + fcurr2;
+ gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+ gnext2 = (gnext2 << 1U) + fcurr1;
- /* f1(n) is saved in fcurr1
- for next stage processing */
+ /* Process fourth sample for first tap */
+ fnext3 = (q31_t) (((q63_t) fcurr2 * (*pk )) >> 32U);
+ fnext3 = (fnext3 << 1U) + fcurr3;
+ gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk++)) >> 32U);
+ gnext3 = (gnext3 << 1U) + fcurr2;
+
+ /* Copy only last input sample into the state buffer
+ which will be used for next samples processing */
+ *px++ = fcurr3;
+
+ /* Update of f values for next coefficient set processing */
+ fcurr0 = fnext0;
fcurr1 = fnext1;
fcurr2 = fnext2;
+ fcurr3 = fnext3;
- stageCnt = (numStages - 1U);
+ /* Loop unrolling. Process 4 taps at a time . */
+ stageCnt = (numStages - 1U) >> 2U;
- /* stage loop */
+ /* Loop over the number of taps. Unroll by a factor of 4.
+ Repeat until we've computed numStages-3 coefficients. */
+
+ /* Process 2nd, 3rd, 4th and 5th taps ... here */
while (stageCnt > 0U)
{
-
- /* Read the reflection coefficient */
- k = *pk++;
-
- /* read g2(n) from state buffer */
- gcurr1 = *px;
+ /* Read g1(n-1), g3(n-1) .... from state */
+ gcurr0 = *px;
/* save g1(n) in state buffer */
- *px++ = gnext2;
+ *px++ = gnext3;
- /* Sample processing for K2, K3.... */
- /* f2(n) = f1(n) + K2 * g1(n-1) */
- fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
- fnext2 = (q31_t) (((q63_t) gnext1 * k) >> 32);
+ /* Process first sample for 2nd, 6th .. tap */
+ /* Sample processing for K2, K6.... */
+ /* f1(n) = f0(n) + K1 * g0(n-1) */
+ fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+ fnext0 = (fnext0 << 1U) + fcurr0;
- fnext1 = fcurr1 + (fnext1 << 1U);
- fnext2 = fcurr2 + (fnext2 << 1U);
+ /* Process second sample for 2nd, 6th .. tap */
+ /* for sample 2 processing */
+ fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+ fnext1 = (fnext1 << 1U) + fcurr1;
- /* g2(n) = f1(n) * K2 + g1(n-1) */
- gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32);
- gnext2 = gnext1 + (gnext2 << 1U);
+ /* Process third sample for 2nd, 6th .. tap */
+ fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+ fnext2 = (fnext2 << 1U) + fcurr2;
- /* g2(n) = f1(n) * K2 + g1(n-1) */
- gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
- gnext1 = gcurr1 + (gnext1 << 1U);
+ /* Process fourth sample for 2nd, 6th .. tap */
+ fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+ fnext3 = (fnext3 << 1U) + fcurr3;
- /* f1(n) is saved in fcurr1
- for next stage processing */
+ /* g1(n) = f0(n) * K1 + g0(n-1) */
+ /* Calculation of state values for next stage */
+ gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
+ gnext3 = (gnext3 << 1U) + gnext2;
+
+ gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+ gnext2 = (gnext2 << 1U) + gnext1;
+
+ gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+ gnext1 = (gnext1 << 1U) + gnext0;
+
+ gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+ gnext0 = (gnext0 << 1U) + gcurr0;
+
+
+ /* Read g2(n-1), g4(n-1) .... from state */
+ gcurr0 = *px;
+
+ /* save g1(n) in state buffer */
+ *px++ = gnext3;
+
+ /* Sample processing for K3, K7.... */
+ /* Process first sample for 3rd, 7th .. tap */
+ /* f3(n) = f2(n) + K3 * g2(n-1) */
+ fcurr0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+ fcurr0 = (fcurr0 << 1U) + fnext0;
+
+ /* Process second sample for 3rd, 7th .. tap */
+ fcurr1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+ fcurr1 = (fcurr1 << 1U) + fnext1;
+
+ /* Process third sample for 3rd, 7th .. tap */
+ fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+ fcurr2 = (fcurr2 << 1U) + fnext2;
+
+ /* Process fourth sample for 3rd, 7th .. tap */
+ fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+ fcurr3 = (fcurr3 << 1U) + fnext3;
+
+ /* Calculation of state values for next stage */
+ /* g3(n) = f2(n) * K3 + g2(n-1) */
+ gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 32U);
+ gnext3 = (gnext3 << 1U) + gnext2;
+
+ gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 32U);
+ gnext2 = (gnext2 << 1U) + gnext1;
+
+ gnext1 = (q31_t) (((q63_t) fnext1 * (*pk)) >> 32U);
+ gnext1 = (gnext1 << 1U) + gnext0;
+
+ gnext0 = (q31_t) (((q63_t) fnext0 * (*pk++)) >> 32U);
+ gnext0 = (gnext0 << 1U) + gcurr0;
+
+ /* Read g1(n-1), g3(n-1) .... from state */
+ gcurr0 = *px;
+
+ /* save g1(n) in state buffer */
+ *px++ = gnext3;
+
+ /* Sample processing for K4, K8.... */
+ /* Process first sample for 4th, 8th .. tap */
+ /* f4(n) = f3(n) + K4 * g3(n-1) */
+ fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+ fnext0 = (fnext0 << 1U) + fcurr0;
+
+ /* Process second sample for 4th, 8th .. tap */
+ /* for sample 2 processing */
+ fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+ fnext1 = (fnext1 << 1U) + fcurr1;
+
+ /* Process third sample for 4th, 8th .. tap */
+ fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+ fnext2 = (fnext2 << 1U) + fcurr2;
+
+ /* Process fourth sample for 4th, 8th .. tap */
+ fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+ fnext3 = (fnext3 << 1U) + fcurr3;
+
+ /* g4(n) = f3(n) * K4 + g3(n-1) */
+ /* Calculation of state values for next stage */
+ gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
+ gnext3 = (gnext3 << 1U) + gnext2;
+
+ gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+ gnext2 = (gnext2 << 1U) + gnext1;
+
+ gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+ gnext1 = (gnext1 << 1U) + gnext0;
+
+ gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+ gnext0 = (gnext0 << 1U) + gcurr0;
+
+ /* Read g2(n-1), g4(n-1) .... from state */
+ gcurr0 = *px;
+
+ /* save g4(n) in state buffer */
+ *px++ = gnext3;
+
+ /* Sample processing for K5, K9.... */
+ /* Process first sample for 5th, 9th .. tap */
+ /* f5(n) = f4(n) + K5 * g4(n-1) */
+ fcurr0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+ fcurr0 = (fcurr0 << 1U) + fnext0;
+
+ /* Process second sample for 5th, 9th .. tap */
+ fcurr1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+ fcurr1 = (fcurr1 << 1U) + fnext1;
+
+ /* Process third sample for 5th, 9th .. tap */
+ fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+ fcurr2 = (fcurr2 << 1U) + fnext2;
+
+ /* Process fourth sample for 5th, 9th .. tap */
+ fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+ fcurr3 = (fcurr3 << 1U) + fnext3;
+
+ /* Calculation of state values for next stage */
+ /* g5(n) = f4(n) * K5 + g4(n-1) */
+ gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 32U);
+ gnext3 = (gnext3 << 1U) + gnext2;
+
+ gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 32U);
+ gnext2 = (gnext2 << 1U) + gnext1;
+
+ gnext1 = (q31_t) (((q63_t) fnext1 * (*pk)) >> 32U);
+ gnext1 = (gnext1 << 1U) + gnext0;
+
+ gnext0 = (q31_t) (((q63_t) fnext0 * (*pk++)) >> 32U);
+ gnext0 = (gnext0 << 1U) + gcurr0;
+
+ stageCnt--;
+ }
+
+ /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
+ stageCnt = (numStages - 1U) % 0x4U;
+
+ while (stageCnt > 0U)
+ {
+ gcurr0 = *px;
+
+ /* save g value in state buffer */
+ *px++ = gnext3;
+
+ /* Process four samples for last three taps here */
+ fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+ fnext0 = (fnext0 << 1U) + fcurr0;
+
+ fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+ fnext1 = (fnext1 << 1U) + fcurr1;
+
+ fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+ fnext2 = (fnext2 << 1U) + fcurr2;
+
+ fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+ fnext3 = (fnext3 << 1U) + fcurr3;
+
+ /* g1(n) = f0(n) * K1 + g0(n-1) */
+ gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
+ gnext3 = (gnext3 << 1U) + gnext2;
+
+ gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+ gnext2 = (gnext2 << 1U) + gnext1;
+
+ gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+ gnext1 = (gnext1 << 1U) + gnext0;
+
+ gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+ gnext0 = (gnext0 << 1U) + gcurr0;
+
+ /* Update of f values for next coefficient set processing */
+ fcurr0 = fnext0;
fcurr1 = fnext1;
fcurr2 = fnext2;
+ fcurr3 = fnext3;
stageCnt--;
-
}
+ /* The results in the 4 accumulators, store in the destination buffer. */
/* y(n) = fN(n) */
+ *pDst++ = fcurr0;
*pDst++ = fcurr1;
*pDst++ = fcurr2;
+ *pDst++ = fcurr3;
blkCnt--;
-
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x2U;
-
- while (blkCnt > 0U)
- {
- /* f0(n) = x(n) */
- fcurr1 = *pSrc++;
-
- /* Initialize coeff pointer */
- pk = (pCoeffs);
-
- /* Initialize state pointer */
- px = pState;
-
- /* read g0(n - 1) from state buffer */
- gcurr1 = *px;
-
- /* Read the reflection coefficient */
- k = *pk++;
-
- /* for sample 1 processing */
- /* f1(n) = f0(n) + K1 * g0(n-1) */
- fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
- fnext1 = fcurr1 + (fnext1 << 1U);
-
- /* g1(n) = f0(n) * K1 + g0(n-1) */
- gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
- gnext1 = gcurr1 + (gnext1 << 1U);
-
- /* save g1(n) in state buffer */
- *px++ = fcurr1;
-
- /* f1(n) is saved in fcurr1
- for next stage processing */
- fcurr1 = fnext1;
-
- stageCnt = (numStages - 1U);
-
- /* stage loop */
- while (stageCnt > 0U)
- {
- /* Read the reflection coefficient */
- k = *pk++;
-
- /* read g2(n) from state buffer */
- gcurr1 = *px;
-
- /* save g1(n) in state buffer */
- *px++ = gnext1;
-
- /* Sample processing for K2, K3.... */
- /* f2(n) = f1(n) + K2 * g1(n-1) */
- fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
- fnext1 = fcurr1 + (fnext1 << 1U);
-
- /* g2(n) = f1(n) * K2 + g1(n-1) */
- gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
- gnext1 = gcurr1 + (gnext1 << 1U);
-
- /* f1(n) is saved in fcurr1
- for next stage processing */
- fcurr1 = fnext1;
-
- stageCnt--;
-
- }
-
-
- /* y(n) = fN(n) */
- *pDst++ = fcurr1;
-
- blkCnt--;
-
- }
-
-
-}
-
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
#else
-/* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
-void arm_fir_lattice_q31(
- const arm_fir_lattice_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
-{
- q31_t *pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *px; /* temporary state pointer */
- q31_t *pk; /* temporary coefficient pointer */
- q31_t fcurr, fnext, gcurr, gnext; /* temporary variables */
- uint32_t numStages = S->numStages; /* Length of the filter */
- uint32_t blkCnt, stageCnt; /* temporary variables for counts */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
- pState = &S->pState[0];
+ while (blkCnt > 0U)
+ {
+ /* f0(n) = x(n) */
+ fcurr0 = *pSrc++;
+
+ /* Initialize state pointer */
+ px = pState;
+
+ /* Initialize coeff pointer */
+ pk = pCoeffs;
+
+ /* read g2(n) from state buffer */
+ gcurr0 = *px;
+
+ /* for sample 1 processing */
+ /* f1(n) = f0(n) + K1 * g0(n-1) */
+ fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+ fnext0 = (fnext0 << 1U) + fcurr0;
+
+ /* g1(n) = f0(n) * K1 + g0(n-1) */
+ gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+ gnext0 = (gnext0 << 1U) + gcurr0;
+
+ /* save g1(n) in state buffer */
+ *px++ = fcurr0;
+
+ /* f1(n) is saved in fcurr0 for next stage processing */
+ fcurr0 = fnext0;
+
+ stageCnt = (numStages - 1U);
+
+ /* stage loop */
+ while (stageCnt > 0U)
+ {
+ /* read g2(n) from state buffer */
+ gcurr0 = *px;
+
+ /* save g1(n) in state buffer */
+ *px++ = gnext0;
+
+ /* Sample processing for K2, K3.... */
+ /* f2(n) = f1(n) + K2 * g1(n-1) */
+ fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+ fnext0 = (fnext0 << 1U) + fcurr0;
+
+ /* g2(n) = f1(n) * K2 + g1(n-1) */
+ gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+ gnext0 = (gnext0 << 1U) + gcurr0;
+
+ /* f1(n) is saved in fcurr0 for next stage processing */
+ fcurr0 = fnext0;
+
+ stageCnt--;
+ }
+
+ /* y(n) = fN(n) */
+ *pDst++ = fcurr0;
+
+ blkCnt--;
+ }
+
+#else
+/* alternate version for CM0_FAMILY */
blkCnt = blockSize;
while (blkCnt > 0U)
{
/* f0(n) = x(n) */
- fcurr = *pSrc++;
-
- /* Initialize coeff pointer */
- pk = (pCoeffs);
+ fcurr0 = *pSrc++;
/* Initialize state pointer */
px = pState;
+ /* Initialize coeff pointer */
+ pk = pCoeffs;
+
/* read g0(n-1) from state buffer */
- gcurr = *px;
+ gcurr0 = *px;
/* for sample 1 processing */
/* f1(n) = f0(n) + K1 * g0(n-1) */
- fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
- /* g1(n) = f0(n) * K1 + g0(n-1) */
- gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
- /* save g1(n) in state buffer */
- *px++ = fcurr;
+ fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+ fnext0 = (fnext << 1U) + fcurr0;
- /* f1(n) is saved in fcurr1
- for next stage processing */
- fcurr = fnext;
+ /* g1(n) = f0(n) * K1 + g0(n-1) */
+ gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+ gnext0 = (gnext0 << 1U) + gcurr0;
+
+ /* save f0(n) in state buffer */
+ *px++ = fcurr0;
+
+ /* f1(n) is saved in fcurr for next stage processing */
+ fcurr0 = fnext0;
stageCnt = (numStages - 1U);
/* stage loop */
while (stageCnt > 0U)
{
- /* read g2(n) from state buffer */
- gcurr = *px;
+ /* read g1(n-1) from state buffer */
+ gcurr0 = *px;
- /* save g1(n) in state buffer */
- *px++ = gnext;
+ /* save g0(n-1) in state buffer */
+ *px++ = gnext0;
/* Sample processing for K2, K3.... */
/* f2(n) = f1(n) + K2 * g1(n-1) */
- fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
- /* g2(n) = f1(n) * K2 + g1(n-1) */
- gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
+ fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+ fnext0 = (fnext0 << 1U) + fcurr0;
- /* f1(n) is saved in fcurr1
- for next stage processing */
- fcurr = fnext;
+ /* g2(n) = f1(n) * K2 + g1(n-1) */
+ gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+ gnext0 = (gnext0 << 1U) + gcurr0;
+
+ /* f1(n) is saved in fcurr0 for next stage processing */
+ fcurr0 = fnext0;
stageCnt--;
-
}
/* y(n) = fN(n) */
- *pDst++ = fcurr;
+ *pDst++ = fcurr0;
blkCnt--;
-
}
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
/**
- * @} end of FIR_Lattice group
+ @} end of FIR_Lattice group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c
index e970a10..fb57952 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c
@@ -3,13 +3,13 @@
* Title: arm_fir_q15.c
* Description: Q15 FIR filter processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,334 +29,78 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR
- * @{
+ @addtogroup FIR
+ @{
*/
/**
- * @brief Processing function for the Q15 FIR filter.
- * @param[in] *S points to an instance of the Q15 FIR structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- *
- *
- * \par Restrictions
- * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- * In this case input, output, state buffers should be aligned by 32-bit
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.
- *
- * \par
- * Refer to the function <code>arm_fir_fast_q15()</code> for a faster but less precise implementation of this function.
+ @brief Processing function for the Q15 FIR filter.
+ @param[in] S points to an instance of the Q15 FIR filter structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+ The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+ There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+ After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+ Lastly, the accumulator is saturated to yield a result in 1.15 format.
+
+ @remark
+ Refer to \ref arm_fir_fast_q15() for a faster but less precise implementation of this function.
*/
-#if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-
void arm_fir_q15(
const arm_fir_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q15_t *px1; /* Temporary q15 pointer for state buffer */
- q15_t *pb; /* Temporary pointer for coefficient buffer */
- q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold SIMD state and coefficient values */
- q63_t acc0, acc1, acc2, acc3; /* Accumulators */
- uint32_t numTaps = S->numTaps; /* Number of taps in the filter */
- uint32_t tapCnt, blkCnt; /* Loop counters */
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCurnt; /* Points to the current sample of the state */
+ q15_t *px; /* Temporary pointer for state buffer */
+ const q15_t *pb; /* Temporary pointer for coefficient buffer */
+ q63_t acc0; /* Accumulators */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t tapCnt, blkCnt; /* Loop counters */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q63_t acc1, acc2, acc3; /* Accumulators */
+ q31_t x0, x1, x2, c0; /* Temporary variables to hold state and coefficient values */
+#endif
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1U)]);
- /* Apply loop unrolling and compute 4 output values simultaneously.
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 output values simultaneously.
* The variables acc0 ... acc3 hold output values that are being computed:
*
* acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
- * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
- * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+ * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+ * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
* acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3]
*/
+ blkCnt = blockSize >> 2U;
- blkCnt = blockSize >> 2;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* Copy four new input samples into the state buffer.
- ** Use 32-bit SIMD to move the 16-bit data. Only requires two copies. */
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
-
- /* Set all accumulators to zero */
- acc0 = 0;
- acc1 = 0;
- acc2 = 0;
- acc3 = 0;
-
- /* Initialize state pointer of type q15 */
- px1 = pState;
-
- /* Initialize coeff pointer of type q31 */
- pb = pCoeffs;
-
- /* Read the first two samples from the state buffer: x[n-N], x[n-N-1] */
- x0 = _SIMD32_OFFSET(px1);
-
- /* Read the third and forth samples from the state buffer: x[n-N-1], x[n-N-2] */
- x1 = _SIMD32_OFFSET(px1 + 1U);
-
- px1 += 2U;
-
- /* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-4 coefficients. */
- tapCnt = numTaps >> 2;
-
- while (tapCnt > 0U)
- {
- /* Read the first two coefficients using SIMD: b[N] and b[N-1] coefficients */
- c0 = *__SIMD32(pb)++;
-
- /* acc0 += b[N] * x[n-N] + b[N-1] * x[n-N-1] */
- acc0 = __SMLALD(x0, c0, acc0);
-
- /* acc1 += b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
- acc1 = __SMLALD(x1, c0, acc1);
-
- /* Read state x[n-N-2], x[n-N-3] */
- x2 = _SIMD32_OFFSET(px1);
-
- /* Read state x[n-N-3], x[n-N-4] */
- x3 = _SIMD32_OFFSET(px1 + 1U);
-
- /* acc2 += b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
- acc2 = __SMLALD(x2, c0, acc2);
-
- /* acc3 += b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
- acc3 = __SMLALD(x3, c0, acc3);
-
- /* Read coefficients b[N-2], b[N-3] */
- c0 = *__SIMD32(pb)++;
-
- /* acc0 += b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
- acc0 = __SMLALD(x2, c0, acc0);
-
- /* acc1 += b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
- acc1 = __SMLALD(x3, c0, acc1);
-
- /* Read state x[n-N-4], x[n-N-5] */
- x0 = _SIMD32_OFFSET(px1 + 2U);
-
- /* Read state x[n-N-5], x[n-N-6] */
- x1 = _SIMD32_OFFSET(px1 + 3U);
-
- /* acc2 += b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
- acc2 = __SMLALD(x0, c0, acc2);
-
- /* acc3 += b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
- acc3 = __SMLALD(x1, c0, acc3);
-
- px1 += 4U;
-
- tapCnt--;
-
- }
-
-
- /* If the filter length is not a multiple of 4, compute the remaining filter taps.
- ** This is always be 2 taps since the filter length is even. */
- if ((numTaps & 0x3U) != 0U)
- {
- /* Read 2 coefficients */
- c0 = *__SIMD32(pb)++;
-
- /* Fetch 4 state variables */
- x2 = _SIMD32_OFFSET(px1);
-
- x3 = _SIMD32_OFFSET(px1 + 1U);
-
- /* Perform the multiply-accumulates */
- acc0 = __SMLALD(x0, c0, acc0);
-
- px1 += 2U;
-
- acc1 = __SMLALD(x1, c0, acc1);
- acc2 = __SMLALD(x2, c0, acc2);
- acc3 = __SMLALD(x3, c0, acc3);
- }
-
- /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
- ** Then store the 4 outputs in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ =
- __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
- *__SIMD32(pDst)++ =
- __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
- *__SIMD32(pDst)++ =
- __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
- *__SIMD32(pDst)++ =
- __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-
-
- /* Advance the state pointer by 4 to process the next group of 4 samples */
- pState = pState + 4;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* Copy two samples into state buffer */
- *pStateCurnt++ = *pSrc++;
-
- /* Set the accumulator to zero */
- acc0 = 0;
-
- /* Initialize state pointer of type q15 */
- px1 = pState;
-
- /* Initialize coeff pointer of type q31 */
- pb = pCoeffs;
-
- tapCnt = numTaps >> 1;
-
- do
- {
-
- c0 = *__SIMD32(pb)++;
- x0 = *__SIMD32(px1)++;
-
- acc0 = __SMLALD(x0, c0, acc0);
- tapCnt--;
- }
- while (tapCnt > 0U);
-
- /* The result is in 2.30 format. Convert to 1.15 with saturation.
- ** Then store the output in the destination buffer. */
- *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
- /* Advance state pointer by 1 for the next sample */
- pState = pState + 1;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
-
- /* Points to the start of the state buffer */
- pStateCurnt = S->pState;
-
- /* Calculation of count for copying integer writes */
- tapCnt = (numTaps - 1U) >> 2;
-
- while (tapCnt > 0U)
- {
-
- /* Copy state values to start of state buffer */
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
- tapCnt--;
-
- }
-
- /* Calculation of count for remaining q15_t data */
- tapCnt = (numTaps - 1U) % 0x4U;
-
- /* copy remaining data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-}
-
-#else /* UNALIGNED_SUPPORT_DISABLE */
-
-void arm_fir_q15(
- const arm_fir_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
-{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q63_t acc0, acc1, acc2, acc3; /* Accumulators */
- q15_t *pb; /* Temporary pointer for coefficient buffer */
- q15_t *px; /* Temporary q31 pointer for SIMD state buffer accesses */
- q31_t x0, x1, x2, c0; /* Temporary variables to hold SIMD state and coefficient values */
- uint32_t numTaps = S->numTaps; /* Number of taps in the filter */
- uint32_t tapCnt, blkCnt; /* Loop counters */
-
-
- /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
- /* Apply loop unrolling and compute 4 output values simultaneously.
- * The variables acc0 ... acc3 hold output values that are being computed:
- *
- * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
- * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
- * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
- * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3]
- */
-
- blkCnt = blockSize >> 2;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0U)
- {
- /* Copy four new input samples into the state buffer.
- ** Use 32-bit SIMD to move the 16-bit data. Only requires two copies. */
+ /* Copy 4 new input samples into the state buffer. */
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
-
/* Set all accumulators to zero */
acc0 = 0;
acc1 = 0;
@@ -370,19 +114,19 @@
pb = pCoeffs;
/* Read the first two samples from the state buffer: x[n-N], x[n-N-1] */
- x0 = *__SIMD32(px)++;
+ x0 = read_q15x2_ia (&px);
/* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
- x2 = *__SIMD32(px)++;
+ x2 = read_q15x2_ia (&px);
/* Loop over the number of taps. Unroll by a factor of 4.
- ** Repeat until we've computed numTaps-(numTaps%4) coefficients. */
- tapCnt = numTaps >> 2;
+ Repeat until we've computed numTaps-(numTaps%4) coefficients. */
+ tapCnt = numTaps >> 2U;
- while (tapCnt > 0)
+ while (tapCnt > 0U)
{
/* Read the first two coefficients using SIMD: b[N] and b[N-1] coefficients */
- c0 = *__SIMD32(pb)++;
+ c0 = read_q15x2_ia ((q15_t **) &pb);
/* acc0 += b[N] * x[n-N] + b[N-1] * x[n-N-1] */
acc0 = __SMLALD(x0, c0, acc0);
@@ -398,7 +142,7 @@
#endif
/* Read state x[n-N-4], x[n-N-5] */
- x0 = _SIMD32_OFFSET(px);
+ x0 = read_q15x2_ia (&px);
/* acc1 += b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
acc1 = __SMLALDX(x1, c0, acc1);
@@ -414,13 +158,13 @@
acc3 = __SMLALDX(x1, c0, acc3);
/* Read coefficients b[N-2], b[N-3] */
- c0 = *__SIMD32(pb)++;
+ c0 = read_q15x2_ia ((q15_t **) &pb);
/* acc0 += b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
acc0 = __SMLALD(x2, c0, acc0);
/* Read state x[n-N-6], x[n-N-7] with offset */
- x2 = _SIMD32_OFFSET(px + 2U);
+ x2 = read_q15x2_ia (&px);
/* acc2 += b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
acc2 = __SMLALD(x0, c0, acc2);
@@ -438,21 +182,16 @@
/* acc3 += b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
acc3 = __SMLALDX(x1, c0, acc3);
- /* Update state pointer for next state reading */
- px += 4U;
-
/* Decrement tap count */
tapCnt--;
-
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps.
- ** This is always be 2 taps since the filter length is even. */
+ This is always be 2 taps since the filter length is even. */
if ((numTaps & 0x3U) != 0U)
{
-
/* Read last two coefficients */
- c0 = *__SIMD32(pb)++;
+ c0 = read_q15x2_ia ((q15_t **) &pb);
/* Perform the multiply-accumulates */
acc0 = __SMLALD(x0, c0, acc0);
@@ -466,7 +205,7 @@
#endif
/* Read last state variables */
- x0 = *__SIMD32(px);
+ x0 = read_q15x2 (px);
/* Perform the multiply-accumulates */
acc1 = __SMLALDX(x1, c0, acc1);
@@ -482,37 +221,33 @@
acc3 = __SMLALDX(x1, c0, acc3);
}
- /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
- ** Then store the 4 outputs in the destination buffer. */
-
+ /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
+ Then store the 4 outputs in the destination buffer. */
#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ =
- __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
- *__SIMD32(pDst)++ =
- __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
+ write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+ write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
#else
-
- *__SIMD32(pDst)++ =
- __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
- *__SIMD32(pDst)++ =
- __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+ write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Advance the state pointer by 4 to process the next group of 4 samples */
- pState = pState + 4;
+ pState = pState + 4U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining output samples */
blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of taps */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Copy two samples into state buffer */
@@ -529,33 +264,37 @@
do
{
- acc0 += (q31_t) * px++ * *pb++;
- acc0 += (q31_t) * px++ * *pb++;
+ acc0 += (q31_t) *px++ * *pb++;
+ acc0 += (q31_t) *px++ * *pb++;
+
tapCnt--;
}
while (tapCnt > 0U);
- /* The result is in 2.30 format. Convert to 1.15 with saturation.
- ** Then store the output in the destination buffer. */
+ /* The result is in 2.30 format. Convert to 1.15 with saturation.
+ Then store the output in the destination buffer. */
*pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
/* Advance state pointer by 1 for the next sample */
pState = pState + 1U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
/* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
+ Now copy the last numTaps - 1 samples to the start of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
- /* Calculation of count for copying integer writes */
- tapCnt = (numTaps - 1U) >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = (numTaps - 1U) >> 2U;
+
+ /* Copy data */
while (tapCnt > 0U)
{
*pStateCurnt++ = *pState++;
@@ -563,117 +302,31 @@
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
+ /* Decrement loop counter */
tapCnt--;
-
}
- /* Calculation of count for remaining q15_t data */
+ /* Calculate remaining number of copies */
tapCnt = (numTaps - 1U) % 0x4U;
- /* copy remaining data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
+#else
- /* Decrement the loop counter */
- tapCnt--;
- }
-}
-
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-#else /* ARM_MATH_CM0_FAMILY */
-
-
-/* Run the below code for Cortex-M0 */
-
-void arm_fir_q15(
- const arm_fir_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
-{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
-
-
-
- q15_t *px; /* Temporary pointer for state buffer */
- q15_t *pb; /* Temporary pointer for coefficient buffer */
- q63_t acc; /* Accumulator */
- uint32_t numTaps = S->numTaps; /* Number of nTaps in the filter */
- uint32_t tapCnt, blkCnt; /* Loop counters */
-
- /* S->pState buffer contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
- /* Initialize blkCnt with blockSize */
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
- /* Copy one sample at a time into state buffer */
- *pStateCurnt++ = *pSrc++;
-
- /* Set the accumulator to zero */
- acc = 0;
-
- /* Initialize state pointer */
- px = pState;
-
- /* Initialize Coefficient pointer */
- pb = pCoeffs;
-
- tapCnt = numTaps;
-
- /* Perform the multiply-accumulates */
- do
- {
- /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
- acc += (q31_t) * px++ * *pb++;
- tapCnt--;
- } while (tapCnt > 0U);
-
- /* The result is in 2.30 format. Convert to 1.15
- ** Then store the output in the destination buffer. */
- *pDst++ = (q15_t) __SSAT((acc >> 15U), 16);
-
- /* Advance state pointer by 1 for the next sample */
- pState = pState + 1;
-
- /* Decrement the samples loop counter */
- blkCnt--;
- }
-
- /* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
-
- /* Points to the start of the state buffer */
- pStateCurnt = S->pState;
-
- /* Copy numTaps number of values */
+ /* Initialize tapCnt with number of taps */
tapCnt = (numTaps - 1U);
- /* copy data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ /* Copy remaining data */
while (tapCnt > 0U)
{
*pStateCurnt++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
-
-
/**
- * @} end of FIR group
+ @} end of FIR group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c
index 4ca8295..2368a99 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c
@@ -3,13 +3,13 @@
* Title: arm_fir_q31.c
* Description: Q31 FIR filter processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,80 +29,74 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR
- * @{
+ @addtogroup FIR
+ @{
*/
/**
- * @param[in] *S points to an instance of the Q31 FIR filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
- * After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
- *
- * \par
- * Refer to the function <code>arm_fir_fast_q31()</code> for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.
+ @brief Processing function for Q31 FIR filter.
+ @param[in] S points to an instance of the Q31 FIR filter structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ Thus, if the accumulator result overflows it wraps around rather than clip.
+ In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
+ After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+
+ @remark
+ Refer to \ref arm_fir_fast_q31() for a faster but less precise implementation of this filter.
*/
void arm_fir_q31(
const arm_fir_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pState = S->pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *pStateCurnt; /* Points to the current sample of the state */
+ q31_t *pState = S->pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *pStateCurnt; /* Points to the current sample of the state */
+ q31_t *px; /* Temporary pointer for state buffer */
+ const q31_t *pb; /* Temporary pointer for coefficient buffer */
+ q63_t acc0; /* Accumulator */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t i, tapCnt, blkCnt; /* Loop counters */
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q31_t x0, x1, x2; /* Temporary variables to hold state */
- q31_t c0; /* Temporary variable to hold coefficient value */
- q31_t *px; /* Temporary pointer for state */
- q31_t *pb; /* Temporary pointer for coefficient buffer */
- q63_t acc0, acc1, acc2; /* Accumulators */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t i, tapCnt, blkCnt, tapCntN3; /* Loop counters */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q63_t acc1, acc2; /* Accumulators */
+ q31_t x0, x1, x2; /* Temporary variables to hold state values */
+ q31_t c0; /* Temporary variable to hold coefficient value */
+#endif
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1U)]);
- /* Apply loop unrolling and compute 4 output values simultaneously.
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 output values simultaneously.
* The variables acc0 ... acc3 hold output values that are being computed:
*
* acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
- * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
- * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+ * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+ * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
* acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3]
*/
+
blkCnt = blockSize / 3;
- blockSize = blockSize - (3 * blkCnt);
- tapCnt = numTaps / 3;
- tapCntN3 = numTaps - (3 * tapCnt);
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* Copy three new input samples into the state buffer */
+ /* Copy 3 new input samples into the state buffer. */
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
@@ -118,15 +112,14 @@
/* Initialize coefficient pointer */
pb = pCoeffs;
- /* Read the first two samples from the state buffer:
- * x[n-numTaps], x[n-numTaps-1] */
- x0 = *(px++);
- x1 = *(px++);
+ /* Read the first 2 samples from the state buffer: x[n-numTaps], x[n-numTaps-1] */
+ x0 = *px++;
+ x1 = *px++;
- /* Loop unrolling. Process 3 taps at a time. */
- i = tapCnt;
+ /* Loop unrolling: process 3 taps at a time. */
+ tapCnt = numTaps / 3;
- while (i > 0U)
+ while (tapCnt > 0U)
{
/* Read the b[numTaps] coefficient */
c0 = *pb;
@@ -160,15 +153,14 @@
acc1 += ((q63_t) x0 * c0);
acc2 += ((q63_t) x1 * c0);
- /* Decrement the loop counter */
- i--;
+ /* Decrement loop counter */
+ tapCnt--;
}
- /* If the filter length is not a multiple of 3, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining outputs */
+ tapCnt = numTaps % 0x3U;
- i = tapCntN3;
-
- while (i > 0U)
+ while (tapCnt > 0U)
{
/* Read coefficients */
c0 = *(pb++);
@@ -185,117 +177,39 @@
x0 = x1;
x1 = x2;
- /* Decrement the loop counter */
- i--;
+ /* Decrement loop counter */
+ tapCnt--;
}
/* Advance the state pointer by 3 to process the next group of 3 samples */
pState = pState + 3;
- /* The results in the 3 accumulators are in 2.30 format. Convert to 1.31
- ** Then store the 3 outputs in the destination buffer. */
+ /* The result is in 2.30 format. Convert to 1.31 and store in destination buffer. */
*pDst++ = (q31_t) (acc0 >> 31U);
*pDst++ = (q31_t) (acc1 >> 31U);
*pDst++ = (q31_t) (acc2 >> 31U);
- /* Decrement the samples loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 3, compute any remaining output samples here.
- ** No loop unrolling is used. */
-
- while (blockSize > 0U)
- {
- /* Copy one sample at a time into state buffer */
- *pStateCurnt++ = *pSrc++;
-
- /* Set the accumulator to zero */
- acc0 = 0;
-
- /* Initialize state pointer */
- px = pState;
-
- /* Initialize Coefficient pointer */
- pb = (pCoeffs);
-
- i = numTaps;
-
- /* Perform the multiply-accumulates */
- do
- {
- acc0 += (q63_t) * (px++) * (*(pb++));
- i--;
- } while (i > 0U);
-
- /* The result is in 2.62 format. Convert to 1.31
- ** Then store the output in the destination buffer. */
- *pDst++ = (q31_t) (acc0 >> 31U);
-
- /* Advance state pointer by 1 for the next sample */
- pState = pState + 1;
-
- /* Decrement the samples loop counter */
- blockSize--;
- }
-
- /* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
-
- /* Points to the start of the state buffer */
- pStateCurnt = S->pState;
-
- tapCnt = (numTaps - 1U) >> 2U;
-
- /* copy data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Calculate remaining number of copies */
- tapCnt = (numTaps - 1U) % 0x4U;
-
- /* Copy the remaining q31_t data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
+ /* Loop unrolling: Compute remaining output samples */
+ blkCnt = blockSize % 0x3U;
#else
-/* Run the below code for Cortex-M0 */
-
- q31_t *px; /* Temporary pointer for state */
- q31_t *pb; /* Temporary pointer for coefficient buffer */
- q63_t acc; /* Accumulator */
- uint32_t numTaps = S->numTaps; /* Length of the filter */
- uint32_t i, tapCnt, blkCnt; /* Loop counters */
-
- /* S->pState buffer contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
- /* Initialize blkCnt with blockSize */
+ /* Initialize blkCnt with number of taps */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Copy one sample at a time into state buffer */
*pStateCurnt++ = *pSrc++;
/* Set the accumulator to zero */
- acc = 0;
+ acc0 = 0;
/* Initialize state pointer */
px = pState;
@@ -309,45 +223,66 @@
do
{
/* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
- acc += (q63_t) * px++ * *pb++;
+ acc0 += (q63_t) *px++ * *pb++;
+
i--;
} while (i > 0U);
- /* The result is in 2.62 format. Convert to 1.31
- ** Then store the output in the destination buffer. */
- *pDst++ = (q31_t) (acc >> 31U);
+ /* Result is in 2.62 format. Convert to 1.31 and store in destination buffer. */
+ *pDst++ = (q31_t) (acc0 >> 31U);
/* Advance state pointer by 1 for the next sample */
- pState = pState + 1;
+ pState = pState + 1U;
- /* Decrement the samples loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
/* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the starting of the state buffer.
- ** This prepares the state buffer for the next function call. */
+ Now copy the last numTaps - 1 samples to the start of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
- /* Copy numTaps number of values */
- tapCnt = numTaps - 1U;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Copy the data */
+ /* Loop unrolling: Compute 4 taps at a time */
+ tapCnt = (numTaps - 1U) >> 2U;
+
+ /* Copy data */
+ while (tapCnt > 0U)
+ {
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+ /* Calculate remaining number of copies */
+ tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ /* Copy remaining data */
while (tapCnt > 0U)
{
*pStateCurnt++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of FIR group
+ @} end of FIR group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c
index 23e60ad..d1b90e4 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c
@@ -3,13 +3,13 @@
* Title: arm_fir_q7.c
* Description: Q7 FIR filter processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,72 +29,70 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR
- * @{
+ @addtogroup FIR
+ @{
*/
/**
- * @param[in] *S points to an instance of the Q7 FIR filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * The accumulator is converted to 18.7 format by discarding the low 7 bits.
- * Finally, the result is truncated to 1.7 format.
+ @brief Processing function for Q7 FIR filter.
+ @param[in] S points to an instance of the Q7 FIR filter structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 32-bit internal accumulator.
+ Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
+ The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+ There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+ The accumulator is converted to 18.7 format by discarding the low 7 bits.
+ Finally, the result is truncated to 1.7 format.
*/
void arm_fir_q7(
const arm_fir_instance_q7 * S,
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize)
+ const q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize)
{
+ q7_t *pState = S->pState; /* State pointer */
+ const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q7_t *pStateCurnt; /* Points to the current sample of the state */
+ q7_t *px; /* Temporary pointer for state buffer */
+ const q7_t *pb; /* Temporary pointer for coefficient buffer */
+ q31_t acc0; /* Accumulators */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t i, tapCnt, blkCnt; /* Loop counters */
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q7_t *pState = S->pState; /* State pointer */
- q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q7_t *pStateCurnt; /* Points to the current sample of the state */
- q7_t x0, x1, x2, x3; /* Temporary variables to hold state */
- q7_t c0; /* Temporary variable to hold coefficient value */
- q7_t *px; /* Temporary pointer for state */
- q7_t *pb; /* Temporary pointer for coefficient buffer */
- q31_t acc0, acc1, acc2, acc3; /* Accumulators */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t i, tapCnt, blkCnt; /* Loop counters */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t acc1, acc2, acc3; /* Accumulators */
+ q7_t x0, x1, x2, x3, c0; /* Temporary variables to hold state */
+#endif
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1U)]);
- /* Apply loop unrolling and compute 4 output values simultaneously.
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 output values simultaneously.
* The variables acc0 ... acc3 hold output values that are being computed:
*
* acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
- * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
- * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+ * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+ * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
* acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3]
*/
- blkCnt = blockSize >> 2;
+ blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* Copy four new input samples into the state buffer */
+ /* Copy 4 new input samples into the state buffer. */
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
@@ -112,17 +110,18 @@
/* Initialize coefficient pointer */
pb = pCoeffs;
- /* Read the first three samples from the state buffer:
+ /* Read the first 3 samples from the state buffer:
* x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
- x0 = *(px++);
- x1 = *(px++);
- x2 = *(px++);
+ x0 = *px++;
+ x1 = *px++;
+ x2 = *px++;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
- i = tapCnt;
+ /* Loop unrolling. Process 4 taps at a time. */
+ tapCnt = numTaps >> 2U;
- while (i > 0U)
+ /* Loop over the number of taps. Unroll by a factor of 4.
+ Repeat until we've computed numTaps-4 coefficients. */
+ while (tapCnt > 0U)
{
/* Read the b[numTaps] coefficient */
c0 = *pb;
@@ -182,14 +181,14 @@
pb += 4U;
px += 4U;
- /* Decrement the loop counter */
- i--;
+ /* Decrement loop counter */
+ tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ tapCnt = numTaps % 0x4U;
- i = numTaps - (tapCnt * 4U);
- while (i > 0U)
+ while (tapCnt > 0U)
{
/* Read coefficients */
c0 = *(pb++);
@@ -208,15 +207,12 @@
x1 = x2;
x2 = x3;
- /* Decrement the loop counter */
- i--;
+ /* Decrement loop counter */
+ tapCnt--;
}
- /* Advance the state pointer by 4 to process the next group of 4 samples */
- pState = pState + 4;
-
- /* The results in the 4 accumulators are in 2.62 format. Convert to 1.31
- ** Then store the 4 outputs in the destination buffer. */
+ /* The results in the 4 accumulators are in 2.62 format. Convert to 1.31
+ Then store the 4 outputs in the destination buffer. */
acc0 = __SSAT((acc0 >> 7U), 8);
*pDst++ = acc0;
acc1 = __SSAT((acc1 >> 7U), 8);
@@ -226,14 +222,22 @@
acc3 = __SSAT((acc3 >> 7U), 8);
*pDst++ = acc3;
- /* Decrement the samples loop counter */
+ /* Advance the state pointer by 4 to process the next group of 4 samples */
+ pState = pState + 4U;
+
+ /* Decrement loop counter */
blkCnt--;
}
+ /* Loop unrolling: Compute remaining output samples */
+ blkCnt = blockSize % 0x4U;
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 4U;
+#else
+
+ /* Initialize blkCnt with number of taps */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
@@ -247,7 +251,7 @@
px = pState;
/* Initialize Coefficient pointer */
- pb = (pCoeffs);
+ pb = pCoeffs;
i = numTaps;
@@ -258,27 +262,30 @@
i--;
} while (i > 0U);
- /* The result is in 2.14 format. Convert to 1.7
- ** Then store the output in the destination buffer. */
+ /* The result is in 2.14 format. Convert to 1.7
+ Then store the output in the destination buffer. */
*pDst++ = __SSAT((acc0 >> 7U), 8);
/* Advance state pointer by 1 for the next sample */
- pState = pState + 1;
+ pState = pState + 1U;
- /* Decrement the samples loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
/* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
+ Now copy the last numTaps - 1 samples to the start of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time */
tapCnt = (numTaps - 1U) >> 2U;
- /* copy data */
+ /* Copy data */
while (tapCnt > 0U)
{
*pStateCurnt++ = *pState++;
@@ -286,14 +293,21 @@
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
/* Calculate remaining number of copies */
tapCnt = (numTaps - 1U) % 0x4U;
- /* Copy the remaining q31_t data */
+#else
+
+ /* Initialize tapCnt with number of taps */
+ tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ /* Copy remaining data */
while (tapCnt > 0U)
{
*pStateCurnt++ = *pState++;
@@ -302,84 +316,8 @@
tapCnt--;
}
-#else
-
-/* Run the below code for Cortex-M0 */
-
- uint32_t numTaps = S->numTaps; /* Number of taps in the filter */
- uint32_t i, blkCnt; /* Loop counters */
- q7_t *pState = S->pState; /* State pointer */
- q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q7_t *px, *pb; /* Temporary pointers to state and coeff */
- q31_t acc = 0; /* Accumlator */
- q7_t *pStateCurnt; /* Points to the current sample of the state */
-
-
- /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = S->pState + (numTaps - 1U);
-
- /* Initialize blkCnt with blockSize */
- blkCnt = blockSize;
-
- /* Perform filtering upto BlockSize - BlockSize%4 */
- while (blkCnt > 0U)
- {
- /* Copy one sample at a time into state buffer */
- *pStateCurnt++ = *pSrc++;
-
- /* Set accumulator to zero */
- acc = 0;
-
- /* Initialize state pointer of type q7 */
- px = pState;
-
- /* Initialize coeff pointer of type q7 */
- pb = pCoeffs;
-
-
- i = numTaps;
-
- while (i > 0U)
- {
- /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
- acc += (q15_t) * px++ * *pb++;
- i--;
- }
-
- /* Store the 1.7 format filter output in destination buffer */
- *pDst++ = (q7_t) __SSAT((acc >> 7), 8);
-
- /* Advance the state pointer by 1 to process the next sample */
- pState = pState + 1;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Processing is complete.
- ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
- ** This prepares the state buffer for the next function call. */
-
-
- /* Points to the start of the state buffer */
- pStateCurnt = S->pState;
-
-
- /* Copy numTaps number of values */
- i = (numTaps - 1U);
-
- /* Copy q7_t data */
- while (i > 0U)
- {
- *pStateCurnt++ = *pState++;
- i--;
- }
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of FIR group
+ @} end of FIR group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c
index bba2936..c571a2a 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c
@@ -3,13 +3,13 @@
* Title: arm_fir_sparse_f32.c
* Description: Floating-point sparse FIR filter processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,117 +29,111 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters
- *
- * This group of functions implements sparse FIR filters.
- * Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero.
- * Sparse filters are used for simulating reflections in communications and audio applications.
- *
- * There are separate functions for Q7, Q15, Q31, and floating-point data types.
- * The functions operate on blocks of input and output data and each call to the function processes
- * <code>blockSize</code> samples through the filter. <code>pSrc</code> and
- * <code>pDst</code> points to input and output arrays respectively containing <code>blockSize</code> values.
- *
- * \par Algorithm:
- * The sparse filter instant structure contains an array of tap indices <code>pTapDelay</code> which specifies the locations of the non-zero coefficients.
- * This is in addition to the coefficient array <code>b</code>.
- * The implementation essentially skips the multiplications by zero and leads to an efficient realization.
- * <pre>
- * y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]
- * </pre>
- * \par
- * \image html FIRSparse.gif "Sparse FIR filter. b[n] represents the filter coefficients"
- * \par
- * <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>;
- * <code>pTapDelay</code> points to an array of nonzero indices and is also of size <code>numTaps</code>;
- * <code>pState</code> points to a state array of size <code>maxDelay + blockSize</code>, where
- * <code>maxDelay</code> is the largest offset value that is ever used in the <code>pTapDelay</code> array.
- * Some of the processing functions also require temporary working buffers.
- *
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter.
- * Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared.
- * There are separate instance structure declarations for each of the 4 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * Set the values in the state buffer to zeros before static initialization.
- * The code below statically initializes each of the 4 different data type filter instance structures
- * <pre>
- *arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
- *arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
- *arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
- *arm_fir_sparse_instance_q7 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
- * </pre>
- * \par
- *
- * \par Fixed-Point Behavior
- * Care must be taken when using the fixed-point versions of the sparse FIR filter functions.
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
- * Refer to the function specific documentation below for usage guidelines.
+ @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters
+
+ This group of functions implements sparse FIR filters.
+ Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero.
+ Sparse filters are used for simulating reflections in communications and audio applications.
+
+ There are separate functions for Q7, Q15, Q31, and floating-point data types.
+ The functions operate on blocks of input and output data and each call to the function processes
+ <code>blockSize</code> samples through the filter. <code>pSrc</code> and
+ <code>pDst</code> points to input and output arrays respectively containing <code>blockSize</code> values.
+
+ @par Algorithm
+ The sparse filter instant structure contains an array of tap indices <code>pTapDelay</code> which specifies the locations of the non-zero coefficients.
+ This is in addition to the coefficient array <code>b</code>.
+ The implementation essentially skips the multiplications by zero and leads to an efficient realization.
+ <pre>
+ y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]
+ </pre>
+ @par
+ \image html FIRSparse.gif "Sparse FIR filter. b[n] represents the filter coefficients"
+ @par
+ <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>;
+ <code>pTapDelay</code> points to an array of nonzero indices and is also of size <code>numTaps</code>;
+ <code>pState</code> points to a state array of size <code>maxDelay + blockSize</code>, where
+ <code>maxDelay</code> is the largest offset value that is ever used in the <code>pTapDelay</code> array.
+ Some of the processing functions also require temporary working buffers.
+
+ @par Instance Structure
+ The coefficients and state variables for a filter are stored together in an instance data structure.
+ A separate instance structure must be defined for each filter.
+ Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared.
+ There are separate instance structure declarations for each of the 4 supported data types.
+
+ @par Initialization Functions
+ There is also an associated initialization function for each data type.
+ The initialization function performs the following operations:
+ - Sets the values of the internal structure fields.
+ - Zeros out the values in the state buffer.
+ To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero.
+ @par
+ Use of the initialization function is optional.
+ However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+ To place an instance structure into a const data section, the instance structure must be manually initialized.
+ Set the values in the state buffer to zeros before static initialization.
+ The code below statically initializes each of the 4 different data type filter instance structures
+ <pre>
+ arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+ arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+ arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+ arm_fir_sparse_instance_q7 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+ </pre>
+
+ @par Fixed-Point Behavior
+ Care must be taken when using the fixed-point versions of the sparse FIR filter functions.
+ In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+ Refer to the function specific documentation below for usage guidelines.
*/
/**
- * @addtogroup FIR_Sparse
- * @{
+ @addtogroup FIR_Sparse
+ @{
*/
/**
- * @brief Processing function for the floating-point sparse FIR filter.
- * @param[in] *S points to an instance of the floating-point sparse FIR structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] *pScratchIn points to a temporary buffer of size blockSize.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
+ @brief Processing function for the floating-point sparse FIR filter.
+ @param[in] S points to an instance of the floating-point sparse FIR structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] pScratchIn points to a temporary buffer of size blockSize
+ @param[in] blockSize number of input samples to process
+ @return none
*/
void arm_fir_sparse_f32(
- arm_fir_sparse_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- float32_t * pScratchIn,
- uint32_t blockSize)
+ arm_fir_sparse_instance_f32 * S,
+ const float32_t * pSrc,
+ float32_t * pDst,
+ float32_t * pScratchIn,
+ uint32_t blockSize)
{
-
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- float32_t *px; /* Scratch buffer pointer */
- float32_t *py = pState; /* Temporary pointers for state buffer */
- float32_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
- float32_t *pOut; /* Destination pointer */
- int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
- uint32_t delaySize = S->maxDelay + blockSize; /* state length */
- uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- int32_t readIndex; /* Read index of the state buffer */
- uint32_t tapCnt, blkCnt; /* loop counters */
- float32_t coeff = *pCoeffs++; /* Read the first coefficient value */
-
+ float32_t *pState = S->pState; /* State pointer */
+ const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t *px; /* Scratch buffer pointer */
+ float32_t *py = pState; /* Temporary pointers for state buffer */
+ float32_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
+ float32_t *pOut; /* Destination pointer */
+ int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
+ uint32_t delaySize = S->maxDelay + blockSize; /* state length */
+ uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ int32_t readIndex; /* Read index of the state buffer */
+ uint32_t tapCnt, blkCnt; /* loop counters */
+ float32_t coeff = *pCoeffs++; /* Read the first coefficient value */
/* BlockSize of Input samples are copied into the state buffer */
/* StateIndex points to the starting position to write in the state buffer */
- arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
- (int32_t *) pSrc, 1, blockSize);
-
+ arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1, (int32_t *) pSrc, 1, blockSize);
/* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
+ readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
@@ -152,46 +146,51 @@
/* blockSize samples are read from the state buffer */
arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
- (int32_t *) pb, (int32_t *) pb, blockSize, 1,
- blockSize);
+ (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
- /* Working pointer for the scratch buffer */
+ /* Working pointer for the scratch buffer of state values */
px = pb;
- /* Working pointer for destination buffer */
+ /* Working pointer for scratch buffer of output values */
pOut = pDst;
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /* Loop over the blockSize. Unroll by a factor of 4.
- * Compute 4 Multiplications at a time. */
+ /* Loop unrolling: Compute 4 outputs at a time. */
blkCnt = blockSize >> 2U;
while (blkCnt > 0U)
{
/* Perform Multiplications and store in destination buffer */
*pOut++ = *px++ * coeff;
- *pOut++ = *px++ * coeff;
- *pOut++ = *px++ * coeff;
+
*pOut++ = *px++ * coeff;
- /* Decrement the loop counter */
+ *pOut++ = *px++ * coeff;
+
+ *pOut++ = *px++ * coeff;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4,
- * compute the remaining samples */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
- /* Perform Multiplications and store in destination buffer */
+ /* Perform Multiplication and store in destination buffer */
*pOut++ = *px++ * coeff;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -200,7 +199,7 @@
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
+ readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
@@ -213,169 +212,56 @@
while (tapCnt > 0U)
{
-
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
- (int32_t *) pb, (int32_t *) pb, blockSize, 1,
- blockSize);
+ (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
- /* Working pointer for the scratch buffer */
+ /* Working pointer for the scratch buffer of state values */
px = pb;
- /* Working pointer for destination buffer */
+ /* Working pointer for scratch buffer of output values */
pOut = pDst;
- /* Loop over the blockSize. Unroll by a factor of 4.
- * Compute 4 MACS at a time. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time. */
blkCnt = blockSize >> 2U;
while (blkCnt > 0U)
{
/* Perform Multiply-Accumulate */
*pOut++ += *px++ * coeff;
- *pOut++ += *px++ * coeff;
- *pOut++ += *px++ * coeff;
+
*pOut++ += *px++ * coeff;
- /* Decrement the loop counter */
+ *pOut++ += *px++ * coeff;
+
+ *pOut++ += *px++ * coeff;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4,
- * compute the remaining samples */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- *pOut++ += *px++ * coeff;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Load the coefficient value and
- * increment the coefficient buffer for the next set of state values */
- coeff = *pCoeffs++;
-
- /* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = ((int32_t) S->stateIndex -
- (int32_t) blockSize) - *pTapDelay++;
-
- /* Wraparound of readIndex */
- if (readIndex < 0)
- {
- readIndex += (int32_t) delaySize;
- }
-
- /* Decrement the tap loop counter */
- tapCnt--;
- }
-
- /* Compute last tap without the final read of pTapDelay */
-
- /* Working pointer for state buffer is updated */
- py = pState;
-
- /* blockSize samples are read from the state buffer */
- arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
- (int32_t *) pb, (int32_t *) pb, blockSize, 1,
- blockSize);
-
- /* Working pointer for the scratch buffer */
- px = pb;
-
- /* Working pointer for destination buffer */
- pOut = pDst;
-
- /* Loop over the blockSize. Unroll by a factor of 4.
- * Compute 4 MACS at a time. */
- blkCnt = blockSize >> 2U;
-
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- *pOut++ += *px++ * coeff;
- *pOut++ += *px++ * coeff;
- *pOut++ += *px++ * coeff;
- *pOut++ += *px++ * coeff;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4,
- * compute the remaining samples */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- *pOut++ += *px++ * coeff;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
-/* Run the below code for Cortex-M0 */
-
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
- /* Perform Multiplications and store in destination buffer */
- *pOut++ = *px++ * coeff;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Load the coefficient value and
- * increment the coefficient buffer for the next set of state values */
- coeff = *pCoeffs++;
-
- /* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
- /* Wraparound of readIndex */
- if (readIndex < 0)
- {
- readIndex += (int32_t) delaySize;
- }
-
- /* Loop over the number of taps. */
- tapCnt = (uint32_t) numTaps - 2U;
-
- while (tapCnt > 0U)
- {
-
- /* Working pointer for state buffer is updated */
- py = pState;
-
- /* blockSize samples are read from the state buffer */
- arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
- (int32_t *) pb, (int32_t *) pb, blockSize, 1,
- blockSize);
-
- /* Working pointer for the scratch buffer */
- px = pb;
-
- /* Working pointer for destination buffer */
- pOut = pDst;
-
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Perform Multiply-Accumulate */
*pOut++ += *px++ * coeff;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -384,8 +270,7 @@
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
- readIndex =
- ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
+ readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
@@ -393,41 +278,64 @@
readIndex += (int32_t) delaySize;
}
- /* Decrement the tap loop counter */
+ /* Decrement tap loop counter */
tapCnt--;
}
- /* Compute last tap without the final read of pTapDelay */
+ /* Compute last tap without the final read of pTapDelay */
- /* Working pointer for state buffer is updated */
- py = pState;
+ /* Working pointer for state buffer is updated */
+ py = pState;
- /* blockSize samples are read from the state buffer */
- arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
- (int32_t *) pb, (int32_t *) pb, blockSize, 1,
- blockSize);
+ /* blockSize samples are read from the state buffer */
+ arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+ (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
- /* Working pointer for the scratch buffer */
- px = pb;
+ /* Working pointer for the scratch buffer of state values */
+ px = pb;
- /* Working pointer for destination buffer */
- pOut = pDst;
+ /* Working pointer for scratch buffer of output values */
+ pOut = pDst;
- blkCnt = blockSize;
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- *pOut++ += *px++ * coeff;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Decrement the loop counter */
- blkCnt--;
- }
+ /* Loop unrolling: Compute 4 outputs at a time. */
+ blkCnt = blockSize >> 2U;
-#endif /* #if defined (ARM_MATH_DSP) */
+ while (blkCnt > 0U)
+ {
+ /* Perform Multiply-Accumulate */
+ *pOut++ += *px++ * coeff;
+ *pOut++ += *px++ * coeff;
+ *pOut++ += *px++ * coeff;
+ *pOut++ += *px++ * coeff;
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* Perform Multiply-Accumulate */
+ *pOut++ += *px++ * coeff;
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
}
/**
- * @} end of FIR_Sparse group
+ @} end of FIR_Sparse group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
index d663679..be3bed8 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_fir_sparse_init_f32.c
* Description: Floating-point sparse FIR filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,43 +29,42 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Sparse
- * @{
+ @addtogroup FIR_Sparse
+ @{
*/
/**
- * @brief Initialization function for the floating-point sparse FIR filter.
- * @param[in,out] *S points to an instance of the floating-point sparse FIR structure.
- * @param[in] numTaps number of nonzero coefficients in the filter.
- * @param[in] *pCoeffs points to the array of filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] *pTapDelay points to the array of offset times.
- * @param[in] maxDelay maximum offset time supported.
- * @param[in] blockSize number of samples that will be processed per block.
- * @return none
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
- * <code>pState</code> holds the filter's state variables and must be of length
- * <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
- * is the maximum number of delay line values.
- * <code>blockSize</code> is the
- * number of samples processed by the <code>arm_fir_sparse_f32()</code> function.
+ @brief Initialization function for the floating-point sparse FIR filter.
+ @param[in,out] S points to an instance of the floating-point sparse FIR structure
+ @param[in] numTaps number of nonzero coefficients in the filter
+ @param[in] pCoeffs points to the array of filter coefficients
+ @param[in] pState points to the state buffer
+ @param[in] pTapDelay points to the array of offset times
+ @param[in] maxDelay maximum offset time supported
+ @param[in] blockSize number of samples that will be processed per block
+ @return none
+
+ @par Details
+ <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
+ <code>pState</code> holds the filter's state variables and must be of length
+ <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
+ is the maximum number of delay line values.
+ <code>blockSize</code> is the
+ number of samples processed by the <code>arm_fir_sparse_f32()</code> function.
*/
void arm_fir_sparse_init_f32(
- arm_fir_sparse_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize)
+ arm_fir_sparse_instance_f32 * S,
+ uint16_t numTaps,
+ const float32_t * pCoeffs,
+ float32_t * pState,
+ int32_t * pTapDelay,
+ uint16_t maxDelay,
+ uint32_t blockSize)
{
/* Assign filter taps */
S->numTaps = numTaps;
@@ -87,9 +86,8 @@
/* Assign state pointer */
S->pState = pState;
-
}
/**
- * @} end of FIR_Sparse group
+ @} end of FIR_Sparse group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
index 08c2d0e..b0e4139 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
@@ -3,13 +3,13 @@
* Title: arm_fir_sparse_init_q15.c
* Description: Q15 sparse FIR filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,43 +29,42 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Sparse
- * @{
+ @addtogroup FIR_Sparse
+ @{
*/
/**
- * @brief Initialization function for the Q15 sparse FIR filter.
- * @param[in,out] *S points to an instance of the Q15 sparse FIR structure.
- * @param[in] numTaps number of nonzero coefficients in the filter.
- * @param[in] *pCoeffs points to the array of filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] *pTapDelay points to the array of offset times.
- * @param[in] maxDelay maximum offset time supported.
- * @param[in] blockSize number of samples that will be processed per block.
- * @return none
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
- * <code>pState</code> holds the filter's state variables and must be of length
- * <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
- * is the maximum number of delay line values.
- * <code>blockSize</code> is the
- * number of words processed by <code>arm_fir_sparse_q15()</code> function.
+ @brief Initialization function for the Q15 sparse FIR filter.
+ @param[in,out] S points to an instance of the Q15 sparse FIR structure
+ @param[in] numTaps number of nonzero coefficients in the filter
+ @param[in] pCoeffs points to the array of filter coefficients
+ @param[in] pState points to the state buffer
+ @param[in] pTapDelay points to the array of offset times
+ @param[in] maxDelay maximum offset time supported
+ @param[in] blockSize number of samples that will be processed per block
+ @return none
+
+ @par Details
+ <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
+ <code>pState</code> holds the filter's state variables and must be of length
+ <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
+ is the maximum number of delay line values.
+ <code>blockSize</code> is the
+ number of words processed by <code>arm_fir_sparse_q15()</code> function.
*/
void arm_fir_sparse_init_q15(
- arm_fir_sparse_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize)
+ arm_fir_sparse_instance_q15 * S,
+ uint16_t numTaps,
+ const q15_t * pCoeffs,
+ q15_t * pState,
+ int32_t * pTapDelay,
+ uint16_t maxDelay,
+ uint32_t blockSize)
{
/* Assign filter taps */
S->numTaps = numTaps;
@@ -87,9 +86,8 @@
/* Assign state pointer */
S->pState = pState;
-
}
/**
- * @} end of FIR_Sparse group
+ @} end of FIR_Sparse group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
index 4a94232..2493684 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_fir_sparse_init_q31.c
* Description: Q31 sparse FIR filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,42 +29,41 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Sparse
- * @{
+ @addtogroup FIR_Sparse
+ @{
*/
/**
- * @brief Initialization function for the Q31 sparse FIR filter.
- * @param[in,out] *S points to an instance of the Q31 sparse FIR structure.
- * @param[in] numTaps number of nonzero coefficients in the filter.
- * @param[in] *pCoeffs points to the array of filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] *pTapDelay points to the array of offset times.
- * @param[in] maxDelay maximum offset time supported.
- * @param[in] blockSize number of samples that will be processed per block.
- * @return none
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
- * <code>pState</code> holds the filter's state variables and must be of length
- * <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
- * is the maximum number of delay line values.
- * <code>blockSize</code> is the number of words processed by <code>arm_fir_sparse_q31()</code> function.
+ @brief Initialization function for the Q31 sparse FIR filter.
+ @param[in,out] S points to an instance of the Q31 sparse FIR structure
+ @param[in] numTaps number of nonzero coefficients in the filter
+ @param[in] pCoeffs points to the array of filter coefficients
+ @param[in] pState points to the state buffer
+ @param[in] pTapDelay points to the array of offset times
+ @param[in] maxDelay maximum offset time supported
+ @param[in] blockSize number of samples that will be processed per block
+ @return none
+
+ @par Details
+ <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
+ <code>pState</code> holds the filter's state variables and must be of length
+ <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
+ is the maximum number of delay line values.
+ <code>blockSize</code> is the number of words processed by <code>arm_fir_sparse_q31()</code> function.
*/
void arm_fir_sparse_init_q31(
- arm_fir_sparse_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize)
+ arm_fir_sparse_instance_q31 * S,
+ uint16_t numTaps,
+ const q31_t * pCoeffs,
+ q31_t * pState,
+ int32_t * pTapDelay,
+ uint16_t maxDelay,
+ uint32_t blockSize)
{
/* Assign filter taps */
S->numTaps = numTaps;
@@ -86,9 +85,8 @@
/* Assign state pointer */
S->pState = pState;
-
}
/**
- * @} end of FIR_Sparse group
+ @} end of FIR_Sparse group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
index 58d6705..4fba67c 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
@@ -3,13 +3,13 @@
* Title: arm_fir_sparse_init_q7.c
* Description: Q7 sparse FIR filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,43 +29,42 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Sparse
- * @{
+ @addtogroup FIR_Sparse
+ @{
*/
/**
- * @brief Initialization function for the Q7 sparse FIR filter.
- * @param[in,out] *S points to an instance of the Q7 sparse FIR structure.
- * @param[in] numTaps number of nonzero coefficients in the filter.
- * @param[in] *pCoeffs points to the array of filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] *pTapDelay points to the array of offset times.
- * @param[in] maxDelay maximum offset time supported.
- * @param[in] blockSize number of samples that will be processed per block.
- * @return none
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
- * <code>pState</code> holds the filter's state variables and must be of length
- * <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
- * is the maximum number of delay line values.
- * <code>blockSize</code> is the
- * number of samples processed by the <code>arm_fir_sparse_q7()</code> function.
+ @brief Initialization function for the Q7 sparse FIR filter.
+ @param[in,out] S points to an instance of the Q7 sparse FIR structure
+ @param[in] numTaps number of nonzero coefficients in the filter
+ @param[in] pCoeffs points to the array of filter coefficients
+ @param[in] pState points to the state buffer
+ @param[in] pTapDelay points to the array of offset times
+ @param[in] maxDelay maximum offset time supported
+ @param[in] blockSize number of samples that will be processed per block
+ @return none
+
+ @par Details
+ <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
+ <code>pState</code> holds the filter's state variables and must be of length
+ <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
+ is the maximum number of delay line values.
+ <code>blockSize</code> is the
+ number of samples processed by the <code>arm_fir_sparse_q7()</code> function.
*/
void arm_fir_sparse_init_q7(
- arm_fir_sparse_instance_q7 * S,
- uint16_t numTaps,
- q7_t * pCoeffs,
- q7_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize)
+ arm_fir_sparse_instance_q7 * S,
+ uint16_t numTaps,
+ const q7_t * pCoeffs,
+ q7_t * pState,
+ int32_t * pTapDelay,
+ uint16_t maxDelay,
+ uint32_t blockSize)
{
/* Assign filter taps */
S->numTaps = numTaps;
@@ -87,9 +86,8 @@
/* Assign state pointer */
S->pState = pState;
-
}
/**
- * @} end of FIR_Sparse group
+ @} end of FIR_Sparse group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c
index e17f2bd..e1439ca 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c
@@ -3,13 +3,13 @@
* Title: arm_fir_sparse_q15.c
* Description: Q15 sparse FIR filter processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,72 +29,68 @@
#include "arm_math.h"
/**
- * @addtogroup FIR_Sparse
- * @{
+ @ingroup groupFilters
*/
/**
- * @brief Processing function for the Q15 sparse FIR filter.
- * @param[in] *S points to an instance of the Q15 sparse FIR structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] *pScratchIn points to a temporary buffer of size blockSize.
- * @param[in] *pScratchOut points to a temporary buffer of size blockSize.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator.
- * Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator.
- * If the accumulator result overflows it will wrap around rather than saturate.
- * After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format.
- * In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
+ @addtogroup FIR_Sparse
+ @{
*/
+/**
+ @brief Processing function for the Q15 sparse FIR filter.
+ @param[in] S points to an instance of the Q15 sparse FIR structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] pScratchIn points to a temporary buffer of size blockSize
+ @param[in] pScratchOut points to a temporary buffer of size blockSize
+ @param[in] blockSize number of input samples to process per call
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 32-bit accumulator.
+ The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator.
+ Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator.
+ If the accumulator result overflows it will wrap around rather than saturate.
+ After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format.
+ In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
+ */
void arm_fir_sparse_q15(
- arm_fir_sparse_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- q15_t * pScratchIn,
- q31_t * pScratchOut,
- uint32_t blockSize)
+ arm_fir_sparse_instance_q15 * S,
+ const q15_t * pSrc,
+ q15_t * pDst,
+ q15_t * pScratchIn,
+ q31_t * pScratchOut,
+ uint32_t blockSize)
{
+ q15_t *pState = S->pState; /* State pointer */
+ const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *px; /* Temporary pointers for scratch buffer */
+ q15_t *py = pState; /* Temporary pointers for state buffer */
+ q15_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
+ q15_t *pOut = pDst; /* Working pointer for output */
+ int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
+ uint32_t delaySize = S->maxDelay + blockSize; /* state length */
+ uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ int32_t readIndex; /* Read index of the state buffer */
+ uint32_t tapCnt, blkCnt; /* loop counters */
+ q31_t *pScr2 = pScratchOut; /* Working pointer for scratch buffer of output values */
+ q15_t coeff = *pCoeffs++; /* Read the first coefficient value */
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pIn = pSrc; /* Working pointer for input */
- q15_t *pOut = pDst; /* Working pointer for output */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *px; /* Temporary pointers for scratch buffer */
- q15_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
- q15_t *py = pState; /* Temporary pointers for state buffer */
- int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
- uint32_t delaySize = S->maxDelay + blockSize; /* state length */
- uint16_t numTaps = S->numTaps; /* Filter order */
- int32_t readIndex; /* Read index of the state buffer */
- uint32_t tapCnt, blkCnt; /* loop counters */
- q15_t coeff = *pCoeffs++; /* Read the first coefficient value */
- q31_t *pScr2 = pScratchOut; /* Working pointer for pScratchOut */
-
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q31_t in1, in2; /* Temporary variables */
-
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t in1, in2; /* Temporary variables */
+#endif
/* BlockSize of Input samples are copied into the state buffer */
/* StateIndex points to the starting position to write in the state buffer */
- arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
+ arm_circularWrite_q15(py, (int32_t) delaySize, &S->stateIndex, 1,pSrc, 1, blockSize);
/* Loop over the number of taps. */
tapCnt = numTaps;
/* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
+ readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
@@ -106,8 +102,8 @@
py = pState;
/* blockSize samples are read from the state buffer */
- arm_circularRead_q15(py, delaySize, &readIndex, 1,
- pb, pb, blockSize, 1, blockSize);
+ arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
+ pb, pb, (int32_t) blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
@@ -115,32 +111,40 @@
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
- /* Loop over the blockSize. Unroll by a factor of 4.
- * Compute 4 multiplications at a time. */
- blkCnt = blockSize >> 2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time. */
+ blkCnt = blockSize >> 2U;
while (blkCnt > 0U)
{
/* Perform multiplication and store in the scratch buffer */
- *pScratchOut++ = ((q31_t) * px++ * coeff);
- *pScratchOut++ = ((q31_t) * px++ * coeff);
- *pScratchOut++ = ((q31_t) * px++ * coeff);
- *pScratchOut++ = ((q31_t) * px++ * coeff);
+ *pScratchOut++ = ((q31_t) *px++ * coeff);
+ *pScratchOut++ = ((q31_t) *px++ * coeff);
+ *pScratchOut++ = ((q31_t) *px++ * coeff);
+ *pScratchOut++ = ((q31_t) *px++ * coeff);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4,
- * compute the remaining samples */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
- /* Perform multiplication and store in the scratch buffer */
- *pScratchOut++ = ((q31_t) * px++ * coeff);
+ /* Perform Multiplication and store in the scratch buffer */
+ *pScratchOut++ = ((q31_t) *px++ * coeff);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -149,7 +153,7 @@
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
+ readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
@@ -166,8 +170,8 @@
py = pState;
/* blockSize samples are read from the state buffer */
- arm_circularRead_q15(py, delaySize, &readIndex, 1,
- pb, pb, blockSize, 1, blockSize);
+ arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
+ pb, pb, (int32_t) blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
@@ -175,32 +179,40 @@
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
- /* Loop over the blockSize. Unroll by a factor of 4.
- * Compute 4 MACS at a time. */
- blkCnt = blockSize >> 2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time. */
+ blkCnt = blockSize >> 2U;
while (blkCnt > 0U)
{
/* Perform Multiply-Accumulate */
- *pScratchOut++ += (q31_t) * px++ * coeff;
- *pScratchOut++ += (q31_t) * px++ * coeff;
- *pScratchOut++ += (q31_t) * px++ * coeff;
- *pScratchOut++ += (q31_t) * px++ * coeff;
+ *pScratchOut++ += (q31_t) *px++ * coeff;
+ *pScratchOut++ += (q31_t) *px++ * coeff;
+ *pScratchOut++ += (q31_t) *px++ * coeff;
+ *pScratchOut++ += (q31_t) *px++ * coeff;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4,
- * compute the remaining samples */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Perform Multiply-Accumulate */
- *pScratchOut++ += (q31_t) * px++ * coeff;
+ *pScratchOut++ += (q31_t) *px++ * coeff;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -209,7 +221,7 @@
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
+ readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
@@ -217,136 +229,18 @@
readIndex += (int32_t) delaySize;
}
- /* Decrement the tap loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* Compute last tap without the final read of pTapDelay */
-
- /* Working pointer for state buffer is updated */
- py = pState;
-
- /* blockSize samples are read from the state buffer */
- arm_circularRead_q15(py, delaySize, &readIndex, 1,
- pb, pb, blockSize, 1, blockSize);
-
- /* Working pointer for the scratch buffer of state values */
- px = pb;
-
- /* Working pointer for scratch buffer of output values */
- pScratchOut = pScr2;
-
- /* Loop over the blockSize. Unroll by a factor of 4.
- * Compute 4 MACS at a time. */
- blkCnt = blockSize >> 2;
-
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- *pScratchOut++ += (q31_t) * px++ * coeff;
- *pScratchOut++ += (q31_t) * px++ * coeff;
- *pScratchOut++ += (q31_t) * px++ * coeff;
- *pScratchOut++ += (q31_t) * px++ * coeff;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4,
- * compute the remaining samples */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- *pScratchOut++ += (q31_t) * px++ * coeff;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* All the output values are in pScratchOut buffer.
- Convert them into 1.15 format, saturate and store in the destination buffer. */
- /* Loop over the blockSize. */
- blkCnt = blockSize >> 2;
-
- while (blkCnt > 0U)
- {
- in1 = *pScr2++;
- in2 = *pScr2++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pOut)++ =
- __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
- 16);
-
-#else
- *__SIMD32(pOut)++ =
- __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
- 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- in1 = *pScr2++;
-
- in2 = *pScr2++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pOut)++ =
- __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
- 16);
-
-#else
-
- *__SIMD32(pOut)++ =
- __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
- 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-
- blkCnt--;
-
- }
-
- /* If the blockSize is not a multiple of 4,
- remaining samples are processed in the below loop */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* BlockSize of Input samples are copied into the state buffer */
- /* StateIndex points to the starting position to write in the state buffer */
- arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
-
- /* Loop over the number of taps. */
- tapCnt = numTaps;
-
- /* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
- /* Wraparound of readIndex */
- if (readIndex < 0)
- {
- readIndex += (int32_t) delaySize;
- }
+ /* Compute last tap without the final read of pTapDelay */
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
- arm_circularRead_q15(py, delaySize, &readIndex, 1,
- pb, pb, blockSize, 1, blockSize);
+ arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
+ pb, pb, (int32_t) blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
@@ -354,117 +248,94 @@
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
- blkCnt = blockSize;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time. */
+ blkCnt = blockSize >> 2U;
while (blkCnt > 0U)
{
- /* Perform multiplication and store in the scratch buffer */
- *pScratchOut++ = ((q31_t) * px++ * coeff);
+ /* Perform Multiply-Accumulate */
+ *pScratchOut++ += (q31_t) *px++ * coeff;
+ *pScratchOut++ += (q31_t) *px++ * coeff;
+ *pScratchOut++ += (q31_t) *px++ * coeff;
+ *pScratchOut++ += (q31_t) *px++ * coeff;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* Load the coefficient value and
- * increment the coefficient buffer for the next set of state values */
- coeff = *pCoeffs++;
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
- /* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
+#else
- /* Wraparound of readIndex */
- if (readIndex < 0)
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
{
- readIndex += (int32_t) delaySize;
+ /* Perform Multiply-Accumulate */
+ *pScratchOut++ += (q31_t) *px++ * coeff;
+
+ /* Decrement loop counter */
+ blkCnt--;
}
- /* Loop over the number of taps. */
- tapCnt = (uint32_t) numTaps - 2U;
-
- while (tapCnt > 0U)
- {
- /* Working pointer for state buffer is updated */
- py = pState;
-
- /* blockSize samples are read from the state buffer */
- arm_circularRead_q15(py, delaySize, &readIndex, 1,
- pb, pb, blockSize, 1, blockSize);
-
- /* Working pointer for the scratch buffer of state values */
- px = pb;
-
- /* Working pointer for scratch buffer of output values */
- pScratchOut = pScr2;
-
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- *pScratchOut++ += (q31_t) * px++ * coeff;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Load the coefficient value and
- * increment the coefficient buffer for the next set of state values */
- coeff = *pCoeffs++;
-
- /* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
- /* Wraparound of readIndex */
- if (readIndex < 0)
- {
- readIndex += (int32_t) delaySize;
- }
-
- /* Decrement the tap loop counter */
- tapCnt--;
- }
-
- /* Compute last tap without the final read of pTapDelay */
-
- /* Working pointer for state buffer is updated */
- py = pState;
-
- /* blockSize samples are read from the state buffer */
- arm_circularRead_q15(py, delaySize, &readIndex, 1,
- pb, pb, blockSize, 1, blockSize);
-
- /* Working pointer for the scratch buffer of state values */
- px = pb;
-
- /* Working pointer for scratch buffer of output values */
- pScratchOut = pScr2;
-
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- *pScratchOut++ += (q31_t) * px++ * coeff;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
/* All the output values are in pScratchOut buffer.
Convert them into 1.15 format, saturate and store in the destination buffer. */
- /* Loop over the blockSize. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time. */
+ blkCnt = blockSize >> 2U;
+
+ while (blkCnt > 0U)
+ {
+ in1 = *pScr2++;
+ in2 = *pScr2++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+ write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), 16));
+#else
+ write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+ in1 = *pScr2++;
+ in2 = *pScr2++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+ write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), 16));
+#else
+ write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
*pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of FIR_Sparse group
+ @} end of FIR_Sparse group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c
index e441716..334b096 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c
@@ -3,13 +3,13 @@
* Title: arm_fir_sparse_q31.c
* Description: Q31 sparse FIR filter processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -28,52 +28,53 @@
#include "arm_math.h"
-
/**
- * @addtogroup FIR_Sparse
- * @{
+ @ingroup groupFilters
*/
/**
- * @brief Processing function for the Q31 sparse FIR filter.
- * @param[in] *S points to an instance of the Q31 sparse FIR structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] *pScratchIn points to a temporary buffer of size blockSize.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The 1.31 x 1.31 multiplications are truncated to 2.30 format.
- * This leads to loss of precision on the intermediate multiplications and provides only a single guard bit.
- * If the accumulator result overflows, it wraps around rather than saturate.
- * In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
+ @addtogroup FIR_Sparse
+ @{
+ */
+
+/**
+ @brief Processing function for the Q31 sparse FIR filter.
+ @param[in] S points to an instance of the Q31 sparse FIR structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] pScratchIn points to a temporary buffer of size blockSize
+ @param[in] blockSize number of input samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 32-bit accumulator.
+ The 1.31 x 1.31 multiplications are truncated to 2.30 format.
+ This leads to loss of precision on the intermediate multiplications and provides only a single guard bit.
+ If the accumulator result overflows, it wraps around rather than saturate.
+ In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
*/
void arm_fir_sparse_q31(
- arm_fir_sparse_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- q31_t * pScratchIn,
- uint32_t blockSize)
+ arm_fir_sparse_instance_q31 * S,
+ const q31_t * pSrc,
+ q31_t * pDst,
+ q31_t * pScratchIn,
+ uint32_t blockSize)
{
-
- q31_t *pState = S->pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *px; /* Scratch buffer pointer */
- q31_t *py = pState; /* Temporary pointers for state buffer */
- q31_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
- q31_t *pOut; /* Destination pointer */
- q63_t out; /* Temporary output variable */
- int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
- uint32_t delaySize = S->maxDelay + blockSize; /* state length */
- uint16_t numTaps = S->numTaps; /* Filter order */
- int32_t readIndex; /* Read index of the state buffer */
- uint32_t tapCnt, blkCnt; /* loop counters */
- q31_t coeff = *pCoeffs++; /* Read the first coefficient value */
- q31_t in;
+ q31_t *pState = S->pState; /* State pointer */
+ const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *px; /* Scratch buffer pointer */
+ q31_t *py = pState; /* Temporary pointers for state buffer */
+ q31_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
+ q31_t *pOut; /* Destination pointer */
+ int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
+ uint32_t delaySize = S->maxDelay + blockSize; /* state length */
+ uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ int32_t readIndex; /* Read index of the state buffer */
+ uint32_t tapCnt, blkCnt; /* loop counters */
+ q31_t coeff = *pCoeffs++; /* Read the first coefficient value */
+ q31_t in;
+ q63_t out; /* Temporary output variable */
/* BlockSize of Input samples are copied into the state buffer */
@@ -95,8 +96,7 @@
/* blockSize samples are read from the state buffer */
arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
- (int32_t *) pb, (int32_t *) pb, blockSize, 1,
- blockSize);
+ (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
@@ -105,233 +105,42 @@
pOut = pDst;
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /* Loop over the blockSize. Unroll by a factor of 4.
- * Compute 4 Multiplications at a time. */
- blkCnt = blockSize >> 2;
+ /* Loop unrolling: Compute 4 outputs at a time. */
+ blkCnt = blockSize >> 2U;
while (blkCnt > 0U)
{
- /* Perform Multiplications and store in the destination buffer */
- *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
- *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
- *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
- *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
+ /* Perform Multiplications and store in destination buffer */
+ *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
- /* Decrement the loop counter */
+ *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+ *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+ *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4,
- * compute the remaining samples */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* Perform Multiplications and store in the destination buffer */
- *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Load the coefficient value and
- * increment the coefficient buffer for the next set of state values */
- coeff = *pCoeffs++;
-
- /* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
- /* Wraparound of readIndex */
- if (readIndex < 0)
- {
- readIndex += (int32_t) delaySize;
- }
-
- /* Loop over the number of taps. */
- tapCnt = (uint32_t) numTaps - 2U;
-
- while (tapCnt > 0U)
- {
- /* Working pointer for state buffer is updated */
- py = pState;
-
- /* blockSize samples are read from the state buffer */
- arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
- (int32_t *) pb, (int32_t *) pb, blockSize, 1,
- blockSize);
-
- /* Working pointer for the scratch buffer of state values */
- px = pb;
-
- /* Working pointer for scratch buffer of output values */
- pOut = pDst;
-
- /* Loop over the blockSize. Unroll by a factor of 4.
- * Compute 4 MACS at a time. */
- blkCnt = blockSize >> 2;
-
- while (blkCnt > 0U)
- {
- out = *pOut;
- out += ((q63_t) * px++ * coeff) >> 32;
- *pOut++ = (q31_t) (out);
-
- out = *pOut;
- out += ((q63_t) * px++ * coeff) >> 32;
- *pOut++ = (q31_t) (out);
-
- out = *pOut;
- out += ((q63_t) * px++ * coeff) >> 32;
- *pOut++ = (q31_t) (out);
-
- out = *pOut;
- out += ((q63_t) * px++ * coeff) >> 32;
- *pOut++ = (q31_t) (out);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4,
- * compute the remaining samples */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- out = *pOut;
- out += ((q63_t) * px++ * coeff) >> 32;
- *pOut++ = (q31_t) (out);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Load the coefficient value and
- * increment the coefficient buffer for the next set of state values */
- coeff = *pCoeffs++;
-
- /* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
- /* Wraparound of readIndex */
- if (readIndex < 0)
- {
- readIndex += (int32_t) delaySize;
- }
-
- /* Decrement the tap loop counter */
- tapCnt--;
- }
-
- /* Compute last tap without the final read of pTapDelay */
-
- /* Working pointer for state buffer is updated */
- py = pState;
-
- /* blockSize samples are read from the state buffer */
- arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
- (int32_t *) pb, (int32_t *) pb, blockSize, 1,
- blockSize);
-
- /* Working pointer for the scratch buffer of state values */
- px = pb;
-
- /* Working pointer for scratch buffer of output values */
- pOut = pDst;
-
- /* Loop over the blockSize. Unroll by a factor of 4.
- * Compute 4 MACS at a time. */
- blkCnt = blockSize >> 2;
-
- while (blkCnt > 0U)
- {
- out = *pOut;
- out += ((q63_t) * px++ * coeff) >> 32;
- *pOut++ = (q31_t) (out);
-
- out = *pOut;
- out += ((q63_t) * px++ * coeff) >> 32;
- *pOut++ = (q31_t) (out);
-
- out = *pOut;
- out += ((q63_t) * px++ * coeff) >> 32;
- *pOut++ = (q31_t) (out);
-
- out = *pOut;
- out += ((q63_t) * px++ * coeff) >> 32;
- *pOut++ = (q31_t) (out);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4,
- * compute the remaining samples */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- out = *pOut;
- out += ((q63_t) * px++ * coeff) >> 32;
- *pOut++ = (q31_t) (out);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Working output pointer is updated */
- pOut = pDst;
-
- /* Output is converted into 1.31 format. */
- /* Loop over the blockSize. Unroll by a factor of 4.
- * process 4 output samples at a time. */
- blkCnt = blockSize >> 2;
-
- while (blkCnt > 0U)
- {
- in = *pOut << 1;
- *pOut++ = in;
- in = *pOut << 1;
- *pOut++ = in;
- in = *pOut << 1;
- *pOut++ = in;
- in = *pOut << 1;
- *pOut++ = in;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4,
- * process the remaining output samples */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- in = *pOut << 1;
- *pOut++ = in;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
- /* Perform Multiplications and store in the destination buffer */
- *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
+ /* Perform Multiplication and store in destination buffer */
+ *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -358,8 +167,7 @@
/* blockSize samples are read from the state buffer */
arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
- (int32_t *) pb, (int32_t *) pb, blockSize, 1,
- blockSize);
+ (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
@@ -367,16 +175,53 @@
/* Working pointer for scratch buffer of output values */
pOut = pDst;
- blkCnt = blockSize;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time. */
+ blkCnt = blockSize >> 2U;
while (blkCnt > 0U)
{
/* Perform Multiply-Accumulate */
out = *pOut;
- out += ((q63_t) * px++ * coeff) >> 32;
+ out += ((q63_t) *px++ * coeff) >> 32;
*pOut++ = (q31_t) (out);
- /* Decrement the loop counter */
+ out = *pOut;
+ out += ((q63_t) *px++ * coeff) >> 32;
+ *pOut++ = (q31_t) (out);
+
+ out = *pOut;
+ out += ((q63_t) *px++ * coeff) >> 32;
+ *pOut++ = (q31_t) (out);
+
+ out = *pOut;
+ out += ((q63_t) *px++ * coeff) >> 32;
+ *pOut++ = (q31_t) (out);
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* Perform Multiply-Accumulate */
+ out = *pOut;
+ out += ((q63_t) *px++ * coeff) >> 32;
+ *pOut++ = (q31_t) (out);
+
+ /* Decrement loop counter */
blkCnt--;
}
@@ -393,58 +238,120 @@
readIndex += (int32_t) delaySize;
}
- /* Decrement the tap loop counter */
+ /* Decrement tap loop counter */
tapCnt--;
}
- /* Compute last tap without the final read of pTapDelay */
+ /* Compute last tap without the final read of pTapDelay */
- /* Working pointer for state buffer is updated */
- py = pState;
+ /* Working pointer for state buffer is updated */
+ py = pState;
- /* blockSize samples are read from the state buffer */
- arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
- (int32_t *) pb, (int32_t *) pb, blockSize, 1,
- blockSize);
+ /* blockSize samples are read from the state buffer */
+ arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+ (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
- /* Working pointer for the scratch buffer of state values */
- px = pb;
+ /* Working pointer for the scratch buffer of state values */
+ px = pb;
- /* Working pointer for scratch buffer of output values */
- pOut = pDst;
+ /* Working pointer for scratch buffer of output values */
+ pOut = pDst;
- blkCnt = blockSize;
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- out = *pOut;
- out += ((q63_t) * px++ * coeff) >> 32;
- *pOut++ = (q31_t) (out);
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Decrement the loop counter */
- blkCnt--;
- }
+ /* Loop unrolling: Compute 4 outputs at a time. */
+ blkCnt = blockSize >> 2U;
+
+ while (blkCnt > 0U)
+ {
+ /* Perform Multiply-Accumulate */
+ out = *pOut;
+ out += ((q63_t) * px++ * coeff) >> 32;
+ *pOut++ = (q31_t) (out);
+
+ out = *pOut;
+ out += ((q63_t) * px++ * coeff) >> 32;
+ *pOut++ = (q31_t) (out);
+
+ out = *pOut;
+ out += ((q63_t) * px++ * coeff) >> 32;
+ *pOut++ = (q31_t) (out);
+
+ out = *pOut;
+ out += ((q63_t) * px++ * coeff) >> 32;
+ *pOut++ = (q31_t) (out);
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* Perform Multiply-Accumulate */
+ out = *pOut;
+ out += ((q63_t) *px++ * coeff) >> 32;
+ *pOut++ = (q31_t) (out);
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
/* Working output pointer is updated */
pOut = pDst;
/* Output is converted into 1.31 format. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time. */
+ blkCnt = blockSize >> 2U;
+
+ while (blkCnt > 0U)
+ {
+ in = *pOut << 1;
+ *pOut++ = in;
+ in = *pOut << 1;
+ *pOut++ = in;
+ in = *pOut << 1;
+ *pOut++ = in;
+ in = *pOut << 1;
+ *pOut++ = in;
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
in = *pOut << 1;
*pOut++ = in;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of FIR_Sparse group
+ @} end of FIR_Sparse group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c
index c1b4ce3..31b118e 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c
@@ -3,13 +3,13 @@
* Title: arm_fir_sparse_q7.c
* Description: Q7 sparse FIR filter processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -28,78 +28,70 @@
#include "arm_math.h"
-
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup FIR_Sparse
- * @{
+ @addtogroup FIR_Sparse
+ @{
*/
-
/**
- * @brief Processing function for the Q7 sparse FIR filter.
- * @param[in] *S points to an instance of the Q7 sparse FIR structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] *pScratchIn points to a temporary buffer of size blockSize.
- * @param[in] *pScratchOut points to a temporary buffer of size blockSize.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * The accumulator is then converted to 18.7 format by discarding the low 7 bits.
- * Finally, the result is truncated to 1.7 format.
+ @brief Processing function for the Q7 sparse FIR filter.
+ @param[in] S points to an instance of the Q7 sparse FIR structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] pScratchIn points to a temporary buffer of size blockSize
+ @param[in] pScratchOut points to a temporary buffer of size blockSize
+ @param[in] blockSize number of input samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 32-bit internal accumulator.
+ Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
+ The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+ There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+ The accumulator is then converted to 18.7 format by discarding the low 7 bits.
+ Finally, the result is truncated to 1.7 format.
*/
void arm_fir_sparse_q7(
- arm_fir_sparse_instance_q7 * S,
- q7_t * pSrc,
- q7_t * pDst,
- q7_t * pScratchIn,
- q31_t * pScratchOut,
- uint32_t blockSize)
+ arm_fir_sparse_instance_q7 * S,
+ const q7_t * pSrc,
+ q7_t * pDst,
+ q7_t * pScratchIn,
+ q31_t * pScratchOut,
+ uint32_t blockSize)
{
+ q7_t *pState = S->pState; /* State pointer */
+ const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q7_t *px; /* Scratch buffer pointer */
+ q7_t *py = pState; /* Temporary pointers for state buffer */
+ q7_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
+ q7_t *pOut = pDst; /* Destination pointer */
+ int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
+ uint32_t delaySize = S->maxDelay + blockSize; /* state length */
+ uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ int32_t readIndex; /* Read index of the state buffer */
+ uint32_t tapCnt, blkCnt; /* loop counters */
+ q31_t *pScr2 = pScratchOut; /* Working pointer for scratch buffer of output values */
+ q31_t in;
+ q7_t coeff = *pCoeffs++; /* Read the coefficient value */
- q7_t *pState = S->pState; /* State pointer */
- q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q7_t *px; /* Scratch buffer pointer */
- q7_t *py = pState; /* Temporary pointers for state buffer */
- q7_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
- q7_t *pOut = pDst; /* Destination pointer */
- int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
- uint32_t delaySize = S->maxDelay + blockSize; /* state length */
- uint16_t numTaps = S->numTaps; /* Filter order */
- int32_t readIndex; /* Read index of the state buffer */
- uint32_t tapCnt, blkCnt; /* loop counters */
- q7_t coeff = *pCoeffs++; /* Read the coefficient value */
- q31_t *pScr2 = pScratchOut; /* Working pointer for scratch buffer of output values */
- q31_t in;
-
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q7_t in1, in2, in3, in4;
+#if defined (ARM_MATH_LOOPUNROLL)
+ q7_t in1, in2, in3, in4;
+#endif
/* BlockSize of Input samples are copied into the state buffer */
/* StateIndex points to the starting position to write in the state buffer */
- arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
- blockSize);
+ arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1, blockSize);
/* Loop over the number of taps. */
tapCnt = numTaps;
/* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
+ readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
@@ -111,8 +103,8 @@
py = pState;
/* blockSize samples are read from the state buffer */
- arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
- (int32_t) blockSize, 1, blockSize);
+ arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
+ pb, pb, (int32_t) blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
@@ -120,32 +112,40 @@
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
- /* Loop over the blockSize. Unroll by a factor of 4.
- * Compute 4 multiplications at a time. */
- blkCnt = blockSize >> 2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time. */
+ blkCnt = blockSize >> 2U;
while (blkCnt > 0U)
{
/* Perform multiplication and store in the scratch buffer */
- *pScratchOut++ = ((q31_t) * px++ * coeff);
- *pScratchOut++ = ((q31_t) * px++ * coeff);
- *pScratchOut++ = ((q31_t) * px++ * coeff);
- *pScratchOut++ = ((q31_t) * px++ * coeff);
+ *pScratchOut++ = ((q31_t) *px++ * coeff);
+ *pScratchOut++ = ((q31_t) *px++ * coeff);
+ *pScratchOut++ = ((q31_t) *px++ * coeff);
+ *pScratchOut++ = ((q31_t) *px++ * coeff);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4,
- * compute the remaining samples */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
- /* Perform multiplication and store in the scratch buffer */
- *pScratchOut++ = ((q31_t) * px++ * coeff);
+ /* Perform Multiplication and store in the scratch buffer */
+ *pScratchOut++ = ((q31_t) *px++ * coeff);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -154,7 +154,7 @@
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
+ readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
@@ -171,8 +171,8 @@
py = pState;
/* blockSize samples are read from the state buffer */
- arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
- (int32_t) blockSize, 1, blockSize);
+ arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
+ pb, pb, (int32_t) blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
@@ -180,9 +180,11 @@
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
- /* Loop over the blockSize. Unroll by a factor of 4.
- * Compute 4 MACS at a time. */
- blkCnt = blockSize >> 2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time. */
+ blkCnt = blockSize >> 2U;
while (blkCnt > 0U)
{
@@ -196,21 +198,27 @@
in = *pScratchOut + ((q31_t) * px++ * coeff);
*pScratchOut++ = in;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4,
- * compute the remaining samples */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* Perform Multiply-Accumulate */
- in = *pScratchOut + ((q31_t) * px++ * coeff);
+ in = *pScratchOut + ((q31_t) *px++ * coeff);
*pScratchOut++ = in;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -219,8 +227,7 @@
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = ((int32_t) S->stateIndex -
- (int32_t) blockSize) - *pTapDelay++;
+ readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
@@ -228,63 +235,73 @@
readIndex += (int32_t) delaySize;
}
- /* Decrement the tap loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* Compute last tap without the final read of pTapDelay */
+ /* Compute last tap without the final read of pTapDelay */
- /* Working pointer for state buffer is updated */
- py = pState;
+ /* Working pointer for state buffer is updated */
+ py = pState;
- /* blockSize samples are read from the state buffer */
- arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
- (int32_t) blockSize, 1, blockSize);
+ /* blockSize samples are read from the state buffer */
+ arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
+ pb, pb, (int32_t) blockSize, 1, blockSize);
- /* Working pointer for the scratch buffer of state values */
- px = pb;
+ /* Working pointer for the scratch buffer of state values */
+ px = pb;
- /* Working pointer for scratch buffer of output values */
- pScratchOut = pScr2;
+ /* Working pointer for scratch buffer of output values */
+ pScratchOut = pScr2;
- /* Loop over the blockSize. Unroll by a factor of 4.
- * Compute 4 MACS at a time. */
- blkCnt = blockSize >> 2;
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- in = *pScratchOut + ((q31_t) * px++ * coeff);
- *pScratchOut++ = in;
- in = *pScratchOut + ((q31_t) * px++ * coeff);
- *pScratchOut++ = in;
- in = *pScratchOut + ((q31_t) * px++ * coeff);
- *pScratchOut++ = in;
- in = *pScratchOut + ((q31_t) * px++ * coeff);
- *pScratchOut++ = in;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Decrement the loop counter */
- blkCnt--;
- }
+ /* Loop unrolling: Compute 4 outputs at a time. */
+ blkCnt = blockSize >> 2U;
- /* If the blockSize is not a multiple of 4,
- * compute the remaining samples */
- blkCnt = blockSize % 0x4U;
+ while (blkCnt > 0U)
+ {
+ /* Perform Multiply-Accumulate */
+ in = *pScratchOut + ((q31_t) *px++ * coeff);
+ *pScratchOut++ = in;
+ in = *pScratchOut + ((q31_t) *px++ * coeff);
+ *pScratchOut++ = in;
+ in = *pScratchOut + ((q31_t) *px++ * coeff);
+ *pScratchOut++ = in;
+ in = *pScratchOut + ((q31_t) *px++ * coeff);
+ *pScratchOut++ = in;
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- in = *pScratchOut + ((q31_t) * px++ * coeff);
- *pScratchOut++ = in;
+ /* Decrement loop counter */
+ blkCnt--;
+ }
- /* Decrement the loop counter */
- blkCnt--;
- }
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* Perform Multiply-Accumulate */
+ in = *pScratchOut + ((q31_t) *px++ * coeff);
+ *pScratchOut++ = in;
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
/* All the output values are in pScratchOut buffer.
Convert them into 1.15 format, saturate and store in the destination buffer. */
- /* Loop over the blockSize. */
- blkCnt = blockSize >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time. */
+ blkCnt = blockSize >> 2U;
while (blkCnt > 0U)
{
@@ -293,177 +310,32 @@
in3 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
in4 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
- *__SIMD32(pOut)++ = __PACKq7(in1, in2, in3, in4);
+ write_q7x4_ia (&pOut, __PACKq7(in1, in2, in3, in4));
- /* Decrement the blockSize loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4,
- remaining samples are processed in the below loop */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
- /* BlockSize of Input samples are copied into the state buffer */
- /* StateIndex points to the starting position to write in the state buffer */
- arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
- blockSize);
-
- /* Loop over the number of taps. */
- tapCnt = numTaps;
-
- /* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
- /* Wraparound of readIndex */
- if (readIndex < 0)
- {
- readIndex += (int32_t) delaySize;
- }
-
- /* Working pointer for state buffer is updated */
- py = pState;
-
- /* blockSize samples are read from the state buffer */
- arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
- (int32_t) blockSize, 1, blockSize);
-
- /* Working pointer for the scratch buffer of state values */
- px = pb;
-
- /* Working pointer for scratch buffer of output values */
- pScratchOut = pScr2;
-
- /* Loop over the blockSize */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
- while (blkCnt > 0U)
- {
- /* Perform multiplication and store in the scratch buffer */
- *pScratchOut++ = ((q31_t) * px++ * coeff);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Load the coefficient value and
- * increment the coefficient buffer for the next set of state values */
- coeff = *pCoeffs++;
-
- /* Read Index, from where the state buffer should be read, is calculated. */
- readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
- /* Wraparound of readIndex */
- if (readIndex < 0)
- {
- readIndex += (int32_t) delaySize;
- }
-
- /* Loop over the number of taps. */
- tapCnt = (uint32_t) numTaps - 2U;
-
- while (tapCnt > 0U)
- {
- /* Working pointer for state buffer is updated */
- py = pState;
-
- /* blockSize samples are read from the state buffer */
- arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
- (int32_t) blockSize, 1, blockSize);
-
- /* Working pointer for the scratch buffer of state values */
- px = pb;
-
- /* Working pointer for scratch buffer of output values */
- pScratchOut = pScr2;
-
- /* Loop over the blockSize */
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- in = *pScratchOut + ((q31_t) * px++ * coeff);
- *pScratchOut++ = in;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Load the coefficient value and
- * increment the coefficient buffer for the next set of state values */
- coeff = *pCoeffs++;
-
- /* Read Index, from where the state buffer should be read, is calculated. */
- readIndex =
- ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
- /* Wraparound of readIndex */
- if (readIndex < 0)
- {
- readIndex += (int32_t) delaySize;
- }
-
- /* Decrement the tap loop counter */
- tapCnt--;
- }
-
- /* Compute last tap without the final read of pTapDelay */
-
- /* Working pointer for state buffer is updated */
- py = pState;
-
- /* blockSize samples are read from the state buffer */
- arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
- (int32_t) blockSize, 1, blockSize);
-
- /* Working pointer for the scratch buffer of state values */
- px = pb;
-
- /* Working pointer for scratch buffer of output values */
- pScratchOut = pScr2;
-
- /* Loop over the blockSize */
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
- /* Perform Multiply-Accumulate */
- in = *pScratchOut + ((q31_t) * px++ * coeff);
- *pScratchOut++ = in;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* All the output values are in pScratchOut buffer.
- Convert them into 1.15 format, saturate and store in the destination buffer. */
- /* Loop over the blockSize. */
- blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
*pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
- /* Decrement the blockSize loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of FIR_Sparse group
+ @} end of FIR_Sparse group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c
index 424be38..6e57083 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c
@@ -3,13 +3,13 @@
* Title: arm_iir_lattice_f32.c
* Description: Floating-point IIR Lattice filter processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,120 +29,118 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters
- *
- * This set of functions implements lattice filters
- * for Q15, Q31 and floating-point data types. Lattice filters are used in a
- * variety of adaptive filter applications. The filter structure has feedforward and
- * feedback components and the net impulse response is infinite length.
- * The functions operate on blocks
- * of input and output data and each call to the function processes
- * <code>blockSize</code> samples through the filter. <code>pSrc</code> and
- * <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
+ @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters
- * \par Algorithm:
- * \image html IIRLattice.gif "Infinite Impulse Response Lattice filter"
- * <pre>
- * fN(n) = x(n)
- * fm-1(n) = fm(n) - km * gm-1(n-1) for m = N, N-1, ...1
- * gm(n) = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ...1
- * y(n) = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)
- * </pre>
- * \par
- * <code>pkCoeffs</code> points to array of reflection coefficients of size <code>numStages</code>.
- * Reflection coefficients are stored in time-reversed order.
- * \par
- * <pre>
- * {kN, kN-1, ....k1}
- * </pre>
- * <code>pvCoeffs</code> points to the array of ladder coefficients of size <code>(numStages+1)</code>.
- * Ladder coefficients are stored in time-reversed order.
- * \par
- * <pre>
- * {vN, vN-1, ...v0}
- * </pre>
- * <code>pState</code> points to a state array of size <code>numStages + blockSize</code>.
- * The state variables shown in the figure above (the g values) are stored in the <code>pState</code> array.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter.
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
- * <pre>
- *arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};
- *arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};
- *arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};
- * </pre>
- * \par
- * where <code>numStages</code> is the number of stages in the filter; <code>pState</code> points to the state buffer array;
- * <code>pkCoeffs</code> points to array of the reflection coefficients; <code>pvCoeffs</code> points to the array of ladder coefficients.
- * \par Fixed-Point Behavior
- * Care must be taken when using the fixed-point versions of the IIR lattice filter functions.
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
- * Refer to the function specific documentation below for usage guidelines.
+ This set of functions implements lattice filters
+ for Q15, Q31 and floating-point data types. Lattice filters are used in a
+ variety of adaptive filter applications. The filter structure has feedforward and
+ feedback components and the net impulse response is infinite length.
+ The functions operate on blocks
+ of input and output data and each call to the function processes
+ <code>blockSize</code> samples through the filter. <code>pSrc</code> and
+ <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
+
+ @par Algorithm
+ \image html IIRLattice.gif "Infinite Impulse Response Lattice filter"
+ @par
+ <pre>
+ fN(n) = x(n)
+ fm-1(n) = fm(n) - km * gm-1(n-1) for m = N, N-1, ..., 1
+ gm(n) = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ..., 1
+ y(n) = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)
+ </pre>
+ @par
+ <code>pkCoeffs</code> points to array of reflection coefficients of size <code>numStages</code>.
+ Reflection Coefficients are stored in time-reversed order.
+ @par
+ <pre>
+ {kN, kN-1, ..., k1}
+ </pre>
+ @par
+ <code>pvCoeffs</code> points to the array of ladder coefficients of size <code>(numStages+1)</code>.
+ Ladder coefficients are stored in time-reversed order.
+ <pre>
+ {vN, vN-1, ..., v0}
+ </pre>
+ @par
+ <code>pState</code> points to a state array of size <code>numStages + blockSize</code>.
+ The state variables shown in the figure above (the g values) are stored in the <code>pState</code> array.
+ The state variables are updated after each block of data is processed; the coefficients are untouched.
+
+ @par Instance Structure
+ The coefficients and state variables for a filter are stored together in an instance data structure.
+ A separate instance structure must be defined for each filter.
+ Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+ There are separate instance structure declarations for each of the 3 supported data types.
+
+ @par Initialization Functions
+ There is also an associated initialization function for each data type.
+ The initialization function performs the following operations:
+ - Sets the values of the internal structure fields.
+ - Zeros out the values in the state buffer.
+ To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero.
+ @par
+ Use of the initialization function is optional.
+ However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+ To place an instance structure into a const data section, the instance structure must be manually initialized.
+ Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
+ <pre>
+ arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};
+ arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};
+ arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};
+ </pre>
+ @par
+ where <code>numStages</code> is the number of stages in the filter; <code>pState</code> points to the state buffer array;
+ <code>pkCoeffs</code> points to array of the reflection coefficients; <code>pvCoeffs</code> points to the array of ladder coefficients.
+
+ @par Fixed-Point Behavior
+ Care must be taken when using the fixed-point versions of the IIR lattice filter functions.
+ In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+ Refer to the function specific documentation below for usage guidelines.
*/
/**
- * @addtogroup IIR_Lattice
- * @{
+ @addtogroup IIR_Lattice
+ @{
*/
/**
- * @brief Processing function for the floating-point IIR lattice filter.
- * @param[in] *S points to an instance of the floating-point IIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
+ @brief Processing function for the floating-point IIR lattice filter.
+ @param[in] S points to an instance of the floating-point IIR lattice structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
*/
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
void arm_iir_lattice_f32(
const arm_iir_lattice_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
-{
- float32_t fnext1, gcurr1, gnext; /* Temporary variables for lattice stages */
- float32_t acc; /* Accumlator */
- uint32_t blkCnt, tapCnt; /* temporary variables for counts */
- float32_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */
- uint32_t numStages = S->numStages; /* number of stages */
- float32_t *pState; /* State pointer */
- float32_t *pStateCurnt; /* State current pointer */
- float32_t k1, k2;
- float32_t v1, v2, v3, v4;
- float32_t gcurr2;
- float32_t fnext2;
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
+{
+ float32_t *pState = S->pState; /* State pointer */
+ float32_t *pStateCur; /* State current pointer */
+ float32_t acc; /* Accumlator */
+ float32_t fnext1, fnext2, gcurr1, gnext; /* Temporary variables for lattice stages */
+ float32_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */
+ uint32_t numStages = S->numStages; /* Number of stages */
+ uint32_t blkCnt, tapCnt; /* Temporary variables for counts */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+ float32_t gcurr2; /* Temporary variables for lattice stages */
+ float32_t k1, k2;
+ float32_t v1, v2, v3, v4;
+#endif
/* initialise loop count */
blkCnt = blockSize;
- /* initialise state pointer */
- pState = &S->pState[0];
-
/* Sample processing */
while (blkCnt > 0U)
{
@@ -152,19 +150,23 @@
/* Initialize Ladder coeff pointer */
pv = &S->pvCoeffs[0];
+
/* Initialize Reflection coeff pointer */
pk = &S->pkCoeffs[0];
/* Initialize state read pointer */
px1 = pState;
+
/* Initialize state write pointer */
px2 = pState;
/* Set accumulator to zero */
acc = 0.0;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = (numStages) >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = (numStages) >> 2U;
while (tapCnt > 0U)
{
@@ -259,12 +261,19 @@
px1 += 4U;
pv += 4U;
+ /* Decrement loop counter */
tapCnt--;
-
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
- tapCnt = (numStages) % 0x4U;
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = numStages % 0x4U;
+
+#else
+
+ /* Initialize tapCnt with number of samples */
+ tapCnt = numStages;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (tapCnt > 0U)
{
@@ -277,8 +286,8 @@
*px2++ = gnext;
fnext2 = fnext1;
+ /* Decrement loop counter */
tapCnt--;
-
}
/* y(n) += g0(n) * v0 */
@@ -292,144 +301,54 @@
/* Advance the state pointer by 4 to process the next group of 4 samples */
pState = pState + 1U;
+ /* Decrement loop counter */
blkCnt--;
-
}
/* Processing is complete. Now copy last S->numStages samples to start of the buffer
for the preperation of next frame process */
/* Points to the start of the state buffer */
- pStateCurnt = &S->pState[0];
+ pStateCur = &S->pState[0];
pState = &S->pState[blockSize];
+ /* Copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
tapCnt = numStages >> 2U;
- /* copy data */
while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
- tapCnt--;
-
- }
-
- /* Calculate remaining number of copies */
- tapCnt = (numStages) % 0x4U;
-
- /* Copy the remaining q31_t data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
-}
+
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = numStages % 0x4U;
#else
-void arm_iir_lattice_f32(
- const arm_iir_lattice_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
-{
- float32_t fcurr, fnext = 0, gcurr, gnext; /* Temporary variables for lattice stages */
- float32_t acc; /* Accumlator */
- uint32_t blkCnt, tapCnt; /* temporary variables for counts */
- float32_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */
- uint32_t numStages = S->numStages; /* number of stages */
- float32_t *pState; /* State pointer */
- float32_t *pStateCurnt; /* State current pointer */
-
-
- /* Run the below code for Cortex-M0 */
-
- blkCnt = blockSize;
-
- pState = &S->pState[0];
-
- /* Sample processing */
- while (blkCnt > 0U)
- {
- /* Read Sample from input buffer */
- /* fN(n) = x(n) */
- fcurr = *pSrc++;
-
- /* Initialize state read pointer */
- px1 = pState;
- /* Initialize state write pointer */
- px2 = pState;
- /* Set accumulator to zero */
- acc = 0.0f;
- /* Initialize Ladder coeff pointer */
- pv = &S->pvCoeffs[0];
- /* Initialize Reflection coeff pointer */
- pk = &S->pkCoeffs[0];
-
-
- /* Process sample for numStages */
- tapCnt = numStages;
-
- while (tapCnt > 0U)
- {
- gcurr = *px1++;
- /* Process sample for last taps */
- fnext = fcurr - ((*pk) * gcurr);
- gnext = (fnext * (*pk++)) + gcurr;
-
- /* Output samples for last taps */
- acc += (gnext * (*pv++));
- *px2++ = gnext;
- fcurr = fnext;
-
- /* Decrementing loop counter */
- tapCnt--;
-
- }
-
- /* y(n) += g0(n) * v0 */
- acc += (fnext * (*pv));
-
- *px2++ = fnext;
-
- /* write out into pDst */
- *pDst++ = acc;
-
- /* Advance the state pointer by 1 to process the next group of samples */
- pState = pState + 1U;
- blkCnt--;
-
- }
-
- /* Processing is complete. Now copy last S->numStages samples to start of the buffer
- for the preperation of next frame process */
-
- /* Points to the start of the state buffer */
- pStateCurnt = &S->pState[0];
- pState = &S->pState[blockSize];
-
+ /* Initialize blkCnt with number of samples */
tapCnt = numStages;
- /* Copy the data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
/**
- * @} end of IIR_Lattice group
+ @} end of IIR_Lattice group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
index 530c7ff..579fefc 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_iir_lattice_init_f32.c
* Description: Floating-point IIR lattice filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,23 +29,23 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup IIR_Lattice
- * @{
+ @addtogroup IIR_Lattice
+ @{
*/
/**
- * @brief Initialization function for the floating-point IIR lattice filter.
- * @param[in] *S points to an instance of the floating-point IIR lattice structure.
- * @param[in] numStages number of stages in the filter.
- * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
- * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
- * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
- * @param[in] blockSize number of samples to process.
- * @return none.
+ @brief Initialization function for the floating-point IIR lattice filter.
+ @param[in] S points to an instance of the floating-point IIR lattice structure
+ @param[in] numStages number of stages in the filter
+ @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numStages
+ @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1
+ @param[in] pState points to state buffer. The array is of length numStages+blockSize
+ @param[in] blockSize number of samples to process
+ @return none
*/
void arm_iir_lattice_init_f32(
@@ -70,10 +70,8 @@
/* Assign state pointer */
S->pState = pState;
-
-
}
- /**
- * @} end of IIR_Lattice group
- */
+/**
+ @} end of IIR_Lattice group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
index 9b991f8..c5dbc77 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
@@ -3,13 +3,13 @@
* Title: arm_iir_lattice_init_q15.c
* Description: Q15 IIR lattice filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,24 +29,24 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup IIR_Lattice
- * @{
+ @addtogroup IIR_Lattice
+ @{
*/
- /**
- * @brief Initialization function for the Q15 IIR lattice filter.
- * @param[in] *S points to an instance of the Q15 IIR lattice structure.
- * @param[in] numStages number of stages in the filter.
- * @param[in] *pkCoeffs points to reflection coefficient buffer. The array is of length numStages.
- * @param[in] *pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1.
- * @param[in] *pState points to state buffer. The array is of length numStages+blockSize.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- */
+/**
+ @brief Initialization function for the Q15 IIR lattice filter.
+ @param[in] S points to an instance of the Q15 IIR lattice structure
+ @param[in] numStages number of stages in the filter
+ @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numStages
+ @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1
+ @param[in] pState points to state buffer. The array is of length numStages+blockSize
+ @param[in] blockSize number of samples to process
+ @return none
+ */
void arm_iir_lattice_init_q15(
arm_iir_lattice_instance_q15 * S,
@@ -70,10 +70,8 @@
/* Assign state pointer */
S->pState = pState;
-
-
}
/**
- * @} end of IIR_Lattice group
+ @} end of IIR_Lattice group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
index 1543206..02828fa 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_iir_lattice_init_q31.c
* Description: Initialization function for the Q31 IIR lattice filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,24 +29,24 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup IIR_Lattice
- * @{
+ @addtogroup IIR_Lattice
+ @{
*/
- /**
- * @brief Initialization function for the Q31 IIR lattice filter.
- * @param[in] *S points to an instance of the Q31 IIR lattice structure.
- * @param[in] numStages number of stages in the filter.
- * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
- * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
- * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
+/**
+ @brief Initialization function for the Q31 IIR lattice filter.
+ @param[in] S points to an instance of the Q31 IIR lattice structure
+ @param[in] numStages number of stages in the filter
+ @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numStages
+ @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1
+ @param[in] pState points to state buffer. The array is of length numStages+blockSize
+ @param[in] blockSize number of samples to process
+ @return none
+ */
void arm_iir_lattice_init_q31(
arm_iir_lattice_instance_q31 * S,
@@ -70,10 +70,8 @@
/* Assign state pointer */
S->pState = pState;
-
-
}
/**
- * @} end of IIR_Lattice group
+ @} end of IIR_Lattice group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c
index 8f68068..1252782 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c
@@ -1,15 +1,15 @@
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_iir_lattice_q15.c
- * Description: Q15 IIR lattice filter processing function
+ * Description: Q15 IIR Lattice filter processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,64 +29,55 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup IIR_Lattice
- * @{
+ @addtogroup IIR_Lattice
+ @{
*/
/**
- * @brief Processing function for the Q15 IIR lattice filter.
- * @param[in] *S points to an instance of the Q15 IIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.
+ @brief Processing function for the Q15 IIR lattice filter.
+ @param[in] S points to an instance of the Q15 IIR lattice structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+ The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+ There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+ After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+ Lastly, the accumulator is saturated to yield a result in 1.15 format.
*/
void arm_iir_lattice_q15(
const arm_iir_lattice_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
+ q15_t *pState = S->pState; /* State pointer */
+ q15_t *pStateCur; /* State current pointer */
+ q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages */
+ q63_t acc; /* Accumlator */
+ q15_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */
+ uint32_t numStages = S->numStages; /* Number of stages */
+ uint32_t blkCnt, tapCnt; /* Temporary variables for counts */
+ q15_t out; /* Temporary variable for output */
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q31_t fcurr, fnext, gcurr = 0, gnext; /* Temporary variables for lattice stages */
- q15_t gnext1, gnext2; /* Temporary variables for lattice stages */
- uint32_t stgCnt; /* Temporary variables for counts */
- q63_t acc; /* Accumlator */
- uint32_t blkCnt, tapCnt; /* Temporary variables for counts */
- q15_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */
- uint32_t numStages = S->numStages; /* number of stages */
- q15_t *pState; /* State pointer */
- q15_t *pStateCurnt; /* State current pointer */
- q15_t out; /* Temporary variable for output */
- q31_t v; /* Temporary variable for ladder coefficient */
-#ifdef UNALIGNED_SUPPORT_DISABLE
- q15_t v1, v2;
+#if defined (ARM_MATH_DSP) && defined (ARM_MATH_LOOPUNROLL)
+ q15_t gnext1, gnext2; /* Temporary variables for lattice stages */
+ q31_t v; /* Temporary variable for ladder coefficient */
#endif
-
+ /* initialise loop count */
blkCnt = blockSize;
- pState = &S->pState[0];
+#if defined (ARM_MATH_DSP)
/* Sample processing */
while (blkCnt > 0U)
@@ -95,57 +86,62 @@
/* fN(n) = x(n) */
fcurr = *pSrc++;
- /* Initialize state read pointer */
- px1 = pState;
- /* Initialize state write pointer */
- px2 = pState;
- /* Set accumulator to zero */
- acc = 0;
/* Initialize Ladder coeff pointer */
pv = &S->pvCoeffs[0];
+
/* Initialize Reflection coeff pointer */
pk = &S->pkCoeffs[0];
+ /* Initialize state read pointer */
+ px1 = pState;
+
+ /* Initialize state write pointer */
+ px2 = pState;
+
+ /* Set accumulator to zero */
+ acc = 0;
/* Process sample for first tap */
gcurr = *px1++;
/* fN-1(n) = fN(n) - kN * gN-1(n-1) */
fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
fnext = __SSAT(fnext, 16);
+
/* gN(n) = kN * fN-1(n) + gN-1(n-1) */
gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
gnext = __SSAT(gnext, 16);
+
/* write gN(n) into state for next sample processing */
*px2++ = (q15_t) gnext;
- /* y(n) += gN(n) * vN */
- acc += (q31_t) ((gnext * (*pv++)));
+ /* y(n) += gN(n) * vN */
+ acc += (q31_t) ((gnext * (*pv++)));
/* Update f values for next coefficient processing */
fcurr = fnext;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = (numStages - 1U) >> 2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = (numStages - 1U) >> 2U;
while (tapCnt > 0U)
{
-
/* Process sample for 2nd, 6th ...taps */
/* Read gN-2(n-1) from state buffer */
gcurr = *px1++;
- /* Process sample for 2nd, 6th .. taps */
/* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
fnext = __SSAT(fnext, 16);
/* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
gnext1 = (q15_t) __SSAT(gnext, 16);
- /* write gN-1(n) into state */
+ /* write gN-1(n) into state for next sample processing */
*px2++ = (q15_t) gnext1;
-
/* Process sample for 3nd, 7th ...taps */
- /* Read gN-3(n-1) from state */
+ /* Read gN-3(n-1) from state buffer */
gcurr = *px1++;
/* Process sample for 3rd, 7th .. taps */
/* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
@@ -158,39 +154,15 @@
*px2++ = (q15_t) gnext2;
/* Read vN-1 and vN-2 at a time */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
- v = *__SIMD32(pv)++;
-
-#else
-
- v1 = *pv++;
- v2 = *pv++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- v = __PKHBT(v1, v2, 16);
-
-#else
-
- v = __PKHBT(v2, v1, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
+ v = read_q15x2_ia (&pv);
/* Pack gN-1(n) and gN-2(n) */
#ifndef ARM_MATH_BIG_ENDIAN
-
gnext = __PKHBT(gnext1, gnext2, 16);
-
#else
-
gnext = __PKHBT(gnext2, gnext1, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* y(n) += gN-1(n) * vN-1 */
/* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
@@ -198,9 +170,8 @@
/* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
acc = __SMLALD(gnext, v, acc);
-
/* Process sample for 4th, 8th ...taps */
- /* Read gN-4(n-1) from state */
+ /* Read gN-4(n-1) from state buffer */
gcurr = *px1++;
/* Process sample for 4th, 8th .. taps */
/* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
@@ -212,9 +183,8 @@
/* write gN-3(n) for the next sample process */
*px2++ = (q15_t) gnext1;
-
/* Process sample for 5th, 9th ...taps */
- /* Read gN-5(n-1) from state */
+ /* Read gN-5(n-1) from state buffer */
gcurr = *px1++;
/* Process sample for 5th, 9th .. taps */
/* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */
@@ -227,38 +197,14 @@
*px2++ = (q15_t) gnext2;
/* Read vN-3 and vN-4 at a time */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
- v = *__SIMD32(pv)++;
-
-#else
-
- v1 = *pv++;
- v2 = *pv++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- v = __PKHBT(v1, v2, 16);
-
-#else
-
- v = __PKHBT(v2, v1, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
+ v = read_q15x2_ia (&pv);
/* Pack gN-3(n) and gN-4(n) */
-#ifndef ARM_MATH_BIG_ENDIAN
-
+#ifndef ARM_MATH_BIG_ENDIAN
gnext = __PKHBT(gnext1, gnext2, 16);
-
#else
-
gnext = __PKHBT(gnext2, gnext1, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* y(n) += gN-4(n) * vN-4 */
/* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
@@ -266,15 +212,22 @@
/* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
acc = __SMLALD(gnext, v, acc);
+ /* Decrement loop counter */
tapCnt--;
-
}
fnext = fcurr;
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = (numStages - 1U) % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ tapCnt = (numStages - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
gcurr = *px1++;
@@ -283,11 +236,13 @@
fnext = __SSAT(fnext, 16);
gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
gnext = __SSAT(gnext, 16);
+
/* Output samples for last taps */
acc += (q31_t) (((q31_t) gnext * (*pv++)));
*px2++ = (q15_t) gnext;
fcurr = fnext;
+ /* Decrement loop counter */
tapCnt--;
}
@@ -302,70 +257,52 @@
/* Advance the state pointer by 4 to process the next group of 4 samples */
pState = pState + 1U;
- blkCnt--;
+ /* Decrement loop counter */
+ blkCnt--;
}
/* Processing is complete. Now copy last S->numStages samples to start of the buffer
for the preperation of next frame process */
+
/* Points to the start of the state buffer */
- pStateCurnt = &S->pState[0];
+ pStateCur = &S->pState[0];
pState = &S->pState[blockSize];
- stgCnt = (numStages >> 2U);
-
/* copy data */
- while (stgCnt > 0U)
- {
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_LOOPUNROLL)
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = numStages >> 2U;
+
+ while (tapCnt > 0U)
+ {
+ write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+ write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = numStages % 0x4U;
#else
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
+ /* Initialize blkCnt with number of samples */
+ tapCnt = (numStages - 1U);
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
- /* Decrement the loop counter */
- stgCnt--;
-
- }
-
- /* Calculation of count for remaining q15_t data */
- stgCnt = (numStages) % 0x4U;
-
- /* copy data */
- while (stgCnt > 0U)
+ while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
- stgCnt--;
+ /* Decrement loop counter */
+ tapCnt--;
}
-#else
-
- /* Run the below code for Cortex-M0 */
-
- q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages */
- uint32_t stgCnt; /* Temporary variables for counts */
- q63_t acc; /* Accumlator */
- uint32_t blkCnt, tapCnt; /* Temporary variables for counts */
- q15_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */
- uint32_t numStages = S->numStages; /* number of stages */
- q15_t *pState; /* State pointer */
- q15_t *pStateCurnt; /* State current pointer */
- q15_t out; /* Temporary variable for output */
-
-
- blkCnt = blockSize;
-
- pState = &S->pState[0];
+#else /* #if defined (ARM_MATH_DSP) */
/* Sample processing */
while (blkCnt > 0U)
@@ -374,17 +311,21 @@
/* fN(n) = x(n) */
fcurr = *pSrc++;
- /* Initialize state read pointer */
- px1 = pState;
- /* Initialize state write pointer */
- px2 = pState;
- /* Set accumulator to zero */
- acc = 0;
/* Initialize Ladder coeff pointer */
pv = &S->pvCoeffs[0];
+
/* Initialize Reflection coeff pointer */
pk = &S->pkCoeffs[0];
+ /* Initialize state read pointer */
+ px1 = pState;
+
+ /* Initialize state write pointer */
+ px2 = pState;
+
+ /* Set accumulator to zero */
+ acc = 0;
+
tapCnt = numStages;
while (tapCnt > 0U)
@@ -394,14 +335,18 @@
/* fN-1(n) = fN(n) - kN * gN-1(n-1) */
fnext = fcurr - ((gcurr * (*pk)) >> 15);
fnext = __SSAT(fnext, 16);
+
/* gN(n) = kN * fN-1(n) + gN-1(n-1) */
gnext = ((fnext * (*pk++)) >> 15) + gcurr;
gnext = __SSAT(gnext, 16);
+
/* Output samples */
/* y(n) += gN(n) * vN */
acc += (q31_t) ((gnext * (*pv++)));
+
/* write gN(n) into state for next sample processing */
*px2++ = (q15_t) gnext;
+
/* Update f values for next coefficient processing */
fcurr = fnext;
@@ -419,34 +364,33 @@
/* Advance the state pointer by 1 to process the next group of samples */
pState = pState + 1U;
- blkCnt--;
+ /* Decrement loop counter */
+ blkCnt--;
}
/* Processing is complete. Now copy last S->numStages samples to start of the buffer
for the preperation of next frame process */
+
/* Points to the start of the state buffer */
- pStateCurnt = &S->pState[0];
+ pStateCur = &S->pState[0];
pState = &S->pState[blockSize];
- stgCnt = numStages;
+ tapCnt = numStages;
- /* copy data */
- while (stgCnt > 0U)
+ /* Copy data */
+ while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
- stgCnt--;
+ /* Decrement loop counter */
+ tapCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_DSP) */
}
-
-
-
/**
- * @} end of IIR_Lattice group
+ @} end of IIR_Lattice group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c
index a14dd7a..3de5e06 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c
@@ -1,15 +1,15 @@
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_iir_lattice_q31.c
- * Description: Q31 IIR lattice filter processing function
+ * Description: Q31 IIR Lattice filter processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,55 +29,50 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup IIR_Lattice
- * @{
+ @addtogroup IIR_Lattice
+ @{
*/
/**
- * @brief Processing function for the Q31 IIR lattice filter.
- * @param[in] *S points to an instance of the Q31 IIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits.
- * After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.
+ @brief Processing function for the Q31 IIR lattice filter.
+ @param[in] S points to an instance of the Q31 IIR lattice structure
+ @param[in] pSrc points to the block of input data
+ @param[out] pDst points to the block of output data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ Thus, if the accumulator result overflows it wraps around rather than clip.
+ In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits.
+ After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.
*/
void arm_iir_lattice_q31(
const arm_iir_lattice_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
-{
- q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages */
- q63_t acc; /* Accumlator */
- uint32_t blkCnt, tapCnt; /* Temporary variables for counts */
- q31_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */
- uint32_t numStages = S->numStages; /* number of stages */
- q31_t *pState; /* State pointer */
- q31_t *pStateCurnt; /* State current pointer */
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
+{
+ q31_t *pState = S->pState; /* State pointer */
+ q31_t *pStateCur; /* State current pointer */
+ q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages */
+ q63_t acc; /* Accumlator */
+ q31_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */
+ uint32_t numStages = S->numStages; /* Number of stages */
+ uint32_t blkCnt, tapCnt; /* Temporary variables for counts */
+
+ /* initialise loop count */
blkCnt = blockSize;
- pState = &S->pState[0];
-
-
#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
/* Sample processing */
while (blkCnt > 0U)
{
@@ -85,43 +80,51 @@
/* fN(n) = x(n) */
fcurr = *pSrc++;
- /* Initialize state read pointer */
- px1 = pState;
- /* Initialize state write pointer */
- px2 = pState;
- /* Set accumulator to zero */
- acc = 0;
/* Initialize Ladder coeff pointer */
pv = &S->pvCoeffs[0];
+
/* Initialize Reflection coeff pointer */
pk = &S->pkCoeffs[0];
+ /* Initialize state read pointer */
+ px1 = pState;
+
+ /* Initialize state write pointer */
+ px2 = pState;
+
+ /* Set accumulator to zero */
+ acc = 0;
/* Process sample for first tap */
gcurr = *px1++;
/* fN-1(n) = fN(n) - kN * gN-1(n-1) */
- fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
+ fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk )) >> 31));
+
/* gN(n) = kN * fN-1(n) + gN-1(n-1) */
gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
+
/* write gN-1(n-1) into state for next sample processing */
*px2++ = gnext;
- /* y(n) += gN(n) * vN */
+
+ /* y(n) += gN(n) * vN */
acc += ((q63_t) gnext * *pv++);
/* Update f values for next coefficient processing */
fcurr = fnext;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = (numStages - 1U) >> 2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = (numStages - 1U) >> 2U;
while (tapCnt > 0U)
{
-
- /* Process sample for 2nd, 6th .. taps */
+ /* Process sample for 2nd, 6th ...taps */
/* Read gN-2(n-1) from state buffer */
gcurr = *px1++;
/* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
- fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
+ fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk )) >> 31));
/* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
/* y(n) += gN-1(n) * vN-1 */
@@ -135,7 +138,7 @@
gcurr = *px1++;
/* Process sample for 3rd, 7th .. taps */
/* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
- fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
+ fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk )) >> 31));
/* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
/* y(n) += gN-2(n) * vN-2 */
@@ -144,13 +147,12 @@
/* write gN-2(n) into state for next sample processing */
*px2++ = gnext;
-
/* Process sample for 4th, 8th ...taps */
/* Read gN-4(n-1) from state buffer */
gcurr = *px1++;
/* Process sample for 4th, 8th .. taps */
/* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
- fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
+ fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk )) >> 31));
/* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
/* y(n) += gN-3(n) * vN-3 */
@@ -159,48 +161,55 @@
/* write gN-3(n) into state for next sample processing */
*px2++ = gnext;
-
/* Process sample for 5th, 9th ...taps */
/* Read gN-5(n-1) from state buffer */
gcurr = *px1++;
/* Process sample for 5th, 9th .. taps */
/* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
- fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
+ fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk )) >> 31));
/* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
/* y(n) += gN-4(n) * vN-4 */
/* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
acc += ((q63_t) gnext * *pv++);
+
/* write gN-4(n) into state for next sample processing */
*px2++ = gnext;
+ /* Decrement loop counter */
tapCnt--;
-
}
fnext = fcurr;
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = (numStages - 1U) % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ tapCnt = (numStages - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
gcurr = *px1++;
/* Process sample for last taps */
- fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
+ fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk )) >> 31));
gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
+
/* Output samples for last taps */
acc += ((q63_t) gnext * *pv++);
*px2++ = gnext;
fcurr = fnext;
+ /* Decrement loop counter */
tapCnt--;
-
}
/* y(n) += g0(n) * v0 */
- acc += (q63_t) fnext *(
- *pv++);
+ acc += ((q63_t) fnext * *pv++);
*px2++ = fnext;
@@ -209,47 +218,55 @@
/* Advance the state pointer by 4 to process the next group of 4 samples */
pState = pState + 1U;
- blkCnt--;
+ /* Decrement loop counter */
+ blkCnt--;
}
/* Processing is complete. Now copy last S->numStages samples to start of the buffer
for the preperation of next frame process */
/* Points to the start of the state buffer */
- pStateCurnt = &S->pState[0];
+ pStateCur = &S->pState[0];
pState = &S->pState[blockSize];
+ /* Copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
tapCnt = numStages >> 2U;
- /* copy data */
while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
-
}
- /* Calculate remaining number of copies */
- tapCnt = (numStages) % 0x4U;
-
- /* Copy the remaining q31_t data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- };
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = numStages % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
+ tapCnt = (numStages - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (tapCnt > 0U)
+ {
+ *pStateCur++ = *pState++;
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+#else /* #if defined (ARM_MATH_DSP) */
+
/* Sample processing */
while (blkCnt > 0U)
{
@@ -257,17 +274,21 @@
/* fN(n) = x(n) */
fcurr = *pSrc++;
- /* Initialize state read pointer */
- px1 = pState;
- /* Initialize state write pointer */
- px2 = pState;
- /* Set accumulator to zero */
- acc = 0;
/* Initialize Ladder coeff pointer */
pv = &S->pvCoeffs[0];
+
/* Initialize Reflection coeff pointer */
pk = &S->pkCoeffs[0];
+ /* Initialize state read pointer */
+ px1 = pState;
+
+ /* Initialize state write pointer */
+ px2 = pState;
+
+ /* Set accumulator to zero */
+ acc = 0;
+
tapCnt = numStages;
while (tapCnt > 0U)
@@ -275,18 +296,18 @@
gcurr = *px1++;
/* Process sample */
/* fN-1(n) = fN(n) - kN * gN-1(n-1) */
- fnext =
- clip_q63_to_q31(((q63_t) fcurr -
- ((q31_t) (((q63_t) gcurr * (*pk)) >> 31))));
+ fnext = clip_q63_to_q31(((q63_t) fcurr - ((q31_t) (((q63_t) gcurr * (*pk )) >> 31))));
+
/* gN(n) = kN * fN-1(n) + gN-1(n-1) */
- gnext =
- clip_q63_to_q31(((q63_t) gcurr +
- ((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
+ gnext = clip_q63_to_q31(((q63_t) gcurr + ((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
+
/* Output samples */
- /* y(n) += gN(n) * vN */
+ /* y(n) += gN(n) * vN */
acc += ((q63_t) gnext * *pv++);
+
/* write gN-1(n-1) into state for next sample processing */
*px2++ = gnext;
+
/* Update f values for next coefficient processing */
fcurr = fnext;
@@ -294,8 +315,7 @@
}
/* y(n) += g0(n) * v0 */
- acc += (q63_t) fnext *(
- *pv++);
+ acc += ((q63_t) fnext * *pv++);
*px2++ = fnext;
@@ -304,35 +324,33 @@
/* Advance the state pointer by 1 to process the next group of samples */
pState = pState + 1U;
- blkCnt--;
+ /* Decrement loop counter */
+ blkCnt--;
}
/* Processing is complete. Now copy last S->numStages samples to start of the buffer
for the preperation of next frame process */
/* Points to the start of the state buffer */
- pStateCurnt = &S->pState[0];
+ pStateCur = &S->pState[0];
pState = &S->pState[blockSize];
tapCnt = numStages;
- /* Copy the remaining q31_t data */
+ /* Copy data */
while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
+ *pStateCur++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_DSP) */
}
-
-
-
/**
- * @} end of IIR_Lattice group
+ @} end of IIR_Lattice group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c
index e5728b4..f4e3d67 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c
@@ -3,13 +3,13 @@
* Title: arm_lms_f32.c
* Description: Processing function for the floating-point LMS filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,175 +29,169 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @defgroup LMS Least Mean Square (LMS) Filters
- *
- * LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions.
- * LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal.
- * Adaptive filters are often used in communication systems, equalizers, and noise removal.
- * The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types.
- * The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.
- *
- * An LMS filter consists of two components as shown below.
- * The first component is a standard transversal or FIR filter.
- * The second component is a coefficient update mechanism.
- * The LMS filter has two input signals.
- * The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
- * That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
- * The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
- * This "error signal" tends towards zero as the filter adapts.
- * The LMS processing functions accept the input and reference input signals and generate the filter output and error signal.
- * \image html LMS.gif "Internal structure of the Least Mean Square filter"
- *
- * The functions operate on blocks of data and each call to the function processes
- * <code>blockSize</code> samples through the filter.
- * <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal,
- * <code>pOut</code> points to output signal and <code>pErr</code> points to error signal.
- * All arrays contain <code>blockSize</code> values.
- *
- * The functions operate on a block-by-block basis.
- * Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis.
- * The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
- *
- * \par Algorithm:
- * The output signal <code>y[n]</code> is computed by a standard FIR filter:
- * <pre>
- * y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
- * </pre>
- *
- * \par
- * The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output:
- * <pre>
- * e[n] = d[n] - y[n].
- * </pre>
- *
- * \par
- * After each sample of the error signal is computed, the filter coefficients <code>b[k]</code> are updated on a sample-by-sample basis:
- * <pre>
- * b[k] = b[k] + e[n] * mu * x[n-k], for k=0, 1, ..., numTaps-1
- * </pre>
- * where <code>mu</code> is the step size and controls the rate of coefficient convergence.
- *\par
- * In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
- * Coefficients are stored in time reversed order.
- * \par
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
- * Samples in the state buffer are stored in the order:
- * \par
- * <pre>
- * {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
- * </pre>
- * \par
- * Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples.
- * The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
- * to be avoided and yields a significant speed improvement.
- * The state variables are updated after each block of data is processed.
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter and
- * coefficient and state arrays cannot be shared among instances.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, mu, postShift (not for f32), pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * Set the values in the state buffer to zeros before static initialization.
- * The code below statically initializes each of the 3 different data type filter instance structures
- * <pre>
- * arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};
- * arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};
- * arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};
- * </pre>
- * where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer;
- * <code>pCoeffs</code> is the address of the coefficient buffer; <code>mu</code> is the step size parameter; and <code>postShift</code> is the shift applied to coefficients.
- *
- * \par Fixed-Point Behavior:
- * Care must be taken when using the Q15 and Q31 versions of the LMS filter.
- * The following issues must be considered:
- * - Scaling of coefficients
- * - Overflow and saturation
- *
- * \par Scaling of Coefficients:
- * Filter coefficients are represented as fractional values and
- * coefficients are restricted to lie in the range <code>[-1 +1)</code>.
- * The fixed-point functions have an additional scaling parameter <code>postShift</code>.
- * At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
- * This essentially scales the filter coefficients by <code>2^postShift</code> and
- * allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
- * The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.
- *
- * \par Overflow and Saturation:
- * Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
- * described separately as part of the function specific documentation below.
+ @defgroup LMS Least Mean Square (LMS) Filters
+
+ LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions.
+ LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal.
+ Adaptive filters are often used in communication systems, equalizers, and noise removal.
+ The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types.
+ The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.
+
+ An LMS filter consists of two components as shown below.
+ The first component is a standard transversal or FIR filter.
+ The second component is a coefficient update mechanism.
+ The LMS filter has two input signals.
+ The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
+ That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
+ The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
+ This "error signal" tends towards zero as the filter adapts.
+ The LMS processing functions accept the input and reference input signals and generate the filter output and error signal.
+ \image html LMS.gif "Internal structure of the Least Mean Square filter"
+
+ The functions operate on blocks of data and each call to the function processes
+ <code>blockSize</code> samples through the filter.
+ <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal,
+ <code>pOut</code> points to output signal and <code>pErr</code> points to error signal.
+ All arrays contain <code>blockSize</code> values.
+
+ The functions operate on a block-by-block basis.
+ Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis.
+ The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
+
+ @par Algorithm
+ The output signal <code>y[n]</code> is computed by a standard FIR filter:
+ <pre>
+ y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+ </pre>
+
+ @par
+ The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output:
+ <pre>
+ e[n] = d[n] - y[n].
+ </pre>
+
+ @par
+ After each sample of the error signal is computed, the filter coefficients <code>b[k]</code> are updated on a sample-by-sample basis:
+ <pre>
+ b[k] = b[k] + e[n] * mu * x[n-k], for k=0, 1, ..., numTaps-1
+ </pre>
+ where <code>mu</code> is the step size and controls the rate of coefficient convergence.
+ @par
+ In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+ Coefficients are stored in time reversed order.
+ @par
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ @par
+ <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
+ Samples in the state buffer are stored in the order:
+ @par
+ <pre>
+ {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+ </pre>
+ @par
+ Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples.
+ The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
+ to be avoided and yields a significant speed improvement.
+ The state variables are updated after each block of data is processed.
+ @par Instance Structure
+ The coefficients and state variables for a filter are stored together in an instance data structure.
+ A separate instance structure must be defined for each filter and
+ coefficient and state arrays cannot be shared among instances.
+ There are separate instance structure declarations for each of the 3 supported data types.
+
+ @par Initialization Functions
+ There is also an associated initialization function for each data type.
+ The initialization function performs the following operations:
+ - Sets the values of the internal structure fields.
+ - Zeros out the values in the state buffer.
+ To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ numTaps, pCoeffs, mu, postShift (not for f32), pState. Also set all of the values in pState to zero.
+
+ @par
+ Use of the initialization function is optional.
+ However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+ To place an instance structure into a const data section, the instance structure must be manually initialized.
+ Set the values in the state buffer to zeros before static initialization.
+ The code below statically initializes each of the 3 different data type filter instance structures
+ <pre>
+ arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};
+ arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};
+ arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};
+ </pre>
+ where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer;
+ <code>pCoeffs</code> is the address of the coefficient buffer; <code>mu</code> is the step size parameter; and <code>postShift</code> is the shift applied to coefficients.
+
+ @par Fixed-Point Behavior
+ Care must be taken when using the Q15 and Q31 versions of the LMS filter.
+ The following issues must be considered:
+ - Scaling of coefficients
+ - Overflow and saturation
+
+ @par Scaling of Coefficients
+ Filter coefficients are represented as fractional values and
+ coefficients are restricted to lie in the range <code>[-1 +1)</code>.
+ The fixed-point functions have an additional scaling parameter <code>postShift</code>.
+ At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
+ This essentially scales the filter coefficients by <code>2^postShift</code> and
+ allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
+ The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.
+
+ @par Overflow and Saturation
+ Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
+ described separately as part of the function specific documentation below.
*/
/**
- * @addtogroup LMS
- * @{
+ @addtogroup LMS
+ @{
*/
/**
- * @details
- * This function operates on floating-point data types.
- *
- * @brief Processing function for floating-point LMS filter.
- * @param[in] *S points to an instance of the floating-point LMS filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[in] *pRef points to the block of reference data.
- * @param[out] *pOut points to the block of output data.
- * @param[out] *pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- * @return none.
+ @brief Processing function for floating-point LMS filter.
+ @param[in] S points to an instance of the floating-point LMS filter structure
+ @param[in] pSrc points to the block of input data
+ @param[in] pRef points to the block of reference data
+ @param[out] pOut points to the block of output data
+ @param[out] pErr points to the block of error data
+ @param[in] blockSize number of samples to process
+ @return none
*/
void arm_lms_f32(
const arm_lms_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pRef,
- float32_t * pOut,
- float32_t * pErr,
- uint32_t blockSize)
-{
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- float32_t *pStateCurnt; /* Points to the current sample of the state */
- float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
- float32_t mu = S->mu; /* Adaptive factor */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t tapCnt, blkCnt; /* Loop counters */
- float32_t sum, e, d; /* accumulator, error, reference data sample */
- float32_t w = 0.0f; /* weight factor */
+ const float32_t * pSrc,
+ float32_t * pRef,
+ float32_t * pOut,
+ float32_t * pErr,
+ uint32_t blockSize)
+{
+ float32_t *pState = S->pState; /* State pointer */
+ float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t *pStateCurnt; /* Points to the current sample of the state */
+ float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
+ float32_t mu = S->mu; /* Adaptive factor */
+ float32_t acc, e; /* Accumulator, error */
+ float32_t w; /* Weight factor */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t tapCnt, blkCnt; /* Loop counters */
+ /* Initializations of error, difference, Coefficient update */
e = 0.0f;
- d = 0.0f;
+ w = 0.0f;
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1U)]);
+ /* initialise loop count */
blkCnt = blockSize;
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
while (blkCnt > 0U)
{
/* Copy the new input sample into the state buffer */
@@ -206,225 +200,161 @@
/* Initialize pState pointer */
px = pState;
- /* Initialize coeff pointer */
- pb = (pCoeffs);
+ /* Initialize coefficient pointer */
+ pb = pCoeffs;
/* Set the accumulator to zero */
- sum = 0.0f;
+ acc = 0.0f;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = numTaps >> 2U;
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
- sum += (*px++) * (*pb++);
- sum += (*px++) * (*pb++);
- sum += (*px++) * (*pb++);
- sum += (*px++) * (*pb++);
+ acc += (*px++) * (*pb++);
- /* Decrement the loop counter */
+ acc += (*px++) * (*pb++);
+
+ acc += (*px++) * (*pb++);
+
+ acc += (*px++) * (*pb++);
+
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of samples */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
- sum += (*px++) * (*pb++);
+ acc += (*px++) * (*pb++);
/* Decrement the loop counter */
tapCnt--;
}
- /* The result in the accumulator, store in the destination buffer. */
- *pOut++ = sum;
+ /* Store the result from accumulator into the destination buffer. */
+ *pOut++ = acc;
/* Compute and store error */
- d = (float32_t) (*pRef++);
- e = d - sum;
+ e = (float32_t) *pRef++ - acc;
*pErr++ = e;
- /* Calculation of Weighting factor for the updating filter coefficients */
+ /* Calculation of Weighting factor for updating filter coefficients */
w = e * mu;
/* Initialize pState pointer */
- px = pState;
+ /* Advance state pointer by 1 for the next sample */
+ px = pState++;
- /* Initialize coeff pointer */
- pb = (pCoeffs);
+ /* Initialize coefficient pointer */
+ pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = numTaps >> 2U;
/* Update filter coefficients */
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
- *pb = *pb + (w * (*px++));
+ *pb += w * (*px++);
pb++;
- *pb = *pb + (w * (*px++));
+ *pb += w * (*px++);
pb++;
- *pb = *pb + (w * (*px++));
+ *pb += w * (*px++);
pb++;
- *pb = *pb + (w * (*px++));
+ *pb += w * (*px++);
pb++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
- while (tapCnt > 0U)
- {
- /* Perform the multiply-accumulate */
- *pb = *pb + (w * (*px++));
- pb++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Advance state pointer by 1 for the next sample */
- pState = pState + 1;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-
- /* Processing is complete. Now copy the last numTaps - 1 samples to the
- satrt of the state buffer. This prepares the state buffer for the
- next function call. */
-
- /* Points to the start of the pState buffer */
- pStateCurnt = S->pState;
-
- /* Loop unrolling for (numTaps - 1U) samples copy */
- tapCnt = (numTaps - 1U) >> 2U;
-
- /* copy data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Calculate remaining number of copies */
- tapCnt = (numTaps - 1U) % 0x4U;
-
- /* Copy the remaining q31_t data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
- while (blkCnt > 0U)
- {
- /* Copy the new input sample into the state buffer */
- *pStateCurnt++ = *pSrc++;
-
- /* Initialize pState pointer */
- px = pState;
-
- /* Initialize pCoeffs pointer */
- pb = pCoeffs;
-
- /* Set the accumulator to zero */
- sum = 0.0f;
-
- /* Loop over numTaps number of values */
+ /* Initialize tapCnt with number of samples */
tapCnt = numTaps;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
- sum += (*px++) * (*pb++);
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* The result is stored in the destination buffer. */
- *pOut++ = sum;
-
- /* Compute and store error */
- d = (float32_t) (*pRef++);
- e = d - sum;
- *pErr++ = e;
-
- /* Weighting factor for the LMS version */
- w = e * mu;
-
- /* Initialize pState pointer */
- px = pState;
-
- /* Initialize pCoeffs pointer */
- pb = pCoeffs;
-
- /* Loop over numTaps number of values */
- tapCnt = numTaps;
-
- while (tapCnt > 0U)
- {
- /* Perform the multiply-accumulate */
- *pb = *pb + (w * (*px++));
+ *pb += w * (*px++);
pb++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* Advance state pointer by 1 for the next sample */
- pState = pState + 1;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
-
- /* Processing is complete. Now copy the last numTaps - 1 samples to the
- * start of the state buffer. This prepares the state buffer for the
- * next function call. */
+ /* Processing is complete.
+ Now copy the last numTaps - 1 samples to the start of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
- /* Copy (numTaps - 1U) samples */
+ /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = (numTaps - 1U) >> 2U;
+
+ while (tapCnt > 0U)
+ {
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+ /* Initialize tapCnt with number of samples */
tapCnt = (numTaps - 1U);
- /* Copy the data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
*pStateCurnt++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of LMS group
- */
+ @} end of LMS group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c
index 9fc87f1..b677c0b 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_lms_init_f32.c
* Description: Floating-point LMS filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,29 +29,27 @@
#include "arm_math.h"
/**
- * @addtogroup LMS
- * @{
+ @addtogroup LMS
+ @{
*/
- /**
- * @brief Initialization function for floating-point LMS filter.
- * @param[in] *S points to an instance of the floating-point LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] *pCoeffs points to the coefficient buffer.
- * @param[in] *pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
/**
- * \par Description:
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * The initial filter coefficients serve as a starting point for the adaptive filter.
- * <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_f32()</code>.
+ @brief Initialization function for floating-point LMS filter.
+ @param[in] S points to an instance of the floating-point LMS filter structure
+ @param[in] numTaps number of filter coefficients
+ @param[in] pCoeffs points to coefficient buffer
+ @param[in] pState points to state buffer
+ @param[in] mu step size that controls filter coefficient updates
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ The initial filter coefficients serve as a starting point for the adaptive filter.
+ <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_f32()</code>.
*/
void arm_lms_init_f32(
@@ -79,5 +77,5 @@
}
/**
- * @} end of LMS group
+ @} end of LMS group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c
index 3a13f26..75d22d3 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c
@@ -3,13 +3,13 @@
* Title: arm_lms_init_q15.c
* Description: Q15 LMS filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,35 +29,35 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup LMS
- * @{
+ @addtogroup LMS
+ @{
*/
/**
-* @brief Initialization function for the Q15 LMS filter.
-* @param[in] *S points to an instance of the Q15 LMS filter structure.
-* @param[in] numTaps number of filter coefficients.
-* @param[in] *pCoeffs points to the coefficient buffer.
-* @param[in] *pState points to the state buffer.
-* @param[in] mu step size that controls filter coefficient updates.
-* @param[in] blockSize number of samples to process.
-* @param[in] postShift bit shift applied to coefficients.
-* @return none.
-*
-* \par Description:
-* <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-* <pre>
-* {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-* </pre>
-* The initial filter coefficients serve as a starting point for the adaptive filter.
-* <code>pState</code> points to the array of state variables and size of array is
-* <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of
-* input samples processed by each call to <code>arm_lms_q15()</code>.
-*/
+ @brief Initialization function for the Q15 LMS filter.
+ @param[in] S points to an instance of the Q15 LMS filter structure.
+ @param[in] numTaps number of filter coefficients.
+ @param[in] pCoeffs points to coefficient buffer.
+ @param[in] pState points to state buffer.
+ @param[in] mu step size that controls filter coefficient updates.
+ @param[in] blockSize number of samples to process.
+ @param[in] postShift bit shift applied to coefficients.
+ @return none
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ The initial filter coefficients serve as a starting point for the adaptive filter.
+ <code>pState</code> points to the array of state variables and size of array is
+ <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of
+ input samples processed by each call to <code>arm_lms_q15()</code>.
+ */
void arm_lms_init_q15(
arm_lms_instance_q15 * S,
@@ -85,9 +85,8 @@
/* Assign postShift value to be applied */
S->postShift = postShift;
-
}
/**
- * @} end of LMS group
+ @} end of LMS group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c
index 5859c84..2c2bcf1 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_lms_init_q31.c
* Description: Q31 LMS filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,34 +29,34 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup LMS
- * @{
+ @addtogroup LMS
+ @{
*/
- /**
- * @brief Initialization function for Q31 LMS filter.
- * @param[in] *S points to an instance of the Q31 LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] *pCoeffs points to coefficient buffer.
- * @param[in] *pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @param[in] postShift bit shift applied to coefficients.
- * @return none.
- *
- * \par Description:
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * The initial filter coefficients serve as a starting point for the adaptive filter.
- * <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
- * where <code>blockSize</code> is the number of input samples processed by each call to
- * <code>arm_lms_q31()</code>.
+/**
+ @brief Initialization function for Q31 LMS filter.
+ @param[in] S points to an instance of the Q31 LMS filter structure
+ @param[in] numTaps number of filter coefficients
+ @param[in] pCoeffs points to coefficient buffer
+ @param[in] pState points to state buffer
+ @param[in] mu step size that controls filter coefficient updates
+ @param[in] blockSize number of samples to process
+ @param[in] postShift bit shift applied to coefficients
+ @return none
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ The initial filter coefficients serve as a starting point for the adaptive filter.
+ <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
+ where <code>blockSize</code> is the number of input samples processed by each call to
+ <code>arm_lms_q31()</code>.
*/
void arm_lms_init_q31(
@@ -75,7 +75,7 @@
S->pCoeffs = pCoeffs;
/* Clear state buffer and size is always blockSize + numTaps - 1 */
- memset(pState, 0, ((uint32_t) numTaps + (blockSize - 1U)) * sizeof(q31_t));
+ memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
/* Assign state pointer */
S->pState = pState;
@@ -85,9 +85,8 @@
/* Assign postShift value to be applied */
S->postShift = postShift;
-
}
/**
- * @} end of LMS group
+ @} end of LMS group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c
index 3fdc5a1..e2100f3 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c
@@ -1,15 +1,15 @@
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_norm_f32.c
- * Description: Processing function for the floating-point Normalised LMS
+ * Description: Processing function for the floating-point NLMS filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,157 +29,155 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @defgroup LMS_NORM Normalized LMS Filters
- *
- * This set of functions implements a commonly used adaptive filter.
- * It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization
- * factor which increases the adaptation rate of the filter.
- * The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.
- *
- * A normalized least mean square (NLMS) filter consists of two components as shown below.
- * The first component is a standard transversal or FIR filter.
- * The second component is a coefficient update mechanism.
- * The NLMS filter has two input signals.
- * The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
- * That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
- * The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
- * This "error signal" tends towards zero as the filter adapts.
- * The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal.
- * \image html LMS.gif "Internal structure of the NLMS adaptive filter"
- *
- * The functions operate on blocks of data and each call to the function processes
- * <code>blockSize</code> samples through the filter.
- * <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal,
- * <code>pOut</code> points to output signal and <code>pErr</code> points to error signal.
- * All arrays contain <code>blockSize</code> values.
- *
- * The functions operate on a block-by-block basis.
- * Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis.
- * The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
- *
- * \par Algorithm:
- * The output signal <code>y[n]</code> is computed by a standard FIR filter:
- * <pre>
- * y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
- * </pre>
- *
- * \par
- * The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output:
- * <pre>
- * e[n] = d[n] - y[n].
- * </pre>
- *
- * \par
- * After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated:
- * <pre>
- * E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.
- * </pre>
- * The filter coefficients <code>b[k]</code> are then updated on a sample-by-sample basis:
- * <pre>
- * b[k] = b[k] + e[n] * (mu/E) * x[n-k], for k=0, 1, ..., numTaps-1
- * </pre>
- * where <code>mu</code> is the step size and controls the rate of coefficient convergence.
- *\par
- * In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
- * Coefficients are stored in time reversed order.
- * \par
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
- * Samples in the state buffer are stored in the order:
- * \par
- * <pre>
- * {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
- * </pre>
- * \par
- * Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples.
- * The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
- * to be avoided and yields a significant speed improvement.
- * The state variables are updated after each block of data is processed.
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter and
- * coefficient and state arrays cannot be shared among instances.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero.
- * For Q7, Q15, and Q31 the following fields must also be initialized;
- * recipTable, postShift
- *
- * \par
- * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
- * \par Fixed-Point Behavior:
- * Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter.
- * The following issues must be considered:
- * - Scaling of coefficients
- * - Overflow and saturation
- *
- * \par Scaling of Coefficients:
- * Filter coefficients are represented as fractional values and
- * coefficients are restricted to lie in the range <code>[-1 +1)</code>.
- * The fixed-point functions have an additional scaling parameter <code>postShift</code>.
- * At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
- * This essentially scales the filter coefficients by <code>2^postShift</code> and
- * allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
- * The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.
- *
- * \par Overflow and Saturation:
- * Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
- * described separately as part of the function specific documentation below.
- */
+ @defgroup LMS_NORM Normalized LMS Filters
+ This set of functions implements a commonly used adaptive filter.
+ It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization
+ factor which increases the adaptation rate of the filter.
+ The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.
+
+ A normalized least mean square (NLMS) filter consists of two components as shown below.
+ The first component is a standard transversal or FIR filter.
+ The second component is a coefficient update mechanism.
+ The NLMS filter has two input signals.
+ The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
+ That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
+ The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
+ This "error signal" tends towards zero as the filter adapts.
+ The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal.
+ \image html LMS.gif "Internal structure of the NLMS adaptive filter"
+
+ The functions operate on blocks of data and each call to the function processes
+ <code>blockSize</code> samples through the filter.
+ <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal,
+ <code>pOut</code> points to output signal and <code>pErr</code> points to error signal.
+ All arrays contain <code>blockSize</code> values.
+
+ The functions operate on a block-by-block basis.
+ Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis.
+ The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
+
+ @par Algorithm
+ The output signal <code>y[n]</code> is computed by a standard FIR filter:
+ <pre>
+ y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+ </pre>
+
+ @par
+ The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output:
+ <pre>
+ e[n] = d[n] - y[n].
+ </pre>
+
+ @par
+ After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated:
+ <pre>
+ E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.
+ </pre>
+ The filter coefficients <code>b[k]</code> are then updated on a sample-by-sample basis:
+ <pre>
+ b[k] = b[k] + e[n] * (mu/E) * x[n-k], for k=0, 1, ..., numTaps-1
+ </pre>
+ where <code>mu</code> is the step size and controls the rate of coefficient convergence.
+ @par
+ In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+ Coefficients are stored in time reversed order.
+ @par
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ @par
+ <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
+ Samples in the state buffer are stored in the order:
+ @par
+ <pre>
+ {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+ </pre>
+ @par
+ Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples.
+ The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
+ to be avoided and yields a significant speed improvement.
+ The state variables are updated after each block of data is processed.
+
+ @par Instance Structure
+ The coefficients and state variables for a filter are stored together in an instance data structure.
+ A separate instance structure must be defined for each filter and
+ coefficient and state arrays cannot be shared among instances.
+ There are separate instance structure declarations for each of the 3 supported data types.
+
+ @par Initialization Functions
+ There is also an associated initialization function for each data type.
+ The initialization function performs the following operations:
+ - Sets the values of the internal structure fields.
+ - Zeros out the values in the state buffer.
+ To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero.
+ For Q7, Q15, and Q31 the following fields must also be initialized;
+ recipTable, postShift
+ @par
+ Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
+ @par Fixed-Point Behavior
+ Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter.
+ The following issues must be considered:
+ - Scaling of coefficients
+ - Overflow and saturation
+
+ @par Scaling of Coefficients
+ Filter coefficients are represented as fractional values and
+ coefficients are restricted to lie in the range <code>[-1 +1)</code>.
+ The fixed-point functions have an additional scaling parameter <code>postShift</code>.
+ At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
+ This essentially scales the filter coefficients by <code>2^postShift</code> and
+ allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
+ The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.
+
+ @par Overflow and Saturation
+ Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
+ described separately as part of the function specific documentation below.
+ */
/**
- * @addtogroup LMS_NORM
- * @{
+ @addtogroup LMS_NORM
+ @{
*/
-
- /**
- * @brief Processing function for floating-point normalized LMS filter.
- * @param[in] *S points to an instance of the floating-point normalized LMS filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[in] *pRef points to the block of reference data.
- * @param[out] *pOut points to the block of output data.
- * @param[out] *pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
+/**
+ @brief Processing function for floating-point normalized LMS filter.
+ @param[in] S points to an instance of the floating-point normalized LMS filter structure
+ @param[in] pSrc points to the block of input data
+ @param[in] pRef points to the block of reference data
+ @param[out] pOut points to the block of output data
+ @param[out] pErr points to the block of error data
+ @param[in] blockSize number of samples to process
+ @return none
+ */
void arm_lms_norm_f32(
- arm_lms_norm_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pRef,
- float32_t * pOut,
- float32_t * pErr,
- uint32_t blockSize)
+ arm_lms_norm_instance_f32 * S,
+ const float32_t * pSrc,
+ float32_t * pRef,
+ float32_t * pOut,
+ float32_t * pErr,
+ uint32_t blockSize)
{
- float32_t *pState = S->pState; /* State pointer */
- float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- float32_t *pStateCurnt; /* Points to the current sample of the state */
- float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
- float32_t mu = S->mu; /* Adaptive factor */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t tapCnt, blkCnt; /* Loop counters */
- float32_t energy; /* Energy of the input */
- float32_t sum, e, d; /* accumulator, error, reference data sample */
- float32_t w, x0, in; /* weight factor, temporary variable to hold input sample and state */
+ float32_t *pState = S->pState; /* State pointer */
+ float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ float32_t *pStateCurnt; /* Points to the current sample of the state */
+ float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
+ float32_t mu = S->mu; /* Adaptive factor */
+ float32_t acc, e; /* Accumulator, error */
+ float32_t w; /* Weight factor */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t tapCnt, blkCnt; /* Loop counters */
+ float32_t energy; /* Energy of the input */
+ float32_t x0, in; /* Temporary variable to hold input sample and state */
/* Initializations of error, difference, Coefficient update */
e = 0.0f;
- d = 0.0f;
w = 0.0f;
energy = S->energy;
@@ -189,14 +187,9 @@
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1U)]);
- /* Loop over blockSize number of values */
+ /* initialise loop count */
blkCnt = blockSize;
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
while (blkCnt > 0U)
{
/* Copy the new input sample into the state buffer */
@@ -205,8 +198,8 @@
/* Initialize pState pointer */
px = pState;
- /* Initialize coeff pointer */
- pb = (pCoeffs);
+ /* Initialize coefficient pointer */
+ pb = pCoeffs;
/* Read the sample from input buffer */
in = *pSrc++;
@@ -216,41 +209,52 @@
energy += in * in;
/* Set the accumulator to zero */
- sum = 0.0f;
+ acc = 0.0f;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = numTaps >> 2U;
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
- sum += (*px++) * (*pb++);
- sum += (*px++) * (*pb++);
- sum += (*px++) * (*pb++);
- sum += (*px++) * (*pb++);
+ acc += (*px++) * (*pb++);
- /* Decrement the loop counter */
+ acc += (*px++) * (*pb++);
+
+ acc += (*px++) * (*pb++);
+
+ acc += (*px++) * (*pb++);
+
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of samples */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
- sum += (*px++) * (*pb++);
+ acc += (*px++) * (*pb++);
/* Decrement the loop counter */
tapCnt--;
}
- /* The result in the accumulator, store in the destination buffer. */
- *pOut++ = sum;
+ /* Store the result from accumulator into the destination buffer. */
+ *pOut++ = acc;
/* Compute and store error */
- d = (float32_t) (*pRef++);
- e = d - sum;
+ e = (float32_t) *pRef++ - acc;
*pErr++ = e;
/* Calculation of Weighting factor for updating filter coefficients */
@@ -260,11 +264,13 @@
/* Initialize pState pointer */
px = pState;
- /* Initialize coeff pointer */
- pb = (pCoeffs);
+ /* Initialize coefficient pointer */
+ pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = numTaps >> 2U;
/* Update filter coefficients */
while (tapCnt > 0U)
@@ -282,127 +288,19 @@
*pb += w * (*px++);
pb++;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
- while (tapCnt > 0U)
- {
- /* Perform the multiply-accumulate */
- *pb += w * (*px++);
- pb++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- x0 = *pState;
-
- /* Advance state pointer by 1 for the next sample */
- pState = pState + 1;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- S->energy = energy;
- S->x0 = x0;
-
- /* Processing is complete. Now copy the last numTaps - 1 samples to the
- satrt of the state buffer. This prepares the state buffer for the
- next function call. */
-
- /* Points to the start of the pState buffer */
- pStateCurnt = S->pState;
-
- /* Loop unrolling for (numTaps - 1U)/4 samples copy */
- tapCnt = (numTaps - 1U) >> 2U;
-
- /* copy data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Calculate remaining number of copies */
- tapCnt = (numTaps - 1U) % 0x4U;
-
- /* Copy the remaining q31_t data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
- while (blkCnt > 0U)
- {
- /* Copy the new input sample into the state buffer */
- *pStateCurnt++ = *pSrc;
-
- /* Initialize pState pointer */
- px = pState;
-
- /* Initialize pCoeffs pointer */
- pb = pCoeffs;
-
- /* Read the sample from input buffer */
- in = *pSrc++;
-
- /* Update the energy calculation */
- energy -= x0 * x0;
- energy += in * in;
-
- /* Set the accumulator to zero */
- sum = 0.0f;
-
- /* Loop over numTaps number of values */
+ /* Initialize tapCnt with number of samples */
tapCnt = numTaps;
- while (tapCnt > 0U)
- {
- /* Perform the multiply-accumulate */
- sum += (*px++) * (*pb++);
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* The result in the accumulator is stored in the destination buffer. */
- *pOut++ = sum;
-
- /* Compute and store error */
- d = (float32_t) (*pRef++);
- e = d - sum;
- *pErr++ = e;
-
- /* Calculation of Weighting factor for updating filter coefficients */
- /* epsilon value 0.000000119209289f */
- w = (e * mu) / (energy + 0.000000119209289f);
-
- /* Initialize pState pointer */
- px = pState;
-
- /* Initialize pCcoeffs pointer */
- pb = pCoeffs;
-
- /* Loop over numTaps number of values */
- tapCnt = numTaps;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (tapCnt > 0U)
{
@@ -410,7 +308,7 @@
*pb += w * (*px++);
pb++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -419,36 +317,58 @@
/* Advance state pointer by 1 for the next sample */
pState = pState + 1;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
+ /* Save energy and x0 values for the next frame */
S->energy = energy;
S->x0 = x0;
- /* Processing is complete. Now copy the last numTaps - 1 samples to the
- satrt of the state buffer. This prepares the state buffer for the
- next function call. */
+ /* Processing is complete.
+ Now copy the last numTaps - 1 samples to the start of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
- /* Copy (numTaps - 1U) samples */
+ /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = (numTaps - 1U) >> 2U;
+
+ while (tapCnt > 0U)
+ {
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+ /* Initialize tapCnt with number of samples */
tapCnt = (numTaps - 1U);
- /* Copy the remaining q31_t data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
*pStateCurnt++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of LMS_NORM group
- */
+ @} end of LMS_NORM group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c
index 820c5c8..b2da988 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_lms_norm_init_f32.c
* Description: Floating-point NLMS filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,41 +29,41 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup LMS_NORM
- * @{
+ @addtogroup LMS_NORM
+ @{
*/
- /**
- * @brief Initialization function for floating-point normalized LMS filter.
- * @param[in] *S points to an instance of the floating-point LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] *pCoeffs points to coefficient buffer.
- * @param[in] *pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @return none.
- *
- * \par Description:
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * The initial filter coefficients serve as a starting point for the adaptive filter.
- * <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
- * where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_f32()</code>.
+/**
+ @brief Initialization function for floating-point normalized LMS filter.
+ @param[in] S points to an instance of the floating-point LMS filter structure
+ @param[in] numTaps number of filter coefficients
+ @param[in] pCoeffs points to coefficient buffer
+ @param[in] pState points to state buffer
+ @param[in] mu step size that controls filter coefficient updates
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ The initial filter coefficients serve as a starting point for the adaptive filter.
+ <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
+ where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_f32()</code>.
*/
void arm_lms_norm_init_f32(
- arm_lms_norm_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- float32_t mu,
- uint32_t blockSize)
+ arm_lms_norm_instance_f32 * S,
+ uint16_t numTaps,
+ float32_t * pCoeffs,
+ float32_t * pState,
+ float32_t mu,
+ uint32_t blockSize)
{
/* Assign filter taps */
S->numTaps = numTaps;
@@ -85,9 +85,8 @@
/* Initialise x0 to zero */
S->x0 = 0.0f;
-
}
/**
- * @} end of LMS_NORM group
+ @} end of LMS_NORM group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c
index 4bedbd9..a628f86 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c
@@ -1,15 +1,15 @@
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_norm_init_q15.c
- * Description: Q15 NLMS initialization function
+ * Description: Q15 NLMS filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,41 +30,40 @@
#include "arm_common_tables.h"
/**
- * @addtogroup LMS_NORM
- * @{
+ @addtogroup LMS_NORM
+ @{
*/
- /**
- * @brief Initialization function for Q15 normalized LMS filter.
- * @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] *pCoeffs points to coefficient buffer.
- * @param[in] *pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @param[in] postShift bit shift applied to coefficients.
- * @return none.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * The initial filter coefficients serve as a starting point for the adaptive filter.
- * <code>pState</code> points to the array of state variables and size of array is
- * <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed
- * by each call to <code>arm_lms_norm_q15()</code>.
+/**
+ @brief Initialization function for Q15 normalized LMS filter.
+ @param[in] S points to an instance of the Q15 normalized LMS filter structure.
+ @param[in] numTaps number of filter coefficients.
+ @param[in] pCoeffs points to coefficient buffer.
+ @param[in] pState points to state buffer.
+ @param[in] mu step size that controls filter coefficient updates.
+ @param[in] blockSize number of samples to process.
+ @param[in] postShift bit shift applied to coefficients.
+ @return none
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ The initial filter coefficients serve as a starting point for the adaptive filter.
+ <code>pState</code> points to the array of state variables and size of array is
+ <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed
+ by each call to <code>arm_lms_norm_q15()</code>.
*/
void arm_lms_norm_init_q15(
- arm_lms_norm_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- q15_t mu,
- uint32_t blockSize,
- uint8_t postShift)
+ arm_lms_norm_instance_q15 * S,
+ uint16_t numTaps,
+ q15_t * pCoeffs,
+ q15_t * pState,
+ q15_t mu,
+ uint32_t blockSize,
+ uint8_t postShift)
{
/* Assign filter taps */
S->numTaps = numTaps;
@@ -92,9 +91,8 @@
/* Initialise x0 to zero */
S->x0 = 0;
-
}
/**
- * @} end of LMS_NORM group
+ @} end of LMS_NORM group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c
index a2402d1..8ead4dd 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c
@@ -1,15 +1,15 @@
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_norm_init_q31.c
- * Description: Q31 NLMS initialization function
+ * Description: Q31 NLMS filter initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,40 +30,39 @@
#include "arm_common_tables.h"
/**
- * @addtogroup LMS_NORM
- * @{
+ @addtogroup LMS_NORM
+ @{
*/
- /**
- * @brief Initialization function for Q31 normalized LMS filter.
- * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] *pCoeffs points to coefficient buffer.
- * @param[in] *pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @param[in] postShift bit shift applied to coefficients.
- * @return none.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * The initial filter coefficients serve as a starting point for the adaptive filter.
- * <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
- * where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_q31()</code>.
+/**
+ @brief Initialization function for Q31 normalized LMS filter.
+ @param[in] S points to an instance of the Q31 normalized LMS filter structure.
+ @param[in] numTaps number of filter coefficients.
+ @param[in] pCoeffs points to coefficient buffer.
+ @param[in] pState points to state buffer.
+ @param[in] mu step size that controls filter coefficient updates.
+ @param[in] blockSize number of samples to process.
+ @param[in] postShift bit shift applied to coefficients.
+ @return none
+
+ @par Details
+ <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+ <pre>
+ {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+ </pre>
+ The initial filter coefficients serve as a starting point for the adaptive filter.
+ <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
+ where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_q31()</code>.
*/
void arm_lms_norm_init_q31(
- arm_lms_norm_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- q31_t mu,
- uint32_t blockSize,
- uint8_t postShift)
+ arm_lms_norm_instance_q31 * S,
+ uint16_t numTaps,
+ q31_t * pCoeffs,
+ q31_t * pState,
+ q31_t mu,
+ uint32_t blockSize,
+ uint8_t postShift)
{
/* Assign filter taps */
S->numTaps = numTaps;
@@ -71,7 +70,7 @@
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
- /* Clear state buffer and size is always blockSize + numTaps - 1 */
+ /* Clear state buffer and size is always blockSize + numTaps - 1 */
memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
/* Assign post Shift value applied to coefficients */
@@ -91,9 +90,8 @@
/* Initialise x0 to zero */
S->x0 = 0;
-
}
/**
- * @} end of LMS_NORM group
+ @} end of LMS_NORM group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c
index 70012ea..2705a39 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c
@@ -1,15 +1,15 @@
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_norm_q15.c
- * Description: Q15 NLMS filter
+ * Description: Processing function for Q15 normalized LMS filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,68 +29,65 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup LMS_NORM
- * @{
+ @addtogroup LMS_NORM
+ @{
*/
/**
-* @brief Processing function for Q15 normalized LMS filter.
-* @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
-* @param[in] *pSrc points to the block of input data.
-* @param[in] *pRef points to the block of reference data.
-* @param[out] *pOut points to the block of output data.
-* @param[out] *pErr points to the block of error data.
-* @param[in] blockSize number of samples to process.
-* @return none.
-*
-* <b>Scaling and Overflow Behavior:</b>
-* \par
-* The function is implemented using a 64-bit internal accumulator.
-* Both coefficients and state variables are represented in 1.15 format and
-* multiplications yield a 2.30 result. The 2.30 intermediate results are
-* accumulated in a 64-bit accumulator in 34.30 format.
-* There is no risk of internal overflow with this approach and the full
-* precision of intermediate multiplications is preserved. After all additions
-* have been performed, the accumulator is truncated to 34.15 format by
-* discarding low 15 bits. Lastly, the accumulator is saturated to yield a
-* result in 1.15 format.
-*
-* \par
-* In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.
-*
+ @brief Processing function for Q15 normalized LMS filter.
+ @param[in] S points to an instance of the Q15 normalized LMS filter structure
+ @param[in] pSrc points to the block of input data
+ @param[in] pRef points to the block of reference data
+ @param[out] pOut points to the block of output data
+ @param[out] pErr points to the block of error data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ Both coefficients and state variables are represented in 1.15 format and
+ multiplications yield a 2.30 result. The 2.30 intermediate results are
+ accumulated in a 64-bit accumulator in 34.30 format.
+ There is no risk of internal overflow with this approach and the full
+ precision of intermediate multiplications is preserved. After all additions
+ have been performed, the accumulator is truncated to 34.15 format by
+ discarding low 15 bits. Lastly, the accumulator is saturated to yield a
+ result in 1.15 format.
+ @par
+ In this filter, filter coefficients are updated for each sample and the
+ updation of filter cofficients are saturted.
*/
void arm_lms_norm_q15(
- arm_lms_norm_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pRef,
- q15_t * pOut,
- q15_t * pErr,
- uint32_t blockSize)
+ arm_lms_norm_instance_q15 * S,
+ const q15_t * pSrc,
+ q15_t * pRef,
+ q15_t * pOut,
+ q15_t * pErr,
+ uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q15_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
- q15_t mu = S->mu; /* Adaptive factor */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t tapCnt, blkCnt; /* Loop counters */
- q31_t energy; /* Energy of the input */
- q63_t acc; /* Accumulator */
- q15_t e = 0, d = 0; /* error, reference data sample */
- q15_t w = 0, in; /* weight factor and state */
- q15_t x0; /* temporary variable to hold input sample */
- //uint32_t shift = (uint32_t) S->postShift + 1U; /* Shift to be applied to the output */
- q15_t errorXmu, oneByEnergy; /* Temporary variables to store error and mu product and reciprocal of energy */
- q15_t postShift; /* Post shift to be applied to weight after reciprocal calculation */
- q31_t coef; /* Teporary variable for coefficient */
- q31_t acc_l, acc_h;
- int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */
- int32_t uShift = (32 - lShift);
+ q15_t *pState = S->pState; /* State pointer */
+ q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCurnt; /* Points to the current sample of the state */
+ q15_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
+ q15_t mu = S->mu; /* Adaptive factor */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t tapCnt, blkCnt; /* Loop counters */
+ q63_t acc; /* Accumulator */
+ q31_t energy; /* Energy of the input */
+ q15_t e = 0, d = 0; /* Error, reference data sample */
+ q15_t w = 0, in; /* Weight factor and state */
+ q15_t x0; /* Temporary variable to hold input sample */
+ q15_t errorXmu, oneByEnergy; /* Temporary variables to store error and mu product and reciprocal of energy */
+ q15_t postShift; /* Post shift to be applied to weight after reciprocal calculation */
+ q31_t coef; /* Temporary variable for coefficient */
+ q31_t acc_l, acc_h; /* Temporary input */
+ int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */
+ int32_t uShift = (32 - lShift);
energy = S->energy;
x0 = S->x0;
@@ -99,14 +96,9 @@
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1U)]);
- /* Loop over blockSize number of values */
+ /* initialise loop count */
blkCnt = blockSize;
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
while (blkCnt > 0U)
{
/* Copy the new input sample into the state buffer */
@@ -115,197 +107,7 @@
/* Initialize pState pointer */
px = pState;
- /* Initialize coeff pointer */
- pb = (pCoeffs);
-
- /* Read the sample from input buffer */
- in = *pSrc++;
-
- /* Update the energy calculation */
- energy -= (((q31_t) x0 * (x0)) >> 15);
- energy += (((q31_t) in * (in)) >> 15);
-
- /* Set the accumulator to zero */
- acc = 0;
-
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
-
- while (tapCnt > 0U)
- {
-
- /* Perform the multiply-accumulate */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
- acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
- acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-
-#else
-
- acc += (((q31_t) * px++ * (*pb++)));
- acc += (((q31_t) * px++ * (*pb++)));
- acc += (((q31_t) * px++ * (*pb++)));
- acc += (((q31_t) * px++ * (*pb++)));
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
- tapCnt = numTaps % 0x4U;
-
- while (tapCnt > 0U)
- {
- /* Perform the multiply-accumulate */
- acc += (((q31_t) * px++ * (*pb++)));
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Calc lower part of acc */
- acc_l = acc & 0xffffffff;
-
- /* Calc upper part of acc */
- acc_h = (acc >> 32) & 0xffffffff;
-
- /* Apply shift for lower part of acc and upper part of acc */
- acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
- /* Converting the result to 1.15 format and saturate the output */
- acc = __SSAT(acc, 16U);
-
- /* Store the result from accumulator into the destination buffer. */
- *pOut++ = (q15_t) acc;
-
- /* Compute and store error */
- d = *pRef++;
- e = d - (q15_t) acc;
- *pErr++ = e;
-
- /* Calculation of 1/energy */
- postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
- &oneByEnergy, S->recipTable);
-
- /* Calculation of e * mu value */
- errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
-
- /* Calculation of (e * mu) * (1/energy) value */
- acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
-
- /* Weighting factor for the normalized version */
- w = (q15_t) __SSAT((q31_t) acc, 16);
-
- /* Initialize pState pointer */
- px = pState;
-
- /* Initialize coeff pointer */
- pb = (pCoeffs);
-
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
-
- /* Update filter coefficients */
- while (tapCnt > 0U)
- {
- coef = *pb + (((q31_t) w * (*px++)) >> 15);
- *pb++ = (q15_t) __SSAT((coef), 16);
- coef = *pb + (((q31_t) w * (*px++)) >> 15);
- *pb++ = (q15_t) __SSAT((coef), 16);
- coef = *pb + (((q31_t) w * (*px++)) >> 15);
- *pb++ = (q15_t) __SSAT((coef), 16);
- coef = *pb + (((q31_t) w * (*px++)) >> 15);
- *pb++ = (q15_t) __SSAT((coef), 16);
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
- tapCnt = numTaps % 0x4U;
-
- while (tapCnt > 0U)
- {
- /* Perform the multiply-accumulate */
- coef = *pb + (((q31_t) w * (*px++)) >> 15);
- *pb++ = (q15_t) __SSAT((coef), 16);
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Read the sample from state buffer */
- x0 = *pState;
-
- /* Advance state pointer by 1 for the next sample */
- pState = pState + 1U;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Save energy and x0 values for the next frame */
- S->energy = (q15_t) energy;
- S->x0 = x0;
-
- /* Processing is complete. Now copy the last numTaps - 1 samples to the
- satrt of the state buffer. This prepares the state buffer for the
- next function call. */
-
- /* Points to the start of the pState buffer */
- pStateCurnt = S->pState;
-
- /* Calculation of count for copying integer writes */
- tapCnt = (numTaps - 1U) >> 2;
-
- while (tapCnt > 0U)
- {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-#else
-
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
-
-#endif
-
- tapCnt--;
-
- }
-
- /* Calculation of count for remaining q15_t data */
- tapCnt = (numTaps - 1U) % 0x4U;
-
- /* copy data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- while (blkCnt > 0U)
- {
- /* Copy the new input sample into the state buffer */
- *pStateCurnt++ = *pSrc;
-
- /* Initialize pState pointer */
- px = pState;
-
- /* Initialize pCoeffs pointer */
+ /* Initialize coefficient pointer */
pb = pCoeffs;
/* Read the sample from input buffer */
@@ -318,13 +120,36 @@
/* Set the accumulator to zero */
acc = 0;
- /* Loop over numTaps number of values */
- tapCnt = numTaps;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = numTaps >> 2U;
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
- acc += (((q31_t) * px++ * (*pb++)));
+ /* acc += b[N] * x[n-N] + b[N-1] * x[n-N-1] */
+ acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
+ acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = numTaps % 0x4U;
+
+#else
+
+ /* Initialize tapCnt with number of samples */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (tapCnt > 0U)
+ {
+ /* Perform the multiply-accumulate */
+ acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
/* Decrement the loop counter */
tapCnt--;
@@ -342,9 +167,6 @@
/* Converting the result to 1.15 format and saturate the output */
acc = __SSAT(acc, 16U);
- /* Converting the result to 1.15 format */
- //acc = __SSAT((acc >> (16U - shift)), 16U);
-
/* Store the result from accumulator into the destination buffer. */
*pOut++ = (q15_t) acc;
@@ -354,8 +176,7 @@
*pErr++ = e;
/* Calculation of 1/energy */
- postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
- &oneByEnergy, S->recipTable);
+ postShift = arm_recip_q15((q15_t) energy + DELTA_Q15, &oneByEnergy, S->recipTable);
/* Calculation of e * mu value */
errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
@@ -369,29 +190,59 @@
/* Initialize pState pointer */
px = pState;
- /* Initialize coeff pointer */
- pb = (pCoeffs);
+ /* Initialize coefficient pointer */
+ pb = pCoeffs;
- /* Loop over numTaps number of values */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = numTaps >> 2U;
+
+ /* Update filter coefficients */
+ while (tapCnt > 0U)
+ {
+ coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+ *pb++ = (q15_t) __SSAT(coef, 16);
+
+ coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+ *pb++ = (q15_t) __SSAT(coef, 16);
+
+ coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+ *pb++ = (q15_t) __SSAT(coef, 16);
+
+ coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+ *pb++ = (q15_t) __SSAT(coef, 16);
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = numTaps % 0x4U;
+
+#else
+
+ /* Initialize tapCnt with number of samples */
tapCnt = numTaps;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
- coef = *pb + (((q31_t) w * (*px++)) >> 15);
- *pb++ = (q15_t) __SSAT((coef), 16);
+ coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+ *pb++ = (q15_t) __SSAT(coef, 16);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* Read the sample from state buffer */
x0 = *pState;
/* Advance state pointer by 1 for the next sample */
- pState = pState + 1U;
+ pState = pState + 1;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -399,30 +250,48 @@
S->energy = (q15_t) energy;
S->x0 = x0;
- /* Processing is complete. Now copy the last numTaps - 1 samples to the
- satrt of the state buffer. This prepares the state buffer for the
- next function call. */
+ /* Processing is complete.
+ Now copy the last numTaps - 1 samples to the start of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
- /* copy (numTaps - 1U) data */
+ /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = (numTaps - 1U) >> 2U;
+
+ while (tapCnt > 0U)
+ {
+ write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
+ write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+ /* Initialize tapCnt with number of samples */
tapCnt = (numTaps - 1U);
- /* copy data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
*pStateCurnt++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
-
/**
- * @} end of LMS_NORM group
- */
+ @} end of LMS_NORM group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c
index 9711738..cb909b2 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c
@@ -3,13 +3,13 @@
* Title: arm_lms_norm_q31.c
* Description: Processing function for the Q31 NLMS filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,69 +29,65 @@
#include "arm_math.h"
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup LMS_NORM
- * @{
+ @addtogroup LMS_NORM
+ @{
*/
/**
-* @brief Processing function for Q31 normalized LMS filter.
-* @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
-* @param[in] *pSrc points to the block of input data.
-* @param[in] *pRef points to the block of reference data.
-* @param[out] *pOut points to the block of output data.
-* @param[out] *pErr points to the block of error data.
-* @param[in] blockSize number of samples to process.
-* @return none.
-*
-* <b>Scaling and Overflow Behavior:</b>
-* \par
-* The function is implemented using an internal 64-bit accumulator.
-* The accumulator has a 2.62 format and maintains full precision of the intermediate
-* multiplication results but provides only a single guard bit.
-* Thus, if the accumulator result overflows it wraps around rather than clip.
-* In order to avoid overflows completely the input signal must be scaled down by
-* log2(numTaps) bits. The reference signal should not be scaled down.
-* After all multiply-accumulates are performed, the 2.62 accumulator is shifted
-* and saturated to 1.31 format to yield the final result.
-* The output signal and error signal are in 1.31 format.
-*
-* \par
-* In this filter, filter coefficients are updated for each sample and the
-* updation of filter cofficients are saturted.
-*
-*/
+ @brief Processing function for Q31 normalized LMS filter.
+ @param[in] S points to an instance of the Q31 normalized LMS filter structure
+ @param[in] pSrc points to the block of input data
+ @param[in] pRef points to the block of reference data
+ @param[out] pOut points to the block of output data
+ @param[out] pErr points to the block of error data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The accumulator has a 2.62 format and maintains full precision of the intermediate
+ multiplication results but provides only a single guard bit.
+ Thus, if the accumulator result overflows it wraps around rather than clip.
+ In order to avoid overflows completely the input signal must be scaled down by
+ log2(numTaps) bits. The reference signal should not be scaled down.
+ After all multiply-accumulates are performed, the 2.62 accumulator is shifted
+ and saturated to 1.31 format to yield the final result.
+ The output signal and error signal are in 1.31 format.
+ @par
+ In this filter, filter coefficients are updated for each sample and the
+ updation of filter cofficients are saturted.
+ */
void arm_lms_norm_q31(
- arm_lms_norm_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pRef,
- q31_t * pOut,
- q31_t * pErr,
- uint32_t blockSize)
+ arm_lms_norm_instance_q31 * S,
+ const q31_t * pSrc,
+ q31_t * pRef,
+ q31_t * pOut,
+ q31_t * pErr,
+ uint32_t blockSize)
{
- q31_t *pState = S->pState; /* State pointer */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *pStateCurnt; /* Points to the current sample of the state */
- q31_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
- q31_t mu = S->mu; /* Adaptive factor */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- uint32_t tapCnt, blkCnt; /* Loop counters */
- q63_t energy; /* Energy of the input */
- q63_t acc; /* Accumulator */
- q31_t e = 0, d = 0; /* error, reference data sample */
- q31_t w = 0, in; /* weight factor and state */
- q31_t x0; /* temporary variable to hold input sample */
-// uint32_t shift = 32U - ((uint32_t) S->postShift + 1U); /* Shift to be applied to the output */
- q31_t errorXmu, oneByEnergy; /* Temporary variables to store error and mu product and reciprocal of energy */
- q31_t postShift; /* Post shift to be applied to weight after reciprocal calculation */
- q31_t coef; /* Temporary variable for coef */
- q31_t acc_l, acc_h; /* temporary input */
- uint32_t uShift = ((uint32_t) S->postShift + 1U);
- uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */
+ q31_t *pState = S->pState; /* State pointer */
+ q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *pStateCurnt; /* Points to the current sample of the state */
+ q31_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
+ q31_t mu = S->mu; /* Adaptive factor */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t tapCnt, blkCnt; /* Loop counters */
+ q63_t acc; /* Accumulator */
+ q63_t energy; /* Energy of the input */
+ q31_t e = 0; /* Error data sample */
+ q31_t w = 0, in; /* Weight factor and state */
+ q31_t x0; /* Temporary variable to hold input sample */
+ q31_t errorXmu, oneByEnergy; /* Temporary variables to store error and mu product and reciprocal of energy */
+ q31_t postShift; /* Post shift to be applied to weight after reciprocal calculation */
+ q31_t coef; /* Temporary variable for coef */
+ q31_t acc_l, acc_h; /* Temporary input */
+ uint32_t uShift = ((uint32_t) S->postShift + 1U);
+ uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */
energy = S->energy;
x0 = S->x0;
@@ -100,55 +96,64 @@
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1U)]);
- /* Loop over blockSize number of values */
+ /* initialise loop count */
blkCnt = blockSize;
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
while (blkCnt > 0U)
{
-
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc;
/* Initialize pState pointer */
px = pState;
- /* Initialize coeff pointer */
- pb = (pCoeffs);
+ /* Initialize coefficient pointer */
+ pb = pCoeffs;
/* Read the sample from input buffer */
in = *pSrc++;
/* Update the energy calculation */
- energy = (q31_t) ((((q63_t) energy << 32) -
- (((q63_t) x0 * x0) << 1)) >> 32);
+ energy = (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32);
energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
/* Set the accumulator to zero */
acc = 0;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = numTaps >> 2U;
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
- acc += ((q63_t) (*px++)) * (*pb++);
- acc += ((q63_t) (*px++)) * (*pb++);
- acc += ((q63_t) (*px++)) * (*pb++);
+ /* acc += b[N] * x[n-N] */
acc += ((q63_t) (*px++)) * (*pb++);
- /* Decrement the loop counter */
+ /* acc += b[N-1] * x[n-N-1] */
+ acc += ((q63_t) (*px++)) * (*pb++);
+
+ /* acc += b[N-2] * x[n-N-2] */
+ acc += ((q63_t) (*px++)) * (*pb++);
+
+ /* acc += b[N-3] * x[n-N-3] */
+ acc += ((q63_t) (*px++)) * (*pb++);
+
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of samples */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
@@ -171,13 +176,11 @@
*pOut++ = (q31_t) acc;
/* Compute and store error */
- d = *pRef++;
- e = d - (q31_t) acc;
+ e = *pRef++ - (q31_t) acc;
*pErr++ = e;
/* Calculates the reciprocal of energy */
- postShift = arm_recip_q31(energy + DELTA_Q31,
- &oneByEnergy, &S->recipTable[0]);
+ postShift = arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]);
/* Calculation of product of (e * mu) */
errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
@@ -188,11 +191,13 @@
/* Initialize pState pointer */
px = pState;
- /* Initialize coeff pointer */
- pb = (pCoeffs);
+ /* Initialize coefficient pointer */
+ pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = numTaps >> 2U;
/* Update filter coefficients */
while (tapCnt > 0U)
@@ -218,162 +223,28 @@
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
pb++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
- while (tapCnt > 0U)
- {
- /* Perform the multiply-accumulate */
- coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
- *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
- pb++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Read the sample from state buffer */
- x0 = *pState;
-
- /* Advance state pointer by 1 for the next sample */
- pState = pState + 1;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Save energy and x0 values for the next frame */
- S->energy = (q31_t) energy;
- S->x0 = x0;
-
- /* Processing is complete. Now copy the last numTaps - 1 samples to the
- satrt of the state buffer. This prepares the state buffer for the
- next function call. */
-
- /* Points to the start of the pState buffer */
- pStateCurnt = S->pState;
-
- /* Loop unrolling for (numTaps - 1U) samples copy */
- tapCnt = (numTaps - 1U) >> 2U;
-
- /* copy data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Calculate remaining number of copies */
- tapCnt = (numTaps - 1U) % 0x4U;
-
- /* Copy the remaining q31_t data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
- while (blkCnt > 0U)
- {
-
- /* Copy the new input sample into the state buffer */
- *pStateCurnt++ = *pSrc;
-
- /* Initialize pState pointer */
- px = pState;
-
- /* Initialize pCoeffs pointer */
- pb = pCoeffs;
-
- /* Read the sample from input buffer */
- in = *pSrc++;
-
- /* Update the energy calculation */
- energy =
- (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32);
- energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
-
- /* Set the accumulator to zero */
- acc = 0;
-
- /* Loop over numTaps number of values */
+ /* Initialize tapCnt with number of samples */
tapCnt = numTaps;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
- acc += ((q63_t) (*px++)) * (*pb++);
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Converting the result to 1.31 format */
- /* Converting the result to 1.31 format */
- /* Calc lower part of acc */
- acc_l = acc & 0xffffffff;
-
- /* Calc upper part of acc */
- acc_h = (acc >> 32) & 0xffffffff;
-
- acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-
- //acc = (q31_t) (acc >> shift);
-
- /* Store the result from accumulator into the destination buffer. */
- *pOut++ = (q31_t) acc;
-
- /* Compute and store error */
- d = *pRef++;
- e = d - (q31_t) acc;
- *pErr++ = e;
-
- /* Calculates the reciprocal of energy */
- postShift =
- arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]);
-
- /* Calculation of product of (e * mu) */
- errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
-
- /* Weighting factor for the normalized version */
- w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
-
- /* Initialize pState pointer */
- px = pState;
-
- /* Initialize coeff pointer */
- pb = (pCoeffs);
-
- /* Loop over numTaps number of values */
- tapCnt = numTaps;
-
- while (tapCnt > 0U)
- {
- /* Perform the multiply-accumulate */
- /* coef is in 2.30 format */
coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
- /* get coef in 1.31 format by left shifting */
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
- /* update coefficient buffer to next coefficient */
pb++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
@@ -383,7 +254,7 @@
/* Advance state pointer by 1 for the next sample */
pState = pState + 1;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -391,29 +262,50 @@
S->energy = (q31_t) energy;
S->x0 = x0;
- /* Processing is complete. Now copy the last numTaps - 1 samples to the
- start of the state buffer. This prepares the state buffer for the
- next function call. */
+ /* Processing is complete.
+ Now copy the last numTaps - 1 samples to the start of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
- /* Loop for (numTaps - 1U) samples copy */
+ /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = (numTaps - 1U) >> 2U;
+
+ while (tapCnt > 0U)
+ {
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+ /* Initialize tapCnt with number of samples */
tapCnt = (numTaps - 1U);
- /* Copy the remaining q31_t data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
*pStateCurnt++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of LMS_NORM group
+ @} end of LMS_NORM group
*/
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c
index 6690294..d5fc717 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c
@@ -1,15 +1,15 @@
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_q15.c
- * Description: Processing function for the Q15 LMS filter
+ * Description: Processing function for Q15 LMS filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -27,73 +27,66 @@
*/
#include "arm_math.h"
+
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup LMS
- * @{
+ @addtogroup LMS
+ @{
*/
- /**
- * @brief Processing function for Q15 LMS filter.
- * @param[in] *S points to an instance of the Q15 LMS filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[in] *pRef points to the block of reference data.
- * @param[out] *pOut points to the block of output data.
- * @param[out] *pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- *
- * \par Scaling and Overflow Behavior:
- * The function is implemented using a 64-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.
- *
- * \par
- * In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.
- *
+/**
+ @brief Processing function for Q15 LMS filter.
+ @param[in] S points to an instance of the Q15 LMS filter structure
+ @param[in] pSrc points to the block of input data
+ @param[in] pRef points to the block of reference data
+ @param[out] pOut points to the block of output data
+ @param[out] pErr points to the block of error data
+ @param[in] blockSize number of samples to process
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+ The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+ There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+ After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+ Lastly, the accumulator is saturated to yield a result in 1.15 format.
+ @par
+ In this filter, filter coefficients are updated for each sample and
+ the updation of filter cofficients are saturted.
*/
void arm_lms_q15(
const arm_lms_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pRef,
- q15_t * pOut,
- q15_t * pErr,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pRef,
+ q15_t * pOut,
+ q15_t * pErr,
+ uint32_t blockSize)
{
- q15_t *pState = S->pState; /* State pointer */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q15_t *pStateCurnt; /* Points to the current sample of the state */
- q15_t mu = S->mu; /* Adaptive factor */
- q15_t *px; /* Temporary pointer for state */
- q15_t *pb; /* Temporary pointer for coefficient buffer */
- uint32_t tapCnt, blkCnt; /* Loop counters */
- q63_t acc; /* Accumulator */
- q15_t e = 0; /* error of data sample */
- q15_t alpha; /* Intermediate constant for taps update */
- q31_t coef; /* Teporary variable for coefficient */
- q31_t acc_l, acc_h;
- int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */
- int32_t uShift = (32 - lShift);
-
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
+ q15_t *pState = S->pState; /* State pointer */
+ q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q15_t *pStateCurnt; /* Points to the current sample of the state */
+ q15_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
+ q15_t mu = S->mu; /* Adaptive factor */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t tapCnt, blkCnt; /* Loop counters */
+ q63_t acc; /* Accumulator */
+ q15_t e = 0; /* Error of data sample */
+ q15_t alpha; /* Intermediate constant for taps update */
+ q31_t coef; /* Temporary variable for coefficient */
+ q31_t acc_l, acc_h; /* Temporary input */
+ int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */
+ int32_t uShift = (32 - lShift);
/* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1U)]);
- /* Initializing blkCnt with blockSize */
+ /* initialise loop count */
blkCnt = blockSize;
while (blkCnt > 0U)
@@ -101,7 +94,7 @@
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
- /* Initialize state pointer */
+ /* Initialize pState pointer */
px = pState;
/* Initialize coefficient pointer */
@@ -110,35 +103,32 @@
/* Set the accumulator to zero */
acc = 0;
- /* Loop unrolling. Process 4 taps at a time. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
tapCnt = numTaps >> 2U;
while (tapCnt > 0U)
{
- /* acc += b[N] * x[n-N] + b[N-1] * x[n-N-1] */
/* Perform the multiply-accumulate */
-#ifndef UNALIGNED_SUPPORT_DISABLE
+ /* acc += b[N] * x[n-N] + b[N-1] * x[n-N-1] */
+ acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
+ acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
- acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
- acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-
-#else
-
- acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
- acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
- acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
- acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of samples */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
@@ -158,211 +148,115 @@
acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
/* Converting the result to 1.15 format and saturate the output */
- acc = __SSAT(acc, 16);
+ acc = __SSAT(acc, 16U);
/* Store the result from accumulator into the destination buffer. */
*pOut++ = (q15_t) acc;
/* Compute and store error */
e = *pRef++ - (q15_t) acc;
-
*pErr++ = (q15_t) e;
/* Compute alpha i.e. intermediate constant for taps update */
alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
- /* Initialize state pointer */
+ /* Initialize pState pointer */
/* Advance state pointer by 1 for the next sample */
px = pState++;
/* Initialize coefficient pointer */
pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
tapCnt = numTaps >> 2U;
/* Update filter coefficients */
while (tapCnt > 0U)
{
- coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
- *pb++ = (q15_t) __SSAT((coef), 16);
- coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
- *pb++ = (q15_t) __SSAT((coef), 16);
- coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
- *pb++ = (q15_t) __SSAT((coef), 16);
- coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
+ coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
*pb++ = (q15_t) __SSAT((coef), 16);
- /* Decrement the loop counter */
+ coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+ *pb++ = (q15_t) __SSAT((coef), 16);
+
+ coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+ *pb++ = (q15_t) __SSAT((coef), 16);
+
+ coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+ *pb++ = (q15_t) __SSAT((coef), 16);
+
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of samples */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
- coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
+ coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
*pb++ = (q15_t) __SSAT((coef), 16);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
-
}
- /* Processing is complete. Now copy the last numTaps - 1 samples to the
- satrt of the state buffer. This prepares the state buffer for the
- next function call. */
+ /* Processing is complete.
+ Now copy the last numTaps - 1 samples to the start of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
- /* Calculation of count for copying integer writes */
- tapCnt = (numTaps - 1U) >> 2;
-
- while (tapCnt > 0U)
- {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
- *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-#else
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
-#endif
-
- tapCnt--;
-
- }
-
- /* Calculation of count for remaining q15_t data */
- tapCnt = (numTaps - 1U) % 0x4U;
-
/* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = (numTaps - 1U) >> 2U;
+
while (tapCnt > 0U)
{
- *pStateCurnt++ = *pState++;
+ write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
+ write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = (numTaps - 1U) % 0x4U;
+
#else
- /* Run the below code for Cortex-M0 */
-
- /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
- /* pStateCurnt points to the location where the new input data should be written */
- pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
- /* Copy the new input sample into the state buffer */
- *pStateCurnt++ = *pSrc++;
-
- /* Initialize pState pointer */
- px = pState;
-
- /* Initialize pCoeffs pointer */
- pb = pCoeffs;
-
- /* Set the accumulator to zero */
- acc = 0;
-
- /* Loop over numTaps number of values */
- tapCnt = numTaps;
-
- while (tapCnt > 0U)
- {
- /* Perform the multiply-accumulate */
- acc += (q63_t) ((q31_t) (*px++) * (*pb++));
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Calc lower part of acc */
- acc_l = acc & 0xffffffff;
-
- /* Calc upper part of acc */
- acc_h = (acc >> 32) & 0xffffffff;
-
- /* Apply shift for lower part of acc and upper part of acc */
- acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
- /* Converting the result to 1.15 format and saturate the output */
- acc = __SSAT(acc, 16);
-
- /* Store the result from accumulator into the destination buffer. */
- *pOut++ = (q15_t) acc;
-
- /* Compute and store error */
- e = *pRef++ - (q15_t) acc;
-
- *pErr++ = (q15_t) e;
-
- /* Compute alpha i.e. intermediate constant for taps update */
- alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
-
- /* Initialize pState pointer */
- /* Advance state pointer by 1 for the next sample */
- px = pState++;
-
- /* Initialize pCoeffs pointer */
- pb = pCoeffs;
-
- /* Loop over numTaps number of values */
- tapCnt = numTaps;
-
- while (tapCnt > 0U)
- {
- /* Perform the multiply-accumulate */
- coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
- *pb++ = (q15_t) __SSAT((coef), 16);
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Decrement the loop counter */
- blkCnt--;
-
- }
-
- /* Processing is complete. Now copy the last numTaps - 1 samples to the
- start of the state buffer. This prepares the state buffer for the
- next function call. */
-
- /* Points to the start of the pState buffer */
- pStateCurnt = S->pState;
-
- /* Copy (numTaps - 1U) samples */
+ /* Initialize tapCnt with number of samples */
tapCnt = (numTaps - 1U);
- /* Copy the data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
*pStateCurnt++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of LMS group
- */
+ @} end of LMS group
+ */
diff --git a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c
index 816e589..aaba0da 100644
--- a/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c
+++ b/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c
@@ -3,13 +3,13 @@
* Title: arm_lms_q31.c
* Description: Processing function for the Q31 LMS filter
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -27,83 +27,78 @@
*/
#include "arm_math.h"
+
/**
- * @ingroup groupFilters
+ @ingroup groupFilters
*/
/**
- * @addtogroup LMS
- * @{
+ @addtogroup LMS
+ @{
*/
- /**
- * @brief Processing function for Q31 LMS filter.
- * @param[in] *S points to an instance of the Q15 LMS filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[in] *pRef points to the block of reference data.
- * @param[out] *pOut points to the block of output data.
- * @param[out] *pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- *
- * \par Scaling and Overflow Behavior:
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate
- * multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clips.
- * In order to avoid overflows completely the input signal must be scaled down by
- * log2(numTaps) bits.
- * The reference signal should not be scaled down.
- * After all multiply-accumulates are performed, the 2.62 accumulator is shifted
- * and saturated to 1.31 format to yield the final result.
- * The output signal and error signal are in 1.31 format.
- *
- * \par
- * In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.
+/**
+ @brief Processing function for Q31 LMS filter.
+ @param[in] S points to an instance of the Q31 LMS filter structure.
+ @param[in] pSrc points to the block of input data.
+ @param[in] pRef points to the block of reference data.
+ @param[out] pOut points to the block of output data.
+ @param[out] pErr points to the block of error data.
+ @param[in] blockSize number of samples to process.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The accumulator has a 2.62 format and maintains full precision of the intermediate
+ multiplication results but provides only a single guard bit.
+ Thus, if the accumulator result overflows it wraps around rather than clips.
+ In order to avoid overflows completely the input signal must be scaled down by
+ log2(numTaps) bits.
+ The reference signal should not be scaled down.
+ After all multiply-accumulates are performed, the 2.62 accumulator is shifted
+ and saturated to 1.31 format to yield the final result.
+ The output signal and error signal are in 1.31 format.
+ @par
+ In this filter, filter coefficients are updated for each sample and
+ the updation of filter cofficients are saturted.
*/
void arm_lms_q31(
const arm_lms_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pRef,
- q31_t * pOut,
- q31_t * pErr,
- uint32_t blockSize)
-{
- q31_t *pState = S->pState; /* State pointer */
- uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
- q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
- q31_t *pStateCurnt; /* Points to the current sample of the state */
- q31_t mu = S->mu; /* Adaptive factor */
- q31_t *px; /* Temporary pointer for state */
- q31_t *pb; /* Temporary pointer for coefficient buffer */
- uint32_t tapCnt, blkCnt; /* Loop counters */
- q63_t acc; /* Accumulator */
- q31_t e = 0; /* error of data sample */
- q31_t alpha; /* Intermediate constant for taps update */
- q31_t coef; /* Temporary variable for coef */
- q31_t acc_l, acc_h; /* temporary input */
- uint32_t uShift = ((uint32_t) S->postShift + 1U);
- uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */
+ const q31_t * pSrc,
+ q31_t * pRef,
+ q31_t * pOut,
+ q31_t * pErr,
+ uint32_t blockSize)
+{
+ q31_t *pState = S->pState; /* State pointer */
+ q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+ q31_t *pStateCurnt; /* Points to the current sample of the state */
+ q31_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
+ q31_t mu = S->mu; /* Adaptive factor */
+ uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+ uint32_t tapCnt, blkCnt; /* Loop counters */
+ q63_t acc; /* Accumulator */
+ q31_t e = 0; /* Error of data sample */
+ q31_t alpha; /* Intermediate constant for taps update */
+ q31_t coef; /* Temporary variable for coef */
+ q31_t acc_l, acc_h; /* Temporary input */
+ uint32_t uShift = ((uint32_t) S->postShift + 1U);
+ uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */
/* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1U)]);
- /* Initializing blkCnt with blockSize */
+ /* initialise loop count */
blkCnt = blockSize;
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
while (blkCnt > 0U)
{
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
- /* Initialize state pointer */
+ /* Initialize pState pointer */
px = pState;
/* Initialize coefficient pointer */
@@ -112,8 +107,10 @@
/* Set the accumulator to zero */
acc = 0;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = numTaps >> 2U;
while (tapCnt > 0U)
{
@@ -130,13 +127,20 @@
/* acc += b[N-3] * x[n-N-3] */
acc += ((q63_t) (*px++)) * (*pb++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
+#else
+
+ /* Initialize tapCnt with number of samples */
+ tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
/* Perform the multiply-accumulate */
@@ -160,25 +164,28 @@
/* Compute and store error */
e = *pRef++ - (q31_t) acc;
-
- *pErr++ = (q31_t) e;
+ *pErr++ = e;
/* Compute alpha i.e. intermediate constant for taps update */
alpha = (q31_t) (((q63_t) e * mu) >> 31);
- /* Initialize state pointer */
+ /* Initialize pState pointer */
/* Advance state pointer by 1 for the next sample */
px = pState++;
/* Initialize coefficient pointer */
pb = pCoeffs;
- /* Loop unrolling. Process 4 taps at a time. */
- tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = numTaps >> 2U;
/* Update filter coefficients */
while (tapCnt > 0U)
{
+ /* Perform the multiply-accumulate */
+
/* coef is in 2.30 format */
coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
/* get coef in 1.31 format by left shifting */
@@ -198,121 +205,19 @@
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
pb++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+ /* Loop unrolling: Compute remaining taps */
tapCnt = numTaps % 0x4U;
- while (tapCnt > 0U)
- {
- /* Perform the multiply-accumulate */
- coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
- *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
- pb++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Processing is complete. Now copy the last numTaps - 1 samples to the
- satrt of the state buffer. This prepares the state buffer for the
- next function call. */
-
- /* Points to the start of the pState buffer */
- pStateCurnt = S->pState;
-
- /* Loop unrolling for (numTaps - 1U) samples copy */
- tapCnt = (numTaps - 1U) >> 2U;
-
- /* copy data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Calculate remaining number of copies */
- tapCnt = (numTaps - 1U) % 0x4U;
-
- /* Copy the remaining q31_t data */
- while (tapCnt > 0U)
- {
- *pStateCurnt++ = *pState++;
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
- while (blkCnt > 0U)
- {
- /* Copy the new input sample into the state buffer */
- *pStateCurnt++ = *pSrc++;
-
- /* Initialize pState pointer */
- px = pState;
-
- /* Initialize pCoeffs pointer */
- pb = pCoeffs;
-
- /* Set the accumulator to zero */
- acc = 0;
-
- /* Loop over numTaps number of values */
+ /* Initialize tapCnt with number of samples */
tapCnt = numTaps;
- while (tapCnt > 0U)
- {
- /* Perform the multiply-accumulate */
- acc += ((q63_t) (*px++)) * (*pb++);
-
- /* Decrement the loop counter */
- tapCnt--;
- }
-
- /* Converting the result to 1.31 format */
- /* Store the result from accumulator into the destination buffer. */
- /* Calc lower part of acc */
- acc_l = acc & 0xffffffff;
-
- /* Calc upper part of acc */
- acc_h = (acc >> 32) & 0xffffffff;
-
- acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
- *pOut++ = (q31_t) acc;
-
- /* Compute and store error */
- e = *pRef++ - (q31_t) acc;
-
- *pErr++ = (q31_t) e;
-
- /* Weighting factor for the LMS version */
- alpha = (q31_t) (((q63_t) e * mu) >> 31);
-
- /* Initialize pState pointer */
- /* Advance state pointer by 1 for the next sample */
- px = pState++;
-
- /* Initialize pCoeffs pointer */
- pb = pCoeffs;
-
- /* Loop over numTaps number of values */
- tapCnt = numTaps;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (tapCnt > 0U)
{
@@ -321,37 +226,58 @@
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
pb++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* Processing is complete. Now copy the last numTaps - 1 samples to the
- start of the state buffer. This prepares the state buffer for the
- next function call. */
+ /* Processing is complete.
+ Now copy the last numTaps - 1 samples to the start of the state buffer.
+ This prepares the state buffer for the next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
- /* Copy (numTaps - 1U) samples */
+ /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 taps at a time. */
+ tapCnt = (numTaps - 1U) >> 2U;
+
+ while (tapCnt > 0U)
+ {
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+ *pStateCurnt++ = *pState++;
+
+ /* Decrement loop counter */
+ tapCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining taps */
+ tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+ /* Initialize tapCnt with number of samples */
tapCnt = (numTaps - 1U);
- /* Copy the data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (tapCnt > 0U)
{
*pStateCurnt++ = *pState++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
tapCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of LMS group
- */
+ @} end of LMS group
+ */
diff --git a/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c b/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c
new file mode 100644
index 0000000..a85fd65
--- /dev/null
+++ b/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c
@@ -0,0 +1,26 @@
+
+#include "arm_mat_add_f32.c"
+#include "arm_mat_add_q15.c"
+#include "arm_mat_add_q31.c"
+#include "arm_mat_cmplx_mult_f32.c"
+#include "arm_mat_cmplx_mult_q15.c"
+#include "arm_mat_cmplx_mult_q31.c"
+#include "arm_mat_init_f32.c"
+#include "arm_mat_init_q15.c"
+#include "arm_mat_init_q31.c"
+#include "arm_mat_inverse_f32.c"
+#include "arm_mat_inverse_f64.c"
+#include "arm_mat_mult_f32.c"
+#include "arm_mat_mult_fast_q15.c"
+#include "arm_mat_mult_fast_q31.c"
+#include "arm_mat_mult_q15.c"
+#include "arm_mat_mult_q31.c"
+#include "arm_mat_scale_f32.c"
+#include "arm_mat_scale_q15.c"
+#include "arm_mat_scale_q31.c"
+#include "arm_mat_sub_f32.c"
+#include "arm_mat_sub_q15.c"
+#include "arm_mat_sub_q31.c"
+#include "arm_mat_trans_f32.c"
+#include "arm_mat_trans_q15.c"
+#include "arm_mat_trans_q31.c"
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c
index 4a54049..7c735e9 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c
@@ -3,13 +3,13 @@
* Title: arm_mat_add_f32.c
* Description: Floating-point matrix addition
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,162 +29,112 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @defgroup MatrixAdd Matrix Addition
- *
- * Adds two matrices.
- * \image html MatrixAddition.gif "Addition of two 3 x 3 matrices"
- *
- * The functions check to make sure that
- * <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
- * number of rows and columns.
+ @defgroup MatrixAdd Matrix Addition
+
+ Adds two matrices.
+ \image html MatrixAddition.gif "Addition of two 3 x 3 matrices"
+
+ The functions check to make sure that
+ <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
+ number of rows and columns.
*/
/**
- * @addtogroup MatrixAdd
- * @{
+ @addtogroup MatrixAdd
+ @{
*/
-
/**
- * @brief Floating-point matrix addition.
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ @brief Floating-point matrix addition.
+ @param[in] pSrcA points to first input matrix structure
+ @param[in] pSrcB points to second input matrix structure
+ @param[out] pDst points to output matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
*/
arm_status arm_mat_add_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst)
+ arm_matrix_instance_f32 * pDst)
{
- float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
- float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
- float32_t *pOut = pDst->pData; /* output data matrix pointer */
+ float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */
+ float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */
+ float32_t *pOut = pDst->pData; /* output data matrix pointer */
-#if defined (ARM_MATH_DSP)
-
- float32_t inA1, inA2, inB1, inB2, out1, out2; /* temporary variables */
-
-#endif // #if defined (ARM_MATH_DSP)
-
- uint32_t numSamples; /* total number of elements in the matrix */
+ uint32_t numSamples; /* total number of elements in the matrix */
uint32_t blkCnt; /* loop counters */
arm_status status; /* status of matrix addition */
#ifdef ARM_MATH_MATRIX_CHECK
+
/* Check for matrix mismatch condition */
if ((pSrcA->numRows != pSrcB->numRows) ||
- (pSrcA->numCols != pSrcB->numCols) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+ (pSrcA->numCols != pSrcB->numCols) ||
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcA->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif
- {
- /* Total number of samples in the input matrix */
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+ {
+ /* Total number of samples in input matrix */
numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Loop unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) + B(m,n) */
- /* Add and then store the results in the destination buffer. */
- /* Read values from source A */
- inA1 = pIn1[0];
- /* Read values from source B */
- inB1 = pIn2[0];
+ /* Add and store result in destination buffer. */
+ *pOut++ = *pInA++ + *pInB++;
- /* Read values from source A */
- inA2 = pIn1[1];
+ *pOut++ = *pInA++ + *pInB++;
- /* out = sourceA + sourceB */
- out1 = inA1 + inB1;
+ *pOut++ = *pInA++ + *pInB++;
- /* Read values from source B */
- inB2 = pIn2[1];
+ *pOut++ = *pInA++ + *pInB++;
- /* Read values from source A */
- inA1 = pIn1[2];
-
- /* out = sourceA + sourceB */
- out2 = inA2 + inB2;
-
- /* Read values from source B */
- inB1 = pIn2[2];
-
- /* Store result in destination */
- pOut[0] = out1;
- pOut[1] = out2;
-
- /* Read values from source A */
- inA2 = pIn1[3];
-
- /* Read values from source B */
- inB2 = pIn2[3];
-
- /* out = sourceA + sourceB */
- out1 = inA1 + inB1;
-
- /* out = sourceA + sourceB */
- out2 = inA2 + inB2;
-
- /* Store result in destination */
- pOut[2] = out1;
-
- /* Store result in destination */
- pOut[3] = out2;
-
-
- /* update pointers to process next sampels */
- pIn1 += 4U;
- pIn2 += 4U;
- pOut += 4U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) + B(m,n) */
- /* Add and then store the results in the destination buffer. */
- *pOut++ = (*pIn1++) + (*pIn2++);
- /* Decrement the loop counter */
+ /* Add and store result in destination buffer. */
+ *pOut++ = *pInA++ + *pInB++;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
-
}
/* Return to application */
@@ -192,5 +142,5 @@
}
/**
- * @} end of MatrixAdd group
+ @} end of MatrixAdd group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c
index 896e60c..bbcf65e 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c
@@ -3,13 +3,13 @@
* Title: arm_mat_add_q15.c
* Description: Q15 matrix addition
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,116 +29,114 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup MatrixAdd
- * @{
+ @addtogroup MatrixAdd
+ @{
*/
/**
- * @brief Q15 matrix addition.
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+ @brief Q15 matrix addition.
+ @param[in] pSrcA points to first input matrix structure
+ @param[in] pSrcB points to second input matrix structure
+ @param[out] pDst points to output matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
*/
arm_status arm_mat_add_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst)
+ arm_matrix_instance_q15 * pDst)
{
- q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */
- q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */
- q15_t *pOut = pDst->pData; /* output data matrix pointer */
- uint16_t numSamples; /* total number of elements in the matrix */
- uint32_t blkCnt; /* loop counters */
- arm_status status; /* status of matrix addition */
+ q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */
+ q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */
+ q15_t *pOut = pDst->pData; /* output data matrix pointer */
+
+ uint32_t numSamples; /* total number of elements in the matrix */
+ uint32_t blkCnt; /* loop counters */
+ arm_status status; /* status of matrix addition */
#ifdef ARM_MATH_MATRIX_CHECK
-
/* Check for matrix mismatch condition */
if ((pSrcA->numRows != pSrcB->numRows) ||
- (pSrcA->numCols != pSrcB->numCols) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+ (pSrcA->numCols != pSrcB->numCols) ||
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcA->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
- /* Total number of samples in the input matrix */
- numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols);
+ /* Total number of samples in input matrix */
+ numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = numSamples >> 2U;
+
+ while (blkCnt > 0U)
+ {
+ /* C(m,n) = A(m,n) + B(m,n) */
+
+ /* Add, saturate and store result in destination buffer. */
#if defined (ARM_MATH_DSP)
+ write_q15x2_ia (&pOut, __QADD16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB)));
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ write_q15x2_ia (&pOut, __QADD16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB)));
+#else
+ *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
- /* Loop unrolling */
- blkCnt = (uint32_t) numSamples >> 2U;
+ *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0U)
- {
- /* C(m,n) = A(m,n) + B(m,n) */
- /* Add, Saturate and then store the results in the destination buffer. */
- *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
- *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
+ *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
- /* Decrement the loop counter */
+ *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = (uint32_t) numSamples % 0x4U;
-
- /* q15 pointers of input and output are initialized */
-
- while (blkCnt > 0U)
- {
- /* C(m,n) = A(m,n) + B(m,n) */
- /* Add, Saturate and then store the results in the destination buffer. */
- *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = numSamples % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
- blkCnt = (uint32_t) numSamples;
+ blkCnt = numSamples;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
- /* q15 pointers of input and output are initialized */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) + B(m,n) */
- /* Add, Saturate and then store the results in the destination buffer. */
- *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + *pInB++), 16);
- /* Decrement the loop counter */
+ /* Add, saturate and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+ *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
+#else
+ *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
@@ -147,5 +145,5 @@
}
/**
- * @} end of MatrixAdd group
+ @} end of MatrixAdd group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c
index f230ad2..ebe6146 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c
@@ -3,13 +3,13 @@
* Title: arm_mat_add_q31.c
* Description: Q31 matrix addition
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,160 +29,104 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup MatrixAdd
- * @{
+ @addtogroup MatrixAdd
+ @{
*/
/**
- * @brief Q31 matrix addition.
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
+ @brief Q31 matrix addition.
+ @param[in] pSrcA points to first input matrix structure
+ @param[in] pSrcB points to second input matrix structure
+ @param[out] pDst points to output matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
*/
arm_status arm_mat_add_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst)
+ arm_matrix_instance_q31 * pDst)
{
- q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
- q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
+ q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */
+ q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */
q31_t *pOut = pDst->pData; /* output data matrix pointer */
- q31_t inA1, inB1; /* temporary variables */
-#if defined (ARM_MATH_DSP)
-
- q31_t inA2, inB2; /* temporary variables */
- q31_t out1, out2; /* temporary variables */
-
-#endif // #if defined (ARM_MATH_DSP)
-
- uint32_t numSamples; /* total number of elements in the matrix */
+ uint32_t numSamples; /* total number of elements in the matrix */
uint32_t blkCnt; /* loop counters */
arm_status status; /* status of matrix addition */
#ifdef ARM_MATH_MATRIX_CHECK
+
/* Check for matrix mismatch condition */
if ((pSrcA->numRows != pSrcB->numRows) ||
- (pSrcA->numCols != pSrcB->numCols) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+ (pSrcA->numCols != pSrcB->numCols) ||
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcA->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
{
- /* Total number of samples in the input matrix */
+ /* Total number of samples in input matrix */
numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /* Loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) + B(m,n) */
- /* Add, saturate and then store the results in the destination buffer. */
- /* Read values from source A */
- inA1 = pIn1[0];
- /* Read values from source B */
- inB1 = pIn2[0];
+ /* Add, saturate and store result in destination buffer. */
+ *pOut++ = __QADD(*pInA++, *pInB++);
- /* Read values from source A */
- inA2 = pIn1[1];
+ *pOut++ = __QADD(*pInA++, *pInB++);
- /* Add and saturate */
- out1 = __QADD(inA1, inB1);
+ *pOut++ = __QADD(*pInA++, *pInB++);
- /* Read values from source B */
- inB2 = pIn2[1];
+ *pOut++ = __QADD(*pInA++, *pInB++);
- /* Read values from source A */
- inA1 = pIn1[2];
-
- /* Add and saturate */
- out2 = __QADD(inA2, inB2);
-
- /* Read values from source B */
- inB1 = pIn2[2];
-
- /* Store result in destination */
- pOut[0] = out1;
- pOut[1] = out2;
-
- /* Read values from source A */
- inA2 = pIn1[3];
-
- /* Read values from source B */
- inB2 = pIn2[3];
-
- /* Add and saturate */
- out1 = __QADD(inA1, inB1);
- out2 = __QADD(inA2, inB2);
-
- /* Store result in destination */
- pOut[2] = out1;
- pOut[3] = out2;
-
- /* update pointers to process next sampels */
- pIn1 += 4U;
- pIn2 += 4U;
- pOut += 4U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) + B(m,n) */
- /* Add, saturate and then store the results in the destination buffer. */
- inA1 = *pIn1++;
- inB1 = *pIn2++;
- inA1 = __QADD(inA1, inB1);
+ /* Add, saturate and store result in destination buffer. */
+ *pOut++ = __QADD(*pInA++, *pInB++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
-
- *pOut++ = inA1;
-
}
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
@@ -191,5 +135,5 @@
}
/**
- * @} end of MatrixAdd group
+ @} end of MatrixAdd group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
index bb8341e..3730b8d 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
@@ -3,13 +3,13 @@
* Title: arm_mat_cmplx_mult_f32.c
* Description: Floating-point matrix multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,73 +29,72 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @defgroup CmplxMatrixMult Complex Matrix Multiplication
- *
- * Complex Matrix multiplication is only defined if the number of columns of the
- * first matrix equals the number of rows of the second matrix.
- * Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
- * in an <code>M x P</code> matrix.
- * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of
- * <code>pSrcA</code> and <code>pSrcB</code> are equal; and (2) that the size of the output
- * matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
- */
+ @defgroup CmplxMatrixMult Complex Matrix Multiplication
-
-/**
- * @addtogroup CmplxMatrixMult
- * @{
+ Complex Matrix multiplication is only defined if the number of columns of the
+ first matrix equals the number of rows of the second matrix.
+ Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
+ in an <code>M x P</code> matrix.
+ @par
+ When matrix size checking is enabled, the functions check:
+ - that the inner dimensions of <code>pSrcA</code> and <code>pSrcB</code> are equal;
+ - that the size of the output matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
*/
/**
- * @brief Floating-point Complex matrix multiplication.
- * @param[in] *pSrcA points to the first input complex matrix structure
- * @param[in] *pSrcB points to the second input complex matrix structure
- * @param[out] *pDst points to output complex matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ @addtogroup CmplxMatrixMult
+ @{
+ */
+
+/**
+ @brief Floating-point Complex matrix multiplication.
+ @param[in] pSrcA points to first input complex matrix structure
+ @param[in] pSrcB points to second input complex matrix structure
+ @param[out] pDst points to output complex matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
*/
arm_status arm_mat_cmplx_mult_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst)
+ arm_matrix_instance_f32 * pDst)
{
- float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
- float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
- float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */
- float32_t *pOut = pDst->pData; /* output data matrix pointer */
+ float32_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */
+ float32_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */
+ float32_t *pInA = pSrcA->pData; /* Input data matrix pointer A */
+ float32_t *pOut = pDst->pData; /* Output data matrix pointer */
float32_t *px; /* Temporary output data matrix pointer */
- uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
- uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
- uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
- float32_t sumReal1, sumImag1; /* accumulator */
- float32_t a0, b0, c0, d0;
+ uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */
+ uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */
+ uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */
+ float32_t sumReal, sumImag; /* Accumulator */
float32_t a1, b1, c1, d1;
- float32_t sumReal2, sumImag2; /* accumulator */
-
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- uint16_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
+ uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
arm_status status; /* status of matrix multiplication */
+#if defined (ARM_MATH_LOOPUNROLL)
+ float32_t a0, b0, c0, d0;
+#endif
+
#ifdef ARM_MATH_MATRIX_CHECK
-
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcB->numCols != pDst->numCols) )
{
-
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
@@ -118,19 +117,18 @@
do
{
/* Set the variable sum, that acts as accumulator, to zero */
- sumReal1 = 0.0f;
- sumImag1 = 0.0f;
+ sumReal = 0.0f;
+ sumImag = 0.0f;
- sumReal2 = 0.0f;
- sumImag2 = 0.0f;
-
- /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+ /* Initiate pointer pIn1 to point to starting address of column being processed */
pIn1 = pInA;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- colCnt = numColsA >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* matrix multiplication */
+ /* Apply loop unrolling and compute 4 MACs simultaneously. */
+ colCnt = numColsA >> 2U;
+
+ /* matrix multiplication */
while (colCnt > 0U)
{
@@ -146,65 +144,75 @@
/* Reading imaginary part of complex matrix B */
d0 = *(pIn2 + 1U);
- sumReal1 += a0 * c0;
- sumImag1 += b0 * c0;
+ /* Multiply and Accumlates */
+ sumReal += a0 * c0;
+ sumImag += b0 * c0;
+ /* update pointers */
pIn1 += 2U;
pIn2 += 2 * numColsB;
- sumReal2 -= b0 * d0;
- sumImag2 += a0 * d0;
+ /* Multiply and Accumlates */
+ sumReal -= b0 * d0;
+ sumImag += a0 * d0;
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
- a1 = *pIn1;
- c1 = *pIn2;
-
+ /* read real and imag values from pSrcA and pSrcB buffer */
+ a1 = *(pIn1 );
+ c1 = *(pIn2 );
b1 = *(pIn1 + 1U);
d1 = *(pIn2 + 1U);
- sumReal1 += a1 * c1;
- sumImag1 += b1 * c1;
+ /* Multiply and Accumlates */
+ sumReal += a1 * c1;
+ sumImag += b1 * c1;
+ /* update pointers */
pIn1 += 2U;
pIn2 += 2 * numColsB;
- sumReal2 -= b1 * d1;
- sumImag2 += a1 * d1;
+ /* Multiply and Accumlates */
+ sumReal -= b1 * d1;
+ sumImag += a1 * d1;
- a0 = *pIn1;
- c0 = *pIn2;
-
+ a0 = *(pIn1 );
+ c0 = *(pIn2 );
b0 = *(pIn1 + 1U);
d0 = *(pIn2 + 1U);
- sumReal1 += a0 * c0;
- sumImag1 += b0 * c0;
+ /* Multiply and Accumlates */
+ sumReal += a0 * c0;
+ sumImag += b0 * c0;
+ /* update pointers */
pIn1 += 2U;
pIn2 += 2 * numColsB;
- sumReal2 -= b0 * d0;
- sumImag2 += a0 * d0;
+ /* Multiply and Accumlates */
+ sumReal -= b0 * d0;
+ sumImag += a0 * d0;
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
- a1 = *pIn1;
- c1 = *pIn2;
-
+ a1 = *(pIn1 );
+ c1 = *(pIn2 );
b1 = *(pIn1 + 1U);
d1 = *(pIn2 + 1U);
- sumReal1 += a1 * c1;
- sumImag1 += b1 * c1;
+ /* Multiply and Accumlates */
+ sumReal += a1 * c1;
+ sumImag += b1 * c1;
+ /* update pointers */
pIn1 += 2U;
pIn2 += 2 * numColsB;
- sumReal2 -= b1 * d1;
- sumImag2 += a1 * d1;
+ /* Multiply and Accumlates */
+ sumReal -= b1 * d1;
+ sumImag += a1 * d1;
- /* Decrement the loop count */
+ /* Decrement loop count */
colCnt--;
}
@@ -212,49 +220,55 @@
** No loop unrolling is used. */
colCnt = numColsA % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (colCnt > 0U)
{
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
- a1 = *pIn1;
- c1 = *pIn2;
-
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+ a1 = *(pIn1 );
+ c1 = *(pIn2 );
b1 = *(pIn1 + 1U);
d1 = *(pIn2 + 1U);
- sumReal1 += a1 * c1;
- sumImag1 += b1 * c1;
+ /* Multiply and Accumlates */
+ sumReal += a1 * c1;
+ sumImag += b1 * c1;
+ /* update pointers */
pIn1 += 2U;
pIn2 += 2 * numColsB;
- sumReal2 -= b1 * d1;
- sumImag2 += a1 * d1;
+ /* Multiply and Accumlates */
+ sumReal -= b1 * d1;
+ sumImag += a1 * d1;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
colCnt--;
}
- sumReal1 += sumReal2;
- sumImag1 += sumImag2;
+ /* Store result in destination buffer */
+ *px++ = sumReal;
+ *px++ = sumImag;
- /* Store the result in the destination buffer */
- *px++ = sumReal1;
- *px++ = sumImag1;
-
- /* Update the pointer pIn2 to point to the starting address of the next column */
+ /* Update pointer pIn2 to point to starting address of next column */
j++;
pIn2 = pSrcB->pData + 2U * j;
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
} while (col > 0U);
- /* Update the pointer pInA to point to the starting address of the next row */
+ /* Update pointer pInA to point to starting address of next row */
i = i + numColsB;
pInA = pInA + 2 * numColsA;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
} while (row > 0U);
@@ -268,5 +282,5 @@
}
/**
- * @} end of MatrixMult group
+ @} end of MatrixMult group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
index 5dee79c..2f00570 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
@@ -3,13 +3,13 @@
* Title: arm_cmplx_mat_mult_q15.c
* Description: Q15 complex matrix multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,141 +29,115 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup CmplxMatrixMult
- * @{
+ @addtogroup CmplxMatrixMult
+ @{
*/
-
/**
- * @brief Q15 Complex matrix multiplication
- * @param[in] *pSrcA points to the first input complex matrix structure
- * @param[in] *pSrcB points to the second input complex matrix structure
- * @param[out] *pDst points to output complex matrix structure
- * @param[in] *pScratch points to the array for storing intermediate results
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * \par Conditions for optimum performance
- * Input, output and state buffers should be aligned by 32-bit
- *
- * \par Restrictions
- * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- * In this case input, output, scratch buffers should be aligned by 32-bit
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator. The inputs to the
- * multiplications are in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate
- * results are accumulated in a 64-bit accumulator in 34.30 format. This approach
- * provides 33 guard bits and there is no risk of overflow. The 34.30 result is then
- * truncated to 34.15 format by discarding the low 15 bits and then saturated to
- * 1.15 format.
- *
- * \par
- * Refer to <code>arm_mat_mult_fast_q15()</code> for a faster but less precise version of this function.
- *
+ @brief Q15 Complex matrix multiplication.
+ @param[in] pSrcA points to first input complex matrix structure
+ @param[in] pSrcB points to second input complex matrix structure
+ @param[out] pDst points to output complex matrix structure
+ @param[in] pScratch points to an array for storing intermediate results
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+ @par Conditions for optimum performance
+ Input, output and state buffers should be aligned by 32-bit
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator. The inputs to the
+ multiplications are in 1.15 format and multiplications yield a 2.30 result.
+ The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+ This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then
+ truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
*/
-
-
-
arm_status arm_mat_cmplx_mult_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst,
- q15_t * pScratch)
+ arm_matrix_instance_q15 * pDst,
+ q15_t * pScratch)
{
- /* accumulator */
- q15_t *pSrcBT = pScratch; /* input data matrix pointer for transpose */
- q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */
- q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */
- q15_t *px; /* Temporary output data matrix pointer */
- uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
- uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
- uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
- uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */
- uint16_t col, i = 0U, row = numRowsB, colCnt; /* loop counters */
- arm_status status; /* status of matrix multiplication */
- q63_t sumReal, sumImag;
+ q15_t *pSrcBT = pScratch; /* input data matrix pointer for transpose */
+ q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */
+ q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */
+ q15_t *px; /* Temporary output data matrix pointer */
+ uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
+ uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
+ uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
+ uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */
+ q63_t sumReal, sumImag; /* accumulator */
+ uint32_t col, i = 0U, row = numRowsB, colCnt; /* Loop counters */
+ arm_status status; /* Status of matrix multiplication */
-#ifdef UNALIGNED_SUPPORT_DISABLE
- q15_t in; /* Temporary variable to hold the input value */
- q15_t a, b, c, d;
+#if defined (ARM_MATH_DSP)
+ q31_t prod1, prod2;
+ q31_t pSourceA, pSourceB;
#else
- q31_t in; /* Temporary variable to hold the input value */
- q31_t prod1, prod2;
- q31_t pSourceA, pSourceB;
-#endif
+ q15_t a, b, c, d;
+#endif /* #if defined (ARM_MATH_DSP) */
#ifdef ARM_MATH_MATRIX_CHECK
+
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcB->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
{
/* Matrix transpose */
do
{
+ /* The pointer px is set to starting address of column being processed */
+ px = pSrcBT + i;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
/* Apply loop unrolling and exchange the columns with row elements */
col = numColsB >> 2;
- /* The pointer px is set to starting address of the column being processed */
- px = pSrcBT + i;
-
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
+ a second loop below computes the remaining 1 to 3 samples. */
while (col > 0U)
{
-#ifdef UNALIGNED_SUPPORT_DISABLE
- /* Read two elements from the row */
- in = *pInB++;
- *px = in;
- in = *pInB++;
- px[1] = in;
+ /* Read two elements from row */
+ write_q15x2 (px, read_q15x2_ia (&pInB));
- /* Update the pointer px to point to the next row of the transposed matrix */
+ /* Update pointer px to point to next row of transposed matrix */
px += numRowsB * 2;
- /* Read two elements from the row */
- in = *pInB++;
- *px = in;
- in = *pInB++;
- px[1] = in;
+ /* Read two elements from row */
+ write_q15x2 (px, read_q15x2_ia (&pInB));
- /* Update the pointer px to point to the next row of the transposed matrix */
+ /* Update pointer px to point to next row of transposed matrix */
px += numRowsB * 2;
- /* Read two elements from the row */
- in = *pInB++;
- *px = in;
- in = *pInB++;
- px[1] = in;
+ /* Read two elements from row */
+ write_q15x2 (px, read_q15x2_ia (&pInB));
- /* Update the pointer px to point to the next row of the transposed matrix */
+ /* Update pointer px to point to next row of transposed matrix */
px += numRowsB * 2;
- /* Read two elements from the row */
- in = *pInB++;
- *px = in;
- in = *pInB++;
- px[1] = in;
+ /* Read two elements from row */
+ write_q15x2 (px, read_q15x2_ia (&pInB));
- /* Update the pointer px to point to the next row of the transposed matrix */
+ /* Update pointer px to point to next row of transposed matrix */
px += numRowsB * 2;
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
}
@@ -171,79 +145,33 @@
** No loop unrolling is used. */
col = numColsB % 0x4U;
- while (col > 0U)
- {
- /* Read two elements from the row */
- in = *pInB++;
- *px = in;
- in = *pInB++;
- px[1] = in;
#else
- /* Read two elements from the row */
- in = *__SIMD32(pInB)++;
+ /* Initialize blkCnt with number of samples */
+ col = numColsB;
- *__SIMD32(px) = in;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- px += numRowsB * 2;
-
-
- /* Read two elements from the row */
- in = *__SIMD32(pInB)++;
-
- *__SIMD32(px) = in;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- px += numRowsB * 2;
-
- /* Read two elements from the row */
- in = *__SIMD32(pInB)++;
-
- *__SIMD32(px) = in;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- px += numRowsB * 2;
-
- /* Read two elements from the row */
- in = *__SIMD32(pInB)++;
-
- *__SIMD32(px) = in;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- px += numRowsB * 2;
-
- /* Decrement the column loop counter */
- col--;
- }
-
- /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- col = numColsB % 0x4U;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (col > 0U)
{
- /* Read two elements from the row */
- in = *__SIMD32(pInB)++;
+ /* Read two elements from row */
+ write_q15x2 (px, read_q15x2_ia (&pInB));
- *__SIMD32(px) = in;
-#endif
-
- /* Update the pointer px to point to the next row of the transposed matrix */
+ /* Update pointer px to point to next row of transposed matrix */
px += numRowsB * 2;
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
}
i = i + 2U;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
} while (row > 0U);
- /* Reset the variables for the usage in the following multiplication process */
+ /* Reset variables for usage in following multiplication process */
row = numRowsA;
i = 0U;
px = pDst->pData;
@@ -252,33 +180,61 @@
/* row loop */
do
{
- /* For every row wise process, the column loop counter is to be initiated */
+ /* For every row wise process, column loop counter is to be initiated */
col = numColsB;
- /* For every row wise process, the pIn2 pointer is set
- ** to the starting address of the transposed pSrcB data */
+ /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
pInB = pSrcBT;
/* column loop */
do
{
- /* Set the variable sum, that acts as accumulator, to zero */
+ /* Set variable sum, that acts as accumulator, to zero */
sumReal = 0;
sumImag = 0;
- /* Apply loop unrolling and compute 2 MACs simultaneously. */
- colCnt = numColsA >> 1;
-
- /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+ /* Initiate pointer pInA to point to starting address of column being processed */
pInA = pSrcA->pData + i * 2;
+ /* Apply loop unrolling and compute 2 MACs simultaneously. */
+ colCnt = numColsA >> 1U;
/* matrix multiplication */
while (colCnt > 0U)
{
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-#ifdef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
+
+ /* read real and imag values from pSrcA and pSrcB buffer */
+ pSourceA = read_q15x2_ia ((q15_t **) &pInA);
+ pSourceB = read_q15x2_ia ((q15_t **) &pInB);
+
+ /* Multiply and Accumlates */
+#ifdef ARM_MATH_BIG_ENDIAN
+ prod1 = -__SMUSD(pSourceA, pSourceB);
+#else
+ prod1 = __SMUSD(pSourceA, pSourceB);
+#endif
+ prod2 = __SMUADX(pSourceA, pSourceB);
+ sumReal += (q63_t) prod1;
+ sumImag += (q63_t) prod2;
+
+ /* read real and imag values from pSrcA and pSrcB buffer */
+ pSourceA = read_q15x2_ia ((q15_t **) &pInA);
+ pSourceB = read_q15x2_ia ((q15_t **) &pInB);
+
+ /* Multiply and Accumlates */
+#ifdef ARM_MATH_BIG_ENDIAN
+ prod1 = -__SMUSD(pSourceA, pSourceB);
+#else
+ prod1 = __SMUSD(pSourceA, pSourceB);
+#endif
+ prod2 = __SMUADX(pSourceA, pSourceB);
+ sumReal += (q63_t) prod1;
+ sumImag += (q63_t) prod2;
+
+#else /* #if defined (ARM_MATH_DSP) */
/* read real and imag values from pSrcA buffer */
a = *pInA;
@@ -304,53 +260,40 @@
pInA += 4U;
/* Multiply and Accumlates */
- sumReal += (q31_t) a *c;
- sumImag += (q31_t) a *d;
- sumReal -= (q31_t) b *d;
- sumImag += (q31_t) b *c;
+ sumReal += (q31_t) a * c;
+ sumImag += (q31_t) a * d;
+ sumReal -= (q31_t) b * d;
+ sumImag += (q31_t) b * c;
/* update pointer */
pInB += 4U;
-#else
- /* read real and imag values from pSrcA and pSrcB buffer */
- pSourceA = *__SIMD32(pInA)++;
- pSourceB = *__SIMD32(pInB)++;
- /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
- prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
- prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
- prod2 = __SMUADX(pSourceA, pSourceB);
- sumReal += (q63_t) prod1;
- sumImag += (q63_t) prod2;
+#endif /* #if defined (ARM_MATH_DSP) */
- /* read real and imag values from pSrcA and pSrcB buffer */
- pSourceA = *__SIMD32(pInA)++;
- pSourceB = *__SIMD32(pInB)++;
-
- /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
- prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
- prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
- prod2 = __SMUADX(pSourceA, pSourceB);
- sumReal += (q63_t) prod1;
- sumImag += (q63_t) prod2;
-
-#endif /* #ifdef UNALIGNED_SUPPORT_DISABLE */
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
colCnt--;
}
/* process odd column samples */
if ((numColsA & 0x1U) > 0U)
{
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-#ifdef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
+ /* read real and imag values from pSrcA and pSrcB buffer */
+ pSourceA = read_q15x2_ia ((q15_t **) &pInA);
+ pSourceB = read_q15x2_ia ((q15_t **) &pInB);
+
+ /* Multiply and Accumlates */
+#ifdef ARM_MATH_BIG_ENDIAN
+ prod1 = -__SMUSD(pSourceA, pSourceB);
+#else
+ prod1 = __SMUSD(pSourceA, pSourceB);
+#endif
+ prod2 = __SMUADX(pSourceA, pSourceB);
+ sumReal += (q63_t) prod1;
+ sumImag += (q63_t) prod2;
+
+#else /* #if defined (ARM_MATH_DSP) */
/* read real and imag values from pSrcA and pSrcB buffer */
a = *pInA++;
@@ -359,48 +302,32 @@
d = *pInB++;
/* Multiply and Accumlates */
- sumReal += (q31_t) a *c;
- sumImag += (q31_t) a *d;
- sumReal -= (q31_t) b *d;
- sumImag += (q31_t) b *c;
+ sumReal += (q31_t) a * c;
+ sumImag += (q31_t) a * d;
+ sumReal -= (q31_t) b * d;
+ sumImag += (q31_t) b * c;
-#else
- /* read real and imag values from pSrcA and pSrcB buffer */
- pSourceA = *__SIMD32(pInA)++;
- pSourceB = *__SIMD32(pInB)++;
-
- /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
- prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
- prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
- prod2 = __SMUADX(pSourceA, pSourceB);
- sumReal += (q63_t) prod1;
- sumImag += (q63_t) prod2;
-
-#endif /* #ifdef UNALIGNED_SUPPORT_DISABLE */
+#endif /* #if defined (ARM_MATH_DSP) */
}
- /* Saturate and store the result in the destination buffer */
-
+ /* Saturate and store result in destination buffer */
*px++ = (q15_t) (__SSAT(sumReal >> 15, 16));
*px++ = (q15_t) (__SSAT(sumImag >> 15, 16));
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
} while (col > 0U);
i = i + numColsA;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
} while (row > 0U);
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
@@ -409,5 +336,5 @@
}
/**
- * @} end of MatrixMult group
+ @} end of MatrixMult group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
index 65cbb66..e04d206 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
@@ -3,13 +3,13 @@
* Title: arm_mat_cmplx_mult_q31.c
* Description: Floating-point matrix multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,74 +29,69 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup CmplxMatrixMult
- * @{
+ @addtogroup CmplxMatrixMult
+ @{
*/
/**
- * @brief Q31 Complex matrix multiplication
- * @param[in] *pSrcA points to the first input complex matrix structure
- * @param[in] *pSrcB points to the second input complex matrix structure
- * @param[out] *pDst points to output complex matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate
- * multiplication results but provides only a single guard bit. There is no saturation
- * on intermediate additions. Thus, if the accumulator overflows it wraps around and
- * distorts the result. The input signals should be scaled down to avoid intermediate
- * overflows. The input is thus scaled down by log2(numColsA) bits
- * to avoid overflows, as a total of numColsA additions are performed internally.
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
- *
- *
+ @brief Q31 Complex matrix multiplication.
+ @param[in] pSrcA points to first input complex matrix structure
+ @param[in] pSrcB points to second input complex matrix structure
+ @param[out] pDst points to output complex matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The accumulator has a 2.62 format and maintains full precision of the intermediate
+ multiplication results but provides only a single guard bit. There is no saturation
+ on intermediate additions. Thus, if the accumulator overflows it wraps around and
+ distorts the result. The input signals should be scaled down to avoid intermediate
+ overflows. The input is thus scaled down by log2(numColsA) bits
+ to avoid overflows, as a total of numColsA additions are performed internally.
+ The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
*/
arm_status arm_mat_cmplx_mult_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst)
+ arm_matrix_instance_q31 * pDst)
{
- q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
- q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
- q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */
- q31_t *pOut = pDst->pData; /* output data matrix pointer */
+ q31_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */
+ q31_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */
+ q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */
+ q31_t *pOut = pDst->pData; /* Output data matrix pointer */
q31_t *px; /* Temporary output data matrix pointer */
- uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
- uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
- uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
- q63_t sumReal1, sumImag1; /* accumulator */
- q31_t a0, b0, c0, d0;
+ uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */
+ uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */
+ uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */
+ q63_t sumReal, sumImag; /* Accumulator */
q31_t a1, b1, c1, d1;
-
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- uint16_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
+ uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
arm_status status; /* status of matrix multiplication */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t a0, b0, c0, d0;
+#endif
+
#ifdef ARM_MATH_MATRIX_CHECK
-
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcB->numCols != pDst->numCols) )
{
-
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
@@ -119,16 +114,18 @@
do
{
/* Set the variable sum, that acts as accumulator, to zero */
- sumReal1 = 0.0;
- sumImag1 = 0.0;
+ sumReal = 0.0;
+ sumImag = 0.0;
- /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+ /* Initiate pointer pIn1 to point to starting address of column being processed */
pIn1 = pInA;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- colCnt = numColsA >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* matrix multiplication */
+ /* Apply loop unrolling and compute 4 MACs simultaneously. */
+ colCnt = numColsA >> 2U;
+
+ /* matrix multiplication */
while (colCnt > 0U)
{
@@ -145,76 +142,74 @@
d0 = *(pIn2 + 1U);
/* Multiply and Accumlates */
- sumReal1 += (q63_t) a0 *c0;
- sumImag1 += (q63_t) b0 *c0;
+ sumReal += (q63_t) a0 * c0;
+ sumImag += (q63_t) b0 * c0;
/* update pointers */
pIn1 += 2U;
pIn2 += 2 * numColsB;
/* Multiply and Accumlates */
- sumReal1 -= (q63_t) b0 *d0;
- sumImag1 += (q63_t) a0 *d0;
+ sumReal -= (q63_t) b0 * d0;
+ sumImag += (q63_t) a0 * d0;
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
/* read real and imag values from pSrcA and pSrcB buffer */
- a1 = *pIn1;
- c1 = *pIn2;
+ a1 = *(pIn1 );
+ c1 = *(pIn2 );
b1 = *(pIn1 + 1U);
d1 = *(pIn2 + 1U);
/* Multiply and Accumlates */
- sumReal1 += (q63_t) a1 *c1;
- sumImag1 += (q63_t) b1 *c1;
+ sumReal += (q63_t) a1 * c1;
+ sumImag += (q63_t) b1 * c1;
/* update pointers */
pIn1 += 2U;
pIn2 += 2 * numColsB;
/* Multiply and Accumlates */
- sumReal1 -= (q63_t) b1 *d1;
- sumImag1 += (q63_t) a1 *d1;
+ sumReal -= (q63_t) b1 * d1;
+ sumImag += (q63_t) a1 * d1;
- a0 = *pIn1;
- c0 = *pIn2;
-
+ a0 = *(pIn1 );
+ c0 = *(pIn2 );
b0 = *(pIn1 + 1U);
d0 = *(pIn2 + 1U);
/* Multiply and Accumlates */
- sumReal1 += (q63_t) a0 *c0;
- sumImag1 += (q63_t) b0 *c0;
+ sumReal += (q63_t) a0 * c0;
+ sumImag += (q63_t) b0 * c0;
/* update pointers */
pIn1 += 2U;
pIn2 += 2 * numColsB;
/* Multiply and Accumlates */
- sumReal1 -= (q63_t) b0 *d0;
- sumImag1 += (q63_t) a0 *d0;
+ sumReal -= (q63_t) b0 * d0;
+ sumImag += (q63_t) a0 * d0;
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
- a1 = *pIn1;
- c1 = *pIn2;
-
+ a1 = *(pIn1 );
+ c1 = *(pIn2 );
b1 = *(pIn1 + 1U);
d1 = *(pIn2 + 1U);
/* Multiply and Accumlates */
- sumReal1 += (q63_t) a1 *c1;
- sumImag1 += (q63_t) b1 *c1;
+ sumReal += (q63_t) a1 * c1;
+ sumImag += (q63_t) b1 * c1;
/* update pointers */
pIn1 += 2U;
pIn2 += 2 * numColsB;
/* Multiply and Accumlates */
- sumReal1 -= (q63_t) b1 *d1;
- sumImag1 += (q63_t) a1 *d1;
+ sumReal -= (q63_t) b1 * d1;
+ sumImag += (q63_t) a1 * d1;
- /* Decrement the loop count */
+ /* Decrement loop count */
colCnt--;
}
@@ -222,49 +217,55 @@
** No loop unrolling is used. */
colCnt = numColsA % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (colCnt > 0U)
{
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
- a1 = *pIn1;
- c1 = *pIn2;
-
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+ a1 = *(pIn1 );
+ c1 = *(pIn2 );
b1 = *(pIn1 + 1U);
d1 = *(pIn2 + 1U);
/* Multiply and Accumlates */
- sumReal1 += (q63_t) a1 *c1;
- sumImag1 += (q63_t) b1 *c1;
+ sumReal += (q63_t) a1 * c1;
+ sumImag += (q63_t) b1 * c1;
/* update pointers */
pIn1 += 2U;
pIn2 += 2 * numColsB;
/* Multiply and Accumlates */
- sumReal1 -= (q63_t) b1 *d1;
- sumImag1 += (q63_t) a1 *d1;
+ sumReal -= (q63_t) b1 * d1;
+ sumImag += (q63_t) a1 * d1;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
colCnt--;
}
- /* Store the result in the destination buffer */
- *px++ = (q31_t) clip_q63_to_q31(sumReal1 >> 31);
- *px++ = (q31_t) clip_q63_to_q31(sumImag1 >> 31);
+ /* Store result in destination buffer */
+ *px++ = (q31_t) clip_q63_to_q31(sumReal >> 31);
+ *px++ = (q31_t) clip_q63_to_q31(sumImag >> 31);
- /* Update the pointer pIn2 to point to the starting address of the next column */
+ /* Update pointer pIn2 to point to starting address of next column */
j++;
pIn2 = pSrcB->pData + 2U * j;
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
} while (col > 0U);
- /* Update the pointer pInA to point to the starting address of the next row */
+ /* Update pointer pInA to point to starting address of next row */
i = i + numColsB;
pInA = pInA + 2 * numColsA;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
} while (row > 0U);
@@ -278,5 +279,5 @@
}
/**
- * @} end of MatrixMult group
+ @} end of MatrixMult group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c
index 783f7be..0dcfdfe 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_mat_init_f32.c
* Description: Floating-point matrix initialization
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,31 +29,31 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @defgroup MatrixInit Matrix Initialization
- *
- * Initializes the underlying matrix data structure.
- * The functions set the <code>numRows</code>,
- * <code>numCols</code>, and <code>pData</code> fields
- * of the matrix data structure.
+ @defgroup MatrixInit Matrix Initialization
+
+ Initializes the underlying matrix data structure.
+ The functions set the <code>numRows</code>,
+ <code>numCols</code>, and <code>pData</code> fields
+ of the matrix data structure.
*/
/**
- * @addtogroup MatrixInit
- * @{
+ @addtogroup MatrixInit
+ @{
*/
/**
- * @brief Floating-point matrix initialization.
- * @param[in,out] *S points to an instance of the floating-point matrix structure.
- * @param[in] nRows number of rows in the matrix.
- * @param[in] nColumns number of columns in the matrix.
- * @param[in] *pData points to the matrix data array.
- * @return none
- */
+ @brief Floating-point matrix initialization.
+ @param[in,out] S points to an instance of the floating-point matrix structure
+ @param[in] nRows number of rows in the matrix
+ @param[in] nColumns number of columns in the matrix
+ @param[in] pData points to the matrix data array
+ @return none
+ */
void arm_mat_init_f32(
arm_matrix_instance_f32 * S,
@@ -72,5 +72,5 @@
}
/**
- * @} end of MatrixInit group
+ @} end of MatrixInit group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c
index 08da19f..0c9d0b0 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c
@@ -3,13 +3,13 @@
* Title: arm_mat_init_q15.c
* Description: Q15 matrix initialization
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,22 +29,22 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup MatrixInit
- * @{
+ @addtogroup MatrixInit
+ @{
*/
- /**
- * @brief Q15 matrix initialization.
- * @param[in,out] *S points to an instance of the floating-point matrix structure.
- * @param[in] nRows number of rows in the matrix.
- * @param[in] nColumns number of columns in the matrix.
- * @param[in] *pData points to the matrix data array.
- * @return none
- */
+/**
+ @brief Q15 matrix initialization.
+ @param[in,out] S points to an instance of the floating-point matrix structure
+ @param[in] nRows number of rows in the matrix
+ @param[in] nColumns number of columns in the matrix
+ @param[in] pData points to the matrix data array
+ @return none
+ */
void arm_mat_init_q15(
arm_matrix_instance_q15 * S,
@@ -63,5 +63,5 @@
}
/**
- * @} end of MatrixInit group
+ @} end of MatrixInit group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c
index 22e6f6d..3a079a5 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_mat_init_q31.c
* Description: Q31 matrix initialization
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,27 +29,27 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @defgroup MatrixInit Matrix Initialization
- *
+ @defgroup MatrixInit Matrix Initialization
+
*/
/**
- * @addtogroup MatrixInit
- * @{
+ @addtogroup MatrixInit
+ @{
*/
- /**
- * @brief Q31 matrix initialization.
- * @param[in,out] *S points to an instance of the floating-point matrix structure.
- * @param[in] nRows number of rows in the matrix.
- * @param[in] nColumns number of columns in the matrix.
- * @param[in] *pData points to the matrix data array.
- * @return none
- */
+/**
+ @brief Q31 matrix initialization.
+ @param[in,out] S points to an instance of the Q31 matrix structure
+ @param[in] nRows number of rows in the matrix
+ @param[in] nColumns number of columns in the matrix
+ @param[in] pData points to the matrix data array
+ @return none
+ */
void arm_mat_init_q31(
arm_matrix_instance_q31 * S,
@@ -68,5 +68,5 @@
}
/**
- * @} end of MatrixInit group
+ @} end of MatrixInit group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c
index b82373a..e3d1c1f 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c
@@ -3,13 +3,13 @@
* Title: arm_mat_inverse_f32.c
* Description: Floating-point matrix inverse
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,50 +29,48 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @defgroup MatrixInv Matrix Inverse
- *
- * Computes the inverse of a matrix.
- *
- * The inverse is defined only if the input matrix is square and non-singular (the determinant
- * is non-zero). The function checks that the input and output matrices are square and of the
- * same size.
- *
- * Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix
- * inversion of floating-point matrices.
- *
- * \par Algorithm
- * The Gauss-Jordan method is used to find the inverse.
- * The algorithm performs a sequence of elementary row-operations until it
- * reduces the input matrix to an identity matrix. Applying the same sequence
- * of elementary row-operations to an identity matrix yields the inverse matrix.
- * If the input matrix is singular, then the algorithm terminates and returns error status
- * <code>ARM_MATH_SINGULAR</code>.
- * \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"
+ @defgroup MatrixInv Matrix Inverse
+
+ Computes the inverse of a matrix.
+
+ The inverse is defined only if the input matrix is square and non-singular (the determinant is non-zero).
+ The function checks that the input and output matrices are square and of the same size.
+
+ Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix
+ inversion of floating-point matrices.
+
+ @par Algorithm
+ The Gauss-Jordan method is used to find the inverse.
+ The algorithm performs a sequence of elementary row-operations until it
+ reduces the input matrix to an identity matrix. Applying the same sequence
+ of elementary row-operations to an identity matrix yields the inverse matrix.
+ If the input matrix is singular, then the algorithm terminates and returns error status
+ <code>ARM_MATH_SINGULAR</code>.
+ \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"
*/
/**
- * @addtogroup MatrixInv
- * @{
+ @addtogroup MatrixInv
+ @{
*/
/**
- * @brief Floating-point matrix inverse.
- * @param[in] *pSrc points to input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns
- * <code>ARM_MATH_SIZE_MISMATCH</code> if the input matrix is not square or if the size
- * of the output matrix does not match the size of the input matrix.
- * If the input matrix is found to be singular (non-invertible), then the function returns
- * <code>ARM_MATH_SINGULAR</code>. Otherwise, the function returns <code>ARM_MATH_SUCCESS</code>.
+ @brief Floating-point matrix inverse.
+ @param[in] pSrc points to input matrix structure
+ @param[out] pDst points to output matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ - \ref ARM_MATH_SINGULAR : Input matrix is found to be singular (non-invertible)
*/
arm_status arm_mat_inverse_f32(
const arm_matrix_instance_f32 * pSrc,
- arm_matrix_instance_f32 * pDst)
+ arm_matrix_instance_f32 * pDst)
{
float32_t *pIn = pSrc->pData; /* input data matrix pointer */
float32_t *pOut = pDst->pData; /* output data matrix pointer */
@@ -85,62 +83,61 @@
#if defined (ARM_MATH_DSP)
float32_t maxC; /* maximum value in the column */
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
float32_t Xchg, in = 0.0f, in1; /* Temporary input values */
uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */
arm_status status; /* status of matrix inverse */
#ifdef ARM_MATH_MATRIX_CHECK
-
/* Check for matrix mismatch condition */
- if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
- || (pSrc->numRows != pDst->numRows))
+ if ((pSrc->numRows != pSrc->numCols) ||
+ (pDst->numRows != pDst->numCols) ||
+ (pSrc->numRows != pDst->numRows) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/*--------------------------------------------------------------------------------------------------------------
- * Matrix Inverse can be solved using elementary row operations.
- *
- * Gauss-Jordan Method:
- *
- * 1. First combine the identity matrix and the input matrix separated by a bar to form an
- * augmented matrix as follows:
- * _ _ _ _
- * | a11 a12 | 1 0 | | X11 X12 |
- * | | | = | |
- * |_ a21 a22 | 0 1 _| |_ X21 X21 _|
- *
- * 2. In our implementation, pDst Matrix is used as identity matrix.
- *
- * 3. Begin with the first row. Let i = 1.
- *
- * 4. Check to see if the pivot for column i is the greatest of the column.
- * The pivot is the element of the main diagonal that is on the current row.
- * For instance, if working with row i, then the pivot element is aii.
- * If the pivot is not the most significant of the columns, exchange that row with a row
- * below it that does contain the most significant value in column i. If the most
- * significant value of the column is zero, then an inverse to that matrix does not exist.
- * The most significant value of the column is the absolute maximum.
- *
- * 5. Divide every element of row i by the pivot.
- *
- * 6. For every row below and row i, replace that row with the sum of that row and
- * a multiple of row i so that each new element in column i below row i is zero.
- *
- * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
- * for every element below and above the main diagonal.
- *
- * 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
- * Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
- *----------------------------------------------------------------------------------------------------------------*/
+ * Matrix Inverse can be solved using elementary row operations.
+ *
+ * Gauss-Jordan Method:
+ *
+ * 1. First combine the identity matrix and the input matrix separated by a bar to form an
+ * augmented matrix as follows:
+ * _ _ _ _
+ * | a11 a12 | 1 0 | | X11 X12 |
+ * | | | = | |
+ * |_ a21 a22 | 0 1 _| |_ X21 X21 _|
+ *
+ * 2. In our implementation, pDst Matrix is used as identity matrix.
+ *
+ * 3. Begin with the first row. Let i = 1.
+ *
+ * 4. Check to see if the pivot for column i is the greatest of the column.
+ * The pivot is the element of the main diagonal that is on the current row.
+ * For instance, if working with row i, then the pivot element is aii.
+ * If the pivot is not the most significant of the columns, exchange that row with a row
+ * below it that does contain the most significant value in column i. If the most
+ * significant value of the column is zero, then an inverse to that matrix does not exist.
+ * The most significant value of the column is the absolute maximum.
+ *
+ * 5. Divide every element of row i by the pivot.
+ *
+ * 6. For every row below and row i, replace that row with the sum of that row and
+ * a multiple of row i so that each new element in column i below row i is zero.
+ *
+ * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+ * for every element below and above the main diagonal.
+ *
+ * 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
+ * Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
+ *----------------------------------------------------------------------------------------------------------------*/
/* Working pointer for destination matrix */
pOutT1 = pOut;
@@ -170,7 +167,7 @@
j--;
}
- /* Decrement the loop counter */
+ /* Decrement loop counter */
rowCnt--;
}
@@ -260,7 +257,7 @@
*pOutT2++ = *pOutT1;
*pOutT1++ = Xchg;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
j--;
}
@@ -274,7 +271,7 @@
/* Update the destination pointer modifier */
k++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
}
@@ -385,19 +382,19 @@
in1 = *pInT2;
*pInT2++ = in1 - (in * *pPRT_pDst++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
j--;
}
}
- /* Increment the temporary input pointer */
+ /* Increment temporary input pointer */
pInT1 = pInT1 + l;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
- /* Increment the pivot index */
+ /* Increment pivot index */
i++;
}
@@ -414,8 +411,6 @@
#else
- /* Run the below code for Cortex-M0 */
-
float32_t Xchg, in = 0.0f; /* Temporary input values */
uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */
arm_status status; /* status of matrix inverse */
@@ -423,50 +418,53 @@
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
- if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
- || (pSrc->numRows != pDst->numRows))
+ if ((pSrc->numRows != pSrc->numCols) ||
+ (pDst->numRows != pDst->numCols) ||
+ (pSrc->numRows != pDst->numRows) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
{
/*--------------------------------------------------------------------------------------------------------------
- * Matrix Inverse can be solved using elementary row operations.
- *
- * Gauss-Jordan Method:
- *
- * 1. First combine the identity matrix and the input matrix separated by a bar to form an
- * augmented matrix as follows:
- * _ _ _ _ _ _ _ _
- * | | a11 a12 | | | 1 0 | | | X11 X12 |
- * | | | | | | | = | |
- * |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _|
- *
- * 2. In our implementation, pDst Matrix is used as identity matrix.
- *
- * 3. Begin with the first row. Let i = 1.
- *
- * 4. Check to see if the pivot for row i is zero.
- * The pivot is the element of the main diagonal that is on the current row.
- * For instance, if working with row i, then the pivot element is aii.
- * If the pivot is zero, exchange that row with a row below it that does not
- * contain a zero in column i. If this is not possible, then an inverse
- * to that matrix does not exist.
- *
- * 5. Divide every element of row i by the pivot.
- *
- * 6. For every row below and row i, replace that row with the sum of that row and
- * a multiple of row i so that each new element in column i below row i is zero.
- *
- * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
- * for every element below and above the main diagonal.
- *
- * 8. Now an identical matrix is formed to the left of the bar(input matrix, src).
- * Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
- *----------------------------------------------------------------------------------------------------------------*/
+ * Matrix Inverse can be solved using elementary row operations.
+ *
+ * Gauss-Jordan Method:
+ *
+ * 1. First combine the identity matrix and the input matrix separated by a bar to form an
+ * augmented matrix as follows:
+ * _ _ _ _ _ _ _ _
+ * | | a11 a12 | | | 1 0 | | | X11 X12 |
+ * | | | | | | | = | |
+ * |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _|
+ *
+ * 2. In our implementation, pDst Matrix is used as identity matrix.
+ *
+ * 3. Begin with the first row. Let i = 1.
+ *
+ * 4. Check to see if the pivot for row i is zero.
+ * The pivot is the element of the main diagonal that is on the current row.
+ * For instance, if working with row i, then the pivot element is aii.
+ * If the pivot is zero, exchange that row with a row below it that does not
+ * contain a zero in column i. If this is not possible, then an inverse
+ * to that matrix does not exist.
+ *
+ * 5. Divide every element of row i by the pivot.
+ *
+ * 6. For every row below and row i, replace that row with the sum of that row and
+ * a multiple of row i so that each new element in column i below row i is zero.
+ *
+ * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+ * for every element below and above the main diagonal.
+ *
+ * 8. Now an identical matrix is formed to the left of the bar(input matrix, src).
+ * Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
+ *----------------------------------------------------------------------------------------------------------------*/
/* Working pointer for destination matrix */
pOutT1 = pOut;
@@ -496,7 +494,7 @@
j--;
}
- /* Decrement the loop counter */
+ /* Decrement loop counter */
rowCnt--;
}
@@ -506,7 +504,7 @@
/* Index modifier to navigate through the columns */
l = 0U;
- //for(loopCnt = 0U; loopCnt < numCols; loopCnt++)
+
while (loopCnt > 0U)
{
/* Check if the pivot element is zero..
@@ -640,6 +638,7 @@
*pInT1 = *pInT1 - (in * *pPRT_in++);
pInT1++;
}
+
/* Loop over the number of columns to
replace the elements in the destination matrix */
for (j = 0U; j < numCols; j++)
@@ -651,19 +650,21 @@
}
}
- /* Increment the temporary input pointer */
+
+ /* Increment temporary input pointer */
pInT1 = pInT1 + l;
}
+
/* Increment the input pointer */
pIn++;
/* Decrement the loop counter */
loopCnt--;
+
/* Increment the index modifier */
l++;
}
-
#endif /* #if defined (ARM_MATH_DSP) */
/* Set status as ARM_MATH_SUCCESS */
@@ -682,10 +683,11 @@
status = ARM_MATH_SINGULAR;
}
}
+
/* Return to application */
return (status);
}
/**
- * @} end of MatrixInv group
+ @} end of MatrixInv group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c
index 36bdcad..159f2ee 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c
@@ -3,13 +3,13 @@
* Title: arm_mat_inverse_f64.c
* Description: Floating-point matrix inverse
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,50 +29,28 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
+ */
+
+
+/**
+ @addtogroup MatrixInv
+ @{
*/
/**
- * @defgroup MatrixInv Matrix Inverse
- *
- * Computes the inverse of a matrix.
- *
- * The inverse is defined only if the input matrix is square and non-singular (the determinant
- * is non-zero). The function checks that the input and output matrices are square and of the
- * same size.
- *
- * Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix
- * inversion of floating-point matrices.
- *
- * \par Algorithm
- * The Gauss-Jordan method is used to find the inverse.
- * The algorithm performs a sequence of elementary row-operations until it
- * reduces the input matrix to an identity matrix. Applying the same sequence
- * of elementary row-operations to an identity matrix yields the inverse matrix.
- * If the input matrix is singular, then the algorithm terminates and returns error status
- * <code>ARM_MATH_SINGULAR</code>.
- * \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"
- */
-
-/**
- * @addtogroup MatrixInv
- * @{
- */
-
-/**
- * @brief Floating-point matrix inverse.
- * @param[in] *pSrc points to input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns
- * <code>ARM_MATH_SIZE_MISMATCH</code> if the input matrix is not square or if the size
- * of the output matrix does not match the size of the input matrix.
- * If the input matrix is found to be singular (non-invertible), then the function returns
- * <code>ARM_MATH_SINGULAR</code>. Otherwise, the function returns <code>ARM_MATH_SUCCESS</code>.
+ @brief Floating-point (64 bit) matrix inverse.
+ @param[in] pSrc points to input matrix structure
+ @param[out] pDst points to output matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ - \ref ARM_MATH_SINGULAR : Input matrix is found to be singular (non-invertible)
*/
arm_status arm_mat_inverse_f64(
const arm_matrix_instance_f64 * pSrc,
- arm_matrix_instance_f64 * pDst)
+ arm_matrix_instance_f64 * pDst)
{
float64_t *pIn = pSrc->pData; /* input data matrix pointer */
float64_t *pOut = pDst->pData; /* output data matrix pointer */
@@ -85,62 +63,61 @@
#if defined (ARM_MATH_DSP)
float64_t maxC; /* maximum value in the column */
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
float64_t Xchg, in = 0.0, in1; /* Temporary input values */
uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */
arm_status status; /* status of matrix inverse */
#ifdef ARM_MATH_MATRIX_CHECK
-
/* Check for matrix mismatch condition */
- if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
- || (pSrc->numRows != pDst->numRows))
+ if ((pSrc->numRows != pSrc->numCols) ||
+ (pDst->numRows != pDst->numCols) ||
+ (pSrc->numRows != pDst->numRows) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/*--------------------------------------------------------------------------------------------------------------
- * Matrix Inverse can be solved using elementary row operations.
- *
- * Gauss-Jordan Method:
- *
- * 1. First combine the identity matrix and the input matrix separated by a bar to form an
- * augmented matrix as follows:
- * _ _ _ _
- * | a11 a12 | 1 0 | | X11 X12 |
- * | | | = | |
- * |_ a21 a22 | 0 1 _| |_ X21 X21 _|
- *
- * 2. In our implementation, pDst Matrix is used as identity matrix.
- *
- * 3. Begin with the first row. Let i = 1.
- *
- * 4. Check to see if the pivot for column i is the greatest of the column.
- * The pivot is the element of the main diagonal that is on the current row.
- * For instance, if working with row i, then the pivot element is aii.
- * If the pivot is not the most significant of the columns, exchange that row with a row
- * below it that does contain the most significant value in column i. If the most
- * significant value of the column is zero, then an inverse to that matrix does not exist.
- * The most significant value of the column is the absolute maximum.
- *
- * 5. Divide every element of row i by the pivot.
- *
- * 6. For every row below and row i, replace that row with the sum of that row and
- * a multiple of row i so that each new element in column i below row i is zero.
- *
- * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
- * for every element below and above the main diagonal.
- *
- * 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
- * Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
- *----------------------------------------------------------------------------------------------------------------*/
+ * Matrix Inverse can be solved using elementary row operations.
+ *
+ * Gauss-Jordan Method:
+ *
+ * 1. First combine the identity matrix and the input matrix separated by a bar to form an
+ * augmented matrix as follows:
+ * _ _ _ _
+ * | a11 a12 | 1 0 | | X11 X12 |
+ * | | | = | |
+ * |_ a21 a22 | 0 1 _| |_ X21 X21 _|
+ *
+ * 2. In our implementation, pDst Matrix is used as identity matrix.
+ *
+ * 3. Begin with the first row. Let i = 1.
+ *
+ * 4. Check to see if the pivot for column i is the greatest of the column.
+ * The pivot is the element of the main diagonal that is on the current row.
+ * For instance, if working with row i, then the pivot element is aii.
+ * If the pivot is not the most significant of the columns, exchange that row with a row
+ * below it that does contain the most significant value in column i. If the most
+ * significant value of the column is zero, then an inverse to that matrix does not exist.
+ * The most significant value of the column is the absolute maximum.
+ *
+ * 5. Divide every element of row i by the pivot.
+ *
+ * 6. For every row below and row i, replace that row with the sum of that row and
+ * a multiple of row i so that each new element in column i below row i is zero.
+ *
+ * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+ * for every element below and above the main diagonal.
+ *
+ * 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
+ * Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
+ *----------------------------------------------------------------------------------------------------------------*/
/* Working pointer for destination matrix */
pOutT1 = pOut;
@@ -170,7 +147,7 @@
j--;
}
- /* Decrement the loop counter */
+ /* Decrement loop counter */
rowCnt--;
}
@@ -260,7 +237,7 @@
*pOutT2++ = *pOutT1;
*pOutT1++ = Xchg;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
j--;
}
@@ -274,7 +251,7 @@
/* Update the destination pointer modifier */
k++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
}
@@ -385,19 +362,19 @@
in1 = *pInT2;
*pInT2++ = in1 - (in * *pPRT_pDst++);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
j--;
}
}
- /* Increment the temporary input pointer */
+ /* Increment temporary input pointer */
pInT1 = pInT1 + l;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
k--;
- /* Increment the pivot index */
+ /* Increment pivot index */
i++;
}
@@ -414,8 +391,6 @@
#else
- /* Run the below code for Cortex-M0 */
-
float64_t Xchg, in = 0.0; /* Temporary input values */
uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */
arm_status status; /* status of matrix inverse */
@@ -423,50 +398,53 @@
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
- if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
- || (pSrc->numRows != pDst->numRows))
+ if ((pSrc->numRows != pSrc->numCols) ||
+ (pDst->numRows != pDst->numCols) ||
+ (pSrc->numRows != pDst->numRows) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
{
/*--------------------------------------------------------------------------------------------------------------
- * Matrix Inverse can be solved using elementary row operations.
- *
- * Gauss-Jordan Method:
- *
- * 1. First combine the identity matrix and the input matrix separated by a bar to form an
- * augmented matrix as follows:
- * _ _ _ _ _ _ _ _
- * | | a11 a12 | | | 1 0 | | | X11 X12 |
- * | | | | | | | = | |
- * |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _|
- *
- * 2. In our implementation, pDst Matrix is used as identity matrix.
- *
- * 3. Begin with the first row. Let i = 1.
- *
- * 4. Check to see if the pivot for row i is zero.
- * The pivot is the element of the main diagonal that is on the current row.
- * For instance, if working with row i, then the pivot element is aii.
- * If the pivot is zero, exchange that row with a row below it that does not
- * contain a zero in column i. If this is not possible, then an inverse
- * to that matrix does not exist.
- *
- * 5. Divide every element of row i by the pivot.
- *
- * 6. For every row below and row i, replace that row with the sum of that row and
- * a multiple of row i so that each new element in column i below row i is zero.
- *
- * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
- * for every element below and above the main diagonal.
- *
- * 8. Now an identical matrix is formed to the left of the bar(input matrix, src).
- * Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
- *----------------------------------------------------------------------------------------------------------------*/
+ * Matrix Inverse can be solved using elementary row operations.
+ *
+ * Gauss-Jordan Method:
+ *
+ * 1. First combine the identity matrix and the input matrix separated by a bar to form an
+ * augmented matrix as follows:
+ * _ _ _ _ _ _ _ _
+ * | | a11 a12 | | | 1 0 | | | X11 X12 |
+ * | | | | | | | = | |
+ * |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _|
+ *
+ * 2. In our implementation, pDst Matrix is used as identity matrix.
+ *
+ * 3. Begin with the first row. Let i = 1.
+ *
+ * 4. Check to see if the pivot for row i is zero.
+ * The pivot is the element of the main diagonal that is on the current row.
+ * For instance, if working with row i, then the pivot element is aii.
+ * If the pivot is zero, exchange that row with a row below it that does not
+ * contain a zero in column i. If this is not possible, then an inverse
+ * to that matrix does not exist.
+ *
+ * 5. Divide every element of row i by the pivot.
+ *
+ * 6. For every row below and row i, replace that row with the sum of that row and
+ * a multiple of row i so that each new element in column i below row i is zero.
+ *
+ * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+ * for every element below and above the main diagonal.
+ *
+ * 8. Now an identical matrix is formed to the left of the bar(input matrix, src).
+ * Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
+ *----------------------------------------------------------------------------------------------------------------*/
/* Working pointer for destination matrix */
pOutT1 = pOut;
@@ -496,7 +474,7 @@
j--;
}
- /* Decrement the loop counter */
+ /* Decrement loop counter */
rowCnt--;
}
@@ -506,7 +484,7 @@
/* Index modifier to navigate through the columns */
l = 0U;
- //for(loopCnt = 0U; loopCnt < numCols; loopCnt++)
+
while (loopCnt > 0U)
{
/* Check if the pivot element is zero..
@@ -640,6 +618,7 @@
*pInT1 = *pInT1 - (in * *pPRT_in++);
pInT1++;
}
+
/* Loop over the number of columns to
replace the elements in the destination matrix */
for (j = 0U; j < numCols; j++)
@@ -651,19 +630,21 @@
}
}
- /* Increment the temporary input pointer */
+
+ /* Increment temporary input pointer */
pInT1 = pInT1 + l;
}
+
/* Increment the input pointer */
pIn++;
/* Decrement the loop counter */
loopCnt--;
+
/* Increment the index modifier */
l++;
}
-
#endif /* #if defined (ARM_MATH_DSP) */
/* Set status as ARM_MATH_SUCCESS */
@@ -682,10 +663,11 @@
status = ARM_MATH_SINGULAR;
}
}
+
/* Return to application */
return (status);
}
/**
- * @} end of MatrixInv group
+ @} end of MatrixInv group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c
index a038f2f..bbedb46 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c
@@ -3,13 +3,13 @@
* Title: arm_mat_mult_f32.c
* Description: Floating-point matrix multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,238 +29,164 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @defgroup MatrixMult Matrix Multiplication
- *
- * Multiplies two matrices.
- *
- * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices"
+ @defgroup MatrixMult Matrix Multiplication
- * Matrix multiplication is only defined if the number of columns of the
- * first matrix equals the number of rows of the second matrix.
- * Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
- * in an <code>M x P</code> matrix.
- * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of
- * <code>pSrcA</code> and <code>pSrcB</code> are equal; and (2) that the size of the output
- * matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
- */
+ Multiplies two matrices.
+ \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices"
-/**
- * @addtogroup MatrixMult
- * @{
+ Matrix multiplication is only defined if the number of columns of the
+ first matrix equals the number of rows of the second matrix.
+ Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
+ in an <code>M x P</code> matrix.
+ When matrix size checking is enabled, the functions check:
+ - that the inner dimensions of <code>pSrcA</code> and <code>pSrcB</code> are equal;
+ - that the size of the output matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
*/
/**
- * @brief Floating-point matrix multiplication.
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ @addtogroup MatrixMult
+ @{
+ */
+
+/**
+ @brief Floating-point matrix multiplication.
+ @param[in] pSrcA points to the first input matrix structure
+ @param[in] pSrcB points to the second input matrix structure
+ @param[out] pDst points to output matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
*/
arm_status arm_mat_mult_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst)
+ arm_matrix_instance_f32 * pDst)
{
- float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
- float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
- float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */
- float32_t *pOut = pDst->pData; /* output data matrix pointer */
+ float32_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */
+ float32_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */
+ float32_t *pInA = pSrcA->pData; /* Input data matrix pointer A */
+ float32_t *pInB = pSrcB->pData; /* Input data matrix pointer B */
+ float32_t *pOut = pDst->pData; /* Output data matrix pointer */
float32_t *px; /* Temporary output data matrix pointer */
float32_t sum; /* Accumulator */
- uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
- uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
- uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- float32_t in1, in2, in3, in4;
- uint16_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
- arm_status status; /* status of matrix multiplication */
+ uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */
+ uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */
+ uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */
+ uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */
+ arm_status status; /* Status of matrix multiplication */
#ifdef ARM_MATH_MATRIX_CHECK
-
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcB->numCols != pDst->numCols) )
{
-
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
/* row loop */
do
{
- /* Output pointer is set to starting address of the row being processed */
+ /* Output pointer is set to starting address of row being processed */
px = pOut + i;
- /* For every row wise process, the column loop counter is to be initiated */
+ /* For every row wise process, column loop counter is to be initiated */
col = numColsB;
- /* For every row wise process, the pIn2 pointer is set
- ** to the starting address of the pSrcB data */
+ /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
pIn2 = pSrcB->pData;
- j = 0U;
-
/* column loop */
do
{
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0.0f;
- /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+ /* Initialize pointer pIn1 to point to starting address of column being processed */
pIn1 = pInA;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 MACs at a time. */
colCnt = numColsA >> 2U;
- /* matrix multiplication */
+ /* matrix multiplication */
while (colCnt > 0U)
{
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
- in3 = *pIn2;
- pIn2 += numColsB;
- in1 = pIn1[0];
- in2 = pIn1[1];
- sum += in1 * in3;
- in4 = *pIn2;
- pIn2 += numColsB;
- sum += in2 * in4;
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
- in3 = *pIn2;
+ /* Perform the multiply-accumulates */
+ sum += *pIn1++ * *pIn2;
pIn2 += numColsB;
- in1 = pIn1[2];
- in2 = pIn1[3];
- sum += in1 * in3;
- in4 = *pIn2;
- pIn2 += numColsB;
- sum += in2 * in4;
- pIn1 += 4U;
- /* Decrement the loop count */
+ sum += *pIn1++ * *pIn2;
+ pIn2 += numColsB;
+
+ sum += *pIn1++ * *pIn2;
+ pIn2 += numColsB;
+
+ sum += *pIn1++ * *pIn2;
+ pIn2 += numColsB;
+
+ /* Decrement loop counter */
colCnt--;
}
- /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining MACs */
colCnt = numColsA % 0x4U;
- while (colCnt > 0U)
- {
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
- sum += *pIn1++ * (*pIn2);
- pIn2 += numColsB;
-
- /* Decrement the loop counter */
- colCnt--;
- }
-
- /* Store the result in the destination buffer */
- *px++ = sum;
-
- /* Update the pointer pIn2 to point to the starting address of the next column */
- j++;
- pIn2 = pSrcB->pData + j;
-
- /* Decrement the column loop counter */
- col--;
-
- } while (col > 0U);
-
#else
- /* Run the below code for Cortex-M0 */
-
- float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */
- uint16_t col, i = 0U, row = numRowsA, colCnt; /* loop counters */
- arm_status status; /* status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
- /* Check for matrix mismatch condition */
- if ((pSrcA->numCols != pSrcB->numRows) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
- {
-
- /* Set status as ARM_MATH_SIZE_MISMATCH */
- status = ARM_MATH_SIZE_MISMATCH;
- }
- else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
- {
- /* The following loop performs the dot-product of each row in pInA with each column in pInB */
- /* row loop */
- do
- {
- /* Output pointer is set to starting address of the row being processed */
- px = pOut + i;
-
- /* For every row wise process, the column loop counter is to be initiated */
- col = numColsB;
-
- /* For every row wise process, the pIn2 pointer is set
- ** to the starting address of the pSrcB data */
- pIn2 = pSrcB->pData;
-
- /* column loop */
- do
- {
- /* Set the variable sum, that acts as accumulator, to zero */
- sum = 0.0f;
-
- /* Initialize the pointer pIn1 to point to the starting address of the row being processed */
- pIn1 = pInA;
-
- /* Matrix A columns number of MAC operations are to be performed */
+ /* Initialize cntCnt with number of columns */
colCnt = numColsA;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (colCnt > 0U)
{
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
- sum += *pIn1++ * (*pIn2);
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+ /* Perform the multiply-accumulates */
+ sum += *pIn1++ * *pIn2;
pIn2 += numColsB;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
colCnt--;
}
- /* Store the result in the destination buffer */
+ /* Store result in destination buffer */
*px++ = sum;
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
- /* Update the pointer pIn2 to point to the starting address of the next column */
+ /* Update pointer pIn2 to point to starting address of next column */
pIn2 = pInB + (numColsB - col);
} while (col > 0U);
-#endif /* #if defined (ARM_MATH_DSP) */
-
- /* Update the pointer pInA to point to the starting address of the next row */
+ /* Update pointer pInA to point to starting address of next row */
i = i + numColsB;
pInA = pInA + numColsA;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
} while (row > 0U);
+
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
@@ -270,5 +196,5 @@
}
/**
- * @} end of MatrixMult group
+ @} end of MatrixMult group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
index 8d720c7..e850dfd 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
@@ -3,13 +3,13 @@
* Title: arm_mat_mult_fast_q15.c
* Description: Q15 matrix multiplication (fast variant)
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,206 +29,165 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup MatrixMult
- * @{
+ @addtogroup MatrixMult
+ @{
*/
-
/**
- * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @param[in] *pState points to the array for storing intermediate results
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The difference between the function arm_mat_mult_q15() and this fast variant is that
- * the fast variant use a 32-bit rather than a 64-bit accumulator.
- * The result of each 1.15 x 1.15 multiplication is truncated to
- * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
- * format. Finally, the accumulator is saturated and converted to a 1.15 result.
- *
- * \par
- * The fast version has the same overflow behavior as the standard version but provides
- * less precision since it discards the low 16 bits of each multiplication result.
- * In order to avoid overflows completely the input signals must be scaled down.
- * Scale down one of the input matrices by log2(numColsA) bits to
- * avoid overflows, as a total of numColsA additions are computed internally for each
- * output element.
- *
- * \par
- * See <code>arm_mat_mult_q15()</code> for a slower implementation of this function
- * which uses 64-bit accumulation to provide higher precision.
+ @brief Q15 matrix multiplication (fast variant).
+ @param[in] pSrcA points to the first input matrix structure
+ @param[in] pSrcB points to the second input matrix structure
+ @param[out] pDst points to output matrix structure
+ @param[in] pState points to the array for storing intermediate results
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+ @par Scaling and Overflow Behavior
+ The difference between the function \ref arm_mat_mult_q15() and this fast variant is that
+ the fast variant use a 32-bit rather than a 64-bit accumulator.
+ The result of each 1.15 x 1.15 multiplication is truncated to
+ 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
+ format. Finally, the accumulator is saturated and converted to a 1.15 result.
+ @par
+ The fast version has the same overflow behavior as the standard version but provides
+ less precision since it discards the low 16 bits of each multiplication result.
+ In order to avoid overflows completely the input signals must be scaled down.
+ Scale down one of the input matrices by log2(numColsA) bits to avoid overflows,
+ as a total of numColsA additions are computed internally for each output element.
+ @remark
+ Refer to \ref arm_mat_mult_q15() for a slower implementation of this function
+ which uses 64-bit accumulation to provide higher precision.
*/
arm_status arm_mat_mult_fast_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst,
- q15_t * pState)
+ arm_matrix_instance_q15 * pDst,
+ q15_t * pState)
{
- q31_t sum; /* accumulator */
- q15_t *pSrcBT = pState; /* input data matrix pointer for transpose */
- q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */
- q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */
- q15_t *px; /* Temporary output data matrix pointer */
- uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
- uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
- uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
- uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */
- uint32_t col, i = 0U, row = numRowsB, colCnt; /* loop counters */
- arm_status status; /* status of matrix multiplication */
+ q31_t sum; /* Accumulator */
+ q15_t *pSrcBT = pState; /* Input data matrix pointer for transpose */
+ q15_t *pInA = pSrcA->pData; /* Input data matrix pointer A of Q15 type */
+ q15_t *pInB = pSrcB->pData; /* Input data matrix pointer B of Q15 type */
+ q15_t *px; /* Temporary output data matrix pointer */
+ uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */
+ uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */
+ uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */
+ uint16_t numRowsB = pSrcB->numRows; /* Number of rows of input matrix A */
+ uint32_t col, i = 0U, row = numRowsB, colCnt; /* Loop counters */
+ arm_status status; /* Status of matrix multiplication */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
- q31_t in; /* Temporary variable to hold the input value */
- q31_t inA1, inA2, inB1, inB2;
- q31_t sum2, sum3, sum4;
- q15_t *pInA2, *pInB2, *px2;
- uint32_t j = 0;
-
+#if defined (ARM_MATH_DSP)
+ q31_t in; /* Temporary variable to hold the input value */
+ q31_t inA1, inB1, inA2, inB2;
+ q31_t sum2, sum3, sum4;
+ q15_t *pInA2, *pInB2, *px2;
+ uint32_t j = 0;
#else
-
- q15_t in; /* Temporary variable to hold the input value */
- q15_t inA1, inA2, inB1, inB2;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+ q15_t in; /* Temporary variable to hold the input value */
+ q15_t inA1, inB1, inA2, inB2;
+#endif /* #if defined (ARM_MATH_DSP) */
#ifdef ARM_MATH_MATRIX_CHECK
+
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcB->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
{
/* Matrix transpose */
do
{
- /* Apply loop unrolling and exchange the columns with row elements */
- col = numColsB >> 2;
-
- /* The pointer px is set to starting address of the column being processed */
+ /* The pointer px is set to starting address of column being processed */
px = pSrcBT + i;
+ /* Apply loop unrolling and exchange columns with row elements */
+ col = numColsB >> 2U;
+
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (col > 0U)
{
-#ifndef UNALIGNED_SUPPORT_DISABLE
- /* Read two elements from the row */
- in = *__SIMD32(pInB)++;
- /* Unpack and store one element in the destination */
+#if defined (ARM_MATH_DSP)
+
+ /* Read two elements from row */
+ in = read_q15x2_ia ((q15_t **) &pInB);
+
+ /* Unpack and store one element in destination */
#ifndef ARM_MATH_BIG_ENDIAN
-
*px = (q15_t) in;
-
#else
-
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Update the pointer px to point to the next row of the transposed matrix */
+ /* Update pointer px to point to next row of transposed matrix */
px += numRowsB;
- /* Unpack and store the second element in the destination */
+ /* Unpack and store second element in destination */
#ifndef ARM_MATH_BIG_ENDIAN
-
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
#else
-
*px = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Update the pointer px to point to the next row of the transposed matrix */
+ /* Update pointer px to point to next row of transposed matrix */
px += numRowsB;
- /* Read two elements from the row */
- in = *__SIMD32(pInB)++;
-
- /* Unpack and store one element in the destination */
+ in = read_q15x2_ia ((q15_t **) &pInB);
#ifndef ARM_MATH_BIG_ENDIAN
-
*px = (q15_t) in;
-
#else
-
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Update the pointer px to point to the next row of the transposed matrix */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
px += numRowsB;
- /* Unpack and store the second element in the destination */
-
#ifndef ARM_MATH_BIG_ENDIAN
-
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
#else
-
*px = (q15_t) in;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-#else
-
- /* Read one element from the row */
- in = *pInB++;
-
- /* Store one element in the destination */
- *px = in;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
px += numRowsB;
- /* Read one element from the row */
+#else /* #if defined (ARM_MATH_DSP) */
+
+ /* Read one element from row */
in = *pInB++;
- /* Store one element in the destination */
+ /* Store one element in destination */
*px = in;
- /* Update the pointer px to point to the next row of the transposed matrix */
+ /* Update pointer px to point to next row of transposed matrix */
px += numRowsB;
- /* Read one element from the row */
in = *pInB++;
-
- /* Store one element in the destination */
*px = in;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
- /* Read one element from the row */
in = *pInB++;
-
- /* Store one element in the destination */
*px = in;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
- /* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
- /* Decrement the column loop counter */
+ in = *pInB++;
+ *px = in;
+ px += numRowsB;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ /* Decrement column loop counter */
col--;
}
@@ -238,31 +197,31 @@
while (col > 0U)
{
- /* Read and store the input element in the destination */
+ /* Read and store input element in destination */
*px = *pInB++;
- /* Update the pointer px to point to the next row of the transposed matrix */
+ /* Update pointer px to point to next row of transposed matrix */
px += numRowsB;
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
}
i++;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
} while (row > 0U);
- /* Reset the variables for the usage in the following multiplication process */
+ /* Reset variables for usage in following multiplication process */
row = numRowsA;
i = 0U;
px = pDst->pData;
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
/* Process two rows from matrix A at a time and output two rows at a time */
- row = row >> 1;
+ row = row >> 1U;
px2 = px + numColsB;
#endif
@@ -270,29 +229,28 @@
/* row loop */
while (row > 0U)
{
- /* For every row wise process, the column loop counter is to be initiated */
+ /* For every row wise process, column loop counter is to be initiated */
col = numColsB;
- /* For every row wise process, the pIn2 pointer is set
- ** to the starting address of the transposed pSrcB data */
+ /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
pInB = pSrcBT;
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
/* Process two (transposed) columns from matrix B at a time */
- col = col >> 1;
+ col = col >> 1U;
j = 0;
#endif
/* column loop */
while (col > 0U)
{
- /* Set the variable sum, that acts as accumulator, to zero */
+ /* Set variable sum, that acts as accumulator, to zero */
sum = 0;
- /* Initiate the pointer pInA to point to the starting address of the column being processed */
+ /* Initiate pointer pInA to point to starting address of column being processed */
pInA = pSrcA->pData + i;
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
sum2 = 0;
sum3 = 0;
sum4 = 0;
@@ -301,56 +259,55 @@
pInB2 = pInB + numRowsB;
/* Read in two elements at once - alows dual MAC instruction */
- colCnt = numColsA >> 1;
+ colCnt = numColsA >> 1U;
#else
- colCnt = numColsA >> 2;
+ colCnt = numColsA >> 2U;
#endif
/* matrix multiplication */
while (colCnt > 0U)
{
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-#ifndef UNALIGNED_SUPPORT_DISABLE
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
- inA1 = *__SIMD32(pInA)++;
- inB1 = *__SIMD32(pInB)++;
- inA2 = *__SIMD32(pInA2)++;
- inB2 = *__SIMD32(pInB2)++;
+#if defined (ARM_MATH_DSP)
+ /* read real and imag values from pSrcA and pSrcB buffer */
+ inA1 = read_q15x2_ia ((q15_t **) &pInA);
+ inB1 = read_q15x2_ia ((q15_t **) &pInB);
+ inA2 = read_q15x2_ia ((q15_t **) &pInA2);
+ inB2 = read_q15x2_ia ((q15_t **) &pInB2);
+
+ /* Multiply and Accumlates */
sum = __SMLAD(inA1, inB1, sum);
sum2 = __SMLAD(inA1, inB2, sum2);
sum3 = __SMLAD(inA2, inB1, sum3);
sum4 = __SMLAD(inA2, inB2, sum4);
-
#else
-
- inA1 = *pInA;
- inB1 = *pInB;
+ /* read real and imag values from pSrcA and pSrcB buffer */
+ inA1 = *pInA++;
+ inB1 = *pInB++;
+ /* Multiply and Accumlates */
sum += inA1 * inB1;
- inA2 = pInA[1];
- inB2 = pInB[1];
+ inA2 = *pInA++;
+ inB2 = *pInB++;
sum += inA2 * inB2;
- inA1 = pInA[2];
- inB1 = pInB[2];
+ inA1 = *pInA++;
+ inB1 = *pInB++;
sum += inA1 * inB1;
- inA2 = pInA[3];
- inB2 = pInB[3];
+ inA2 = *pInA++;
+ inB2 = *pInB++;
sum += inA2 * inB2;
+#endif /* #if defined (ARM_MATH_DSP) */
- pInA += 4;
- pInB += 4;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
colCnt--;
}
/* process odd column samples */
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
if (numColsA & 1U) {
inA1 = *pInA++;
inB1 = *pInB++;
@@ -366,44 +323,45 @@
while (colCnt > 0U)
{
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
- sum += (q31_t) (*pInA++) * (*pInB++);
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+ sum += (q31_t) *pInA++ * *pInB++;
+ /* Decrement loop counter */
colCnt--;
}
-#endif
+#endif /* #if defined (ARM_MATH_DSP) */
- /* Saturate and store the result in the destination buffer */
+ /* Saturate and store result in destination buffer */
*px++ = (q15_t) (sum >> 15);
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
*px++ = (q15_t) (sum2 >> 15);
*px2++ = (q15_t) (sum3 >> 15);
*px2++ = (q15_t) (sum4 >> 15);
j += numRowsB * 2;
#endif
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
}
i = i + numColsA;
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
i = i + numColsA;
px = px2 + (numColsB & 1U);
px2 = px + numColsB;
#endif
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
}
/* Compute any remaining odd row/column below */
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
/* Compute remaining output column */
if (numColsB & 1U) {
@@ -412,7 +370,7 @@
row = numRowsA & (~0x1);
/* Point to remaining unfilled column in output matrix */
- px = pDst->pData+numColsB-1;
+ px = pDst->pData + numColsB-1;
pInA = pSrcA->pData;
/* row loop */
@@ -420,26 +378,26 @@
{
/* point to last column in matrix B */
- pInB = pSrcBT + numRowsB*(numColsB-1);
+ pInB = pSrcBT + numRowsB * (numColsB-1);
- /* Set the variable sum, that acts as accumulator, to zero */
+ /* Set variable sum, that acts as accumulator, to zero */
sum = 0;
/* Compute 4 columns at once */
- colCnt = numColsA >> 2;
+ colCnt = numColsA >> 2U;
/* matrix multiplication */
while (colCnt > 0U)
{
- inA1 = *__SIMD32(pInA)++;
- inA2 = *__SIMD32(pInA)++;
- inB1 = *__SIMD32(pInB)++;
- inB2 = *__SIMD32(pInB)++;
+ inA1 = read_q15x2_ia ((q15_t **) &pInA);
+ inA2 = read_q15x2_ia ((q15_t **) &pInA);
+ inB1 = read_q15x2_ia ((q15_t **) &pInB);
+ inB2 = read_q15x2_ia ((q15_t **) &pInB);
sum = __SMLAD(inA1, inB1, sum);
sum = __SMLAD(inA2, inB2, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
colCnt--;
}
@@ -449,11 +407,11 @@
colCnt--;
}
- /* Store the result in the destination buffer */
- *px = (q15_t) (sum >> 15);
+ /* Store result in destination buffer */
+ *px = (q15_t) (sum >> 15);
px += numColsB;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
}
}
@@ -462,7 +420,7 @@
if (numRowsA & 1U) {
/* point to last row in output matrix */
- px = pDst->pData+(numColsB)*(numRowsA-1);
+ px = pDst->pData + (numColsB) * (numRowsA-1);
pInB = pSrcBT;
col = numColsB;
@@ -471,48 +429,48 @@
/* col loop */
while (col > 0)
{
-
/* point to last row in matrix A */
- pInA = pSrcA->pData + (numRowsA-1)*numColsA;
+ pInA = pSrcA->pData + (numRowsA-1) * numColsA;
- /* Set the variable sum, that acts as accumulator, to zero */
+ /* Set variable sum, that acts as accumulator, to zero */
sum = 0;
/* Compute 4 columns at once */
- colCnt = numColsA >> 2;
+ colCnt = numColsA >> 2U;
/* matrix multiplication */
while (colCnt > 0U)
{
- inA1 = *__SIMD32(pInA)++;
- inA2 = *__SIMD32(pInA)++;
- inB1 = *__SIMD32(pInB)++;
- inB2 = *__SIMD32(pInB)++;
+ inA1 = read_q15x2_ia ((q15_t **) &pInA);
+ inA2 = read_q15x2_ia ((q15_t **) &pInA);
+ inB1 = read_q15x2_ia ((q15_t **) &pInB);
+ inB2 = read_q15x2_ia ((q15_t **) &pInB);
sum = __SMLAD(inA1, inB1, sum);
sum = __SMLAD(inA2, inB2, sum);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
colCnt--;
}
- colCnt = numColsA & 3U;
+ colCnt = numColsA % 4U;
while (colCnt > 0U) {
sum += (q31_t) (*pInA++) * (*pInB++);
+
colCnt--;
}
- /* Store the result in the destination buffer */
- *px++ = (q15_t) (sum >> 15);
+ /* Store result in destination buffer */
+ *px++ = (q15_t) (sum >> 15);
- /* Decrement the col loop counter */
+ /* Decrement column loop counter */
col--;
}
}
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+#endif /* #if defined (ARM_MATH_DSP) */
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
@@ -521,5 +479,5 @@
}
/**
- * @} end of MatrixMult group
+ @} end of MatrixMult group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
index 78b33ef..1e63f8f 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
@@ -3,13 +3,13 @@
* Title: arm_mat_mult_fast_q31.c
* Description: Q31 matrix multiplication (fast variant)
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,226 +29,166 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup MatrixMult
- * @{
+ @addtogroup MatrixMult
+ @{
*/
/**
- * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The difference between the function arm_mat_mult_q31() and this fast variant is that
- * the fast variant use a 32-bit rather than a 64-bit accumulator.
- * The result of each 1.31 x 1.31 multiplication is truncated to
- * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
- * format. Finally, the accumulator is saturated and converted to a 1.31 result.
- *
- * \par
- * The fast version has the same overflow behavior as the standard version but provides
- * less precision since it discards the low 32 bits of each multiplication result.
- * In order to avoid overflows completely the input signals must be scaled down.
- * Scale down one of the input matrices by log2(numColsA) bits to
- * avoid overflows, as a total of numColsA additions are computed internally for each
- * output element.
- *
- * \par
- * See <code>arm_mat_mult_q31()</code> for a slower implementation of this function
- * which uses 64-bit accumulation to provide higher precision.
+ @brief Q31 matrix multiplication (fast variant).
+ @param[in] pSrcA points to the first input matrix structure
+ @param[in] pSrcB points to the second input matrix structure
+ @param[out] pDst points to output matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+ @par Scaling and Overflow Behavior
+ The difference between the function \ref arm_mat_mult_q31() and this fast variant is that
+ the fast variant use a 32-bit rather than a 64-bit accumulator.
+ The result of each 1.31 x 1.31 multiplication is truncated to
+ 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
+ format. Finally, the accumulator is saturated and converted to a 1.31 result.
+ @par
+ The fast version has the same overflow behavior as the standard version but provides
+ less precision since it discards the low 32 bits of each multiplication result.
+ In order to avoid overflows completely the input signals must be scaled down.
+ Scale down one of the input matrices by log2(numColsA) bits to avoid overflows,
+ as a total of numColsA additions are computed internally for each output element.
+ @remark
+ Refer to \ref arm_mat_mult_q31() for a slower implementation of this function
+ which uses 64-bit accumulation to provide higher precision.
*/
arm_status arm_mat_mult_fast_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst)
+ arm_matrix_instance_q31 * pDst)
{
- q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */
- q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */
- q31_t *px; /* Temporary output data matrix pointer */
- q31_t sum; /* Accumulator */
- uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
- uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
- uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
- uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
- arm_status status; /* status of matrix multiplication */
- q31_t inA1, inB1;
-
-#if defined (ARM_MATH_DSP)
-
- q31_t sum2, sum3, sum4;
- q31_t inA2, inB2;
+ q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */
+ q31_t *pInB = pSrcB->pData; /* Input data matrix pointer B */
q31_t *pInA2;
+ q31_t *px; /* Temporary output data matrix pointer */
q31_t *px2;
+ q31_t sum1, sum2, sum3, sum4; /* Accumulator */
+ q31_t inA1, inA2, inB1, inB2;
+ uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */
+ uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */
+ uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */
+ uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* Loop counters */
+ arm_status status; /* Status of matrix multiplication */
-#endif
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcB->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
-
px = pDst->pData;
-#if defined (ARM_MATH_DSP)
- row = row >> 1;
+ row = row >> 1U;
px2 = px + numColsB;
-#endif
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
/* row loop */
while (row > 0U)
{
-
- /* For every row wise process, the column loop counter is to be initiated */
+ /* For every row wise process, column loop counter is to be initiated */
col = numColsB;
- /* For every row wise process, the pIn2 pointer is set
- ** to the starting address of the pSrcB data */
+ /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
pInB = pSrcB->pData;
j = 0U;
-#if defined (ARM_MATH_DSP)
- col = col >> 1;
-#endif
+ col = col >> 1U;
/* column loop */
while (col > 0U)
{
/* Set the variable sum, that acts as accumulator, to zero */
- sum = 0;
-
- /* Initiate data pointers */
- pInA = pSrcA->pData + i;
- pInB = pSrcB->pData + j;
-
-#if defined (ARM_MATH_DSP)
+ sum1 = 0;
sum2 = 0;
sum3 = 0;
sum4 = 0;
+
+ /* Initiate data pointers */
+ pInA = pSrcA->pData + i;
+ pInB = pSrcB->pData + j;
pInA2 = pInA + numColsA;
+
colCnt = numColsA;
-#else
- colCnt = numColsA >> 2;
-#endif
/* matrix multiplication */
while (colCnt > 0U)
{
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-#if defined (ARM_MATH_DSP)
inA1 = *pInA++;
inB1 = pInB[0];
inA2 = *pInA2++;
inB2 = pInB[1];
pInB += numColsB;
- sum = __SMMLA(inA1, inB1, sum);
+#if defined (ARM_MATH_DSP)
+ sum1 = __SMMLA(inA1, inB1, sum1);
sum2 = __SMMLA(inA1, inB2, sum2);
sum3 = __SMMLA(inA2, inB1, sum3);
sum4 = __SMMLA(inA2, inB2, sum4);
#else
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
- /* Perform the multiply-accumulates */
- inB1 = *pInB;
- pInB += numColsB;
- inA1 = pInA[0];
- sum = __SMMLA(inA1, inB1, sum);
-
- inB1 = *pInB;
- pInB += numColsB;
- inA1 = pInA[1];
- sum = __SMMLA(inA1, inB1, sum);
-
- inB1 = *pInB;
- pInB += numColsB;
- inA1 = pInA[2];
- sum = __SMMLA(inA1, inB1, sum);
-
- inB1 = *pInB;
- pInB += numColsB;
- inA1 = pInA[3];
- sum = __SMMLA(inA1, inB1, sum);
-
- pInA += 4U;
+ sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
+ sum2 = (q31_t) ((((q63_t) sum2 << 32) + ((q63_t) inA1 * inB2)) >> 32);
+ sum3 = (q31_t) ((((q63_t) sum3 << 32) + ((q63_t) inA2 * inB1)) >> 32);
+ sum4 = (q31_t) ((((q63_t) sum4 << 32) + ((q63_t) inA2 * inB2)) >> 32);
#endif
- /* Decrement the loop counter */
+ /* Decrement loop counter */
colCnt--;
}
-#ifdef ARM_MATH_CM0_FAMILY
- /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here. */
- colCnt = numColsA % 0x4U;
- while (colCnt > 0U)
- {
- sum = __SMMLA(*pInA++, *pInB, sum);
- pInB += numColsB;
- colCnt--;
- }
- j++;
-#endif
-
/* Convert the result from 2.30 to 1.31 format and store in destination buffer */
- *px++ = sum << 1;
-
-#if defined (ARM_MATH_DSP)
+ *px++ = sum1 << 1;
*px++ = sum2 << 1;
*px2++ = sum3 << 1;
*px2++ = sum4 << 1;
+
j += 2;
-#endif
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
-
}
- i = i + numColsA;
+ i = i + (numColsA << 1U);
+ px = px2 + (numColsB & 1U);
+ px2 = px + numColsB;
-#if defined (ARM_MATH_DSP)
- i = i + numColsA;
- px = px2 + (numColsB & 1U);
- px2 = px + numColsB;
-#endif
-
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
-
}
/* Compute any remaining odd row/column below */
-#if defined (ARM_MATH_DSP)
-
/* Compute remaining output column */
if (numColsB & 1U) {
/* Avoid redundant computation of last element */
- row = numRowsA & (~0x1);
+ row = numRowsA & (~1U);
/* Point to remaining unfilled column in output matrix */
- px = pDst->pData+numColsB-1;
+ px = pDst->pData + numColsB-1;
pInA = pSrcA->pData;
/* row loop */
@@ -258,49 +198,75 @@
/* point to last column in matrix B */
pInB = pSrcB->pData + numColsB-1;
- /* Set the variable sum, that acts as accumulator, to zero */
- sum = 0;
+ /* Set variable sum1, that acts as accumulator, to zero */
+ sum1 = 0;
- /* Compute 4 columns at once */
- colCnt = numColsA >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 columns at a time. */
+ colCnt = numColsA >> 2U;
/* matrix multiplication */
while (colCnt > 0U)
{
- inA1 = *pInA++;
- inA2 = *pInA++;
- inB1 = *pInB;
+#if defined (ARM_MATH_DSP)
+ sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+ sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
pInB += numColsB;
- inB2 = *pInB;
- pInB += numColsB;
- sum = __SMMLA(inA1, inB1, sum);
- sum = __SMMLA(inA2, inB2, sum);
- inA1 = *pInA++;
- inA2 = *pInA++;
- inB1 = *pInB;
+#if defined (ARM_MATH_DSP)
+ sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+ sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
pInB += numColsB;
- inB2 = *pInB;
- pInB += numColsB;
- sum = __SMMLA(inA1, inB1, sum);
- sum = __SMMLA(inA2, inB2, sum);
- /* Decrement the loop counter */
+#if defined (ARM_MATH_DSP)
+ sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+ sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+ pInB += numColsB;
+
+#if defined (ARM_MATH_DSP)
+ sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+ sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+ pInB += numColsB;
+
+ /* Decrement loop counter */
colCnt--;
}
- colCnt = numColsA & 3U;
+ /* Loop unrolling: Compute remaining column */
+ colCnt = numColsA % 4U;
+
+#else
+
+ /* Initialize colCnt with number of columns */
+ colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (colCnt > 0U) {
- sum = __SMMLA(*pInA++, *pInB, sum);
+#if defined (ARM_MATH_DSP)
+ sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+ sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
pInB += numColsB;
+
colCnt--;
}
/* Convert the result from 2.30 to 1.31 format and store in destination buffer */
- *px = sum << 1;
+ *px = sum1 << 1;
px += numColsB;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
}
}
@@ -309,7 +275,7 @@
if (numRowsA & 1U) {
/* point to last row in output matrix */
- px = pDst->pData+(numColsB)*(numRowsA-1);
+ px = pDst->pData + (numColsB) * (numRowsA-1);
col = numColsB;
i = 0U;
@@ -319,14 +285,16 @@
{
/* point to last row in matrix A */
- pInA = pSrcA->pData + (numRowsA-1)*numColsA;
+ pInA = pSrcA->pData + (numRowsA-1) * numColsA;
pInB = pSrcB->pData + i;
- /* Set the variable sum, that acts as accumulator, to zero */
- sum = 0;
+ /* Set variable sum1, that acts as accumulator, to zero */
+ sum1 = 0;
- /* Compute 4 columns at once */
- colCnt = numColsA >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 columns at a time. */
+ colCnt = numColsA >> 2U;
/* matrix multiplication */
while (colCnt > 0U)
@@ -337,8 +305,13 @@
pInB += numColsB;
inB2 = *pInB;
pInB += numColsB;
- sum = __SMMLA(inA1, inB1, sum);
- sum = __SMMLA(inA2, inB2, sum);
+#if defined (ARM_MATH_DSP)
+ sum1 = __SMMLA(inA1, inB1, sum1);
+ sum1 = __SMMLA(inA2, inB2, sum1);
+#else
+ sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
+ sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA2 * inB2)) >> 32);
+#endif
inA1 = *pInA++;
inA2 = *pInA++;
@@ -346,32 +319,49 @@
pInB += numColsB;
inB2 = *pInB;
pInB += numColsB;
- sum = __SMMLA(inA1, inB1, sum);
- sum = __SMMLA(inA2, inB2, sum);
+#if defined (ARM_MATH_DSP)
+ sum1 = __SMMLA(inA1, inB1, sum1);
+ sum1 = __SMMLA(inA2, inB2, sum1);
+#else
+ sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
+ sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA2 * inB2)) >> 32);
+#endif
- /* Decrement the loop counter */
+ /* Decrement loop counter */
colCnt--;
}
- colCnt = numColsA & 3U;
+ /* Loop unrolling: Compute remaining column */
+ colCnt = numColsA % 4U;
+
+#else
+
+ /* Initialize colCnt with number of columns */
+ colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (colCnt > 0U) {
- sum = __SMMLA(*pInA++, *pInB, sum);
+#if defined (ARM_MATH_DSP)
+ sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+ sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
pInB += numColsB;
+
colCnt--;
}
/* Saturate and store the result in the destination buffer */
- *px++ = sum << 1;
+ *px++ = sum1 << 1;
i++;
- /* Decrement the col loop counter */
+ /* Decrement col loop counter */
col--;
}
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
@@ -380,5 +370,5 @@
}
/**
- * @} end of MatrixMult group
+ @} end of MatrixMult group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c
index 3244f47..13dd6bd 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c
@@ -3,13 +3,13 @@
* Title: arm_mat_mult_q15.c
* Description: Q15 matrix multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,206 +29,129 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup MatrixMult
- * @{
+ @addtogroup MatrixMult
+ @{
*/
-
/**
- * @brief Q15 matrix multiplication
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @param[in] *pState points to the array for storing intermediate results (Unused)
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator. The inputs to the
- * multiplications are in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate
- * results are accumulated in a 64-bit accumulator in 34.30 format. This approach
- * provides 33 guard bits and there is no risk of overflow. The 34.30 result is then
- * truncated to 34.15 format by discarding the low 15 bits and then saturated to
- * 1.15 format.
- *
- * \par
- * Refer to <code>arm_mat_mult_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
- *
+ @brief Q15 matrix multiplication.
+ @param[in] pSrcA points to the first input matrix structure
+ @param[in] pSrcB points to the second input matrix structure
+ @param[out] pDst points to output matrix structure
+ @param[in] pState points to the array for storing intermediate results (Unused)
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator. The inputs to the
+ multiplications are in 1.15 format and multiplications yield a 2.30 result.
+ The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+ This approach provides 33 guard bits and there is no risk of overflow.
+ The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits
+ and then saturated to 1.15 format.
+ @par
+ Refer to \ref arm_mat_mult_fast_q15() for a faster but less precise version of this function.
*/
arm_status arm_mat_mult_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst,
- q15_t * pState)
+ arm_matrix_instance_q15 * pDst,
+ q15_t * pState)
{
- q63_t sum; /* accumulator */
+ q63_t sum; /* Accumulator */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_DSP) /* != CM0 */
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q15_t *pSrcBT = pState; /* input data matrix pointer for transpose */
- q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */
- q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */
- q15_t *px; /* Temporary output data matrix pointer */
- uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
- uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
- uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
- uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */
- uint16_t col, i = 0U, row = numRowsB, colCnt; /* loop counters */
- arm_status status; /* status of matrix multiplication */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
- q31_t in; /* Temporary variable to hold the input value */
- q31_t pSourceA1, pSourceB1, pSourceA2, pSourceB2;
-
-#else
-
- q15_t in; /* Temporary variable to hold the input value */
- q15_t inA1, inB1, inA2, inB2;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+ q15_t *pSrcBT = pState; /* Input data matrix pointer for transpose */
+ q15_t *pInA = pSrcA->pData; /* Input data matrix pointer A of Q15 type */
+ q15_t *pInB = pSrcB->pData; /* Input data matrix pointer B of Q15 type */
+ q15_t *px; /* Temporary output data matrix pointer */
+ uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */
+ uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */
+ uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */
+ uint16_t numRowsB = pSrcB->numRows; /* Number of rows of input matrix A */
+ uint32_t col, i = 0U, row = numRowsB, colCnt; /* Loop counters */
+ arm_status status; /* Status of matrix multiplication */
+
+ q31_t in; /* Temporary variable to hold the input value */
+ q31_t inA1, inB1, inA2, inB2;
#ifdef ARM_MATH_MATRIX_CHECK
+
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcB->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
{
/* Matrix transpose */
do
{
- /* Apply loop unrolling and exchange the columns with row elements */
- col = numColsB >> 2;
-
- /* The pointer px is set to starting address of the column being processed */
+ /* The pointer px is set to starting address of column being processed */
px = pSrcBT + i;
+ /* Apply loop unrolling and exchange columns with row elements */
+ col = numColsB >> 2U;
+
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (col > 0U)
{
-#ifndef UNALIGNED_SUPPORT_DISABLE
+ /* Read two elements from row */
+ in = read_q15x2_ia ((q15_t **) &pInB);
- /* Read two elements from the row */
- in = *__SIMD32(pInB)++;
-
- /* Unpack and store one element in the destination */
+ /* Unpack and store one element in destination */
#ifndef ARM_MATH_BIG_ENDIAN
-
*px = (q15_t) in;
-
#else
-
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- /* Update the pointer px to point to the next row of the transposed matrix */
+ /* Update pointer px to point to next row of transposed matrix */
px += numRowsB;
- /* Unpack and store the second element in the destination */
+ /* Unpack and store second element in destination */
#ifndef ARM_MATH_BIG_ENDIAN
-
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
#else
-
*px = (q15_t) in;
-
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- /* Update the pointer px to point to the next row of the transposed matrix */
+ /* Update pointer px to point to next row of transposed matrix */
px += numRowsB;
- /* Read two elements from the row */
- in = *__SIMD32(pInB)++;
+ /* Read two elements from row */
+ in = read_q15x2_ia ((q15_t **) &pInB);
- /* Unpack and store one element in the destination */
+ /* Unpack and store one element in destination */
#ifndef ARM_MATH_BIG_ENDIAN
-
*px = (q15_t) in;
-
#else
-
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
- /* Unpack and store the second element in the destination */
-
#ifndef ARM_MATH_BIG_ENDIAN
-
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
#else
-
*px = (q15_t) in;
-
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
-#else
-
- /* Read one element from the row */
- in = *pInB++;
-
- /* Store one element in the destination */
- *px = in;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- px += numRowsB;
-
- /* Read one element from the row */
- in = *pInB++;
-
- /* Store one element in the destination */
- *px = in;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- px += numRowsB;
-
- /* Read one element from the row */
- in = *pInB++;
-
- /* Store one element in the destination */
- *px = in;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- px += numRowsB;
-
- /* Read one element from the row */
- in = *pInB++;
-
- /* Store one element in the destination */
- *px = in;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- px += numRowsB;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
}
@@ -238,24 +161,24 @@
while (col > 0U)
{
- /* Read and store the input element in the destination */
+ /* Read and store input element in destination */
*px = *pInB++;
- /* Update the pointer px to point to the next row of the transposed matrix */
+ /* Update pointer px to point to next row of transposed matrix */
px += numRowsB;
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
}
i++;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
} while (row > 0U);
- /* Reset the variables for the usage in the following multiplication process */
+ /* Reset variables for usage in following multiplication process */
row = numRowsA;
i = 0U;
px = pDst->pData;
@@ -264,123 +187,98 @@
/* row loop */
do
{
- /* For every row wise process, the column loop counter is to be initiated */
+ /* For every row wise process, column loop counter is to be initiated */
col = numColsB;
- /* For every row wise process, the pIn2 pointer is set
- ** to the starting address of the transposed pSrcB data */
+ /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
pInB = pSrcBT;
/* column loop */
do
{
- /* Set the variable sum, that acts as accumulator, to zero */
+ /* Set variable sum, that acts as accumulator, to zero */
sum = 0;
- /* Apply loop unrolling and compute 2 MACs simultaneously. */
- colCnt = numColsA >> 2;
-
- /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+ /* Initiate pointer pInA to point to starting address of column being processed */
pInA = pSrcA->pData + i;
+ /* Apply loop unrolling and compute 2 MACs simultaneously. */
+ colCnt = numColsA >> 2U;
/* matrix multiplication */
while (colCnt > 0U)
{
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-#ifndef UNALIGNED_SUPPORT_DISABLE
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
/* read real and imag values from pSrcA and pSrcB buffer */
- pSourceA1 = *__SIMD32(pInA)++;
- pSourceB1 = *__SIMD32(pInB)++;
+ inA1 = read_q15x2_ia ((q15_t **) &pInA);
+ inB1 = read_q15x2_ia ((q15_t **) &pInB);
- pSourceA2 = *__SIMD32(pInA)++;
- pSourceB2 = *__SIMD32(pInB)++;
+ inA2 = read_q15x2_ia ((q15_t **) &pInA);
+ inB2 = read_q15x2_ia ((q15_t **) &pInB);
/* Multiply and Accumlates */
- sum = __SMLALD(pSourceA1, pSourceB1, sum);
- sum = __SMLALD(pSourceA2, pSourceB2, sum);
+ sum = __SMLALD(inA1, inB1, sum);
+ sum = __SMLALD(inA2, inB2, sum);
-#else
- /* read real and imag values from pSrcA and pSrcB buffer */
- inA1 = *pInA++;
- inB1 = *pInB++;
- inA2 = *pInA++;
- /* Multiply and Accumlates */
- sum += inA1 * inB1;
- inB2 = *pInB++;
-
- inA1 = *pInA++;
- inB1 = *pInB++;
- /* Multiply and Accumlates */
- sum += inA2 * inB2;
- inA2 = *pInA++;
- inB2 = *pInB++;
-
- /* Multiply and Accumlates */
- sum += inA1 * inB1;
- sum += inA2 * inB2;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
colCnt--;
}
/* process remaining column samples */
- colCnt = numColsA & 3U;
+ colCnt = numColsA % 0x4U;
while (colCnt > 0U)
{
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
sum += *pInA++ * *pInB++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
colCnt--;
}
- /* Saturate and store the result in the destination buffer */
+ /* Saturate and store result in destination buffer */
*px = (q15_t) (__SSAT((sum >> 15), 16));
px++;
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
} while (col > 0U);
i = i + numColsA;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
} while (row > 0U);
-#else
+#else /* #if defined (ARM_MATH_DSP) */
- /* Run the below code for Cortex-M0 */
-
- q15_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
- q15_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
- q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */
- q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */
- q15_t *pOut = pDst->pData; /* output data matrix pointer */
- q15_t *px; /* Temporary output data matrix pointer */
- uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
- uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
- uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
- uint16_t col, i = 0U, row = numRowsA, colCnt; /* loop counters */
- arm_status status; /* status of matrix multiplication */
+ q15_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */
+ q15_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */
+ q15_t *pInA = pSrcA->pData; /* Input data matrix pointer A of Q15 type */
+ q15_t *pInB = pSrcB->pData; /* Input data matrix pointer B of Q15 type */
+ q15_t *pOut = pDst->pData; /* Output data matrix pointer */
+ q15_t *px; /* Temporary output data matrix pointer */
+ uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */
+ uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */
+ uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */
+ uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */
+ arm_status status; /* Status of matrix multiplication */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcB->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
+
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
@@ -391,11 +289,10 @@
/* Output pointer is set to starting address of the row being processed */
px = pOut + i;
- /* For every row wise process, the column loop counter is to be initiated */
+ /* For every row wise process, column loop counter is to be initiated */
col = numColsB;
- /* For every row wise process, the pIn2 pointer is set
- ** to the starting address of the pSrcB data */
+ /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
pIn2 = pSrcB->pData;
/* column loop */
@@ -404,7 +301,7 @@
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0;
- /* Initiate the pointer pIn1 to point to the starting address of pSrcA */
+ /* Initiate pointer pIn1 to point to starting address of pSrcA */
pIn1 = pInA;
/* Matrix A columns number of MAC operations are to be performed */
@@ -413,38 +310,41 @@
/* matrix multiplication */
while (colCnt > 0U)
{
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
- /* Perform the multiply-accumulates */
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+ /* Perform multiply-accumulates */
sum += (q31_t) * pIn1++ * *pIn2;
pIn2 += numColsB;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
colCnt--;
}
- /* Convert the result from 34.30 to 1.15 format and store the saturated value in destination buffer */
- /* Saturate and store the result in the destination buffer */
+ /* Convert result from 34.30 to 1.15 format and store saturated value in destination buffer */
+
+ /* Saturate and store result in destination buffer */
*px++ = (q15_t) __SSAT((sum >> 15), 16);
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
- /* Update the pointer pIn2 to point to the starting address of the next column */
+ /* Update pointer pIn2 to point to starting address of next column */
pIn2 = pInB + (numColsB - col);
} while (col > 0U);
- /* Update the pointer pSrcA to point to the starting address of the next row */
+ /* Update pointer pSrcA to point to starting address of next row */
i = i + numColsB;
pInA = pInA + numColsA;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
} while (row > 0U);
#endif /* #if defined (ARM_MATH_DSP) */
- /* set status as ARM_MATH_SUCCESS */
+
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
@@ -453,5 +353,5 @@
}
/**
- * @} end of MatrixMult group
+ @} end of MatrixMult group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c
index 9bd2b97..f57a34f 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c
@@ -3,13 +3,13 @@
* Title: arm_mat_mult_q31.c
* Description: Q31 matrix multiplication
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,254 +29,168 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup MatrixMult
- * @{
+ @addtogroup MatrixMult
+ @{
*/
/**
- * @brief Q31 matrix multiplication
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate
- * multiplication results but provides only a single guard bit. There is no saturation
- * on intermediate additions. Thus, if the accumulator overflows it wraps around and
- * distorts the result. The input signals should be scaled down to avoid intermediate
- * overflows. The input is thus scaled down by log2(numColsA) bits
- * to avoid overflows, as a total of numColsA additions are performed internally.
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
- *
- * \par
- * See <code>arm_mat_mult_fast_q31()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
- *
+ @brief Q31 matrix multiplication.
+ @param[in] pSrcA points to the first input matrix structure
+ @param[in] pSrcB points to the second input matrix structure
+ @param[out] pDst points to output matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The accumulator has a 2.62 format and maintains full precision of the intermediate
+ multiplication results but provides only a single guard bit. There is no saturation
+ on intermediate additions. Thus, if the accumulator overflows it wraps around and
+ distorts the result. The input signals should be scaled down to avoid intermediate
+ overflows. The input is thus scaled down by log2(numColsA) bits
+ to avoid overflows, as a total of numColsA additions are performed internally.
+ The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+ @remark
+ Refer to \ref arm_mat_mult_fast_q31() for a faster but less precise implementation of this function.
*/
arm_status arm_mat_mult_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst)
+ arm_matrix_instance_q31 * pDst)
{
- q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
- q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
- q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */
- q31_t *pOut = pDst->pData; /* output data matrix pointer */
+ q31_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */
+ q31_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */
+ q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */
+ q31_t *pInB = pSrcB->pData; /* Input data matrix pointer B */
+ q31_t *pOut = pDst->pData; /* Output data matrix pointer */
q31_t *px; /* Temporary output data matrix pointer */
q63_t sum; /* Accumulator */
- uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
- uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
- uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- uint16_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
- arm_status status; /* status of matrix multiplication */
- q31_t a0, a1, a2, a3, b0, b1, b2, b3;
+ uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */
+ uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */
+ uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */
+ uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */
+ arm_status status; /* Status of matrix multiplication */
#ifdef ARM_MATH_MATRIX_CHECK
-
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcB->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
/* row loop */
do
{
- /* Output pointer is set to starting address of the row being processed */
+ /* Output pointer is set to starting address of row being processed */
px = pOut + i;
- /* For every row wise process, the column loop counter is to be initiated */
+ /* For every row wise process, column loop counter is to be initiated */
col = numColsB;
- /* For every row wise process, the pIn2 pointer is set
- ** to the starting address of the pSrcB data */
+ /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
pIn2 = pSrcB->pData;
- j = 0U;
-
/* column loop */
do
{
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0;
- /* Initiate the pointer pIn1 to point to the starting address of pInA */
+ /* Initialize pointer pIn1 to point to starting address of column being processed */
pIn1 = pInA;
- /* Apply loop unrolling and compute 4 MACs simultaneously. */
- colCnt = numColsA >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+ /* Loop unrolling: Compute 4 MACs at a time. */
+ colCnt = numColsA >> 2U;
/* matrix multiplication */
while (colCnt > 0U)
{
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
/* Perform the multiply-accumulates */
- b0 = *pIn2;
+ sum += (q63_t) *pIn1++ * *pIn2;
pIn2 += numColsB;
- a0 = *pIn1++;
- a1 = *pIn1++;
-
- b1 = *pIn2;
- pIn2 += numColsB;
- b2 = *pIn2;
+ sum += (q63_t) *pIn1++ * *pIn2;
pIn2 += numColsB;
- sum += (q63_t) a0 *b0;
- sum += (q63_t) a1 *b1;
-
- a2 = *pIn1++;
- a3 = *pIn1++;
-
- b3 = *pIn2;
+ sum += (q63_t) *pIn1++ * *pIn2;
pIn2 += numColsB;
- sum += (q63_t) a2 *b2;
- sum += (q63_t) a3 *b3;
+ sum += (q63_t) *pIn1++ * *pIn2;
+ pIn2 += numColsB;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
colCnt--;
}
- /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining MACs */
colCnt = numColsA % 0x4U;
- while (colCnt > 0U)
- {
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
- /* Perform the multiply-accumulates */
- sum += (q63_t) * pIn1++ * *pIn2;
- pIn2 += numColsB;
-
- /* Decrement the loop counter */
- colCnt--;
- }
-
- /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
- *px++ = (q31_t) (sum >> 31);
-
- /* Update the pointer pIn2 to point to the starting address of the next column */
- j++;
- pIn2 = (pSrcB->pData) + j;
-
- /* Decrement the column loop counter */
- col--;
-
- } while (col > 0U);
-
#else
- /* Run the below code for Cortex-M0 */
-
- q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */
- uint16_t col, i = 0U, row = numRowsA, colCnt; /* loop counters */
- arm_status status; /* status of matrix multiplication */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
- /* Check for matrix mismatch condition */
- if ((pSrcA->numCols != pSrcB->numRows) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
- {
- /* Set status as ARM_MATH_SIZE_MISMATCH */
- status = ARM_MATH_SIZE_MISMATCH;
- }
- else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
- {
- /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
- /* row loop */
- do
- {
- /* Output pointer is set to starting address of the row being processed */
- px = pOut + i;
-
- /* For every row wise process, the column loop counter is to be initiated */
- col = numColsB;
-
- /* For every row wise process, the pIn2 pointer is set
- ** to the starting address of the pSrcB data */
- pIn2 = pSrcB->pData;
-
- /* column loop */
- do
- {
- /* Set the variable sum, that acts as accumulator, to zero */
- sum = 0;
-
- /* Initiate the pointer pIn1 to point to the starting address of pInA */
- pIn1 = pInA;
-
- /* Matrix A columns number of MAC operations are to be performed */
+ /* Initialize cntCnt with number of columns */
colCnt = numColsA;
- /* matrix multiplication */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (colCnt > 0U)
{
- /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+ /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
/* Perform the multiply-accumulates */
- sum += (q63_t) * pIn1++ * *pIn2;
+ sum += (q63_t) *pIn1++ * *pIn2;
pIn2 += numColsB;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
colCnt--;
}
- /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
- *px++ = (q31_t) clip_q63_to_q31(sum >> 31);
+ /* Convert result from 2.62 to 1.31 format and store in destination buffer */
+ *px++ = (q31_t) (sum >> 31);
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
- /* Update the pointer pIn2 to point to the starting address of the next column */
+ /* Update pointer pIn2 to point to starting address of next column */
pIn2 = pInB + (numColsB - col);
} while (col > 0U);
-#endif
-
- /* Update the pointer pInA to point to the starting address of the next row */
+ /* Update pointer pInA to point to starting address of next row */
i = i + numColsB;
pInA = pInA + numColsA;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
} while (row > 0U);
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
+
/* Return to application */
return (status);
}
/**
- * @} end of MatrixMult group
+ @} end of MatrixMult group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c
index dbc385a..071d465 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c
@@ -3,13 +3,13 @@
* Title: arm_mat_scale_f32.c
* Description: Multiplies a floating-point matrix by a scalar
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,130 +29,107 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @defgroup MatrixScale Matrix Scale
- *
- * Multiplies a matrix by a scalar. This is accomplished by multiplying each element in the
- * matrix by the scalar. For example:
- * \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix"
- *
- * The function checks to make sure that the input and output matrices are of the same size.
- *
- * In the fixed-point Q15 and Q31 functions, <code>scale</code> is represented by
- * a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
- * The shift allows the gain of the scaling operation to exceed 1.0.
- * The overall scale factor applied to the fixed-point data is
- * <pre>
- * scale = scaleFract * 2^shift.
- * </pre>
+ @defgroup MatrixScale Matrix Scale
+
+ Multiplies a matrix by a scalar. This is accomplished by multiplying each element in the
+ matrix by the scalar. For example:
+ \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix"
+
+ The function checks to make sure that the input and output matrices are of the same size.
+
+ In the fixed-point Q15 and Q31 functions, <code>scale</code> is represented by
+ a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
+ The shift allows the gain of the scaling operation to exceed 1.0.
+ The overall scale factor applied to the fixed-point data is
+ <pre>
+ scale = scaleFract * 2^shift.
+ </pre>
*/
/**
- * @addtogroup MatrixScale
- * @{
+ @addtogroup MatrixScale
+ @{
*/
/**
- * @brief Floating-point matrix scaling.
- * @param[in] *pSrc points to input matrix structure
- * @param[in] scale scale factor to be applied
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
- * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
+ @brief Floating-point matrix scaling.
+ @param[in] pSrc points to input matrix
+ @param[in] scale scale factor to be applied
+ @param[out] pDst points to output matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
*/
arm_status arm_mat_scale_f32(
const arm_matrix_instance_f32 * pSrc,
- float32_t scale,
- arm_matrix_instance_f32 * pDst)
+ float32_t scale,
+ arm_matrix_instance_f32 * pDst)
{
- float32_t *pIn = pSrc->pData; /* input data matrix pointer */
- float32_t *pOut = pDst->pData; /* output data matrix pointer */
- uint32_t numSamples; /* total number of elements in the matrix */
- uint32_t blkCnt; /* loop counters */
- arm_status status; /* status of matrix scaling */
-
-#if defined (ARM_MATH_DSP)
-
- float32_t in1, in2, in3, in4; /* temporary variables */
- float32_t out1, out2, out3, out4; /* temporary variables */
-
-#endif // #if defined (ARM_MATH_DSP)
+ float32_t *pIn = pSrc->pData; /* Input data matrix pointer */
+ float32_t *pOut = pDst->pData; /* Output data matrix pointer */
+ uint32_t numSamples; /* Total number of elements in the matrix */
+ uint32_t blkCnt; /* Loop counters */
+ arm_status status; /* Status of matrix scaling */
#ifdef ARM_MATH_MATRIX_CHECK
+
/* Check for matrix mismatch condition */
- if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
+ if ((pSrc->numRows != pDst->numRows) ||
+ (pSrc->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
{
- /* Total number of samples in the input matrix */
+ /* Total number of samples in input matrix */
numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = numSamples >> 2U;
- /* Loop Unrolling */
- blkCnt = numSamples >> 2;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) * scale */
- /* Scaling and results are stored in the destination buffer. */
- in1 = pIn[0];
- in2 = pIn[1];
- in3 = pIn[2];
- in4 = pIn[3];
- out1 = in1 * scale;
- out2 = in2 * scale;
- out3 = in3 * scale;
- out4 = in4 * scale;
+ /* Scale and store result in destination buffer. */
+ *pOut++ = (*pIn++) * scale;
+ *pOut++ = (*pIn++) * scale;
+ *pOut++ = (*pIn++) * scale;
+ *pOut++ = (*pIn++) * scale;
-
- pOut[0] = out1;
- pOut[1] = out2;
- pOut[2] = out3;
- pOut[3] = out4;
-
- /* update pointers to process next sampels */
- pIn += 4U;
- pOut += 4U;
-
- /* Decrement the numSamples loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) * scale */
- /* The results are stored in the destination buffer. */
+
+ /* Scale and store result in destination buffer. */
*pOut++ = (*pIn++) * scale;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -165,5 +142,5 @@
}
/**
- * @} end of MatrixScale group
+ @} end of MatrixScale group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c
index af664ca..1a5404a 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c
@@ -3,13 +3,13 @@
* Title: arm_mat_scale_q15.c
* Description: Multiplies a Q15 matrix by a scalar
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,135 +29,134 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup MatrixScale
- * @{
+ @addtogroup MatrixScale
+ @{
*/
/**
- * @brief Q15 matrix scaling.
- * @param[in] *pSrc points to input matrix
- * @param[in] scaleFract fractional portion of the scale factor
- * @param[in] shift number of bits to shift the result by
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
- * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
+ @brief Q15 matrix scaling.
+ @param[in] pSrc points to input matrix
+ @param[in] scaleFract fractional portion of the scale factor
+ @param[in] shift number of bits to shift the result by
+ @param[out] pDst points to output matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+ @par Scaling and Overflow Behavior
+ The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
+ These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
*/
arm_status arm_mat_scale_q15(
const arm_matrix_instance_q15 * pSrc,
- q15_t scaleFract,
- int32_t shift,
- arm_matrix_instance_q15 * pDst)
+ q15_t scaleFract,
+ int32_t shift,
+ arm_matrix_instance_q15 * pDst)
{
- q15_t *pIn = pSrc->pData; /* input data matrix pointer */
- q15_t *pOut = pDst->pData; /* output data matrix pointer */
- uint32_t numSamples; /* total number of elements in the matrix */
- int32_t totShift = 15 - shift; /* total shift to apply after scaling */
- uint32_t blkCnt; /* loop counters */
- arm_status status; /* status of matrix scaling */
+ q15_t *pIn = pSrc->pData; /* Input data matrix pointer */
+ q15_t *pOut = pDst->pData; /* Output data matrix pointer */
+ uint32_t numSamples; /* Total number of elements in the matrix */
+ uint32_t blkCnt; /* Loop counter */
+ arm_status status; /* Status of matrix scaling */
+ int32_t kShift = 15 - shift; /* Total shift to apply after scaling */
-#if defined (ARM_MATH_DSP)
-
- q15_t in1, in2, in3, in4;
- q31_t out1, out2, out3, out4;
- q31_t inA1, inA2;
-
-#endif // #if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+ q31_t inA1, inA2;
+ q31_t out1, out2, out3, out4; /* Temporary output variables */
+ q15_t in1, in2, in3, in4; /* Temporary input variables */
+#endif
#ifdef ARM_MATH_MATRIX_CHECK
- /* Check for matrix mismatch */
- if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
+
+ /* Check for matrix mismatch condition */
+ if ((pSrc->numRows != pDst->numRows) ||
+ (pSrc->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif // #ifdef ARM_MATH_MATRIX_CHECK
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
{
- /* Total number of samples in the input matrix */
+ /* Total number of samples in input matrix */
numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- /* Loop Unrolling */
- blkCnt = numSamples >> 2;
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) * k */
- /* Scale, saturate and then store the results in the destination buffer. */
- /* Reading 2 inputs from memory */
- inA1 = _SIMD32_OFFSET(pIn);
- inA2 = _SIMD32_OFFSET(pIn + 2);
- /* C = A * scale */
- /* Scale the inputs and then store the 2 results in the destination buffer
+#if defined (ARM_MATH_DSP)
+ /* read 2 times 2 samples at a time from source */
+ inA1 = read_q15x2_ia ((q15_t **) &pIn);
+ inA2 = read_q15x2_ia ((q15_t **) &pIn);
+
+ /* Scale inputs and store result in temporary variables
* in single cycle by packing the outputs */
out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
- out2 = (q31_t) ((q15_t) inA1 * scaleFract);
+ out2 = (q31_t) ((q15_t) (inA1 ) * scaleFract);
out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
- out4 = (q31_t) ((q15_t) inA2 * scaleFract);
+ out4 = (q31_t) ((q15_t) (inA2 ) * scaleFract);
- out1 = out1 >> totShift;
- inA1 = _SIMD32_OFFSET(pIn + 4);
- out2 = out2 >> totShift;
- inA2 = _SIMD32_OFFSET(pIn + 6);
- out3 = out3 >> totShift;
- out4 = out4 >> totShift;
+ /* apply shifting */
+ out1 = out1 >> kShift;
+ out2 = out2 >> kShift;
+ out3 = out3 >> kShift;
+ out4 = out4 >> kShift;
+ /* saturate the output */
in1 = (q15_t) (__SSAT(out1, 16));
in2 = (q15_t) (__SSAT(out2, 16));
in3 = (q15_t) (__SSAT(out3, 16));
in4 = (q15_t) (__SSAT(out4, 16));
- _SIMD32_OFFSET(pOut) = __PKHBT(in2, in1, 16);
- _SIMD32_OFFSET(pOut + 2) = __PKHBT(in4, in3, 16);
+ /* store result to destination */
+ write_q15x2_ia (&pOut, __PKHBT(in2, in1, 16));
+ write_q15x2_ia (&pOut, __PKHBT(in4, in3, 16));
- /* update pointers to process next sampels */
- pIn += 4U;
- pOut += 4U;
+#else
+ *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+ *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+ *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+ *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+#endif
-
- /* Decrement the numSamples loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) * k */
- /* Scale, saturate and then store the results in the destination buffer. */
- *pOut++ =
- (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
- /* Decrement the numSamples loop counter */
+ /* Scale, saturate and store result in destination buffer. */
+ *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+
+ /* Decrement loop counter */
blkCnt--;
}
+
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
@@ -167,5 +166,5 @@
}
/**
- * @} end of MatrixScale group
+ @} end of MatrixScale group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c
index ce03bc0..203acae 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c
@@ -3,13 +3,13 @@
* Title: arm_mat_scale_q31.c
* Description: Multiplies a Q31 matrix by a scalar
*
- * $Date: 10. December 2018
- * $Revision: V.1.5.2
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2018 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,152 +29,125 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup MatrixScale
- * @{
+ @addtogroup MatrixScale
+ @{
*/
/**
- * @brief Q31 matrix scaling.
- * @param[in] *pSrc points to input matrix
- * @param[in] scaleFract fractional portion of the scale factor
- * @param[in] shift number of bits to shift the result by
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
- * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
+ @brief Q31 matrix scaling.
+ @param[in] pSrc points to input matrix
+ @param[in] scaleFract fractional portion of the scale factor
+ @param[in] shift number of bits to shift the result by
+ @param[out] pDst points to output matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+ @par Scaling and Overflow Behavior
+ The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
+ These are multiplied to yield a 2.62 intermediate result which is shifted with saturation to 1.31 format.
*/
arm_status arm_mat_scale_q31(
const arm_matrix_instance_q31 * pSrc,
- q31_t scaleFract,
- int32_t shift,
- arm_matrix_instance_q31 * pDst)
+ q31_t scaleFract,
+ int32_t shift,
+ arm_matrix_instance_q31 * pDst)
{
- q31_t *pIn = pSrc->pData; /* input data matrix pointer */
- q31_t *pOut = pDst->pData; /* output data matrix pointer */
- uint32_t numSamples; /* total number of elements in the matrix */
- int32_t totShift = shift + 1; /* shift to apply after scaling */
- uint32_t blkCnt; /* loop counters */
- arm_status status; /* status of matrix scaling */
- q31_t in1, in2, out1; /* temporary variabels */
-
-#if defined (ARM_MATH_DSP)
-
- q31_t in3, in4, out2, out3, out4; /* temporary variables */
-
-#endif /* #ifndef ARM_MATH_DSP */
+ q31_t *pIn = pSrc->pData; /* Input data matrix pointer */
+ q31_t *pOut = pDst->pData; /* Output data matrix pointer */
+ uint32_t numSamples; /* Total number of elements in the matrix */
+ uint32_t blkCnt; /* Loop counter */
+ arm_status status; /* Status of matrix scaling */
+ int32_t kShift = shift + 1; /* Shift to apply after scaling */
+ q31_t in, out; /* Temporary variabels */
#ifdef ARM_MATH_MATRIX_CHECK
- /* Check for matrix mismatch */
- if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
+
+ /* Check for matrix mismatch condition */
+ if ((pSrc->numRows != pDst->numRows) ||
+ (pSrc->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
+
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
{
- /* Total number of samples in the input matrix */
+ /* Total number of samples in input matrix */
numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /* Loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) * k */
- /* Read values from input */
- in1 = *pIn;
- in2 = *(pIn + 1);
- in3 = *(pIn + 2);
- in4 = *(pIn + 3);
- /* multiply input with scaler value */
- in1 = ((q63_t) in1 * scaleFract) >> 32;
- in2 = ((q63_t) in2 * scaleFract) >> 32;
- in3 = ((q63_t) in3 * scaleFract) >> 32;
- in4 = ((q63_t) in4 * scaleFract) >> 32;
+ /* Scale, saturate and store result in destination buffer. */
+ in = *pIn++; /* read four inputs from source */
+ in = ((q63_t) in * scaleFract) >> 32; /* multiply input with scaler value */
+ out = in << kShift; /* apply shifting */
+ if (in != (out >> kShift)) /* saturate the results. */
+ out = 0x7FFFFFFF ^ (in >> 31);
+ *pOut++ = out; /* Store result destination */
- /* apply shifting */
- out1 = in1 << totShift;
- out2 = in2 << totShift;
+ in = *pIn++;
+ in = ((q63_t) in * scaleFract) >> 32;
+ out = in << kShift;
+ if (in != (out >> kShift))
+ out = 0x7FFFFFFF ^ (in >> 31);
+ *pOut++ = out;
- /* saturate the results. */
- if (in1 != (out1 >> totShift))
- out1 = 0x7FFFFFFF ^ (in1 >> 31);
+ in = *pIn++;
+ in = ((q63_t) in * scaleFract) >> 32;
+ out = in << kShift;
+ if (in != (out >> kShift))
+ out = 0x7FFFFFFF ^ (in >> 31);
+ *pOut++ = out;
- if (in2 != (out2 >> totShift))
- out2 = 0x7FFFFFFF ^ (in2 >> 31);
+ in = *pIn++;
+ in = ((q63_t) in * scaleFract) >> 32;
+ out = in << kShift;
+ if (in != (out >> kShift))
+ out = 0x7FFFFFFF ^ (in >> 31);
+ *pOut++ = out;
- out3 = in3 << totShift;
- out4 = in4 << totShift;
-
- *pOut = out1;
- *(pOut + 1) = out2;
-
- if (in3 != (out3 >> totShift))
- out3 = 0x7FFFFFFF ^ (in3 >> 31);
-
- if (in4 != (out4 >> totShift))
- out4 = 0x7FFFFFFF ^ (in4 >> 31);
-
-
- *(pOut + 2) = out3;
- *(pOut + 3) = out4;
-
- /* update pointers to process next sampels */
- pIn += 4U;
- pOut += 4U;
-
-
- /* Decrement the numSamples loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) * k */
- /* Scale, saturate and then store the results in the destination buffer. */
- in1 = *pIn++;
- in2 = ((q63_t) in1 * scaleFract) >> 32;
+ /* Scale, saturate and store result in destination buffer. */
+ in = *pIn++;
+ in = ((q63_t) in * scaleFract) >> 32;
+ out = in << kShift;
+ if (in != (out >> kShift))
+ out = 0x7FFFFFFF ^ (in >> 31);
+ *pOut++ = out;
- out1 = in2 << totShift;
-
- if (in2 != (out1 >> totShift))
- out1 = 0x7FFFFFFF ^ (in2 >> 31);
-
- *pOut++ = out1;
-
- /* Decrement the numSamples loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -187,5 +160,5 @@
}
/**
- * @} end of MatrixScale group
+ @} end of MatrixScale group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c
index 7c0b54e..09d7776 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c
@@ -3,13 +3,13 @@
* Title: arm_mat_sub_f32.c
* Description: Floating-point matrix subtraction
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,158 +29,104 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @defgroup MatrixSub Matrix Subtraction
- *
- * Subtract two matrices.
- * \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices"
- *
- * The functions check to make sure that
- * <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
- * number of rows and columns.
+ @defgroup MatrixSub Matrix Subtraction
+
+ Subtract two matrices.
+ \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices"
+
+ The functions check to make sure that
+ <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
+ number of rows and columns.
*/
/**
- * @addtogroup MatrixSub
- * @{
+ @addtogroup MatrixSub
+ @{
*/
/**
- * @brief Floating-point matrix subtraction
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ @brief Floating-point matrix subtraction.
+ @param[in] pSrcA points to the first input matrix structure
+ @param[in] pSrcB points to the second input matrix structure
+ @param[out] pDst points to output matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
*/
arm_status arm_mat_sub_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst)
+ arm_matrix_instance_f32 * pDst)
{
- float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
- float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
- float32_t *pOut = pDst->pData; /* output data matrix pointer */
+ float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */
+ float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */
+ float32_t *pOut = pDst->pData; /* output data matrix pointer */
-#if defined (ARM_MATH_DSP)
-
- float32_t inA1, inA2, inB1, inB2, out1, out2; /* temporary variables */
-
-#endif // #if defined (ARM_MATH_DSP)
-
- uint32_t numSamples; /* total number of elements in the matrix */
+ uint32_t numSamples; /* total number of elements in the matrix */
uint32_t blkCnt; /* loop counters */
arm_status status; /* status of matrix subtraction */
#ifdef ARM_MATH_MATRIX_CHECK
+
/* Check for matrix mismatch condition */
if ((pSrcA->numRows != pSrcB->numRows) ||
- (pSrcA->numCols != pSrcB->numCols) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+ (pSrcA->numCols != pSrcB->numCols) ||
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcA->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
{
- /* Total number of samples in the input matrix */
+ /* Total number of samples in input matrix */
numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /* Loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) - B(m,n) */
- /* Subtract and then store the results in the destination buffer. */
- /* Read values from source A */
- inA1 = pIn1[0];
- /* Read values from source B */
- inB1 = pIn2[0];
+ /* Subtract and store result in destination buffer. */
+ *pOut++ = (*pInA++) - (*pInB++);
+ *pOut++ = (*pInA++) - (*pInB++);
+ *pOut++ = (*pInA++) - (*pInB++);
+ *pOut++ = (*pInA++) - (*pInB++);
- /* Read values from source A */
- inA2 = pIn1[1];
-
- /* out = sourceA - sourceB */
- out1 = inA1 - inB1;
-
- /* Read values from source B */
- inB2 = pIn2[1];
-
- /* Read values from source A */
- inA1 = pIn1[2];
-
- /* out = sourceA - sourceB */
- out2 = inA2 - inB2;
-
- /* Read values from source B */
- inB1 = pIn2[2];
-
- /* Store result in destination */
- pOut[0] = out1;
- pOut[1] = out2;
-
- /* Read values from source A */
- inA2 = pIn1[3];
-
- /* Read values from source B */
- inB2 = pIn2[3];
-
- /* out = sourceA - sourceB */
- out1 = inA1 - inB1;
-
-
- /* out = sourceA - sourceB */
- out2 = inA2 - inB2;
-
- /* Store result in destination */
- pOut[2] = out1;
-
- /* Store result in destination */
- pOut[3] = out2;
-
-
- /* update pointers to process next sampels */
- pIn1 += 4U;
- pIn2 += 4U;
- pOut += 4U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) - B(m,n) */
- /* Subtract and then store the results in the destination buffer. */
- *pOut++ = (*pIn1++) - (*pIn2++);
- /* Decrement the loop counter */
+ /* Subtract and store result in destination buffer. */
+ *pOut++ = (*pInA++) - (*pInB++);
+
+ /* Decrement loop counter */
blkCnt--;
}
@@ -193,5 +139,5 @@
}
/**
- * @} end of MatrixSub group
+ @} end of MatrixSub group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c
index 28e659f..e6e01df 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c
@@ -3,13 +3,13 @@
* Title: arm_mat_sub_q15.c
* Description: Q15 Matrix subtraction
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,112 +29,108 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup MatrixSub
- * @{
+ @addtogroup MatrixSub
+ @{
*/
/**
- * @brief Q15 matrix subtraction.
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+ @brief Q15 matrix subtraction.
+ @param[in] pSrcA points to the first input matrix structure
+ @param[in] pSrcB points to the second input matrix structure
+ @param[out] pDst points to output matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
*/
arm_status arm_mat_sub_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst)
+ arm_matrix_instance_q15 * pDst)
{
- q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */
- q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */
- q15_t *pOut = pDst->pData; /* output data matrix pointer */
- uint32_t numSamples; /* total number of elements in the matrix */
- uint32_t blkCnt; /* loop counters */
- arm_status status; /* status of matrix subtraction */
+ q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */
+ q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */
+ q15_t *pOut = pDst->pData; /* output data matrix pointer */
+ uint32_t numSamples; /* total number of elements in the matrix */
+ uint32_t blkCnt; /* loop counters */
+ arm_status status; /* status of matrix subtraction */
#ifdef ARM_MATH_MATRIX_CHECK
-
/* Check for matrix mismatch condition */
if ((pSrcA->numRows != pSrcB->numRows) ||
- (pSrcA->numCols != pSrcB->numCols) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+ (pSrcA->numCols != pSrcB->numCols) ||
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcA->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
- /* Total number of samples in the input matrix */
+ /* Total number of samples in input matrix */
numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /* Apply loop unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) - B(m,n) */
- /* Subtract, Saturate and then store the results in the destination buffer. */
- *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
- *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
- /* Decrement the loop counter */
+ /* Subtract, Saturate and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+ write_q15x2_ia (&pOut, __QSUB16(read_q15x2_ia ((q15_t **) &pInA), read_q15x2_ia ((q15_t **) &pInB)));
+ write_q15x2_ia (&pOut, __QSUB16(read_q15x2_ia ((q15_t **) &pInA), read_q15x2_ia ((q15_t **) &pInB)));
+#else
+ *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+ *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+ *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+ *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
- while (blkCnt > 0U)
- {
- /* C(m,n) = A(m,n) - B(m,n) */
- /* Subtract and then store the results in the destination buffer. */
- *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) - B(m,n) */
- /* Subtract and then store the results in the destination buffer. */
- *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
- /* Decrement the loop counter */
+ /* Subtract and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+ *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++);
+#else
+ *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+#endif
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
@@ -144,5 +140,5 @@
}
/**
- * @} end of MatrixSub group
+ @} end of MatrixSub group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c
index 3bf5508..f6bff95 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c
@@ -3,13 +3,13 @@
* Title: arm_mat_sub_q31.c
* Description: Q31 matrix subtraction
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,157 +29,100 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup MatrixSub
- * @{
+ @addtogroup MatrixSub
+ @{
*/
/**
- * @brief Q31 matrix subtraction.
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
- */
+ @brief Q31 matrix subtraction.
+ @param[in] pSrcA points to the first input matrix structure
+ @param[in] pSrcB points to the second input matrix structure
+ @param[out] pDst points to output matrix structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
arm_status arm_mat_sub_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst)
+ arm_matrix_instance_q31 * pDst)
{
- q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
- q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
+ q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */
+ q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */
q31_t *pOut = pDst->pData; /* output data matrix pointer */
- q31_t inA1, inB1; /* temporary variables */
-#if defined (ARM_MATH_DSP)
-
- q31_t inA2, inB2; /* temporary variables */
- q31_t out1, out2; /* temporary variables */
-
-#endif // #if defined (ARM_MATH_DSP)
-
- uint32_t numSamples; /* total number of elements in the matrix */
+ uint32_t numSamples; /* total number of elements in the matrix */
uint32_t blkCnt; /* loop counters */
arm_status status; /* status of matrix subtraction */
-
#ifdef ARM_MATH_MATRIX_CHECK
- /* Check for matrix mismatch condition */
+
+ /* Check for matrix mismatch condition */
if ((pSrcA->numRows != pSrcB->numRows) ||
- (pSrcA->numCols != pSrcB->numCols) ||
- (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+ (pSrcA->numCols != pSrcB->numCols) ||
+ (pSrcA->numRows != pDst->numRows) ||
+ (pSrcA->numCols != pDst->numCols) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
{
- /* Total number of samples in the input matrix */
+ /* Total number of samples in input matrix */
numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /* Loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = numSamples >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) - B(m,n) */
+
/* Subtract, saturate and then store the results in the destination buffer. */
- /* Read values from source A */
- inA1 = pIn1[0];
+ *pOut++ = __QSUB(*pInA++, *pInB++);
- /* Read values from source B */
- inB1 = pIn2[0];
+ *pOut++ = __QSUB(*pInA++, *pInB++);
- /* Read values from source A */
- inA2 = pIn1[1];
+ *pOut++ = __QSUB(*pInA++, *pInB++);
- /* Subtract and saturate */
- out1 = __QSUB(inA1, inB1);
+ *pOut++ = __QSUB(*pInA++, *pInB++);
- /* Read values from source B */
- inB2 = pIn2[1];
-
- /* Read values from source A */
- inA1 = pIn1[2];
-
- /* Subtract and saturate */
- out2 = __QSUB(inA2, inB2);
-
- /* Read values from source B */
- inB1 = pIn2[2];
-
- /* Store result in destination */
- pOut[0] = out1;
- pOut[1] = out2;
-
- /* Read values from source A */
- inA2 = pIn1[3];
-
- /* Read values from source B */
- inB2 = pIn2[3];
-
- /* Subtract and saturate */
- out1 = __QSUB(inA1, inB1);
-
- /* Subtract and saturate */
- out2 = __QSUB(inA2, inB2);
-
- /* Store result in destination */
- pOut[2] = out1;
- pOut[3] = out2;
-
- /* update pointers to process next samples */
- pIn1 += 4U;
- pIn2 += 4U;
- pOut += 4U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = numSamples % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C(m,n) = A(m,n) - B(m,n) */
- /* Subtract, saturate and then store the results in the destination buffer. */
- inA1 = *pIn1++;
- inB1 = *pIn2++;
- inA1 = __QSUB(inA1, inB1);
+ /* Subtract, saturate and store result in destination buffer. */
+ *pOut++ = __QSUB(*pInA++, *pInB++);
- *pOut++ = inA1;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -192,5 +135,5 @@
}
/**
- * @} end of MatrixSub group
+ @} end of MatrixSub group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c
index 84165ce..bd42035 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c
@@ -3,13 +3,13 @@
* Title: arm_mat_trans_f32.c
* Description: Floating-point matrix transpose
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -26,172 +26,121 @@
* limitations under the License.
*/
-/**
- * @defgroup MatrixTrans Matrix Transpose
- *
- * Tranposes a matrix.
- * Transposing an <code>M x N</code> matrix flips it around the center diagonal and results in an <code>N x M</code> matrix.
- * \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix"
- */
-
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup MatrixTrans
- * @{
+ @defgroup MatrixTrans Matrix Transpose
+
+ Tranposes a matrix.
+
+ Transposing an <code>M x N</code> matrix flips it around the center diagonal and results in an <code>N x M</code> matrix.
+ \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix"
*/
/**
- * @brief Floating-point matrix transpose.
- * @param[in] *pSrc points to the input matrix
- * @param[out] *pDst points to the output matrix
- * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
- * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
+ @addtogroup MatrixTrans
+ @{
+ */
+/**
+ @brief Floating-point matrix transpose.
+ @param[in] pSrc points to input matrix
+ @param[out] pDst points to output matrix
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
arm_status arm_mat_trans_f32(
const arm_matrix_instance_f32 * pSrc,
- arm_matrix_instance_f32 * pDst)
+ arm_matrix_instance_f32 * pDst)
{
float32_t *pIn = pSrc->pData; /* input data matrix pointer */
float32_t *pOut = pDst->pData; /* output data matrix pointer */
float32_t *px; /* Temporary output data matrix pointer */
uint16_t nRows = pSrc->numRows; /* number of rows */
- uint16_t nColumns = pSrc->numCols; /* number of columns */
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- uint16_t blkCnt, i = 0U, row = nRows; /* loop counters */
- arm_status status; /* status of matrix transpose */
-
+ uint16_t nCols = pSrc->numCols; /* number of columns */
+ uint32_t col, row = nRows, i = 0U; /* Loop counters */
+ arm_status status; /* status of matrix transpose */
#ifdef ARM_MATH_MATRIX_CHECK
-
/* Check for matrix mismatch condition */
- if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
+ if ((pSrc->numRows != pDst->numCols) ||
+ (pSrc->numCols != pDst->numRows) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* Matrix transpose by exchanging the rows with columns */
- /* row loop */
+ /* row loop */
do
{
- /* Loop Unrolling */
- blkCnt = nColumns >> 2;
-
- /* The pointer px is set to starting address of the column being processed */
+ /* Pointer px is set to starting address of column being processed */
px = pOut + i;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0U) /* column loop */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
+ col = nCols >> 2U;
+
+ while (col > 0U) /* column loop */
{
- /* Read and store the input element in the destination */
+ /* Read and store input element in destination */
*px = *pIn++;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
+ /* Update pointer px to point to next row of transposed matrix */
px += nRows;
- /* Read and store the input element in the destination */
*px = *pIn++;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
- /* Read and store the input element in the destination */
*px = *pIn++;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
- /* Read and store the input element in the destination */
*px = *pIn++;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
- /* Decrement the column loop counter */
- blkCnt--;
- }
-
- /* Perform matrix transpose for last 3 samples here. */
- blkCnt = nColumns % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* Read and store the input element in the destination */
- *px = *pIn++;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- px += nRows;
-
- /* Decrement the column loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- uint16_t col, i = 0U, row = nRows; /* loop counters */
- arm_status status; /* status of matrix transpose */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
- /* Check for matrix mismatch condition */
- if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
- {
- /* Set status as ARM_MATH_SIZE_MISMATCH */
- status = ARM_MATH_SIZE_MISMATCH;
- }
- else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
- {
- /* Matrix transpose by exchanging the rows with columns */
- /* row loop */
- do
- {
- /* The pointer px is set to starting address of the column being processed */
- px = pOut + i;
-
- /* Initialize column loop counter */
- col = nColumns;
-
- while (col > 0U)
- {
- /* Read and store the input element in the destination */
- *px = *pIn++;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- px += nRows;
-
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
+ /* Loop unrolling: Compute remaining outputs */
+ col = nCols % 0x4U;
+
+#else
+
+ /* Initialize col with number of samples */
+ col = nCols;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (col > 0U)
+ {
+ /* Read and store input element in destination */
+ *px = *pIn++;
+
+ /* Update pointer px to point to next row of transposed matrix */
+ px += nRows;
+
+ /* Decrement column loop counter */
+ col--;
+ }
i++;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
- } while (row > 0U); /* row loop end */
+ } while (row > 0U); /* row loop end */
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
@@ -202,5 +151,5 @@
}
/**
- * @} end of MatrixTrans group
+ @} end of MatrixTrans group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c
index 6ba0904..58789f4 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c
@@ -3,13 +3,13 @@
* Title: arm_mat_trans_q15.c
* Description: Q15 matrix transpose
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,244 +29,154 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup MatrixTrans
- * @{
+ @addtogroup MatrixTrans
+ @{
*/
-/*
- * @brief Q15 matrix transpose.
- * @param[in] *pSrc points to the input matrix
- * @param[out] *pDst points to the output matrix
- * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
- * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+/**
+ @brief Q15 matrix transpose.
+ @param[in] pSrc points to input matrix
+ @param[out] pDst points to output matrix
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
*/
arm_status arm_mat_trans_q15(
const arm_matrix_instance_q15 * pSrc,
- arm_matrix_instance_q15 * pDst)
+ arm_matrix_instance_q15 * pDst)
{
- q15_t *pSrcA = pSrc->pData; /* input data matrix pointer */
- q15_t *pOut = pDst->pData; /* output data matrix pointer */
- uint16_t nRows = pSrc->numRows; /* number of nRows */
- uint16_t nColumns = pSrc->numCols; /* number of nColumns */
- uint16_t col, row = nRows, i = 0U; /* row and column loop counters */
- arm_status status; /* status of matrix transpose */
+ q15_t *pIn = pSrc->pData; /* input data matrix pointer */
+ q15_t *pOut = pDst->pData; /* output data matrix pointer */
+ uint16_t nRows = pSrc->numRows; /* number of rows */
+ uint16_t nCols = pSrc->numCols; /* number of columns */
+ uint32_t col, row = nRows, i = 0U; /* Loop counters */
+ arm_status status; /* status of matrix transpose */
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
- q31_t in; /* variable to hold temporary output */
-
-#else
-
- q15_t in;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t in; /* variable to hold temporary output */
+#endif
#ifdef ARM_MATH_MATRIX_CHECK
-
/* Check for matrix mismatch condition */
- if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
+ if ((pSrc->numRows != pDst->numCols) ||
+ (pSrc->numCols != pDst->numRows) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* Matrix transpose by exchanging the rows with columns */
- /* row loop */
+ /* row loop */
do
{
-
- /* Apply loop unrolling and exchange the columns with row elements */
- col = nColumns >> 2U;
-
- /* The pointer pOut is set to starting address of the column being processed */
+ /* Pointer pOut is set to starting address of column being processed */
pOut = pDst->pData + i;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (col > 0U)
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
+ col = nCols >> 2U;
+
+ while (col > 0U) /* column loop */
{
-#ifndef UNALIGNED_SUPPORT_DISABLE
+ /* Read two elements from row */
+ in = read_q15x2_ia ((q15_t **) &pIn);
- /* Read two elements from the row */
- in = *__SIMD32(pSrcA)++;
-
- /* Unpack and store one element in the destination */
+ /* Unpack and store one element in destination */
#ifndef ARM_MATH_BIG_ENDIAN
-
*pOut = (q15_t) in;
-
#else
+ *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ /* Update pointer pOut to point to next row of transposed matrix */
+ pOut += nRows;
+
+ /* Unpack and store second element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+ *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#else
+ *pOut = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+ /* Update pointer pOut to point to next row of transposed matrix */
+ pOut += nRows;
+
+ /* Read two elements from row */
+ in = read_q15x2_ia ((q15_t **) &pIn);
+
+ /* Unpack and store one element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+ *pOut = (q15_t) in;
+#else
*pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- /* Update the pointer pOut to point to the next row of the transposed matrix */
+ /* Update pointer pOut to point to next row of transposed matrix */
pOut += nRows;
- /* Unpack and store the second element in the destination */
-
+ /* Unpack and store second element in destination */
#ifndef ARM_MATH_BIG_ENDIAN
-
*pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
#else
-
*pOut = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Update the pointer pOut to point to the next row of the transposed matrix */
+ /* Update pointer pOut to point to next row of transposed matrix */
pOut += nRows;
- /* Read two elements from the row */
-#ifndef ARM_MATH_BIG_ENDIAN
-
- in = *__SIMD32(pSrcA)++;
-
-#else
-
- in = *__SIMD32(pSrcA)++;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *pOut = (q15_t) in;
-
-#else
-
- *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Update the pointer pOut to point to the next row of the transposed matrix */
- pOut += nRows;
-
- /* Unpack and store the second element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
- *pOut = (q15_t) in;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-#else
- /* Read one element from the row */
- in = *pSrcA++;
-
- /* Store one element in the destination */
- *pOut = in;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- pOut += nRows;
-
- /* Read one element from the row */
- in = *pSrcA++;
-
- /* Store one element in the destination */
- *pOut = in;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- pOut += nRows;
-
- /* Read one element from the row */
- in = *pSrcA++;
-
- /* Store one element in the destination */
- *pOut = in;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- pOut += nRows;
-
- /* Read one element from the row */
- in = *pSrcA++;
-
- /* Store one element in the destination */
- *pOut = in;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
- /* Update the pointer pOut to point to the next row of the transposed matrix */
- pOut += nRows;
-
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
}
- /* Perform matrix transpose for last 3 samples here. */
- col = nColumns % 0x4U;
+ /* Loop unrolling: Compute remaining outputs */
+ col = nCols % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize col with number of samples */
+ col = nCols;
-#ifdef ARM_MATH_MATRIX_CHECK
-
- /* Check for matrix mismatch condition */
- if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
- {
- /* Set status as ARM_MATH_SIZE_MISMATCH */
- status = ARM_MATH_SIZE_MISMATCH;
- }
- else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
- {
- /* Matrix transpose by exchanging the rows with columns */
- /* row loop */
- do
- {
- /* The pointer pOut is set to starting address of the column being processed */
- pOut = pDst->pData + i;
-
- /* Initialize column loop counter */
- col = nColumns;
-
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (col > 0U)
{
- /* Read and store the input element in the destination */
- *pOut = *pSrcA++;
+ /* Read and store input element in destination */
+ *pOut = *pIn++;
- /* Update the pointer pOut to point to the next row of the transposed matrix */
+ /* Update pointer pOut to point to next row of transposed matrix */
pOut += nRows;
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
}
i++;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
- } while (row > 0U);
+ } while (row > 0U); /* row loop end */
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
+
/* Return to application */
return (status);
}
/**
- * @} end of MatrixTrans group
+ @} end of MatrixTrans group
*/
diff --git a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c
index 6f698e0..dd9d586 100644
--- a/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c
+++ b/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c
@@ -3,13 +3,13 @@
* Title: arm_mat_trans_q31.c
* Description: Q31 matrix transpose
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,163 +29,111 @@
#include "arm_math.h"
/**
- * @ingroup groupMatrix
+ @ingroup groupMatrix
*/
/**
- * @addtogroup MatrixTrans
- * @{
+ @addtogroup MatrixTrans
+ @{
*/
-/*
- * @brief Q31 matrix transpose.
- * @param[in] *pSrc points to the input matrix
- * @param[out] *pDst points to the output matrix
- * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
- * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+/**
+ @brief Q31 matrix transpose.
+ @param[in] pSrc points to input matrix
+ @param[out] pDst points to output matrix
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
*/
arm_status arm_mat_trans_q31(
const arm_matrix_instance_q31 * pSrc,
- arm_matrix_instance_q31 * pDst)
+ arm_matrix_instance_q31 * pDst)
{
- q31_t *pIn = pSrc->pData; /* input data matrix pointer */
- q31_t *pOut = pDst->pData; /* output data matrix pointer */
+ q31_t *pIn = pSrc->pData; /* input data matrix pointer */
+ q31_t *pOut = pDst->pData; /* output data matrix pointer */
q31_t *px; /* Temporary output data matrix pointer */
- uint16_t nRows = pSrc->numRows; /* number of nRows */
- uint16_t nColumns = pSrc->numCols; /* number of nColumns */
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- uint16_t blkCnt, i = 0U, row = nRows; /* loop counters */
+ uint16_t nRows = pSrc->numRows; /* number of rows */
+ uint16_t nCols = pSrc->numCols; /* number of columns */
+ uint32_t col, row = nRows, i = 0U; /* Loop counters */
arm_status status; /* status of matrix transpose */
-
#ifdef ARM_MATH_MATRIX_CHECK
-
/* Check for matrix mismatch condition */
- if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
+ if ((pSrc->numRows != pDst->numCols) ||
+ (pSrc->numCols != pDst->numRows) )
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* Matrix transpose by exchanging the rows with columns */
- /* row loop */
+ /* row loop */
do
{
- /* Apply loop unrolling and exchange the columns with row elements */
- blkCnt = nColumns >> 2U;
-
- /* The pointer px is set to starting address of the column being processed */
+ /* Pointer px is set to starting address of column being processed */
px = pOut + i;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0U)
+#if defined (ARM_MATH_LOOPUNROLL)
+
+ /* Loop unrolling: Compute 4 outputs at a time */
+ col = nCols >> 2U;
+
+ while (col > 0U) /* column loop */
{
- /* Read and store the input element in the destination */
+ /* Read and store input element in destination */
*px = *pIn++;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
+ /* Update pointer px to point to next row of transposed matrix */
px += nRows;
- /* Read and store the input element in the destination */
*px = *pIn++;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
- /* Read and store the input element in the destination */
*px = *pIn++;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
- /* Read and store the input element in the destination */
*px = *pIn++;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
- /* Decrement the column loop counter */
- blkCnt--;
- }
-
- /* Perform matrix transpose for last 3 samples here. */
- blkCnt = nColumns % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* Read and store the input element in the destination */
- *px = *pIn++;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- px += nRows;
-
- /* Decrement the column loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- uint16_t col, i = 0U, row = nRows; /* loop counters */
- arm_status status; /* status of matrix transpose */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
- /* Check for matrix mismatch condition */
- if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
- {
- /* Set status as ARM_MATH_SIZE_MISMATCH */
- status = ARM_MATH_SIZE_MISMATCH;
- }
- else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
- {
- /* Matrix transpose by exchanging the rows with columns */
- /* row loop */
- do
- {
- /* The pointer px is set to starting address of the column being processed */
- px = pOut + i;
-
- /* Initialize column loop counter */
- col = nColumns;
-
- while (col > 0U)
- {
- /* Read and store the input element in the destination */
- *px = *pIn++;
-
- /* Update the pointer px to point to the next row of the transposed matrix */
- px += nRows;
-
- /* Decrement the column loop counter */
+ /* Decrement column loop counter */
col--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
+ /* Loop unrolling: Compute remaining outputs */
+ col = nCols % 0x4U;
+
+#else
+
+ /* Initialize col with number of samples */
+ col = nCols;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (col > 0U)
+ {
+ /* Read and store input element in destination */
+ *px = *pIn++;
+
+ /* Update pointer px to point to next row of transposed matrix */
+ px += nRows;
+
+ /* Decrement column loop counter */
+ col--;
+ }
i++;
- /* Decrement the row loop counter */
+ /* Decrement row loop counter */
row--;
- }
- while (row > 0U); /* row loop end */
+ } while (row > 0U); /* row loop end */
- /* set status as ARM_MATH_SUCCESS */
+ /* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
@@ -194,5 +142,5 @@
}
/**
- * @} end of MatrixTrans group
+ @} end of MatrixTrans group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c b/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c
new file mode 100644
index 0000000..545162a
--- /dev/null
+++ b/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c
@@ -0,0 +1,26 @@
+
+#include "arm_max_f32.c"
+#include "arm_max_q15.c"
+#include "arm_max_q31.c"
+#include "arm_max_q7.c"
+#include "arm_mean_f32.c"
+#include "arm_mean_q15.c"
+#include "arm_mean_q31.c"
+#include "arm_mean_q7.c"
+#include "arm_min_f32.c"
+#include "arm_min_q15.c"
+#include "arm_min_q31.c"
+#include "arm_min_q7.c"
+#include "arm_power_f32.c"
+#include "arm_power_q15.c"
+#include "arm_power_q31.c"
+#include "arm_power_q7.c"
+#include "arm_rms_f32.c"
+#include "arm_rms_q15.c"
+#include "arm_rms_q31.c"
+#include "arm_std_f32.c"
+#include "arm_std_q15.c"
+#include "arm_std_q31.c"
+#include "arm_var_f32.c"
+#include "arm_var_q15.c"
+#include "arm_var_q31.c"
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c
index a0a68ac..387c163 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c
@@ -3,13 +3,13 @@
* Title: arm_max_f32.c
* Description: Maximum value of a floating-point vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,134 +29,120 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @defgroup Max Maximum
- *
- * Computes the maximum value of an array of data.
- * The function returns both the maximum value and its position within the array.
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+ @defgroup Max Maximum
+
+ Computes the maximum value of an array of data.
+ The function returns both the maximum value and its position within the array.
+ There are separate functions for floating-point, Q31, Q15, and Q7 data types.
*/
/**
- * @addtogroup Max
- * @{
+ @addtogroup Max
+ @{
*/
-
/**
- * @brief Maximum value of a floating-point vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult maximum value returned here
- * @param[out] *pIndex index of maximum value returned here
- * @return none.
+ @brief Maximum value of a floating-point vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult maximum value returned here
+ @param[out] pIndex index of maximum value returned here
+ @return none
*/
void arm_max_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult,
- uint32_t * pIndex)
+ const float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult,
+ uint32_t * pIndex)
{
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ float32_t maxVal, out; /* Temporary variables to store the output value. */
+ uint32_t blkCnt, outIndex; /* Loop counter */
- float32_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex, count; /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+ uint32_t index; /* index of maximum value */
+#endif
- /* Initialise the count value. */
- count = 0U;
- /* Initialise the index value to zero. */
+ /* Initialise index value to zero. */
outIndex = 0U;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
- /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+ /* Initialise index of maximum value. */
+ index = 0U;
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = (blockSize - 1U) >> 2U;
while (blkCnt > 0U)
{
- /* Initialize maxVal to the next consecutive values one by one */
- maxVal1 = *pSrc++;
- maxVal2 = *pSrc++;
+ /* Initialize maxVal to next consecutive values one by one */
+ maxVal = *pSrc++;
/* compare for the maximum value */
- if (out < maxVal1)
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal1;
- outIndex = count + 1U;
+ /* Update the maximum value and it's index */
+ out = maxVal;
+ outIndex = index + 1U;
}
- /* compare for the maximum value */
- if (out < maxVal2)
+ maxVal = *pSrc++;
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal2;
- outIndex = count + 2U;
+ out = maxVal;
+ outIndex = index + 2U;
}
- /* Initialize maxVal to the next consecutive values one by one */
- maxVal1 = *pSrc++;
- maxVal2 = *pSrc++;
-
- /* compare for the maximum value */
- if (out < maxVal1)
+ maxVal = *pSrc++;
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal1;
- outIndex = count + 3U;
+ out = maxVal;
+ outIndex = index + 3U;
}
- /* compare for the maximum value */
- if (out < maxVal2)
+ maxVal = *pSrc++;
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal2;
- outIndex = count + 4U;
+ out = maxVal;
+ outIndex = index + 4U;
}
- count += 4U;
+ index += 4U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* if (blockSize - 1U) is not multiple of 4 */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (blockSize - 1U) % 4U;
#else
- /* Run the below code for Cortex-M0 */
- float32_t maxVal1, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex; /* loop counter */
-
- /* Initialise the index value to zero. */
- outIndex = 0U;
- /* Load first input value that act as reference value for comparision */
- out = *pSrc++;
-
+ /* Initialize blkCnt with number of samples */
blkCnt = (blockSize - 1U);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* Initialize maxVal to the next consecutive values one by one */
- maxVal1 = *pSrc++;
+ maxVal = *pSrc++;
/* compare for the maximum value */
- if (out < maxVal1)
+ if (out < maxVal)
{
/* Update the maximum value and it's index */
- out = maxVal1;
+ out = maxVal;
outIndex = blockSize - blkCnt;
}
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -166,5 +152,5 @@
}
/**
- * @} end of Max group
+ @} end of Max group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c
index 67d5e34..01bb9fe 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c
@@ -3,13 +3,13 @@
* Title: arm_max_q15.c
* Description: Maximum value of a Q15 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,126 +29,112 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup Max
- * @{
+ @addtogroup Max
+ @{
*/
-
/**
- * @brief Maximum value of a Q15 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult maximum value returned here
- * @param[out] *pIndex index of maximum value returned here
- * @return none.
+ @brief Maximum value of a Q15 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult maximum value returned here
+ @param[out] pIndex index of maximum value returned here
+ @return none
*/
void arm_max_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult,
- uint32_t * pIndex)
+ const q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult,
+ uint32_t * pIndex)
{
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ q15_t maxVal, out; /* Temporary variables to store the output value. */
+ uint32_t blkCnt, outIndex; /* Loop counter */
- q15_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex, count; /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+ uint32_t index; /* index of maximum value */
+#endif
- /* Initialise the count value. */
- count = 0U;
- /* Initialise the index value to zero. */
+ /* Initialise index value to zero. */
outIndex = 0U;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
- /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+ /* Initialise index of maximum value. */
+ index = 0U;
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = (blockSize - 1U) >> 2U;
while (blkCnt > 0U)
{
- /* Initialize maxVal to the next consecutive values one by one */
- maxVal1 = *pSrc++;
- maxVal2 = *pSrc++;
+ /* Initialize maxVal to next consecutive values one by one */
+ maxVal = *pSrc++;
/* compare for the maximum value */
- if (out < maxVal1)
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal1;
- outIndex = count + 1U;
+ /* Update the maximum value and it's index */
+ out = maxVal;
+ outIndex = index + 1U;
}
- /* compare for the maximum value */
- if (out < maxVal2)
+ maxVal = *pSrc++;
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal2;
- outIndex = count + 2U;
+ out = maxVal;
+ outIndex = index + 2U;
}
- /* Initialize maxVal to the next consecutive values one by one */
- maxVal1 = *pSrc++;
- maxVal2 = *pSrc++;
-
- /* compare for the maximum value */
- if (out < maxVal1)
+ maxVal = *pSrc++;
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal1;
- outIndex = count + 3U;
+ out = maxVal;
+ outIndex = index + 3U;
}
- /* compare for the maximum value */
- if (out < maxVal2)
+ maxVal = *pSrc++;
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal2;
- outIndex = count + 4U;
+ out = maxVal;
+ outIndex = index + 4U;
}
- count += 4U;
+ index += 4U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* if (blockSize - 1U) is not multiple of 4 */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (blockSize - 1U) % 4U;
#else
- /* Run the below code for Cortex-M0 */
- q15_t maxVal1, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex; /* loop counter */
-
- /* Initialise the index value to zero. */
- outIndex = 0U;
- /* Load first input value that act as reference value for comparision */
- out = *pSrc++;
-
+ /* Initialize blkCnt with number of samples */
blkCnt = (blockSize - 1U);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* Initialize maxVal to the next consecutive values one by one */
- maxVal1 = *pSrc++;
+ maxVal = *pSrc++;
/* compare for the maximum value */
- if (out < maxVal1)
+ if (out < maxVal)
{
/* Update the maximum value and it's index */
- out = maxVal1;
+ out = maxVal;
outIndex = blockSize - blkCnt;
}
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -158,5 +144,5 @@
}
/**
- * @} end of Max group
+ @} end of Max group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c
index 5d34bbd..0cec5d5 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c
@@ -3,13 +3,13 @@
* Title: arm_max_q31.c
* Description: Maximum value of a Q31 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,126 +29,112 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup Max
- * @{
+ @addtogroup Max
+ @{
*/
-
/**
- * @brief Maximum value of a Q31 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult maximum value returned here
- * @param[out] *pIndex index of maximum value returned here
- * @return none.
+ @brief Maximum value of a Q31 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult maximum value returned here
+ @param[out] pIndex index of maximum value returned here
+ @return none
*/
void arm_max_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult,
- uint32_t * pIndex)
+ const q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult,
+ uint32_t * pIndex)
{
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t maxVal, out; /* Temporary variables to store the output value. */
+ uint32_t blkCnt, outIndex; /* Loop counter */
- q31_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex, count; /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+ uint32_t index; /* index of maximum value */
+#endif
- /* Initialise the count value. */
- count = 0U;
- /* Initialise the index value to zero. */
+ /* Initialise index value to zero. */
outIndex = 0U;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
- /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+ /* Initialise index of maximum value. */
+ index = 0U;
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = (blockSize - 1U) >> 2U;
while (blkCnt > 0U)
{
- /* Initialize maxVal to the next consecutive values one by one */
- maxVal1 = *pSrc++;
- maxVal2 = *pSrc++;
+ /* Initialize maxVal to next consecutive values one by one */
+ maxVal = *pSrc++;
/* compare for the maximum value */
- if (out < maxVal1)
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal1;
- outIndex = count + 1U;
+ /* Update the maximum value and it's index */
+ out = maxVal;
+ outIndex = index + 1U;
}
- /* compare for the maximum value */
- if (out < maxVal2)
+ maxVal = *pSrc++;
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal2;
- outIndex = count + 2U;
+ out = maxVal;
+ outIndex = index + 2U;
}
- /* Initialize maxVal to the next consecutive values one by one */
- maxVal1 = *pSrc++;
- maxVal2 = *pSrc++;
-
- /* compare for the maximum value */
- if (out < maxVal1)
+ maxVal = *pSrc++;
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal1;
- outIndex = count + 3U;
+ out = maxVal;
+ outIndex = index + 3U;
}
- /* compare for the maximum value */
- if (out < maxVal2)
+ maxVal = *pSrc++;
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal2;
- outIndex = count + 4U;
+ out = maxVal;
+ outIndex = index + 4U;
}
- count += 4U;
+ index += 4U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* if (blockSize - 1U) is not multiple of 4 */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (blockSize - 1U) % 4U;
#else
- /* Run the below code for Cortex-M0 */
- q31_t maxVal1, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex; /* loop counter */
-
- /* Initialise the index value to zero. */
- outIndex = 0U;
- /* Load first input value that act as reference value for comparision */
- out = *pSrc++;
-
+ /* Initialize blkCnt with number of samples */
blkCnt = (blockSize - 1U);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* Initialize maxVal to the next consecutive values one by one */
- maxVal1 = *pSrc++;
+ maxVal = *pSrc++;
/* compare for the maximum value */
- if (out < maxVal1)
+ if (out < maxVal)
{
/* Update the maximum value and it's index */
- out = maxVal1;
+ out = maxVal;
outIndex = blockSize - blkCnt;
}
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -158,5 +144,5 @@
}
/**
- * @} end of Max group
+ @} end of Max group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c
index 72f6e5e..5c73a34 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c
@@ -3,13 +3,13 @@
* Title: arm_max_q7.c
* Description: Maximum value of a Q7 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,126 +29,112 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup Max
- * @{
+ @addtogroup Max
+ @{
*/
-
/**
- * @brief Maximum value of a Q7 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult maximum value returned here
- * @param[out] *pIndex index of maximum value returned here
- * @return none.
+ @brief Maximum value of a Q7 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult maximum value returned here
+ @param[out] pIndex index of maximum value returned here
+ @return none
*/
void arm_max_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q7_t * pResult,
- uint32_t * pIndex)
+ const q7_t * pSrc,
+ uint32_t blockSize,
+ q7_t * pResult,
+ uint32_t * pIndex)
{
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ q7_t maxVal, out; /* Temporary variables to store the output value. */
+ uint32_t blkCnt, outIndex; /* Loop counter */
- q7_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex, count; /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+ uint32_t index; /* index of maximum value */
+#endif
- /* Initialise the count value. */
- count = 0U;
- /* Initialise the index value to zero. */
+ /* Initialise index value to zero. */
outIndex = 0U;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
- /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+ /* Initialise index of maximum value. */
+ index = 0U;
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = (blockSize - 1U) >> 2U;
while (blkCnt > 0U)
{
- /* Initialize maxVal to the next consecutive values one by one */
- maxVal1 = *pSrc++;
- maxVal2 = *pSrc++;
+ /* Initialize maxVal to next consecutive values one by one */
+ maxVal = *pSrc++;
/* compare for the maximum value */
- if (out < maxVal1)
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal1;
- outIndex = count + 1U;
+ /* Update the maximum value and it's index */
+ out = maxVal;
+ outIndex = index + 1U;
}
- /* compare for the maximum value */
- if (out < maxVal2)
+ maxVal = *pSrc++;
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal2;
- outIndex = count + 2U;
+ out = maxVal;
+ outIndex = index + 2U;
}
- /* Initialize maxVal to the next consecutive values one by one */
- maxVal1 = *pSrc++;
- maxVal2 = *pSrc++;
-
- /* compare for the maximum value */
- if (out < maxVal1)
+ maxVal = *pSrc++;
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal1;
- outIndex = count + 3U;
+ out = maxVal;
+ outIndex = index + 3U;
}
- /* compare for the maximum value */
- if (out < maxVal2)
+ maxVal = *pSrc++;
+ if (out < maxVal)
{
- /* Update the maximum value and its index */
- out = maxVal2;
- outIndex = count + 4U;
+ out = maxVal;
+ outIndex = index + 4U;
}
- count += 4U;
+ index += 4U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* if (blockSize - 1U) is not multiple of 4 */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (blockSize - 1U) % 4U;
#else
- /* Run the below code for Cortex-M0 */
- q7_t maxVal1, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex; /* loop counter */
-
- /* Initialise the index value to zero. */
- outIndex = 0U;
- /* Load first input value that act as reference value for comparision */
- out = *pSrc++;
-
+ /* Initialize blkCnt with number of samples */
blkCnt = (blockSize - 1U);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* Initialize maxVal to the next consecutive values one by one */
- maxVal1 = *pSrc++;
+ maxVal = *pSrc++;
/* compare for the maximum value */
- if (out < maxVal1)
+ if (out < maxVal)
{
/* Update the maximum value and it's index */
- out = maxVal1;
+ out = maxVal;
outIndex = blockSize - blkCnt;
}
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -158,5 +144,5 @@
}
/**
- * @} end of Max group
+ @} end of Max group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c
index 85a3b16..93daf07 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c
@@ -3,13 +3,13 @@
* Title: arm_mean_f32.c
* Description: Mean value of a floating-point vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,97 +29,87 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @defgroup mean Mean
- *
- * Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector.
- * The underlying algorithm is used:
- *
- * <pre>
- * Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;
- * </pre>
- *
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+ @defgroup mean Mean
+
+ Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector.
+ The underlying algorithm is used:
+
+ <pre>
+ Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;
+ </pre>
+
+ There are separate functions for floating-point, Q31, Q15, and Q7 data types.
*/
/**
- * @addtogroup mean
- * @{
+ @addtogroup mean
+ @{
*/
-
/**
- * @brief Mean value of a floating-point vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult mean value returned here
- * @return none.
+ @brief Mean value of a floating-point vector.
+ @param[in] pSrc points to the input vector.
+ @param[in] blockSize number of samples in input vector.
+ @param[out] pResult mean value returned here.
+ @return none
*/
void arm_mean_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult)
+ const float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult)
{
- float32_t sum = 0.0f; /* Temporary result storage */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ float32_t sum = 0.0f; /* Temporary result storage */
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
- float32_t in1, in2, in3, in4;
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0U)
- {
- /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
- in1 = *pSrc++;
- in2 = *pSrc++;
- in3 = *pSrc++;
- in4 = *pSrc++;
-
- sum += in1;
- sum += in2;
- sum += in3;
- sum += in4;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
-#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
while (blkCnt > 0U)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
sum += *pSrc++;
+ sum += *pSrc++;
+
+ sum += *pSrc++;
+
+ sum += *pSrc++;
+
/* Decrement the loop counter */
blkCnt--;
}
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+ sum += *pSrc++;
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
- /* Store the result to the destination */
- *pResult = sum / (float32_t) blockSize;
+ /* Store result to destination */
+ *pResult = (sum / blockSize);
}
/**
- * @} end of mean group
+ @} end of mean group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c
index 7bf55c2..8e6d49c 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c
@@ -3,13 +3,13 @@
* Title: arm_mean_q15.c
* Description: Mean value of a Q15 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,59 +29,55 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup mean
- * @{
+ @addtogroup mean
+ @{
*/
-
/**
- * @brief Mean value of a Q15 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult mean value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * The input is represented in 1.15 format and is accumulated in a 32-bit
- * accumulator in 17.15 format.
- * There is no risk of internal overflow with this approach, and the
- * full precision of intermediate result is preserved.
- * Finally, the accumulator is saturated and truncated to yield a result of 1.15 format.
- *
+ @brief Mean value of a Q15 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult mean value returned here
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 32-bit internal accumulator.
+ The input is represented in 1.15 format and is accumulated in a 32-bit
+ accumulator in 17.15 format.
+ There is no risk of internal overflow with this approach, and the
+ full precision of intermediate result is preserved.
+ Finally, the accumulator is truncated to yield a result of 1.15 format.
*/
void arm_mean_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult)
+ const q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult)
{
- q31_t sum = 0; /* Temporary result storage */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ q31_t sum = 0; /* Temporary result storage */
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t in;
+#endif
- q31_t in;
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
- in = *__SIMD32(pSrc)++;
+ in = read_q15x2_ia ((q15_t **) &pSrc);
sum += ((in << 16U) >> 16U);
sum += (in >> 16U);
- in = *__SIMD32(pSrc)++;
+
+ in = read_q15x2_ia ((q15_t **) &pSrc);
sum += ((in << 16U) >> 16U);
sum += (in >> 16U);
@@ -89,32 +85,30 @@
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
sum += *pSrc++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
- /* Store the result to the destination */
- *pResult = (q15_t) (sum / (q31_t)blockSize);
+ /* Store result to destination */
+ *pResult = (q15_t) (sum / (int32_t) blockSize);
}
/**
- * @} end of mean group
+ @} end of mean group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c
index ea83ced..e07c773 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c
@@ -3,13 +3,13 @@
* Title: arm_mean_q31.c
* Description: Mean value of a Q31 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,95 +29,82 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup mean
- * @{
+ @addtogroup mean
+ @{
*/
-
/**
- * @brief Mean value of a Q31 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult mean value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *\par
- * The function is implemented using a 64-bit internal accumulator.
- * The input is represented in 1.31 format and is accumulated in a 64-bit
- * accumulator in 33.31 format.
- * There is no risk of internal overflow with this approach, and the
- * full precision of intermediate result is preserved.
- * Finally, the accumulator is truncated to yield a result of 1.31 format.
- *
+ @brief Mean value of a Q31 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult mean value returned here
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ The input is represented in 1.31 format and is accumulated in a 64-bit
+ accumulator in 33.31 format.
+ There is no risk of internal overflow with this approach, and the
+ full precision of intermediate result is preserved.
+ Finally, the accumulator is truncated to yield a result of 1.31 format.
*/
void arm_mean_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult)
+ const q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult)
{
- q63_t sum = 0; /* Temporary result storage */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ q63_t sum = 0; /* Temporary result storage */
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
- q31_t in1, in2, in3, in4;
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0U)
- {
- /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
- in1 = *pSrc++;
- in2 = *pSrc++;
- in3 = *pSrc++;
- in4 = *pSrc++;
-
- sum += in1;
- sum += in2;
- sum += in3;
- sum += in4;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
-#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
while (blkCnt > 0U)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
sum += *pSrc++;
+ sum += *pSrc++;
+
+ sum += *pSrc++;
+
+ sum += *pSrc++;
+
/* Decrement the loop counter */
blkCnt--;
}
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+ sum += *pSrc++;
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
- /* Store the result to the destination */
- *pResult = (q31_t) (sum / (int32_t) blockSize);
+ /* Store result to destination */
+ *pResult = (q31_t) (sum / blockSize);
}
/**
- * @} end of mean group
+ @} end of mean group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c
index a7bdfb8..a0cad29 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c
@@ -3,13 +3,13 @@
* Title: arm_mean_q7.c
* Description: Mean value of a Q7 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,57 +29,51 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup mean
- * @{
+ @addtogroup mean
+ @{
*/
-
/**
- * @brief Mean value of a Q7 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult mean value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * The input is represented in 1.7 format and is accumulated in a 32-bit
- * accumulator in 25.7 format.
- * There is no risk of internal overflow with this approach, and the
- * full precision of intermediate result is preserved.
- * Finally, the accumulator is truncated to yield a result of 1.7 format.
- *
+ @brief Mean value of a Q7 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult mean value returned here
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 32-bit internal accumulator.
+ The input is represented in 1.7 format and is accumulated in a 32-bit
+ accumulator in 25.7 format.
+ There is no risk of internal overflow with this approach, and the
+ full precision of intermediate result is preserved.
+ Finally, the accumulator is truncated to yield a result of 1.7 format.
*/
void arm_mean_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q7_t * pResult)
+ const q7_t * pSrc,
+ uint32_t blockSize,
+ q7_t * pResult)
{
- q31_t sum = 0; /* Temporary result storage */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ q31_t sum = 0; /* Temporary result storage */
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t in;
+#endif
- q31_t in;
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
- in = *__SIMD32(pSrc)++;
-
+ in = read_q7x4_ia ((q7_t **) &pSrc);
sum += ((in << 24U) >> 24U);
sum += ((in << 16U) >> 24U);
sum += ((in << 8U) >> 24U);
@@ -89,32 +83,30 @@
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
sum += *pSrc++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
- /* Store the result to the destination */
+ /* Store result to destination */
*pResult = (q7_t) (sum / (int32_t) blockSize);
}
/**
- * @} end of mean group
+ @} end of mean group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c
index 858b0a2..18e2919 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c
@@ -3,13 +3,13 @@
* Title: arm_min_f32.c
* Description: Minimum value of a floating-point vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,134 +29,120 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @defgroup Min Minimum
- *
- * Computes the minimum value of an array of data.
- * The function returns both the minimum value and its position within the array.
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+ @defgroup Min Minimum
+
+ Computes the minimum value of an array of data.
+ The function returns both the minimum value and its position within the array.
+ There are separate functions for floating-point, Q31, Q15, and Q7 data types.
*/
/**
- * @addtogroup Min
- * @{
+ @addtogroup Min
+ @{
*/
-
/**
- * @brief Minimum value of a floating-point vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult minimum value returned here
- * @param[out] *pIndex index of minimum value returned here
- * @return none.
+ @brief Minimum value of a floating-point vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult minimum value returned here
+ @param[out] pIndex index of minimum value returned here
+ @return none
*/
void arm_min_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult,
- uint32_t * pIndex)
+ const float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult,
+ uint32_t * pIndex)
{
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ float32_t minVal, out; /* Temporary variables to store the output value. */
+ uint32_t blkCnt, outIndex; /* Loop counter */
- float32_t minVal1, minVal2, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex, count; /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+ uint32_t index; /* index of maximum value */
+#endif
- /* Initialise the count value. */
- count = 0U;
- /* Initialise the index value to zero. */
+ /* Initialise index value to zero. */
outIndex = 0U;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
- /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+ /* Initialise index of maximum value. */
+ index = 0U;
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = (blockSize - 1U) >> 2U;
while (blkCnt > 0U)
{
- /* Initialize minVal to the next consecutive values one by one */
- minVal1 = *pSrc++;
- minVal2 = *pSrc++;
+ /* Initialize minVal to next consecutive values one by one */
+ minVal = *pSrc++;
/* compare for the minimum value */
- if (out > minVal1)
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal1;
- outIndex = count + 1U;
+ /* Update the minimum value and it's index */
+ out = minVal;
+ outIndex = index + 1U;
}
- /* compare for the minimum value */
- if (out > minVal2)
+ minVal = *pSrc++;
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal2;
- outIndex = count + 2U;
+ out = minVal;
+ outIndex = index + 2U;
}
- /* Initialize minVal to the next consecutive values one by one */
- minVal1 = *pSrc++;
- minVal2 = *pSrc++;
-
- /* compare for the minimum value */
- if (out > minVal1)
+ minVal = *pSrc++;
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal1;
- outIndex = count + 3U;
+ out = minVal;
+ outIndex = index + 3U;
}
- /* compare for the minimum value */
- if (out > minVal2)
+ minVal = *pSrc++;
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal2;
- outIndex = count + 4U;
+ out = minVal;
+ outIndex = index + 4U;
}
- count += 4U;
+ index += 4U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* if (blockSize - 1U) is not multiple of 4 */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (blockSize - 1U) % 4U;
#else
- /* Run the below code for Cortex-M0 */
- float32_t minVal1, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex; /* loop counter */
-
- /* Initialise the index value to zero. */
- outIndex = 0U;
- /* Load first input value that act as reference value for comparision */
- out = *pSrc++;
-
+ /* Initialize blkCnt with number of samples */
blkCnt = (blockSize - 1U);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* Initialize minVal to the next consecutive values one by one */
- minVal1 = *pSrc++;
+ minVal = *pSrc++;
/* compare for the minimum value */
- if (out > minVal1)
+ if (out > minVal)
{
/* Update the minimum value and it's index */
- out = minVal1;
+ out = minVal;
outIndex = blockSize - blkCnt;
}
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -166,5 +152,5 @@
}
/**
- * @} end of Min group
+ @} end of Min group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c
index fdc32b7..db2e234 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c
@@ -3,13 +3,13 @@
* Title: arm_min_q15.c
* Description: Minimum value of a Q15 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,127 +29,113 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup Min
- * @{
+ @addtogroup Min
+ @{
*/
-
/**
- * @brief Minimum value of a Q15 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult minimum value returned here
- * @param[out] *pIndex index of minimum value returned here
- * @return none.
+ @brief Minimum value of a Q15 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult minimum value returned here
+ @param[out] pIndex index of minimum value returned here
+ @return none
*/
void arm_min_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult,
- uint32_t * pIndex)
+ const q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult,
+ uint32_t * pIndex)
{
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ q15_t minVal, out; /* Temporary variables to store the output value. */
+ uint32_t blkCnt, outIndex; /* Loop counter */
- q15_t minVal1, minVal2, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex, count; /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+ uint32_t index; /* index of maximum value */
+#endif
- /* Initialise the count value. */
- count = 0U;
- /* Initialise the index value to zero. */
+ /* Initialise index value to zero. */
outIndex = 0U;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
- /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+ /* Initialise index of maximum value. */
+ index = 0U;
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = (blockSize - 1U) >> 2U;
while (blkCnt > 0U)
{
- /* Initialize minVal to the next consecutive values one by one */
- minVal1 = *pSrc++;
- minVal2 = *pSrc++;
+ /* Initialize minVal to next consecutive values one by one */
+ minVal = *pSrc++;
/* compare for the minimum value */
- if (out > minVal1)
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal1;
- outIndex = count + 1U;
+ /* Update the minimum value and it's index */
+ out = minVal;
+ outIndex = index + 1U;
}
- /* compare for the minimum value */
- if (out > minVal2)
+ minVal = *pSrc++;
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal2;
- outIndex = count + 2U;
+ out = minVal;
+ outIndex = index + 2U;
}
- /* Initialize minVal to the next consecutive values one by one */
- minVal1 = *pSrc++;
- minVal2 = *pSrc++;
-
- /* compare for the minimum value */
- if (out > minVal1)
+ minVal = *pSrc++;
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal1;
- outIndex = count + 3U;
+ out = minVal;
+ outIndex = index + 3U;
}
- /* compare for the minimum value */
- if (out > minVal2)
+ minVal = *pSrc++;
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal2;
- outIndex = count + 4U;
+ out = minVal;
+ outIndex = index + 4U;
}
- count += 4U;
+ index += 4U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* if (blockSize - 1U) is not multiple of 4 */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (blockSize - 1U) % 4U;
#else
- /* Run the below code for Cortex-M0 */
- q15_t minVal1, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex; /* loop counter */
-
- /* Initialise the index value to zero. */
- outIndex = 0U;
- /* Load first input value that act as reference value for comparision */
- out = *pSrc++;
-
+ /* Initialize blkCnt with number of samples */
blkCnt = (blockSize - 1U);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* Initialize minVal to the next consecutive values one by one */
- minVal1 = *pSrc++;
+ minVal = *pSrc++;
/* compare for the minimum value */
- if (out > minVal1)
+ if (out > minVal)
{
/* Update the minimum value and it's index */
- out = minVal1;
+ out = minVal;
outIndex = blockSize - blkCnt;
}
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -159,5 +145,5 @@
}
/**
- * @} end of Min group
+ @} end of Min group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c
index fc4c155..50a5d0b 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c
@@ -3,13 +3,13 @@
* Title: arm_min_q31.c
* Description: Minimum value of a Q31 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,127 +29,113 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup Min
- * @{
+ @addtogroup Min
+ @{
*/
-
/**
- * @brief Minimum value of a Q31 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult minimum value returned here
- * @param[out] *pIndex index of minimum value returned here
- * @return none.
+ @brief Minimum value of a Q31 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult minimum value returned here
+ @param[out] pIndex index of minimum value returned here
+ @return none
*/
void arm_min_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult,
- uint32_t * pIndex)
+ const q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult,
+ uint32_t * pIndex)
{
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t minVal, out; /* Temporary variables to store the output value. */
+ uint32_t blkCnt, outIndex; /* Loop counter */
- q31_t minVal1, minVal2, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex, count; /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+ uint32_t index; /* index of maximum value */
+#endif
- /* Initialise the count value. */
- count = 0U;
- /* Initialise the index value to zero. */
+ /* Initialise index value to zero. */
outIndex = 0U;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
- /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+ /* Initialise index of maximum value. */
+ index = 0U;
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = (blockSize - 1U) >> 2U;
while (blkCnt > 0U)
{
- /* Initialize minVal to the next consecutive values one by one */
- minVal1 = *pSrc++;
- minVal2 = *pSrc++;
+ /* Initialize minVal to next consecutive values one by one */
+ minVal = *pSrc++;
/* compare for the minimum value */
- if (out > minVal1)
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal1;
- outIndex = count + 1U;
+ /* Update the minimum value and it's index */
+ out = minVal;
+ outIndex = index + 1U;
}
- /* compare for the minimum value */
- if (out > minVal2)
+ minVal = *pSrc++;
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal2;
- outIndex = count + 2U;
+ out = minVal;
+ outIndex = index + 2U;
}
- /* Initialize minVal to the next consecutive values one by one */
- minVal1 = *pSrc++;
- minVal2 = *pSrc++;
-
- /* compare for the minimum value */
- if (out > minVal1)
+ minVal = *pSrc++;
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal1;
- outIndex = count + 3U;
+ out = minVal;
+ outIndex = index + 3U;
}
- /* compare for the minimum value */
- if (out > minVal2)
+ minVal = *pSrc++;
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal2;
- outIndex = count + 4U;
+ out = minVal;
+ outIndex = index + 4U;
}
- count += 4U;
+ index += 4U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* if (blockSize - 1U) is not multiple of 4 */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (blockSize - 1U) % 4U;
#else
- /* Run the below code for Cortex-M0 */
- q31_t minVal1, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex; /* loop counter */
-
- /* Initialise the index value to zero. */
- outIndex = 0U;
- /* Load first input value that act as reference value for comparision */
- out = *pSrc++;
-
+ /* Initialize blkCnt with number of samples */
blkCnt = (blockSize - 1U);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* Initialize minVal to the next consecutive values one by one */
- minVal1 = *pSrc++;
+ minVal = *pSrc++;
/* compare for the minimum value */
- if (out > minVal1)
+ if (out > minVal)
{
/* Update the minimum value and it's index */
- out = minVal1;
+ out = minVal;
outIndex = blockSize - blkCnt;
}
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -159,5 +145,5 @@
}
/**
- * @} end of Min group
+ @} end of Min group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c
index 50362e6..624601f 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c
@@ -3,13 +3,13 @@
* Title: arm_min_q7.c
* Description: Minimum value of a Q7 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,127 +29,113 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup Min
- * @{
+ @addtogroup Min
+ @{
*/
-
/**
- * @brief Minimum value of a Q7 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult minimum value returned here
- * @param[out] *pIndex index of minimum value returned here
- * @return none.
+ @brief Minimum value of a Q7 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult minimum value returned here
+ @param[out] pIndex index of minimum value returned here
+ @return none
*/
void arm_min_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q7_t * pResult,
- uint32_t * pIndex)
+ const q7_t * pSrc,
+ uint32_t blockSize,
+ q7_t * pResult,
+ uint32_t * pIndex)
{
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ q7_t minVal, out; /* Temporary variables to store the output value. */
+ uint32_t blkCnt, outIndex; /* Loop counter */
- q7_t minVal1, minVal2, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex, count; /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+ uint32_t index; /* index of maximum value */
+#endif
- /* Initialise the count value. */
- count = 0U;
- /* Initialise the index value to zero. */
+ /* Initialise index value to zero. */
outIndex = 0U;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
- /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+ /* Initialise index of maximum value. */
+ index = 0U;
+
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = (blockSize - 1U) >> 2U;
while (blkCnt > 0U)
{
- /* Initialize minVal to the next consecutive values one by one */
- minVal1 = *pSrc++;
- minVal2 = *pSrc++;
+ /* Initialize minVal to next consecutive values one by one */
+ minVal = *pSrc++;
/* compare for the minimum value */
- if (out > minVal1)
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal1;
- outIndex = count + 1U;
+ /* Update the minimum value and it's index */
+ out = minVal;
+ outIndex = index + 1U;
}
- /* compare for the minimum value */
- if (out > minVal2)
+ minVal = *pSrc++;
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal2;
- outIndex = count + 2U;
+ out = minVal;
+ outIndex = index + 2U;
}
- /* Initialize minVal to the next consecutive values one by one */
- minVal1 = *pSrc++;
- minVal2 = *pSrc++;
-
- /* compare for the minimum value */
- if (out > minVal1)
+ minVal = *pSrc++;
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal1;
- outIndex = count + 3U;
+ out = minVal;
+ outIndex = index + 3U;
}
- /* compare for the minimum value */
- if (out > minVal2)
+ minVal = *pSrc++;
+ if (out > minVal)
{
- /* Update the minimum value and its index */
- out = minVal2;
- outIndex = count + 4U;
+ out = minVal;
+ outIndex = index + 4U;
}
- count += 4U;
+ index += 4U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* if (blockSize - 1U) is not multiple of 4 */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = (blockSize - 1U) % 4U;
#else
- /* Run the below code for Cortex-M0 */
- q7_t minVal1, out; /* Temporary variables to store the output value. */
- uint32_t blkCnt, outIndex; /* loop counter */
-
- /* Initialise the index value to zero. */
- outIndex = 0U;
- /* Load first input value that act as reference value for comparision */
- out = *pSrc++;
-
+ /* Initialize blkCnt with number of samples */
blkCnt = (blockSize - 1U);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* Initialize minVal to the next consecutive values one by one */
- minVal1 = *pSrc++;
+ minVal = *pSrc++;
/* compare for the minimum value */
- if (out > minVal1)
+ if (out > minVal)
{
/* Update the minimum value and it's index */
- out = minVal1;
+ out = minVal;
outIndex = blockSize - blkCnt;
}
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
@@ -159,5 +145,5 @@
}
/**
- * @} end of Min group
+ @} end of Min group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c
index 1426735..050f47a 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c
@@ -3,13 +3,13 @@
* Title: arm_power_f32.c
* Description: Sum of the squares of the elements of a floating-point vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,101 +29,96 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @defgroup power Power
- *
- * Calculates the sum of the squares of the elements in the input vector.
- * The underlying algorithm is used:
- *
- * <pre>
- * Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];
- * </pre>
- *
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.
+ @defgroup power Power
+
+ Calculates the sum of the squares of the elements in the input vector.
+ The underlying algorithm is used:
+
+ <pre>
+ Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];
+ </pre>
+
+ There are separate functions for floating point, Q31, Q15, and Q7 data types.
*/
/**
- * @addtogroup power
- * @{
+ @addtogroup power
+ @{
*/
-
/**
- * @brief Sum of the squares of the elements of a floating-point vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult sum of the squares value returned here
- * @return none.
- *
+ @brief Sum of the squares of the elements of a floating-point vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult sum of the squares value returned here
+ @return none
*/
-
void arm_power_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult)
+ const float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult)
{
- float32_t sum = 0.0f; /* accumulator */
- float32_t in; /* Temporary variable to store input value */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ float32_t sum = 0.0f; /* Temporary result storage */
+ float32_t in; /* Temporary variable to store input value */
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
- /* Compute Power and then store the result in a temporary variable, sum. */
- in = *pSrc++;
- sum += in * in;
- in = *pSrc++;
- sum += in * in;
- in = *pSrc++;
- sum += in * in;
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+ /* Compute Power and store result in a temporary variable, sum. */
in = *pSrc++;
sum += in * in;
- /* Decrement the loop counter */
+ in = *pSrc++;
+ sum += in * in;
+
+ in = *pSrc++;
+ sum += in * in;
+
+ in = *pSrc++;
+ sum += in * in;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
-
#else
- /* Run the below code for Cortex-M0 */
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
- /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
- /* compute power and then store the result in a temporary variable, sum. */
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+ /* Compute Power and store result in a temporary variable, sum. */
in = *pSrc++;
sum += in * in;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* Store the result to the destination */
+ /* Store result to destination */
*pResult = sum;
}
/**
- * @} end of power group
+ @} end of power group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c
index 6d95f4d..3f7af91 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c
@@ -3,13 +3,13 @@
* Title: arm_power_q15.c
* Description: Sum of the squares of the elements of a Q15 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,110 +29,104 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup power
- * @{
+ @addtogroup power
+ @{
*/
/**
- * @brief Sum of the squares of the elements of a Q15 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult sum of the squares value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * The input is represented in 1.15 format.
- * Intermediate multiplication yields a 2.30 format, and this
- * result is added without saturation to a 64-bit accumulator in 34.30 format.
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the
- * full precision of the intermediate multiplication is preserved.
- * Finally, the return result is in 34.30 format.
- *
+ @brief Sum of the squares of the elements of a Q15 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult sum of the squares value returned here
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ The input is represented in 1.15 format.
+ Intermediate multiplication yields a 2.30 format, and this
+ result is added without saturation to a 64-bit accumulator in 34.30 format.
+ With 33 guard bits in the accumulator, there is no risk of overflow, and the
+ full precision of the intermediate multiplication is preserved.
+ Finally, the return result is in 34.30 format.
*/
void arm_power_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q63_t * pResult)
+ const q15_t * pSrc,
+ uint32_t blockSize,
+ q63_t * pResult)
{
- q63_t sum = 0; /* Temporary result storage */
+ uint32_t blkCnt; /* Loop counter */
+ q63_t sum = 0; /* Temporary result storage */
+ q15_t in; /* Temporary variable to store input value */
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+ q31_t in32; /* Temporary variable to store packed input value */
+#endif
- q31_t in32; /* Temporary variable to store input value */
- q15_t in16; /* Temporary variable to store input value */
- uint32_t blkCnt; /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
-
- /* loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
- /* Compute Power and then store the result in a temporary variable, sum. */
- in32 = *__SIMD32(pSrc)++;
- sum = __SMLALD(in32, in32, sum);
- in32 = *__SIMD32(pSrc)++;
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+ /* Compute Power and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+ in32 = read_q15x2_ia ((q15_t **) &pSrc);
sum = __SMLALD(in32, in32, sum);
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
- /* Compute Power and then store the result in a temporary variable, sum. */
- in16 = *pSrc++;
- sum = __SMLALD(in16, in16, sum);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
+ in32 = read_q15x2_ia ((q15_t **) &pSrc);
+ sum = __SMLALD(in32, in32, sum);
#else
- /* Run the below code for Cortex-M0 */
-
- q15_t in; /* Temporary variable to store input value */
- uint32_t blkCnt; /* loop counter */
-
-
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
- /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
- /* Compute Power and then store the result in a temporary variable, sum. */
in = *pSrc++;
sum += ((q31_t) in * in);
- /* Decrement the loop counter */
+ in = *pSrc++;
+ sum += ((q31_t) in * in);
+
+ in = *pSrc++;
+ sum += ((q31_t) in * in);
+
+ in = *pSrc++;
+ sum += ((q31_t) in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
- /* Store the results in 34.30 format */
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+ /* Compute Power and store result in a temporary variable, sum. */
+ in = *pSrc++;
+ sum += ((q31_t) in * in);
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Store result in 34.30 format */
*pResult = sum;
}
/**
- * @} end of power group
+ @} end of power group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c
index 16be249..789780c 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c
@@ -3,13 +3,13 @@
* Title: arm_power_q31.c
* Description: Sum of the squares of the elements of a Q31 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,58 +29,51 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup power
- * @{
+ @addtogroup power
+ @{
*/
/**
- * @brief Sum of the squares of the elements of a Q31 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult sum of the squares value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * The input is represented in 1.31 format.
- * Intermediate multiplication yields a 2.62 format, and this
- * result is truncated to 2.48 format by discarding the lower 14 bits.
- * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
- * With 15 guard bits in the accumulator, there is no risk of overflow, and the
- * full precision of the intermediate multiplication is preserved.
- * Finally, the return result is in 16.48 format.
- *
+ @brief Sum of the squares of the elements of a Q31 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult sum of the squares value returned here
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ The input is represented in 1.31 format.
+ Intermediate multiplication yields a 2.62 format, and this
+ result is truncated to 2.48 format by discarding the lower 14 bits.
+ The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
+ With 15 guard bits in the accumulator, there is no risk of overflow, and the
+ full precision of the intermediate multiplication is preserved.
+ Finally, the return result is in 16.48 format.
*/
void arm_power_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q63_t * pResult)
+ const q31_t * pSrc,
+ uint32_t blockSize,
+ q63_t * pResult)
{
- q63_t sum = 0; /* Temporary result storage */
- q31_t in;
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ q63_t sum = 0; /* Temporary result storage */
+ q31_t in; /* Temporary variable to store input value */
+#if defined (ARM_MATH_LOOPUNROLL)
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
- /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and then store the result in a temporary variable sum, providing 15 guard bits. */
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+ /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and store result in a temporary variable sum, providing 15 guard bits. */
in = *pSrc++;
sum += ((q63_t) in * in) >> 14U;
@@ -93,37 +86,36 @@
in = *pSrc++;
sum += ((q63_t) in * in) >> 14U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
- /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
- /* Compute Power and then store the result in a temporary variable, sum. */
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+ /* Compute Power and store result in a temporary variable, sum. */
in = *pSrc++;
sum += ((q63_t) in * in) >> 14U;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* Store the results in 16.48 format */
+ /* Store results in 16.48 format */
*pResult = sum;
}
/**
- * @} end of power group
+ @} end of power group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c
index 24306cd..941d000 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c
@@ -3,13 +3,13 @@
* Title: arm_power_q7.c
* Description: Sum of the squares of the elements of a Q7 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,99 +29,108 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup power
- * @{
+ @addtogroup power
+ @{
*/
/**
- * @brief Sum of the squares of the elements of a Q7 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult sum of the squares value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * The input is represented in 1.7 format.
- * Intermediate multiplication yields a 2.14 format, and this
- * result is added without saturation to an accumulator in 18.14 format.
- * With 17 guard bits in the accumulator, there is no risk of overflow, and the
- * full precision of the intermediate multiplication is preserved.
- * Finally, the return result is in 18.14 format.
- *
+ @brief Sum of the squares of the elements of a Q7 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult sum of the squares value returned here
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 32-bit internal accumulator.
+ The input is represented in 1.7 format.
+ Intermediate multiplication yields a 2.14 format, and this
+ result is added without saturation to an accumulator in 18.14 format.
+ With 17 guard bits in the accumulator, there is no risk of overflow, and the
+ full precision of the intermediate multiplication is preserved.
+ Finally, the return result is in 18.14 format.
*/
void arm_power_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult)
+ const q7_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult)
{
- q31_t sum = 0; /* Temporary result storage */
- q7_t in; /* Temporary variable to store input */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ q31_t sum = 0; /* Temporary result storage */
+ q7_t in; /* Temporary variable to store input value */
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+ q31_t in32; /* Temporary variable to store packed input value */
+ q31_t in1, in2; /* Temporary variables to store input value */
+#endif
- q31_t input1; /* Temporary variable to store packed input */
- q31_t in1, in2; /* Temporary variables to store input */
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* Reading two inputs of pSrc vector and packing */
- input1 = *__SIMD32(pSrc)++;
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
- in1 = __SXTB16(__ROR(input1, 8));
- in2 = __SXTB16(input1);
+ /* Compute Power and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+ in32 = read_q7x4_ia ((q7_t **) &pSrc);
- /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+ in1 = __SXTB16(__ROR(in32, 8));
+ in2 = __SXTB16(in32);
+
/* calculate power and accumulate to accumulator */
sum = __SMLAD(in1, in1, sum);
sum = __SMLAD(in2, in2, sum);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
- while (blkCnt > 0U)
- {
- /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
- /* Compute Power and then store the result in a temporary variable, sum. */
in = *pSrc++;
sum += ((q15_t) in * in);
- /* Decrement the loop counter */
+ in = *pSrc++;
+ sum += ((q15_t) in * in);
+
+ in = *pSrc++;
+ sum += ((q15_t) in * in);
+
+ in = *pSrc++;
+ sum += ((q15_t) in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* Store the result in 18.14 format */
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+ /* Compute Power and store result in a temporary variable, sum. */
+ in = *pSrc++;
+ sum += ((q15_t) in * in);
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Store result in 18.14 format */
*pResult = sum;
}
/**
- * @} end of power group
+ @} end of power group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c
index 8d1b708..d45e039 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c
@@ -1,15 +1,15 @@
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_rms_f32.c
- * Description: Root mean square value of an array of F32 type
+ * Description: Root mean square value of the elements of a floating-point vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,99 +29,96 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @defgroup RMS Root mean square (RMS)
- *
- *
- * Calculates the Root Mean Sqaure of the elements in the input vector.
- * The underlying algorithm is used:
- *
- * <pre>
- * Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));
- * </pre>
- *
- * There are separate functions for floating point, Q31, and Q15 data types.
+ @defgroup RMS Root mean square (RMS)
+
+ Calculates the Root Mean Square of the elements in the input vector.
+ The underlying algorithm is used:
+
+ <pre>
+ Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));
+ </pre>
+
+ There are separate functions for floating point, Q31, and Q15 data types.
*/
/**
- * @addtogroup RMS
- * @{
+ @addtogroup RMS
+ @{
*/
-
/**
- * @brief Root Mean Square of the elements of a floating-point vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult rms value returned here
- * @return none.
- *
+ @brief Root Mean Square of the elements of a floating-point vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult root mean square value returned here
+ @return none
*/
void arm_rms_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult)
+ const float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult)
{
- float32_t sum = 0.0f; /* Accumulator */
- float32_t in; /* Tempoprary variable to store input value */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ float32_t sum = 0.0f; /* Temporary result storage */
+ float32_t in; /* Temporary variable to store input value */
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
- /* loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
- /* Compute sum of the squares and then store the result in a temporary variable, sum */
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
in = *pSrc++;
+ /* Compute sum of squares and store result in a temporary variable, sum. */
sum += in * in;
- in = *pSrc++;
- sum += in * in;
- in = *pSrc++;
- sum += in * in;
+
in = *pSrc++;
sum += in * in;
- /* Decrement the loop counter */
+ in = *pSrc++;
+ sum += in * in;
+
+ in = *pSrc++;
+ sum += in * in;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
- /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
- /* Compute sum of the squares and then store the results in a temporary variable, sum */
- in = *pSrc++;
- sum += in * in;
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
- /* Decrement the loop counter */
+ in = *pSrc++;
+ /* Compute sum of squares and store result in a temporary variable. */
+ sum += ( in * in);
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* Compute Rms and store the result in the destination */
+ /* Compute Rms and store result in destination */
arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
}
/**
- * @} end of RMS group
+ @} end of RMS group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c
index d0e61ca..09adbf0 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c
@@ -3,13 +3,13 @@
* Title: arm_rms_q15.c
* Description: Root Mean Square of the elements of a Q15 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,111 +29,106 @@
#include "arm_math.h"
/**
- * @addtogroup RMS
- * @{
+ @ingroup groupStats
*/
/**
- * @brief Root Mean Square of the elements of a Q15 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult rms value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * The input is represented in 1.15 format.
- * Intermediate multiplication yields a 2.30 format, and this
- * result is added without saturation to a 64-bit accumulator in 34.30 format.
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the
- * full precision of the intermediate multiplication is preserved.
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
- * 15 bits, and then saturated to yield a result in 1.15 format.
- *
+ @addtogroup RMS
+ @{
+ */
+
+/**
+ @brief Root Mean Square of the elements of a Q15 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult root mean square value returned here
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ The input is represented in 1.15 format.
+ Intermediate multiplication yields a 2.30 format, and this
+ result is added without saturation to a 64-bit accumulator in 34.30 format.
+ With 33 guard bits in the accumulator, there is no risk of overflow, and the
+ full precision of the intermediate multiplication is preserved.
+ Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
+ 15 bits, and then saturated to yield a result in 1.15 format.
*/
void arm_rms_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult)
+ const q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult)
{
- q63_t sum = 0; /* accumulator */
+ uint32_t blkCnt; /* Loop counter */
+ q63_t sum = 0; /* Temporary result storage */
+ q15_t in; /* Temporary variable to store input value */
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+ q31_t in32; /* Temporary variable to store input value */
+#endif
- q31_t in; /* temporary variable to store the input value */
- q15_t in1; /* temporary variable to store the input value */
- uint32_t blkCnt; /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
- /* loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute sum of the squares and then store the results in a temporary variable, sum */
- in = *__SIMD32(pSrc)++;
- sum = __SMLALD(in, in, sum);
- in = *__SIMD32(pSrc)++;
- sum = __SMLALD(in, in, sum);
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
- /* Decrement the loop counter */
- blkCnt--;
- }
+ /* Compute sum of squares and store result in a temporary variable. */
+#if defined (ARM_MATH_DSP)
+ in32 = read_q15x2_ia ((q15_t **) &pSrc);
+ sum = __SMLALD(in32, in32, sum);
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute sum of the squares and then store the results in a temporary variable, sum */
- in1 = *pSrc++;
- sum = __SMLALD(in1, in1, sum);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Truncating and saturating the accumulator to 1.15 format */
- /* Store the result in the destination */
- arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
-
+ in32 = read_q15x2_ia ((q15_t **) &pSrc);
+ sum = __SMLALD(in32, in32, sum);
#else
- /* Run the below code for Cortex-M0 */
-
- q15_t in; /* temporary variable to store the input value */
- uint32_t blkCnt; /* loop counter */
-
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute sum of the squares and then store the results in a temporary variable, sum */
in = *pSrc++;
sum += ((q31_t) in * in);
- /* Decrement the loop counter */
+ in = *pSrc++;
+ sum += ((q31_t) in * in);
+
+ in = *pSrc++;
+ sum += ((q31_t) in * in);
+
+ in = *pSrc++;
+ sum += ((q31_t) in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+ in = *pSrc++;
+ /* Compute sum of squares and store result in a temporary variable. */
+ sum += ((q31_t) in * in);
+
+ /* Decrement loop counter */
blkCnt--;
}
/* Truncating and saturating the accumulator to 1.15 format */
- /* Store the result in the destination */
+ /* Store result in destination */
arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of RMS group
+ @} end of RMS group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c
index fb98335..49c2b8e 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c
@@ -3,13 +3,13 @@
* Title: arm_rms_q31.c
* Description: Root Mean Square of the elements of a Q31 vector
*
- * $Date: 10. December 2018
- * $Revision: V.1.5.2
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2018 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,109 +29,96 @@
#include "arm_math.h"
/**
- * @addtogroup RMS
- * @{
+ @ingroup groupStats
*/
+/**
+ @addtogroup RMS
+ @{
+ */
/**
- * @brief Root Mean Square of the elements of a Q31 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult rms value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- *\par
- * The function is implemented using an internal 64-bit accumulator.
- * The input is represented in 1.31 format, and intermediate multiplication
- * yields a 2.62 format.
- * The accumulator maintains full precision of the intermediate multiplication results,
- * but provides only a single guard bit.
- * There is no saturation on intermediate additions.
- * If the accumulator overflows, it wraps around and distorts the result.
- * In order to avoid overflows completely, the input signal must be scaled down by
- * log2(blockSize) bits, as a total of blockSize additions are performed internally.
- * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
- *
+ @brief Root Mean Square of the elements of a Q31 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult root mean square value returned here
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The input is represented in 1.31 format, and intermediate multiplication
+ yields a 2.62 format.
+ The accumulator maintains full precision of the intermediate multiplication results,
+ but provides only a single guard bit.
+ There is no saturation on intermediate additions.
+ If the accumulator overflows, it wraps around and distorts the result.
+ In order to avoid overflows completely, the input signal must be scaled down by
+ log2(blockSize) bits, as a total of blockSize additions are performed internally.
+ Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
*/
void arm_rms_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult)
+ const q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult)
{
- uint64_t sum = 0; /* accumulator (can get never negative. changed type from q63 to uint64 */
- q31_t in; /* Temporary variable to store the input */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ uint64_t sum = 0; /* Temporary result storage (can get never negative. changed type from q63 to uint64 */
+ q31_t in; /* Temporary variable to store input value */
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
- q31_t in1, in2, in3, in4; /* Temporary input variables */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 8 outputs at a time.
- ** a second loop below computes the remaining 1 to 7 samples. */
while (blkCnt > 0U)
{
- /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
- /* Compute sum of the squares and then store the result in a temporary variable, sum */
- /* read two samples from source buffer */
- in1 = pSrc[0];
- in2 = pSrc[1];
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
- /* calculate power and accumulate to accumulator */
- sum += (q63_t) in1 *in1;
- sum += (q63_t) in2 *in2;
+ in = *pSrc++;
+ /* Compute sum of squares and store result in a temporary variable, sum. */
+ sum += ((q63_t) in * in);
- /* read two samples from source buffer */
- in3 = pSrc[2];
- in4 = pSrc[3];
+ in = *pSrc++;
+ sum += ((q63_t) in * in);
- /* calculate power and accumulate to accumulator */
- sum += (q63_t) in3 *in3;
- sum += (q63_t) in4 *in4;
+ in = *pSrc++;
+ sum += ((q63_t) in * in);
+ in = *pSrc++;
+ sum += ((q63_t) in * in);
- /* update source buffer to process next samples */
- pSrc += 4U;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 8, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
- /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
- /* Compute sum of the squares and then store the results in a temporary variable, sum */
- in = *pSrc++;
- sum += (q63_t) in *in;
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
- /* Decrement the loop counter */
+ in = *pSrc++;
+ /* Compute sum of squares and store result in a temporary variable. */
+ sum += ((q63_t) in * in);
+
+ /* Decrement loop counter */
blkCnt--;
}
/* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
- /* Compute Rms and store the result in the destination vector */
+ /* Compute Rms and store result in destination vector */
arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t) blockSize) >> 31), pResult);
}
/**
- * @} end of RMS group
+ @} end of RMS group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c
index 9750b88..3d9e584 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c
@@ -3,13 +3,13 @@
* Title: arm_std_f32.c
* Description: Standard deviation of the elements of a floating-point vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,111 +29,121 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @defgroup STD Standard deviation
- *
- * Calculates the standard deviation of the elements in the input vector.
- * The underlying algorithm is used:
- *
- * <pre>
- * Result = sqrt((sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1))
- *
- * where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
- *
- * sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]
- * </pre>
- *
- * There are separate functions for floating point, Q31, and Q15 data types.
+ @defgroup STD Standard deviation
+
+ Calculates the standard deviation of the elements in the input vector.
+ The underlying algorithm is used:
+
+ <pre>
+ Result = sqrt((sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1))
+
+ sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
+ sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]
+ </pre>
+
+ There are separate functions for floating point, Q31, and Q15 data types.
*/
/**
- * @addtogroup STD
- * @{
+ @addtogroup STD
+ @{
*/
-
/**
- * @brief Standard deviation of the elements of a floating-point vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult standard deviation value returned here
- * @return none.
+ @brief Standard deviation of the elements of a floating-point vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult standard deviation value returned here
+ @return none
*/
void arm_std_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult)
+ const float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult)
{
- float32_t sum = 0.0f; /* Temporary result storage */
- float32_t sumOfSquares = 0.0f; /* Sum of squares */
- float32_t in; /* input value */
- uint32_t blkCnt; /* loop counter */
-#if defined (ARM_MATH_DSP)
- float32_t meanOfSquares, mean, squareOfMean; /* Temporary variables */
+ uint32_t blkCnt; /* Loop counter */
+ float32_t sum = 0.0f; /* Temporary result storage */
+ float32_t sumOfSquares = 0.0f; /* Sum of squares */
+ float32_t in; /* Temporary variable to store input value */
+
+#ifndef ARM_MATH_CM0_FAMILY
+ float32_t meanOfSquares, mean, squareOfMean; /* Temporary variables */
#else
- float32_t squareOfSum; /* Square of Sum */
- float32_t var; /* Temporary varaince storage */
+ float32_t squareOfSum; /* Square of Sum */
+ float32_t var; /* Temporary varaince storage */
#endif
- if (blockSize == 1U)
+ if (blockSize <= 1U)
{
*pResult = 0;
return;
}
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sum. */
- in = *pSrc++;
- sum += in;
- sumOfSquares += in * in;
- in = *pSrc++;
- sum += in;
- sumOfSquares += in * in;
- in = *pSrc++;
- sum += in;
- sumOfSquares += in * in;
- in = *pSrc++;
- sum += in;
- sumOfSquares += in * in;
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+ /* C = A[0] + A[1] + ... + A[blockSize-1] */
- /* Decrement the loop counter */
+ in = *pSrc++;
+ /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+ sumOfSquares += in * in;
+ /* Compute sum and store result in a temporary variable, sum. */
+ sum += in;
+
+ in = *pSrc++;
+ sumOfSquares += in * in;
+ sum += in;
+
+ in = *pSrc++;
+ sumOfSquares += in * in;
+ sum += in;
+
+ in = *pSrc++;
+ sumOfSquares += in * in;
+ sum += in;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sum. */
- in = *pSrc++;
- sum += in;
- sumOfSquares += in * in;
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+ /* C = A[0] + A[1] + ... + A[blockSize-1] */
- /* Decrement the loop counter */
+ in = *pSrc++;
+ /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+ sumOfSquares += ( in * in);
+ /* Compute sum and store result in a temporary variable, sum. */
+ sum += in;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* Compute Mean of squares of the input samples
- * and then store the result in a temporary variable, meanOfSquares. */
+#ifndef ARM_MATH_CM0_FAMILY
+
+ /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f);
/* Compute mean of all input values */
@@ -143,44 +153,24 @@
squareOfMean = (mean * mean) * (((float32_t) blockSize) /
((float32_t) blockSize - 1.0f));
- /* Compute standard deviation and then store the result to the destination */
+ /* Compute standard deviation and store result to destination */
arm_sqrt_f32((meanOfSquares - squareOfMean), pResult);
#else
- /* Run the below code for Cortex-M0 */
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sumOfSquares. */
- in = *pSrc++;
- sumOfSquares += in * in;
-
- /* C = (A[0] + A[1] + ... + A[blockSize-1]) */
- /* Compute Sum of the input samples
- * and then store the result in a temporary variable, sum. */
- sum += in;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Compute the square of sum */
+ /* Compute square of sum */
squareOfSum = ((sum * sum) / (float32_t) blockSize);
- /* Compute the variance */
+ /* Compute variance */
var = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
- /* Compute standard deviation and then store the result to the destination */
+ /* Compute standard deviation and store result in destination */
arm_sqrt_f32(var, pResult);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
+
}
/**
- * @} end of STD group
+ @} end of STD group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c
index 2f2f52e..ec8ea56 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c
@@ -3,13 +3,13 @@
* Title: arm_std_q15.c
* Description: Standard deviation of an array of Q15 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,146 +29,133 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup STD
- * @{
+ @addtogroup STD
+ @{
*/
/**
- * @brief Standard deviation of the elements of a Q15 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult standard deviation value returned here
- * @return none.
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * The input is represented in 1.15 format.
- * Intermediate multiplication yields a 2.30 format, and this
- * result is added without saturation to a 64-bit accumulator in 34.30 format.
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the
- * full precision of the intermediate multiplication is preserved.
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
- * 15 bits, and then saturated to yield a result in 1.15 format.
+ @brief Standard deviation of the elements of a Q15 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult standard deviation value returned here
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ The input is represented in 1.15 format.
+ Intermediate multiplication yields a 2.30 format, and this
+ result is added without saturation to a 64-bit accumulator in 34.30 format.
+ With 33 guard bits in the accumulator, there is no risk of overflow, and the
+ full precision of the intermediate multiplication is preserved.
+ Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
+ 15 bits, and then saturated to yield a result in 1.15 format.
*/
void arm_std_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult)
+ const q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult)
{
- q31_t sum = 0; /* Accumulator */
- q31_t meanOfSquares, squareOfMean; /* square of mean and mean of square */
- uint32_t blkCnt; /* loop counter */
- q63_t sumOfSquares = 0; /* Accumulator */
-#if defined (ARM_MATH_DSP)
- q31_t in; /* input value */
- q15_t in1; /* input value */
-#else
- q15_t in; /* input value */
+ uint32_t blkCnt; /* Loop counter */
+ q31_t sum = 0; /* Accumulator */
+ q31_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */
+ q63_t sumOfSquares = 0; /* Sum of squares */
+ q15_t in; /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+ q31_t in32; /* Temporary variable to store input value */
#endif
- if (blockSize == 1U)
+ if (blockSize <= 1U)
{
*pResult = 0;
return;
}
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sum. */
- in = *__SIMD32(pSrc)++;
- sum += ((in << 16U) >> 16U);
- sum += (in >> 16U);
- sumOfSquares = __SMLALD(in, in, sumOfSquares);
- in = *__SIMD32(pSrc)++;
- sum += ((in << 16U) >> 16U);
- sum += (in >> 16U);
- sumOfSquares = __SMLALD(in, in, sumOfSquares);
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+ /* C = A[0] + A[1] + ... + A[blockSize-1] */
- /* Decrement the loop counter */
- blkCnt--;
- }
+ /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+ /* Compute sum and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+ in32 = read_q15x2_ia ((q15_t **) &pSrc);
+ sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+ sum += ((in32 << 16U) >> 16U);
+ sum += (in32 >> 16U);
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sum. */
- in1 = *pSrc++;
- sumOfSquares = __SMLALD(in1, in1, sumOfSquares);
- sum += in1;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Compute Mean of squares of the input samples
- * and then store the result in a temporary variable, meanOfSquares. */
- meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1U));
-
- /* Compute square of mean */
- squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
-
- /* mean of the squares minus the square of the mean. */
- /* Compute standard deviation and store the result to the destination */
- arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15U, 16U), pResult);
-
+ in32 = read_q15x2_ia ((q15_t **) &pSrc);
+ sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+ sum += ((in32 << 16U) >> 16U);
+ sum += (in32 >> 16U);
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sumOfSquares. */
in = *pSrc++;
sumOfSquares += (in * in);
-
- /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
- /* Compute sum of all input values and then store the result in a temporary variable, sum. */
sum += in;
- /* Decrement the loop counter */
+ in = *pSrc++;
+ sumOfSquares += (in * in);
+ sum += in;
+
+ in = *pSrc++;
+ sumOfSquares += (in * in);
+ sum += in;
+
+ in = *pSrc++;
+ sumOfSquares += (in * in);
+ sum += in;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* Compute Mean of squares of the input samples
- * and then store the result in a temporary variable, meanOfSquares. */
- meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1U));
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+ /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+ in = *pSrc++;
+ /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+ sumOfSquares += (in * in);
+ /* Compute sum and store result in a temporary variable, sum. */
+ sum += in;
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+ meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1U));
/* Compute square of mean */
- squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
+ squareOfMean = (q31_t) ((q63_t) sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
- /* mean of the squares minus the square of the mean. */
- /* Compute standard deviation and store the result to the destination */
+ /* mean of squares minus the square of mean. */
+ /* Compute standard deviation and store result in destination */
arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15U, 16U), pResult);
-
-#endif /* #if defined (ARM_MATH_DSP) */
}
/**
- * @} end of STD group
+ @} end of STD group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c
index f02cbdd..2e481de 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c
@@ -1,15 +1,15 @@
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_std_q31.c
- * Description: Standard deviation of an array of Q31 type.
+ * Description: Standard deviation of the elements of a Q31 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,141 +29,119 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup STD
- * @{
+ @addtogroup STD
+ @{
*/
/**
- * @brief Standard deviation of the elements of a Q31 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult standard deviation value returned here
- * @return none.
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- *\par
- * The function is implemented using an internal 64-bit accumulator.
- * The input is represented in 1.31 format, which is then downshifted by 8 bits
- * which yields 1.23, and intermediate multiplication yields a 2.46 format.
- * The accumulator maintains full precision of the intermediate multiplication results,
- * but provides only a 16 guard bits.
- * There is no saturation on intermediate additions.
- * If the accumulator overflows it wraps around and distorts the result.
- * In order to avoid overflows completely the input signal must be scaled down by
- * log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
- * After division, internal variables should be Q18.46
- * Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
- *
+ @brief Standard deviation of the elements of a Q31 vector.
+ @param[in] pSrc points to the input vector.
+ @param[in] blockSize number of samples in input vector.
+ @param[out] pResult standard deviation value returned here.
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The input is represented in 1.31 format, which is then downshifted by 8 bits
+ which yields 1.23, and intermediate multiplication yields a 2.46 format.
+ The accumulator maintains full precision of the intermediate multiplication results,
+ but provides only a 16 guard bits.
+ There is no saturation on intermediate additions.
+ If the accumulator overflows it wraps around and distorts the result.
+ In order to avoid overflows completely the input signal must be scaled down by
+ log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
+ After division, internal variables should be Q18.46
+ Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
*/
void arm_std_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult)
+ const q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult)
{
- q63_t sum = 0; /* Accumulator */
- q63_t meanOfSquares, squareOfMean; /* square of mean and mean of square */
- q31_t in; /* input value */
- uint32_t blkCnt; /* loop counter */
- q63_t sumOfSquares = 0; /* Accumulator */
+ uint32_t blkCnt; /* Loop counter */
+ q63_t sum = 0; /* Accumulator */
+ q63_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */
+ q63_t sumOfSquares = 0; /* Sum of squares */
+ q31_t in; /* Temporary variable to store input value */
- if (blockSize == 1U)
+ if (blockSize <= 1U)
{
*pResult = 0;
return;
}
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sum. */
- in = *pSrc++ >> 8U;
- sum += in;
- sumOfSquares += ((q63_t) (in) * (in));
- in = *pSrc++ >> 8U;
- sum += in;
- sumOfSquares += ((q63_t) (in) * (in));
- in = *pSrc++ >> 8U;
- sum += in;
- sumOfSquares += ((q63_t) (in) * (in));
- in = *pSrc++ >> 8U;
- sum += in;
- sumOfSquares += ((q63_t) (in) * (in));
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+ /* C = A[0] + A[1] + ... + A[blockSize-1] */
- /* Decrement the loop counter */
+ in = *pSrc++ >> 8U;
+ /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+ sumOfSquares += ((q63_t) (in) * (in));
+ /* Compute sum and store result in a temporary variable, sum. */
+ sum += in;
+
+ in = *pSrc++ >> 8U;
+ sumOfSquares += ((q63_t) (in) * (in));
+ sum += in;
+
+ in = *pSrc++ >> 8U;
+ sumOfSquares += ((q63_t) (in) * (in));
+ sum += in;
+
+ in = *pSrc++ >> 8U;
+ sumOfSquares += ((q63_t) (in) * (in));
+ sum += in;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sum. */
- in = *pSrc++ >> 8U;
- sum += in;
- sumOfSquares += ((q63_t) (in) * (in));
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Compute Mean of squares of the input samples
- * and then store the result in a temporary variable, meanOfSquares. */
- meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1U);
-
#else
- /* Run the below code for Cortex-M0 */
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sumOfSquares. */
- in = *pSrc++ >> 8U;
- sumOfSquares += ((q63_t) (in) * (in));
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+ /* C = A[0] + A[1] + ... + A[blockSize-1] */
- /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
- /* Compute sum of all input values and then store the result in a temporary variable, sum. */
+ in = *pSrc++ >> 8U;
+ /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+ sumOfSquares += ((q63_t) (in) * (in));
+ /* Compute sum and store result in a temporary variable, sum. */
sum += in;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* Compute Mean of squares of the input samples
- * and then store the result in a temporary variable, meanOfSquares. */
- meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1U);
-
-#endif /* #if defined (ARM_MATH_DSP) */
+ /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+ meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U));
/* Compute square of mean */
- squareOfMean = sum * sum / (q63_t)(blockSize * (blockSize - 1U));
+ squareOfMean = ( sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
- /* Compute standard deviation and then store the result to the destination */
+ /* Compute standard deviation and store result in destination */
arm_sqrt_q31((meanOfSquares - squareOfMean) >> 15U, pResult);
}
/**
- * @} end of STD group
+ @} end of STD group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c
index c0f731d..4c24d37 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c
@@ -3,13 +3,13 @@
* Title: arm_var_f32.c
* Description: Variance of the elements of a floating-point vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,153 +29,144 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @defgroup variance Variance
- *
- * Calculates the variance of the elements in the input vector.
- * The underlying algorithm used is the direct method sometimes referred to as the two-pass method:
- *
- * <pre>
- * Result = sum(element - meanOfElements)^2) / numElement - 1
- *
- * where, meanOfElements = ( pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] ) / blockSize
- *
- * </pre>
- *
- * There are separate functions for floating point, Q31, and Q15 data types.
+ @defgroup variance Variance
+
+ Calculates the variance of the elements in the input vector.
+ The underlying algorithm used is the direct method sometimes referred to as the two-pass method:
+
+ <pre>
+ Result = sum(element - meanOfElements)^2) / numElement - 1
+
+ meanOfElements = ( pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] ) / blockSize
+ </pre>
+
+ There are separate functions for floating point, Q31, and Q15 data types.
*/
/**
- * @addtogroup variance
- * @{
+ @addtogroup variance
+ @{
*/
-
/**
- * @brief Variance of the elements of a floating-point vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult variance value returned here
- * @return none.
+ @brief Variance of the elements of a floating-point vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult variance value returned here
+ @return none
*/
void arm_var_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult)
+ const float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult)
{
- float32_t fMean, fValue;
- uint32_t blkCnt; /* loop counter */
- float32_t * pInput = pSrc;
- float32_t sum = 0.0f;
- float32_t fSum = 0.0f;
- #if defined(ARM_MATH_DSP)
- float32_t in1, in2, in3, in4;
- #endif
+ uint32_t blkCnt; /* Loop counter */
+ float32_t sum = 0.0f; /* Temporary result storage */
+ float32_t fSum = 0.0f;
+ float32_t fMean, fValue;
+ const float32_t * pInput = pSrc;
- if (blockSize <= 1U)
- {
- *pResult = 0;
- return;
- }
+ if (blockSize <= 1U)
+ {
+ *pResult = 0;
+ return;
+ }
- #if defined(ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M7 */
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
- blkCnt = blockSize >> 2U;
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0U)
- {
- /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
- in1 = *pInput++;
- in2 = *pInput++;
- in3 = *pInput++;
- in4 = *pInput++;
+ while (blkCnt > 0U)
+ {
+ /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
- sum += in1;
- sum += in2;
- sum += in3;
- sum += in4;
+ sum += *pInput++;
+ sum += *pInput++;
+ sum += *pInput++;
+ sum += *pInput++;
- /* Decrement the loop counter */
- blkCnt--;
- }
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
+ /* Decrement loop counter */
+ blkCnt--;
+ }
- #else
- /* Run the below code for Cortex-M0 or Cortex-M3 */
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
+#else
- #endif
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
- while (blkCnt > 0U)
- {
- /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
- sum += *pInput++;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
- /* Decrement the loop counter */
- blkCnt--;
- }
+ while (blkCnt > 0U)
+ {
+ /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
- /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
- fMean = sum / (float32_t) blockSize;
+ sum += *pInput++;
- pInput = pSrc;
+ /* Decrement loop counter */
+ blkCnt--;
+ }
- #if defined(ARM_MATH_DSP)
+ /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
+ fMean = sum / (float32_t) blockSize;
- /*loop Unrolling */
- blkCnt = blockSize >> 2U;
+ pInput = pSrc;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0U)
- {
- fValue = *pInput++ - fMean;
- fSum += fValue * fValue;
- fValue = *pInput++ - fMean;
- fSum += fValue * fValue;
- fValue = *pInput++ - fMean;
- fSum += fValue * fValue;
- fValue = *pInput++ - fMean;
- fSum += fValue * fValue;
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Decrement the loop counter */
- blkCnt--;
- }
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
- blkCnt = blockSize % 0x4U;
- #else
- /* Run the below code for Cortex-M0 or Cortex-M3 */
+ while (blkCnt > 0U)
+ {
+ fValue = *pInput++ - fMean;
+ fSum += fValue * fValue;
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
- #endif
+ fValue = *pInput++ - fMean;
+ fSum += fValue * fValue;
- while (blkCnt > 0U)
- {
- fValue = *pInput++ - fMean;
- fSum += fValue * fValue;
+ fValue = *pInput++ - fMean;
+ fSum += fValue * fValue;
- /* Decrement the loop counter */
- blkCnt--;
- }
+ fValue = *pInput++ - fMean;
+ fSum += fValue * fValue;
- /* Variance */
- *pResult = fSum / (float32_t)(blockSize - 1.0f);
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ fValue = *pInput++ - fMean;
+ fSum += fValue * fValue;
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Variance */
+ *pResult = fSum / (float32_t)(blockSize - 1.0f);
}
/**
- * @} end of variance group
+ @} end of variance group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c
index 5ba61f7..1e211cd 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c
@@ -3,13 +3,13 @@
* Title: arm_var_q15.c
* Description: Variance of an array of Q15 type
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,144 +29,136 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup variance
- * @{
+ @addtogroup variance
+ @{
*/
/**
- * @brief Variance of the elements of a Q15 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult variance value returned here
- * @return none.
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * The input is represented in 1.15 format.
- * Intermediate multiplication yields a 2.30 format, and this
- * result is added without saturation to a 64-bit accumulator in 34.30 format.
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the
- * full precision of the intermediate multiplication is preserved.
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
- * 15 bits, and then saturated to yield a result in 1.15 format.
+ @brief Variance of the elements of a Q15 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult variance value returned here
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using a 64-bit internal accumulator.
+ The input is represented in 1.15 format.
+ Intermediate multiplication yields a 2.30 format, and this
+ result is added without saturation to a 64-bit accumulator in 34.30 format.
+ With 33 guard bits in the accumulator, there is no risk of overflow, and the
+ full precision of the intermediate multiplication is preserved.
+ Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
+ 15 bits, and then saturated to yield a result in 1.15 format.
*/
void arm_var_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult)
+ const q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult)
{
- q31_t sum = 0; /* Accumulator */
- q31_t meanOfSquares, squareOfMean; /* square of mean and mean of square */
- uint32_t blkCnt; /* loop counter */
- q63_t sumOfSquares = 0; /* Accumulator */
-#if defined (ARM_MATH_DSP)
- q31_t in; /* input value */
- q15_t in1; /* input value */
-#else
- q15_t in; /* input value */
+ uint32_t blkCnt; /* Loop counter */
+ q31_t sum = 0; /* Accumulator */
+ q31_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */
+ q63_t sumOfSquares = 0; /* Sum of squares */
+ q15_t in; /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+ q31_t in32; /* Temporary variable to store input value */
#endif
- if (blockSize == 1U)
+ if (blockSize <= 1U)
{
*pResult = 0;
return;
}
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sum. */
- in = *__SIMD32(pSrc)++;
- sum += ((in << 16U) >> 16U);
- sum += (in >> 16U);
- sumOfSquares = __SMLALD(in, in, sumOfSquares);
- in = *__SIMD32(pSrc)++;
- sum += ((in << 16U) >> 16U);
- sum += (in >> 16U);
- sumOfSquares = __SMLALD(in, in, sumOfSquares);
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+ /* C = A[0] + A[1] + ... + A[blockSize-1] */
- /* Decrement the loop counter */
- blkCnt--;
- }
+ /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+ /* Compute sum and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+ in32 = read_q15x2_ia ((q15_t **) &pSrc);
+ sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+ sum += ((in32 << 16U) >> 16U);
+ sum += (in32 >> 16U);
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
- while (blkCnt > 0U)
- {
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sum. */
- in1 = *pSrc++;
- sumOfSquares = __SMLALD(in1, in1, sumOfSquares);
- sum += in1;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Compute Mean of squares of the input samples
- * and then store the result in a temporary variable, meanOfSquares. */
- meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1U));
-
- /* Compute square of mean */
- squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
-
- /* mean of the squares minus the square of the mean. */
- *pResult = (meanOfSquares - squareOfMean) >> 15U;
-
+ in32 = read_q15x2_ia ((q15_t **) &pSrc);
+ sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+ sum += ((in32 << 16U) >> 16U);
+ sum += (in32 >> 16U);
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sumOfSquares. */
in = *pSrc++;
sumOfSquares += (in * in);
-
- /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
- /* Compute sum of all input values and then store the result in a temporary variable, sum. */
sum += in;
- /* Decrement the loop counter */
+ in = *pSrc++;
+ sumOfSquares += (in * in);
+ sum += in;
+
+ in = *pSrc++;
+ sumOfSquares += (in * in);
+ sum += in;
+
+ in = *pSrc++;
+ sumOfSquares += (in * in);
+ sum += in;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* Compute Mean of squares of the input samples
- * and then store the result in a temporary variable, meanOfSquares. */
- meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1U));
+ /* Loop unrolling: Compute remaining outputs */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+ /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+ in = *pSrc++;
+ /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+#if defined (ARM_MATH_DSP)
+ sumOfSquares = __SMLALD(in, in, sumOfSquares);
+#else
+ sumOfSquares += (in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+ /* Compute sum and store result in a temporary variable, sum. */
+ sum += in;
+
+ /* Decrement loop counter */
+ blkCnt--;
+ }
+
+ /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+ meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1U));
/* Compute square of mean */
- squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
+ squareOfMean = (q31_t) ((q63_t) sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
- /* mean of the squares minus the square of the mean. */
- *pResult = (meanOfSquares - squareOfMean) >> 15;
-
-#endif /* #if defined (ARM_MATH_DSP) */
+ /* mean of squares minus the square of mean. */
+ *pResult = (meanOfSquares - squareOfMean) >> 15U;
}
/**
- * @} end of variance group
+ @} end of variance group
*/
diff --git a/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c b/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c
index 526c6cd..3c7ec58 100644
--- a/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c
+++ b/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c
@@ -3,13 +3,13 @@
* Title: arm_var_q31.c
* Description: Variance of an array of Q31 type
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,141 +29,119 @@
#include "arm_math.h"
/**
- * @ingroup groupStats
+ @ingroup groupStats
*/
/**
- * @addtogroup variance
- * @{
+ @addtogroup variance
+ @{
*/
/**
- * @brief Variance of the elements of a Q31 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult variance value returned here
- * @return none.
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- *\par
- * The function is implemented using an internal 64-bit accumulator.
- * The input is represented in 1.31 format, which is then downshifted by 8 bits
- * which yields 1.23, and intermediate multiplication yields a 2.46 format.
- * The accumulator maintains full precision of the intermediate multiplication results,
- * but provides only a 16 guard bits.
- * There is no saturation on intermediate additions.
- * If the accumulator overflows it wraps around and distorts the result.
- * In order to avoid overflows completely the input signal must be scaled down by
- * log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
- * After division, internal variables should be Q18.46
- * Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
- *
+ @brief Variance of the elements of a Q31 vector.
+ @param[in] pSrc points to the input vector
+ @param[in] blockSize number of samples in input vector
+ @param[out] pResult variance value returned here
+ @return none
+
+ @par Scaling and Overflow Behavior
+ The function is implemented using an internal 64-bit accumulator.
+ The input is represented in 1.31 format, which is then downshifted by 8 bits
+ which yields 1.23, and intermediate multiplication yields a 2.46 format.
+ The accumulator maintains full precision of the intermediate multiplication results,
+ but provides only a 16 guard bits.
+ There is no saturation on intermediate additions.
+ If the accumulator overflows it wraps around and distorts the result.
+ In order to avoid overflows completely the input signal must be scaled down by
+ log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
+ After division, internal variables should be Q18.46
+ Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
*/
void arm_var_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult)
+ const q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult)
{
- q63_t sum = 0; /* Accumulator */
- q63_t meanOfSquares, squareOfMean; /* square of mean and mean of square */
- q31_t in; /* input value */
- uint32_t blkCnt; /* loop counter */
- q63_t sumOfSquares = 0; /* Accumulator */
+ uint32_t blkCnt; /* Loop counter */
+ q63_t sum = 0; /* Temporary result storage */
+ q63_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */
+ q63_t sumOfSquares = 0; /* Sum of squares */
+ q31_t in; /* Temporary variable to store input value */
- if (blockSize == 1U)
+ if (blockSize <= 1U)
{
*pResult = 0;
return;
}
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sum. */
- in = *pSrc++ >> 8U;
- sum += in;
- sumOfSquares += ((q63_t) (in) * (in));
- in = *pSrc++ >> 8U;
- sum += in;
- sumOfSquares += ((q63_t) (in) * (in));
- in = *pSrc++ >> 8U;
- sum += in;
- sumOfSquares += ((q63_t) (in) * (in));
- in = *pSrc++ >> 8U;
- sum += in;
- sumOfSquares += ((q63_t) (in) * (in));
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+ /* C = A[0] + A[1] + ... + A[blockSize-1] */
- /* Decrement the loop counter */
+ in = *pSrc++ >> 8U;
+ /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+ sumOfSquares += ((q63_t) (in) * (in));
+ /* Compute sum and store result in a temporary variable, sum. */
+ sum += in;
+
+ in = *pSrc++ >> 8U;
+ sumOfSquares += ((q63_t) (in) * (in));
+ sum += in;
+
+ in = *pSrc++ >> 8U;
+ sumOfSquares += ((q63_t) (in) * (in));
+ sum += in;
+
+ in = *pSrc++ >> 8U;
+ sumOfSquares += ((q63_t) (in) * (in));
+ sum += in;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
- while (blkCnt > 0U)
- {
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sum. */
- in = *pSrc++ >> 8U;
- sum += in;
- sumOfSquares += ((q63_t) (in) * (in));
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Compute Mean of squares of the input samples
- * and then store the result in a temporary variable, meanOfSquares. */
- meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1U);
-
#else
- /* Run the below code for Cortex-M0 */
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
- /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
- /* Compute Sum of squares of the input samples
- * and then store the result in a temporary variable, sumOfSquares. */
- in = *pSrc++ >> 8U;
- sumOfSquares += ((q63_t) (in) * (in));
+ /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+ /* C = A[0] + A[1] + ... + A[blockSize-1] */
- /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
- /* Compute sum of all input values and then store the result in a temporary variable, sum. */
+ in = *pSrc++ >> 8U;
+ /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+ sumOfSquares += ((q63_t) (in) * (in));
+ /* Compute sum and store result in a temporary variable, sum. */
sum += in;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* Compute Mean of squares of the input samples
- * and then store the result in a temporary variable, meanOfSquares. */
- meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1U);
-
-#endif /* #if defined (ARM_MATH_DSP) */
+ /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+ meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U));
/* Compute square of mean */
- squareOfMean = sum * sum / (q63_t)(blockSize * (blockSize - 1U));
+ squareOfMean = ( sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
- /* Compute standard deviation and then store the result to the destination */
+ /* Compute variance and store result in destination */
*pResult = (meanOfSquares - squareOfMean) >> 15U;
}
/**
- * @} end of variance group
+ @} end of variance group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c b/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c
new file mode 100644
index 0000000..6dc68bf
--- /dev/null
+++ b/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c
@@ -0,0 +1,21 @@
+
+#include "arm_copy_f32.c"
+#include "arm_copy_q15.c"
+#include "arm_copy_q31.c"
+#include "arm_copy_q7.c"
+#include "arm_fill_f32.c"
+#include "arm_fill_q15.c"
+#include "arm_fill_q31.c"
+#include "arm_fill_q7.c"
+#include "arm_float_to_q15.c"
+#include "arm_float_to_q31.c"
+#include "arm_float_to_q7.c"
+#include "arm_q15_to_float.c"
+#include "arm_q15_to_q31.c"
+#include "arm_q15_to_q7.c"
+#include "arm_q31_to_float.c"
+#include "arm_q31_to_q15.c"
+#include "arm_q31_to_q7.c"
+#include "arm_q7_to_float.c"
+#include "arm_q7_to_q15.c"
+#include "arm_q7_to_q31.c"
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c b/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c
index 1e2b5cf..83d3c63 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c
@@ -3,13 +3,13 @@
* Title: arm_copy_f32.c
* Description: Copies the elements of a floating-point vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,95 +29,82 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @defgroup copy Vector Copy
- *
- * Copies sample by sample from source vector to destination vector.
- *
- * <pre>
- * pDst[n] = pSrc[n]; 0 <= n < blockSize.
- * </pre>
- *
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.
+ @defgroup copy Vector Copy
+
+ Copies sample by sample from source vector to destination vector.
+
+ <pre>
+ pDst[n] = pSrc[n]; 0 <= n < blockSize.
+ </pre>
+
+ There are separate functions for floating point, Q31, Q15, and Q7 data types.
*/
/**
- * @addtogroup copy
- * @{
+ @addtogroup copy
+ @{
*/
/**
- * @brief Copies the elements of a floating-point vector.
- * @param[in] *pSrc points to input vector
- * @param[out] *pDst points to output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
+ @brief Copies the elements of a floating-point vector.
+ @param[in] pSrc points to input vector
+ @param[out] pDst points to output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
*/
-
void arm_copy_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ const float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t in1, in2, in3, in4;
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A */
- /* Copy and then store the results in the destination buffer */
- in1 = *pSrc++;
- in2 = *pSrc++;
- in3 = *pSrc++;
- in4 = *pSrc++;
- *pDst++ = in1;
- *pDst++ = in2;
- *pDst++ = in3;
- *pDst++ = in4;
+ /* Copy and store result in destination buffer */
+ *pDst++ = *pSrc++;
+ *pDst++ = *pSrc++;
+ *pDst++ = *pSrc++;
+ *pDst++ = *pSrc++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = A */
- /* Copy and then store the results in the destination buffer */
+
+ /* Copy and store result in destination buffer */
*pDst++ = *pSrc++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of BasicCopy group
+ @} end of BasicCopy group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c b/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c
index 0d2fffb..59ae7c3 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c
@@ -3,13 +3,13 @@
* Title: arm_copy_q15.c
* Description: Copies the elements of a Q15 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,74 +29,68 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @addtogroup copy
- * @{
+ @addtogroup copy
+ @{
*/
+
/**
- * @brief Copies the elements of a Q15 vector.
- * @param[in] *pSrc points to input vector
- * @param[out] *pDst points to output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
+ @brief Copies the elements of a Q15 vector.
+ @param[in] pSrc points to input vector
+ @param[out] pDst points to output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
*/
void arm_copy_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A */
- /* Read two inputs */
- *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
- *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
- /* Decrement the loop counter */
+ /* read 2 times 2 samples at a time */
+ write_q15x2_ia (&pDst, read_q15x2_ia ((q15_t **) &pSrc));
+ write_q15x2_ia (&pDst, read_q15x2_ia ((q15_t **) &pSrc));
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
-
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = A */
- /* Copy and then store the value in the destination buffer */
+
+ /* Copy and store result in destination buffer */
*pDst++ = *pSrc++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of BasicCopy group
+ @} end of BasicCopy group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c b/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c
index 5bf8934..871e5dc 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c
@@ -3,13 +3,13 @@
* Title: arm_copy_q31.c
* Description: Copies the elements of a Q31 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,83 +29,70 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @addtogroup copy
- * @{
+ @addtogroup copy
+ @{
*/
/**
- * @brief Copies the elements of a Q31 vector.
- * @param[in] *pSrc points to input vector
- * @param[out] *pDst points to output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
+ @brief Copies the elements of a Q31 vector.
+ @param[in] pSrc points to input vector
+ @param[out] pDst points to output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
*/
void arm_copy_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t in1, in2, in3, in4;
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A */
- /* Copy and then store the values in the destination buffer */
- in1 = *pSrc++;
- in2 = *pSrc++;
- in3 = *pSrc++;
- in4 = *pSrc++;
- *pDst++ = in1;
- *pDst++ = in2;
- *pDst++ = in3;
- *pDst++ = in4;
+ /* Copy and store result in destination buffer */
+ *pDst++ = *pSrc++;
+ *pDst++ = *pSrc++;
+ *pDst++ = *pSrc++;
+ *pDst++ = *pSrc++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = A */
- /* Copy and then store the value in the destination buffer */
+
+ /* Copy and store result in destination buffer */
*pDst++ = *pSrc++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of BasicCopy group
+ @} end of BasicCopy group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c b/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c
index 5c737cd..a375d2f 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c
@@ -3,13 +3,13 @@
* Title: arm_copy_q7.c
* Description: Copies the elements of a Q7 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,75 +29,67 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @addtogroup copy
- * @{
+ @addtogroup copy
+ @{
*/
/**
- * @brief Copies the elements of a Q7 vector.
- * @param[in] *pSrc points to input vector
- * @param[out] *pDst points to output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
+ @brief Copies the elements of a Q7 vector.
+ @param[in] pSrc points to input vector
+ @param[out] pDst points to output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
*/
void arm_copy_q7(
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize)
+ const q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = A */
- /* Copy and then store the results in the destination buffer */
- /* 4 samples are copied and stored at a time using SIMD */
- *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
- /* Decrement the loop counter */
+ /* read 4 samples at a time */
+ write_q7x4_ia (&pDst, read_q7x4_ia ((q7_t **) &pSrc));
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = A */
- /* Copy and then store the results in the destination buffer */
+
+ /* Copy and store result in destination buffer */
*pDst++ = *pSrc++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of BasicCopy group
+ @} end of BasicCopy group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c b/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c
index be749c8..4267a6c 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c
@@ -3,13 +3,13 @@
* Title: arm_fill_f32.c
* Description: Fills a constant value into a floating-point vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,94 +29,82 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @defgroup Fill Vector Fill
- *
- * Fills the destination vector with a constant value.
- *
- * <pre>
- * pDst[n] = value; 0 <= n < blockSize.
- * </pre>
- *
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.
+ @defgroup Fill Vector Fill
+
+ Fills the destination vector with a constant value.
+
+ <pre>
+ pDst[n] = value; 0 <= n < blockSize.
+ </pre>
+
+ There are separate functions for floating point, Q31, Q15, and Q7 data types.
*/
/**
- * @addtogroup Fill
- * @{
+ @addtogroup Fill
+ @{
*/
/**
- * @brief Fills a constant value into a floating-point vector.
- * @param[in] value input value to be filled
- * @param[out] *pDst points to output vector
- * @param[in] blockSize length of the output vector
- * @return none.
- *
+ @brief Fills a constant value into a floating-point vector.
+ @param[in] value input value to be filled
+ @param[out] pDst points to output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
*/
-
void arm_fill_f32(
float32_t value,
float32_t * pDst,
uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t in1 = value;
- float32_t in2 = value;
- float32_t in3 = value;
- float32_t in4 = value;
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = value */
- /* Fill the value in the destination buffer */
- *pDst++ = in1;
- *pDst++ = in2;
- *pDst++ = in3;
- *pDst++ = in4;
- /* Decrement the loop counter */
+ /* Fill value in destination buffer */
+ *pDst++ = value;
+ *pDst++ = value;
+ *pDst++ = value;
+ *pDst++ = value;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = value */
- /* Fill the value in the destination buffer */
+
+ /* Fill value in destination buffer */
*pDst++ = value;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of Fill group
+ @} end of Fill group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c b/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c
index 27eb42c..e4d5a0b 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c
@@ -3,13 +3,13 @@
* Title: arm_fill_q15.c
* Description: Fills a constant value into a Q15 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,21 +29,20 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @addtogroup Fill
- * @{
+ @addtogroup Fill
+ @{
*/
/**
- * @brief Fills a constant value into a Q15 vector.
- * @param[in] value input value to be filled
- * @param[out] *pDst points to output vector
- * @param[in] blockSize length of the output vector
- * @return none.
- *
+ @brief Fills a constant value into a Q15 vector.
+ @param[in] value input value to be filled
+ @param[out] pDst points to output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
*/
void arm_fill_q15(
@@ -51,58 +50,51 @@
q15_t * pDst,
uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
+#if defined (ARM_MATH_LOOPUNROLL)
q31_t packedValue; /* value packed to 32 bits */
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2U;
-
/* Packing two 16 bit values to 32 bit value in order to use SIMD */
packedValue = __PKHBT(value, value, 16U);
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
+
while (blkCnt > 0U)
{
/* C = value */
- /* Fill the value in the destination buffer */
- *__SIMD32(pDst)++ = packedValue;
- *__SIMD32(pDst)++ = packedValue;
- /* Decrement the loop counter */
+ /* fill 2 times 2 samples at a time */
+ write_q15x2_ia (&pDst, packedValue);
+ write_q15x2_ia (&pDst, packedValue);
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = value */
- /* Fill the value in the destination buffer */
+
+ /* Fill value in destination buffer */
*pDst++ = value;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of Fill group
+ @} end of Fill group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c b/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c
index 397a7b5..7e18b1d 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c
@@ -3,13 +3,13 @@
* Title: arm_fill_q31.c
* Description: Fills a constant value into a Q31 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,21 +29,20 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @addtogroup Fill
- * @{
+ @addtogroup Fill
+ @{
*/
/**
- * @brief Fills a constant value into a Q31 vector.
- * @param[in] value input value to be filled
- * @param[out] *pDst points to output vector
- * @param[in] blockSize length of the output vector
- * @return none.
- *
+ @brief Fills a constant value into a Q31 vector.
+ @param[in] value input value to be filled
+ @param[out] pDst points to output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
*/
void arm_fill_q31(
@@ -51,59 +50,49 @@
q31_t * pDst,
uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t in1 = value;
- q31_t in2 = value;
- q31_t in3 = value;
- q31_t in4 = value;
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = value */
- /* Fill the value in the destination buffer */
- *pDst++ = in1;
- *pDst++ = in2;
- *pDst++ = in3;
- *pDst++ = in4;
- /* Decrement the loop counter */
+ /* Fill value in destination buffer */
+ *pDst++ = value;
+ *pDst++ = value;
+ *pDst++ = value;
+ *pDst++ = value;
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = value */
- /* Fill the value in the destination buffer */
+
+ /* Fill value in destination buffer */
*pDst++ = value;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of Fill group
+ @} end of Fill group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c b/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c
index dffdf97..40a49b5 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c
@@ -3,13 +3,13 @@
* Title: arm_fill_q7.c
* Description: Fills a constant value into a Q7 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,21 +29,20 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @addtogroup Fill
- * @{
+ @addtogroup Fill
+ @{
*/
/**
- * @brief Fills a constant value into a Q7 vector.
- * @param[in] value input value to be filled
- * @param[out] *pDst points to output vector
- * @param[in] blockSize length of the output vector
- * @return none.
- *
+ @brief Fills a constant value into a Q7 vector.
+ @param[in] value input value to be filled
+ @param[out] pDst points to output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
*/
void arm_fill_q7(
@@ -51,56 +50,50 @@
q7_t * pDst,
uint32_t blockSize)
{
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
+#if defined (ARM_MATH_LOOPUNROLL)
q31_t packedValue; /* value packed to 32 bits */
- /*loop Unrolling */
- blkCnt = blockSize >> 2U;
-
/* Packing four 8 bit values to 32 bit value in order to use SIMD */
packedValue = __PACKq7(value, value, value, value);
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
+ /* Loop unrolling: Compute 4 outputs at a time */
+ blkCnt = blockSize >> 2U;
+
while (blkCnt > 0U)
{
/* C = value */
- /* Fill the value in the destination buffer */
- *__SIMD32(pDst)++ = packedValue;
- /* Decrement the loop counter */
+ /* fill 4 samples at a time */
+ write_q7x4_ia (&pDst, packedValue);
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = value */
- /* Fill the value in the destination buffer */
+
+ /* Fill value in destination buffer */
*pDst++ = value;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of Fill group
+ @} end of Fill group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c b/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c
index 0aa20f1..1d27d35 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c
@@ -3,13 +3,13 @@
* Title: arm_float_to_q15.c
* Description: Converts the elements of the floating-point vector to Q15 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,164 +29,122 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @addtogroup float_to_x
- * @{
+ @addtogroup float_to_x
+ @{
*/
/**
- * @brief Converts the elements of the floating-point vector to Q15 vector.
- * @param[in] *pSrc points to the floating-point input vector
- * @param[out] *pDst points to the Q15 output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- * \par
- * The equation used for the conversion process is:
- * <pre>
- * pDst[n] = (q15_t)(pSrc[n] * 32768); 0 <= n < blockSize.
- * </pre>
- * \par Scaling and Overflow Behavior:
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
- * \note
- * In order to apply rounding, the library should be rebuilt with the ROUNDING macro
- * defined in the preprocessor section of project options.
- *
- */
+ @brief Converts the elements of the floating-point vector to Q15 vector.
+ @param[in] pSrc points to the floating-point input vector
+ @param[out] pDst points to the Q15 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+ @par Details
+ The equation used for the conversion process is:
+ <pre>
+ pDst[n] = (q15_t)(pSrc[n] * 32768); 0 <= n < blockSize.
+ </pre>
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+
+ @note
+ In order to apply rounding, the library should be rebuilt with the ROUNDING macro
+ defined in the preprocessor section of project options.
+ */
void arm_float_to_q15(
- float32_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const float32_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- float32_t *pIn = pSrc; /* Src pointer */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ const float32_t *pIn = pSrc; /* Source pointer */
#ifdef ARM_MATH_ROUNDING
+ float32_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
- float32_t in;
+#if defined (ARM_MATH_LOOPUNROLL)
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
-
-#ifdef ARM_MATH_ROUNDING
/* C = A * 32768 */
- /* convert from float to q15 and then store the results in the destination buffer */
- in = *pIn++;
- in = (in * 32768.0f);
+
+ /* convert from float to Q15 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+ in = (*pIn++ * 32768.0f);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
- in = *pIn++;
- in = (in * 32768.0f);
+ in = (*pIn++ * 32768.0f);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
- in = *pIn++;
- in = (in * 32768.0f);
+ in = (*pIn++ * 32768.0f);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
- in = *pIn++;
- in = (in * 32768.0f);
+ in = (*pIn++ * 32768.0f);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
#else
- /* C = A * 32768 */
- /* convert from float to q15 and then store the results in the destination buffer */
*pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
*pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
*pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
*pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-#endif /* #ifdef ARM_MATH_ROUNDING */
+#endif /* #ifdef ARM_MATH_ROUNDING */
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
-
-#ifdef ARM_MATH_ROUNDING
/* C = A * 32768 */
- /* convert from float to q15 and then store the results in the destination buffer */
- in = *pIn++;
- in = (in * 32768.0f);
+
+ /* convert from float to Q15 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+ in = (*pIn++ * 32768.0f);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
#else
- /* C = A * 32768 */
- /* convert from float to q15 and then store the results in the destination buffer */
*pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-#endif /* #ifdef ARM_MATH_ROUNDING */
+#endif /* #ifdef ARM_MATH_ROUNDING */
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
-
-#ifdef ARM_MATH_ROUNDING
- /* C = A * 32768 */
- /* convert from float to q15 and then store the results in the destination buffer */
- in = *pIn++;
- in = (in * 32768.0f);
- in += in > 0 ? 0.5f : -0.5f;
- *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-#else
-
- /* C = A * 32768 */
- /* convert from float to q15 and then store the results in the destination buffer */
- *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of float_to_x group
+ @} end of float_to_x group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q31.c b/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q31.c
index d17cc3a..6614834 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q31.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q31.c
@@ -3,13 +3,13 @@
* Title: arm_float_to_q31.c
* Description: Converts the elements of the floating-point vector to Q31 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,7 +29,7 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
@@ -37,163 +37,118 @@
*/
/**
- * @addtogroup float_to_x
- * @{
+ @addtogroup float_to_x
+ @{
*/
/**
- * @brief Converts the elements of the floating-point vector to Q31 vector.
- * @param[in] *pSrc points to the floating-point input vector
- * @param[out] *pDst points to the Q31 output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- *\par Description:
- * \par
- * The equation used for the conversion process is:
- *
- * <pre>
- * pDst[n] = (q31_t)(pSrc[n] * 2147483648); 0 <= n < blockSize.
- * </pre>
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
- *
- * \note In order to apply rounding, the library should be rebuilt with the ROUNDING macro
- * defined in the preprocessor section of project options.
+ @brief Converts the elements of the floating-point vector to Q31 vector.
+ @param[in] pSrc points to the floating-point input vector
+ @param[out] pDst points to the Q31 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Details
+ The equation used for the conversion process is:
+ <pre>
+ pDst[n] = (q31_t)(pSrc[n] * 2147483648); 0 <= n < blockSize.
+ </pre>
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
+
+ @note
+ In order to apply rounding, the library should be rebuilt with the ROUNDING macro
+ defined in the preprocessor section of project options.
*/
-
void arm_float_to_q31(
- float32_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ const float32_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- float32_t *pIn = pSrc; /* Src pointer */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ const float32_t *pIn = pSrc; /* Source pointer */
#ifdef ARM_MATH_ROUNDING
+ float32_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
- float32_t in;
+#if defined (ARM_MATH_LOOPUNROLL)
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
+ /* C = A * 2147483648 */
+ /* convert from float to Q31 and store result in destination buffer */
#ifdef ARM_MATH_ROUNDING
- /* C = A * 32768 */
- /* convert from float to Q31 and then store the results in the destination buffer */
- in = *pIn++;
- in = (in * 2147483648.0f);
+ in = (*pIn++ * 2147483648.0f);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = clip_q63_to_q31((q63_t) (in));
- in = *pIn++;
- in = (in * 2147483648.0f);
+ in = (*pIn++ * 2147483648.0f);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = clip_q63_to_q31((q63_t) (in));
- in = *pIn++;
- in = (in * 2147483648.0f);
+ in = (*pIn++ * 2147483648.0f);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = clip_q63_to_q31((q63_t) (in));
- in = *pIn++;
- in = (in * 2147483648.0f);
+ in = (*pIn++ * 2147483648.0f);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = clip_q63_to_q31((q63_t) (in));
#else
- /* C = A * 2147483648 */
- /* convert from float to Q31 and then store the results in the destination buffer */
*pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
*pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
*pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
*pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-#endif /* #ifdef ARM_MATH_ROUNDING */
+#endif /* #ifdef ARM_MATH_ROUNDING */
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
+ /* C = A * 2147483648 */
+ /* convert from float to Q31 and store result in destination buffer */
#ifdef ARM_MATH_ROUNDING
- /* C = A * 2147483648 */
- /* convert from float to Q31 and then store the results in the destination buffer */
- in = *pIn++;
- in = (in * 2147483648.0f);
+ in = (*pIn++ * 2147483648.0f);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = clip_q63_to_q31((q63_t) (in));
#else
- /* C = A * 2147483648 */
- /* convert from float to Q31 and then store the results in the destination buffer */
*pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-#endif /* #ifdef ARM_MATH_ROUNDING */
+#endif /* #ifdef ARM_MATH_ROUNDING */
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
-
-#ifdef ARM_MATH_ROUNDING
-
- /* C = A * 2147483648 */
- /* convert from float to Q31 and then store the results in the destination buffer */
- in = *pIn++;
- in = (in * 2147483648.0f);
- in += in > 0 ? 0.5f : -0.5f;
- *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-#else
-
- /* C = A * 2147483648 */
- /* convert from float to Q31 and then store the results in the destination buffer */
- *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of float_to_x group
+ @} end of float_to_x group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q7.c b/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q7.c
index 6629a69..36bc71e 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q7.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q7.c
@@ -3,13 +3,13 @@
* Title: arm_float_to_q7.c
* Description: Converts the elements of the floating-point vector to Q7 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,163 +29,121 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @addtogroup float_to_x
- * @{
+ @addtogroup float_to_x
+ @{
*/
/**
- * @brief Converts the elements of the floating-point vector to Q7 vector.
- * @param[in] *pSrc points to the floating-point input vector
- * @param[out] *pDst points to the Q7 output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- *\par Description:
- * \par
- * The equation used for the conversion process is:
- * <pre>
- * pDst[n] = (q7_t)(pSrc[n] * 128); 0 <= n < blockSize.
- * </pre>
- * \par Scaling and Overflow Behavior:
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
- * \note
- * In order to apply rounding, the library should be rebuilt with the ROUNDING macro
- * defined in the preprocessor section of project options.
- */
+ @brief Converts the elements of the floating-point vector to Q7 vector.
+ @param[in] pSrc points to the floating-point input vector
+ @param[out] pDst points to the Q7 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+ @par Details
+ The equation used for the conversion process is:
+ <pre>
+ pDst[n] = (q7_t)(pSrc[n] * 128); 0 <= n < blockSize.
+ </pre>
+
+ @par Scaling and Overflow Behavior
+ The function uses saturating arithmetic.
+ Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
+ @note
+ In order to apply rounding, the library should be rebuilt with the ROUNDING macro
+ defined in the preprocessor section of project options.
+ */
void arm_float_to_q7(
- float32_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize)
+ const float32_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize)
{
- float32_t *pIn = pSrc; /* Src pointer */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ const float32_t *pIn = pSrc; /* Source pointer */
#ifdef ARM_MATH_ROUNDING
+ float32_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
- float32_t in;
+#if defined (ARM_MATH_LOOPUNROLL)
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
-
-#ifdef ARM_MATH_ROUNDING
/* C = A * 128 */
- /* convert from float to q7 and then store the results in the destination buffer */
- in = *pIn++;
- in = (in * 128);
+
+ /* Convert from float to q7 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+ in = (*pIn++ * 128);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
- in = *pIn++;
- in = (in * 128);
+ in = (*pIn++ * 128);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
- in = *pIn++;
- in = (in * 128);
+ in = (*pIn++ * 128);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
- in = *pIn++;
- in = (in * 128);
+ in = (*pIn++ * 128);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
#else
- /* C = A * 128 */
- /* convert from float to q7 and then store the results in the destination buffer */
*pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
*pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
*pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
*pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-#endif /* #ifdef ARM_MATH_ROUNDING */
+#endif /* #ifdef ARM_MATH_ROUNDING */
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
+#else
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
while (blkCnt > 0U)
{
-
-#ifdef ARM_MATH_ROUNDING
/* C = A * 128 */
- /* convert from float to q7 and then store the results in the destination buffer */
- in = *pIn++;
- in = (in * 128);
+
+ /* Convert from float to q7 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+ in = (*pIn++ * 128);
in += in > 0.0f ? 0.5f : -0.5f;
*pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
#else
- /* C = A * 128 */
- /* convert from float to q7 and then store the results in the destination buffer */
- *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
-
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
-
- while (blkCnt > 0U)
- {
-#ifdef ARM_MATH_ROUNDING
- /* C = A * 128 */
- /* convert from float to q7 and then store the results in the destination buffer */
- in = *pIn++;
- in = (in * 128.0f);
- in += in > 0 ? 0.5f : -0.5f;
- *pDst++ = (q7_t) (__SSAT((q31_t) (in), 8));
-
-#else
-
- /* C = A * 128 */
- /* convert from float to q7 and then store the results in the destination buffer */
*pDst++ = (q7_t) __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-#endif /* #ifdef ARM_MATH_ROUNDING */
+#endif /* #ifdef ARM_MATH_ROUNDING */
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
-#endif /* #if defined (ARM_MATH_DSP) */
-
}
/**
- * @} end of float_to_x group
+ @} end of float_to_x group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_float.c b/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_float.c
index 48ef947..41a28dc 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_float.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_float.c
@@ -3,13 +3,13 @@
* Title: arm_q15_to_float.c
* Description: Converts the elements of the Q15 vector to floating-point vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,7 +29,7 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
@@ -37,86 +37,74 @@
*/
/**
- * @addtogroup q15_to_x
- * @{
+ @addtogroup q15_to_x
+ @{
*/
-
-
-
/**
- * @brief Converts the elements of the Q15 vector to floating-point vector.
- * @param[in] *pSrc points to the Q15 input vector
- * @param[out] *pDst points to the floating-point output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * pDst[n] = (float32_t) pSrc[n] / 32768; 0 <= n < blockSize.
- * </pre>
- *
+ @brief Converts the elements of the Q15 vector to floating-point vector.
+ @param[in] pSrc points to the Q15 input vector
+ @param[out] pDst points to the floating-point output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Details
+ The equation used for the conversion process is:
+ <pre>
+ pDst[n] = (float32_t) pSrc[n] / 32768; 0 <= n < blockSize.
+ </pre>
*/
-
void arm_q15_to_float(
- q15_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pIn = pSrc; /* Src pointer */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ const q15_t *pIn = pSrc; /* Source pointer */
+#if defined (ARM_MATH_LOOPUNROLL)
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = (float32_t) A / 32768 */
- /* convert from q15 to float and then store the results in the destination buffer */
+
+ /* Convert from q15 to float and store result in destination buffer */
*pDst++ = ((float32_t) * pIn++ / 32768.0f);
*pDst++ = ((float32_t) * pIn++ / 32768.0f);
*pDst++ = ((float32_t) * pIn++ / 32768.0f);
*pDst++ = ((float32_t) * pIn++ / 32768.0f);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = (float32_t) A / 32768 */
- /* convert from q15 to float and then store the results in the destination buffer */
- *pDst++ = ((float32_t) * pIn++ / 32768.0f);
- /* Decrement the loop counter */
+ /* Convert from q15 to float and store result in destination buffer */
+ *pDst++ = ((float32_t) *pIn++ / 32768.0f);
+
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of q15_to_x group
+ @} end of q15_to_x group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q31.c b/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q31.c
index bf139a8..12706e1 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q31.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q31.c
@@ -3,13 +3,13 @@
* Title: arm_q15_to_q31.c
* Description: Converts the elements of the Q15 vector to Q31 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,57 +29,53 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @addtogroup q15_to_x
- * @{
+ @addtogroup q15_to_x
+ @{
*/
/**
- * @brief Converts the elements of the Q15 vector to Q31 vector.
- * @param[in] *pSrc points to the Q15 input vector
- * @param[out] *pDst points to the Q31 output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * pDst[n] = (q31_t) pSrc[n] << 16; 0 <= n < blockSize.
- * </pre>
- *
- */
+ @brief Converts the elements of the Q15 vector to Q31 vector.
+ @param[in] pSrc points to the Q15 input vector
+ @param[out] pDst points to the Q31 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+ @par Details
+ The equation used for the conversion process is:
+ <pre>
+ pDst[n] = (q31_t) pSrc[n] << 16; 0 <= n < blockSize.
+ </pre>
+ */
void arm_q15_to_q31(
- q15_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pIn = pSrc; /* Src pointer */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ const q15_t *pIn = pSrc; /* Source pointer */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
+ q31_t in1, in2;
+ q31_t out1, out2, out3, out4;
+#endif
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t in1, in2;
- q31_t out1, out2, out3, out4;
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = (q31_t)A << 16 */
- /* convert from q15 to q31 and then store the results in the destination buffer */
- in1 = *__SIMD32(pIn)++;
- in2 = *__SIMD32(pIn)++;
+
+ /* Convert from q15 to q31 and store result in destination buffer */
+ in1 = read_q15x2_ia ((q15_t **) &pIn);
+ in2 = read_q15x2_ia ((q15_t **) &pIn);
#ifndef ARM_MATH_BIG_ENDIAN
@@ -103,42 +99,40 @@
/* extract lower 16 bits to 32 bit result */
out4 = in2 << 16U;
-#endif // #ifndef ARM_MATH_BIG_ENDIAN
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
*pDst++ = out1;
*pDst++ = out2;
*pDst++ = out3;
*pDst++ = out4;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
- /* C = (q31_t)A << 16 */
- /* convert from q15 to q31 and then store the results in the destination buffer */
- *pDst++ = (q31_t) * pIn++ << 16;
+ /* C = (q31_t) A << 16 */
- /* Decrement the loop counter */
+ /* Convert from q15 to q31 and store result in destination buffer */
+ *pDst++ = (q31_t) *pIn++ << 16;
+
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of q15_to_x group
+ @} end of q15_to_x group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q7.c b/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q7.c
index 7a45e58..c73d13d 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q7.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q7.c
@@ -3,13 +3,13 @@
* Title: arm_q15_to_q7.c
* Description: Converts the elements of the Q15 vector to Q7 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,58 +29,55 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @addtogroup q15_to_x
- * @{
+ @addtogroup q15_to_x
+ @{
*/
-
/**
- * @brief Converts the elements of the Q15 vector to Q7 vector.
- * @param[in] *pSrc points to the Q15 input vector
- * @param[out] *pDst points to the Q7 output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * pDst[n] = (q7_t) pSrc[n] >> 8; 0 <= n < blockSize.
- * </pre>
- *
- */
+ @brief Converts the elements of the Q15 vector to Q7 vector.
+ @param[in] pSrc points to the Q15 input vector
+ @param[out] pDst points to the Q7 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+ @par Details
+ The equation used for the conversion process is:
+ <pre>
+ pDst[n] = (q7_t) pSrc[n] >> 8; 0 <= n < blockSize.
+ </pre>
+ */
void arm_q15_to_q7(
- q15_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize)
+ const q15_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize)
{
- q15_t *pIn = pSrc; /* Src pointer */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ const q15_t *pIn = pSrc; /* Source pointer */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+ q31_t in1, in2;
+ q31_t out1, out2;
+#endif
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t in1, in2;
- q31_t out1, out2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = (q7_t) A >> 8 */
- /* convert from q15 to q7 and then store the results in the destination buffer */
- in1 = *__SIMD32(pIn)++;
- in2 = *__SIMD32(pIn)++;
+
+ /* Convert from q15 to q7 and store result in destination buffer */
+#if defined (ARM_MATH_DSP)
+
+ in1 = read_q15x2_ia ((q15_t **) &pIn);
+ in2 = read_q15x2_ia ((q15_t **) &pIn);
#ifndef ARM_MATH_BIG_ENDIAN
@@ -92,7 +89,7 @@
out1 = __PKHTB(in1, in2, 16);
out2 = __PKHBT(in1, in2, 16);
-#endif // #ifndef ARM_MATH_BIG_ENDIAN
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* rotate packed value by 24 */
out2 = ((uint32_t) out2 << 8) | ((uint32_t) out2 >> 24);
@@ -106,37 +103,44 @@
out1 = out1 | out2;
/* store 4 samples at a time to destiantion buffer */
- *__SIMD32(pDst)++ = out1;
+ write_q7x4_ia (&pDst, out1);
- /* Decrement the loop counter */
+#else
+
+ *pDst++ = (q7_t) (*pIn++ >> 8);
+ *pDst++ = (q7_t) (*pIn++ >> 8);
+ *pDst++ = (q7_t) (*pIn++ >> 8);
+ *pDst++ = (q7_t) (*pIn++ >> 8);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = (q7_t) A >> 8 */
- /* convert from q15 to q7 and then store the results in the destination buffer */
+
+ /* Convert from q15 to q7 and store result in destination buffer */
*pDst++ = (q7_t) (*pIn++ >> 8);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of q15_to_x group
+ @} end of q15_to_x group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_float.c b/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_float.c
index d2d7505..0dcfd5c 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_float.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_float.c
@@ -3,13 +3,13 @@
* Title: arm_q31_to_float.c
* Description: Converts the elements of the Q31 vector to floating-point vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,7 +29,7 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
@@ -37,83 +37,74 @@
*/
/**
- * @addtogroup q31_to_x
- * @{
+ @addtogroup q31_to_x
+ @{
*/
/**
- * @brief Converts the elements of the Q31 vector to floating-point vector.
- * @param[in] *pSrc points to the Q31 input vector
- * @param[out] *pDst points to the floating-point output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * pDst[n] = (float32_t) pSrc[n] / 2147483648; 0 <= n < blockSize.
- * </pre>
- *
+ @brief Converts the elements of the Q31 vector to floating-point vector.
+ @param[in] pSrc points to the Q31 input vector
+ @param[out] pDst points to the floating-point output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Details
+ The equation used for the conversion process is:
+ <pre>
+ pDst[n] = (float32_t) pSrc[n] / 2147483648; 0 <= n < blockSize.
+ </pre>
*/
-
void arm_q31_to_float(
- q31_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pIn = pSrc; /* Src pointer */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ const q31_t *pIn = pSrc; /* Source pointer */
+#if defined (ARM_MATH_LOOPUNROLL)
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = (float32_t) A / 2147483648 */
- /* convert from q31 to float and then store the results in the destination buffer */
- *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
- *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
- *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
- *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
- /* Decrement the loop counter */
+ /* Convert from q31 to float and store result in destination buffer */
+ *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+ *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+ *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+ *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = (float32_t) A / 2147483648 */
- /* convert from q31 to float and then store the results in the destination buffer */
- *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
- /* Decrement the loop counter */
+ /* Convert from q31 to float and store result in destination buffer */
+ *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of q31_to_x group
+ @} end of q31_to_x group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q15.c b/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q15.c
index c460fe7..942faa3 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q15.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q15.c
@@ -3,13 +3,13 @@
* Title: arm_q31_to_q15.c
* Description: Converts the elements of the Q31 vector to Q15 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,55 +29,53 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @addtogroup q31_to_x
- * @{
+ @addtogroup q31_to_x
+ @{
*/
/**
- * @brief Converts the elements of the Q31 vector to Q15 vector.
- * @param[in] *pSrc points to the Q31 input vector
- * @param[out] *pDst points to the Q15 output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * pDst[n] = (q15_t) pSrc[n] >> 16; 0 <= n < blockSize.
- * </pre>
- *
- */
+ @brief Converts the elements of the Q31 vector to Q15 vector.
+ @param[in] pSrc points to the Q31 input vector
+ @param[out] pDst points to the Q15 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+ @par Details
+ The equation used for the conversion process is:
+ <pre>
+ pDst[n] = (q15_t) pSrc[n] >> 16; 0 <= n < blockSize.
+ </pre>
+ */
void arm_q31_to_q15(
- q31_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pIn = pSrc; /* Src pointer */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ const q31_t *pIn = pSrc; /* Source pointer */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+ q31_t in1, in2, in3, in4;
+ q31_t out1, out2;
+#endif
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t in1, in2, in3, in4;
- q31_t out1, out2;
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C = (q15_t) A >> 16 */
- /* convert from q31 to q15 and then store the results in the destination buffer */
+ /* C = (q15_t) (A >> 16) */
+
+ /* Convert from q31 to q15 and store result in destination buffer */
+#if defined (ARM_MATH_DSP)
+
in1 = *pIn++;
in2 = *pIn++;
in3 = *pIn++;
@@ -85,49 +83,52 @@
/* pack two higher 16-bit values from two 32-bit values */
#ifndef ARM_MATH_BIG_ENDIAN
-
out1 = __PKHTB(in2, in1, 16);
out2 = __PKHTB(in4, in3, 16);
+#else
+ out1 = __PKHTB(in1, in2, 16);
+ out2 = __PKHTB(in3, in4, 16);
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+
+ write_q15x2_ia (&pDst, out1);
+ write_q15x2_ia (&pDst, out2);
#else
- out1 = __PKHTB(in1, in2, 16);
- out2 = __PKHTB(in3, in4, 16);
+ *pDst++ = (q15_t) (*pIn++ >> 16);
+ *pDst++ = (q15_t) (*pIn++ >> 16);
+ *pDst++ = (q15_t) (*pIn++ >> 16);
+ *pDst++ = (q15_t) (*pIn++ >> 16);
-#endif // #ifdef ARM_MATH_BIG_ENDIAN
+#endif /* #if defined (ARM_MATH_DSP) */
- *__SIMD32(pDst)++ = out1;
- *__SIMD32(pDst)++ = out2;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
- /* C = (q15_t) A >> 16 */
- /* convert from q31 to q15 and then store the results in the destination buffer */
+ /* C = (q15_t) (A >> 16) */
+
+ /* Convert from q31 to q15 and store result in destination buffer */
*pDst++ = (q15_t) (*pIn++ >> 16);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of q31_to_x group
+ @} end of q31_to_x group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q7.c b/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q7.c
index f092bed..c636c32 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q7.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q7.c
@@ -3,13 +3,13 @@
* Title: arm_q31_to_q7.c
* Description: Converts the elements of the Q31 vector to Q7 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,96 +29,82 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @addtogroup q31_to_x
- * @{
+ @addtogroup q31_to_x
+ @{
*/
/**
- * @brief Converts the elements of the Q31 vector to Q7 vector.
- * @param[in] *pSrc points to the Q31 input vector
- * @param[out] *pDst points to the Q7 output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * pDst[n] = (q7_t) pSrc[n] >> 24; 0 <= n < blockSize.
- * </pre>
- *
- */
+ @brief Converts the elements of the Q31 vector to Q7 vector.
+ @param[in] pSrc points to the Q31 input vector
+ @param[out] pDst points to the Q7 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+ @par Details
+ The equation used for the conversion process is:
+ <pre>
+ pDst[n] = (q7_t) pSrc[n] >> 24; 0 <= n < blockSize.
+ </pre>
+ */
void arm_q31_to_q7(
- q31_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize)
+ const q31_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize)
{
- q31_t *pIn = pSrc; /* Src pointer */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ const q31_t *pIn = pSrc; /* Source pointer */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t in1, in2, in3, in4;
q7_t out1, out2, out3, out4;
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
- /* C = (q7_t) A >> 24 */
- /* convert from q31 to q7 and then store the results in the destination buffer */
- in1 = *pIn++;
- in2 = *pIn++;
- in3 = *pIn++;
- in4 = *pIn++;
+ /* C = (q7_t) (A >> 24) */
- out1 = (q7_t) (in1 >> 24);
- out2 = (q7_t) (in2 >> 24);
- out3 = (q7_t) (in3 >> 24);
- out4 = (q7_t) (in4 >> 24);
+ /* Convert from q31 to q7 and store result in destination buffer */
- *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
+ out1 = (q7_t) (*pIn++ >> 24);
+ out2 = (q7_t) (*pIn++ >> 24);
+ out3 = (q7_t) (*pIn++ >> 24);
+ out4 = (q7_t) (*pIn++ >> 24);
+ write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
- /* C = (q7_t) A >> 24 */
- /* convert from q31 to q7 and then store the results in the destination buffer */
+ /* C = (q7_t) (A >> 24) */
+
+ /* Convert from q31 to q7 and store result in destination buffer */
*pDst++ = (q7_t) (*pIn++ >> 24);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of q31_to_x group
+ @} end of q31_to_x group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_float.c b/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_float.c
index ace437f..a42eb62 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_float.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_float.c
@@ -3,13 +3,13 @@
* Title: arm_q7_to_float.c
* Description: Converts the elements of the Q7 vector to floating-point vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,7 +29,7 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
@@ -37,83 +37,74 @@
*/
/**
- * @addtogroup q7_to_x
- * @{
+ @addtogroup q7_to_x
+ @{
*/
/**
- * @brief Converts the elements of the Q7 vector to floating-point vector.
- * @param[in] *pSrc points to the Q7 input vector
- * @param[out] *pDst points to the floating-point output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * pDst[n] = (float32_t) pSrc[n] / 128; 0 <= n < blockSize.
- * </pre>
- *
+ @brief Converts the elements of the Q7 vector to floating-point vector.
+ @param[in] pSrc points to the Q7 input vector
+ @param[out] pDst points to the floating-point output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+
+ @par Details
+ The equation used for the conversion process is:
+ <pre>
+ pDst[n] = (float32_t) pSrc[n] / 128; 0 <= n < blockSize.
+ </pre>
*/
-
void arm_q7_to_float(
- q7_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
+ const q7_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
{
- q7_t *pIn = pSrc; /* Src pointer */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ const q7_t *pIn = pSrc; /* Source pointer */
+#if defined (ARM_MATH_LOOPUNROLL)
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = (float32_t) A / 128 */
- /* convert from q7 to float and then store the results in the destination buffer */
+
+ /* Convert from q7 to float and store result in destination buffer */
*pDst++ = ((float32_t) * pIn++ / 128.0f);
*pDst++ = ((float32_t) * pIn++ / 128.0f);
*pDst++ = ((float32_t) * pIn++ / 128.0f);
*pDst++ = ((float32_t) * pIn++ / 128.0f);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = (float32_t) A / 128 */
- /* convert from q7 to float and then store the results in the destination buffer */
+
+ /* Convert from q7 to float and store result in destination buffer */
*pDst++ = ((float32_t) * pIn++ / 128.0f);
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
+
}
/**
- * @} end of q7_to_x group
+ @} end of q7_to_x group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q15.c b/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q15.c
index 5348194..61ebb1e 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q15.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q15.c
@@ -3,13 +3,13 @@
* Title: arm_q7_to_q15.c
* Description: Converts the elements of the Q7 vector to Q15 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,60 +29,55 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @addtogroup q7_to_x
- * @{
+ @addtogroup q7_to_x
+ @{
*/
-
-
-
/**
- * @brief Converts the elements of the Q7 vector to Q15 vector.
- * @param[in] *pSrc points to the Q7 input vector
- * @param[out] *pDst points to the Q15 output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * pDst[n] = (q15_t) pSrc[n] << 8; 0 <= n < blockSize.
- * </pre>
- *
- */
+ @brief Converts the elements of the Q7 vector to Q15 vector.
+ @param[in] pSrc points to the Q7 input vector
+ @param[out] pDst points to the Q15 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+ @par Details
+ The equation used for the conversion process is:
+ <pre>
+ pDst[n] = (q15_t) pSrc[n] << 8; 0 <= n < blockSize.
+ </pre>
+ */
void arm_q7_to_q15(
- q7_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
+ const q7_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
{
- q7_t *pIn = pSrc; /* Src pointer */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ const q7_t *pIn = pSrc; /* Source pointer */
-#if defined (ARM_MATH_DSP)
- q31_t in;
- q31_t in1, in2;
- q31_t out1, out2;
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+ q31_t in;
+ q31_t in1, in2;
+ q31_t out1, out2;
+#endif
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = (q15_t) A << 8 */
- /* convert from q7 to q15 and then store the results in the destination buffer */
- in = *__SIMD32(pIn)++;
+
+ /* Convert from q7 to q15 and store result in destination buffer */
+#if defined (ARM_MATH_DSP)
+
+ in = read_q7x4_ia ((q7_t **) &pIn);
/* rotatate in by 8 and extend two q7_t values to q15_t values */
in1 = __SXTB16(__ROR(in, 8));
@@ -97,49 +92,52 @@
in2 = in2 & 0xFF00FF00;
#ifndef ARM_MATH_BIG_ENDIAN
-
out2 = __PKHTB(in1, in2, 16);
out1 = __PKHBT(in2, in1, 16);
+#else
+ out1 = __PKHTB(in1, in2, 16);
+ out2 = __PKHBT(in2, in1, 16);
+#endif
+
+ write_q15x2_ia (&pDst, out1);
+ write_q15x2_ia (&pDst, out2);
#else
- out1 = __PKHTB(in1, in2, 16);
- out2 = __PKHBT(in2, in1, 16);
+ *pDst++ = (q15_t) *pIn++ << 8;
+ *pDst++ = (q15_t) *pIn++ << 8;
+ *pDst++ = (q15_t) *pIn++ << 8;
+ *pDst++ = (q15_t) *pIn++ << 8;
-#endif
+#endif /* #if defined (ARM_MATH_DSP) */
- *__SIMD32(pDst)++ = out1;
- *__SIMD32(pDst)++ = out2;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = (q15_t) A << 8 */
- /* convert from q7 to q15 and then store the results in the destination buffer */
+
+ /* Convert from q7 to q15 and store result in destination buffer */
*pDst++ = (q15_t) * pIn++ << 8;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of q7_to_x group
+ @} end of q7_to_x group
*/
diff --git a/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q31.c b/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q31.c
index 27d0952..1070a17 100644
--- a/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q31.c
+++ b/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q31.c
@@ -3,13 +3,13 @@
* Title: arm_q7_to_q31.c
* Description: Converts the elements of the Q7 vector to Q31 vector
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,56 +29,49 @@
#include "arm_math.h"
/**
- * @ingroup groupSupport
+ @ingroup groupSupport
*/
/**
- * @addtogroup q7_to_x
- * @{
+ @addtogroup q7_to_x
+ @{
*/
/**
- * @brief Converts the elements of the Q7 vector to Q31 vector.
- * @param[in] *pSrc points to the Q7 input vector
- * @param[out] *pDst points to the Q31 output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * pDst[n] = (q31_t) pSrc[n] << 24; 0 <= n < blockSize.
- * </pre>
- *
- */
+ @brief Converts the elements of the Q7 vector to Q31 vector.
+ @param[in] pSrc points to the Q7 input vector
+ @param[out] pDst points to the Q31 output vector
+ @param[in] blockSize number of samples in each vector
+ @return none
+ @par Details
+ The equation used for the conversion process is:
+ <pre>
+ pDst[n] = (q31_t) pSrc[n] << 24; 0 <= n < blockSize.
+ </pre>
+ */
void arm_q7_to_q31(
- q7_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
+ const q7_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
{
- q7_t *pIn = pSrc; /* Src pointer */
- uint32_t blkCnt; /* loop counter */
+ uint32_t blkCnt; /* Loop counter */
+ const q7_t *pIn = pSrc; /* Source pointer */
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- q31_t in;
+ q31_t in;
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /*loop Unrolling */
+ /* Loop unrolling: Compute 4 outputs at a time */
blkCnt = blockSize >> 2U;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0U)
{
/* C = (q31_t) A << 24 */
- /* convert from q7 to q31 and then store the results in the destination buffer */
- in = *__SIMD32(pIn)++;
+
+ /* Convert from q7 to q31 and store result in destination buffer */
+ in = read_q7x4_ia ((q7_t **) &pIn);
#ifndef ARM_MATH_BIG_ENDIAN
@@ -94,37 +87,35 @@
*pDst++ = (__ROR(in, 16)) & 0xFF000000;
*pDst++ = (__ROR(in, 8)) & 0xFF000000;
-#endif // #ifndef ARM_MATH_BIG_ENDIAN
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
+ /* Loop unrolling: Compute remaining outputs */
blkCnt = blockSize % 0x4U;
#else
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
+ /* Initialize blkCnt with number of samples */
blkCnt = blockSize;
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
while (blkCnt > 0U)
{
/* C = (q31_t) A << 24 */
- /* convert from q7 to q31 and then store the results in the destination buffer */
+
+ /* Convert from q7 to q31 and store result in destination buffer */
*pDst++ = (q31_t) * pIn++ << 24;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
blkCnt--;
}
}
/**
- * @} end of q7_to_x group
+ @} end of q7_to_x group
*/
diff --git a/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c b/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c
new file mode 100644
index 0000000..d6bf61d
--- /dev/null
+++ b/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c
@@ -0,0 +1,33 @@
+
+#include "arm_bitreversal.c"
+#include "arm_bitreversal2.c"
+#include "arm_cfft_f32.c"
+#include "arm_cfft_q15.c"
+#include "arm_cfft_q31.c"
+#include "arm_cfft_radix2_f32.c"
+#include "arm_cfft_radix2_init_f32.c"
+#include "arm_cfft_radix2_init_q15.c"
+#include "arm_cfft_radix2_init_q31.c"
+#include "arm_cfft_radix2_q15.c"
+#include "arm_cfft_radix2_q31.c"
+#include "arm_cfft_radix4_f32.c"
+#include "arm_cfft_radix4_init_f32.c"
+#include "arm_cfft_radix4_init_q15.c"
+#include "arm_cfft_radix4_init_q31.c"
+#include "arm_cfft_radix4_q15.c"
+#include "arm_cfft_radix4_q31.c"
+#include "arm_cfft_radix8_f32.c"
+#include "arm_dct4_f32.c"
+#include "arm_dct4_init_f32.c"
+#include "arm_dct4_init_q15.c"
+#include "arm_dct4_init_q31.c"
+#include "arm_dct4_q15.c"
+#include "arm_dct4_q31.c"
+#include "arm_rfft_f32.c"
+#include "arm_rfft_fast_f32.c"
+#include "arm_rfft_fast_init_f32.c"
+#include "arm_rfft_init_f32.c"
+#include "arm_rfft_init_q15.c"
+#include "arm_rfft_init_q31.c"
+#include "arm_rfft_q15.c"
+#include "arm_rfft_q31.c"
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c b/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c
index cea4821..460713c 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c
@@ -3,13 +3,13 @@
* Title: arm_bitreversal.c
* Description: Bitreversal functions
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,20 +29,20 @@
#include "arm_math.h"
#include "arm_common_tables.h"
-/*
-* @brief In-place bit reversal function.
-* @param[in, out] *pSrc points to the in-place buffer of floating-point data type.
-* @param[in] fftSize length of the FFT.
-* @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table.
-* @param[in] *pBitRevTab points to the bit reversal table.
-* @return none.
-*/
+/**
+ @brief In-place floating-point bit reversal function.
+ @param[in,out] pSrc points to in-place floating-point data buffer
+ @param[in] fftSize length of FFT
+ @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
+ @param[in] pBitRevTab points to bit reversal table
+ @return none
+ */
void arm_bitreversal_f32(
-float32_t * pSrc,
-uint16_t fftSize,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab)
+ float32_t * pSrc,
+ uint16_t fftSize,
+ uint16_t bitRevFactor,
+ const uint16_t * pBitRevTab)
{
uint16_t fftLenBy2, fftLenBy2p1;
uint16_t i, j;
@@ -100,21 +100,20 @@
}
-
-/*
-* @brief In-place bit reversal function.
-* @param[in, out] *pSrc points to the in-place buffer of Q31 data type.
-* @param[in] fftLen length of the FFT.
-* @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
-* @param[in] *pBitRevTab points to bit reversal table.
-* @return none.
+/**
+ @brief In-place Q31 bit reversal function.
+ @param[in,out] pSrc points to in-place Q31 data buffer.
+ @param[in] fftLen length of FFT.
+ @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
+ @param[in] pBitRevTab points to bit reversal table
+ @return none
*/
void arm_bitreversal_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTable)
+ q31_t * pSrc,
+ uint32_t fftLen,
+ uint16_t bitRevFactor,
+ const uint16_t * pBitRevTab)
{
uint32_t fftLenBy2, fftLenBy2p1, i, j;
q31_t in;
@@ -163,29 +162,29 @@
pSrc[(2U * (j + fftLenBy2)) + 1U] = in;
/* Reading the index for the bit reversal */
- j = *pBitRevTable;
+ j = *pBitRevTab;
/* Updating the bit reversal index depending on the fft length */
- pBitRevTable += bitRevFactor;
+ pBitRevTab += bitRevFactor;
}
}
-/*
- * @brief In-place bit reversal function.
- * @param[in, out] *pSrc points to the in-place buffer of Q15 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
- * @param[in] *pBitRevTab points to bit reversal table.
- * @return none.
+/**
+ @brief In-place Q15 bit reversal function.
+ @param[in,out] pSrc16 points to in-place Q15 data buffer
+ @param[in] fftLen length of FFT
+ @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
+ @param[in] pBitRevTab points to bit reversal table
+ @return none
*/
void arm_bitreversal_q15(
-q15_t * pSrc16,
-uint32_t fftLen,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab)
+ q15_t * pSrc16,
+ uint32_t fftLen,
+ uint16_t bitRevFactor,
+ const uint16_t * pBitRevTab)
{
q31_t *pSrc = (q31_t *) pSrc16;
q31_t in;
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S b/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S
index 89726f6..f4c6b2d 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S
@@ -5,8 +5,8 @@
; * Called after doing an fft to reorder the output.
; * The function is loop unrolled by 2. arm_bitreversal_16 as well.
; *
-; * $Date: 10. December 2018
-; * $Revision: V.1.5.2
+; * $Date: 28. February 2019
+; * $Revision: V.1.5.5
; *
; * Target Processor: Cortex-M cores
; * -------------------------------------------------------------------- */
@@ -68,13 +68,13 @@
CODESECT
THUMB
-;/*
-;* @brief In-place bit reversal function.
-;* @param[in, out] *pSrc points to the in-place buffer of unknown 32-bit data type.
-;* @param[in] bitRevLen bit reversal table length
-;* @param[in] *pBitRevTab points to bit reversal table.
-;* @return none.
-;*/
+;/**
+; @brief In-place bit reversal function.
+; @param[in,out] pSrc points to the in-place buffer of unknown 32-bit data type
+; @param[in] bitRevLen bit reversal table length
+; @param[in] pBitRevTab points to bit reversal table
+; @return none
+; */
EXPORT arm_bitreversal_32
EXPORT arm_bitreversal_16
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c b/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c
new file mode 100644
index 0000000..1537af3
--- /dev/null
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c
@@ -0,0 +1,99 @@
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_bitreversal2.c
+ * Description: Bitreversal functions
+ *
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+ @brief In-place 32 bit reversal function.
+ @param[in,out] pSrc points to in-place buffer of unknown 32-bit data type
+ @param[in] bitRevLen bit reversal table length
+ @param[in] pBitRevTab points to bit reversal table
+ @return none
+*/
+
+void arm_bitreversal_32(
+ uint32_t *pSrc,
+ const uint16_t bitRevLen,
+ const uint16_t *pBitRevTab)
+{
+ uint32_t a, b, i, tmp;
+
+ for (i = 0; i < bitRevLen; )
+ {
+ a = pBitRevTab[i ] >> 2;
+ b = pBitRevTab[i + 1] >> 2;
+
+ //real
+ tmp = pSrc[a];
+ pSrc[a] = pSrc[b];
+ pSrc[b] = tmp;
+
+ //complex
+ tmp = pSrc[a+1];
+ pSrc[a+1] = pSrc[b+1];
+ pSrc[b+1] = tmp;
+
+ i += 2;
+ }
+}
+
+
+/**
+ @brief In-place 16 bit reversal function.
+ @param[in,out] pSrc points to in-place buffer of unknown 16-bit data type
+ @param[in] bitRevLen bit reversal table length
+ @param[in] pBitRevTab points to bit reversal table
+ @return none
+*/
+
+void arm_bitreversal_16(
+ uint16_t *pSrc,
+ const uint16_t bitRevLen,
+ const uint16_t *pBitRevTab)
+{
+ uint16_t a, b, i, tmp;
+
+ for (i = 0; i < bitRevLen; )
+ {
+ a = pBitRevTab[i ] >> 2;
+ b = pBitRevTab[i + 1] >> 2;
+
+ //real
+ tmp = pSrc[a];
+ pSrc[a] = pSrc[b];
+ pSrc[b] = tmp;
+
+ //complex
+ tmp = pSrc[a+1];
+ pSrc[a+1] = pSrc[b+1];
+ pSrc[b+1] = tmp;
+
+ i += 2;
+ }
+}
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c
index 4abb6f5..575ac95 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_f32.c
* Description: Combined Radix Decimation in Frequency CFFT Floating point processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,281 +30,283 @@
#include "arm_common_tables.h"
extern void arm_radix8_butterfly_f32(
- float32_t * pSrc,
- uint16_t fftLen,
- const float32_t * pCoef,
- uint16_t twidCoefModifier);
+ float32_t * pSrc,
+ uint16_t fftLen,
+ const float32_t * pCoef,
+ uint16_t twidCoefModifier);
extern void arm_bitreversal_32(
- uint32_t * pSrc,
- const uint16_t bitRevLen,
- const uint16_t * pBitRevTable);
+ uint32_t * pSrc,
+ const uint16_t bitRevLen,
+ const uint16_t * pBitRevTable);
/**
-* @ingroup groupTransforms
-*/
+ @ingroup groupTransforms
+ */
/**
-* @defgroup ComplexFFT Complex FFT Functions
-*
-* \par
-* The Fast Fourier Transform (FFT) is an efficient algorithm for computing the
-* Discrete Fourier Transform (DFT). The FFT can be orders of magnitude faster
-* than the DFT, especially for long lengths.
-* The algorithms described in this section
-* operate on complex data. A separate set of functions is devoted to handling
-* of real sequences.
-* \par
-* There are separate algorithms for handling floating-point, Q15, and Q31 data
-* types. The algorithms available for each data type are described next.
-* \par
-* The FFT functions operate in-place. That is, the array holding the input data
-* will also be used to hold the corresponding result. The input data is complex
-* and contains <code>2*fftLen</code> interleaved values as shown below.
-* <pre> {real[0], imag[0], real[1], imag[1],..} </pre>
-* The FFT result will be contained in the same array and the frequency domain
-* values will have the same interleaving.
-*
-* \par Floating-point
-* The floating-point complex FFT uses a mixed-radix algorithm. Multiple radix-8
-* stages are performed along with a single radix-2 or radix-4 stage, as needed.
-* The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
-* a different twiddle factor table.
-* \par
-* The function uses the standard FFT definition and output values may grow by a
-* factor of <code>fftLen</code> when computing the forward transform. The
-* inverse transform includes a scale of <code>1/fftLen</code> as part of the
-* calculation and this matches the textbook definition of the inverse FFT.
-* \par
-* Pre-initialized data structures containing twiddle factors and bit reversal
-* tables are provided and defined in <code>arm_const_structs.h</code>. Include
-* this header in your function and then pass one of the constant structures as
-* an argument to arm_cfft_f32. For example:
-* \par
-* <code>arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1)</code>
-* \par
-* computes a 64-point inverse complex FFT including bit reversal.
-* The data structures are treated as constant data and not modified during the
-* calculation. The same data structure can be reused for multiple transforms
-* including mixing forward and inverse transforms.
-* \par
-* Earlier releases of the library provided separate radix-2 and radix-4
-* algorithms that operated on floating-point data. These functions are still
-* provided but are deprecated. The older functions are slower and less general
-* than the new functions.
-* \par
-* An example of initialization of the constants for the arm_cfft_f32 function follows:
-* \code
-* const static arm_cfft_instance_f32 *S;
-* ...
-* switch (length) {
-* case 16:
-* S = &arm_cfft_sR_f32_len16;
-* break;
-* case 32:
-* S = &arm_cfft_sR_f32_len32;
-* break;
-* case 64:
-* S = &arm_cfft_sR_f32_len64;
-* break;
-* case 128:
-* S = &arm_cfft_sR_f32_len128;
-* break;
-* case 256:
-* S = &arm_cfft_sR_f32_len256;
-* break;
-* case 512:
-* S = &arm_cfft_sR_f32_len512;
-* break;
-* case 1024:
-* S = &arm_cfft_sR_f32_len1024;
-* break;
-* case 2048:
-* S = &arm_cfft_sR_f32_len2048;
-* break;
-* case 4096:
-* S = &arm_cfft_sR_f32_len4096;
-* break;
-* }
-* \endcode
-* \par Q15 and Q31
-* The floating-point complex FFT uses a mixed-radix algorithm. Multiple radix-4
-* stages are performed along with a single radix-2 stage, as needed.
-* The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
-* a different twiddle factor table.
-* \par
-* The function uses the standard FFT definition and output values may grow by a
-* factor of <code>fftLen</code> when computing the forward transform. The
-* inverse transform includes a scale of <code>1/fftLen</code> as part of the
-* calculation and this matches the textbook definition of the inverse FFT.
-* \par
-* Pre-initialized data structures containing twiddle factors and bit reversal
-* tables are provided and defined in <code>arm_const_structs.h</code>. Include
-* this header in your function and then pass one of the constant structures as
-* an argument to arm_cfft_q31. For example:
-* \par
-* <code>arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1)</code>
-* \par
-* computes a 64-point inverse complex FFT including bit reversal.
-* The data structures are treated as constant data and not modified during the
-* calculation. The same data structure can be reused for multiple transforms
-* including mixing forward and inverse transforms.
-* \par
-* Earlier releases of the library provided separate radix-2 and radix-4
-* algorithms that operated on floating-point data. These functions are still
-* provided but are deprecated. The older functions are slower and less general
-* than the new functions.
-* \par
-* An example of initialization of the constants for the arm_cfft_q31 function follows:
-* \code
-* const static arm_cfft_instance_q31 *S;
-* ...
-* switch (length) {
-* case 16:
-* S = &arm_cfft_sR_q31_len16;
-* break;
-* case 32:
-* S = &arm_cfft_sR_q31_len32;
-* break;
-* case 64:
-* S = &arm_cfft_sR_q31_len64;
-* break;
-* case 128:
-* S = &arm_cfft_sR_q31_len128;
-* break;
-* case 256:
-* S = &arm_cfft_sR_q31_len256;
-* break;
-* case 512:
-* S = &arm_cfft_sR_q31_len512;
-* break;
-* case 1024:
-* S = &arm_cfft_sR_q31_len1024;
-* break;
-* case 2048:
-* S = &arm_cfft_sR_q31_len2048;
-* break;
-* case 4096:
-* S = &arm_cfft_sR_q31_len4096;
-* break;
-* }
-* \endcode
-*
-*/
+ @defgroup ComplexFFT Complex FFT Functions
+
+ @par
+ The Fast Fourier Transform (FFT) is an efficient algorithm for computing the
+ Discrete Fourier Transform (DFT). The FFT can be orders of magnitude faster
+ than the DFT, especially for long lengths.
+ The algorithms described in this section
+ operate on complex data. A separate set of functions is devoted to handling
+ of real sequences.
+ @par
+ There are separate algorithms for handling floating-point, Q15, and Q31 data
+ types. The algorithms available for each data type are described next.
+ @par
+ The FFT functions operate in-place. That is, the array holding the input data
+ will also be used to hold the corresponding result. The input data is complex
+ and contains <code>2*fftLen</code> interleaved values as shown below.
+ <pre>{real[0], imag[0], real[1], imag[1], ...} </pre>
+ The FFT result will be contained in the same array and the frequency domain
+ values will have the same interleaving.
+
+ @par Floating-point
+ The floating-point complex FFT uses a mixed-radix algorithm. Multiple radix-8
+ stages are performed along with a single radix-2 or radix-4 stage, as needed.
+ The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
+ a different twiddle factor table.
+ @par
+ The function uses the standard FFT definition and output values may grow by a
+ factor of <code>fftLen</code> when computing the forward transform. The
+ inverse transform includes a scale of <code>1/fftLen</code> as part of the
+ calculation and this matches the textbook definition of the inverse FFT.
+ @par
+ Pre-initialized data structures containing twiddle factors and bit reversal
+ tables are provided and defined in <code>arm_const_structs.h</code>. Include
+ this header in your function and then pass one of the constant structures as
+ an argument to arm_cfft_f32. For example:
+ @par
+ <code>arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1)</code>
+ @par
+ computes a 64-point inverse complex FFT including bit reversal.
+ The data structures are treated as constant data and not modified during the
+ calculation. The same data structure can be reused for multiple transforms
+ including mixing forward and inverse transforms.
+ @par
+ Earlier releases of the library provided separate radix-2 and radix-4
+ algorithms that operated on floating-point data. These functions are still
+ provided but are deprecated. The older functions are slower and less general
+ than the new functions.
+ @par
+ An example of initialization of the constants for the arm_cfft_f32 function follows:
+ @code
+ const static arm_cfft_instance_f32 *S;
+ ...
+ switch (length) {
+ case 16:
+ S = &arm_cfft_sR_f32_len16;
+ break;
+ case 32:
+ S = &arm_cfft_sR_f32_len32;
+ break;
+ case 64:
+ S = &arm_cfft_sR_f32_len64;
+ break;
+ case 128:
+ S = &arm_cfft_sR_f32_len128;
+ break;
+ case 256:
+ S = &arm_cfft_sR_f32_len256;
+ break;
+ case 512:
+ S = &arm_cfft_sR_f32_len512;
+ break;
+ case 1024:
+ S = &arm_cfft_sR_f32_len1024;
+ break;
+ case 2048:
+ S = &arm_cfft_sR_f32_len2048;
+ break;
+ case 4096:
+ S = &arm_cfft_sR_f32_len4096;
+ break;
+ }
+ @endcode
+ @par Q15 and Q31
+ The floating-point complex FFT uses a mixed-radix algorithm. Multiple radix-4
+ stages are performed along with a single radix-2 stage, as needed.
+ The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
+ a different twiddle factor table.
+ @par
+ The function uses the standard FFT definition and output values may grow by a
+ factor of <code>fftLen</code> when computing the forward transform. The
+ inverse transform includes a scale of <code>1/fftLen</code> as part of the
+ calculation and this matches the textbook definition of the inverse FFT.
+ @par
+ Pre-initialized data structures containing twiddle factors and bit reversal
+ tables are provided and defined in <code>arm_const_structs.h</code>. Include
+ this header in your function and then pass one of the constant structures as
+ an argument to arm_cfft_q31. For example:
+ @par
+ <code>arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1)</code>
+ @par
+ computes a 64-point inverse complex FFT including bit reversal.
+ The data structures are treated as constant data and not modified during the
+ calculation. The same data structure can be reused for multiple transforms
+ including mixing forward and inverse transforms.
+ @par
+ Earlier releases of the library provided separate radix-2 and radix-4
+ algorithms that operated on floating-point data. These functions are still
+ provided but are deprecated. The older functions are slower and less general
+ than the new functions.
+ @par
+ An example of initialization of the constants for the arm_cfft_q31 function follows:
+ @code
+ const static arm_cfft_instance_q31 *S;
+ ...
+ switch (length) {
+ case 16:
+ S = &arm_cfft_sR_q31_len16;
+ break;
+ case 32:
+ S = &arm_cfft_sR_q31_len32;
+ break;
+ case 64:
+ S = &arm_cfft_sR_q31_len64;
+ break;
+ case 128:
+ S = &arm_cfft_sR_q31_len128;
+ break;
+ case 256:
+ S = &arm_cfft_sR_q31_len256;
+ break;
+ case 512:
+ S = &arm_cfft_sR_q31_len512;
+ break;
+ case 1024:
+ S = &arm_cfft_sR_q31_len1024;
+ break;
+ case 2048:
+ S = &arm_cfft_sR_q31_len2048;
+ break;
+ case 4096:
+ S = &arm_cfft_sR_q31_len4096;
+ break;
+ }
+ @endcode
+
+ */
-void arm_cfft_radix8by2_f32( arm_cfft_instance_f32 * S, float32_t * p1)
+void arm_cfft_radix8by2_f32 (arm_cfft_instance_f32 * S, float32_t * p1)
{
- uint32_t L = S->fftLen;
- float32_t * pCol1, * pCol2, * pMid1, * pMid2;
- float32_t * p2 = p1 + L;
- const float32_t * tw = (float32_t *) S->pTwiddle;
- float32_t t1[4], t2[4], t3[4], t4[4], twR, twI;
- float32_t m0, m1, m2, m3;
- uint32_t l;
+ uint32_t L = S->fftLen;
+ float32_t * pCol1, * pCol2, * pMid1, * pMid2;
+ float32_t * p2 = p1 + L;
+ const float32_t * tw = (float32_t *) S->pTwiddle;
+ float32_t t1[4], t2[4], t3[4], t4[4], twR, twI;
+ float32_t m0, m1, m2, m3;
+ uint32_t l;
- pCol1 = p1;
- pCol2 = p2;
+ pCol1 = p1;
+ pCol2 = p2;
- // Define new length
- L >>= 1;
- // Initialize mid pointers
- pMid1 = p1 + L;
- pMid2 = p2 + L;
+ /* Define new length */
+ L >>= 1;
- // do two dot Fourier transform
- for ( l = L >> 2; l > 0; l-- )
- {
- t1[0] = p1[0];
- t1[1] = p1[1];
- t1[2] = p1[2];
- t1[3] = p1[3];
+ /* Initialize mid pointers */
+ pMid1 = p1 + L;
+ pMid2 = p2 + L;
- t2[0] = p2[0];
- t2[1] = p2[1];
- t2[2] = p2[2];
- t2[3] = p2[3];
+ /* do two dot Fourier transform */
+ for (l = L >> 2; l > 0; l-- )
+ {
+ t1[0] = p1[0];
+ t1[1] = p1[1];
+ t1[2] = p1[2];
+ t1[3] = p1[3];
- t3[0] = pMid1[0];
- t3[1] = pMid1[1];
- t3[2] = pMid1[2];
- t3[3] = pMid1[3];
+ t2[0] = p2[0];
+ t2[1] = p2[1];
+ t2[2] = p2[2];
+ t2[3] = p2[3];
- t4[0] = pMid2[0];
- t4[1] = pMid2[1];
- t4[2] = pMid2[2];
- t4[3] = pMid2[3];
+ t3[0] = pMid1[0];
+ t3[1] = pMid1[1];
+ t3[2] = pMid1[2];
+ t3[3] = pMid1[3];
- *p1++ = t1[0] + t2[0];
- *p1++ = t1[1] + t2[1];
- *p1++ = t1[2] + t2[2];
- *p1++ = t1[3] + t2[3]; // col 1
+ t4[0] = pMid2[0];
+ t4[1] = pMid2[1];
+ t4[2] = pMid2[2];
+ t4[3] = pMid2[3];
- t2[0] = t1[0] - t2[0];
- t2[1] = t1[1] - t2[1];
- t2[2] = t1[2] - t2[2];
- t2[3] = t1[3] - t2[3]; // for col 2
+ *p1++ = t1[0] + t2[0];
+ *p1++ = t1[1] + t2[1];
+ *p1++ = t1[2] + t2[2];
+ *p1++ = t1[3] + t2[3]; /* col 1 */
- *pMid1++ = t3[0] + t4[0];
- *pMid1++ = t3[1] + t4[1];
- *pMid1++ = t3[2] + t4[2];
- *pMid1++ = t3[3] + t4[3]; // col 1
+ t2[0] = t1[0] - t2[0];
+ t2[1] = t1[1] - t2[1];
+ t2[2] = t1[2] - t2[2];
+ t2[3] = t1[3] - t2[3]; /* for col 2 */
- t4[0] = t4[0] - t3[0];
- t4[1] = t4[1] - t3[1];
- t4[2] = t4[2] - t3[2];
- t4[3] = t4[3] - t3[3]; // for col 2
+ *pMid1++ = t3[0] + t4[0];
+ *pMid1++ = t3[1] + t4[1];
+ *pMid1++ = t3[2] + t4[2];
+ *pMid1++ = t3[3] + t4[3]; /* col 1 */
- twR = *tw++;
- twI = *tw++;
+ t4[0] = t4[0] - t3[0];
+ t4[1] = t4[1] - t3[1];
+ t4[2] = t4[2] - t3[2];
+ t4[3] = t4[3] - t3[3]; /* for col 2 */
- // multiply by twiddle factors
- m0 = t2[0] * twR;
- m1 = t2[1] * twI;
- m2 = t2[1] * twR;
- m3 = t2[0] * twI;
+ twR = *tw++;
+ twI = *tw++;
- // R = R * Tr - I * Ti
- *p2++ = m0 + m1;
- // I = I * Tr + R * Ti
- *p2++ = m2 - m3;
+ /* multiply by twiddle factors */
+ m0 = t2[0] * twR;
+ m1 = t2[1] * twI;
+ m2 = t2[1] * twR;
+ m3 = t2[0] * twI;
- // use vertical symmetry
- // 0.9988 - 0.0491i <==> -0.0491 - 0.9988i
- m0 = t4[0] * twI;
- m1 = t4[1] * twR;
- m2 = t4[1] * twI;
- m3 = t4[0] * twR;
+ /* R = R * Tr - I * Ti */
+ *p2++ = m0 + m1;
+ /* I = I * Tr + R * Ti */
+ *p2++ = m2 - m3;
- *pMid2++ = m0 - m1;
- *pMid2++ = m2 + m3;
+ /* use vertical symmetry */
+ /* 0.9988 - 0.0491i <==> -0.0491 - 0.9988i */
+ m0 = t4[0] * twI;
+ m1 = t4[1] * twR;
+ m2 = t4[1] * twI;
+ m3 = t4[0] * twR;
- twR = *tw++;
- twI = *tw++;
+ *pMid2++ = m0 - m1;
+ *pMid2++ = m2 + m3;
- m0 = t2[2] * twR;
- m1 = t2[3] * twI;
- m2 = t2[3] * twR;
- m3 = t2[2] * twI;
+ twR = *tw++;
+ twI = *tw++;
- *p2++ = m0 + m1;
- *p2++ = m2 - m3;
+ m0 = t2[2] * twR;
+ m1 = t2[3] * twI;
+ m2 = t2[3] * twR;
+ m3 = t2[2] * twI;
- m0 = t4[2] * twI;
- m1 = t4[3] * twR;
- m2 = t4[3] * twI;
- m3 = t4[2] * twR;
+ *p2++ = m0 + m1;
+ *p2++ = m2 - m3;
- *pMid2++ = m0 - m1;
- *pMid2++ = m2 + m3;
- }
+ m0 = t4[2] * twI;
+ m1 = t4[3] * twR;
+ m2 = t4[3] * twI;
+ m3 = t4[2] * twR;
- // first col
- arm_radix8_butterfly_f32( pCol1, L, (float32_t *) S->pTwiddle, 2U);
- // second col
- arm_radix8_butterfly_f32( pCol2, L, (float32_t *) S->pTwiddle, 2U);
+ *pMid2++ = m0 - m1;
+ *pMid2++ = m2 + m3;
+ }
+
+ /* first col */
+ arm_radix8_butterfly_f32 (pCol1, L, (float32_t *) S->pTwiddle, 2U);
+
+ /* second col */
+ arm_radix8_butterfly_f32 (pCol2, L, (float32_t *) S->pTwiddle, 2U);
}
-void arm_cfft_radix8by4_f32( arm_cfft_instance_f32 * S, float32_t * p1)
+void arm_cfft_radix8by4_f32 (arm_cfft_instance_f32 * S, float32_t * p1)
{
uint32_t L = S->fftLen >> 1;
float32_t * pCol1, *pCol2, *pCol3, *pCol4, *pEnd1, *pEnd2, *pEnd3, *pEnd4;
@@ -317,11 +319,11 @@
float32_t m0, m1, m2, m3;
uint32_t l, twMod2, twMod3, twMod4;
- pCol1 = p1; // points to real values by default
+ pCol1 = p1; /* points to real values by default */
pCol2 = p2;
pCol3 = p3;
pCol4 = p4;
- pEnd1 = p2 - 1; // points to imaginary values by default
+ pEnd1 = p2 - 1; /* points to imaginary values by default */
pEnd2 = p3 - 1;
pEnd3 = p4 - 1;
pEnd4 = pEnd3 + L;
@@ -330,32 +332,32 @@
L >>= 1;
- // do four dot Fourier transform
+ /* do four dot Fourier transform */
twMod2 = 2;
twMod3 = 4;
twMod4 = 6;
- // TOP
+ /* TOP */
p1ap3_0 = p1[0] + p3[0];
p1sp3_0 = p1[0] - p3[0];
p1ap3_1 = p1[1] + p3[1];
p1sp3_1 = p1[1] - p3[1];
- // col 2
+ /* col 2 */
t2[0] = p1sp3_0 + p2[1] - p4[1];
t2[1] = p1sp3_1 - p2[0] + p4[0];
- // col 3
+ /* col 3 */
t3[0] = p1ap3_0 - p2[0] - p4[0];
t3[1] = p1ap3_1 - p2[1] - p4[1];
- // col 4
+ /* col 4 */
t4[0] = p1sp3_0 - p2[1] + p4[1];
t4[1] = p1sp3_1 + p2[0] - p4[0];
- // col 1
+ /* col 1 */
*p1++ = p1ap3_0 + p2[0] + p4[0];
*p1++ = p1ap3_1 + p2[1] + p4[1];
- // Twiddle factors are ones
+ /* Twiddle factors are ones */
*p2++ = t2[0];
*p2++ = t2[1];
*p3++ = t3[0];
@@ -369,138 +371,138 @@
for (l = (L - 2) >> 1; l > 0; l-- )
{
- // TOP
- p1ap3_0 = p1[0] + p3[0];
- p1sp3_0 = p1[0] - p3[0];
- p1ap3_1 = p1[1] + p3[1];
- p1sp3_1 = p1[1] - p3[1];
- // col 2
- t2[0] = p1sp3_0 + p2[1] - p4[1];
- t2[1] = p1sp3_1 - p2[0] + p4[0];
- // col 3
- t3[0] = p1ap3_0 - p2[0] - p4[0];
- t3[1] = p1ap3_1 - p2[1] - p4[1];
- // col 4
- t4[0] = p1sp3_0 - p2[1] + p4[1];
- t4[1] = p1sp3_1 + p2[0] - p4[0];
- // col 1 - top
- *p1++ = p1ap3_0 + p2[0] + p4[0];
- *p1++ = p1ap3_1 + p2[1] + p4[1];
+ /* TOP */
+ p1ap3_0 = p1[0] + p3[0];
+ p1sp3_0 = p1[0] - p3[0];
+ p1ap3_1 = p1[1] + p3[1];
+ p1sp3_1 = p1[1] - p3[1];
+ /* col 2 */
+ t2[0] = p1sp3_0 + p2[1] - p4[1];
+ t2[1] = p1sp3_1 - p2[0] + p4[0];
+ /* col 3 */
+ t3[0] = p1ap3_0 - p2[0] - p4[0];
+ t3[1] = p1ap3_1 - p2[1] - p4[1];
+ /* col 4 */
+ t4[0] = p1sp3_0 - p2[1] + p4[1];
+ t4[1] = p1sp3_1 + p2[0] - p4[0];
+ /* col 1 - top */
+ *p1++ = p1ap3_0 + p2[0] + p4[0];
+ *p1++ = p1ap3_1 + p2[1] + p4[1];
- // BOTTOM
- p1ap3_1 = pEnd1[-1] + pEnd3[-1];
- p1sp3_1 = pEnd1[-1] - pEnd3[-1];
- p1ap3_0 = pEnd1[0] + pEnd3[0];
- p1sp3_0 = pEnd1[0] - pEnd3[0];
- // col 2
- t2[2] = pEnd2[0] - pEnd4[0] + p1sp3_1;
- t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1];
- // col 3
- t3[2] = p1ap3_1 - pEnd2[-1] - pEnd4[-1];
- t3[3] = p1ap3_0 - pEnd2[0] - pEnd4[0];
- // col 4
- t4[2] = pEnd2[0] - pEnd4[0] - p1sp3_1;
- t4[3] = pEnd4[-1] - pEnd2[-1] - p1sp3_0;
- // col 1 - Bottom
- *pEnd1-- = p1ap3_0 + pEnd2[0] + pEnd4[0];
- *pEnd1-- = p1ap3_1 + pEnd2[-1] + pEnd4[-1];
+ /* BOTTOM */
+ p1ap3_1 = pEnd1[-1] + pEnd3[-1];
+ p1sp3_1 = pEnd1[-1] - pEnd3[-1];
+ p1ap3_0 = pEnd1[ 0] + pEnd3[0];
+ p1sp3_0 = pEnd1[ 0] - pEnd3[0];
+ /* col 2 */
+ t2[2] = pEnd2[0] - pEnd4[0] + p1sp3_1;
+ t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1];
+ /* col 3 */
+ t3[2] = p1ap3_1 - pEnd2[-1] - pEnd4[-1];
+ t3[3] = p1ap3_0 - pEnd2[ 0] - pEnd4[ 0];
+ /* col 4 */
+ t4[2] = pEnd2[ 0] - pEnd4[ 0] - p1sp3_1;
+ t4[3] = pEnd4[-1] - pEnd2[-1] - p1sp3_0;
+ /* col 1 - Bottom */
+ *pEnd1-- = p1ap3_0 + pEnd2[ 0] + pEnd4[ 0];
+ *pEnd1-- = p1ap3_1 + pEnd2[-1] + pEnd4[-1];
- // COL 2
- // read twiddle factors
- twR = *tw2++;
- twI = *tw2++;
- // multiply by twiddle factors
- // let Z1 = a + i(b), Z2 = c + i(d)
- // => Z1 * Z2 = (a*c - b*d) + i(b*c + a*d)
+ /* COL 2 */
+ /* read twiddle factors */
+ twR = *tw2++;
+ twI = *tw2++;
+ /* multiply by twiddle factors */
+ /* let Z1 = a + i(b), Z2 = c + i(d) */
+ /* => Z1 * Z2 = (a*c - b*d) + i(b*c + a*d) */
- // Top
- m0 = t2[0] * twR;
- m1 = t2[1] * twI;
- m2 = t2[1] * twR;
- m3 = t2[0] * twI;
+ /* Top */
+ m0 = t2[0] * twR;
+ m1 = t2[1] * twI;
+ m2 = t2[1] * twR;
+ m3 = t2[0] * twI;
- *p2++ = m0 + m1;
- *p2++ = m2 - m3;
- // use vertical symmetry col 2
- // 0.9997 - 0.0245i <==> 0.0245 - 0.9997i
- // Bottom
- m0 = t2[3] * twI;
- m1 = t2[2] * twR;
- m2 = t2[2] * twI;
- m3 = t2[3] * twR;
+ *p2++ = m0 + m1;
+ *p2++ = m2 - m3;
+ /* use vertical symmetry col 2 */
+ /* 0.9997 - 0.0245i <==> 0.0245 - 0.9997i */
+ /* Bottom */
+ m0 = t2[3] * twI;
+ m1 = t2[2] * twR;
+ m2 = t2[2] * twI;
+ m3 = t2[3] * twR;
- *pEnd2-- = m0 - m1;
- *pEnd2-- = m2 + m3;
+ *pEnd2-- = m0 - m1;
+ *pEnd2-- = m2 + m3;
- // COL 3
- twR = tw3[0];
- twI = tw3[1];
- tw3 += twMod3;
- // Top
- m0 = t3[0] * twR;
- m1 = t3[1] * twI;
- m2 = t3[1] * twR;
- m3 = t3[0] * twI;
+ /* COL 3 */
+ twR = tw3[0];
+ twI = tw3[1];
+ tw3 += twMod3;
+ /* Top */
+ m0 = t3[0] * twR;
+ m1 = t3[1] * twI;
+ m2 = t3[1] * twR;
+ m3 = t3[0] * twI;
- *p3++ = m0 + m1;
- *p3++ = m2 - m3;
- // use vertical symmetry col 3
- // 0.9988 - 0.0491i <==> -0.9988 - 0.0491i
- // Bottom
- m0 = -t3[3] * twR;
- m1 = t3[2] * twI;
- m2 = t3[2] * twR;
- m3 = t3[3] * twI;
+ *p3++ = m0 + m1;
+ *p3++ = m2 - m3;
+ /* use vertical symmetry col 3 */
+ /* 0.9988 - 0.0491i <==> -0.9988 - 0.0491i */
+ /* Bottom */
+ m0 = -t3[3] * twR;
+ m1 = t3[2] * twI;
+ m2 = t3[2] * twR;
+ m3 = t3[3] * twI;
- *pEnd3-- = m0 - m1;
- *pEnd3-- = m3 - m2;
+ *pEnd3-- = m0 - m1;
+ *pEnd3-- = m3 - m2;
- // COL 4
- twR = tw4[0];
- twI = tw4[1];
- tw4 += twMod4;
- // Top
- m0 = t4[0] * twR;
- m1 = t4[1] * twI;
- m2 = t4[1] * twR;
- m3 = t4[0] * twI;
+ /* COL 4 */
+ twR = tw4[0];
+ twI = tw4[1];
+ tw4 += twMod4;
+ /* Top */
+ m0 = t4[0] * twR;
+ m1 = t4[1] * twI;
+ m2 = t4[1] * twR;
+ m3 = t4[0] * twI;
- *p4++ = m0 + m1;
- *p4++ = m2 - m3;
- // use vertical symmetry col 4
- // 0.9973 - 0.0736i <==> -0.0736 + 0.9973i
- // Bottom
- m0 = t4[3] * twI;
- m1 = t4[2] * twR;
- m2 = t4[2] * twI;
- m3 = t4[3] * twR;
+ *p4++ = m0 + m1;
+ *p4++ = m2 - m3;
+ /* use vertical symmetry col 4 */
+ /* 0.9973 - 0.0736i <==> -0.0736 + 0.9973i */
+ /* Bottom */
+ m0 = t4[3] * twI;
+ m1 = t4[2] * twR;
+ m2 = t4[2] * twI;
+ m3 = t4[3] * twR;
- *pEnd4-- = m0 - m1;
- *pEnd4-- = m2 + m3;
+ *pEnd4-- = m0 - m1;
+ *pEnd4-- = m2 + m3;
}
- //MIDDLE
- // Twiddle factors are
- // 1.0000 0.7071-0.7071i -1.0000i -0.7071-0.7071i
+ /* MIDDLE */
+ /* Twiddle factors are */
+ /* 1.0000 0.7071-0.7071i -1.0000i -0.7071-0.7071i */
p1ap3_0 = p1[0] + p3[0];
p1sp3_0 = p1[0] - p3[0];
p1ap3_1 = p1[1] + p3[1];
p1sp3_1 = p1[1] - p3[1];
- // col 2
+ /* col 2 */
t2[0] = p1sp3_0 + p2[1] - p4[1];
t2[1] = p1sp3_1 - p2[0] + p4[0];
- // col 3
+ /* col 3 */
t3[0] = p1ap3_0 - p2[0] - p4[0];
t3[1] = p1ap3_1 - p2[1] - p4[1];
- // col 4
+ /* col 4 */
t4[0] = p1sp3_0 - p2[1] + p4[1];
t4[1] = p1sp3_1 + p2[0] - p4[0];
- // col 1 - Top
+ /* col 1 - Top */
*p1++ = p1ap3_0 + p2[0] + p4[0];
*p1++ = p1ap3_1 + p2[1] + p4[1];
- // COL 2
+ /* COL 2 */
twR = tw2[0];
twI = tw2[1];
@@ -511,7 +513,7 @@
*p2++ = m0 + m1;
*p2++ = m2 - m3;
- // COL 3
+ /* COL 3 */
twR = tw3[0];
twI = tw3[1];
@@ -522,7 +524,7 @@
*p3++ = m0 + m1;
*p3++ = m2 - m3;
- // COL 4
+ /* COL 4 */
twR = tw4[0];
twI = tw4[1];
@@ -534,87 +536,94 @@
*p4++ = m0 + m1;
*p4++ = m2 - m3;
- // first col
- arm_radix8_butterfly_f32( pCol1, L, (float32_t *) S->pTwiddle, 4U);
- // second col
- arm_radix8_butterfly_f32( pCol2, L, (float32_t *) S->pTwiddle, 4U);
- // third col
- arm_radix8_butterfly_f32( pCol3, L, (float32_t *) S->pTwiddle, 4U);
- // fourth col
- arm_radix8_butterfly_f32( pCol4, L, (float32_t *) S->pTwiddle, 4U);
+ /* first col */
+ arm_radix8_butterfly_f32 (pCol1, L, (float32_t *) S->pTwiddle, 4U);
+
+ /* second col */
+ arm_radix8_butterfly_f32 (pCol2, L, (float32_t *) S->pTwiddle, 4U);
+
+ /* third col */
+ arm_radix8_butterfly_f32 (pCol3, L, (float32_t *) S->pTwiddle, 4U);
+
+ /* fourth col */
+ arm_radix8_butterfly_f32 (pCol4, L, (float32_t *) S->pTwiddle, 4U);
}
/**
-* @addtogroup ComplexFFT
-* @{
-*/
+ @addtogroup ComplexFFT
+ @{
+ */
/**
-* @details
-* @brief Processing function for the floating-point complex FFT.
-* @param[in] *S points to an instance of the floating-point CFFT structure.
-* @param[in, out] *p1 points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
-* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return none.
-*/
+ @brief Processing function for the floating-point complex FFT.
+ @param[in] S points to an instance of the floating-point CFFT structure
+ @param[in,out] p1 points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+ @param[in] ifftFlag flag that selects transform direction
+ - value = 0: forward transform
+ - value = 1: inverse transform
+ @param[in] bitReverseFlag flag that enables / disables bit reversal of output
+ - value = 0: disables bit reversal of output
+ - value = 1: enables bit reversal of output
+ @return none
+ */
void arm_cfft_f32(
- const arm_cfft_instance_f32 * S,
- float32_t * p1,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag)
+ const arm_cfft_instance_f32 * S,
+ float32_t * p1,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag)
{
- uint32_t L = S->fftLen, l;
- float32_t invL, * pSrc;
+ uint32_t L = S->fftLen, l;
+ float32_t invL, * pSrc;
- if (ifftFlag == 1U)
+ if (ifftFlag == 1U)
+ {
+ /* Conjugate input data */
+ pSrc = p1 + 1;
+ for (l = 0; l < L; l++)
{
- /* Conjugate input data */
- pSrc = p1 + 1;
- for(l=0; l<L; l++)
- {
- *pSrc = -*pSrc;
- pSrc += 2;
- }
+ *pSrc = -*pSrc;
+ pSrc += 2;
}
+ }
- switch (L)
+ switch (L)
+ {
+ case 16:
+ case 128:
+ case 1024:
+ arm_cfft_radix8by2_f32 ( (arm_cfft_instance_f32 *) S, p1);
+ break;
+ case 32:
+ case 256:
+ case 2048:
+ arm_cfft_radix8by4_f32 ( (arm_cfft_instance_f32 *) S, p1);
+ break;
+ case 64:
+ case 512:
+ case 4096:
+ arm_radix8_butterfly_f32 ( p1, L, (float32_t *) S->pTwiddle, 1);
+ break;
+ }
+
+ if ( bitReverseFlag )
+ arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable);
+
+ if (ifftFlag == 1U)
+ {
+ invL = 1.0f / (float32_t)L;
+
+ /* Conjugate and scale output data */
+ pSrc = p1;
+ for (l= 0; l < L; l++)
{
- case 16:
- case 128:
- case 1024:
- arm_cfft_radix8by2_f32 ( (arm_cfft_instance_f32 *) S, p1);
- break;
- case 32:
- case 256:
- case 2048:
- arm_cfft_radix8by4_f32 ( (arm_cfft_instance_f32 *) S, p1);
- break;
- case 64:
- case 512:
- case 4096:
- arm_radix8_butterfly_f32( p1, L, (float32_t *) S->pTwiddle, 1);
- break;
+ *pSrc++ *= invL ;
+ *pSrc = -(*pSrc) * invL;
+ pSrc++;
}
-
- if ( bitReverseFlag )
- arm_bitreversal_32((uint32_t*)p1,S->bitRevLength,S->pBitRevTable);
-
- if (ifftFlag == 1U)
- {
- invL = 1.0f/(float32_t)L;
- /* Conjugate and scale output data */
- pSrc = p1;
- for(l=0; l<L; l++)
- {
- *pSrc++ *= invL ;
- *pSrc = -(*pSrc) * invL;
- pSrc++;
- }
- }
+ }
}
/**
-* @} end of ComplexFFT group
-*/
+ @} end of ComplexFFT group
+ */
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c
index da76ddc..4f539b6 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_q15.c
* Description: Combined Radix Decimation in Q15 Frequency CFFT processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,317 +29,304 @@
#include "arm_math.h"
extern void arm_radix4_butterfly_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- q15_t * pCoef,
- uint32_t twidCoefModifier);
+ q15_t * pSrc,
+ uint32_t fftLen,
+ const q15_t * pCoef,
+ uint32_t twidCoefModifier);
extern void arm_radix4_butterfly_inverse_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- q15_t * pCoef,
- uint32_t twidCoefModifier);
+ q15_t * pSrc,
+ uint32_t fftLen,
+ const q15_t * pCoef,
+ uint32_t twidCoefModifier);
extern void arm_bitreversal_16(
- uint16_t * pSrc,
- const uint16_t bitRevLen,
- const uint16_t * pBitRevTable);
+ uint16_t * pSrc,
+ const uint16_t bitRevLen,
+ const uint16_t * pBitRevTable);
void arm_cfft_radix4by2_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- const q15_t * pCoef);
+ q15_t * pSrc,
+ uint32_t fftLen,
+ const q15_t * pCoef);
void arm_cfft_radix4by2_inverse_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- const q15_t * pCoef);
+ q15_t * pSrc,
+ uint32_t fftLen,
+ const q15_t * pCoef);
/**
-* @ingroup groupTransforms
-*/
+ @ingroup groupTransforms
+ */
/**
-* @addtogroup ComplexFFT
-* @{
-*/
+ @addtogroup ComplexFFT
+ @{
+ */
/**
-* @details
-* @brief Processing function for the Q15 complex FFT.
-* @param[in] *S points to an instance of the Q15 CFFT structure.
-* @param[in, out] *p1 points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
-* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return none.
-*/
+ @brief Processing function for Q15 complex FFT.
+ @param[in] S points to an instance of Q15 CFFT structure
+ @param[in,out] p1 points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+ @param[in] ifftFlag flag that selects transform direction
+ - value = 0: forward transform
+ - value = 1: inverse transform
+ @param[in] bitReverseFlag flag that enables / disables bit reversal of output
+ - value = 0: disables bit reversal of output
+ - value = 1: enables bit reversal of output
+ @return none
+ */
void arm_cfft_q15(
- const arm_cfft_instance_q15 * S,
- q15_t * p1,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag)
+ const arm_cfft_instance_q15 * S,
+ q15_t * p1,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag)
{
- uint32_t L = S->fftLen;
+ uint32_t L = S->fftLen;
- if (ifftFlag == 1U)
- {
- switch (L)
- {
- case 16:
- case 64:
- case 256:
- case 1024:
- case 4096:
- arm_radix4_butterfly_inverse_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 );
- break;
+ if (ifftFlag == 1U)
+ {
+ switch (L)
+ {
+ case 16:
+ case 64:
+ case 256:
+ case 1024:
+ case 4096:
+ arm_radix4_butterfly_inverse_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 );
+ break;
- case 32:
- case 128:
- case 512:
- case 2048:
- arm_cfft_radix4by2_inverse_q15 ( p1, L, S->pTwiddle );
- break;
- }
- }
- else
- {
- switch (L)
- {
- case 16:
- case 64:
- case 256:
- case 1024:
- case 4096:
- arm_radix4_butterfly_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 );
- break;
+ case 32:
+ case 128:
+ case 512:
+ case 2048:
+ arm_cfft_radix4by2_inverse_q15 ( p1, L, S->pTwiddle );
+ break;
+ }
+ }
+ else
+ {
+ switch (L)
+ {
+ case 16:
+ case 64:
+ case 256:
+ case 1024:
+ case 4096:
+ arm_radix4_butterfly_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 );
+ break;
- case 32:
- case 128:
- case 512:
- case 2048:
- arm_cfft_radix4by2_q15 ( p1, L, S->pTwiddle );
- break;
- }
- }
+ case 32:
+ case 128:
+ case 512:
+ case 2048:
+ arm_cfft_radix4by2_q15 ( p1, L, S->pTwiddle );
+ break;
+ }
+ }
- if ( bitReverseFlag )
- arm_bitreversal_16((uint16_t*)p1,S->bitRevLength,S->pBitRevTable);
+ if ( bitReverseFlag )
+ arm_bitreversal_16 ((uint16_t*) p1, S->bitRevLength, S->pBitRevTable);
}
/**
-* @} end of ComplexFFT group
-*/
+ @} end of ComplexFFT group
+ */
void arm_cfft_radix4by2_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- const q15_t * pCoef)
+ q15_t * pSrc,
+ uint32_t fftLen,
+ const q15_t * pCoef)
{
- uint32_t i;
- uint32_t n2;
- q15_t p0, p1, p2, p3;
+ uint32_t i;
+ uint32_t n2;
+ q15_t p0, p1, p2, p3;
#if defined (ARM_MATH_DSP)
- q31_t T, S, R;
- q31_t coeff, out1, out2;
- const q15_t *pC = pCoef;
- q15_t *pSi = pSrc;
- q15_t *pSl = pSrc + fftLen;
+ q31_t T, S, R;
+ q31_t coeff, out1, out2;
+ const q15_t *pC = pCoef;
+ q15_t *pSi = pSrc;
+ q15_t *pSl = pSrc + fftLen;
#else
- uint32_t ia, l;
- q15_t xt, yt, cosVal, sinVal;
+ uint32_t l;
+ q15_t xt, yt, cosVal, sinVal;
#endif
- n2 = fftLen >> 1;
+ n2 = fftLen >> 1U;
#if defined (ARM_MATH_DSP)
- for (i = n2; i > 0; i--)
- {
- coeff = _SIMD32_OFFSET(pC);
- pC += 2;
+ for (i = n2; i > 0; i--)
+ {
+ coeff = read_q15x2_ia ((q15_t **) &pC);
- T = _SIMD32_OFFSET(pSi);
- T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1
+ T = read_q15x2 (pSi);
+ T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
- S = _SIMD32_OFFSET(pSl);
- S = __SHADD16(S, 0); // this is just a SIMD arithmetic shift right by 1
+ S = read_q15x2 (pSl);
+ S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */
- R = __QSUB16(T, S);
+ R = __QSUB16(T, S);
- _SIMD32_OFFSET(pSi) = __SHADD16(T, S);
- pSi += 2;
+ write_q15x2_ia (&pSi, __SHADD16(T, S));
- #ifndef ARM_MATH_BIG_ENDIAN
+#ifndef ARM_MATH_BIG_ENDIAN
+ out1 = __SMUAD(coeff, R) >> 16U;
+ out2 = __SMUSDX(coeff, R);
+#else
+ out1 = __SMUSDX(R, coeff) >> 16U;
+ out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- out1 = __SMUAD(coeff, R) >> 16;
- out2 = __SMUSDX(coeff, R);
+ write_q15x2_ia (&pSl, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+ }
- #else
+#else /* #if defined (ARM_MATH_DSP) */
- out1 = __SMUSDX(R, coeff) >> 16U;
- out2 = __SMUAD(coeff, R);
+ for (i = 0; i < n2; i++)
+ {
+ cosVal = pCoef[2 * i];
+ sinVal = pCoef[2 * i + 1];
- #endif // #ifndef ARM_MATH_BIG_ENDIAN
+ l = i + n2;
- _SIMD32_OFFSET(pSl) =
- (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
- pSl += 2;
- }
+ xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+ pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
-#else // #if defined (ARM_MATH_DSP)
+ yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+ pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
- ia = 0;
- for (i = 0; i < n2; i++)
- {
- cosVal = pCoef[ia * 2];
- sinVal = pCoef[(ia * 2) + 1];
- ia++;
+ pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16U)) +
+ ((int16_t) (((q31_t) yt * sinVal) >> 16U)) );
- l = i + n2;
+ pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16U)) -
+ ((int16_t) (((q31_t) xt * sinVal) >> 16U)) );
+ }
- xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
- pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+#endif /* #if defined (ARM_MATH_DSP) */
- yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
- pSrc[2 * i + 1] =
- ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+ /* first col */
+ arm_radix4_butterfly_q15( pSrc, n2, (q15_t*)pCoef, 2U);
- pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
- ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+ /* second col */
+ arm_radix4_butterfly_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
- pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
- ((int16_t) (((q31_t) xt * sinVal) >> 16)));
- }
+ n2 = fftLen >> 1U;
+ for (i = 0; i < n2; i++)
+ {
+ p0 = pSrc[4 * i + 0];
+ p1 = pSrc[4 * i + 1];
+ p2 = pSrc[4 * i + 2];
+ p3 = pSrc[4 * i + 3];
-#endif // #if defined (ARM_MATH_DSP)
+ p0 <<= 1U;
+ p1 <<= 1U;
+ p2 <<= 1U;
+ p3 <<= 1U;
- // first col
- arm_radix4_butterfly_q15( pSrc, n2, (q15_t*)pCoef, 2U);
- // second col
- arm_radix4_butterfly_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
+ pSrc[4 * i + 0] = p0;
+ pSrc[4 * i + 1] = p1;
+ pSrc[4 * i + 2] = p2;
+ pSrc[4 * i + 3] = p3;
+ }
- for (i = 0; i < fftLen >> 1; i++)
- {
- p0 = pSrc[4*i+0];
- p1 = pSrc[4*i+1];
- p2 = pSrc[4*i+2];
- p3 = pSrc[4*i+3];
-
- p0 <<= 1;
- p1 <<= 1;
- p2 <<= 1;
- p3 <<= 1;
-
- pSrc[4*i+0] = p0;
- pSrc[4*i+1] = p1;
- pSrc[4*i+2] = p2;
- pSrc[4*i+3] = p3;
- }
}
void arm_cfft_radix4by2_inverse_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- const q15_t * pCoef)
+ q15_t * pSrc,
+ uint32_t fftLen,
+ const q15_t * pCoef)
{
- uint32_t i;
- uint32_t n2;
- q15_t p0, p1, p2, p3;
+ uint32_t i;
+ uint32_t n2;
+ q15_t p0, p1, p2, p3;
#if defined (ARM_MATH_DSP)
- q31_t T, S, R;
- q31_t coeff, out1, out2;
- const q15_t *pC = pCoef;
- q15_t *pSi = pSrc;
- q15_t *pSl = pSrc + fftLen;
+ q31_t T, S, R;
+ q31_t coeff, out1, out2;
+ const q15_t *pC = pCoef;
+ q15_t *pSi = pSrc;
+ q15_t *pSl = pSrc + fftLen;
#else
- uint32_t ia, l;
- q15_t xt, yt, cosVal, sinVal;
+ uint32_t l;
+ q15_t xt, yt, cosVal, sinVal;
#endif
- n2 = fftLen >> 1;
+ n2 = fftLen >> 1U;
#if defined (ARM_MATH_DSP)
- for (i = n2; i > 0; i--)
- {
- coeff = _SIMD32_OFFSET(pC);
- pC += 2;
+ for (i = n2; i > 0; i--)
+ {
+ coeff = read_q15x2_ia ((q15_t **) &pC);
- T = _SIMD32_OFFSET(pSi);
- T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1
+ T = read_q15x2 (pSi);
+ T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
- S = _SIMD32_OFFSET(pSl);
- S = __SHADD16(S, 0); // this is just a SIMD arithmetic shift right by 1
+ S = read_q15x2 (pSl);
+ S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */
- R = __QSUB16(T, S);
+ R = __QSUB16(T, S);
- _SIMD32_OFFSET(pSi) = __SHADD16(T, S);
- pSi += 2;
+ write_q15x2_ia (&pSi, __SHADD16(T, S));
- #ifndef ARM_MATH_BIG_ENDIAN
+#ifndef ARM_MATH_BIG_ENDIAN
+ out1 = __SMUSD(coeff, R) >> 16U;
+ out2 = __SMUADX(coeff, R);
+#else
+ out1 = __SMUADX(R, coeff) >> 16U;
+ out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- out1 = __SMUSD(coeff, R) >> 16;
- out2 = __SMUADX(coeff, R);
- #else
+ write_q15x2_ia (&pSl, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+ }
- out1 = __SMUADX(R, coeff) >> 16U;
- out2 = __SMUSD(__QSUB(0, coeff), R);
+#else /* #if defined (ARM_MATH_DSP) */
- #endif // #ifndef ARM_MATH_BIG_ENDIAN
+ for (i = 0; i < n2; i++)
+ {
+ cosVal = pCoef[2 * i];
+ sinVal = pCoef[2 * i + 1];
- _SIMD32_OFFSET(pSl) =
- (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
- pSl += 2;
- }
+ l = i + n2;
-#else // #if defined (ARM_MATH_DSP)
+ xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+ pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
- ia = 0;
- for (i = 0; i < n2; i++)
- {
- cosVal = pCoef[ia * 2];
- sinVal = pCoef[(ia * 2) + 1];
- ia++;
+ yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+ pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
- l = i + n2;
- xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
- pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+ pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16U)) -
+ ((int16_t) (((q31_t) yt * sinVal) >> 16U)) );
- yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
- pSrc[2 * i + 1] =
- ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+ pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16U)) +
+ ((int16_t) (((q31_t) xt * sinVal) >> 16U)) );
+ }
- pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
- ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+#endif /* #if defined (ARM_MATH_DSP) */
- pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
- ((int16_t) (((q31_t) xt * sinVal) >> 16)));
- }
+ /* first col */
+ arm_radix4_butterfly_inverse_q15( pSrc, n2, (q15_t*)pCoef, 2U);
-#endif // #if defined (ARM_MATH_DSP)
+ /* second col */
+ arm_radix4_butterfly_inverse_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
- // first col
- arm_radix4_butterfly_inverse_q15( pSrc, n2, (q15_t*)pCoef, 2U);
- // second col
- arm_radix4_butterfly_inverse_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
+ n2 = fftLen >> 1U;
+ for (i = 0; i < n2; i++)
+ {
+ p0 = pSrc[4 * i + 0];
+ p1 = pSrc[4 * i + 1];
+ p2 = pSrc[4 * i + 2];
+ p3 = pSrc[4 * i + 3];
- for (i = 0; i < fftLen >> 1; i++)
- {
- p0 = pSrc[4*i+0];
- p1 = pSrc[4*i+1];
- p2 = pSrc[4*i+2];
- p3 = pSrc[4*i+3];
+ p0 <<= 1U;
+ p1 <<= 1U;
+ p2 <<= 1U;
+ p3 <<= 1U;
- p0 <<= 1;
- p1 <<= 1;
- p2 <<= 1;
- p3 <<= 1;
-
- pSrc[4*i+0] = p0;
- pSrc[4*i+1] = p1;
- pSrc[4*i+2] = p2;
- pSrc[4*i+3] = p3;
- }
+ pSrc[4 * i + 0] = p0;
+ pSrc[4 * i + 1] = p1;
+ pSrc[4 * i + 2] = p2;
+ pSrc[4 * i + 3] = p3;
+ }
}
-
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c
index ff4ff94..0c88984 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_q31.c
* Description: Combined Radix Decimation in Frequency CFFT fixed point processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,224 +29,226 @@
#include "arm_math.h"
extern void arm_radix4_butterfly_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- q31_t * pCoef,
- uint32_t twidCoefModifier);
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pCoef,
+ uint32_t twidCoefModifier);
extern void arm_radix4_butterfly_inverse_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- q31_t * pCoef,
- uint32_t twidCoefModifier);
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pCoef,
+ uint32_t twidCoefModifier);
extern void arm_bitreversal_32(
- uint32_t * pSrc,
- const uint16_t bitRevLen,
- const uint16_t * pBitRevTable);
+ uint32_t * pSrc,
+ const uint16_t bitRevLen,
+ const uint16_t * pBitRevTable);
void arm_cfft_radix4by2_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- const q31_t * pCoef);
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pCoef);
void arm_cfft_radix4by2_inverse_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- const q31_t * pCoef);
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pCoef);
/**
-* @ingroup groupTransforms
-*/
+ @ingroup groupTransforms
+ */
/**
-* @addtogroup ComplexFFT
-* @{
-*/
+ @addtogroup ComplexFFT
+ @{
+ */
/**
-* @details
-* @brief Processing function for the fixed-point complex FFT in Q31 format.
-* @param[in] *S points to an instance of the fixed-point CFFT structure.
-* @param[in, out] *p1 points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
-* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return none.
-*/
+ @brief Processing function for the Q31 complex FFT.
+ @param[in] S points to an instance of the fixed-point CFFT structure
+ @param[in,out] p1 points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+ @param[in] ifftFlag flag that selects transform direction
+ - value = 0: forward transform
+ - value = 1: inverse transform
+ @param[in] bitReverseFlag flag that enables / disables bit reversal of output
+ - value = 0: disables bit reversal of output
+ - value = 1: enables bit reversal of output
+ @return none
+ */
void arm_cfft_q31(
- const arm_cfft_instance_q31 * S,
- q31_t * p1,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag)
+ const arm_cfft_instance_q31 * S,
+ q31_t * p1,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag)
{
- uint32_t L = S->fftLen;
+ uint32_t L = S->fftLen;
- if (ifftFlag == 1U)
- {
- switch (L)
- {
- case 16:
- case 64:
- case 256:
- case 1024:
- case 4096:
- arm_radix4_butterfly_inverse_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 );
- break;
+ if (ifftFlag == 1U)
+ {
+ switch (L)
+ {
+ case 16:
+ case 64:
+ case 256:
+ case 1024:
+ case 4096:
+ arm_radix4_butterfly_inverse_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 );
+ break;
- case 32:
- case 128:
- case 512:
- case 2048:
- arm_cfft_radix4by2_inverse_q31 ( p1, L, S->pTwiddle );
- break;
- }
- }
- else
- {
- switch (L)
- {
- case 16:
- case 64:
- case 256:
- case 1024:
- case 4096:
- arm_radix4_butterfly_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 );
- break;
+ case 32:
+ case 128:
+ case 512:
+ case 2048:
+ arm_cfft_radix4by2_inverse_q31 ( p1, L, S->pTwiddle );
+ break;
+ }
+ }
+ else
+ {
+ switch (L)
+ {
+ case 16:
+ case 64:
+ case 256:
+ case 1024:
+ case 4096:
+ arm_radix4_butterfly_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 );
+ break;
- case 32:
- case 128:
- case 512:
- case 2048:
- arm_cfft_radix4by2_q31 ( p1, L, S->pTwiddle );
- break;
- }
- }
+ case 32:
+ case 128:
+ case 512:
+ case 2048:
+ arm_cfft_radix4by2_q31 ( p1, L, S->pTwiddle );
+ break;
+ }
+ }
- if ( bitReverseFlag )
- arm_bitreversal_32((uint32_t*)p1,S->bitRevLength,S->pBitRevTable);
+ if ( bitReverseFlag )
+ arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable);
}
/**
-* @} end of ComplexFFT group
-*/
+ @} end of ComplexFFT group
+ */
void arm_cfft_radix4by2_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- const q31_t * pCoef)
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pCoef)
{
- uint32_t i, l;
- uint32_t n2, ia;
- q31_t xt, yt, cosVal, sinVal;
- q31_t p0, p1;
+ uint32_t i, l;
+ uint32_t n2;
+ q31_t xt, yt, cosVal, sinVal;
+ q31_t p0, p1;
- n2 = fftLen >> 1;
- ia = 0;
- for (i = 0; i < n2; i++)
- {
- cosVal = pCoef[2*ia];
- sinVal = pCoef[2*ia + 1];
- ia++;
+ n2 = fftLen >> 1U;
+ for (i = 0; i < n2; i++)
+ {
+ cosVal = pCoef[2 * i];
+ sinVal = pCoef[2 * i + 1];
- l = i + n2;
- xt = (pSrc[2 * i] >> 2) - (pSrc[2 * l] >> 2);
- pSrc[2 * i] = (pSrc[2 * i] >> 2) + (pSrc[2 * l] >> 2);
+ l = i + n2;
- yt = (pSrc[2 * i + 1] >> 2) - (pSrc[2 * l + 1] >> 2);
- pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2) + (pSrc[2 * i + 1] >> 2);
+ xt = (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U);
+ pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U);
- mult_32x32_keep32_R(p0, xt, cosVal);
- mult_32x32_keep32_R(p1, yt, cosVal);
- multAcc_32x32_keep32_R(p0, yt, sinVal);
- multSub_32x32_keep32_R(p1, xt, sinVal);
+ yt = (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U);
+ pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U);
- pSrc[2U * l] = p0 << 1;
- pSrc[2U * l + 1U] = p1 << 1;
+ mult_32x32_keep32_R(p0, xt, cosVal);
+ mult_32x32_keep32_R(p1, yt, cosVal);
+ multAcc_32x32_keep32_R(p0, yt, sinVal);
+ multSub_32x32_keep32_R(p1, xt, sinVal);
- }
+ pSrc[2 * l] = p0 << 1;
+ pSrc[2 * l + 1] = p1 << 1;
+ }
- // first col
- arm_radix4_butterfly_q31( pSrc, n2, (q31_t*)pCoef, 2U);
- // second col
- arm_radix4_butterfly_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2U);
+ /* first col */
+ arm_radix4_butterfly_q31 (pSrc, n2, (q31_t*)pCoef, 2U);
- for (i = 0; i < fftLen >> 1; i++)
- {
- p0 = pSrc[4*i+0];
- p1 = pSrc[4*i+1];
- xt = pSrc[4*i+2];
- yt = pSrc[4*i+3];
+ /* second col */
+ arm_radix4_butterfly_q31 (pSrc + fftLen, n2, (q31_t*)pCoef, 2U);
- p0 <<= 1;
- p1 <<= 1;
- xt <<= 1;
- yt <<= 1;
+ n2 = fftLen >> 1U;
+ for (i = 0; i < n2; i++)
+ {
+ p0 = pSrc[4 * i + 0];
+ p1 = pSrc[4 * i + 1];
+ xt = pSrc[4 * i + 2];
+ yt = pSrc[4 * i + 3];
- pSrc[4*i+0] = p0;
- pSrc[4*i+1] = p1;
- pSrc[4*i+2] = xt;
- pSrc[4*i+3] = yt;
- }
+ p0 <<= 1U;
+ p1 <<= 1U;
+ xt <<= 1U;
+ yt <<= 1U;
+
+ pSrc[4 * i + 0] = p0;
+ pSrc[4 * i + 1] = p1;
+ pSrc[4 * i + 2] = xt;
+ pSrc[4 * i + 3] = yt;
+ }
}
void arm_cfft_radix4by2_inverse_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- const q31_t * pCoef)
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pCoef)
{
- uint32_t i, l;
- uint32_t n2, ia;
- q31_t xt, yt, cosVal, sinVal;
- q31_t p0, p1;
+ uint32_t i, l;
+ uint32_t n2;
+ q31_t xt, yt, cosVal, sinVal;
+ q31_t p0, p1;
- n2 = fftLen >> 1;
- ia = 0;
- for (i = 0; i < n2; i++)
- {
- cosVal = pCoef[2*ia];
- sinVal = pCoef[2*ia + 1];
- ia++;
+ n2 = fftLen >> 1U;
+ for (i = 0; i < n2; i++)
+ {
+ cosVal = pCoef[2 * i];
+ sinVal = pCoef[2 * i + 1];
- l = i + n2;
- xt = (pSrc[2 * i] >> 2) - (pSrc[2 * l] >> 2);
- pSrc[2 * i] = (pSrc[2 * i] >> 2) + (pSrc[2 * l] >> 2);
+ l = i + n2;
- yt = (pSrc[2 * i + 1] >> 2) - (pSrc[2 * l + 1] >> 2);
- pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2) + (pSrc[2 * i + 1] >> 2);
+ xt = (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U);
+ pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U);
- mult_32x32_keep32_R(p0, xt, cosVal);
- mult_32x32_keep32_R(p1, yt, cosVal);
- multSub_32x32_keep32_R(p0, yt, sinVal);
- multAcc_32x32_keep32_R(p1, xt, sinVal);
+ yt = (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U);
+ pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U);
- pSrc[2U * l] = p0 << 1;
- pSrc[2U * l + 1U] = p1 << 1;
+ mult_32x32_keep32_R(p0, xt, cosVal);
+ mult_32x32_keep32_R(p1, yt, cosVal);
+ multSub_32x32_keep32_R(p0, yt, sinVal);
+ multAcc_32x32_keep32_R(p1, xt, sinVal);
- }
+ pSrc[2 * l] = p0 << 1U;
+ pSrc[2 * l + 1] = p1 << 1U;
+ }
- // first col
- arm_radix4_butterfly_inverse_q31( pSrc, n2, (q31_t*)pCoef, 2U);
- // second col
- arm_radix4_butterfly_inverse_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2U);
+ /* first col */
+ arm_radix4_butterfly_inverse_q31( pSrc, n2, (q31_t*)pCoef, 2U);
- for (i = 0; i < fftLen >> 1; i++)
- {
- p0 = pSrc[4*i+0];
- p1 = pSrc[4*i+1];
- xt = pSrc[4*i+2];
- yt = pSrc[4*i+3];
+ /* second col */
+ arm_radix4_butterfly_inverse_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2U);
- p0 <<= 1;
- p1 <<= 1;
- xt <<= 1;
- yt <<= 1;
+ n2 = fftLen >> 1U;
+ for (i = 0; i < n2; i++)
+ {
+ p0 = pSrc[4 * i + 0];
+ p1 = pSrc[4 * i + 1];
+ xt = pSrc[4 * i + 2];
+ yt = pSrc[4 * i + 3];
- pSrc[4*i+0] = p0;
- pSrc[4*i+1] = p1;
- pSrc[4*i+2] = xt;
- pSrc[4*i+3] = yt;
- }
+ p0 <<= 1U;
+ p1 <<= 1U;
+ xt <<= 1U;
+ yt <<= 1U;
+
+ pSrc[4 * i + 0] = p0;
+ pSrc[4 * i + 1] = p1;
+ pSrc[4 * i + 2] = xt;
+ pSrc[4 * i + 3] = yt;
+ }
}
-
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c
index d35988d..2bbcb5c 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_radix2_f32.c
* Description: Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,64 +29,62 @@
#include "arm_math.h"
void arm_radix2_butterfly_f32(
- float32_t * pSrc,
- uint32_t fftLen,
- float32_t * pCoef,
- uint16_t twidCoefModifier);
+ float32_t * pSrc,
+ uint32_t fftLen,
+ const float32_t * pCoef,
+ uint16_t twidCoefModifier);
void arm_radix2_butterfly_inverse_f32(
- float32_t * pSrc,
- uint32_t fftLen,
- float32_t * pCoef,
- uint16_t twidCoefModifier,
- float32_t onebyfftLen);
+ float32_t * pSrc,
+ uint32_t fftLen,
+ const float32_t * pCoef,
+ uint16_t twidCoefModifier,
+ float32_t onebyfftLen);
extern void arm_bitreversal_f32(
- float32_t * pSrc,
- uint16_t fftSize,
- uint16_t bitRevFactor,
- uint16_t * pBitRevTab);
+ float32_t * pSrc,
+ uint16_t fftSize,
+ uint16_t bitRevFactor,
+ const uint16_t * pBitRevTab);
/**
-* @ingroup groupTransforms
-*/
+ @ingroup groupTransforms
+ */
/**
-* @addtogroup ComplexFFT
-* @{
-*/
+ @addtogroup ComplexFFT
+ @{
+ */
/**
-* @details
-* @brief Radix-2 CFFT/CIFFT.
-* @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in] *S points to an instance of the floating-point Radix-2 CFFT/CIFFT structure.
-* @param[in, out] *pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
-* @return none.
-*/
+ @brief Radix-2 CFFT/CIFFT.
+ @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future
+ @param[in] S points to an instance of the floating-point Radix-2 CFFT/CIFFT structure
+ @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+ @return none
+ */
void arm_cfft_radix2_f32(
const arm_cfft_radix2_instance_f32 * S,
-float32_t * pSrc)
+ float32_t * pSrc)
{
if (S->ifftFlag == 1U)
{
- /* Complex IFFT radix-2 */
+ /* Complex IFFT radix-2 */
arm_radix2_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
S->twidCoefModifier, S->onebyfftLen);
}
else
{
- /* Complex FFT radix-2 */
+ /* Complex FFT radix-2 */
arm_radix2_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
S->twidCoefModifier);
}
if (S->bitReverseFlag == 1U)
{
- /* Bit Reversal */
+ /* Bit Reversal */
arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
}
@@ -94,36 +92,36 @@
/**
-* @} end of ComplexFFT group
-*/
+ @} end of ComplexFFT group
+ */
/* ----------------------------------------------------------------------
-** Internal helper function used by the FFTs
-** ------------------------------------------------------------------- */
+ ** Internal helper function used by the FFTs
+ ** ------------------------------------------------------------------- */
-/*
-* @brief Core function for the floating-point CFFT butterfly process.
-* @param[in, out] *pSrc points to the in-place buffer of floating-point data type.
-* @param[in] fftLen length of the FFT.
-* @param[in] *pCoef points to the twiddle coefficient buffer.
-* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @return none.
-*/
+/**
+ brief Core function for the floating-point CFFT butterfly process.
+ param[in,out] pSrc points to in-place buffer of floating-point data type
+ param[in] fftLen length of the FFT
+ param[in] pCoef points to twiddle coefficient buffer
+ param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+ return none
+ */
void arm_radix2_butterfly_f32(
-float32_t * pSrc,
-uint32_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier)
+ float32_t * pSrc,
+ uint32_t fftLen,
+ const float32_t * pCoef,
+ uint16_t twidCoefModifier)
{
- uint32_t i, j, k, l;
- uint32_t n1, n2, ia;
- float32_t xt, yt, cosVal, sinVal;
- float32_t p0, p1, p2, p3;
- float32_t a0, a1;
+ uint32_t i, j, k, l;
+ uint32_t n1, n2, ia;
+ float32_t xt, yt, cosVal, sinVal;
+ float32_t p0, p1, p2, p3;
+ float32_t a0, a1;
#if defined (ARM_MATH_DSP)
@@ -227,7 +225,7 @@
pSrc[2 * i + 3] = yt;
} // groups loop end
-#else
+#else /* #if defined (ARM_MATH_DSP) */
n2 = fftLen;
@@ -275,24 +273,24 @@
twidCoefModifier <<= 1U;
}
-#endif // #if defined (ARM_MATH_DSP)
+#endif /* #if defined (ARM_MATH_DSP) */
}
void arm_radix2_butterfly_inverse_f32(
-float32_t * pSrc,
-uint32_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier,
-float32_t onebyfftLen)
+ float32_t * pSrc,
+ uint32_t fftLen,
+ const float32_t * pCoef,
+ uint16_t twidCoefModifier,
+ float32_t onebyfftLen)
{
- uint32_t i, j, k, l;
- uint32_t n1, n2, ia;
- float32_t xt, yt, cosVal, sinVal;
- float32_t p0, p1, p2, p3;
- float32_t a0, a1;
+ uint32_t i, j, k, l;
+ uint32_t n1, n2, ia;
+ float32_t xt, yt, cosVal, sinVal;
+ float32_t p0, p1, p2, p3;
+ float32_t a0, a1;
#if defined (ARM_MATH_DSP)
@@ -392,7 +390,7 @@
pSrc[2 * i + 3] = p3;
} // butterfly loop end
-#else
+#else /* #if defined (ARM_MATH_DSP) */
n2 = fftLen;
@@ -461,12 +459,12 @@
p3 = yt * onebyfftLen;
pSrc[2 * i] = p0;
- pSrc[2U * l] = p2;
+ pSrc[2 * l] = p2;
pSrc[2 * i + 1] = p1;
- pSrc[2U * l + 1U] = p3;
+ pSrc[2 * l + 1] = p3;
} // butterfly loop end
-#endif // #if defined (ARM_MATH_DSP)
+#endif /* #if defined (ARM_MATH_DSP) */
}
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
index fdfa63e..491f09d 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_radix2_init_f32.c
* Description: Radix-2 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,36 +30,41 @@
#include "arm_common_tables.h"
/**
- * @ingroup groupTransforms
+ @ingroup groupTransforms
*/
/**
- * @addtogroup ComplexFFT
- * @{
+ @addtogroup ComplexFFT
+ @{
*/
/**
-* @brief Initialization function for the floating-point CFFT/CIFFT.
-* @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in,out] *S points to an instance of the floating-point CFFT/CIFFT structure.
-* @param[in] fftLen length of the FFT.
-* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-* \par
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ @brief Initialization function for the floating-point CFFT/CIFFT.
+ @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future.
+ @param[in,out] S points to an instance of the floating-point CFFT/CIFFT structure
+ @param[in] fftLen length of the FFT
+ @param[in] ifftFlag flag that selects transform direction
+ - value = 0: forward transform
+ - value = 1: inverse transform
+ @param[in] bitReverseFlag flag that enables / disables bit reversal of output
+ - value = 0: disables bit reversal of output
+ - value = 1: enables bit reversal of output
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+ @par Details
+ The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+ Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
+ @par
+ The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+ Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+ @par
+ The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+ @par
+ This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
*/
+
arm_status arm_cfft_radix2_init_f32(
arm_cfft_radix2_instance_f32 * S,
uint16_t fftLen,
@@ -188,5 +193,5 @@
}
/**
- * @} end of ComplexFFT group
+ @} end of ComplexFFT group
*/
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
index 2646374..7a68238 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_radix2_init_q15.c
* Description: Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,35 +30,40 @@
#include "arm_common_tables.h"
/**
- * @ingroup groupTransforms
+ @ingroup groupTransforms
*/
/**
- * @addtogroup ComplexFFT
- * @{
+ @addtogroup ComplexFFT
+ @{
*/
/**
-* @brief Initialization function for the Q15 CFFT/CIFFT.
-* @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed
-* @param[in,out] *S points to an instance of the Q15 CFFT/CIFFT structure.
-* @param[in] fftLen length of the FFT.
-* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-* \par
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ @brief Initialization function for the Q15 CFFT/CIFFT.
+ @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed
+ @param[in,out] S points to an instance of the Q15 CFFT/CIFFT structure.
+ @param[in] fftLen length of the FFT.
+ @param[in] ifftFlag flag that selects transform direction
+ - value = 0: forward transform
+ - value = 1: inverse transform
+ @param[in] bitReverseFlag flag that enables / disables bit reversal of output
+ - value = 0: disables bit reversal of output
+ - value = 1: enables bit reversal of output
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+ @par Details
+ The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+ Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
+ @par
+ The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+ Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+ @par
+ The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+ @par
+ This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
*/
arm_status arm_cfft_radix2_init_q15(
@@ -173,5 +178,5 @@
}
/**
- * @} end of ComplexFFT group
+ @} end of ComplexFFT group
*/
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
index 56fff4b..131fcb9 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_radix2_init_q31.c
* Description: Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT Initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,36 +30,39 @@
#include "arm_common_tables.h"
/**
- * @ingroup groupTransforms
+ @ingroup groupTransforms
*/
/**
- * @addtogroup ComplexFFT
- * @{
+ @addtogroup ComplexFFT
+ @{
*/
-
/**
-*
-* @brief Initialization function for the Q31 CFFT/CIFFT.
-* @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed
-* @param[in,out] *S points to an instance of the Q31 CFFT/CIFFT structure.
-* @param[in] fftLen length of the FFT.
-* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-* \par
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ @brief Initialization function for the Q31 CFFT/CIFFT.
+ @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+ @param[in,out] S points to an instance of the Q31 CFFT/CIFFT structure
+ @param[in] fftLen length of the FFT
+ @param[in] ifftFlag flag that selects transform direction
+ - value = 0: forward transform
+ - value = 1: inverse transform
+ @param[in] bitReverseFlag flag that enables / disables bit reversal of output
+ - value = 0: disables bit reversal of output
+ - value = 1: enables bit reversal of output
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+ @par Details
+ The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+ Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
+ @par
+ The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+ Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+ @par
+ The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+ @par
+ This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
*/
arm_status arm_cfft_radix2_init_q31(
@@ -76,8 +79,10 @@
/* Initialise the Twiddle coefficient pointer */
S->pTwiddle = (q31_t *) twiddleCoef_4096_q31;
+
/* Initialise the Flag for selection of CFFT or CIFFT */
S->ifftFlag = ifftFlag;
+
/* Initialise the Flag for calculation Bit reversal or not */
S->bitReverseFlag = bitReverseFlag;
@@ -170,5 +175,5 @@
}
/**
- * @} end of ComplexFFT group
+ @} end of ComplexFFT group
*/
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c
index 8880ab9..422dc0d 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_radix2_q15.c
* Description: Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,74 +29,71 @@
#include "arm_math.h"
void arm_radix2_butterfly_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- q15_t * pCoef,
- uint16_t twidCoefModifier);
+ q15_t * pSrc,
+ uint32_t fftLen,
+ const q15_t * pCoef,
+ uint16_t twidCoefModifier);
void arm_radix2_butterfly_inverse_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- q15_t * pCoef,
- uint16_t twidCoefModifier);
+ q15_t * pSrc,
+ uint32_t fftLen,
+ const q15_t * pCoef,
+ uint16_t twidCoefModifier);
void arm_bitreversal_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- uint16_t bitRevFactor,
- uint16_t * pBitRevTab);
+ q15_t * pSrc,
+ uint32_t fftLen,
+ uint16_t bitRevFactor,
+ const uint16_t * pBitRevTab);
/**
- * @ingroup groupTransforms
+ @ingroup groupTransforms
*/
/**
- * @addtogroup ComplexFFT
- * @{
+ @addtogroup ComplexFFT
+ @{
*/
/**
- * @details
- * @brief Processing function for the fixed-point CFFT/CIFFT.
- * @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed
- * @param[in] *S points to an instance of the fixed-point CFFT/CIFFT structure.
- * @param[in, out] *pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
- * @return none.
+ @brief Processing function for the fixed-point CFFT/CIFFT.
+ @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
+ @param[in] S points to an instance of the fixed-point CFFT/CIFFT structure
+ @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+ @return none
*/
void arm_cfft_radix2_q15(
const arm_cfft_radix2_instance_q15 * S,
- q15_t * pSrc)
+ q15_t * pSrc)
{
if (S->ifftFlag == 1U)
{
- arm_radix2_butterfly_inverse_q15(pSrc, S->fftLen,
- S->pTwiddle, S->twidCoefModifier);
+ arm_radix2_butterfly_inverse_q15 (pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
}
else
{
- arm_radix2_butterfly_q15(pSrc, S->fftLen,
- S->pTwiddle, S->twidCoefModifier);
+ arm_radix2_butterfly_q15 (pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
}
arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
}
/**
- * @} end of ComplexFFT group
+ @} end of ComplexFFT group
*/
void arm_radix2_butterfly_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- q15_t * pCoef,
- uint16_t twidCoefModifier)
+ q15_t * pSrc,
+ uint32_t fftLen,
+ const q15_t * pCoef,
+ uint16_t twidCoefModifier)
{
#if defined (ARM_MATH_DSP)
- unsigned i, j, k, l;
- unsigned n1, n2, ia;
+ uint32_t i, j, k, l;
+ uint32_t n1, n2, ia;
q15_t in;
q31_t T, S, R;
q31_t coeff, out1, out2;
@@ -111,215 +108,196 @@
// loop for groups
for (i = 0; i < n2; i++)
{
- coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+ coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
ia = ia + twidCoefModifier;
l = i + n2;
- T = _SIMD32_OFFSET(pSrc + (2 * i));
+ T = read_q15x2 (pSrc + (2 * i));
in = ((int16_t) (T & 0xFFFF)) >> 1;
T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
- S = _SIMD32_OFFSET(pSrc + (2 * l));
+ S = read_q15x2 (pSrc + (2 * l));
in = ((int16_t) (S & 0xFFFF)) >> 1;
S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
R = __QSUB16(T, S);
- _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+ write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
#ifndef ARM_MATH_BIG_ENDIAN
-
out1 = __SMUAD(coeff, R) >> 16;
out2 = __SMUSDX(coeff, R);
-
#else
-
out1 = __SMUSDX(R, coeff) >> 16U;
out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-#endif // #ifndef ARM_MATH_BIG_ENDIAN
+ write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
- _SIMD32_OFFSET(pSrc + (2U * l)) =
- (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
- coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+ coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
ia = ia + twidCoefModifier;
- // loop for butterfly
+ /* loop for butterfly */
i++;
l++;
- T = _SIMD32_OFFSET(pSrc + (2 * i));
+ T = read_q15x2 (pSrc + (2 * i));
in = ((int16_t) (T & 0xFFFF)) >> 1;
T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
- S = _SIMD32_OFFSET(pSrc + (2 * l));
+ S = read_q15x2 (pSrc + (2 * l));
in = ((int16_t) (S & 0xFFFF)) >> 1;
S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
R = __QSUB16(T, S);
- _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+ write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
#ifndef ARM_MATH_BIG_ENDIAN
-
out1 = __SMUAD(coeff, R) >> 16;
out2 = __SMUSDX(coeff, R);
-
#else
out1 = __SMUSDX(R, coeff) >> 16U;
out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-#endif // #ifndef ARM_MATH_BIG_ENDIAN
+ write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
- _SIMD32_OFFSET(pSrc + (2U * l)) =
- (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
- } // groups loop end
+ } /* groups loop end */
twidCoefModifier = twidCoefModifier << 1U;
- // loop for stage
+ /* loop for stage */
for (k = fftLen / 2; k > 2; k = k >> 1)
{
n1 = n2;
n2 = n2 >> 1;
ia = 0;
- // loop for groups
+ /* loop for groups */
for (j = 0; j < n2; j++)
{
- coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+ coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
ia = ia + twidCoefModifier;
- // loop for butterfly
+ /* loop for butterfly */
for (i = j; i < fftLen; i += n1)
{
l = i + n2;
- T = _SIMD32_OFFSET(pSrc + (2 * i));
+ T = read_q15x2 (pSrc + (2 * i));
- S = _SIMD32_OFFSET(pSrc + (2 * l));
+ S = read_q15x2 (pSrc + (2 * l));
R = __QSUB16(T, S);
- _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+ write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
#ifndef ARM_MATH_BIG_ENDIAN
-
out1 = __SMUAD(coeff, R) >> 16;
out2 = __SMUSDX(coeff, R);
-
#else
-
out1 = __SMUSDX(R, coeff) >> 16U;
out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-#endif // #ifndef ARM_MATH_BIG_ENDIAN
-
- _SIMD32_OFFSET(pSrc + (2U * l)) =
- (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+ write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
i += n1;
l = i + n2;
- T = _SIMD32_OFFSET(pSrc + (2 * i));
+ T = read_q15x2 (pSrc + (2 * i));
- S = _SIMD32_OFFSET(pSrc + (2 * l));
+ S = read_q15x2 (pSrc + (2 * l));
R = __QSUB16(T, S);
- _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+ write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
#ifndef ARM_MATH_BIG_ENDIAN
-
out1 = __SMUAD(coeff, R) >> 16;
out2 = __SMUSDX(coeff, R);
-
#else
-
out1 = __SMUSDX(R, coeff) >> 16U;
out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-#endif // #ifndef ARM_MATH_BIG_ENDIAN
+ write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
- _SIMD32_OFFSET(pSrc + (2U * l)) =
- (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+ } /* butterfly loop end */
- } // butterfly loop end
-
- } // groups loop end
+ } /* groups loop end */
twidCoefModifier = twidCoefModifier << 1U;
- } // stages loop end
+ } /* stages loop end */
n1 = n2;
n2 = n2 >> 1;
ia = 0;
- coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+ coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
ia = ia + twidCoefModifier;
- // loop for butterfly
+ /* loop for butterfly */
for (i = 0; i < fftLen; i += n1)
{
l = i + n2;
- T = _SIMD32_OFFSET(pSrc + (2 * i));
+ T = read_q15x2 (pSrc + (2 * i));
- S = _SIMD32_OFFSET(pSrc + (2 * l));
+ S = read_q15x2 (pSrc + (2 * l));
R = __QSUB16(T, S);
- _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
+ write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
- _SIMD32_OFFSET(pSrc + (2U * l)) = R;
+ write_q15x2 (pSrc + (2 * l), R);
i += n1;
l = i + n2;
- T = _SIMD32_OFFSET(pSrc + (2 * i));
+ T = read_q15x2 (pSrc + (2 * i));
- S = _SIMD32_OFFSET(pSrc + (2 * l));
+ S = read_q15x2 (pSrc + (2 * l));
R = __QSUB16(T, S);
- _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
+ write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
- _SIMD32_OFFSET(pSrc + (2U * l)) = R;
+ write_q15x2 (pSrc + (2 * l), R);
- } // groups loop end
+ } /* groups loop end */
-#else
+#else /* #if defined (ARM_MATH_DSP) */
- unsigned i, j, k, l;
- unsigned n1, n2, ia;
+ uint32_t i, j, k, l;
+ uint32_t n1, n2, ia;
q15_t xt, yt, cosVal, sinVal;
- //N = fftLen;
+ // N = fftLen;
n2 = fftLen;
n1 = n2;
n2 = n2 >> 1;
ia = 0;
- // loop for groups
+ /* loop for groups */
for (j = 0; j < n2; j++)
{
- cosVal = pCoef[ia * 2];
+ cosVal = pCoef[(ia * 2)];
sinVal = pCoef[(ia * 2) + 1];
ia = ia + twidCoefModifier;
- // loop for butterfly
+ /* loop for butterfly */
for (i = j; i < fftLen; i += n1)
{
l = i + n2;
@@ -327,36 +305,36 @@
pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
- pSrc[2 * i + 1] =
- ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+ pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) +
+ (pSrc[2 * i + 1] >> 1U) ) >> 1U;
- pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
- ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+ pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
+ ((int16_t) (((q31_t) yt * sinVal) >> 16)));
- pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
- ((int16_t) (((q31_t) xt * sinVal) >> 16)));
+ pSrc[2U * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
+ ((int16_t) (((q31_t) xt * sinVal) >> 16)));
- } // butterfly loop end
+ } /* butterfly loop end */
- } // groups loop end
+ } /* groups loop end */
twidCoefModifier = twidCoefModifier << 1U;
- // loop for stage
+ /* loop for stage */
for (k = fftLen / 2; k > 2; k = k >> 1)
{
n1 = n2;
n2 = n2 >> 1;
ia = 0;
- // loop for groups
+ /* loop for groups */
for (j = 0; j < n2; j++)
{
cosVal = pCoef[ia * 2];
sinVal = pCoef[(ia * 2) + 1];
ia = ia + twidCoefModifier;
- // loop for butterfly
+ /* loop for butterfly */
for (i = j; i < fftLen; i += n1)
{
l = i + n2;
@@ -366,24 +344,24 @@
yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
- pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
- ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+ pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
+ ((int16_t) (((q31_t) yt * sinVal) >> 16)));
- pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
- ((int16_t) (((q31_t) xt * sinVal) >> 16)));
+ pSrc[2U * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
+ ((int16_t) (((q31_t) xt * sinVal) >> 16)));
- } // butterfly loop end
+ } /* butterfly loop end */
- } // groups loop end
+ } /* groups loop end */
twidCoefModifier = twidCoefModifier << 1U;
- } // stages loop end
+ } /* stages loop end */
n1 = n2;
n2 = n2 >> 1;
ia = 0;
- // loop for groups
+ /* loop for groups */
for (j = 0; j < n2; j++)
{
cosVal = pCoef[ia * 2];
@@ -391,7 +369,7 @@
ia = ia + twidCoefModifier;
- // loop for butterfly
+ /* loop for butterfly */
for (i = j; i < fftLen; i += n1)
{
l = i + n2;
@@ -401,244 +379,226 @@
yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
- pSrc[2U * l] = xt;
+ pSrc[2 * l] = xt;
- pSrc[2U * l + 1U] = yt;
+ pSrc[2 * l + 1] = yt;
- } // butterfly loop end
+ } /* butterfly loop end */
- } // groups loop end
+ } /* groups loop end */
twidCoefModifier = twidCoefModifier << 1U;
-#endif // #if defined (ARM_MATH_DSP)
+#endif /* #if defined (ARM_MATH_DSP) */
}
void arm_radix2_butterfly_inverse_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- q15_t * pCoef,
- uint16_t twidCoefModifier)
+ q15_t * pSrc,
+ uint32_t fftLen,
+ const q15_t * pCoef,
+ uint16_t twidCoefModifier)
{
#if defined (ARM_MATH_DSP)
- unsigned i, j, k, l;
- unsigned n1, n2, ia;
- q15_t in;
- q31_t T, S, R;
- q31_t coeff, out1, out2;
+ uint32_t i, j, k, l;
+ uint32_t n1, n2, ia;
+ q15_t in;
+ q31_t T, S, R;
+ q31_t coeff, out1, out2;
- //N = fftLen;
+ // N = fftLen;
n2 = fftLen;
n1 = n2;
n2 = n2 >> 1;
ia = 0;
- // loop for groups
+ /* loop for groups */
for (i = 0; i < n2; i++)
{
- coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+ coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
ia = ia + twidCoefModifier;
l = i + n2;
- T = _SIMD32_OFFSET(pSrc + (2 * i));
+ T = read_q15x2 (pSrc + (2 * i));
in = ((int16_t) (T & 0xFFFF)) >> 1;
T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
- S = _SIMD32_OFFSET(pSrc + (2 * l));
+ S = read_q15x2 (pSrc + (2 * l));
in = ((int16_t) (S & 0xFFFF)) >> 1;
S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
R = __QSUB16(T, S);
- _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+ write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
#ifndef ARM_MATH_BIG_ENDIAN
-
out1 = __SMUSD(coeff, R) >> 16;
out2 = __SMUADX(coeff, R);
#else
-
out1 = __SMUADX(R, coeff) >> 16U;
out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-#endif // #ifndef ARM_MATH_BIG_ENDIAN
+ write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
- _SIMD32_OFFSET(pSrc + (2U * l)) =
- (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
- coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+ coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
ia = ia + twidCoefModifier;
- // loop for butterfly
+ /* loop for butterfly */
i++;
l++;
- T = _SIMD32_OFFSET(pSrc + (2 * i));
+ T = read_q15x2 (pSrc + (2 * i));
in = ((int16_t) (T & 0xFFFF)) >> 1;
T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
- S = _SIMD32_OFFSET(pSrc + (2 * l));
+ S = read_q15x2 (pSrc + (2 * l));
in = ((int16_t) (S & 0xFFFF)) >> 1;
S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
R = __QSUB16(T, S);
- _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+ write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
#ifndef ARM_MATH_BIG_ENDIAN
-
out1 = __SMUSD(coeff, R) >> 16;
out2 = __SMUADX(coeff, R);
#else
-
out1 = __SMUADX(R, coeff) >> 16U;
out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-#endif // #ifndef ARM_MATH_BIG_ENDIAN
+ write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
- _SIMD32_OFFSET(pSrc + (2U * l)) =
- (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
- } // groups loop end
+ } /* groups loop end */
twidCoefModifier = twidCoefModifier << 1U;
- // loop for stage
+ /* loop for stage */
for (k = fftLen / 2; k > 2; k = k >> 1)
{
n1 = n2;
n2 = n2 >> 1;
ia = 0;
- // loop for groups
+ /* loop for groups */
for (j = 0; j < n2; j++)
{
- coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+ coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
ia = ia + twidCoefModifier;
- // loop for butterfly
+ /* loop for butterfly */
for (i = j; i < fftLen; i += n1)
{
l = i + n2;
- T = _SIMD32_OFFSET(pSrc + (2 * i));
+ T = read_q15x2 (pSrc + (2 * i));
- S = _SIMD32_OFFSET(pSrc + (2 * l));
+ S = read_q15x2 (pSrc + (2 * l));
R = __QSUB16(T, S);
- _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+ write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
#ifndef ARM_MATH_BIG_ENDIAN
-
out1 = __SMUSD(coeff, R) >> 16;
out2 = __SMUADX(coeff, R);
-
#else
-
out1 = __SMUADX(R, coeff) >> 16U;
out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-#endif // #ifndef ARM_MATH_BIG_ENDIAN
-
- _SIMD32_OFFSET(pSrc + (2U * l)) =
- (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+ write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
i += n1;
l = i + n2;
- T = _SIMD32_OFFSET(pSrc + (2 * i));
+ T = read_q15x2 (pSrc + (2 * i));
- S = _SIMD32_OFFSET(pSrc + (2 * l));
+ S = read_q15x2 (pSrc + (2 * l));
R = __QSUB16(T, S);
- _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+ write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
#ifndef ARM_MATH_BIG_ENDIAN
-
out1 = __SMUSD(coeff, R) >> 16;
out2 = __SMUADX(coeff, R);
#else
-
out1 = __SMUADX(R, coeff) >> 16U;
out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-#endif // #ifndef ARM_MATH_BIG_ENDIAN
+ write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
- _SIMD32_OFFSET(pSrc + (2U * l)) =
- (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+ } /* butterfly loop end */
- } // butterfly loop end
-
- } // groups loop end
+ } /* groups loop end */
twidCoefModifier = twidCoefModifier << 1U;
- } // stages loop end
+ } /* stages loop end */
n1 = n2;
n2 = n2 >> 1;
ia = 0;
- // loop for groups
+ /* loop for groups */
for (j = 0; j < n2; j++)
{
- coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+ coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
ia = ia + twidCoefModifier;
- // loop for butterfly
+ /* loop for butterfly */
for (i = j; i < fftLen; i += n1)
{
l = i + n2;
- T = _SIMD32_OFFSET(pSrc + (2 * i));
+ T = read_q15x2 (pSrc + (2 * i));
- S = _SIMD32_OFFSET(pSrc + (2 * l));
+ S = read_q15x2 (pSrc + (2 * l));
R = __QSUB16(T, S);
- _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
+ write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
- _SIMD32_OFFSET(pSrc + (2U * l)) = R;
+ write_q15x2 (pSrc + (2 * l), R);
- } // butterfly loop end
+ } /* butterfly loop end */
- } // groups loop end
+ } /* groups loop end */
twidCoefModifier = twidCoefModifier << 1U;
-#else
+#else /* #if defined (ARM_MATH_DSP) */
+ uint32_t i, j, k, l;
+ uint32_t n1, n2, ia;
+ q15_t xt, yt, cosVal, sinVal;
- unsigned i, j, k, l;
- unsigned n1, n2, ia;
- q15_t xt, yt, cosVal, sinVal;
-
- //N = fftLen;
+ // N = fftLen;
n2 = fftLen;
n1 = n2;
n2 = n2 >> 1;
ia = 0;
- // loop for groups
+ /* loop for groups */
for (j = 0; j < n2; j++)
{
- cosVal = pCoef[ia * 2];
+ cosVal = pCoef[(ia * 2)];
sinVal = pCoef[(ia * 2) + 1];
ia = ia + twidCoefModifier;
- // loop for butterfly
+ /* loop for butterfly */
for (i = j; i < fftLen; i += n1)
{
l = i + n2;
@@ -646,36 +606,36 @@
pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
- pSrc[2 * i + 1] =
- ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+ pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) +
+ (pSrc[2 * i + 1] >> 1U) ) >> 1U;
- pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
- ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+ pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
+ ((int16_t) (((q31_t) yt * sinVal) >> 16)));
- pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
- ((int16_t) (((q31_t) xt * sinVal) >> 16)));
+ pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
+ ((int16_t) (((q31_t) xt * sinVal) >> 16)));
- } // butterfly loop end
+ } /* butterfly loop end */
- } // groups loop end
+ } /* groups loop end */
twidCoefModifier = twidCoefModifier << 1U;
- // loop for stage
+ /* loop for stage */
for (k = fftLen / 2; k > 2; k = k >> 1)
{
n1 = n2;
n2 = n2 >> 1;
ia = 0;
- // loop for groups
+ /* loop for groups */
for (j = 0; j < n2; j++)
{
- cosVal = pCoef[ia * 2];
+ cosVal = pCoef[(ia * 2)];
sinVal = pCoef[(ia * 2) + 1];
ia = ia + twidCoefModifier;
- // loop for butterfly
+ /* loop for butterfly */
for (i = j; i < fftLen; i += n1)
{
l = i + n2;
@@ -685,29 +645,29 @@
yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
- pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
- ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+ pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
+ ((int16_t) (((q31_t) yt * sinVal) >> 16)) );
- pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
- ((int16_t) (((q31_t) xt * sinVal) >> 16)));
+ pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
+ ((int16_t) (((q31_t) xt * sinVal) >> 16)) );
- } // butterfly loop end
+ } /* butterfly loop end */
- } // groups loop end
+ } /* groups loop end */
twidCoefModifier = twidCoefModifier << 1U;
- } // stages loop end
+ } /* stages loop end */
n1 = n2;
n2 = n2 >> 1;
ia = 0;
- cosVal = pCoef[ia * 2];
+ cosVal = pCoef[(ia * 2)];
sinVal = pCoef[(ia * 2) + 1];
ia = ia + twidCoefModifier;
- // loop for butterfly
+ /* loop for butterfly */
for (i = 0; i < fftLen; i += n1)
{
l = i + n2;
@@ -717,13 +677,13 @@
yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
- pSrc[2U * l] = xt;
+ pSrc[2 * l] = xt;
- pSrc[2U * l + 1U] = yt;
+ pSrc[2 * l + 1] = yt;
- } // groups loop end
+ } /* groups loop end */
-#endif // #if defined (ARM_MATH_DSP)
+#endif /* #if defined (ARM_MATH_DSP) */
}
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c
index c9b1537..3bd10d9 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_radix2_q31.c
* Description: Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,44 +29,43 @@
#include "arm_math.h"
void arm_radix2_butterfly_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- q31_t * pCoef,
- uint16_t twidCoefModifier);
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pCoef,
+ uint16_t twidCoefModifier);
void arm_radix2_butterfly_inverse_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- q31_t * pCoef,
- uint16_t twidCoefModifier);
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pCoef,
+ uint16_t twidCoefModifier);
void arm_bitreversal_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- uint16_t bitRevFactor,
- uint16_t * pBitRevTab);
+ q31_t * pSrc,
+ uint32_t fftLen,
+ uint16_t bitRevFactor,
+ const uint16_t * pBitRevTab);
/**
-* @ingroup groupTransforms
-*/
+ @ingroup groupTransforms
+ */
/**
-* @addtogroup ComplexFFT
-* @{
-*/
+ @addtogroup ComplexFFT
+ @{
+ */
/**
-* @details
-* @brief Processing function for the fixed-point CFFT/CIFFT.
-* @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed
-* @param[in] *S points to an instance of the fixed-point CFFT/CIFFT structure.
-* @param[in, out] *pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
-* @return none.
-*/
+ @brief Processing function for the fixed-point CFFT/CIFFT.
+ @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+ @param[in] S points to an instance of the fixed-point CFFT/CIFFT structure
+ @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+ @return none
+ */
void arm_cfft_radix2_q31(
-const arm_cfft_radix2_instance_q31 * S,
-q31_t * pSrc)
+ const arm_cfft_radix2_instance_q31 * S,
+ q31_t * pSrc)
{
if (S->ifftFlag == 1U)
@@ -84,14 +83,14 @@
}
/**
-* @} end of ComplexFFT group
-*/
+ @} end of ComplexFFT group
+ */
void arm_radix2_butterfly_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint16_t twidCoefModifier)
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pCoef,
+ uint16_t twidCoefModifier)
{
unsigned i, j, k, l, m;
@@ -216,10 +215,10 @@
void arm_radix2_butterfly_inverse_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint16_t twidCoefModifier)
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pCoef,
+ uint16_t twidCoefModifier)
{
unsigned i, j, k, l;
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c
index d6f66ae..2b8a6ca 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_radix4_f32.c
* Description: Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,47 +29,45 @@
#include "arm_math.h"
extern void arm_bitreversal_f32(
-float32_t * pSrc,
-uint16_t fftSize,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab);
+ float32_t * pSrc,
+ uint16_t fftSize,
+ uint16_t bitRevFactor,
+ const uint16_t * pBitRevTab);
void arm_radix4_butterfly_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier);
+ float32_t * pSrc,
+ uint16_t fftLen,
+ const float32_t * pCoef,
+ uint16_t twidCoefModifier);
void arm_radix4_butterfly_inverse_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier,
-float32_t onebyfftLen);
+ float32_t * pSrc,
+ uint16_t fftLen,
+ const float32_t * pCoef,
+ uint16_t twidCoefModifier,
+ float32_t onebyfftLen);
/**
-* @ingroup groupTransforms
-*/
+ @ingroup groupTransforms
+ */
/**
-* @addtogroup ComplexFFT
-* @{
-*/
+ @addtogroup ComplexFFT
+ @{
+ */
/**
-* @details
-* @brief Processing function for the floating-point Radix-4 CFFT/CIFFT.
-* @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in] *S points to an instance of the floating-point Radix-4 CFFT/CIFFT structure.
-* @param[in, out] *pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
-* @return none.
-*/
+ @brief Processing function for the floating-point Radix-4 CFFT/CIFFT.
+ @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future.
+ @param[in] S points to an instance of the floating-point Radix-4 CFFT/CIFFT structure
+ @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+ @return none
+ */
void arm_cfft_radix4_f32(
const arm_cfft_radix4_instance_f32 * S,
- float32_t * pSrc)
+ float32_t * pSrc)
{
if (S->ifftFlag == 1U)
{
@@ -91,46 +89,43 @@
}
/**
-* @} end of ComplexFFT group
-*/
+ @} end of ComplexFFT group
+ */
/* ----------------------------------------------------------------------
* Internal helper function used by the FFTs
* ---------------------------------------------------------------------- */
-/*
-* @brief Core function for the floating-point CFFT butterfly process.
-* @param[in, out] *pSrc points to the in-place buffer of floating-point data type.
-* @param[in] fftLen length of the FFT.
-* @param[in] *pCoef points to the twiddle coefficient buffer.
-* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @return none.
-*/
+/**
+ brief Core function for the floating-point CFFT butterfly process.
+ param[in,out] pSrc points to the in-place buffer of floating-point data type
+ param[in] fftLen length of the FFT
+ param[in] pCoef points to the twiddle coefficient buffer
+ param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+ return none
+ */
void arm_radix4_butterfly_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier)
+ float32_t * pSrc,
+ uint16_t fftLen,
+ const float32_t * pCoef,
+ uint16_t twidCoefModifier)
{
+ float32_t co1, co2, co3, si1, si2, si3;
+ uint32_t ia1, ia2, ia3;
+ uint32_t i0, i1, i2, i3;
+ uint32_t n1, n2, j, k;
- float32_t co1, co2, co3, si1, si2, si3;
- uint32_t ia1, ia2, ia3;
- uint32_t i0, i1, i2, i3;
- uint32_t n1, n2, j, k;
+#if defined (ARM_MATH_LOOPUNROLL)
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
- float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
- Ybminusd;
- float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
- float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
- float32_t *ptr1;
- float32_t p0,p1,p2,p3,p4,p5;
- float32_t a0,a1,a2,a3,a4,a5,a6,a7;
+ float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
+ float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
+ Ybminusd;
+ float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
+ float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
+ float32_t *ptr1;
+ float32_t p0,p1,p2,p3,p4,p5;
+ float32_t a0,a1,a2,a3,a4,a5,a6,a7;
/* Initializations for the first stage */
n2 = fftLen;
@@ -290,11 +285,11 @@
/* index calculation for the coefficients */
ia2 = ia1 + ia1;
ia3 = ia2 + ia1;
- co1 = pCoef[ia1 * 2U];
+ co1 = pCoef[(ia1 * 2U)];
si1 = pCoef[(ia1 * 2U) + 1U];
- co2 = pCoef[ia2 * 2U];
+ co2 = pCoef[(ia2 * 2U)];
si2 = pCoef[(ia2 * 2U) + 1U];
- co3 = pCoef[ia3 * 2U];
+ co3 = pCoef[(ia3 * 2U)];
si3 = pCoef[(ia3 * 2U) + 1U];
/* Twiddle coefficients index modifier */
@@ -484,11 +479,9 @@
#else
- float32_t t1, t2, r1, r2, s1, s2;
+ float32_t t1, t2, r1, r2, s1, s2;
- /* Run the below code for Cortex-M0 */
-
- /* Initializations for the fft calculation */
+ /* Initializations for the fft calculation */
n2 = fftLen;
n1 = n2;
for (k = fftLen; k > 1U; k >>= 2U)
@@ -597,42 +590,42 @@
twidCoefModifier <<= 2U;
}
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
}
-/*
-* @brief Core function for the floating-point CIFFT butterfly process.
-* @param[in, out] *pSrc points to the in-place buffer of floating-point data type.
-* @param[in] fftLen length of the FFT.
-* @param[in] *pCoef points to twiddle coefficient buffer.
-* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @param[in] onebyfftLen value of 1/fftLen.
-* @return none.
-*/
+/**
+ brief Core function for the floating-point CIFFT butterfly process.
+ param[in,out] pSrc points to the in-place buffer of floating-point data type
+ param[in] fftLen length of the FFT
+ param[in] pCoef points to twiddle coefficient buffer
+ param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+ param[in] onebyfftLen value of 1/fftLen
+ return none
+ */
void arm_radix4_butterfly_inverse_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier,
-float32_t onebyfftLen)
+ float32_t * pSrc,
+ uint16_t fftLen,
+ const float32_t * pCoef,
+ uint16_t twidCoefModifier,
+ float32_t onebyfftLen)
{
- float32_t co1, co2, co3, si1, si2, si3;
- uint32_t ia1, ia2, ia3;
- uint32_t i0, i1, i2, i3;
- uint32_t n1, n2, j, k;
+ float32_t co1, co2, co3, si1, si2, si3;
+ uint32_t ia1, ia2, ia3;
+ uint32_t i0, i1, i2, i3;
+ uint32_t n1, n2, j, k;
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
- float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
- float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
- Ybminusd;
- float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
- float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
- float32_t *ptr1;
- float32_t p0,p1,p2,p3,p4,p5,p6,p7;
- float32_t a0,a1,a2,a3,a4,a5,a6,a7;
+ float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
+ float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
+ Ybminusd;
+ float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
+ float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
+ float32_t *ptr1;
+ float32_t p0,p1,p2,p3,p4,p5,p6,p7;
+ float32_t a0,a1,a2,a3,a4,a5,a6,a7;
/* Initializations for the first stage */
@@ -1008,9 +1001,7 @@
#else
- float32_t t1, t2, r1, r2, s1, s2;
-
- /* Run the below code for Cortex-M0 */
+ float32_t t1, t2, r1, r2, s1, s2;
/* Initializations for the first stage */
n2 = fftLen;
@@ -1203,7 +1194,7 @@
pSrc[(2U * i3) + 1U] = s2 * onebyfftLen;
}
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
}
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
index 14ea487..b5ffb81 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_radix4_init_f32.c
* Description: Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,36 +30,40 @@
#include "arm_common_tables.h"
/**
- * @ingroup groupTransforms
+ @ingroup groupTransforms
*/
/**
- * @addtogroup ComplexFFT
- * @{
+ @addtogroup ComplexFFT
+ @{
*/
/**
-* @brief Initialization function for the floating-point CFFT/CIFFT.
-* @deprecated Do not use this function. It has been superceded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in,out] *S points to an instance of the floating-point CFFT/CIFFT structure.
-* @param[in] fftLen length of the FFT.
-* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-* \par
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
-*/
+ @brief Initialization function for the floating-point CFFT/CIFFT.
+ @deprecated Do not use this function. It has been superceded by \ref arm_cfft_f32 and will be removed in the future.
+ @param[in,out] S points to an instance of the floating-point CFFT/CIFFT structure
+ @param[in] fftLen length of the FFT
+ @param[in] ifftFlag flag that selects transform direction
+ - value = 0: forward transform
+ - value = 1: inverse transform
+ @param[in] bitReverseFlag flag that enables / disables bit reversal of output
+ - value = 0: disables bit reversal of output
+ - value = 1: enables bit reversal of output
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+ @par Details
+ The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+ Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
+ @par
+ The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+ Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+ @par
+ The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+ @par
+ This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
arm_status arm_cfft_radix4_init_f32(
arm_cfft_radix4_instance_f32 * S,
@@ -148,5 +152,5 @@
}
/**
- * @} end of ComplexFFT group
+ @} end of ComplexFFT group
*/
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
index ed78236..fdbf451 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_radix4_init_q15.c
* Description: Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,37 +30,42 @@
#include "arm_common_tables.h"
/**
- * @ingroup groupTransforms
+ @ingroup groupTransforms
*/
/**
- * @addtogroup ComplexFFT
- * @{
+ @addtogroup ComplexFFT
+ @{
*/
/**
-* @brief Initialization function for the Q15 CFFT/CIFFT.
-* @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed
-* @param[in,out] *S points to an instance of the Q15 CFFT/CIFFT structure.
-* @param[in] fftLen length of the FFT.
-* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-* \par
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
-*/
+ @brief Initialization function for the Q15 CFFT/CIFFT.
+ @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
+ @param[in,out] S points to an instance of the Q15 CFFT/CIFFT structure
+ @param[in] fftLen length of the FFT
+ @param[in] ifftFlag flag that selects transform direction
+ - value = 0: forward transform
+ - value = 1: inverse transform
+ @param[in] bitReverseFlag flag that enables / disables bit reversal of output
+ - value = 0: disables bit reversal of output
+ - value = 1: enables bit reversal of output
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+ @par Details
+ The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+ Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
+ @par
+ The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+ Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+ @par
+ The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+ @par
+ This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
arm_status arm_cfft_radix4_init_q15(
arm_cfft_radix4_instance_q15 * S,
@@ -136,5 +141,5 @@
}
/**
- * @} end of ComplexFFT group
+ @} end of ComplexFFT group
*/
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
index 6f11763..8bde21e 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_radix4_init_q31.c
* Description: Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,35 +30,40 @@
#include "arm_common_tables.h"
/**
- * @ingroup groupTransforms
+ @ingroup groupTransforms
*/
/**
- * @addtogroup ComplexFFT
- * @{
+ @addtogroup ComplexFFT
+ @{
*/
/**
-*
-* @brief Initialization function for the Q31 CFFT/CIFFT.
-* @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed
-* @param[in,out] *S points to an instance of the Q31 CFFT/CIFFT structure.
-* @param[in] fftLen length of the FFT.
-* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-* \par
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+
+ @brief Initialization function for the Q31 CFFT/CIFFT.
+ @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+ @param[in,out] S points to an instance of the Q31 CFFT/CIFFT structure.
+ @param[in] fftLen length of the FFT.
+ @param[in] ifftFlag flag that selects transform direction
+ - value = 0: forward transform
+ - value = 1: inverse transform
+ @param[in] bitReverseFlag flag that enables / disables bit reversal of output
+ - value = 0: disables bit reversal of output
+ - value = 1: enables bit reversal of output
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+ @par Details
+ The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+ Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
+ @par
+ The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+ Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+ @par
+ The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+ @par
+ This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
*/
arm_status arm_cfft_radix4_init_q31(
@@ -132,5 +137,5 @@
}
/**
- * @} end of ComplexFFT group
+ @} end of ComplexFFT group
*/
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c
index f3451f7..b1b9779 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c
@@ -4,13 +4,13 @@
* Description: This file has function definition of Radix-4 FFT & IFFT function and
* In-place bit reversal using bit reversal table
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -31,54 +31,52 @@
void arm_radix4_butterfly_q15(
- q15_t * pSrc16,
- uint32_t fftLen,
- q15_t * pCoef16,
- uint32_t twidCoefModifier);
+ q15_t * pSrc16,
+ uint32_t fftLen,
+ const q15_t * pCoef16,
+ uint32_t twidCoefModifier);
void arm_radix4_butterfly_inverse_q15(
- q15_t * pSrc16,
- uint32_t fftLen,
- q15_t * pCoef16,
- uint32_t twidCoefModifier);
+ q15_t * pSrc16,
+ uint32_t fftLen,
+ const q15_t * pCoef16,
+ uint32_t twidCoefModifier);
void arm_bitreversal_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- uint16_t bitRevFactor,
- uint16_t * pBitRevTab);
+ q15_t * pSrc,
+ uint32_t fftLen,
+ uint16_t bitRevFactor,
+ const uint16_t * pBitRevTab);
/**
- * @ingroup groupTransforms
+ @ingroup groupTransforms
*/
/**
- * @addtogroup ComplexFFT
- * @{
+ @addtogroup ComplexFFT
+ @{
*/
/**
- * @details
- * @brief Processing function for the Q15 CFFT/CIFFT.
- * @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed
- * @param[in] *S points to an instance of the Q15 CFFT/CIFFT structure.
- * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
- * @return none.
- *
- * \par Input and output formats:
- * \par
- * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
- * Hence the output format is different for different FFT sizes.
- * The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
- * \par
- * \image html CFFTQ15.gif "Input and Output Formats for Q15 CFFT"
- * \image html CIFFTQ15.gif "Input and Output Formats for Q15 CIFFT"
+ @brief Processing function for the Q15 CFFT/CIFFT.
+ @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
+ @param[in] S points to an instance of the Q15 CFFT/CIFFT structure.
+ @param[in,out] pSrc points to the complex data buffer. Processing occurs in-place.
+ @return none
+
+ @par Input and output formats:
+ Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+ Hence the output format is different for different FFT sizes.
+ The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
+ @par
+ \image html CFFTQ15.gif "Input and Output Formats for Q15 CFFT"
+ \image html CIFFTQ15.gif "Input and Output Formats for Q15 CIFFT"
*/
void arm_cfft_radix4_q15(
const arm_cfft_radix4_instance_q15 * S,
- q15_t * pSrc)
+ q15_t * pSrc)
{
if (S->ifftFlag == 1U)
{
@@ -100,74 +98,72 @@
}
/**
- * @} end of ComplexFFT group
+ @} end of ComplexFFT group
*/
/*
-* Radix-4 FFT algorithm used is :
-*
-* Input real and imaginary data:
-* x(n) = xa + j * ya
-* x(n+N/4 ) = xb + j * yb
-* x(n+N/2 ) = xc + j * yc
-* x(n+3N 4) = xd + j * yd
-*
-*
-* Output real and imaginary data:
-* x(4r) = xa'+ j * ya'
-* x(4r+1) = xb'+ j * yb'
-* x(4r+2) = xc'+ j * yc'
-* x(4r+3) = xd'+ j * yd'
-*
-*
-* Twiddle factors for radix-4 FFT:
-* Wn = co1 + j * (- si1)
-* W2n = co2 + j * (- si2)
-* W3n = co3 + j * (- si3)
-
-* The real and imaginary output values for the radix-4 butterfly are
-* xa' = xa + xb + xc + xd
-* ya' = ya + yb + yc + yd
-* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
-* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
-* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
-* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
-* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
-* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
-*
-*/
+ * Radix-4 FFT algorithm used is :
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 FFT:
+ * Wn = co1 + j * (- si1)
+ * W2n = co2 + j * (- si2)
+ * W3n = co3 + j * (- si3)
+
+ * The real and imaginary output values for the radix-4 butterfly are
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
+ * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
+ * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
+ * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
+ *
+ */
/**
- * @brief Core function for the Q15 CFFT butterfly process.
- * @param[in, out] *pSrc16 points to the in-place buffer of Q15 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef16 points to twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
+ @brief Core function for the Q15 CFFT butterfly process.
+ @param[in,out] pSrc16 points to the in-place buffer of Q15 data type
+ @param[in] fftLen length of the FFT
+ @param[in] pCoef16 points to twiddle coefficient buffer
+ @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+ @return none
*/
void arm_radix4_butterfly_q15(
- q15_t * pSrc16,
- uint32_t fftLen,
- q15_t * pCoef16,
- uint32_t twidCoefModifier)
+ q15_t * pSrc16,
+ uint32_t fftLen,
+ const q15_t * pCoef16,
+ uint32_t twidCoefModifier)
{
#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t R, S, T, U;
+ q31_t C1, C2, C3, out1, out2;
+ uint32_t n1, n2, ic, i0, j, k;
- q31_t R, S, T, U;
- q31_t C1, C2, C3, out1, out2;
- uint32_t n1, n2, ic, i0, j, k;
+ q15_t *ptr1;
+ q15_t *pSi0;
+ q15_t *pSi1;
+ q15_t *pSi2;
+ q15_t *pSi3;
- q15_t *ptr1;
- q15_t *pSi0;
- q15_t *pSi1;
- q15_t *pSi2;
- q15_t *pSi3;
-
- q31_t xaya, xbyb, xcyc, xdyd;
+ q31_t xaya, xbyb, xcyc, xdyd;
/* Total process is divided into three stages */
@@ -198,16 +194,18 @@
{
/* Butterfly implementation */
- /* Reading i0, i0+fftLen/2 inputs */
+ /* Reading i0, i0+fftLen/2 inputs */
/* Read ya (real), xa(imag) input */
- T = _SIMD32_OFFSET(pSi0);
- T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1
- T = __SHADD16(T, 0); // it turns out doing this twice is 2 cycles, the alternative takes 3 cycles
- //in = ((int16_t) (T & 0xFFFF)) >> 2; // alternative code that takes 3 cycles
- //T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
+ T = read_q15x2 (pSi0);
+ T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
+ T = __SHADD16(T, 0); /* it turns out doing this twice is 2 cycles, the alternative takes 3 cycles */
+/*
+ in = ((int16_t) (T & 0xFFFF)) >> 2; // alternative code that takes 3 cycles
+ T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
+*/
/* Read yc (real), xc(imag) input */
- S = _SIMD32_OFFSET(pSi2);
+ S = read_q15x2 (pSi2);
S = __SHADD16(S, 0);
S = __SHADD16(S, 0);
@@ -219,12 +217,12 @@
/* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
/* Read yb (real), xb(imag) input */
- T = _SIMD32_OFFSET(pSi1);
+ T = read_q15x2 (pSi1);
T = __SHADD16(T, 0);
T = __SHADD16(T, 0);
/* Read yd (real), xd(imag) input */
- U = _SIMD32_OFFSET(pSi3);
+ U = read_q15x2 (pSi3);
U = __SHADD16(U, 0);
U = __SHADD16(U, 0);
@@ -234,46 +232,39 @@
/* writing the butterfly processed i0 sample */
/* xa' = xa + xb + xc + xd */
/* ya' = ya + yb + yc + yd */
- _SIMD32_OFFSET(pSi0) = __SHADD16(R, T);
- pSi0 += 2;
+ write_q15x2_ia (&pSi0, __SHADD16(R, T));
/* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
R = __QSUB16(R, T);
/* co2 & si2 are read from SIMD Coefficient pointer */
- C2 = _SIMD32_OFFSET(pCoef16 + (4U * ic));
+ C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
#ifndef ARM_MATH_BIG_ENDIAN
-
/* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
out1 = __SMUAD(C2, R) >> 16U;
/* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
out2 = __SMUSDX(C2, R);
-
#else
-
/* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
out1 = __SMUSDX(R, C2) >> 16U;
/* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
out2 = __SMUAD(C2, R);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Reading i0+fftLen/4 */
/* T = packed(yb, xb) */
- T = _SIMD32_OFFSET(pSi1);
+ T = read_q15x2 (pSi1);
T = __SHADD16(T, 0);
T = __SHADD16(T, 0);
/* writing the butterfly processed i0 + fftLen/4 sample */
/* writing output(xc', yc') in little endian format */
- _SIMD32_OFFSET(pSi1) =
- (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
- pSi1 += 2;
+ write_q15x2_ia (&pSi1, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
/* Butterfly calculations */
/* U = packed(yd, xd) */
- U = _SIMD32_OFFSET(pSi3);
+ U = read_q15x2 (pSi3);
U = __SHADD16(U, 0);
U = __SHADD16(U, 0);
@@ -281,71 +272,54 @@
T = __QSUB16(T, U);
#ifndef ARM_MATH_BIG_ENDIAN
-
/* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
R = __QASX(S, T);
/* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */
S = __QSAX(S, T);
-
#else
-
/* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
R = __QSAX(S, T);
/* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */
S = __QASX(S, T);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* co1 & si1 are read from SIMD Coefficient pointer */
- C1 = _SIMD32_OFFSET(pCoef16 + (2U * ic));
+ C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
/* Butterfly process for the i0+fftLen/2 sample */
#ifndef ARM_MATH_BIG_ENDIAN
-
/* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
out1 = __SMUAD(C1, S) >> 16U;
/* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
out2 = __SMUSDX(C1, S);
-
#else
-
/* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
out1 = __SMUSDX(S, C1) >> 16U;
/* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
out2 = __SMUAD(C1, S);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* writing output(xb', yb') in little endian format */
- _SIMD32_OFFSET(pSi2) =
- ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF);
- pSi2 += 2;
-
+ write_q15x2_ia (&pSi2, ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF));
/* co3 & si3 are read from SIMD Coefficient pointer */
- C3 = _SIMD32_OFFSET(pCoef16 + (6U * ic));
+ C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
/* Butterfly process for the i0+3fftLen/4 sample */
#ifndef ARM_MATH_BIG_ENDIAN
-
/* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
out1 = __SMUAD(C3, R) >> 16U;
/* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
out2 = __SMUSDX(C3, R);
-
#else
-
/* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
out1 = __SMUSDX(R, C3) >> 16U;
/* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
out2 = __SMUAD(C3, R);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* writing output(xd', yd') in little endian format */
- _SIMD32_OFFSET(pSi3) =
- ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
- pSi3 += 2;
+ write_q15x2_ia (&pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
/* Twiddle coefficients index modifier */
ic = ic + twidCoefModifier;
@@ -372,9 +346,9 @@
for (j = 0U; j <= (n2 - 1U); j++)
{
/* index calculation for the coefficients */
- C1 = _SIMD32_OFFSET(pCoef16 + (2U * ic));
- C2 = _SIMD32_OFFSET(pCoef16 + (4U * ic));
- C3 = _SIMD32_OFFSET(pCoef16 + (6U * ic));
+ C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
+ C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
+ C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
/* Twiddle coefficients index modifier */
ic = ic + twidCoefModifier;
@@ -389,10 +363,10 @@
{
/* Reading i0, i0+fftLen/2 inputs */
/* Read ya (real), xa(imag) input */
- T = _SIMD32_OFFSET(pSi0);
+ T = read_q15x2 (pSi0);
/* Read yc (real), xc(imag) input */
- S = _SIMD32_OFFSET(pSi2);
+ S = read_q15x2 (pSi2);
/* R = packed( (ya + yc), (xa + xc)) */
R = __QADD16(T, S);
@@ -402,10 +376,10 @@
/* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
/* Read yb (real), xb(imag) input */
- T = _SIMD32_OFFSET(pSi1);
+ T = read_q15x2 (pSi1);
/* Read yd (real), xd(imag) input */
- U = _SIMD32_OFFSET(pSi3);
+ U = read_q15x2 (pSi3);
/* T = packed( (yb + yd), (xb + xd)) */
T = __QADD16(T, U);
@@ -416,51 +390,45 @@
/* ya' = ya + yb + yc + yd */
out1 = __SHADD16(R, T);
out1 = __SHADD16(out1, 0);
- _SIMD32_OFFSET(pSi0) = out1;
+ write_q15x2 (pSi0, out1);
pSi0 += 2 * n1;
/* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
R = __SHSUB16(R, T);
#ifndef ARM_MATH_BIG_ENDIAN
-
/* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
out1 = __SMUAD(C2, R) >> 16U;
/* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
out2 = __SMUSDX(C2, R);
-
#else
-
/* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
out1 = __SMUSDX(R, C2) >> 16U;
/* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
out2 = __SMUAD(C2, R);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Reading i0+3fftLen/4 */
/* Read yb (real), xb(imag) input */
- T = _SIMD32_OFFSET(pSi1);
+ T = read_q15x2 (pSi1);
/* writing the butterfly processed i0 + fftLen/4 sample */
/* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
/* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
- _SIMD32_OFFSET(pSi1) =
- ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+ write_q15x2 (pSi1, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
pSi1 += 2 * n1;
/* Butterfly calculations */
/* Read yd (real), xd(imag) input */
- U = _SIMD32_OFFSET(pSi3);
+ U = read_q15x2 (pSi3);
/* T = packed(yb-yd, xb-xd) */
T = __QSUB16(T, U);
#ifndef ARM_MATH_BIG_ENDIAN
-
/* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
R = __SHASX(S, T);
@@ -471,9 +439,7 @@
/* Butterfly process for the i0+fftLen/2 sample */
out1 = __SMUAD(C1, S) >> 16U;
out2 = __SMUSDX(C1, S);
-
#else
-
/* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
R = __SHSAX(S, T);
@@ -484,33 +450,26 @@
/* Butterfly process for the i0+fftLen/2 sample */
out1 = __SMUSDX(S, C1) >> 16U;
out2 = __SMUAD(C1, S);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
/* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
- _SIMD32_OFFSET(pSi2) =
- ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+ write_q15x2 (pSi2, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
pSi2 += 2 * n1;
/* Butterfly process for the i0+3fftLen/4 sample */
#ifndef ARM_MATH_BIG_ENDIAN
-
out1 = __SMUAD(C3, R) >> 16U;
out2 = __SMUSDX(C3, R);
-
#else
-
out1 = __SMUSDX(R, C3) >> 16U;
out2 = __SMUAD(C3, R);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
/* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
- _SIMD32_OFFSET(pSi3) =
- ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+ write_q15x2 (pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
pSi3 += 2 * n1;
}
}
@@ -536,16 +495,16 @@
do
{
/* Read xa (real), ya(imag) input */
- xaya = *__SIMD32(ptr1)++;
+ xaya = read_q15x2_ia ((q15_t **) &ptr1);
/* Read xb (real), yb(imag) input */
- xbyb = *__SIMD32(ptr1)++;
+ xbyb = read_q15x2_ia ((q15_t **) &ptr1);
/* Read xc (real), yc(imag) input */
- xcyc = *__SIMD32(ptr1)++;
+ xcyc = read_q15x2_ia ((q15_t **) &ptr1);
/* Read xd (real), yd(imag) input */
- xdyd = *__SIMD32(ptr1)++;
+ xdyd = read_q15x2_ia ((q15_t **) &ptr1);
/* R = packed((ya + yc), (xa + xc)) */
R = __QADD16(xaya, xcyc);
@@ -559,14 +518,14 @@
/* xa' = xa + xb + xc + xd */
/* ya' = ya + yb + yc + yd */
- *__SIMD32(ptr1)++ = __SHADD16(R, T);
+ write_q15x2_ia (&ptr1, __SHADD16(R, T));
/* T = packed((yb + yd), (xb + xd)) */
T = __QADD16(xbyb, xdyd);
/* xc' = (xa-xb+xc-xd) */
/* yc' = (ya-yb+yc-yd) */
- *__SIMD32(ptr1)++ = __SHSUB16(R, T);
+ write_q15x2_ia (&ptr1, __SHSUB16(R, T));
/* S = packed((ya - yc), (xa - xc)) */
S = __QSUB16(xaya, xcyc);
@@ -576,28 +535,22 @@
U = __QSUB16(xbyb, xdyd);
#ifndef ARM_MATH_BIG_ENDIAN
-
/* xb' = (xa+yb-xc-yd) */
/* yb' = (ya-xb-yc+xd) */
- *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
+ write_q15x2_ia (&ptr1, __SHSAX(S, U));
/* xd' = (xa-yb-xc+yd) */
/* yd' = (ya+xb-yc-xd) */
- *__SIMD32(ptr1)++ = __SHASX(S, U);
-
+ write_q15x2_ia (&ptr1, __SHASX(S, U));
#else
-
/* xb' = (xa+yb-xc-yd) */
/* yb' = (ya-xb-yc+xd) */
- *__SIMD32(ptr1)++ = __SHASX(S, U);
-
+ write_q15x2_ia (&ptr1, __SHASX(S, U));
/* xd' = (xa-yb-xc+yd) */
/* yd' = (ya+xb-yc-xd) */
- *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ write_q15x2_ia (&ptr1, __SHSAX(S, U));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
} while (--j);
@@ -609,13 +562,11 @@
/* output is in 5.11(q11) format for the 16 point */
-#else
+#else /* #if defined (ARM_MATH_DSP) */
- /* Run the below code for Cortex-M0 */
-
- q15_t R0, R1, S0, S1, T0, T1, U0, U1;
- q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
- uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
+ q15_t R0, R1, S0, S1, T0, T1, U0, U1;
+ q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
+ uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
/* Total process is divided into three stages */
@@ -1015,76 +966,74 @@
/**
- * @brief Core function for the Q15 CIFFT butterfly process.
- * @param[in, out] *pSrc16 points to the in-place buffer of Q15 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef16 points to twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
+ @brief Core function for the Q15 CIFFT butterfly process.
+ @param[in,out] pSrc16 points to the in-place buffer of Q15 data type
+ @param[in] fftLen length of the FFT
+ @param[in] pCoef16 points to twiddle coefficient buffer
+ @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+ @return none
*/
/*
-* Radix-4 IFFT algorithm used is :
-*
-* CIFFT uses same twiddle coefficients as CFFT function
-* x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
-*
-*
-* IFFT is implemented with following changes in equations from FFT
-*
-* Input real and imaginary data:
-* x(n) = xa + j * ya
-* x(n+N/4 ) = xb + j * yb
-* x(n+N/2 ) = xc + j * yc
-* x(n+3N 4) = xd + j * yd
-*
-*
-* Output real and imaginary data:
-* x(4r) = xa'+ j * ya'
-* x(4r+1) = xb'+ j * yb'
-* x(4r+2) = xc'+ j * yc'
-* x(4r+3) = xd'+ j * yd'
-*
-*
-* Twiddle factors for radix-4 IFFT:
-* Wn = co1 + j * (si1)
-* W2n = co2 + j * (si2)
-* W3n = co3 + j * (si3)
-
-* The real and imaginary output values for the radix-4 butterfly are
-* xa' = xa + xb + xc + xd
-* ya' = ya + yb + yc + yd
-* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
-* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
-* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
-* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
-* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
-* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
-*
-*/
+ * Radix-4 IFFT algorithm used is :
+ *
+ * CIFFT uses same twiddle coefficients as CFFT function
+ * x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
+ *
+ *
+ * IFFT is implemented with following changes in equations from FFT
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 IFFT:
+ * Wn = co1 + j * (si1)
+ * W2n = co2 + j * (si2)
+ * W3n = co3 + j * (si3)
+
+ * The real and imaginary output values for the radix-4 butterfly are
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
+ * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
+ * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
+ * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
+ *
+ */
void arm_radix4_butterfly_inverse_q15(
- q15_t * pSrc16,
- uint32_t fftLen,
- q15_t * pCoef16,
- uint32_t twidCoefModifier)
+ q15_t * pSrc16,
+ uint32_t fftLen,
+ const q15_t * pCoef16,
+ uint32_t twidCoefModifier)
{
#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q31_t R, S, T, U;
- q31_t C1, C2, C3, out1, out2;
- uint32_t n1, n2, ic, i0, j, k;
-
- q15_t *ptr1;
- q15_t *pSi0;
- q15_t *pSi1;
- q15_t *pSi2;
- q15_t *pSi3;
-
- q31_t xaya, xbyb, xcyc, xdyd;
+ q31_t R, S, T, U;
+ q31_t C1, C2, C3, out1, out2;
+ uint32_t n1, n2, ic, i0, j, k;
+
+ q15_t *ptr1;
+ q15_t *pSi0;
+ q15_t *pSi1;
+ q15_t *pSi2;
+ q15_t *pSi3;
+
+ q31_t xaya, xbyb, xcyc, xdyd;
/* Total process is divided into three stages */
@@ -1117,12 +1066,12 @@
/* Reading i0, i0+fftLen/2 inputs */
/* Read ya (real), xa(imag) input */
- T = _SIMD32_OFFSET(pSi0);
+ T = read_q15x2 (pSi0);
T = __SHADD16(T, 0);
T = __SHADD16(T, 0);
/* Read yc (real), xc(imag) input */
- S = _SIMD32_OFFSET(pSi2);
+ S = read_q15x2 (pSi2);
S = __SHADD16(S, 0);
S = __SHADD16(S, 0);
@@ -1134,12 +1083,12 @@
/* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
/* Read yb (real), xb(imag) input */
- T = _SIMD32_OFFSET(pSi1);
+ T = read_q15x2 (pSi1);
T = __SHADD16(T, 0);
T = __SHADD16(T, 0);
/* Read yd (real), xd(imag) input */
- U = _SIMD32_OFFSET(pSi3);
+ U = read_q15x2 (pSi3);
U = __SHADD16(U, 0);
U = __SHADD16(U, 0);
@@ -1149,46 +1098,39 @@
/* writing the butterfly processed i0 sample */
/* xa' = xa + xb + xc + xd */
/* ya' = ya + yb + yc + yd */
- _SIMD32_OFFSET(pSi0) = __SHADD16(R, T);
- pSi0 += 2;
+ write_q15x2_ia (&pSi0, __SHADD16(R, T));
/* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
R = __QSUB16(R, T);
/* co2 & si2 are read from SIMD Coefficient pointer */
- C2 = _SIMD32_OFFSET(pCoef16 + (4U * ic));
+ C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
#ifndef ARM_MATH_BIG_ENDIAN
-
/* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
out1 = __SMUSD(C2, R) >> 16U;
/* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
out2 = __SMUADX(C2, R);
-
#else
-
/* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
out1 = __SMUADX(C2, R) >> 16U;
/* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
out2 = __SMUSD(__QSUB16(0, C2), R);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Reading i0+fftLen/4 */
/* T = packed(yb, xb) */
- T = _SIMD32_OFFSET(pSi1);
+ T = read_q15x2 (pSi1);
T = __SHADD16(T, 0);
T = __SHADD16(T, 0);
/* writing the butterfly processed i0 + fftLen/4 sample */
/* writing output(xc', yc') in little endian format */
- _SIMD32_OFFSET(pSi1) =
- (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
- pSi1 += 2;
+ write_q15x2_ia (&pSi1, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
/* Butterfly calculations */
/* U = packed(yd, xd) */
- U = _SIMD32_OFFSET(pSi3);
+ U = read_q15x2 (pSi3);
U = __SHADD16(U, 0);
U = __SHADD16(U, 0);
@@ -1196,71 +1138,54 @@
T = __QSUB16(T, U);
#ifndef ARM_MATH_BIG_ENDIAN
-
/* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
R = __QSAX(S, T);
/* S = packed((ya-yc) + (xb- xd), (xa-xc) - (yb-yd)) */
S = __QASX(S, T);
-
#else
-
/* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
R = __QASX(S, T);
/* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */
S = __QSAX(S, T);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* co1 & si1 are read from SIMD Coefficient pointer */
- C1 = _SIMD32_OFFSET(pCoef16 + (2U * ic));
+ C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
/* Butterfly process for the i0+fftLen/2 sample */
#ifndef ARM_MATH_BIG_ENDIAN
-
/* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
out1 = __SMUSD(C1, S) >> 16U;
/* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
out2 = __SMUADX(C1, S);
-
#else
-
/* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
out1 = __SMUADX(C1, S) >> 16U;
/* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
out2 = __SMUSD(__QSUB16(0, C1), S);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* writing output(xb', yb') in little endian format */
- _SIMD32_OFFSET(pSi2) =
- ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF);
- pSi2 += 2;
-
+ write_q15x2_ia (&pSi2, ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF));
/* co3 & si3 are read from SIMD Coefficient pointer */
- C3 = _SIMD32_OFFSET(pCoef16 + (6U * ic));
+ C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
/* Butterfly process for the i0+3fftLen/4 sample */
#ifndef ARM_MATH_BIG_ENDIAN
-
/* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
out1 = __SMUSD(C3, R) >> 16U;
/* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
out2 = __SMUADX(C3, R);
-
#else
-
/* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
out1 = __SMUADX(C3, R) >> 16U;
/* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
out2 = __SMUSD(__QSUB16(0, C3), R);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* writing output(xd', yd') in little endian format */
- _SIMD32_OFFSET(pSi3) =
- ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
- pSi3 += 2;
+ write_q15x2_ia (&pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
/* Twiddle coefficients index modifier */
ic = ic + twidCoefModifier;
@@ -1287,9 +1212,9 @@
for (j = 0U; j <= (n2 - 1U); j++)
{
/* index calculation for the coefficients */
- C1 = _SIMD32_OFFSET(pCoef16 + (2U * ic));
- C2 = _SIMD32_OFFSET(pCoef16 + (4U * ic));
- C3 = _SIMD32_OFFSET(pCoef16 + (6U * ic));
+ C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
+ C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
+ C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
/* Twiddle coefficients index modifier */
ic = ic + twidCoefModifier;
@@ -1304,10 +1229,10 @@
{
/* Reading i0, i0+fftLen/2 inputs */
/* Read ya (real), xa(imag) input */
- T = _SIMD32_OFFSET(pSi0);
+ T = read_q15x2 (pSi0);
/* Read yc (real), xc(imag) input */
- S = _SIMD32_OFFSET(pSi2);
+ S = read_q15x2 (pSi2);
/* R = packed( (ya + yc), (xa + xc)) */
R = __QADD16(T, S);
@@ -1317,10 +1242,10 @@
/* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
/* Read yb (real), xb(imag) input */
- T = _SIMD32_OFFSET(pSi1);
+ T = read_q15x2 (pSi1);
/* Read yd (real), xd(imag) input */
- U = _SIMD32_OFFSET(pSi3);
+ U = read_q15x2 (pSi3);
/* T = packed( (yb + yd), (xb + xd)) */
T = __QADD16(T, U);
@@ -1331,101 +1256,84 @@
/* ya' = ya + yb + yc + yd */
out1 = __SHADD16(R, T);
out1 = __SHADD16(out1, 0);
- _SIMD32_OFFSET(pSi0) = out1;
+ write_q15x2 (pSi0, out1);
pSi0 += 2 * n1;
/* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
R = __SHSUB16(R, T);
#ifndef ARM_MATH_BIG_ENDIAN
-
/* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
out1 = __SMUSD(C2, R) >> 16U;
/* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
out2 = __SMUADX(C2, R);
-
#else
-
/* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
out1 = __SMUADX(R, C2) >> 16U;
/* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
out2 = __SMUSD(__QSUB16(0, C2), R);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Reading i0+3fftLen/4 */
/* Read yb (real), xb(imag) input */
- T = _SIMD32_OFFSET(pSi1);
+ T = read_q15x2 (pSi1);
/* writing the butterfly processed i0 + fftLen/4 sample */
/* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
/* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
- _SIMD32_OFFSET(pSi1) =
- ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+ write_q15x2 (pSi1, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
pSi1 += 2 * n1;
/* Butterfly calculations */
/* Read yd (real), xd(imag) input */
- U = _SIMD32_OFFSET(pSi3);
+ U = read_q15x2 (pSi3);
/* T = packed(yb-yd, xb-xd) */
T = __QSUB16(T, U);
#ifndef ARM_MATH_BIG_ENDIAN
-
/* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
R = __SHSAX(S, T);
/* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */
S = __SHASX(S, T);
-
/* Butterfly process for the i0+fftLen/2 sample */
out1 = __SMUSD(C1, S) >> 16U;
out2 = __SMUADX(C1, S);
-
#else
-
/* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
R = __SHASX(S, T);
/* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */
S = __SHSAX(S, T);
-
/* Butterfly process for the i0+fftLen/2 sample */
out1 = __SMUADX(S, C1) >> 16U;
out2 = __SMUSD(__QSUB16(0, C1), S);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
/* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
- _SIMD32_OFFSET(pSi2) =
- ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+ write_q15x2 (pSi2, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
pSi2 += 2 * n1;
/* Butterfly process for the i0+3fftLen/4 sample */
#ifndef ARM_MATH_BIG_ENDIAN
-
out1 = __SMUSD(C3, R) >> 16U;
out2 = __SMUADX(C3, R);
-
#else
-
out1 = __SMUADX(C3, R) >> 16U;
out2 = __SMUSD(__QSUB16(0, C3), R);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
/* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
- _SIMD32_OFFSET(pSi3) =
- ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+ write_q15x2 (pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
pSi3 += 2 * n1;
}
}
@@ -1450,16 +1358,16 @@
do
{
/* Read xa (real), ya(imag) input */
- xaya = *__SIMD32(ptr1)++;
+ xaya = read_q15x2_ia ((q15_t **) &ptr1);
/* Read xb (real), yb(imag) input */
- xbyb = *__SIMD32(ptr1)++;
+ xbyb = read_q15x2_ia ((q15_t **) &ptr1);
/* Read xc (real), yc(imag) input */
- xcyc = *__SIMD32(ptr1)++;
+ xcyc = read_q15x2_ia ((q15_t **) &ptr1);
/* Read xd (real), yd(imag) input */
- xdyd = *__SIMD32(ptr1)++;
+ xdyd = read_q15x2_ia ((q15_t **) &ptr1);
/* R = packed((ya + yc), (xa + xc)) */
R = __QADD16(xaya, xcyc);
@@ -1473,14 +1381,14 @@
/* xa' = xa + xb + xc + xd */
/* ya' = ya + yb + yc + yd */
- *__SIMD32(ptr1)++ = __SHADD16(R, T);
+ write_q15x2_ia (&ptr1, __SHADD16(R, T));
/* T = packed((yb + yd), (xb + xd)) */
T = __QADD16(xbyb, xdyd);
/* xc' = (xa-xb+xc-xd) */
/* yc' = (ya-yb+yc-yd) */
- *__SIMD32(ptr1)++ = __SHSUB16(R, T);
+ write_q15x2_ia (&ptr1, __SHSUB16(R, T));
/* S = packed((ya - yc), (xa - xc)) */
S = __QSUB16(xaya, xcyc);
@@ -1490,29 +1398,22 @@
U = __QSUB16(xbyb, xdyd);
#ifndef ARM_MATH_BIG_ENDIAN
-
/* xb' = (xa+yb-xc-yd) */
/* yb' = (ya-xb-yc+xd) */
- *__SIMD32(ptr1)++ = __SHASX(S, U);
-
+ write_q15x2_ia (&ptr1, __SHASX(S, U));
/* xd' = (xa-yb-xc+yd) */
/* yd' = (ya+xb-yc-xd) */
- *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
+ write_q15x2_ia (&ptr1, __SHSAX(S, U));
#else
-
/* xb' = (xa+yb-xc-yd) */
/* yb' = (ya-xb-yc+xd) */
- *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
+ write_q15x2_ia (&ptr1, __SHSAX(S, U));
/* xd' = (xa-yb-xc+yd) */
/* yd' = (ya+xb-yc-xd) */
- *__SIMD32(ptr1)++ = __SHASX(S, U);
-
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ write_q15x2_ia (&ptr1, __SHASX(S, U));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
} while (--j);
@@ -1524,13 +1425,11 @@
/* output is in 5.11(q11) format for the 16 point */
-#else
+#else /* arm_radix4_butterfly_inverse_q15 */
- /* Run the below code for Cortex-M0 */
-
- q15_t R0, R1, S0, S1, T0, T1, U0, U1;
- q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
- uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
+ q15_t R0, R1, S0, S1, T0, T1, U0, U1;
+ q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
+ uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
/* Total process is divided into three stages */
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c
index 0970620..4ee02a6 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c
@@ -4,13 +4,13 @@
* Description: This file has function definition of Radix-4 FFT & IFFT function and
* In-place bit reversal using bit reversal table
*
- * $Date: 10. December 2018
- * $Revision: V.1.5.2
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2018 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,54 +30,51 @@
#include "arm_math.h"
void arm_radix4_butterfly_inverse_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint32_t twidCoefModifier);
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pCoef,
+ uint32_t twidCoefModifier);
void arm_radix4_butterfly_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint32_t twidCoefModifier);
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pCoef,
+ uint32_t twidCoefModifier);
void arm_bitreversal_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab);
+ q31_t * pSrc,
+ uint32_t fftLen,
+ uint16_t bitRevFactor,
+ const uint16_t * pBitRevTab);
/**
- * @ingroup groupTransforms
+ @ingroup groupTransforms
*/
/**
- * @addtogroup ComplexFFT
- * @{
+ @addtogroup ComplexFFT
+ @{
*/
/**
- * @details
- * @brief Processing function for the Q31 CFFT/CIFFT.
- * @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed
- * @param[in] *S points to an instance of the Q31 CFFT/CIFFT structure.
- * @param[in, out] *pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
- * @return none.
- *
- * \par Input and output formats:
- * \par
- * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
- * Hence the output format is different for different FFT sizes.
- * The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
- * \par
- * \image html CFFTQ31.gif "Input and Output Formats for Q31 CFFT"
- * \image html CIFFTQ31.gif "Input and Output Formats for Q31 CIFFT"
- *
+ @brief Processing function for the Q31 CFFT/CIFFT.
+ @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+ @param[in] S points to an instance of the Q31 CFFT/CIFFT structure
+ @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+ @return none
+
+ @par Input and output formats:
+ Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+ Hence the output format is different for different FFT sizes.
+ The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
+ @par
+ \image html CFFTQ31.gif "Input and Output Formats for Q31 CFFT"
+ \image html CIFFTQ31.gif "Input and Output Formats for Q31 CIFFT"
*/
void arm_cfft_radix4_q31(
const arm_cfft_radix4_instance_q31 * S,
- q31_t * pSrc)
+ q31_t * pSrc)
{
if (S->ifftFlag == 1U)
{
@@ -99,68 +96,68 @@
}
/**
- * @} end of ComplexFFT group
+ @} end of ComplexFFT group
*/
/*
-* Radix-4 FFT algorithm used is :
-*
-* Input real and imaginary data:
-* x(n) = xa + j * ya
-* x(n+N/4 ) = xb + j * yb
-* x(n+N/2 ) = xc + j * yc
-* x(n+3N 4) = xd + j * yd
-*
-*
-* Output real and imaginary data:
-* x(4r) = xa'+ j * ya'
-* x(4r+1) = xb'+ j * yb'
-* x(4r+2) = xc'+ j * yc'
-* x(4r+3) = xd'+ j * yd'
-*
-*
-* Twiddle factors for radix-4 FFT:
-* Wn = co1 + j * (- si1)
-* W2n = co2 + j * (- si2)
-* W3n = co3 + j * (- si3)
-*
-* Butterfly implementation:
-* xa' = xa + xb + xc + xd
-* ya' = ya + yb + yc + yd
-* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
-* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
-* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
-* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
-* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
-* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
-*
-*/
+ * Radix-4 FFT algorithm used is :
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 FFT:
+ * Wn = co1 + j * (- si1)
+ * W2n = co2 + j * (- si2)
+ * W3n = co3 + j * (- si3)
+ *
+ * Butterfly implementation:
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
+ * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
+ * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
+ * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
+ *
+ */
/**
- * @brief Core function for the Q31 CFFT butterfly process.
- * @param[in, out] *pSrc points to the in-place buffer of Q31 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef points to twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
+ @brief Core function for the Q31 CFFT butterfly process.
+ @param[in,out] pSrc points to the in-place buffer of Q31 data type.
+ @param[in] fftLen length of the FFT.
+ @param[in] pCoef points to twiddle coefficient buffer.
+ @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+ @return none
*/
void arm_radix4_butterfly_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- q31_t * pCoef,
- uint32_t twidCoefModifier)
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pCoef,
+ uint32_t twidCoefModifier)
{
- uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
- q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
+ uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
+ q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
+
+ q31_t xa, xb, xc, xd;
+ q31_t ya, yb, yc, yd;
+ q31_t xa_out, xb_out, xc_out, xd_out;
+ q31_t ya_out, yb_out, yc_out, yd_out;
+
+ q31_t *ptr1;
- q31_t xa, xb, xc, xd;
- q31_t ya, yb, yc, yd;
- q31_t xa_out, xb_out, xc_out, xd_out;
- q31_t ya_out, yb_out, yc_out, yd_out;
-
- q31_t *ptr1;
- q63_t xaya, xbyb, xcyc, xdyd;
/* Total process is divided into three stages */
/* process first stage, middle stages, & last stage */
@@ -193,10 +190,10 @@
/* xa + xc */
r1 = (pSrc[(2U * i0)] >> 4U) + (pSrc[(2U * i2)] >> 4U);
/* xa - xc */
- r2 = (pSrc[2U * i0] >> 4U) - (pSrc[2U * i2] >> 4U);
+ r2 = (pSrc[(2U * i0)] >> 4U) - (pSrc[(2U * i2)] >> 4U);
/* xb + xd */
- t1 = (pSrc[2U * i1] >> 4U) + (pSrc[2U * i3] >> 4U);
+ t1 = (pSrc[(2U * i1)] >> 4U) + (pSrc[(2U * i3)] >> 4U);
/* ya + yc */
s1 = (pSrc[(2U * i0) + 1U] >> 4U) + (pSrc[(2U * i2) + 1U] >> 4U);
@@ -219,11 +216,11 @@
/* yb - yd */
t1 = (pSrc[(2U * i1) + 1U] >> 4U) - (pSrc[(2U * i3) + 1U] >> 4U);
/* xb - xd */
- t2 = (pSrc[2U * i1] >> 4U) - (pSrc[2U * i3] >> 4U);
+ t2 = (pSrc[(2U * i1)] >> 4U) - (pSrc[(2U * i3)] >> 4U);
/* index calculation for the coefficients */
ia2 = 2U * ia1;
- co2 = pCoef[ia2 * 2U];
+ co2 = pCoef[(ia2 * 2U)];
si2 = pCoef[(ia2 * 2U) + 1U];
/* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
@@ -244,7 +241,7 @@
/* (ya - yc) + (xb - xd) */
s2 = s2 + t2;
- co1 = pCoef[ia1 * 2U];
+ co1 = pCoef[(ia1 * 2U)];
si1 = pCoef[(ia1 * 2U) + 1U];
/* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
@@ -257,7 +254,7 @@
/* index calculation for the coefficients */
ia3 = 3U * ia1;
- co3 = pCoef[ia3 * 2U];
+ co3 = pCoef[(ia3 * 2U)];
si3 = pCoef[(ia3 * 2U) + 1U];
/* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
@@ -302,11 +299,11 @@
/* index calculation for the coefficients */
ia2 = ia1 + ia1;
ia3 = ia2 + ia1;
- co1 = pCoef[ia1 * 2U];
+ co1 = pCoef[(ia1 * 2U)];
si1 = pCoef[(ia1 * 2U) + 1U];
- co2 = pCoef[ia2 * 2U];
+ co2 = pCoef[(ia2 * 2U)];
si2 = pCoef[(ia2 * 2U) + 1U];
- co3 = pCoef[ia3 * 2U];
+ co3 = pCoef[(ia3 * 2U)];
si3 = pCoef[(ia3 * 2U) + 1U];
/* Twiddle coefficients index modifier */
ia1 = ia1 + twidCoefModifier;
@@ -405,53 +402,21 @@
/* Calculations of last stage */
do
{
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
/* Read xa (real), ya(imag) input */
- xaya = *__SIMD64(ptr1)++;
- xa = (q31_t) xaya;
- ya = (q31_t) (xaya >> 32);
+ xa = *ptr1++;
+ ya = *ptr1++;
/* Read xb (real), yb(imag) input */
- xbyb = *__SIMD64(ptr1)++;
- xb = (q31_t) xbyb;
- yb = (q31_t) (xbyb >> 32);
+ xb = *ptr1++;
+ yb = *ptr1++;
/* Read xc (real), yc(imag) input */
- xcyc = *__SIMD64(ptr1)++;
- xc = (q31_t) xcyc;
- yc = (q31_t) (xcyc >> 32);
+ xc = *ptr1++;
+ yc = *ptr1++;
/* Read xc (real), yc(imag) input */
- xdyd = *__SIMD64(ptr1)++;
- xd = (q31_t) xdyd;
- yd = (q31_t) (xdyd >> 32);
-
-#else
-
- /* Read xa (real), ya(imag) input */
- xaya = *__SIMD64(ptr1)++;
- ya = (q31_t) xaya;
- xa = (q31_t) (xaya >> 32);
-
- /* Read xb (real), yb(imag) input */
- xbyb = *__SIMD64(ptr1)++;
- yb = (q31_t) xbyb;
- xb = (q31_t) (xbyb >> 32);
-
- /* Read xc (real), yc(imag) input */
- xcyc = *__SIMD64(ptr1)++;
- yc = (q31_t) xcyc;
- xc = (q31_t) (xcyc >> 32);
-
- /* Read xc (real), yc(imag) input */
- xdyd = *__SIMD64(ptr1)++;
- yd = (q31_t) xdyd;
- xd = (q31_t) (xdyd >> 32);
-
-
-#endif
+ xd = *ptr1++;
+ yd = *ptr1++;
/* xa' = xa + xb + xc + xd */
xa_out = xa + xb + xc + xd;
@@ -501,70 +466,68 @@
/**
- * @brief Core function for the Q31 CIFFT butterfly process.
- * @param[in, out] *pSrc points to the in-place buffer of Q31 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef points to twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
+ @brief Core function for the Q31 CIFFT butterfly process.
+ @param[in,out] pSrc points to the in-place buffer of Q31 data type.
+ @param[in] fftLen length of the FFT.
+ @param[in] pCoef points to twiddle coefficient buffer.
+ @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+ @return none
*/
-
/*
-* Radix-4 IFFT algorithm used is :
-*
-* CIFFT uses same twiddle coefficients as CFFT Function
-* x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
-*
-*
-* IFFT is implemented with following changes in equations from FFT
-*
-* Input real and imaginary data:
-* x(n) = xa + j * ya
-* x(n+N/4 ) = xb + j * yb
-* x(n+N/2 ) = xc + j * yc
-* x(n+3N 4) = xd + j * yd
-*
-*
-* Output real and imaginary data:
-* x(4r) = xa'+ j * ya'
-* x(4r+1) = xb'+ j * yb'
-* x(4r+2) = xc'+ j * yc'
-* x(4r+3) = xd'+ j * yd'
-*
-*
-* Twiddle factors for radix-4 IFFT:
-* Wn = co1 + j * (si1)
-* W2n = co2 + j * (si2)
-* W3n = co3 + j * (si3)
-
-* The real and imaginary output values for the radix-4 butterfly are
-* xa' = xa + xb + xc + xd
-* ya' = ya + yb + yc + yd
-* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
-* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
-* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
-* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
-* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
-* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
-*
-*/
+ * Radix-4 IFFT algorithm used is :
+ *
+ * CIFFT uses same twiddle coefficients as CFFT Function
+ * x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
+ *
+ *
+ * IFFT is implemented with following changes in equations from FFT
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 IFFT:
+ * Wn = co1 + j * (si1)
+ * W2n = co2 + j * (si2)
+ * W3n = co3 + j * (si3)
+
+ * The real and imaginary output values for the radix-4 butterfly are
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
+ * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
+ * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
+ * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
+ *
+ */
void arm_radix4_butterfly_inverse_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- q31_t * pCoef,
- uint32_t twidCoefModifier)
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pCoef,
+ uint32_t twidCoefModifier)
{
- uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
- q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
- q31_t xa, xb, xc, xd;
- q31_t ya, yb, yc, yd;
- q31_t xa_out, xb_out, xc_out, xd_out;
- q31_t ya_out, yb_out, yc_out, yd_out;
-
- q31_t *ptr1;
- q63_t xaya, xbyb, xcyc, xdyd;
+ uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
+ q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
+ q31_t xa, xb, xc, xd;
+ q31_t ya, yb, yc, yd;
+ q31_t xa_out, xb_out, xc_out, xd_out;
+ q31_t ya_out, yb_out, yc_out, yd_out;
+
+ q31_t *ptr1;
/* input is be 1.31(q31) format for all FFT sizes */
/* Total process is divided into three stages */
@@ -584,7 +547,6 @@
do
{
-
/* input is in 1.31(q31) format and provide 4 guard bits for the input */
/* index calculation for the input as, */
@@ -700,11 +662,11 @@
/* index calculation for the coefficients */
ia2 = ia1 + ia1;
ia3 = ia2 + ia1;
- co1 = pCoef[ia1 * 2U];
+ co1 = pCoef[(ia1 * 2U)];
si1 = pCoef[(ia1 * 2U) + 1U];
- co2 = pCoef[ia2 * 2U];
+ co2 = pCoef[(ia2 * 2U)];
si2 = pCoef[(ia2 * 2U) + 1U];
- co3 = pCoef[ia3 * 2U];
+ co3 = pCoef[(ia3 * 2U)];
si3 = pCoef[(ia3 * 2U) + 1U];
/* Twiddle coefficients index modifier */
ia1 = ia1 + twidCoefModifier;
@@ -753,9 +715,8 @@
((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U;
/* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
- pSrc[(2U * i1) + 1U] =
- (((int32_t) (((q63_t) s1 * co2) >> 32U)) +
- ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U;
+ pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32U)) +
+ ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U;
/* (xa - xc) - (yb - yd) */
r1 = r2 - t1;
@@ -805,50 +766,21 @@
/* Calculations of last stage */
do
{
-#ifndef ARM_MATH_BIG_ENDIAN
/* Read xa (real), ya(imag) input */
- xaya = *__SIMD64(ptr1)++;
- xa = (q31_t) xaya;
- ya = (q31_t) (xaya >> 32);
+ xa = *ptr1++;
+ ya = *ptr1++;
/* Read xb (real), yb(imag) input */
- xbyb = *__SIMD64(ptr1)++;
- xb = (q31_t) xbyb;
- yb = (q31_t) (xbyb >> 32);
+ xb = *ptr1++;
+ yb = *ptr1++;
/* Read xc (real), yc(imag) input */
- xcyc = *__SIMD64(ptr1)++;
- xc = (q31_t) xcyc;
- yc = (q31_t) (xcyc >> 32);
+ xc = *ptr1++;
+ yc = *ptr1++;
/* Read xc (real), yc(imag) input */
- xdyd = *__SIMD64(ptr1)++;
- xd = (q31_t) xdyd;
- yd = (q31_t) (xdyd >> 32);
-
-#else
-
- /* Read xa (real), ya(imag) input */
- xaya = *__SIMD64(ptr1)++;
- ya = (q31_t) xaya;
- xa = (q31_t) (xaya >> 32);
-
- /* Read xb (real), yb(imag) input */
- xbyb = *__SIMD64(ptr1)++;
- yb = (q31_t) xbyb;
- xb = (q31_t) (xbyb >> 32);
-
- /* Read xc (real), yc(imag) input */
- xcyc = *__SIMD64(ptr1)++;
- yc = (q31_t) xcyc;
- xc = (q31_t) (xcyc >> 32);
-
- /* Read xc (real), yc(imag) input */
- xdyd = *__SIMD64(ptr1)++;
- yd = (q31_t) xdyd;
- xd = (q31_t) (xdyd >> 32);
-
-#endif
+ xd = *ptr1++;
+ yd = *ptr1++;
/* xa' = xa + xb + xc + xd */
xa_out = xa + xb + xc + xd;
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c
index b70ab38..717cbef 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_radix8_f32.c
* Description: Radix-8 Decimation in Frequency CFFT & CIFFT Floating point processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -33,20 +33,20 @@
* Internal helper function used by the FFTs
* -------------------------------------------------------------------- */
-/*
-* @brief Core function for the floating-point CFFT butterfly process.
-* @param[in, out] *pSrc points to the in-place buffer of floating-point data type.
-* @param[in] fftLen length of the FFT.
-* @param[in] *pCoef points to the twiddle coefficient buffer.
-* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @return none.
+/**
+ brief Core function for the floating-point CFFT butterfly process.
+ param[in,out] pSrc points to the in-place buffer of floating-point data type.
+ param[in] fftLen length of the FFT.
+ param[in] pCoef points to the twiddle coefficient buffer.
+ param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+ return none
*/
void arm_radix8_butterfly_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-const float32_t * pCoef,
-uint16_t twidCoefModifier)
+ float32_t * pSrc,
+ uint16_t fftLen,
+ const float32_t * pCoef,
+ uint16_t twidCoefModifier)
{
uint32_t ia1, ia2, ia3, ia4, ia5, ia6, ia7;
uint32_t i1, i2, i3, i4, i5, i6, i7, i8;
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c b/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c
index 231c79a..4b77c4c 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c
@@ -3,13 +3,13 @@
* Title: arm_dct4_f32.c
* Description: Processing function of DCT4 & IDCT4 F32
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,109 +29,111 @@
#include "arm_math.h"
/**
- * @ingroup groupTransforms
+ @ingroup groupTransforms
*/
/**
- * @defgroup DCT4_IDCT4 DCT Type IV Functions
- * Representation of signals by minimum number of values is important for storage and transmission.
- * The possibility of large discontinuity between the beginning and end of a period of a signal
- * in DFT can be avoided by extending the signal so that it is even-symmetric.
- * Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the
- * spectrum and is very widely used in signal and image coding applications.
- * The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions.
- * DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular.
- *
- * DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal.
- * Reordering of the input data makes the computation of DCT just a problem of
- * computing the DFT of a real signal with a few additional operations.
- * This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations.
- *
- * DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used.
- * DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing.
- * DCT2 implementation can be described in the following steps:
- * - Re-ordering input
- * - Calculating Real FFT
- * - Multiplication of weights and Real FFT output and getting real part from the product.
- *
- * This process is explained by the block diagram below:
- * \image html DCT4.gif "Discrete Cosine Transform - type-IV"
- *
- * \par Algorithm:
- * The N-point type-IV DCT is defined as a real, linear transformation by the formula:
- * \image html DCT4Equation.gif
- * where <code>k = 0,1,2,.....N-1</code>
- *\par
- * Its inverse is defined as follows:
- * \image html IDCT4Equation.gif
- * where <code>n = 0,1,2,.....N-1</code>
- *\par
- * The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N).
- * The symmetry of the transform matrix indicates that the fast algorithms for the forward
- * and inverse transform computation are identical.
- * Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both.
- *
- * \par Lengths supported by the transform:
- * As DCT4 internally uses Real FFT, it supports all the lengths 128, 512, 2048 and 8192.
- * The library provides separate functions for Q15, Q31, and floating-point data types.
- * \par Instance Structure
- * The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure.
- * A separate instance structure must be defined for each transform.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Initializes Real FFT as its process function is used internally in DCT4, by calling arm_rfft_init_f32().
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * Manually initialize the instance structure as follows:
- * <pre>
- *arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
- *arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
- *arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
- * </pre>
- * where \c N is the length of the DCT4; \c Nby2 is half of the length of the DCT4;
- * \c normalize is normalizing factor used and is equal to <code>sqrt(2/N)</code>;
- * \c pTwiddle points to the twiddle factor table;
- * \c pCosFactor points to the cosFactor table;
- * \c pRfft points to the real FFT instance;
- * \c pCfft points to the complex FFT instance;
- * The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32()
- * and arm_rfft_f32() respectively for details regarding static initialization.
- *
- * \par Fixed-Point Behavior
- * Care must be taken when using the fixed-point versions of the DCT4 transform functions.
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
- * Refer to the function specific documentation below for usage guidelines.
+ @defgroup DCT4_IDCT4 DCT Type IV Functions
+
+ Representation of signals by minimum number of values is important for storage and transmission.
+ The possibility of large discontinuity between the beginning and end of a period of a signal
+ in DFT can be avoided by extending the signal so that it is even-symmetric.
+ Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the
+ spectrum and is very widely used in signal and image coding applications.
+ The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions.
+ DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular.
+
+ DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal.
+ Reordering of the input data makes the computation of DCT just a problem of
+ computing the DFT of a real signal with a few additional operations.
+ This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations.
+
+ DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used.
+ DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing.
+ DCT2 implementation can be described in the following steps:
+ - Re-ordering input
+ - Calculating Real FFT
+ - Multiplication of weights and Real FFT output and getting real part from the product.
+
+ This process is explained by the block diagram below:
+ \image html DCT4.gif "Discrete Cosine Transform - type-IV"
+
+ @par Algorithm
+ The N-point type-IV DCT is defined as a real, linear transformation by the formula:
+ \image html DCT4Equation.gif
+ where <code>k = 0, 1, 2, ..., N-1</code>
+ @par
+ Its inverse is defined as follows:
+ \image html IDCT4Equation.gif
+ where <code>n = 0, 1, 2, ..., N-1</code>
+ @par
+ The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N).
+ The symmetry of the transform matrix indicates that the fast algorithms for the forward
+ and inverse transform computation are identical.
+ Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both.
+
+ @par Lengths supported by the transform:
+ As DCT4 internally uses Real FFT, it supports all the lengths 128, 512, 2048 and 8192.
+ The library provides separate functions for Q15, Q31, and floating-point data types.
+
+ @par Instance Structure
+ The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure.
+ A separate instance structure must be defined for each transform.
+ There are separate instance structure declarations for each of the 3 supported data types.
+
+ @par Initialization Functions
+ There is also an associated initialization function for each data type.
+ The initialization function performs the following operations:
+ - Sets the values of the internal structure fields.
+ - Initializes Real FFT as its process function is used internally in DCT4, by calling \ref arm_rfft_init_f32().
+ @par
+ Use of the initialization function is optional.
+ However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+ To place an instance structure into a const data section, the instance structure must be manually initialized.
+ Manually initialize the instance structure as follows:
+ <pre>
+ arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+ arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+ arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+ </pre>
+ where \c N is the length of the DCT4; \c Nby2 is half of the length of the DCT4;
+ \c normalize is normalizing factor used and is equal to <code>sqrt(2/N)</code>;
+ \c pTwiddle points to the twiddle factor table;
+ \c pCosFactor points to the cosFactor table;
+ \c pRfft points to the real FFT instance;
+ \c pCfft points to the complex FFT instance;
+ The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32()
+ and arm_rfft_f32() respectively for details regarding static initialization.
+
+ @par Fixed-Point Behavior
+ Care must be taken when using the fixed-point versions of the DCT4 transform functions.
+ In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+ Refer to the function specific documentation below for usage guidelines.
*/
/**
- * @addtogroup DCT4_IDCT4
- * @{
+ @addtogroup DCT4_IDCT4
+ @{
*/
/**
- * @brief Processing function for the floating-point DCT4/IDCT4.
- * @param[in] *S points to an instance of the floating-point DCT4/IDCT4 structure.
- * @param[in] *pState points to state buffer.
- * @param[in,out] *pInlineBuffer points to the in-place input and output buffer.
- * @return none.
+ @brief Processing function for the floating-point DCT4/IDCT4.
+ @param[in] S points to an instance of the floating-point DCT4/IDCT4 structure
+ @param[in] pState points to state buffer
+ @param[in,out] pInlineBuffer points to the in-place input and output buffer
+ @return none
*/
void arm_dct4_f32(
const arm_dct4_instance_f32 * S,
- float32_t * pState,
- float32_t * pInlineBuffer)
+ float32_t * pState,
+ float32_t * pInlineBuffer)
{
- uint32_t i; /* Loop counter */
- float32_t *weights = S->pTwiddle; /* Pointer to the Weights table */
- float32_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */
- float32_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and pState buffer */
- float32_t in; /* Temporary variable */
+ const float32_t *weights = S->pTwiddle; /* Pointer to the Weights table */
+ const float32_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */
+ float32_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and pState buffer */
+ float32_t in; /* Temporary variable */
+ uint32_t i; /* Loop counter */
/* DCT4 computation involves DCT2 (which is calculated using RFFT)
@@ -153,13 +155,13 @@
* (d) Multiplying the output with the normalizing factor sqrt(2/N).
*/
- /*-------- Pre-processing ------------*/
+ /*-------- Pre-processing ------------*/
/* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N);
arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N);
/* ----------------------------------------------------------------
- * Step1: Re-ordering of even and odd elements as,
+ * Step1: Re-ordering of even and odd elements as
* pState[i] = pInlineBuffer[2*i] and
* pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
---------------------------------------------------------------------*/
@@ -173,12 +175,11 @@
/* pbuff initialized to input buffer */
pbuff = pInlineBuffer;
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
/* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
- i = (uint32_t) S->Nby2 >> 2U;
+ i = S->Nby2 >> 2U;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
@@ -199,7 +200,7 @@
*pS1++ = *pbuff++;
*pS2-- = *pbuff++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
} while (i > 0U);
@@ -210,7 +211,7 @@
pS1 = pState;
/* Initializing the loop counter to N/4 instead of N for loop unrolling */
- i = (uint32_t) S->N >> 2U;
+ i = S->N >> 2U;
/* Processing with loop unrolling 4 times as N is always multiple of 4.
* Compute 4 outputs at a time */
@@ -231,12 +232,12 @@
* Step2: Calculate RFFT for N-point input
* ---------------------------------------------------------- */
/* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
- arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
+ arm_rfft_f32 (S->pRfft, pInlineBuffer, pState);
- /*----------------------------------------------------------------------
- * Step3: Multiply the FFT output with the weights.
- *----------------------------------------------------------------------*/
- arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
+ /*----------------------------------------------------------------------
+ * Step3: Multiply the FFT output with the weights.
+ *----------------------------------------------------------------------*/
+ arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N);
/* ----------- Post-processing ---------- */
/* DCT-IV can be obtained from DCT-II by the equation,
@@ -245,7 +246,7 @@
/* Getting only real part from the output and Converting to DCT-IV */
/* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
- i = ((uint32_t) S->N - 1U) >> 2U;
+ i = (S->N - 1U) >> 2U;
/* pbuff initialized to input buffer. */
pbuff = pInlineBuffer;
@@ -290,7 +291,7 @@
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
- i = ((uint32_t) S->N - 1U) % 0x4U;
+ i = (S->N - 1U) % 0x4U;
while (i > 0U)
{
@@ -298,6 +299,7 @@
/* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
in = *pS1++ - in;
*pbuff++ = in;
+
/* points to the next real value */
pS1++;
@@ -306,10 +308,10 @@
}
- /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+ /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
/* Initializing the loop counter to N/4 instead of N for loop unrolling */
- i = (uint32_t) S->N >> 2U;
+ i = S->N >> 2U;
/* pbuff initialized to the pInlineBuffer(now contains the output values) */
pbuff = pInlineBuffer;
@@ -337,10 +339,8 @@
#else
- /* Run the below code for Cortex-M0 */
-
/* Initializing the loop counter to N/2 */
- i = (uint32_t) S->Nby2;
+ i = S->Nby2;
do
{
@@ -361,7 +361,7 @@
pS1 = pState;
/* Initializing the loop counter */
- i = (uint32_t) S->N;
+ i = S->N;
do
{
@@ -377,12 +377,12 @@
* Step2: Calculate RFFT for N-point input
* ---------------------------------------------------------- */
/* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
- arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
+ arm_rfft_f32 (S->pRfft, pInlineBuffer, pState);
- /*----------------------------------------------------------------------
- * Step3: Multiply the FFT output with the weights.
- *----------------------------------------------------------------------*/
- arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
+ /*----------------------------------------------------------------------
+ * Step3: Multiply the FFT output with the weights.
+ *----------------------------------------------------------------------*/
+ arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N);
/* ----------- Post-processing ---------- */
/* DCT-IV can be obtained from DCT-II by the equation,
@@ -405,7 +405,7 @@
pS1++;
/* Initializing the loop counter */
- i = ((uint32_t) S->N - 1U);
+ i = (S->N - 1U);
do
{
@@ -413,21 +413,20 @@
/* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
in = *pS1++ - in;
*pbuff++ = in;
+
/* points to the next real value */
pS1++;
-
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
} while (i > 0U);
+ /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
- /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+ /* Initializing loop counter */
+ i = S->N;
- /* Initializing the loop counter */
- i = (uint32_t) S->N;
-
- /* pbuff initialized to the pInlineBuffer(now contains the output values) */
+ /* pbuff initialized to the pInlineBuffer (now contains the output values) */
pbuff = pInlineBuffer;
do
@@ -436,14 +435,14 @@
in = *pbuff;
*pbuff++ = in * S->normalize;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
} while (i > 0U);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
}
/**
- * @} end of DCT4_IDCT4 group
- */
+ @} end of DCT4_IDCT4 group
+ */
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c b/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c
index 9b39cd4..32735ce 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_dct4_init_f32.c
* Description: Initialization function of DCT-4 & IDCT4 F32
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,1023 +29,533 @@
#include "arm_math.h"
/**
- * @ingroup DCT4_IDCT4
+ @ingroup DCT4_IDCT4
*/
/**
- * @addtogroup DCT4_IDCT4_Table DCT Type IV Tables
- * @{
+ @addtogroup DCT4_IDCT4_Table DCT Type IV Tables
+ @{
*/
-/*
-* @brief Weights Table
-*/
+/**
+ @brief Weights Table
+ */
/**
- * \par
- * Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
- * \par
- * C command to generate the table
- * <pre>
- * for(i = 0; i< N; i++)
- * {
- * weights[2*i]= cos(i*c);
- * weights[(2*i)+1]= -sin(i * c);
- * } </pre>
- * \par
- * Where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
- * \par
- * In the tables below the real and imaginary values are placed alternatively, hence the
- * array length is <code>2*N</code>.
+ @par
+ Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
+ @par
+ C command to generate the table
+ <pre>
+ for(i = 0; i< N; i++)
+ {
+ weights[(2*i)] = cos (i*c);
+ weights[(2*i)+1] = -sin (i*c);
+ } </pre>
+ @par
+ where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
+ @par
+ In the tables below the real and imaginary values are placed alternatively, hence the
+ array length is <code>2*N</code>.
*/
static const float32_t Weights_128[256] = {
- 1.000000000000000000f, 0.000000000000000000f, 0.999924701839144500f,
- -0.012271538285719925f,
- 0.999698818696204250f, -0.024541228522912288f, 0.999322384588349540f,
- -0.036807222941358832f,
- 0.998795456205172410f, -0.049067674327418015f, 0.998118112900149180f,
- -0.061320736302208578f,
- 0.997290456678690210f, -0.073564563599667426f, 0.996312612182778000f,
- -0.085797312344439894f,
- 0.995184726672196930f, -0.098017140329560604f, 0.993906970002356060f,
- -0.110222207293883060f,
- 0.992479534598709970f, -0.122410675199216200f, 0.990902635427780010f,
- -0.134580708507126170f,
- 0.989176509964781010f, -0.146730474455361750f, 0.987301418157858430f,
- -0.158858143333861450f,
- 0.985277642388941220f, -0.170961888760301220f, 0.983105487431216290f,
- -0.183039887955140950f,
- 0.980785280403230430f, -0.195090322016128250f, 0.978317370719627650f,
- -0.207111376192218560f,
- 0.975702130038528570f, -0.219101240156869800f, 0.972939952205560180f,
- -0.231058108280671110f,
- 0.970031253194543970f, -0.242980179903263870f, 0.966976471044852070f,
- -0.254865659604514570f,
- 0.963776065795439840f, -0.266712757474898370f, 0.960430519415565790f,
- -0.278519689385053060f,
- 0.956940335732208820f, -0.290284677254462330f, 0.953306040354193860f,
- -0.302005949319228080f,
- 0.949528180593036670f, -0.313681740398891520f, 0.945607325380521280f,
- -0.325310292162262930f,
- 0.941544065183020810f, -0.336889853392220050f, 0.937339011912574960f,
- -0.348418680249434560f,
- 0.932992798834738960f, -0.359895036534988110f, 0.928506080473215590f,
- -0.371317193951837540f,
- 0.923879532511286740f, -0.382683432365089780f, 0.919113851690057770f,
- -0.393992040061048100f,
- 0.914209755703530690f, -0.405241314004989860f, 0.909167983090522380f,
- -0.416429560097637150f,
- 0.903989293123443340f, -0.427555093430282080f, 0.898674465693953820f,
- -0.438616238538527660f,
- 0.893224301195515320f, -0.449611329654606540f, 0.887639620402853930f,
- -0.460538710958240010f,
- 0.881921264348355050f, -0.471396736825997640f, 0.876070094195406600f,
- -0.482183772079122720f,
- 0.870086991108711460f, -0.492898192229784040f, 0.863972856121586810f,
- -0.503538383725717580f,
- 0.857728610000272120f, -0.514102744193221660f, 0.851355193105265200f,
- -0.524589682678468950f,
- 0.844853565249707120f, -0.534997619887097150f, 0.838224705554838080f,
- -0.545324988422046460f,
- 0.831469612302545240f, -0.555570233019602180f, 0.824589302785025290f,
- -0.565731810783613120f,
- 0.817584813151583710f, -0.575808191417845340f, 0.810457198252594770f,
- -0.585797857456438860f,
- 0.803207531480644940f, -0.595699304492433360f, 0.795836904608883570f,
- -0.605511041404325550f,
- 0.788346427626606340f, -0.615231590580626820f, 0.780737228572094490f,
- -0.624859488142386340f,
- 0.773010453362736990f, -0.634393284163645490f, 0.765167265622458960f,
- -0.643831542889791390f,
- 0.757208846506484570f, -0.653172842953776760f, 0.749136394523459370f,
- -0.662415777590171780f,
- 0.740951125354959110f, -0.671558954847018330f, 0.732654271672412820f,
- -0.680600997795453020f,
- 0.724247082951467000f, -0.689540544737066830f, 0.715730825283818590f,
- -0.698376249408972920f,
- 0.707106781186547570f, -0.707106781186547460f, 0.698376249408972920f,
- -0.715730825283818590f,
- 0.689540544737066940f, -0.724247082951466890f, 0.680600997795453130f,
- -0.732654271672412820f,
- 0.671558954847018330f, -0.740951125354959110f, 0.662415777590171780f,
- -0.749136394523459260f,
- 0.653172842953776760f, -0.757208846506484460f, 0.643831542889791500f,
- -0.765167265622458960f,
- 0.634393284163645490f, -0.773010453362736990f, 0.624859488142386450f,
- -0.780737228572094380f,
- 0.615231590580626820f, -0.788346427626606230f, 0.605511041404325550f,
- -0.795836904608883460f,
- 0.595699304492433470f, -0.803207531480644830f, 0.585797857456438860f,
- -0.810457198252594770f,
- 0.575808191417845340f, -0.817584813151583710f, 0.565731810783613230f,
- -0.824589302785025290f,
- 0.555570233019602290f, -0.831469612302545240f, 0.545324988422046460f,
- -0.838224705554837970f,
- 0.534997619887097260f, -0.844853565249707010f, 0.524589682678468840f,
- -0.851355193105265200f,
- 0.514102744193221660f, -0.857728610000272120f, 0.503538383725717580f,
- -0.863972856121586700f,
- 0.492898192229784090f, -0.870086991108711350f, 0.482183772079122830f,
- -0.876070094195406600f,
- 0.471396736825997810f, -0.881921264348354940f, 0.460538710958240010f,
- -0.887639620402853930f,
- 0.449611329654606600f, -0.893224301195515320f, 0.438616238538527710f,
- -0.898674465693953820f,
- 0.427555093430282200f, -0.903989293123443340f, 0.416429560097637320f,
- -0.909167983090522270f,
- 0.405241314004989860f, -0.914209755703530690f, 0.393992040061048100f,
- -0.919113851690057770f,
- 0.382683432365089840f, -0.923879532511286740f, 0.371317193951837600f,
- -0.928506080473215480f,
- 0.359895036534988280f, -0.932992798834738850f, 0.348418680249434510f,
- -0.937339011912574960f,
- 0.336889853392220050f, -0.941544065183020810f, 0.325310292162262980f,
- -0.945607325380521280f,
- 0.313681740398891570f, -0.949528180593036670f, 0.302005949319228200f,
- -0.953306040354193750f,
- 0.290284677254462330f, -0.956940335732208940f, 0.278519689385053060f,
- -0.960430519415565790f,
- 0.266712757474898420f, -0.963776065795439840f, 0.254865659604514630f,
- -0.966976471044852070f,
- 0.242980179903263980f, -0.970031253194543970f, 0.231058108280671280f,
- -0.972939952205560070f,
- 0.219101240156869770f, -0.975702130038528570f, 0.207111376192218560f,
- -0.978317370719627650f,
- 0.195090322016128330f, -0.980785280403230430f, 0.183039887955141060f,
- -0.983105487431216290f,
- 0.170961888760301360f, -0.985277642388941220f, 0.158858143333861390f,
- -0.987301418157858430f,
- 0.146730474455361750f, -0.989176509964781010f, 0.134580708507126220f,
- -0.990902635427780010f,
- 0.122410675199216280f, -0.992479534598709970f, 0.110222207293883180f,
- -0.993906970002356060f,
- 0.098017140329560770f, -0.995184726672196820f, 0.085797312344439880f,
- -0.996312612182778000f,
- 0.073564563599667454f, -0.997290456678690210f, 0.061320736302208648f,
- -0.998118112900149180f,
- 0.049067674327418126f, -0.998795456205172410f, 0.036807222941358991f,
- -0.999322384588349540f,
- 0.024541228522912264f, -0.999698818696204250f, 0.012271538285719944f,
- -0.999924701839144500f
+ 1.000000000000000000f, 0.000000000000000000f, 0.999924701839144500f, -0.012271538285719925f,
+ 0.999698818696204250f, -0.024541228522912288f, 0.999322384588349540f, -0.036807222941358832f,
+ 0.998795456205172410f, -0.049067674327418015f, 0.998118112900149180f, -0.061320736302208578f,
+ 0.997290456678690210f, -0.073564563599667426f, 0.996312612182778000f, -0.085797312344439894f,
+ 0.995184726672196930f, -0.098017140329560604f, 0.993906970002356060f, -0.110222207293883060f,
+ 0.992479534598709970f, -0.122410675199216200f, 0.990902635427780010f, -0.134580708507126170f,
+ 0.989176509964781010f, -0.146730474455361750f, 0.987301418157858430f, -0.158858143333861450f,
+ 0.985277642388941220f, -0.170961888760301220f, 0.983105487431216290f, -0.183039887955140950f,
+ 0.980785280403230430f, -0.195090322016128250f, 0.978317370719627650f, -0.207111376192218560f,
+ 0.975702130038528570f, -0.219101240156869800f, 0.972939952205560180f, -0.231058108280671110f,
+ 0.970031253194543970f, -0.242980179903263870f, 0.966976471044852070f, -0.254865659604514570f,
+ 0.963776065795439840f, -0.266712757474898370f, 0.960430519415565790f, -0.278519689385053060f,
+ 0.956940335732208820f, -0.290284677254462330f, 0.953306040354193860f, -0.302005949319228080f,
+ 0.949528180593036670f, -0.313681740398891520f, 0.945607325380521280f, -0.325310292162262930f,
+ 0.941544065183020810f, -0.336889853392220050f, 0.937339011912574960f, -0.348418680249434560f,
+ 0.932992798834738960f, -0.359895036534988110f, 0.928506080473215590f, -0.371317193951837540f,
+ 0.923879532511286740f, -0.382683432365089780f, 0.919113851690057770f, -0.393992040061048100f,
+ 0.914209755703530690f, -0.405241314004989860f, 0.909167983090522380f, -0.416429560097637150f,
+ 0.903989293123443340f, -0.427555093430282080f, 0.898674465693953820f, -0.438616238538527660f,
+ 0.893224301195515320f, -0.449611329654606540f, 0.887639620402853930f, -0.460538710958240010f,
+ 0.881921264348355050f, -0.471396736825997640f, 0.876070094195406600f, -0.482183772079122720f,
+ 0.870086991108711460f, -0.492898192229784040f, 0.863972856121586810f, -0.503538383725717580f,
+ 0.857728610000272120f, -0.514102744193221660f, 0.851355193105265200f, -0.524589682678468950f,
+ 0.844853565249707120f, -0.534997619887097150f, 0.838224705554838080f, -0.545324988422046460f,
+ 0.831469612302545240f, -0.555570233019602180f, 0.824589302785025290f, -0.565731810783613120f,
+ 0.817584813151583710f, -0.575808191417845340f, 0.810457198252594770f, -0.585797857456438860f,
+ 0.803207531480644940f, -0.595699304492433360f, 0.795836904608883570f, -0.605511041404325550f,
+ 0.788346427626606340f, -0.615231590580626820f, 0.780737228572094490f, -0.624859488142386340f,
+ 0.773010453362736990f, -0.634393284163645490f, 0.765167265622458960f, -0.643831542889791390f,
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+ 0.724247082951467000f, -0.689540544737066830f, 0.715730825283818590f, -0.698376249408972920f,
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+ 0.689540544737066940f, -0.724247082951466890f, 0.680600997795453130f, -0.732654271672412820f,
+ 0.671558954847018330f, -0.740951125354959110f, 0.662415777590171780f, -0.749136394523459260f,
+ 0.653172842953776760f, -0.757208846506484460f, 0.643831542889791500f, -0.765167265622458960f,
+ 0.634393284163645490f, -0.773010453362736990f, 0.624859488142386450f, -0.780737228572094380f,
+ 0.615231590580626820f, -0.788346427626606230f, 0.605511041404325550f, -0.795836904608883460f,
+ 0.595699304492433470f, -0.803207531480644830f, 0.585797857456438860f, -0.810457198252594770f,
+ 0.575808191417845340f, -0.817584813151583710f, 0.565731810783613230f, -0.824589302785025290f,
+ 0.555570233019602290f, -0.831469612302545240f, 0.545324988422046460f, -0.838224705554837970f,
+ 0.534997619887097260f, -0.844853565249707010f, 0.524589682678468840f, -0.851355193105265200f,
+ 0.514102744193221660f, -0.857728610000272120f, 0.503538383725717580f, -0.863972856121586700f,
+ 0.492898192229784090f, -0.870086991108711350f, 0.482183772079122830f, -0.876070094195406600f,
+ 0.471396736825997810f, -0.881921264348354940f, 0.460538710958240010f, -0.887639620402853930f,
+ 0.449611329654606600f, -0.893224301195515320f, 0.438616238538527710f, -0.898674465693953820f,
+ 0.427555093430282200f, -0.903989293123443340f, 0.416429560097637320f, -0.909167983090522270f,
+ 0.405241314004989860f, -0.914209755703530690f, 0.393992040061048100f, -0.919113851690057770f,
+ 0.382683432365089840f, -0.923879532511286740f, 0.371317193951837600f, -0.928506080473215480f,
+ 0.359895036534988280f, -0.932992798834738850f, 0.348418680249434510f, -0.937339011912574960f,
+ 0.336889853392220050f, -0.941544065183020810f, 0.325310292162262980f, -0.945607325380521280f,
+ 0.313681740398891570f, -0.949528180593036670f, 0.302005949319228200f, -0.953306040354193750f,
+ 0.290284677254462330f, -0.956940335732208940f, 0.278519689385053060f, -0.960430519415565790f,
+ 0.266712757474898420f, -0.963776065795439840f, 0.254865659604514630f, -0.966976471044852070f,
+ 0.242980179903263980f, -0.970031253194543970f, 0.231058108280671280f, -0.972939952205560070f,
+ 0.219101240156869770f, -0.975702130038528570f, 0.207111376192218560f, -0.978317370719627650f,
+ 0.195090322016128330f, -0.980785280403230430f, 0.183039887955141060f, -0.983105487431216290f,
+ 0.170961888760301360f, -0.985277642388941220f, 0.158858143333861390f, -0.987301418157858430f,
+ 0.146730474455361750f, -0.989176509964781010f, 0.134580708507126220f, -0.990902635427780010f,
+ 0.122410675199216280f, -0.992479534598709970f, 0.110222207293883180f, -0.993906970002356060f,
+ 0.098017140329560770f, -0.995184726672196820f, 0.085797312344439880f, -0.996312612182778000f,
+ 0.073564563599667454f, -0.997290456678690210f, 0.061320736302208648f, -0.998118112900149180f,
+ 0.049067674327418126f, -0.998795456205172410f, 0.036807222941358991f, -0.999322384588349540f,
+ 0.024541228522912264f, -0.999698818696204250f, 0.012271538285719944f, -0.999924701839144500f
};
static const float32_t Weights_512[1024] = {
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static const float32_t Weights_2048[4096] = {
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+ 0.980484861773469380f, -0.196594597670080220f, 0.980333787223347960f, -0.197346562240965920f,
+ 0.980182135968117430f, -0.198098410717953560f, 0.980029908096990090f, -0.198850142658750090f,
+ 0.979877103699517640f, -0.199601757621130970f, 0.979723722865591170f, -0.200353255162940450f,
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+ 0.979260122649082020f, -0.202607038844421130f, 0.979104436975029250f, -0.203358062283773320f,
+ 0.978948175319062200f, -0.204108966092816870f, 0.978791337773105670f, -0.204859749829814420f,
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+ 0.978317370719627650f, -0.207111376192218560f, 0.978158230539735050f, -0.207861675225075070f,
+ 0.977998514934557140f, -0.208611851978263490f, 0.977838223998050430f, -0.209361906010474160f,
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+ 0.973293246054698250f, -0.229565365820518870f, 0.973116885359925130f, -0.230311804793845440f,
+ 0.972939952205560180f, -0.231058108280671110f, 0.972762446695688570f, -0.231804275841964780f,
+ 0.972584368934732210f, -0.232550307038775240f, 0.972405719027449770f, -0.233296201432231590f,
+ 0.972226497078936270f, -0.234041958583543430f, 0.972046703194623500f, -0.234787578054000970f,
+ 0.971866337480279400f, -0.235533059404975490f, 0.971685400042008540f, -0.236278402197919570f,
+ 0.971503890986251780f, -0.237023605994367200f, 0.971321810419786160f, -0.237768670355934190f,
+ 0.971139158449725090f, -0.238513594844318420f, 0.970955935183517970f, -0.239258379021299980f,
+ 0.970772140728950350f, -0.240003022448741500f, 0.970587775194143630f, -0.240747524688588430f,
+ 0.970402838687555500f, -0.241491885302869330f, 0.970217331317979160f, -0.242236103853696010f,
+ 0.970031253194543970f, -0.242980179903263870f, 0.969844604426714830f, -0.243724113013852160f,
+ 0.969657385124292450f, -0.244467902747824150f, 0.969469595397413060f, -0.245211548667627540f,
+ 0.969281235356548530f, -0.245955050335794590f, 0.969092305112506210f, -0.246698407314942410f,
+ 0.968902804776428870f, -0.247441619167773270f, 0.968712734459794780f, -0.248184685457074780f,
+ 0.968522094274417380f, -0.248927605745720150f, 0.968330884332445190f, -0.249670379596668570f,
+ 0.968139104746362440f, -0.250413006572965220f, 0.967946755628987800f, -0.251155486237741920f,
+ 0.967753837093475510f, -0.251897818154216970f, 0.967560349253314360f, -0.252640001885695520f,
+ 0.967366292222328510f, -0.253382036995570160f, 0.967171666114676640f, -0.254123923047320620f,
+ 0.966976471044852070f, -0.254865659604514570f, 0.966780707127683270f, -0.255607246230807380f,
+ 0.966584374478333120f, -0.256348682489942910f, 0.966387473212298900f, -0.257089967945753120f,
0.966190003445412500f, -0.257831102162158990f, 0.965991965293840570f,
-0.258572084703170340f,
0.965793358874083680f, -0.259312915132886230f, 0.965594184302976830f,
@@ -10952,17 +10462,17 @@
};
/**
-* \par
-* cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre>
-* \par
-* C command to generate the table
-* \par
-* <pre> for(i = 0; i< N; i++)
-* {
-* cos_factors[i]= 2 * cos((2*i+1)*c/2);
-* } </pre>
-* \par
-* where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
+ @par
+ cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre>
+ @par
+ C command to generate the table
+ @par
+ <pre> for(i = 0; i< N; i++)
+ {
+ cos_factors[i]= 2 * cos((2*i+1)*c/2);
+ } </pre>
+ @par
+ where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
*/
static const float32_t cos_factors_128[128] = {
0.999981175282601110f, 0.999830581795823400f, 0.999529417501093140f,
@@ -16417,27 +15927,31 @@
};
/**
- * @} end of DCT4_IDCT4_Table group
+ @} end of DCT4_IDCT4_Table group
*/
/**
- * @addtogroup DCT4_IDCT4
- * @{
+ @addtogroup DCT4_IDCT4
+ @{
*/
/**
- * @brief Initialization function for the floating-point DCT4/IDCT4.
- * @param[in,out] *S points to an instance of floating-point DCT4/IDCT4 structure.
- * @param[in] *S_RFFT points to an instance of floating-point RFFT/RIFFT structure.
- * @param[in] *S_CFFT points to an instance of floating-point CFFT/CIFFT structure.
- * @param[in] N length of the DCT4.
- * @param[in] Nby2 half of the length of the DCT4.
- * @param[in] normalize normalizing factor.
- * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
- * \par Normalizing factor:
- * The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
- * Floating-point normalizing factors are mentioned in the table below for different DCT sizes:
- * \image html dct4NormalizingF32Table.gif
+ @brief Initialization function for the floating-point DCT4/IDCT4.
+ @param[in,out] S points to an instance of floating-point DCT4/IDCT4 structure
+ @param[in] S_RFFT points to an instance of floating-point RFFT/RIFFT structure
+ @param[in] S_CFFT points to an instance of floating-point CFFT/CIFFT structure
+ @param[in] N length of the DCT4
+ @param[in] Nby2 half of the length of the DCT4
+ @param[in] normalize normalizing factor.
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : <code>N</code> is not a supported transform length
+
+ @par Normalizing factor
+ The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
+ Floating-point normalizing factors are mentioned in the table below for different DCT sizes:
+
+ \image html dct4NormalizingF32Table.gif
*/
arm_status arm_dct4_init_f32(
@@ -16448,18 +15962,18 @@
uint16_t Nby2,
float32_t normalize)
{
- /* Initialize the default arm status */
+ /* Initialize the default arm status */
arm_status status = ARM_MATH_SUCCESS;
/* Initializing the pointer array with the weight table base addresses of different lengths */
float32_t *twiddlePtr[4] =
- { (float32_t *) Weights_128, (float32_t *) Weights_512,
+ { (float32_t *) Weights_128, (float32_t *) Weights_512,
(float32_t *) Weights_2048, (float32_t *) Weights_8192
};
/* Initializing the pointer array with the cos factor table base addresses of different lengths */
float32_t *pCosFactor[4] =
- { (float32_t *) cos_factors_128, (float32_t *) cos_factors_512,
+ { (float32_t *) cos_factors_128, (float32_t *) cos_factors_512,
(float32_t *) cos_factors_2048, (float32_t *) cos_factors_8192
};
@@ -16501,7 +16015,7 @@
status = ARM_MATH_ARGUMENT_ERROR;
}
- /* Initialize the RFFT/RIFFT */
+ /* Initialize the RFFT/RIFFT Function */
arm_rfft_init_f32(S->pRfft, S->pCfft, S->N, 0U, 1U);
/* return the status of DCT4 Init function */
@@ -16509,5 +16023,5 @@
}
/**
- * @} end of DCT4_IDCT4 group
+ @} end of DCT4_IDCT4 group
*/
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c b/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c
index e57541c..62ab612 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c
@@ -3,13 +3,13 @@
* Title: arm_dct4_init_q15.c
* Description: Initialization function of DCT-4 & IDCT4 Q15
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,39 +29,39 @@
#include "arm_math.h"
/**
- * @ingroup DCT4_IDCT4
+ @ingroup DCT4_IDCT4
*/
/**
- * @addtogroup DCT4_IDCT4_Table DCT Type IV Tables
- * @{
+ @addtogroup DCT4_IDCT4_Table DCT Type IV Tables
+ @{
*/
-/*
-* @brief Weights Table
-*/
-
/**
- * \par
- * Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
- * \par
- * C command to generate the table
- * <pre>
- * for(i = 0; i< N; i++)
- * {
- * weights[2*i]= cos(i*c);
- * weights[(2*i)+1]= -sin(i * c);
- * } </pre>
- * \par
- * where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
- * \par
- * Converted the output to q15 format by multiplying with 2^31 and saturated if required.
- * \par
- * In the tables below the real and imaginary values are placed alternatively, hence the
- * array length is <code>2*N</code>.
+ @brief Weights Table
*/
-static const q15_t ALIGN4 WeightsQ15_128[256] = {
+/**
+ @par
+ Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
+ @par
+ C command to generate the table
+ <pre>
+ for(i = 0; i< N; i++)
+ {
+ weights[(2*i)] = cos(i*c);
+ weights[(2*i)+1] = -sin(i*c);
+ } </pre>
+ @par
+ where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
+ @par
+ Converted the output to q15 format by multiplying with 2^31 and saturated if required.
+ @par
+ In the tables below the real and imaginary values are placed alternatively, hence the
+ array length is <code>2*N</code>.
+ */
+
+static const q15_t __ALIGNED(4) WeightsQ15_128[256] = {
(q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7fe9, (q15_t)0xfb4a,
(q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7f87, (q15_t)0xf505,
(q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7ed5, (q15_t)0xeec7,
@@ -96,7 +96,7 @@
(q15_t)0x647, (q15_t)0x8028, (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x324, (q15_t)0x800a, (q15_t)0x192, (q15_t)0x8003
};
-static const q15_t ALIGN4 WeightsQ15_512[1024] = {
+static const q15_t __ALIGNED(4) WeightsQ15_512[1024] = {
(q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7ffe, (q15_t)0xfed3,
(q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ff8, (q15_t)0xfd41,
(q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fed, (q15_t)0xfbaf,
@@ -227,7 +227,7 @@
(q15_t)0x192, (q15_t)0x8003, (q15_t)0x12d, (q15_t)0x8002, (q15_t)0xc9, (q15_t)0x8001, (q15_t)0x64, (q15_t)0x8001
};
-static const q15_t ALIGN4 WeightsQ15_2048[4096] = {
+static const q15_t __ALIGNED(4) WeightsQ15_2048[4096] = {
(q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffb5,
(q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff6a, (q15_t)0x7fff, (q15_t)0xff51,
(q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff1e, (q15_t)0x7fff, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfeec,
@@ -742,7 +742,7 @@
(q15_t)0x64, (q15_t)0x8001, (q15_t)0x4b, (q15_t)0x8001, (q15_t)0x32, (q15_t)0x8001, (q15_t)0x19, (q15_t)0x8001
};
-static const q15_t ALIGN4 WeightsQ15_8192[16384] = {
+static const q15_t __ALIGNED(4) WeightsQ15_8192[16384] = {
(q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xfffa, (q15_t)0x7fff, (q15_t)0xfff4, (q15_t)0x7fff, (q15_t)0xffee,
(q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffe1, (q15_t)0x7fff, (q15_t)0xffdb, (q15_t)0x7fff, (q15_t)0xffd5,
(q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffc8, (q15_t)0x7fff, (q15_t)0xffc2, (q15_t)0x7fff, (q15_t)0xffbb,
@@ -2795,23 +2795,22 @@
/**
-* \par
-* cosFactor tables are generated using the formula : <pre> cos_factors[n] = 2 * cos((2n+1)*pi/(4*N)) </pre>
-* \par
-* C command to generate the table
-* <pre>
-* for(i = 0; i< N; i++)
-* {
-* cos_factors[i]= 2 * cos((2*i+1)*c/2);
-* } </pre>
-* \par
-* where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
-* \par
-* Then converted to q15 format by multiplying with 2^31 and saturated if required.
-
+ @par
+ cosFactor tables are generated using the formula : <pre> cos_factors[n] = 2 * cos((2n+1)*pi/(4*N)) </pre>
+ @par
+ C command to generate the table
+ <pre>
+ for (i = 0; i< N; i++)
+ {
+ cos_factors[i] = 2 * cos((2*i+1)*c/2);
+ } </pre>
+ @par
+ where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
+ @par
+ Then converted to q15 format by multiplying with 2^31 and saturated if required.
*/
-static const q15_t ALIGN4 cos_factorsQ15_128[128] = {
+static const q15_t __ALIGNED(4) cos_factorsQ15_128[128] = {
(q15_t)0x7fff, (q15_t)0x7ffa, (q15_t)0x7ff0, (q15_t)0x7fe1, (q15_t)0x7fce, (q15_t)0x7fb5, (q15_t)0x7f97, (q15_t)0x7f75,
(q15_t)0x7f4d, (q15_t)0x7f21, (q15_t)0x7ef0, (q15_t)0x7eba, (q15_t)0x7e7f, (q15_t)0x7e3f, (q15_t)0x7dfa, (q15_t)0x7db0,
(q15_t)0x7d62, (q15_t)0x7d0f, (q15_t)0x7cb7, (q15_t)0x7c5a, (q15_t)0x7bf8, (q15_t)0x7b92, (q15_t)0x7b26, (q15_t)0x7ab6,
@@ -2830,7 +2829,7 @@
(q15_t)0xbc3, (q15_t)0xa33, (q15_t)0x8a2, (q15_t)0x710, (q15_t)0x57f, (q15_t)0x3ed, (q15_t)0x25b, (q15_t)0xc9
};
-static const q15_t ALIGN4 cos_factorsQ15_512[512] = {
+static const q15_t __ALIGNED(4) cos_factorsQ15_512[512] = {
(q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ff9, (q15_t)0x7ff7,
(q15_t)0x7ff4, (q15_t)0x7ff2, (q15_t)0x7fee, (q15_t)0x7feb, (q15_t)0x7fe7, (q15_t)0x7fe3, (q15_t)0x7fdf, (q15_t)0x7fda,
(q15_t)0x7fd6, (q15_t)0x7fd0, (q15_t)0x7fcb, (q15_t)0x7fc5, (q15_t)0x7fbf, (q15_t)0x7fb8, (q15_t)0x7fb1, (q15_t)0x7faa,
@@ -2897,7 +2896,7 @@
(q15_t)0x2f1, (q15_t)0x28d, (q15_t)0x228, (q15_t)0x1c4, (q15_t)0x15f, (q15_t)0xfb, (q15_t)0x96, (q15_t)0x32
};
-static const q15_t ALIGN4 cos_factorsQ15_2048[2048] = {
+static const q15_t __ALIGNED(4) cos_factorsQ15_2048[2048] = {
(q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
(q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd, (q15_t)0x7ffd,
(q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffa,
@@ -3157,7 +3156,7 @@
};
-static const q15_t ALIGN4 cos_factorsQ15_8192[8192] = {
+static const q15_t __ALIGNED(4) cos_factorsQ15_8192[8192] = {
(q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
(q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
(q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
@@ -4185,27 +4184,31 @@
};
/**
- * @} end of DCT4_IDCT4_Table group
+ @} end of DCT4_IDCT4_Table group
*/
/**
- * @addtogroup DCT4_IDCT4
- * @{
+ @addtogroup DCT4_IDCT4
+ @{
*/
/**
- * @brief Initialization function for the Q15 DCT4/IDCT4.
- * @param[in,out] *S points to an instance of Q15 DCT4/IDCT4 structure.
- * @param[in] *S_RFFT points to an instance of Q15 RFFT/RIFFT structure.
- * @param[in] *S_CFFT points to an instance of Q15 CFFT/CIFFT structure.
- * @param[in] N length of the DCT4.
- * @param[in] Nby2 half of the length of the DCT4.
- * @param[in] normalize normalizing factor.
- * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
- * \par Normalizing factor:
- * The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
- * Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:
- * \image html dct4NormalizingQ15Table.gif
+ @brief Initialization function for the Q15 DCT4/IDCT4.
+ @param[in,out] S points to an instance of Q15 DCT4/IDCT4 structure
+ @param[in] S_RFFT points to an instance of Q15 RFFT/RIFFT structure
+ @param[in] S_CFFT points to an instance of Q15 CFFT/CIFFT structure
+ @param[in] N length of the DCT4
+ @param[in] Nby2 half of the length of the DCT4
+ @param[in] normalize normalizing factor
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : <code>N</code> is not a supported transform length
+
+ @par Normalizing factor
+ The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
+ Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:
+
+ \image html dct4NormalizingQ15Table.gif
*/
arm_status arm_dct4_init_q15(
@@ -4276,5 +4279,5 @@
}
/**
- * @} end of DCT4_IDCT4 group
+ @} end of DCT4_IDCT4 group
*/
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c b/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c
index 8156844..5f78f85 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_dct4_init_q31.c
* Description: Initialization function of DCT-4 & IDCT4 Q31
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,36 +29,36 @@
#include "arm_math.h"
/**
- * @ingroup DCT4_IDCT4
+ @ingroup DCT4_IDCT4
*/
/**
- * @addtogroup DCT4_IDCT4_Table DCT Type IV Tables
- * @{
+ @addtogroup DCT4_IDCT4_Table DCT Type IV Tables
+ @{
*/
-/*
-* @brief Weights Table
-*/
+/**
+ @brief Weights Table
+ */
/**
- * \par
- * Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
- * \par
- * C command to generate the table
- * <pre>
- * for(i = 0; i< N; i++)
- * {
- * weights[2*i]= cos(i*c);
- * weights[(2*i)+1]= -sin(i * c);
- * } </pre>
- * \par
- * where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
- * \par
- * Convert the output to q31 format by multiplying with 2^31 and saturated if required.
- * \par
- * In the tables below the real and imaginary values are placed alternatively, hence the
- * array length is <code>2*N</code>.
+ @par
+ Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
+ @par
+ C command to generate the table
+ <pre>
+ for (i = 0; i< N; i++)
+ {
+ weights[(2*i)] = cos(i*c);
+ weights[(2*i)+1] = -sin(i*c);
+ } </pre>
+ @par
+ where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
+ @par
+ Convert the output to q31 format by multiplying with 2^31 and saturated if required.
+ @par
+ In the tables below the real and imaginary values are placed alternatively, hence the
+ array length is <code>2*N</code>.
*/
static const q31_t WeightsQ31_128[256] = {
@@ -91,9 +91,9 @@
(q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x209f701c, (q31_t)0x843a1d70,
(q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1a82a026, (q31_t)0x82c67f14,
(q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x145576b1, (q31_t)0x81a01b6d,
- (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0xfab272b, (q31_t)0x80f66e3c, (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a,
- (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x7d95b9e, (q31_t)0x803daa6a,
- (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x1921d20, (q31_t)0x800277a6
+ (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x0fab272b, (q31_t)0x80f66e3c, (q31_t)0x0e1bc2e4, (q31_t)0x80c7a80a,
+ (q31_t)0x0c8bd35e, (q31_t)0x809dc971, (q31_t)0x0afb6805, (q31_t)0x8078d40d, (q31_t)0x096a9049, (q31_t)0x8058c94c, (q31_t)0x07d95b9e, (q31_t)0x803daa6a,
+ (q31_t)0x0647d97c, (q31_t)0x80277872, (q31_t)0x04b6195d, (q31_t)0x80163440, (q31_t)0x03242abf, (q31_t)0x8009de7e, (q31_t)0x01921d20, (q31_t)0x800277a6
};
static const q31_t WeightsQ31_512[1024] = {
@@ -215,16 +215,16 @@
(q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x132b7bf9, (q31_t)0x8171914e,
(q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x119d8941, (q31_t)0x8137c8e6,
(q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x100ee8ad, (q31_t)0x8102e3c4,
- (q31_t)0xfab272b, (q31_t)0x80f66e3c, (q31_t)0xf475bff, (q31_t)0x80ea4712, (q31_t)0xee38766, (q31_t)0x80de6e4c, (q31_t)0xe7fa99e, (q31_t)0x80d2e3f2,
- (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a, (q31_t)0xdb7d376, (q31_t)0x80bcba9d, (q31_t)0xd53db92, (q31_t)0x80b21baf, (q31_t)0xcefdb76, (q31_t)0x80a7cb49,
- (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xc27c389, (q31_t)0x8094162c, (q31_t)0xbc3ac35, (q31_t)0x808ab180, (q31_t)0xb5f8d9f, (q31_t)0x80819b74,
- (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0xa973ba5, (q31_t)0x80705b50, (q31_t)0xa3308bd, (q31_t)0x80683143, (q31_t)0x9cecf89, (q31_t)0x806055eb,
- (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x9064b3a, (q31_t)0x80518b6b, (q31_t)0x8a2009a, (q31_t)0x804a9c4d, (q31_t)0x83db0a7, (q31_t)0x8043fbf6,
- (q31_t)0x7d95b9e, (q31_t)0x803daa6a, (q31_t)0x77501be, (q31_t)0x8037a7ac, (q31_t)0x710a345, (q31_t)0x8031f3c2, (q31_t)0x6ac406f, (q31_t)0x802c8ead,
- (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x5e36ea9, (q31_t)0x8022b114, (q31_t)0x57f0035, (q31_t)0x801e3895, (q31_t)0x51a8e5c, (q31_t)0x801a0ef8,
- (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x451a177, (q31_t)0x8012a86f, (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x388a9ea, (q31_t)0x800c7d8c,
- (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x2bfa9a4, (q31_t)0x80078e5e, (q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x1f6a297, (q31_t)0x8003daf1,
- (q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0xc90f88, (q31_t)0x80009dea, (q31_t)0x6487e3, (q31_t)0x8000277a
+ (q31_t)0x0fab272b, (q31_t)0x80f66e3c, (q31_t)0x0f475bff, (q31_t)0x80ea4712, (q31_t)0x0ee38766, (q31_t)0x80de6e4c, (q31_t)0x0e7fa99e, (q31_t)0x80d2e3f2,
+ (q31_t)0x0e1bc2e4, (q31_t)0x80c7a80a, (q31_t)0x0db7d376, (q31_t)0x80bcba9d, (q31_t)0x0d53db92, (q31_t)0x80b21baf, (q31_t)0x0cefdb76, (q31_t)0x80a7cb49,
+ (q31_t)0x0c8bd35e, (q31_t)0x809dc971, (q31_t)0x0c27c389, (q31_t)0x8094162c, (q31_t)0x0bc3ac35, (q31_t)0x808ab180, (q31_t)0x0b5f8d9f, (q31_t)0x80819b74,
+ (q31_t)0x0afb6805, (q31_t)0x8078d40d, (q31_t)0x0a973ba5, (q31_t)0x80705b50, (q31_t)0x0a3308bd, (q31_t)0x80683143, (q31_t)0x09cecf89, (q31_t)0x806055eb,
+ (q31_t)0x096a9049, (q31_t)0x8058c94c, (q31_t)0x09064b3a, (q31_t)0x80518b6b, (q31_t)0x08a2009a, (q31_t)0x804a9c4d, (q31_t)0x083db0a7, (q31_t)0x8043fbf6,
+ (q31_t)0x07d95b9e, (q31_t)0x803daa6a, (q31_t)0x077501be, (q31_t)0x8037a7ac, (q31_t)0x0710a345, (q31_t)0x8031f3c2, (q31_t)0x06ac406f, (q31_t)0x802c8ead,
+ (q31_t)0x0647d97c, (q31_t)0x80277872, (q31_t)0x05e36ea9, (q31_t)0x8022b114, (q31_t)0x057f0035, (q31_t)0x801e3895, (q31_t)0x051a8e5c, (q31_t)0x801a0ef8,
+ (q31_t)0x04b6195d, (q31_t)0x80163440, (q31_t)0x0451a177, (q31_t)0x8012a86f, (q31_t)0x03ed26e6, (q31_t)0x800f6b88, (q31_t)0x0388a9ea, (q31_t)0x800c7d8c,
+ (q31_t)0x03242abf, (q31_t)0x8009de7e, (q31_t)0x02bfa9a4, (q31_t)0x80078e5e, (q31_t)0x025b26d7, (q31_t)0x80058d2f, (q31_t)0x01f6a297, (q31_t)0x8003daf1,
+ (q31_t)0x01921d20, (q31_t)0x800277a6, (q31_t)0x012d96b1, (q31_t)0x8001634e, (q31_t)0x00c90f88, (q31_t)0x80009dea, (q31_t)0x006487e3, (q31_t)0x8000277a
};
static const q31_t WeightsQ31_2048[4096] = {
@@ -737,4125 +737,2076 @@
(q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x24205e8, (q31_t)0x80051939, (q31_t)0x228e4e2, (q31_t)0x8004aa32, (q31_t)0x20fc3c6, (q31_t)0x8004401a,
(q31_t)0x1f6a297, (q31_t)0x8003daf1, (q31_t)0x1dd8154, (q31_t)0x80037ab7, (q31_t)0x1c45ffe, (q31_t)0x80031f6d, (q31_t)0x1ab3e97, (q31_t)0x8002c912,
(q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x178fb99, (q31_t)0x80022b29, (q31_t)0x15fda03, (q31_t)0x8001e39b, (q31_t)0x146b860, (q31_t)0x8001a0fd,
- (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0xfb5330, (q31_t)0x8000f6bd, (q31_t)0xe23160, (q31_t)0x8000c7dc,
- (q31_t)0xc90f88, (q31_t)0x80009dea, (q31_t)0xafeda8, (q31_t)0x800078e7, (q31_t)0x96cbc1, (q31_t)0x800058d4, (q31_t)0x7da9d4, (q31_t)0x80003daf,
- (q31_t)0x6487e3, (q31_t)0x8000277a, (q31_t)0x4b65ee, (q31_t)0x80001635, (q31_t)0x3243f5, (q31_t)0x800009df, (q31_t)0x1921fb, (q31_t)0x80000278
+ (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0x0fb5330, (q31_t)0x8000f6bd, (q31_t)0xe23160, (q31_t)0x8000c7dc,
+ (q31_t)0x0c90f88, (q31_t)0x80009dea, (q31_t)0x0afeda8, (q31_t)0x800078e7, (q31_t)0x096cbc1, (q31_t)0x800058d4, (q31_t)0x7da9d4, (q31_t)0x80003daf,
+ (q31_t)0x06487e3, (q31_t)0x8000277a, (q31_t)0x04b65ee, (q31_t)0x80001635, (q31_t)0x03243f5, (q31_t)0x800009df, (q31_t)0x1921fb, (q31_t)0x80000278
};
static const q31_t WeightsQ31_8192[16384] = {
- (q31_t)0x7fffffff, (q31_t)0x0, (q31_t)0x7fffffd9, (q31_t)0xfff9b781, (q31_t)0x7fffff62, (q31_t)0xfff36f02, (q31_t)0x7ffffe9d,
- (q31_t)0xffed2684,
- (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffffc25, (q31_t)0xffe09586, (q31_t)0x7ffffa73, (q31_t)0xffda4d08,
- (q31_t)0x7ffff872, (q31_t)0xffd40489,
- (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7ffff382, (q31_t)0xffc7738c, (q31_t)0x7ffff094, (q31_t)0xffc12b0e,
- (q31_t)0x7fffed57, (q31_t)0xffbae290,
- (q31_t)0x7fffe9cb, (q31_t)0xffb49a12, (q31_t)0x7fffe5f0, (q31_t)0xffae5195, (q31_t)0x7fffe1c6, (q31_t)0xffa80917,
- (q31_t)0x7fffdd4d, (q31_t)0xffa1c09a,
- (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffd36f, (q31_t)0xff952fa0, (q31_t)0x7fffce09, (q31_t)0xff8ee724,
- (q31_t)0x7fffc854, (q31_t)0xff889ea7,
- (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffbbfe, (q31_t)0xff7c0db0, (q31_t)0x7fffb55c, (q31_t)0xff75c535,
- (q31_t)0x7fffae6c, (q31_t)0xff6f7cba,
- (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff9f9e, (q31_t)0xff62ebc5, (q31_t)0x7fff97c1, (q31_t)0xff5ca34b,
- (q31_t)0x7fff8f94, (q31_t)0xff565ad1,
- (q31_t)0x7fff8719, (q31_t)0xff501258, (q31_t)0x7fff7e4f, (q31_t)0xff49c9df, (q31_t)0x7fff7536, (q31_t)0xff438167,
- (q31_t)0x7fff6bcd, (q31_t)0xff3d38ef,
- (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff5810, (q31_t)0xff30a801, (q31_t)0x7fff4dbb, (q31_t)0xff2a5f8b,
- (q31_t)0x7fff4317, (q31_t)0xff241715,
- (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff2ce2, (q31_t)0xff17862b, (q31_t)0x7fff2151, (q31_t)0xff113db7,
- (q31_t)0x7fff1572, (q31_t)0xff0af543,
- (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffefcc5, (q31_t)0xfefe645e, (q31_t)0x7ffeeff8, (q31_t)0xfef81bec,
- (q31_t)0x7ffee2dd, (q31_t)0xfef1d37b,
- (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a, (q31_t)0x7ffec7b9, (q31_t)0xfee5429a, (q31_t)0x7ffeb9b0, (q31_t)0xfedefa2b,
- (q31_t)0x7ffeab59, (q31_t)0xfed8b1bd,
- (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe8dbd, (q31_t)0xfecc20e2, (q31_t)0x7ffe7e79, (q31_t)0xfec5d876,
- (q31_t)0x7ffe6ee5, (q31_t)0xfebf900a,
- (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe4ed2, (q31_t)0xfeb2ff36, (q31_t)0x7ffe3e52, (q31_t)0xfeacb6cc,
- (q31_t)0x7ffe2d83, (q31_t)0xfea66e64,
- (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffe0af8, (q31_t)0xfe99dd96, (q31_t)0x7ffdf93c, (q31_t)0xfe939530,
- (q31_t)0x7ffde731, (q31_t)0xfe8d4ccb,
- (q31_t)0x7ffdd4d7, (q31_t)0xfe870467, (q31_t)0x7ffdc22e, (q31_t)0xfe80bc04, (q31_t)0x7ffdaf37, (q31_t)0xfe7a73a2,
- (q31_t)0x7ffd9bf0, (q31_t)0xfe742b41,
- (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd7476, (q31_t)0xfe679a81, (q31_t)0x7ffd6042, (q31_t)0xfe615223,
- (q31_t)0x7ffd4bc0, (q31_t)0xfe5b09c5,
- (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffd21ce, (q31_t)0xfe4e790d, (q31_t)0x7ffd0c5f, (q31_t)0xfe4830b3,
- (q31_t)0x7ffcf6a0, (q31_t)0xfe41e85a,
- (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffcca37, (q31_t)0xfe3557ab, (q31_t)0x7ffcb38c, (q31_t)0xfe2f0f55,
- (q31_t)0x7ffc9c92, (q31_t)0xfe28c700,
- (q31_t)0x7ffc8549, (q31_t)0xfe227eac, (q31_t)0x7ffc6db1, (q31_t)0xfe1c365a, (q31_t)0x7ffc55ca, (q31_t)0xfe15ee09,
- (q31_t)0x7ffc3d94, (q31_t)0xfe0fa5b8,
- (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffc0c3b, (q31_t)0xfe03151c, (q31_t)0x7ffbf319, (q31_t)0xfdfccccf,
- (q31_t)0x7ffbd9a7, (q31_t)0xfdf68484,
- (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffba5d7, (q31_t)0xfde9f3f1, (q31_t)0x7ffb8b78, (q31_t)0xfde3aba9,
- (q31_t)0x7ffb70cb, (q31_t)0xfddd6363,
- (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffb3a83, (q31_t)0xfdd0d2db, (q31_t)0x7ffb1ee9, (q31_t)0xfdca8a99,
- (q31_t)0x7ffb0300, (q31_t)0xfdc44258,
- (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18, (q31_t)0x7ffaca40, (q31_t)0xfdb7b1da, (q31_t)0x7ffaad6a, (q31_t)0xfdb1699e,
- (q31_t)0x7ffa9045, (q31_t)0xfdab2162,
- (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ffa550e, (q31_t)0xfd9e90f0, (q31_t)0x7ffa36fc, (q31_t)0xfd9848b9,
- (q31_t)0x7ffa189c, (q31_t)0xfd920084,
- (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850, (q31_t)0x7ff9daed, (q31_t)0xfd85701e, (q31_t)0x7ff9bba0, (q31_t)0xfd7f27ed,
- (q31_t)0x7ff99c03, (q31_t)0xfd78dfbd,
- (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff95bdd, (q31_t)0xfd6c4f64, (q31_t)0x7ff93b54, (q31_t)0xfd660739,
- (q31_t)0x7ff91a7b, (q31_t)0xfd5fbf10,
- (q31_t)0x7ff8f954, (q31_t)0xfd5976e9, (q31_t)0x7ff8d7de, (q31_t)0xfd532ec3, (q31_t)0x7ff8b619, (q31_t)0xfd4ce69f,
- (q31_t)0x7ff89405, (q31_t)0xfd469e7c,
- (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff84ef0, (q31_t)0xfd3a0e3d, (q31_t)0x7ff82bef, (q31_t)0xfd33c61f,
- (q31_t)0x7ff8089f, (q31_t)0xfd2d7e04,
- (q31_t)0x7ff7e500, (q31_t)0xfd2735ea, (q31_t)0x7ff7c113, (q31_t)0xfd20edd2, (q31_t)0x7ff79cd6, (q31_t)0xfd1aa5bc,
- (q31_t)0x7ff7784a, (q31_t)0xfd145da7,
- (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff72e46, (q31_t)0xfd07cd83, (q31_t)0x7ff708ce, (q31_t)0xfd018574,
- (q31_t)0x7ff6e307, (q31_t)0xfcfb3d67,
- (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c, (q31_t)0x7ff6968b, (q31_t)0xfceead52, (q31_t)0x7ff66fd7, (q31_t)0xfce8654b,
- (q31_t)0x7ff648d4, (q31_t)0xfce21d45,
- (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff5f9e1, (q31_t)0xfcd58d3f, (q31_t)0x7ff5d1f1, (q31_t)0xfccf453f,
- (q31_t)0x7ff5a9b2, (q31_t)0xfcc8fd41,
- (q31_t)0x7ff58125, (q31_t)0xfcc2b545, (q31_t)0x7ff55848, (q31_t)0xfcbc6d4c, (q31_t)0x7ff52f1d, (q31_t)0xfcb62554,
- (q31_t)0x7ff505a2, (q31_t)0xfcafdd5e,
- (q31_t)0x7ff4dbd9, (q31_t)0xfca9956a, (q31_t)0x7ff4b1c0, (q31_t)0xfca34d78, (q31_t)0x7ff48759, (q31_t)0xfc9d0588,
- (q31_t)0x7ff45ca3, (q31_t)0xfc96bd9b,
- (q31_t)0x7ff4319d, (q31_t)0xfc9075af, (q31_t)0x7ff40649, (q31_t)0xfc8a2dc6, (q31_t)0x7ff3daa6, (q31_t)0xfc83e5de,
- (q31_t)0x7ff3aeb4, (q31_t)0xfc7d9df9,
- (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff355e4, (q31_t)0xfc710e36, (q31_t)0x7ff32905, (q31_t)0xfc6ac657,
- (q31_t)0x7ff2fbd7, (q31_t)0xfc647e7b,
- (q31_t)0x7ff2ce5b, (q31_t)0xfc5e36a0, (q31_t)0x7ff2a08f, (q31_t)0xfc57eec9, (q31_t)0x7ff27275, (q31_t)0xfc51a6f3,
- (q31_t)0x7ff2440b, (q31_t)0xfc4b5f20,
- (q31_t)0x7ff21553, (q31_t)0xfc45174e, (q31_t)0x7ff1e64c, (q31_t)0xfc3ecf80, (q31_t)0x7ff1b6f6, (q31_t)0xfc3887b3,
- (q31_t)0x7ff18751, (q31_t)0xfc323fe9,
- (q31_t)0x7ff1575d, (q31_t)0xfc2bf821, (q31_t)0x7ff1271a, (q31_t)0xfc25b05c, (q31_t)0x7ff0f688, (q31_t)0xfc1f6899,
- (q31_t)0x7ff0c5a7, (q31_t)0xfc1920d8,
- (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7ff062f9, (q31_t)0xfc0c915e, (q31_t)0x7ff0312c, (q31_t)0xfc0649a5,
- (q31_t)0x7fefff0f, (q31_t)0xfc0001ee,
- (q31_t)0x7fefcca4, (q31_t)0xfbf9ba39, (q31_t)0x7fef99ea, (q31_t)0xfbf37287, (q31_t)0x7fef66e1, (q31_t)0xfbed2ad8,
- (q31_t)0x7fef3388, (q31_t)0xfbe6e32b,
- (q31_t)0x7feeffe1, (q31_t)0xfbe09b80, (q31_t)0x7feecbec, (q31_t)0xfbda53d8, (q31_t)0x7fee97a7, (q31_t)0xfbd40c33,
- (q31_t)0x7fee6313, (q31_t)0xfbcdc490,
- (q31_t)0x7fee2e30, (q31_t)0xfbc77cf0, (q31_t)0x7fedf8ff, (q31_t)0xfbc13552, (q31_t)0x7fedc37e, (q31_t)0xfbbaedb7,
- (q31_t)0x7fed8daf, (q31_t)0xfbb4a61f,
- (q31_t)0x7fed5791, (q31_t)0xfbae5e89, (q31_t)0x7fed2123, (q31_t)0xfba816f6, (q31_t)0x7fecea67, (q31_t)0xfba1cf66,
- (q31_t)0x7fecb35c, (q31_t)0xfb9b87d8,
- (q31_t)0x7fec7c02, (q31_t)0xfb95404d, (q31_t)0x7fec4459, (q31_t)0xfb8ef8c5, (q31_t)0x7fec0c62, (q31_t)0xfb88b13f,
- (q31_t)0x7febd41b, (q31_t)0xfb8269bd,
- (q31_t)0x7feb9b85, (q31_t)0xfb7c223d, (q31_t)0x7feb62a1, (q31_t)0xfb75dac0, (q31_t)0x7feb296d, (q31_t)0xfb6f9345,
- (q31_t)0x7feaefeb, (q31_t)0xfb694bce,
- (q31_t)0x7feab61a, (q31_t)0xfb630459, (q31_t)0x7fea7bfa, (q31_t)0xfb5cbce7, (q31_t)0x7fea418b, (q31_t)0xfb567578,
- (q31_t)0x7fea06cd, (q31_t)0xfb502e0c,
- (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe99064, (q31_t)0xfb439f3c, (q31_t)0x7fe954ba, (q31_t)0xfb3d57d9,
- (q31_t)0x7fe918c0, (q31_t)0xfb371078,
- (q31_t)0x7fe8dc78, (q31_t)0xfb30c91b, (q31_t)0x7fe89fe0, (q31_t)0xfb2a81c0, (q31_t)0x7fe862fa, (q31_t)0xfb243a69,
- (q31_t)0x7fe825c5, (q31_t)0xfb1df314,
- (q31_t)0x7fe7e841, (q31_t)0xfb17abc2, (q31_t)0x7fe7aa6e, (q31_t)0xfb116474, (q31_t)0x7fe76c4c, (q31_t)0xfb0b1d28,
- (q31_t)0x7fe72ddb, (q31_t)0xfb04d5e0,
- (q31_t)0x7fe6ef1c, (q31_t)0xfafe8e9b, (q31_t)0x7fe6b00d, (q31_t)0xfaf84758, (q31_t)0x7fe670b0, (q31_t)0xfaf20019,
- (q31_t)0x7fe63103, (q31_t)0xfaebb8dd,
- (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe5b0be, (q31_t)0xfadf2a6e, (q31_t)0x7fe57025, (q31_t)0xfad8e33c,
- (q31_t)0x7fe52f3d, (q31_t)0xfad29c0c,
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- (q31_t)0x63505be, (q31_t)0x80268d0e,
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- (q31_t)0x5d09a38, (q31_t)0x8021d47a,
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- (q31_t)0x59e6319, (q31_t)0x801f95c3,
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- (q31_t)0x5854736, (q31_t)0x801e7dcd,
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- (q31_t)0x56c2b1c, (q31_t)0x801d6ac5,
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- (q31_t)0x5530ecd, (q31_t)0x801c5cab,
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- (q31_t)0x539f249, (q31_t)0x801b537f,
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- (q31_t)0x520d592, (q31_t)0x801a4f42,
- (q31_t)0x51a8e5c, (q31_t)0x801a0ef8, (q31_t)0x5144723, (q31_t)0x8019cefd, (q31_t)0x50dffe7, (q31_t)0x80198f50,
- (q31_t)0x507b8a8, (q31_t)0x80194ff3,
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- (q31_t)0x4ee9b8c, (q31_t)0x80185592,
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- (q31_t)0x4d57e40, (q31_t)0x80176020,
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- (q31_t)0x4bc60c4, (q31_t)0x80166f9c,
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- (q31_t)0x4a34319, (q31_t)0x80158406,
- (q31_t)0x49cfba7, (q31_t)0x801549e6, (q31_t)0x496b432, (q31_t)0x80151015, (q31_t)0x4906cbb, (q31_t)0x8014d693,
- (q31_t)0x48a2540, (q31_t)0x80149d5f,
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- (q31_t)0x471073b, (q31_t)0x8013bba7,
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- (q31_t)0x457e90a, (q31_t)0x8012dedd,
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- (q31_t)0x43ecaae, (q31_t)0x80120701,
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- (q31_t)0x425ac28, (q31_t)0x80113414,
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- (q31_t)0x40c8d79, (q31_t)0x80106616,
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- (q31_t)0x3f36ea2, (q31_t)0x800f9d07,
- (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x3e6df28, (q31_t)0x800f3a59, (q31_t)0x3e09767, (q31_t)0x800f0978,
- (q31_t)0x3da4fa4, (q31_t)0x800ed8e6,
- (q31_t)0x3d407df, (q31_t)0x800ea8a3, (q31_t)0x3cdc017, (q31_t)0x800e78af, (q31_t)0x3c7784d, (q31_t)0x800e490a,
- (q31_t)0x3c13080, (q31_t)0x800e19b4,
- (q31_t)0x3bae8b2, (q31_t)0x800deaad, (q31_t)0x3b4a0e0, (q31_t)0x800dbbf5, (q31_t)0x3ae590d, (q31_t)0x800d8d8b,
- (q31_t)0x3a81137, (q31_t)0x800d5f71,
- (q31_t)0x3a1c960, (q31_t)0x800d31a5, (q31_t)0x39b8185, (q31_t)0x800d0429, (q31_t)0x39539a9, (q31_t)0x800cd6fb,
- (q31_t)0x38ef1ca, (q31_t)0x800caa1c,
- (q31_t)0x388a9ea, (q31_t)0x800c7d8c, (q31_t)0x3826207, (q31_t)0x800c514c, (q31_t)0x37c1a22, (q31_t)0x800c255a,
- (q31_t)0x375d23a, (q31_t)0x800bf9b7,
- (q31_t)0x36f8a51, (q31_t)0x800bce63, (q31_t)0x3694265, (q31_t)0x800ba35d, (q31_t)0x362fa78, (q31_t)0x800b78a7,
- (q31_t)0x35cb288, (q31_t)0x800b4e40,
- (q31_t)0x3566a96, (q31_t)0x800b2427, (q31_t)0x35022a2, (q31_t)0x800afa5e, (q31_t)0x349daac, (q31_t)0x800ad0e3,
- (q31_t)0x34392b4, (q31_t)0x800aa7b8,
- (q31_t)0x33d4abb, (q31_t)0x800a7edb, (q31_t)0x33702bf, (q31_t)0x800a564e, (q31_t)0x330bac1, (q31_t)0x800a2e0f,
- (q31_t)0x32a72c1, (q31_t)0x800a061f,
- (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x31de2bb, (q31_t)0x8009b72c, (q31_t)0x3179ab5, (q31_t)0x80099029,
- (q31_t)0x31152ae, (q31_t)0x80096975,
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- (q31_t)0x2f8327d, (q31_t)0x8008d1ba,
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- (q31_t)0x2df122e, (q31_t)0x80083eed,
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- (q31_t)0x2c5f1c3, (q31_t)0x8007b110,
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- (q31_t)0x2acd13d, (q31_t)0x80072822,
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- (q31_t)0x293b09c, (q31_t)0x8006a423,
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- (q31_t)0x27a8fe2, (q31_t)0x80062513,
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- (q31_t)0x2616f10, (q31_t)0x8005aaf2,
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- (q31_t)0x2484e26, (q31_t)0x800535c0,
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- (q31_t)0x22f2d25, (q31_t)0x8004c57d,
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- (q31_t)0x2160c0f, (q31_t)0x80045a29,
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- (q31_t)0x1fceae4, (q31_t)0x8003f3c5,
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- (q31_t)0x1e3c9a6, (q31_t)0x8003924f,
- (q31_t)0x1dd8154, (q31_t)0x80037ab7, (q31_t)0x1d73900, (q31_t)0x8003636e, (q31_t)0x1d0f0ab, (q31_t)0x80034c74,
- (q31_t)0x1caa855, (q31_t)0x800335c9,
- (q31_t)0x1c45ffe, (q31_t)0x80031f6d, (q31_t)0x1be17a6, (q31_t)0x80030960, (q31_t)0x1b7cf4d, (q31_t)0x8002f3a1,
- (q31_t)0x1b186f3, (q31_t)0x8002de32,
- (q31_t)0x1ab3e97, (q31_t)0x8002c912, (q31_t)0x1a4f63b, (q31_t)0x8002b440, (q31_t)0x19eaddd, (q31_t)0x80029fbe,
- (q31_t)0x198657f, (q31_t)0x80028b8a,
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- (q31_t)0x17f43fc, (q31_t)0x80023dd2,
- (q31_t)0x178fb99, (q31_t)0x80022b29, (q31_t)0x172b335, (q31_t)0x800218cf, (q31_t)0x16c6ad0, (q31_t)0x800206c4,
- (q31_t)0x166226a, (q31_t)0x8001f508,
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- (q31_t)0x14d00ca, (q31_t)0x8001b12e,
- (q31_t)0x146b860, (q31_t)0x8001a0fd, (q31_t)0x1406ff6, (q31_t)0x8001911b, (q31_t)0x13a278a, (q31_t)0x80018187,
- (q31_t)0x133df1e, (q31_t)0x80017243,
- (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x1274e43, (q31_t)0x800154a7, (q31_t)0x12105d5, (q31_t)0x80014650,
- (q31_t)0x11abd66, (q31_t)0x80013847,
- (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0x10e2c85, (q31_t)0x80011d23, (q31_t)0x107e414, (q31_t)0x80011008,
- (q31_t)0x1019ba2, (q31_t)0x8001033b,
- (q31_t)0xfb5330, (q31_t)0x8000f6bd, (q31_t)0xf50abd, (q31_t)0x8000ea8e, (q31_t)0xeec249, (q31_t)0x8000deaf, (q31_t)0xe879d5,
- (q31_t)0x8000d31e,
- (q31_t)0xe23160, (q31_t)0x8000c7dc, (q31_t)0xdbe8eb, (q31_t)0x8000bce9, (q31_t)0xd5a075, (q31_t)0x8000b245, (q31_t)0xcf57ff,
- (q31_t)0x8000a7f0,
- (q31_t)0xc90f88, (q31_t)0x80009dea, (q31_t)0xc2c711, (q31_t)0x80009433, (q31_t)0xbc7e99, (q31_t)0x80008aca, (q31_t)0xb63621,
- (q31_t)0x800081b1,
- (q31_t)0xafeda8, (q31_t)0x800078e7, (q31_t)0xa9a52f, (q31_t)0x8000706c, (q31_t)0xa35cb5, (q31_t)0x8000683f, (q31_t)0x9d143b,
- (q31_t)0x80006062,
- (q31_t)0x96cbc1, (q31_t)0x800058d4, (q31_t)0x908346, (q31_t)0x80005194, (q31_t)0x8a3acb, (q31_t)0x80004aa4, (q31_t)0x83f250,
- (q31_t)0x80004402,
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- (q31_t)0x80002c91,
- (q31_t)0x6487e3, (q31_t)0x8000277a, (q31_t)0x5e3f66, (q31_t)0x800022b3, (q31_t)0x57f6e9, (q31_t)0x80001e3a, (q31_t)0x51ae6b,
- (q31_t)0x80001a10,
- (q31_t)0x4b65ee, (q31_t)0x80001635, (q31_t)0x451d70, (q31_t)0x800012a9, (q31_t)0x3ed4f2, (q31_t)0x80000f6c, (q31_t)0x388c74,
- (q31_t)0x80000c7e,
- (q31_t)0x3243f5, (q31_t)0x800009df, (q31_t)0x2bfb77, (q31_t)0x8000078e, (q31_t)0x25b2f8, (q31_t)0x8000058d, (q31_t)0x1f6a7a,
- (q31_t)0x800003db,
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- (q31_t)0x80000027
-
+ (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7fffffd9, (q31_t)0xfff9b781, (q31_t)0x7fffff62, (q31_t)0xfff36f02, (q31_t)0x7ffffe9d, (q31_t)0xffed2684,
+ (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffffc25, (q31_t)0xffe09586, (q31_t)0x7ffffa73, (q31_t)0xffda4d08, (q31_t)0x7ffff872, (q31_t)0xffd40489,
+ (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7ffff382, (q31_t)0xffc7738c, (q31_t)0x7ffff094, (q31_t)0xffc12b0e, (q31_t)0x7fffed57, (q31_t)0xffbae290,
+ (q31_t)0x7fffe9cb, (q31_t)0xffb49a12, (q31_t)0x7fffe5f0, (q31_t)0xffae5195, (q31_t)0x7fffe1c6, (q31_t)0xffa80917, (q31_t)0x7fffdd4d, (q31_t)0xffa1c09a,
+ (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffd36f, (q31_t)0xff952fa0, (q31_t)0x7fffce09, (q31_t)0xff8ee724, (q31_t)0x7fffc854, (q31_t)0xff889ea7,
+ (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffbbfe, (q31_t)0xff7c0db0, (q31_t)0x7fffb55c, (q31_t)0xff75c535, (q31_t)0x7fffae6c, (q31_t)0xff6f7cba,
+ (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff9f9e, (q31_t)0xff62ebc5, (q31_t)0x7fff97c1, (q31_t)0xff5ca34b, (q31_t)0x7fff8f94, (q31_t)0xff565ad1,
+ (q31_t)0x7fff8719, (q31_t)0xff501258, (q31_t)0x7fff7e4f, (q31_t)0xff49c9df, (q31_t)0x7fff7536, (q31_t)0xff438167, (q31_t)0x7fff6bcd, (q31_t)0xff3d38ef,
+ (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff5810, (q31_t)0xff30a801, (q31_t)0x7fff4dbb, (q31_t)0xff2a5f8b, (q31_t)0x7fff4317, (q31_t)0xff241715,
+ (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff2ce2, (q31_t)0xff17862b, (q31_t)0x7fff2151, (q31_t)0xff113db7, (q31_t)0x7fff1572, (q31_t)0xff0af543,
+ (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffefcc5, (q31_t)0xfefe645e, (q31_t)0x7ffeeff8, (q31_t)0xfef81bec, (q31_t)0x7ffee2dd, (q31_t)0xfef1d37b,
+ (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a, (q31_t)0x7ffec7b9, (q31_t)0xfee5429a, (q31_t)0x7ffeb9b0, (q31_t)0xfedefa2b, (q31_t)0x7ffeab59, (q31_t)0xfed8b1bd,
+ (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe8dbd, (q31_t)0xfecc20e2, (q31_t)0x7ffe7e79, (q31_t)0xfec5d876, (q31_t)0x7ffe6ee5, (q31_t)0xfebf900a,
+ (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe4ed2, (q31_t)0xfeb2ff36, (q31_t)0x7ffe3e52, (q31_t)0xfeacb6cc, (q31_t)0x7ffe2d83, (q31_t)0xfea66e64,
+ (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffe0af8, (q31_t)0xfe99dd96, (q31_t)0x7ffdf93c, (q31_t)0xfe939530, (q31_t)0x7ffde731, (q31_t)0xfe8d4ccb,
+ (q31_t)0x7ffdd4d7, (q31_t)0xfe870467, (q31_t)0x7ffdc22e, (q31_t)0xfe80bc04, (q31_t)0x7ffdaf37, (q31_t)0xfe7a73a2, (q31_t)0x7ffd9bf0, (q31_t)0xfe742b41,
+ (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd7476, (q31_t)0xfe679a81, (q31_t)0x7ffd6042, (q31_t)0xfe615223, (q31_t)0x7ffd4bc0, (q31_t)0xfe5b09c5,
+ (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffd21ce, (q31_t)0xfe4e790d, (q31_t)0x7ffd0c5f, (q31_t)0xfe4830b3, (q31_t)0x7ffcf6a0, (q31_t)0xfe41e85a,
+ (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffcca37, (q31_t)0xfe3557ab, (q31_t)0x7ffcb38c, (q31_t)0xfe2f0f55, (q31_t)0x7ffc9c92, (q31_t)0xfe28c700,
+ (q31_t)0x7ffc8549, (q31_t)0xfe227eac, (q31_t)0x7ffc6db1, (q31_t)0xfe1c365a, (q31_t)0x7ffc55ca, (q31_t)0xfe15ee09, (q31_t)0x7ffc3d94, (q31_t)0xfe0fa5b8,
+ (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffc0c3b, (q31_t)0xfe03151c, (q31_t)0x7ffbf319, (q31_t)0xfdfccccf, (q31_t)0x7ffbd9a7, (q31_t)0xfdf68484,
+ (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffba5d7, (q31_t)0xfde9f3f1, (q31_t)0x7ffb8b78, (q31_t)0xfde3aba9, (q31_t)0x7ffb70cb, (q31_t)0xfddd6363,
+ (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffb3a83, (q31_t)0xfdd0d2db, (q31_t)0x7ffb1ee9, (q31_t)0xfdca8a99, (q31_t)0x7ffb0300, (q31_t)0xfdc44258,
+ (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18, (q31_t)0x7ffaca40, (q31_t)0xfdb7b1da, (q31_t)0x7ffaad6a, (q31_t)0xfdb1699e, (q31_t)0x7ffa9045, (q31_t)0xfdab2162,
+ (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ffa550e, (q31_t)0xfd9e90f0, (q31_t)0x7ffa36fc, (q31_t)0xfd9848b9, (q31_t)0x7ffa189c, (q31_t)0xfd920084,
+ (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850, (q31_t)0x7ff9daed, (q31_t)0xfd85701e, (q31_t)0x7ff9bba0, (q31_t)0xfd7f27ed, (q31_t)0x7ff99c03, (q31_t)0xfd78dfbd,
+ (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff95bdd, (q31_t)0xfd6c4f64, (q31_t)0x7ff93b54, (q31_t)0xfd660739, (q31_t)0x7ff91a7b, (q31_t)0xfd5fbf10,
+ (q31_t)0x7ff8f954, (q31_t)0xfd5976e9, (q31_t)0x7ff8d7de, (q31_t)0xfd532ec3, (q31_t)0x7ff8b619, (q31_t)0xfd4ce69f, (q31_t)0x7ff89405, (q31_t)0xfd469e7c,
+ (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff84ef0, (q31_t)0xfd3a0e3d, (q31_t)0x7ff82bef, (q31_t)0xfd33c61f, (q31_t)0x7ff8089f, (q31_t)0xfd2d7e04,
+ (q31_t)0x7ff7e500, (q31_t)0xfd2735ea, (q31_t)0x7ff7c113, (q31_t)0xfd20edd2, (q31_t)0x7ff79cd6, (q31_t)0xfd1aa5bc, (q31_t)0x7ff7784a, (q31_t)0xfd145da7,
+ (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff72e46, (q31_t)0xfd07cd83, (q31_t)0x7ff708ce, (q31_t)0xfd018574, (q31_t)0x7ff6e307, (q31_t)0xfcfb3d67,
+ (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c, (q31_t)0x7ff6968b, (q31_t)0xfceead52, (q31_t)0x7ff66fd7, (q31_t)0xfce8654b, (q31_t)0x7ff648d4, (q31_t)0xfce21d45,
+ (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff5f9e1, (q31_t)0xfcd58d3f, (q31_t)0x7ff5d1f1, (q31_t)0xfccf453f, (q31_t)0x7ff5a9b2, (q31_t)0xfcc8fd41,
+ (q31_t)0x7ff58125, (q31_t)0xfcc2b545, (q31_t)0x7ff55848, (q31_t)0xfcbc6d4c, (q31_t)0x7ff52f1d, (q31_t)0xfcb62554, (q31_t)0x7ff505a2, (q31_t)0xfcafdd5e,
+ (q31_t)0x7ff4dbd9, (q31_t)0xfca9956a, (q31_t)0x7ff4b1c0, (q31_t)0xfca34d78, (q31_t)0x7ff48759, (q31_t)0xfc9d0588, (q31_t)0x7ff45ca3, (q31_t)0xfc96bd9b,
+ (q31_t)0x7ff4319d, (q31_t)0xfc9075af, (q31_t)0x7ff40649, (q31_t)0xfc8a2dc6, (q31_t)0x7ff3daa6, (q31_t)0xfc83e5de, (q31_t)0x7ff3aeb4, (q31_t)0xfc7d9df9,
+ (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff355e4, (q31_t)0xfc710e36, (q31_t)0x7ff32905, (q31_t)0xfc6ac657, (q31_t)0x7ff2fbd7, (q31_t)0xfc647e7b,
+ (q31_t)0x7ff2ce5b, (q31_t)0xfc5e36a0, (q31_t)0x7ff2a08f, (q31_t)0xfc57eec9, (q31_t)0x7ff27275, (q31_t)0xfc51a6f3, (q31_t)0x7ff2440b, (q31_t)0xfc4b5f20,
+ (q31_t)0x7ff21553, (q31_t)0xfc45174e, (q31_t)0x7ff1e64c, (q31_t)0xfc3ecf80, (q31_t)0x7ff1b6f6, (q31_t)0xfc3887b3, (q31_t)0x7ff18751, (q31_t)0xfc323fe9,
+ (q31_t)0x7ff1575d, (q31_t)0xfc2bf821, (q31_t)0x7ff1271a, (q31_t)0xfc25b05c, (q31_t)0x7ff0f688, (q31_t)0xfc1f6899, (q31_t)0x7ff0c5a7, (q31_t)0xfc1920d8,
+ (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7ff062f9, (q31_t)0xfc0c915e, (q31_t)0x7ff0312c, (q31_t)0xfc0649a5, (q31_t)0x7fefff0f, (q31_t)0xfc0001ee,
+ (q31_t)0x7fefcca4, (q31_t)0xfbf9ba39, (q31_t)0x7fef99ea, (q31_t)0xfbf37287, (q31_t)0x7fef66e1, (q31_t)0xfbed2ad8, (q31_t)0x7fef3388, (q31_t)0xfbe6e32b,
+ (q31_t)0x7feeffe1, (q31_t)0xfbe09b80, (q31_t)0x7feecbec, (q31_t)0xfbda53d8, (q31_t)0x7fee97a7, (q31_t)0xfbd40c33, (q31_t)0x7fee6313, (q31_t)0xfbcdc490,
+ (q31_t)0x7fee2e30, (q31_t)0xfbc77cf0, (q31_t)0x7fedf8ff, (q31_t)0xfbc13552, (q31_t)0x7fedc37e, (q31_t)0xfbbaedb7, (q31_t)0x7fed8daf, (q31_t)0xfbb4a61f,
+ (q31_t)0x7fed5791, (q31_t)0xfbae5e89, (q31_t)0x7fed2123, (q31_t)0xfba816f6, (q31_t)0x7fecea67, (q31_t)0xfba1cf66, (q31_t)0x7fecb35c, (q31_t)0xfb9b87d8,
+ (q31_t)0x7fec7c02, (q31_t)0xfb95404d, (q31_t)0x7fec4459, (q31_t)0xfb8ef8c5, (q31_t)0x7fec0c62, (q31_t)0xfb88b13f, (q31_t)0x7febd41b, (q31_t)0xfb8269bd,
+ (q31_t)0x7feb9b85, (q31_t)0xfb7c223d, (q31_t)0x7feb62a1, (q31_t)0xfb75dac0, (q31_t)0x7feb296d, (q31_t)0xfb6f9345, (q31_t)0x7feaefeb, (q31_t)0xfb694bce,
+ (q31_t)0x7feab61a, (q31_t)0xfb630459, (q31_t)0x7fea7bfa, (q31_t)0xfb5cbce7, (q31_t)0x7fea418b, (q31_t)0xfb567578, (q31_t)0x7fea06cd, (q31_t)0xfb502e0c,
+ (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe99064, (q31_t)0xfb439f3c, (q31_t)0x7fe954ba, (q31_t)0xfb3d57d9, (q31_t)0x7fe918c0, (q31_t)0xfb371078,
+ (q31_t)0x7fe8dc78, (q31_t)0xfb30c91b, (q31_t)0x7fe89fe0, (q31_t)0xfb2a81c0, (q31_t)0x7fe862fa, (q31_t)0xfb243a69, (q31_t)0x7fe825c5, (q31_t)0xfb1df314,
+ (q31_t)0x7fe7e841, (q31_t)0xfb17abc2, (q31_t)0x7fe7aa6e, (q31_t)0xfb116474, (q31_t)0x7fe76c4c, (q31_t)0xfb0b1d28, (q31_t)0x7fe72ddb, (q31_t)0xfb04d5e0,
+ (q31_t)0x7fe6ef1c, (q31_t)0xfafe8e9b, (q31_t)0x7fe6b00d, (q31_t)0xfaf84758, (q31_t)0x7fe670b0, (q31_t)0xfaf20019, (q31_t)0x7fe63103, (q31_t)0xfaebb8dd,
+ (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe5b0be, (q31_t)0xfadf2a6e, (q31_t)0x7fe57025, (q31_t)0xfad8e33c, (q31_t)0x7fe52f3d, (q31_t)0xfad29c0c,
+ (q31_t)0x7fe4ee06, (q31_t)0xfacc54e0, (q31_t)0x7fe4ac81, (q31_t)0xfac60db7, (q31_t)0x7fe46aac, (q31_t)0xfabfc691, (q31_t)0x7fe42889, (q31_t)0xfab97f6e,
+ (q31_t)0x7fe3e616, (q31_t)0xfab3384f, (q31_t)0x7fe3a355, (q31_t)0xfaacf133, (q31_t)0x7fe36045, (q31_t)0xfaa6aa1a, (q31_t)0x7fe31ce6, (q31_t)0xfaa06305,
+ (q31_t)0x7fe2d938, (q31_t)0xfa9a1bf3, (q31_t)0x7fe2953b, (q31_t)0xfa93d4e4, (q31_t)0x7fe250ef, (q31_t)0xfa8d8dd8, (q31_t)0x7fe20c55, (q31_t)0xfa8746d0,
+ (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fe18233, (q31_t)0xfa7ab8ca, (q31_t)0x7fe13cac, (q31_t)0xfa7471cc, (q31_t)0x7fe0f6d6, (q31_t)0xfa6e2ad1,
+ (q31_t)0x7fe0b0b1, (q31_t)0xfa67e3da, (q31_t)0x7fe06a3d, (q31_t)0xfa619ce7, (q31_t)0x7fe0237a, (q31_t)0xfa5b55f7, (q31_t)0x7fdfdc69, (q31_t)0xfa550f0a,
+ (q31_t)0x7fdf9508, (q31_t)0xfa4ec821, (q31_t)0x7fdf4d59, (q31_t)0xfa48813b, (q31_t)0x7fdf055a, (q31_t)0xfa423a59, (q31_t)0x7fdebd0d, (q31_t)0xfa3bf37a,
+ (q31_t)0x7fde7471, (q31_t)0xfa35ac9f, (q31_t)0x7fde2b86, (q31_t)0xfa2f65c8, (q31_t)0x7fdde24d, (q31_t)0xfa291ef4, (q31_t)0x7fdd98c4, (q31_t)0xfa22d823,
+ (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157, (q31_t)0x7fdd04c6, (q31_t)0xfa164a8e, (q31_t)0x7fdcba51, (q31_t)0xfa1003c8, (q31_t)0x7fdc6f8d, (q31_t)0xfa09bd06,
+ (q31_t)0x7fdc247a, (q31_t)0xfa037648, (q31_t)0x7fdbd918, (q31_t)0xf9fd2f8e, (q31_t)0x7fdb8d67, (q31_t)0xf9f6e8d7, (q31_t)0x7fdb4167, (q31_t)0xf9f0a224,
+ (q31_t)0x7fdaf519, (q31_t)0xf9ea5b75, (q31_t)0x7fdaa87c, (q31_t)0xf9e414ca, (q31_t)0x7fda5b8f, (q31_t)0xf9ddce22, (q31_t)0x7fda0e54, (q31_t)0xf9d7877e,
+ (q31_t)0x7fd9c0ca, (q31_t)0xf9d140de, (q31_t)0x7fd972f2, (q31_t)0xf9cafa42, (q31_t)0x7fd924ca, (q31_t)0xf9c4b3a9, (q31_t)0x7fd8d653, (q31_t)0xf9be6d15,
+ (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd8387a, (q31_t)0xf9b1dff7, (q31_t)0x7fd7e917, (q31_t)0xf9ab996e, (q31_t)0x7fd79965, (q31_t)0xf9a552e9,
+ (q31_t)0x7fd74964, (q31_t)0xf99f0c68, (q31_t)0x7fd6f914, (q31_t)0xf998c5ea, (q31_t)0x7fd6a875, (q31_t)0xf9927f71, (q31_t)0x7fd65788, (q31_t)0xf98c38fc,
+ (q31_t)0x7fd6064c, (q31_t)0xf985f28a, (q31_t)0x7fd5b4c1, (q31_t)0xf97fac1d, (q31_t)0x7fd562e7, (q31_t)0xf97965b4, (q31_t)0x7fd510be, (q31_t)0xf9731f4e,
+ (q31_t)0x7fd4be46, (q31_t)0xf96cd8ed, (q31_t)0x7fd46b80, (q31_t)0xf9669290, (q31_t)0x7fd4186a, (q31_t)0xf9604c37, (q31_t)0x7fd3c506, (q31_t)0xf95a05e2,
+ (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fd31d51, (q31_t)0xf94d7944, (q31_t)0x7fd2c900, (q31_t)0xf94732fb, (q31_t)0x7fd27460, (q31_t)0xf940ecb7,
+ (q31_t)0x7fd21f72, (q31_t)0xf93aa676, (q31_t)0x7fd1ca35, (q31_t)0xf934603a, (q31_t)0x7fd174a8, (q31_t)0xf92e1a02, (q31_t)0x7fd11ecd, (q31_t)0xf927d3ce,
+ (q31_t)0x7fd0c8a3, (q31_t)0xf9218d9e, (q31_t)0x7fd0722b, (q31_t)0xf91b4773, (q31_t)0x7fd01b63, (q31_t)0xf915014c, (q31_t)0x7fcfc44d, (q31_t)0xf90ebb29,
+ (q31_t)0x7fcf6ce8, (q31_t)0xf908750a, (q31_t)0x7fcf1533, (q31_t)0xf9022ef0, (q31_t)0x7fcebd31, (q31_t)0xf8fbe8da, (q31_t)0x7fce64df, (q31_t)0xf8f5a2c9,
+ (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fcdb34f, (q31_t)0xf8e916b2, (q31_t)0x7fcd5a11, (q31_t)0xf8e2d0ae, (q31_t)0x7fcd0083, (q31_t)0xf8dc8aae,
+ (q31_t)0x7fcca6a7, (q31_t)0xf8d644b2, (q31_t)0x7fcc4c7d, (q31_t)0xf8cffebb, (q31_t)0x7fcbf203, (q31_t)0xf8c9b8c8, (q31_t)0x7fcb973b, (q31_t)0xf8c372d9,
+ (q31_t)0x7fcb3c23, (q31_t)0xf8bd2cef, (q31_t)0x7fcae0bd, (q31_t)0xf8b6e70a, (q31_t)0x7fca8508, (q31_t)0xf8b0a129, (q31_t)0x7fca2905, (q31_t)0xf8aa5b4c,
+ (q31_t)0x7fc9ccb2, (q31_t)0xf8a41574, (q31_t)0x7fc97011, (q31_t)0xf89dcfa1, (q31_t)0x7fc91320, (q31_t)0xf89789d2, (q31_t)0x7fc8b5e1, (q31_t)0xf8914407,
+ (q31_t)0x7fc85854, (q31_t)0xf88afe42, (q31_t)0x7fc7fa77, (q31_t)0xf884b880, (q31_t)0x7fc79c4b, (q31_t)0xf87e72c4, (q31_t)0x7fc73dd1, (q31_t)0xf8782d0c,
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+ (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b5b5676, (q31_t)0xddd64d0a, (q31_t)0x7b59a902, (q31_t)0xddd03eef, (q31_t)0x7b57fb42, (q31_t)0xddca30e9,
+ (q31_t)0x7b564d36, (q31_t)0xddc422f8, (q31_t)0x7b549ede, (q31_t)0xddbe151d, (q31_t)0x7b52f03a, (q31_t)0xddb80756, (q31_t)0x7b51414a, (q31_t)0xddb1f9a4,
+ (q31_t)0x7b4f920e, (q31_t)0xddabec08, (q31_t)0x7b4de286, (q31_t)0xdda5de81, (q31_t)0x7b4c32b1, (q31_t)0xdd9fd10f, (q31_t)0x7b4a8291, (q31_t)0xdd99c3b2,
+ (q31_t)0x7b48d225, (q31_t)0xdd93b66a, (q31_t)0x7b47216c, (q31_t)0xdd8da938, (q31_t)0x7b457068, (q31_t)0xdd879c1b, (q31_t)0x7b43bf17, (q31_t)0xdd818f13,
+ (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b405b92, (q31_t)0xdd757543, (q31_t)0x7b3ea95d, (q31_t)0xdd6f687b, (q31_t)0x7b3cf6dc, (q31_t)0xdd695bc9,
+ (q31_t)0x7b3b4410, (q31_t)0xdd634f2b, (q31_t)0x7b3990f7, (q31_t)0xdd5d42a3, (q31_t)0x7b37dd92, (q31_t)0xdd573631, (q31_t)0x7b3629e1, (q31_t)0xdd5129d4,
+ (q31_t)0x7b3475e5, (q31_t)0xdd4b1d8c, (q31_t)0x7b32c19c, (q31_t)0xdd451159, (q31_t)0x7b310d07, (q31_t)0xdd3f053c, (q31_t)0x7b2f5826, (q31_t)0xdd38f935,
+ (q31_t)0x7b2da2fa, (q31_t)0xdd32ed43, (q31_t)0x7b2bed81, (q31_t)0xdd2ce166, (q31_t)0x7b2a37bc, (q31_t)0xdd26d59f, (q31_t)0x7b2881ac, (q31_t)0xdd20c9ed,
+ (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b2514a6, (q31_t)0xdd14b2ca, (q31_t)0x7b235db2, (q31_t)0xdd0ea759, (q31_t)0x7b21a671, (q31_t)0xdd089bfe,
+ (q31_t)0x7b1feee5, (q31_t)0xdd0290b8, (q31_t)0x7b1e370d, (q31_t)0xdcfc8588, (q31_t)0x7b1c7ee8, (q31_t)0xdcf67a6d, (q31_t)0x7b1ac678, (q31_t)0xdcf06f68,
+ (q31_t)0x7b190dbc, (q31_t)0xdcea6478, (q31_t)0x7b1754b3, (q31_t)0xdce4599e, (q31_t)0x7b159b5f, (q31_t)0xdcde4eda, (q31_t)0x7b13e1bf, (q31_t)0xdcd8442b,
+ (q31_t)0x7b1227d3, (q31_t)0xdcd23993, (q31_t)0x7b106d9b, (q31_t)0xdccc2f0f, (q31_t)0x7b0eb318, (q31_t)0xdcc624a2, (q31_t)0x7b0cf848, (q31_t)0xdcc01a4a,
+ (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008, (q31_t)0x7b0981c5, (q31_t)0xdcb405dc, (q31_t)0x7b07c612, (q31_t)0xdcadfbc5, (q31_t)0x7b060a12, (q31_t)0xdca7f1c5,
+ (q31_t)0x7b044dc7, (q31_t)0xdca1e7da, (q31_t)0x7b029130, (q31_t)0xdc9bde05, (q31_t)0x7b00d44d, (q31_t)0xdc95d446, (q31_t)0x7aff171e, (q31_t)0xdc8fca9c,
+ (q31_t)0x7afd59a4, (q31_t)0xdc89c109, (q31_t)0x7afb9bdd, (q31_t)0xdc83b78b, (q31_t)0x7af9ddcb, (q31_t)0xdc7dae23, (q31_t)0x7af81f6c, (q31_t)0xdc77a4d2,
+ (q31_t)0x7af660c2, (q31_t)0xdc719b96, (q31_t)0x7af4a1cc, (q31_t)0xdc6b9270, (q31_t)0x7af2e28b, (q31_t)0xdc658960, (q31_t)0x7af122fd, (q31_t)0xdc5f8066,
+ (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7aeda2fe, (q31_t)0xdc536eb3, (q31_t)0x7aebe28d, (q31_t)0xdc4d65fb, (q31_t)0x7aea21d0, (q31_t)0xdc475d59,
+ (q31_t)0x7ae860c7, (q31_t)0xdc4154cd, (q31_t)0x7ae69f73, (q31_t)0xdc3b4c57, (q31_t)0x7ae4ddd2, (q31_t)0xdc3543f7, (q31_t)0x7ae31be6, (q31_t)0xdc2f3bad,
+ (q31_t)0x7ae159ae, (q31_t)0xdc293379, (q31_t)0x7adf972a, (q31_t)0xdc232b5c, (q31_t)0x7addd45b, (q31_t)0xdc1d2354, (q31_t)0x7adc113f, (q31_t)0xdc171b63,
+ (q31_t)0x7ada4dd8, (q31_t)0xdc111388, (q31_t)0x7ad88a25, (q31_t)0xdc0b0bc2, (q31_t)0x7ad6c626, (q31_t)0xdc050414, (q31_t)0x7ad501dc, (q31_t)0xdbfefc7b,
+ (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7ad17863, (q31_t)0xdbf2ed8c, (q31_t)0x7acfb336, (q31_t)0xdbece636, (q31_t)0x7acdedbc, (q31_t)0xdbe6def6,
+ (q31_t)0x7acc27f7, (q31_t)0xdbe0d7cd, (q31_t)0x7aca61e6, (q31_t)0xdbdad0b9, (q31_t)0x7ac89b89, (q31_t)0xdbd4c9bc, (q31_t)0x7ac6d4e0, (q31_t)0xdbcec2d6,
+ (q31_t)0x7ac50dec, (q31_t)0xdbc8bc06, (q31_t)0x7ac346ac, (q31_t)0xdbc2b54c, (q31_t)0x7ac17f20, (q31_t)0xdbbcaea8, (q31_t)0x7abfb749, (q31_t)0xdbb6a81b,
+ (q31_t)0x7abdef25, (q31_t)0xdbb0a1a4, (q31_t)0x7abc26b7, (q31_t)0xdbaa9b43, (q31_t)0x7aba5dfc, (q31_t)0xdba494f9, (q31_t)0x7ab894f6, (q31_t)0xdb9e8ec6,
+ (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7ab50206, (q31_t)0xdb9282a2, (q31_t)0x7ab3381d, (q31_t)0xdb8c7cb1, (q31_t)0x7ab16de7, (q31_t)0xdb8676d8,
+ (q31_t)0x7aafa367, (q31_t)0xdb807114, (q31_t)0x7aadd89a, (q31_t)0xdb7a6b68, (q31_t)0x7aac0d82, (q31_t)0xdb7465d1, (q31_t)0x7aaa421e, (q31_t)0xdb6e6052,
+ (q31_t)0x7aa8766f, (q31_t)0xdb685ae9, (q31_t)0x7aa6aa74, (q31_t)0xdb625596, (q31_t)0x7aa4de2d, (q31_t)0xdb5c505a, (q31_t)0x7aa3119a, (q31_t)0xdb564b35,
+ (q31_t)0x7aa144bc, (q31_t)0xdb504626, (q31_t)0x7a9f7793, (q31_t)0xdb4a412e, (q31_t)0x7a9daa1d, (q31_t)0xdb443c4c, (q31_t)0x7a9bdc5c, (q31_t)0xdb3e3781,
+ (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd, (q31_t)0x7a983ff7, (q31_t)0xdb322e30, (q31_t)0x7a967153, (q31_t)0xdb2c29a9, (q31_t)0x7a94a264, (q31_t)0xdb262539,
+ (q31_t)0x7a92d329, (q31_t)0xdb2020e0, (q31_t)0x7a9103a2, (q31_t)0xdb1a1c9d, (q31_t)0x7a8f33d0, (q31_t)0xdb141871, (q31_t)0x7a8d63b2, (q31_t)0xdb0e145c,
+ (q31_t)0x7a8b9348, (q31_t)0xdb08105e, (q31_t)0x7a89c293, (q31_t)0xdb020c77, (q31_t)0x7a87f192, (q31_t)0xdafc08a6, (q31_t)0x7a862046, (q31_t)0xdaf604ec,
+ (q31_t)0x7a844eae, (q31_t)0xdaf00149, (q31_t)0x7a827ccb, (q31_t)0xdae9fdbd, (q31_t)0x7a80aa9c, (q31_t)0xdae3fa48, (q31_t)0x7a7ed821, (q31_t)0xdaddf6ea,
+ (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a7b3249, (q31_t)0xdad1f072, (q31_t)0x7a795eec, (q31_t)0xdacbed58, (q31_t)0x7a778b43, (q31_t)0xdac5ea56,
+ (q31_t)0x7a75b74f, (q31_t)0xdabfe76a, (q31_t)0x7a73e30f, (q31_t)0xdab9e495, (q31_t)0x7a720e84, (q31_t)0xdab3e1d8, (q31_t)0x7a7039ad, (q31_t)0xdaaddf31,
+ (q31_t)0x7a6e648a, (q31_t)0xdaa7dca1, (q31_t)0x7a6c8f1c, (q31_t)0xdaa1da29, (q31_t)0x7a6ab963, (q31_t)0xda9bd7c7, (q31_t)0x7a68e35e, (q31_t)0xda95d57d,
+ (q31_t)0x7a670d0d, (q31_t)0xda8fd349, (q31_t)0x7a653671, (q31_t)0xda89d12d, (q31_t)0x7a635f8a, (q31_t)0xda83cf28, (q31_t)0x7a618857, (q31_t)0xda7dcd3a,
+ (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a5dd90e, (q31_t)0xda71c9a3, (q31_t)0x7a5c00f9, (q31_t)0xda6bc7fa, (q31_t)0x7a5a2898, (q31_t)0xda65c669,
+ (q31_t)0x7a584feb, (q31_t)0xda5fc4ef, (q31_t)0x7a5676f3, (q31_t)0xda59c38c, (q31_t)0x7a549db0, (q31_t)0xda53c240, (q31_t)0x7a52c421, (q31_t)0xda4dc10b,
+ (q31_t)0x7a50ea47, (q31_t)0xda47bfee, (q31_t)0x7a4f1021, (q31_t)0xda41bee8, (q31_t)0x7a4d35b0, (q31_t)0xda3bbdf9, (q31_t)0x7a4b5af3, (q31_t)0xda35bd22,
+ (q31_t)0x7a497feb, (q31_t)0xda2fbc61, (q31_t)0x7a47a498, (q31_t)0xda29bbb9, (q31_t)0x7a45c8f9, (q31_t)0xda23bb27, (q31_t)0x7a43ed0e, (q31_t)0xda1dbaad,
+ (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a403457, (q31_t)0xda11b9ff, (q31_t)0x7a3e578b, (q31_t)0xda0bb9cb, (q31_t)0x7a3c7a73, (q31_t)0xda05b9ae,
+ (q31_t)0x7a3a9d0f, (q31_t)0xd9ffb9a9, (q31_t)0x7a38bf60, (q31_t)0xd9f9b9bb, (q31_t)0x7a36e166, (q31_t)0xd9f3b9e5, (q31_t)0x7a350321, (q31_t)0xd9edba26,
+ (q31_t)0x7a332490, (q31_t)0xd9e7ba7f, (q31_t)0x7a3145b3, (q31_t)0xd9e1baef, (q31_t)0x7a2f668c, (q31_t)0xd9dbbb77, (q31_t)0x7a2d8719, (q31_t)0xd9d5bc16,
+ (q31_t)0x7a2ba75a, (q31_t)0xd9cfbccd, (q31_t)0x7a29c750, (q31_t)0xd9c9bd9b, (q31_t)0x7a27e6fb, (q31_t)0xd9c3be81, (q31_t)0x7a26065b, (q31_t)0xd9bdbf7e,
+ (q31_t)0x7a24256f, (q31_t)0xd9b7c094, (q31_t)0x7a224437, (q31_t)0xd9b1c1c0, (q31_t)0x7a2062b5, (q31_t)0xd9abc305, (q31_t)0x7a1e80e7, (q31_t)0xd9a5c461,
+ (q31_t)0x7a1c9ece, (q31_t)0xd99fc5d4, (q31_t)0x7a1abc69, (q31_t)0xd999c75f, (q31_t)0x7a18d9b9, (q31_t)0xd993c902, (q31_t)0x7a16f6be, (q31_t)0xd98dcabd,
+ (q31_t)0x7a151378, (q31_t)0xd987cc90, (q31_t)0x7a132fe6, (q31_t)0xd981ce7a, (q31_t)0x7a114c09, (q31_t)0xd97bd07c, (q31_t)0x7a0f67e0, (q31_t)0xd975d295,
+ (q31_t)0x7a0d836d, (q31_t)0xd96fd4c7, (q31_t)0x7a0b9eae, (q31_t)0xd969d710, (q31_t)0x7a09b9a4, (q31_t)0xd963d971, (q31_t)0x7a07d44e, (q31_t)0xd95ddbea,
+ (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x7a0408c1, (q31_t)0xd951e123, (q31_t)0x7a02228a, (q31_t)0xd94be3e3, (q31_t)0x7a003c07, (q31_t)0xd945e6bb,
+ (q31_t)0x79fe5539, (q31_t)0xd93fe9ab, (q31_t)0x79fc6e20, (q31_t)0xd939ecb3, (q31_t)0x79fa86bc, (q31_t)0xd933efd3, (q31_t)0x79f89f0c, (q31_t)0xd92df30b,
+ (q31_t)0x79f6b711, (q31_t)0xd927f65b, (q31_t)0x79f4cecb, (q31_t)0xd921f9c3, (q31_t)0x79f2e63a, (q31_t)0xd91bfd43, (q31_t)0x79f0fd5d, (q31_t)0xd91600da,
+ (q31_t)0x79ef1436, (q31_t)0xd910048a, (q31_t)0x79ed2ac3, (q31_t)0xd90a0852, (q31_t)0x79eb4105, (q31_t)0xd9040c32, (q31_t)0x79e956fb, (q31_t)0xd8fe1029,
+ (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79e58207, (q31_t)0xd8f21861, (q31_t)0x79e3971c, (q31_t)0xd8ec1ca1, (q31_t)0x79e1abe6, (q31_t)0xd8e620fa,
+ (q31_t)0x79dfc064, (q31_t)0xd8e0256a, (q31_t)0x79ddd498, (q31_t)0xd8da29f2, (q31_t)0x79dbe880, (q31_t)0xd8d42e93, (q31_t)0x79d9fc1d, (q31_t)0xd8ce334c,
+ (q31_t)0x79d80f6f, (q31_t)0xd8c8381d, (q31_t)0x79d62276, (q31_t)0xd8c23d06, (q31_t)0x79d43532, (q31_t)0xd8bc4207, (q31_t)0x79d247a2, (q31_t)0xd8b64720,
+ (q31_t)0x79d059c8, (q31_t)0xd8b04c52, (q31_t)0x79ce6ba2, (q31_t)0xd8aa519c, (q31_t)0x79cc7d31, (q31_t)0xd8a456ff, (q31_t)0x79ca8e75, (q31_t)0xd89e5c79,
+ (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79c6b01b, (q31_t)0xd89267b7, (q31_t)0x79c4c07e, (q31_t)0xd88c6d7b, (q31_t)0x79c2d095, (q31_t)0xd8867356,
+ (q31_t)0x79c0e062, (q31_t)0xd880794b, (q31_t)0x79beefe3, (q31_t)0xd87a7f57, (q31_t)0x79bcff19, (q31_t)0xd874857c, (q31_t)0x79bb0e04, (q31_t)0xd86e8bb9,
+ (q31_t)0x79b91ca4, (q31_t)0xd868920f, (q31_t)0x79b72af9, (q31_t)0xd862987d, (q31_t)0x79b53903, (q31_t)0xd85c9f04, (q31_t)0x79b346c2, (q31_t)0xd856a5a3,
+ (q31_t)0x79b15435, (q31_t)0xd850ac5a, (q31_t)0x79af615e, (q31_t)0xd84ab32a, (q31_t)0x79ad6e3c, (q31_t)0xd844ba13, (q31_t)0x79ab7ace, (q31_t)0xd83ec114,
+ (q31_t)0x79a98715, (q31_t)0xd838c82d, (q31_t)0x79a79312, (q31_t)0xd832cf5f, (q31_t)0x79a59ec3, (q31_t)0xd82cd6aa, (q31_t)0x79a3aa29, (q31_t)0xd826de0d,
+ (q31_t)0x79a1b545, (q31_t)0xd820e589, (q31_t)0x799fc015, (q31_t)0xd81aed1d, (q31_t)0x799dca9a, (q31_t)0xd814f4ca, (q31_t)0x799bd4d4, (q31_t)0xd80efc8f,
+ (q31_t)0x7999dec4, (q31_t)0xd809046e, (q31_t)0x7997e868, (q31_t)0xd8030c64, (q31_t)0x7995f1c1, (q31_t)0xd7fd1474, (q31_t)0x7993facf, (q31_t)0xd7f71c9c,
+ (q31_t)0x79920392, (q31_t)0xd7f124dd, (q31_t)0x79900c0a, (q31_t)0xd7eb2d37, (q31_t)0x798e1438, (q31_t)0xd7e535a9, (q31_t)0x798c1c1a, (q31_t)0xd7df3e34,
+ (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x79882afd, (q31_t)0xd7d34f94, (q31_t)0x798631ff, (q31_t)0xd7cd586a, (q31_t)0x798438b5, (q31_t)0xd7c76158,
+ (q31_t)0x79823f20, (q31_t)0xd7c16a5f, (q31_t)0x79804541, (q31_t)0xd7bb737f, (q31_t)0x797e4b16, (q31_t)0xd7b57cb7, (q31_t)0x797c50a1, (q31_t)0xd7af8609,
+ (q31_t)0x797a55e0, (q31_t)0xd7a98f73, (q31_t)0x79785ad5, (q31_t)0xd7a398f6, (q31_t)0x79765f7f, (q31_t)0xd79da293, (q31_t)0x797463de, (q31_t)0xd797ac48,
+ (q31_t)0x797267f2, (q31_t)0xd791b616, (q31_t)0x79706bbb, (q31_t)0xd78bbffc, (q31_t)0x796e6f39, (q31_t)0xd785c9fc, (q31_t)0x796c726c, (q31_t)0xd77fd415,
+ (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x796877f1, (q31_t)0xd773e892, (q31_t)0x79667a44, (q31_t)0xd76df2f6, (q31_t)0x79647c4c, (q31_t)0xd767fd72,
+ (q31_t)0x79627e08, (q31_t)0xd7620808, (q31_t)0x79607f7a, (q31_t)0xd75c12b7, (q31_t)0x795e80a1, (q31_t)0xd7561d7f, (q31_t)0x795c817d, (q31_t)0xd7502860,
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+ (q31_t)0x79528167, (q31_t)0xd732603f, (q31_t)0x79508082, (q31_t)0xd72c6bb6, (q31_t)0x794e7f52, (q31_t)0xd7267748, (q31_t)0x794c7dd7, (q31_t)0xd72082f2,
+ (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x79487a01, (q31_t)0xd7149a92, (q31_t)0x794677a6, (q31_t)0xd70ea688, (q31_t)0x79447500, (q31_t)0xd708b297,
+ (q31_t)0x79427210, (q31_t)0xd702bec0, (q31_t)0x79406ed4, (q31_t)0xd6fccb01, (q31_t)0x793e6b4e, (q31_t)0xd6f6d75d, (q31_t)0x793c677d, (q31_t)0xd6f0e3d1,
+ (q31_t)0x793a6361, (q31_t)0xd6eaf05f, (q31_t)0x79385efa, (q31_t)0xd6e4fd06, (q31_t)0x79365a49, (q31_t)0xd6df09c6, (q31_t)0x7934554d, (q31_t)0xd6d916a0,
+ (q31_t)0x79325006, (q31_t)0xd6d32393, (q31_t)0x79304a74, (q31_t)0xd6cd30a0, (q31_t)0x792e4497, (q31_t)0xd6c73dc6, (q31_t)0x792c3e70, (q31_t)0xd6c14b05,
+ (q31_t)0x792a37fe, (q31_t)0xd6bb585e, (q31_t)0x79283141, (q31_t)0xd6b565d0, (q31_t)0x79262a3a, (q31_t)0xd6af735c, (q31_t)0x792422e8, (q31_t)0xd6a98101,
+ (q31_t)0x79221b4b, (q31_t)0xd6a38ec0, (q31_t)0x79201363, (q31_t)0xd69d9c98, (q31_t)0x791e0b31, (q31_t)0xd697aa8a, (q31_t)0x791c02b4, (q31_t)0xd691b895,
+ (q31_t)0x7919f9ec, (q31_t)0xd68bc6ba, (q31_t)0x7917f0d9, (q31_t)0xd685d4f9, (q31_t)0x7915e77c, (q31_t)0xd67fe351, (q31_t)0x7913ddd4, (q31_t)0xd679f1c2,
+ (q31_t)0x7911d3e2, (q31_t)0xd674004e, (q31_t)0x790fc9a4, (q31_t)0xd66e0ef2, (q31_t)0x790dbf1d, (q31_t)0xd6681db1, (q31_t)0x790bb44a, (q31_t)0xd6622c89,
+ (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x79079dc5, (q31_t)0xd6564a87, (q31_t)0x79059212, (q31_t)0xd65059ac, (q31_t)0x79038615, (q31_t)0xd64a68eb,
+ (q31_t)0x790179cd, (q31_t)0xd6447844, (q31_t)0x78ff6d3b, (q31_t)0xd63e87b6, (q31_t)0x78fd605d, (q31_t)0xd6389742, (q31_t)0x78fb5336, (q31_t)0xd632a6e8,
+ (q31_t)0x78f945c3, (q31_t)0xd62cb6a8, (q31_t)0x78f73806, (q31_t)0xd626c681, (q31_t)0x78f529fe, (q31_t)0xd620d675, (q31_t)0x78f31bac, (q31_t)0xd61ae682,
+ (q31_t)0x78f10d0f, (q31_t)0xd614f6a9, (q31_t)0x78eefe28, (q31_t)0xd60f06ea, (q31_t)0x78eceef6, (q31_t)0xd6091745, (q31_t)0x78eadf79, (q31_t)0xd60327b9,
+ (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78e6bfa0, (q31_t)0xd5f748f0, (q31_t)0x78e4af44, (q31_t)0xd5f159b3, (q31_t)0x78e29e9d, (q31_t)0xd5eb6a8f,
+ (q31_t)0x78e08dab, (q31_t)0xd5e57b85, (q31_t)0x78de7c6f, (q31_t)0xd5df8c96, (q31_t)0x78dc6ae8, (q31_t)0xd5d99dc0, (q31_t)0x78da5917, (q31_t)0xd5d3af04,
+ (q31_t)0x78d846fb, (q31_t)0xd5cdc062, (q31_t)0x78d63495, (q31_t)0xd5c7d1db, (q31_t)0x78d421e4, (q31_t)0xd5c1e36d, (q31_t)0x78d20ee9, (q31_t)0xd5bbf519,
+ (q31_t)0x78cffba3, (q31_t)0xd5b606e0, (q31_t)0x78cde812, (q31_t)0xd5b018c0, (q31_t)0x78cbd437, (q31_t)0xd5aa2abb, (q31_t)0x78c9c012, (q31_t)0xd5a43cd0,
+ (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78c596e7, (q31_t)0xd5986148, (q31_t)0x78c381e2, (q31_t)0xd59273ab, (q31_t)0x78c16c93, (q31_t)0xd58c8628,
+ (q31_t)0x78bf56f9, (q31_t)0xd58698c0, (q31_t)0x78bd4114, (q31_t)0xd580ab72, (q31_t)0x78bb2ae5, (q31_t)0xd57abe3d, (q31_t)0x78b9146c, (q31_t)0xd574d124,
+ (q31_t)0x78b6fda8, (q31_t)0xd56ee424, (q31_t)0x78b4e69a, (q31_t)0xd568f73f, (q31_t)0x78b2cf41, (q31_t)0xd5630a74, (q31_t)0x78b0b79e, (q31_t)0xd55d1dc3,
+ (q31_t)0x78ae9fb0, (q31_t)0xd557312d, (q31_t)0x78ac8778, (q31_t)0xd55144b0, (q31_t)0x78aa6ef5, (q31_t)0xd54b584f, (q31_t)0x78a85628, (q31_t)0xd5456c07,
+ (q31_t)0x78a63d11, (q31_t)0xd53f7fda, (q31_t)0x78a423af, (q31_t)0xd53993c7, (q31_t)0x78a20a03, (q31_t)0xd533a7cf, (q31_t)0x789ff00c, (q31_t)0xd52dbbf1,
+ (q31_t)0x789dd5cb, (q31_t)0xd527d02e, (q31_t)0x789bbb3f, (q31_t)0xd521e484, (q31_t)0x7899a06a, (q31_t)0xd51bf8f6, (q31_t)0x78978549, (q31_t)0xd5160d82,
+ (q31_t)0x789569df, (q31_t)0xd5102228, (q31_t)0x78934e2a, (q31_t)0xd50a36e9, (q31_t)0x7891322a, (q31_t)0xd5044bc4, (q31_t)0x788f15e0, (q31_t)0xd4fe60ba,
+ (q31_t)0x788cf94c, (q31_t)0xd4f875ca, (q31_t)0x788adc6e, (q31_t)0xd4f28af5, (q31_t)0x7888bf45, (q31_t)0xd4eca03a, (q31_t)0x7886a1d1, (q31_t)0xd4e6b59a,
+ (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x7882660c, (q31_t)0xd4dae0aa, (q31_t)0x788047ba, (q31_t)0xd4d4f65a, (q31_t)0x787e291d, (q31_t)0xd4cf0c24,
+ (q31_t)0x787c0a36, (q31_t)0xd4c92209, (q31_t)0x7879eb05, (q31_t)0xd4c33809, (q31_t)0x7877cb89, (q31_t)0xd4bd4e23, (q31_t)0x7875abc3, (q31_t)0xd4b76458,
+ (q31_t)0x78738bb3, (q31_t)0xd4b17aa8, (q31_t)0x78716b59, (q31_t)0xd4ab9112, (q31_t)0x786f4ab4, (q31_t)0xd4a5a798, (q31_t)0x786d29c5, (q31_t)0xd49fbe37,
+ (q31_t)0x786b088c, (q31_t)0xd499d4f2, (q31_t)0x7868e708, (q31_t)0xd493ebc8, (q31_t)0x7866c53a, (q31_t)0xd48e02b8, (q31_t)0x7864a322, (q31_t)0xd48819c3,
+ (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x78605e13, (q31_t)0xd47c4829, (q31_t)0x785e3b1c, (q31_t)0xd4765f85, (q31_t)0x785c17db, (q31_t)0xd47076fb,
+ (q31_t)0x7859f44f, (q31_t)0xd46a8e8d, (q31_t)0x7857d079, (q31_t)0xd464a639, (q31_t)0x7855ac5a, (q31_t)0xd45ebe00, (q31_t)0x785387ef, (q31_t)0xd458d5e2,
+ (q31_t)0x7851633b, (q31_t)0xd452eddf, (q31_t)0x784f3e3c, (q31_t)0xd44d05f6, (q31_t)0x784d18f4, (q31_t)0xd4471e29, (q31_t)0x784af361, (q31_t)0xd4413677,
+ (q31_t)0x7848cd83, (q31_t)0xd43b4ee0, (q31_t)0x7846a75c, (q31_t)0xd4356763, (q31_t)0x784480ea, (q31_t)0xd42f8002, (q31_t)0x78425a2f, (q31_t)0xd42998bc,
+ (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x783e0bd9, (q31_t)0xd41dca81, (q31_t)0x783be43e, (q31_t)0xd417e38c, (q31_t)0x7839bc5a, (q31_t)0xd411fcb2,
+ (q31_t)0x7837942b, (q31_t)0xd40c15f3, (q31_t)0x78356bb2, (q31_t)0xd4062f4f, (q31_t)0x783342ef, (q31_t)0xd40048c6, (q31_t)0x783119e2, (q31_t)0xd3fa6259,
+ (q31_t)0x782ef08b, (q31_t)0xd3f47c06, (q31_t)0x782cc6ea, (q31_t)0xd3ee95cf, (q31_t)0x782a9cfe, (q31_t)0xd3e8afb3, (q31_t)0x782872c8, (q31_t)0xd3e2c9b2,
+ (q31_t)0x78264849, (q31_t)0xd3dce3cd, (q31_t)0x78241d7f, (q31_t)0xd3d6fe03, (q31_t)0x7821f26b, (q31_t)0xd3d11853, (q31_t)0x781fc70d, (q31_t)0xd3cb32c0,
+ (q31_t)0x781d9b65, (q31_t)0xd3c54d47, (q31_t)0x781b6f72, (q31_t)0xd3bf67ea, (q31_t)0x78194336, (q31_t)0xd3b982a8, (q31_t)0x781716b0, (q31_t)0xd3b39d81,
+ (q31_t)0x7814e9df, (q31_t)0xd3adb876, (q31_t)0x7812bcc4, (q31_t)0xd3a7d385, (q31_t)0x78108f60, (q31_t)0xd3a1eeb1, (q31_t)0x780e61b1, (q31_t)0xd39c09f7,
+ (q31_t)0x780c33b8, (q31_t)0xd396255a, (q31_t)0x780a0575, (q31_t)0xd39040d7, (q31_t)0x7807d6e9, (q31_t)0xd38a5c70, (q31_t)0x7805a812, (q31_t)0xd3847824,
+ (q31_t)0x780378f1, (q31_t)0xd37e93f4, (q31_t)0x78014986, (q31_t)0xd378afdf, (q31_t)0x77ff19d1, (q31_t)0xd372cbe6, (q31_t)0x77fce9d2, (q31_t)0xd36ce808,
+ (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77f888f6, (q31_t)0xd361209f, (q31_t)0x77f65819, (q31_t)0xd35b3d13, (q31_t)0x77f426f2, (q31_t)0xd35559a4,
+ (q31_t)0x77f1f581, (q31_t)0xd34f764f, (q31_t)0x77efc3c5, (q31_t)0xd3499317, (q31_t)0x77ed91c0, (q31_t)0xd343affa, (q31_t)0x77eb5f71, (q31_t)0xd33dccf8,
+ (q31_t)0x77e92cd9, (q31_t)0xd337ea12, (q31_t)0x77e6f9f6, (q31_t)0xd3320748, (q31_t)0x77e4c6c9, (q31_t)0xd32c2499, (q31_t)0x77e29352, (q31_t)0xd3264206,
+ (q31_t)0x77e05f91, (q31_t)0xd3205f8f, (q31_t)0x77de2b86, (q31_t)0xd31a7d33, (q31_t)0x77dbf732, (q31_t)0xd3149af3, (q31_t)0x77d9c293, (q31_t)0xd30eb8cf,
+ (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77d55878, (q31_t)0xd302f4da, (q31_t)0x77d322fc, (q31_t)0xd2fd1309, (q31_t)0x77d0ed35, (q31_t)0xd2f73154,
+ (q31_t)0x77ceb725, (q31_t)0xd2f14fba, (q31_t)0x77cc80cb, (q31_t)0xd2eb6e3c, (q31_t)0x77ca4a27, (q31_t)0xd2e58cdb, (q31_t)0x77c81339, (q31_t)0xd2dfab95,
+ (q31_t)0x77c5dc01, (q31_t)0xd2d9ca6a, (q31_t)0x77c3a47f, (q31_t)0xd2d3e95c, (q31_t)0x77c16cb4, (q31_t)0xd2ce0869, (q31_t)0x77bf349f, (q31_t)0xd2c82793,
+ (q31_t)0x77bcfc3f, (q31_t)0xd2c246d8, (q31_t)0x77bac396, (q31_t)0xd2bc6639, (q31_t)0x77b88aa3, (q31_t)0xd2b685b6, (q31_t)0x77b65166, (q31_t)0xd2b0a54f,
+ (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x77b1de0f, (q31_t)0xd2a4e4d5, (q31_t)0x77afa3f5, (q31_t)0xd29f04c2, (q31_t)0x77ad6990, (q31_t)0xd29924cb,
+ (q31_t)0x77ab2ee2, (q31_t)0xd29344f0, (q31_t)0x77a8f3ea, (q31_t)0xd28d6531, (q31_t)0x77a6b8a9, (q31_t)0xd287858e, (q31_t)0x77a47d1d, (q31_t)0xd281a607,
+ (q31_t)0x77a24148, (q31_t)0xd27bc69c, (q31_t)0x77a00529, (q31_t)0xd275e74d, (q31_t)0x779dc8c0, (q31_t)0xd270081b, (q31_t)0x779b8c0e, (q31_t)0xd26a2904,
+ (q31_t)0x77994f11, (q31_t)0xd2644a0a, (q31_t)0x779711cb, (q31_t)0xd25e6b2b, (q31_t)0x7794d43b, (q31_t)0xd2588c69, (q31_t)0x77929661, (q31_t)0xd252adc3,
+ (q31_t)0x7790583e, (q31_t)0xd24ccf39, (q31_t)0x778e19d0, (q31_t)0xd246f0cb, (q31_t)0x778bdb19, (q31_t)0xd241127a, (q31_t)0x77899c19, (q31_t)0xd23b3444,
+ (q31_t)0x77875cce, (q31_t)0xd235562b, (q31_t)0x77851d3a, (q31_t)0xd22f782f, (q31_t)0x7782dd5c, (q31_t)0xd2299a4e, (q31_t)0x77809d35, (q31_t)0xd223bc8a,
+ (q31_t)0x777e5cc3, (q31_t)0xd21ddee2, (q31_t)0x777c1c08, (q31_t)0xd2180156, (q31_t)0x7779db03, (q31_t)0xd21223e7, (q31_t)0x777799b5, (q31_t)0xd20c4694,
+ (q31_t)0x7775581d, (q31_t)0xd206695d, (q31_t)0x7773163b, (q31_t)0xd2008c43, (q31_t)0x7770d40f, (q31_t)0xd1faaf45, (q31_t)0x776e919a, (q31_t)0xd1f4d263,
+ (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x776a0bd3, (q31_t)0xd1e918f5, (q31_t)0x7767c880, (q31_t)0xd1e33c69, (q31_t)0x776584e5, (q31_t)0xd1dd5ff9,
+ (q31_t)0x776340ff, (q31_t)0xd1d783a6, (q31_t)0x7760fcd0, (q31_t)0xd1d1a76f, (q31_t)0x775eb857, (q31_t)0xd1cbcb54, (q31_t)0x775c7395, (q31_t)0xd1c5ef56,
+ (q31_t)0x775a2e89, (q31_t)0xd1c01375, (q31_t)0x7757e933, (q31_t)0xd1ba37b0, (q31_t)0x7755a394, (q31_t)0xd1b45c08, (q31_t)0x77535dab, (q31_t)0xd1ae807c,
+ (q31_t)0x77511778, (q31_t)0xd1a8a50d, (q31_t)0x774ed0fc, (q31_t)0xd1a2c9ba, (q31_t)0x774c8a36, (q31_t)0xd19cee84, (q31_t)0x774a4327, (q31_t)0xd197136b,
+ (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x7745b42c, (q31_t)0xd18b5d8e, (q31_t)0x77436c40, (q31_t)0xd18582ca, (q31_t)0x7741240a, (q31_t)0xd17fa823,
+ (q31_t)0x773edb8b, (q31_t)0xd179cd99, (q31_t)0x773c92c2, (q31_t)0xd173f32c, (q31_t)0x773a49b0, (q31_t)0xd16e18db, (q31_t)0x77380054, (q31_t)0xd1683ea7,
+ (q31_t)0x7735b6af, (q31_t)0xd1626490, (q31_t)0x77336cc0, (q31_t)0xd15c8a95, (q31_t)0x77312287, (q31_t)0xd156b0b7, (q31_t)0x772ed805, (q31_t)0xd150d6f6,
+ (q31_t)0x772c8d3a, (q31_t)0xd14afd52, (q31_t)0x772a4225, (q31_t)0xd14523cb, (q31_t)0x7727f6c6, (q31_t)0xd13f4a60, (q31_t)0x7725ab1f, (q31_t)0xd1397113,
+ (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x772112f2, (q31_t)0xd12dbece, (q31_t)0x771ec66e, (q31_t)0xd127e5d7, (q31_t)0x771c79a0, (q31_t)0xd1220cfc,
+ (q31_t)0x771a2c88, (q31_t)0xd11c343f, (q31_t)0x7717df27, (q31_t)0xd1165b9f, (q31_t)0x7715917d, (q31_t)0xd110831b, (q31_t)0x77134389, (q31_t)0xd10aaab5,
+ (q31_t)0x7710f54c, (q31_t)0xd104d26b, (q31_t)0x770ea6c5, (q31_t)0xd0fefa3f, (q31_t)0x770c57f5, (q31_t)0xd0f9222f, (q31_t)0x770a08dc, (q31_t)0xd0f34a3d,
+ (q31_t)0x7707b979, (q31_t)0xd0ed7267, (q31_t)0x770569cc, (q31_t)0xd0e79aaf, (q31_t)0x770319d6, (q31_t)0xd0e1c313, (q31_t)0x7700c997, (q31_t)0xd0dbeb95,
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+ (q31_t)0x76bd35c7, (q31_t)0xd032b3e7, (q31_t)0x76badcf0, (q31_t)0xd02cdfd8, (q31_t)0x76b883d0, (q31_t)0xd0270be5, (q31_t)0x76b62a66, (q31_t)0xd0213810,
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+ (q31_t)0x765e7540, (q31_t)0xcf49ebda, (q31_t)0x765c10fc, (q31_t)0xcf441c71, (q31_t)0x7659ac6f, (q31_t)0xcf3e4d26, (q31_t)0x76574798, (q31_t)0xcf387dfa,
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+ (q31_t)0x76115f63, (q31_t)0xce903942, (q31_t)0x760ef201, (q31_t)0xce8a6da2, (q31_t)0x760c8457, (q31_t)0xce84a220, (q31_t)0x760a1664, (q31_t)0xce7ed6bd,
+ (q31_t)0x7607a828, (q31_t)0xce790b79, (q31_t)0x760539a3, (q31_t)0xce734053, (q31_t)0x7602cad5, (q31_t)0xce6d754c, (q31_t)0x76005bbf, (q31_t)0xce67aa63,
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+ (q31_t)0x75af6a7b, (q31_t)0xcda8c5c1, (q31_t)0x75acf1bd, (q31_t)0xcda2fef0, (q31_t)0x75aa78b6, (q31_t)0xcd9d383f, (q31_t)0x75a7ff67, (q31_t)0xcd9771ac,
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+ (q31_t)0x759b9c9b, (q31_t)0xcd7a92a2, (q31_t)0x75992198, (q31_t)0xcd74ccca, (q31_t)0x7596a64d, (q31_t)0xcd6f0711, (q31_t)0x75942ab9, (q31_t)0xcd694178,
+ (q31_t)0x7591aedd, (q31_t)0xcd637bfe, (q31_t)0x758f32b9, (q31_t)0xcd5db6a3, (q31_t)0x758cb64c, (q31_t)0xcd57f167, (q31_t)0x758a3996, (q31_t)0xcd522c4a,
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+ (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x757b4762, (q31_t)0xcd2f9030, (q31_t)0x7578c8b0, (q31_t)0xcd29cbee, (q31_t)0x757649b7, (q31_t)0xcd2407cc,
+ (q31_t)0x7573ca75, (q31_t)0xcd1e43ca, (q31_t)0x75714aea, (q31_t)0xcd187fe6, (q31_t)0x756ecb18, (q31_t)0xcd12bc22, (q31_t)0x756c4afc, (q31_t)0xcd0cf87e,
+ (q31_t)0x7569ca99, (q31_t)0xcd0734f9, (q31_t)0x756749ec, (q31_t)0xcd017193, (q31_t)0x7564c8f8, (q31_t)0xccfbae4d, (q31_t)0x756247bb, (q31_t)0xccf5eb26,
+ (q31_t)0x755fc635, (q31_t)0xccf0281f, (q31_t)0x755d4467, (q31_t)0xccea6538, (q31_t)0x755ac251, (q31_t)0xcce4a26f, (q31_t)0x75583ff3, (q31_t)0xccdedfc7,
+ (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x75533a5c, (q31_t)0xccd35ad4, (q31_t)0x7550b725, (q31_t)0xcccd988a, (q31_t)0x754e33a4, (q31_t)0xccc7d65f,
+ (q31_t)0x754bafdc, (q31_t)0xccc21455, (q31_t)0x75492bcb, (q31_t)0xccbc5269, (q31_t)0x7546a772, (q31_t)0xccb6909e, (q31_t)0x754422d0, (q31_t)0xccb0cef2,
+ (q31_t)0x75419de7, (q31_t)0xccab0d65, (q31_t)0x753f18b4, (q31_t)0xcca54bf9, (q31_t)0x753c933a, (q31_t)0xcc9f8aac, (q31_t)0x753a0d77, (q31_t)0xcc99c97e,
+ (q31_t)0x7537876c, (q31_t)0xcc940871, (q31_t)0x75350118, (q31_t)0xcc8e4783, (q31_t)0x75327a7d, (q31_t)0xcc8886b5, (q31_t)0x752ff399, (q31_t)0xcc82c607,
+ (q31_t)0x752d6c6c, (q31_t)0xcc7d0578, (q31_t)0x752ae4f8, (q31_t)0xcc774509, (q31_t)0x75285d3b, (q31_t)0xcc7184ba, (q31_t)0x7525d536, (q31_t)0xcc6bc48b,
+ (q31_t)0x75234ce8, (q31_t)0xcc66047b, (q31_t)0x7520c453, (q31_t)0xcc60448c, (q31_t)0x751e3b75, (q31_t)0xcc5a84bc, (q31_t)0x751bb24f, (q31_t)0xcc54c50c,
+ (q31_t)0x751928e0, (q31_t)0xcc4f057c, (q31_t)0x75169f2a, (q31_t)0xcc49460c, (q31_t)0x7514152b, (q31_t)0xcc4386bc, (q31_t)0x75118ae4, (q31_t)0xcc3dc78b,
+ (q31_t)0x750f0054, (q31_t)0xcc38087b, (q31_t)0x750c757d, (q31_t)0xcc32498a, (q31_t)0x7509ea5d, (q31_t)0xcc2c8aba, (q31_t)0x75075ef5, (q31_t)0xcc26cc09,
+ (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x7502474d, (q31_t)0xcc1b4f08, (q31_t)0x74ffbb0d, (q31_t)0xcc1590b8, (q31_t)0x74fd2e84, (q31_t)0xcc0fd287,
+ (q31_t)0x74faa1b3, (q31_t)0xcc0a1477, (q31_t)0x74f8149a, (q31_t)0xcc045686, (q31_t)0x74f58739, (q31_t)0xcbfe98b6, (q31_t)0x74f2f990, (q31_t)0xcbf8db05,
+ (q31_t)0x74f06b9e, (q31_t)0xcbf31d75, (q31_t)0x74eddd65, (q31_t)0xcbed6005, (q31_t)0x74eb4ee3, (q31_t)0xcbe7a2b5, (q31_t)0x74e8c01a, (q31_t)0xcbe1e585,
+ (q31_t)0x74e63108, (q31_t)0xcbdc2876, (q31_t)0x74e3a1ae, (q31_t)0xcbd66b86, (q31_t)0x74e1120c, (q31_t)0xcbd0aeb7, (q31_t)0x74de8221, (q31_t)0xcbcaf208,
+ (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74d96175, (q31_t)0xcbbf790a, (q31_t)0x74d6d0b2, (q31_t)0xcbb9bcbb, (q31_t)0x74d43fa8, (q31_t)0xcbb4008d,
+ (q31_t)0x74d1ae55, (q31_t)0xcbae447f, (q31_t)0x74cf1cbb, (q31_t)0xcba88891, (q31_t)0x74cc8ad8, (q31_t)0xcba2ccc4, (q31_t)0x74c9f8ad, (q31_t)0xcb9d1117,
+ (q31_t)0x74c7663a, (q31_t)0xcb97558a, (q31_t)0x74c4d380, (q31_t)0xcb919a1d, (q31_t)0x74c2407d, (q31_t)0xcb8bded1, (q31_t)0x74bfad32, (q31_t)0xcb8623a5,
+ (q31_t)0x74bd199f, (q31_t)0xcb80689a, (q31_t)0x74ba85c4, (q31_t)0xcb7aadaf, (q31_t)0x74b7f1a1, (q31_t)0xcb74f2e4, (q31_t)0x74b55d36, (q31_t)0xcb6f383a,
+ (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x74b03389, (q31_t)0xcb63c347, (q31_t)0x74ad9e46, (q31_t)0xcb5e08fe, (q31_t)0x74ab08bb, (q31_t)0xcb584ed6,
+ (q31_t)0x74a872e8, (q31_t)0xcb5294ce, (q31_t)0x74a5dccd, (q31_t)0xcb4cdae6, (q31_t)0x74a3466b, (q31_t)0xcb47211f, (q31_t)0x74a0afc0, (q31_t)0xcb416779,
+ (q31_t)0x749e18cd, (q31_t)0xcb3badf3, (q31_t)0x749b8193, (q31_t)0xcb35f48d, (q31_t)0x7498ea11, (q31_t)0xcb303b49, (q31_t)0x74965246, (q31_t)0xcb2a8224,
+ (q31_t)0x7493ba34, (q31_t)0xcb24c921, (q31_t)0x749121da, (q31_t)0xcb1f103e, (q31_t)0x748e8938, (q31_t)0xcb19577b, (q31_t)0x748bf04d, (q31_t)0xcb139ed9,
+ (q31_t)0x7489571c, (q31_t)0xcb0de658, (q31_t)0x7486bda2, (q31_t)0xcb082df8, (q31_t)0x748423e0, (q31_t)0xcb0275b8, (q31_t)0x748189d7, (q31_t)0xcafcbd99,
+ (q31_t)0x747eef85, (q31_t)0xcaf7059a, (q31_t)0x747c54ec, (q31_t)0xcaf14dbd, (q31_t)0x7479ba0b, (q31_t)0xcaeb9600, (q31_t)0x74771ee2, (q31_t)0xcae5de64,
+ (q31_t)0x74748371, (q31_t)0xcae026e8, (q31_t)0x7471e7b8, (q31_t)0xcada6f8d, (q31_t)0x746f4bb8, (q31_t)0xcad4b853, (q31_t)0x746caf70, (q31_t)0xcacf013a,
+ (q31_t)0x746a12df, (q31_t)0xcac94a42, (q31_t)0x74677608, (q31_t)0xcac3936b, (q31_t)0x7464d8e8, (q31_t)0xcabddcb4, (q31_t)0x74623b80, (q31_t)0xcab8261e,
+ (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x745cffda, (q31_t)0xcaacb955, (q31_t)0x745a619b, (q31_t)0xcaa70322, (q31_t)0x7457c314, (q31_t)0xcaa14d10,
+ (q31_t)0x74552446, (q31_t)0xca9b971e, (q31_t)0x74528530, (q31_t)0xca95e14e, (q31_t)0x744fe5d2, (q31_t)0xca902b9f, (q31_t)0x744d462c, (q31_t)0xca8a7610,
+ (q31_t)0x744aa63f, (q31_t)0xca84c0a3, (q31_t)0x7448060a, (q31_t)0xca7f0b56, (q31_t)0x7445658d, (q31_t)0xca79562b, (q31_t)0x7442c4c8, (q31_t)0xca73a120,
+ (q31_t)0x744023bc, (q31_t)0xca6dec37, (q31_t)0x743d8268, (q31_t)0xca68376e, (q31_t)0x743ae0cc, (q31_t)0xca6282c7, (q31_t)0x74383ee9, (q31_t)0xca5cce40,
+ (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x7432fa4b, (q31_t)0xca516597, (q31_t)0x74305790, (q31_t)0xca4bb174, (q31_t)0x742db48e, (q31_t)0xca45fd72,
+ (q31_t)0x742b1144, (q31_t)0xca404992, (q31_t)0x74286db3, (q31_t)0xca3a95d2, (q31_t)0x7425c9da, (q31_t)0xca34e234, (q31_t)0x742325b9, (q31_t)0xca2f2eb6,
+ (q31_t)0x74208150, (q31_t)0xca297b5a, (q31_t)0x741ddca0, (q31_t)0xca23c820, (q31_t)0x741b37a9, (q31_t)0xca1e1506, (q31_t)0x74189269, (q31_t)0xca18620e,
+ (q31_t)0x7415ece2, (q31_t)0xca12af37, (q31_t)0x74134714, (q31_t)0xca0cfc81, (q31_t)0x7410a0fe, (q31_t)0xca0749ec, (q31_t)0x740dfaa0, (q31_t)0xca019779,
+ (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x7408ad0e, (q31_t)0xc9f632f6, (q31_t)0x740605d9, (q31_t)0xc9f080e7, (q31_t)0x74035e5d, (q31_t)0xc9eacef9,
+ (q31_t)0x7400b69a, (q31_t)0xc9e51d2d, (q31_t)0x73fe0e8f, (q31_t)0xc9df6b81, (q31_t)0x73fb663c, (q31_t)0xc9d9b9f7, (q31_t)0x73f8bda2, (q31_t)0xc9d4088f,
+ (q31_t)0x73f614c0, (q31_t)0xc9ce5748, (q31_t)0x73f36b97, (q31_t)0xc9c8a622, (q31_t)0x73f0c226, (q31_t)0xc9c2f51e, (q31_t)0x73ee186e, (q31_t)0xc9bd443c,
+ (q31_t)0x73eb6e6e, (q31_t)0xc9b7937a, (q31_t)0x73e8c426, (q31_t)0xc9b1e2db, (q31_t)0x73e61997, (q31_t)0xc9ac325d, (q31_t)0x73e36ec1, (q31_t)0xc9a68200,
+ (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5, (q31_t)0x73de183e, (q31_t)0xc99b21ab, (q31_t)0x73db6c91, (q31_t)0xc99571b3, (q31_t)0x73d8c09d, (q31_t)0xc98fc1dc,
+ (q31_t)0x73d61461, (q31_t)0xc98a1227, (q31_t)0x73d367de, (q31_t)0xc9846294, (q31_t)0x73d0bb13, (q31_t)0xc97eb322, (q31_t)0x73ce0e01, (q31_t)0xc97903d2,
+ (q31_t)0x73cb60a8, (q31_t)0xc97354a4, (q31_t)0x73c8b307, (q31_t)0xc96da597, (q31_t)0x73c6051f, (q31_t)0xc967f6ac, (q31_t)0x73c356ef, (q31_t)0xc96247e2,
+ (q31_t)0x73c0a878, (q31_t)0xc95c993a, (q31_t)0x73bdf9b9, (q31_t)0xc956eab4, (q31_t)0x73bb4ab3, (q31_t)0xc9513c50, (q31_t)0x73b89b66, (q31_t)0xc94b8e0d,
+ (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x73b33bf5, (q31_t)0xc94031ed, (q31_t)0x73b08bd1, (q31_t)0xc93a8410, (q31_t)0x73addb67, (q31_t)0xc934d654,
+ (q31_t)0x73ab2ab4, (q31_t)0xc92f28ba, (q31_t)0x73a879bb, (q31_t)0xc9297b42, (q31_t)0x73a5c87a, (q31_t)0xc923cdec, (q31_t)0x73a316f2, (q31_t)0xc91e20b8,
+ (q31_t)0x73a06522, (q31_t)0xc91873a5, (q31_t)0x739db30b, (q31_t)0xc912c6b5, (q31_t)0x739b00ad, (q31_t)0xc90d19e6, (q31_t)0x73984e07, (q31_t)0xc9076d39,
+ (q31_t)0x73959b1b, (q31_t)0xc901c0ae, (q31_t)0x7392e7e6, (q31_t)0xc8fc1445, (q31_t)0x7390346b, (q31_t)0xc8f667fe, (q31_t)0x738d80a8, (q31_t)0xc8f0bbd9,
+ (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x7388184d, (q31_t)0xc8e563f5, (q31_t)0x738563b5, (q31_t)0xc8dfb836, (q31_t)0x7382aed5, (q31_t)0xc8da0c99,
+ (q31_t)0x737ff9ae, (q31_t)0xc8d4611d, (q31_t)0x737d4440, (q31_t)0xc8ceb5c4, (q31_t)0x737a8e8a, (q31_t)0xc8c90a8d, (q31_t)0x7377d88d, (q31_t)0xc8c35f78,
+ (q31_t)0x73752249, (q31_t)0xc8bdb485, (q31_t)0x73726bbe, (q31_t)0xc8b809b4, (q31_t)0x736fb4ec, (q31_t)0xc8b25f06, (q31_t)0x736cfdd2, (q31_t)0xc8acb479,
+ (q31_t)0x736a4671, (q31_t)0xc8a70a0e, (q31_t)0x73678ec9, (q31_t)0xc8a15fc6, (q31_t)0x7364d6da, (q31_t)0xc89bb5a0, (q31_t)0x73621ea4, (q31_t)0xc8960b9c,
+ (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x735cad61, (q31_t)0xc88ab7fa, (q31_t)0x7359f456, (q31_t)0xc8850e5d, (q31_t)0x73573b03, (q31_t)0xc87f64e2,
+ (q31_t)0x73548168, (q31_t)0xc879bb89, (q31_t)0x7351c787, (q31_t)0xc8741252, (q31_t)0x734f0d5f, (q31_t)0xc86e693d, (q31_t)0x734c52ef, (q31_t)0xc868c04b,
+ (q31_t)0x73499838, (q31_t)0xc863177b, (q31_t)0x7346dd3a, (q31_t)0xc85d6ece, (q31_t)0x734421f6, (q31_t)0xc857c642, (q31_t)0x7341666a, (q31_t)0xc8521dd9,
+ (q31_t)0x733eaa96, (q31_t)0xc84c7593, (q31_t)0x733bee7c, (q31_t)0xc846cd6e, (q31_t)0x7339321b, (q31_t)0xc841256d, (q31_t)0x73367572, (q31_t)0xc83b7d8d,
+ (q31_t)0x7333b883, (q31_t)0xc835d5d0, (q31_t)0x7330fb4d, (q31_t)0xc8302e35, (q31_t)0x732e3dcf, (q31_t)0xc82a86bd, (q31_t)0x732b800a, (q31_t)0xc824df67,
+ (q31_t)0x7328c1ff, (q31_t)0xc81f3834, (q31_t)0x732603ac, (q31_t)0xc8199123, (q31_t)0x73234512, (q31_t)0xc813ea35, (q31_t)0x73208632, (q31_t)0xc80e4369,
+ (q31_t)0x731dc70a, (q31_t)0xc8089cbf, (q31_t)0x731b079b, (q31_t)0xc802f638, (q31_t)0x731847e5, (q31_t)0xc7fd4fd4, (q31_t)0x731587e8, (q31_t)0xc7f7a992,
+ (q31_t)0x7312c7a5, (q31_t)0xc7f20373, (q31_t)0x7310071a, (q31_t)0xc7ec5d76, (q31_t)0x730d4648, (q31_t)0xc7e6b79c, (q31_t)0x730a8530, (q31_t)0xc7e111e5,
+ (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x73050229, (q31_t)0xc7d5c6de, (q31_t)0x7302403c, (q31_t)0xc7d0218e, (q31_t)0x72ff7e07, (q31_t)0xc7ca7c61,
+ (q31_t)0x72fcbb8c, (q31_t)0xc7c4d757, (q31_t)0x72f9f8c9, (q31_t)0xc7bf3270, (q31_t)0x72f735c0, (q31_t)0xc7b98dab, (q31_t)0x72f47270, (q31_t)0xc7b3e909,
+ (q31_t)0x72f1aed9, (q31_t)0xc7ae4489, (q31_t)0x72eeeafb, (q31_t)0xc7a8a02c, (q31_t)0x72ec26d6, (q31_t)0xc7a2fbf3, (q31_t)0x72e9626a, (q31_t)0xc79d57db,
+ (q31_t)0x72e69db7, (q31_t)0xc797b3e7, (q31_t)0x72e3d8be, (q31_t)0xc7921015, (q31_t)0x72e1137d, (q31_t)0xc78c6c67, (q31_t)0x72de4df6, (q31_t)0xc786c8db,
+ (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72d8c213, (q31_t)0xc77b822b, (q31_t)0x72d5fbb7, (q31_t)0xc775df08, (q31_t)0x72d33514, (q31_t)0xc7703c08,
+ (q31_t)0x72d06e2b, (q31_t)0xc76a992a, (q31_t)0x72cda6fb, (q31_t)0xc764f66f, (q31_t)0x72cadf83, (q31_t)0xc75f53d7, (q31_t)0x72c817c6, (q31_t)0xc759b163,
+ (q31_t)0x72c54fc1, (q31_t)0xc7540f11, (q31_t)0x72c28775, (q31_t)0xc74e6ce2, (q31_t)0x72bfbee3, (q31_t)0xc748cad6, (q31_t)0x72bcf60a, (q31_t)0xc74328ed,
+ (q31_t)0x72ba2cea, (q31_t)0xc73d8727, (q31_t)0x72b76383, (q31_t)0xc737e584, (q31_t)0x72b499d6, (q31_t)0xc7324404, (q31_t)0x72b1cfe1, (q31_t)0xc72ca2a7,
+ (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72ac3b25, (q31_t)0xc7216056, (q31_t)0x72a9705c, (q31_t)0xc71bbf62, (q31_t)0x72a6a54d, (q31_t)0xc7161e92,
+ (q31_t)0x72a3d9f7, (q31_t)0xc7107de4, (q31_t)0x72a10e5b, (q31_t)0xc70add5a, (q31_t)0x729e4277, (q31_t)0xc7053cf2, (q31_t)0x729b764d, (q31_t)0xc6ff9cae,
+ (q31_t)0x7298a9dd, (q31_t)0xc6f9fc8d, (q31_t)0x7295dd25, (q31_t)0xc6f45c8f, (q31_t)0x72931027, (q31_t)0xc6eebcb5, (q31_t)0x729042e3, (q31_t)0xc6e91cfd,
+ (q31_t)0x728d7557, (q31_t)0xc6e37d69, (q31_t)0x728aa785, (q31_t)0xc6ddddf8, (q31_t)0x7287d96c, (q31_t)0xc6d83eab, (q31_t)0x72850b0d, (q31_t)0xc6d29f80,
+ (q31_t)0x72823c67, (q31_t)0xc6cd0079, (q31_t)0x727f6d7a, (q31_t)0xc6c76195, (q31_t)0x727c9e47, (q31_t)0xc6c1c2d4, (q31_t)0x7279cecd, (q31_t)0xc6bc2437,
+ (q31_t)0x7276ff0d, (q31_t)0xc6b685bd, (q31_t)0x72742f05, (q31_t)0xc6b0e767, (q31_t)0x72715eb8, (q31_t)0xc6ab4933, (q31_t)0x726e8e23, (q31_t)0xc6a5ab23,
+ (q31_t)0x726bbd48, (q31_t)0xc6a00d37, (q31_t)0x7268ec27, (q31_t)0xc69a6f6e, (q31_t)0x72661abf, (q31_t)0xc694d1c8, (q31_t)0x72634910, (q31_t)0xc68f3446,
+ (q31_t)0x7260771b, (q31_t)0xc68996e7, (q31_t)0x725da4df, (q31_t)0xc683f9ab, (q31_t)0x725ad25d, (q31_t)0xc67e5c93, (q31_t)0x7257ff94, (q31_t)0xc678bf9f,
+ (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7252592f, (q31_t)0xc66d8620, (q31_t)0x724f8593, (q31_t)0xc667e996, (q31_t)0x724cb1b0, (q31_t)0xc6624d30,
+ (q31_t)0x7249dd86, (q31_t)0xc65cb0ed, (q31_t)0x72470916, (q31_t)0xc65714cd, (q31_t)0x72443460, (q31_t)0xc65178d1, (q31_t)0x72415f63, (q31_t)0xc64bdcf9,
+ (q31_t)0x723e8a20, (q31_t)0xc6464144, (q31_t)0x723bb496, (q31_t)0xc640a5b3, (q31_t)0x7238dec5, (q31_t)0xc63b0a46, (q31_t)0x723608af, (q31_t)0xc6356efc,
+ (q31_t)0x72333251, (q31_t)0xc62fd3d6, (q31_t)0x72305bae, (q31_t)0xc62a38d4, (q31_t)0x722d84c4, (q31_t)0xc6249df5, (q31_t)0x722aad93, (q31_t)0xc61f033a,
+ (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x7224fe5f, (q31_t)0xc613ce2f, (q31_t)0x7222265b, (q31_t)0xc60e33df, (q31_t)0x721f4e11, (q31_t)0xc60899b2,
+ (q31_t)0x721c7580, (q31_t)0xc602ffaa, (q31_t)0x72199ca9, (q31_t)0xc5fd65c5, (q31_t)0x7216c38c, (q31_t)0xc5f7cc04, (q31_t)0x7213ea28, (q31_t)0xc5f23267,
+ (q31_t)0x7211107e, (q31_t)0xc5ec98ee, (q31_t)0x720e368d, (q31_t)0xc5e6ff98, (q31_t)0x720b5c57, (q31_t)0xc5e16667, (q31_t)0x720881d9, (q31_t)0xc5dbcd59,
+ (q31_t)0x7205a716, (q31_t)0xc5d6346f, (q31_t)0x7202cc0c, (q31_t)0xc5d09ba9, (q31_t)0x71fff0bc, (q31_t)0xc5cb0307, (q31_t)0x71fd1525, (q31_t)0xc5c56a89,
+ (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71f75d25, (q31_t)0xc5ba39f8, (q31_t)0x71f480bc, (q31_t)0xc5b4a1e5, (q31_t)0x71f1a40c, (q31_t)0xc5af09f7,
+ (q31_t)0x71eec716, (q31_t)0xc5a9722c, (q31_t)0x71ebe9da, (q31_t)0xc5a3da86, (q31_t)0x71e90c57, (q31_t)0xc59e4303, (q31_t)0x71e62e8f, (q31_t)0xc598aba5,
+ (q31_t)0x71e35080, (q31_t)0xc593146a, (q31_t)0x71e0722a, (q31_t)0xc58d7d54, (q31_t)0x71dd938f, (q31_t)0xc587e661, (q31_t)0x71dab4ad, (q31_t)0xc5824f93,
+ (q31_t)0x71d7d585, (q31_t)0xc57cb8e9, (q31_t)0x71d4f617, (q31_t)0xc5772263, (q31_t)0x71d21662, (q31_t)0xc5718c00, (q31_t)0x71cf3667, (q31_t)0xc56bf5c2,
+ (q31_t)0x71cc5626, (q31_t)0xc5665fa9, (q31_t)0x71c9759f, (q31_t)0xc560c9b3, (q31_t)0x71c694d2, (q31_t)0xc55b33e2, (q31_t)0x71c3b3bf, (q31_t)0xc5559e34,
+ (q31_t)0x71c0d265, (q31_t)0xc55008ab, (q31_t)0x71bdf0c5, (q31_t)0xc54a7346, (q31_t)0x71bb0edf, (q31_t)0xc544de05, (q31_t)0x71b82cb3, (q31_t)0xc53f48e9,
+ (q31_t)0x71b54a41, (q31_t)0xc539b3f1, (q31_t)0x71b26788, (q31_t)0xc5341f1d, (q31_t)0x71af848a, (q31_t)0xc52e8a6d, (q31_t)0x71aca145, (q31_t)0xc528f5e1,
+ (q31_t)0x71a9bdba, (q31_t)0xc523617a, (q31_t)0x71a6d9e9, (q31_t)0xc51dcd37, (q31_t)0x71a3f5d2, (q31_t)0xc5183919, (q31_t)0x71a11175, (q31_t)0xc512a51f,
+ (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x719b47e9, (q31_t)0xc5077d97, (q31_t)0x719862b9, (q31_t)0xc501ea0a, (q31_t)0x71957d44, (q31_t)0xc4fc56a2,
+ (q31_t)0x71929789, (q31_t)0xc4f6c35d, (q31_t)0x718fb187, (q31_t)0xc4f1303d, (q31_t)0x718ccb3f, (q31_t)0xc4eb9d42, (q31_t)0x7189e4b2, (q31_t)0xc4e60a6b,
+ (q31_t)0x7186fdde, (q31_t)0xc4e077b8, (q31_t)0x718416c4, (q31_t)0xc4dae52a, (q31_t)0x71812f65, (q31_t)0xc4d552c1, (q31_t)0x717e47bf, (q31_t)0xc4cfc07c,
+ (q31_t)0x717b5fd3, (q31_t)0xc4ca2e5b, (q31_t)0x717877a1, (q31_t)0xc4c49c5f, (q31_t)0x71758f29, (q31_t)0xc4bf0a87, (q31_t)0x7172a66c, (q31_t)0xc4b978d4,
+ (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x716cd41e, (q31_t)0xc4ae55dc, (q31_t)0x7169ea8f, (q31_t)0xc4a8c497, (q31_t)0x716700b9, (q31_t)0xc4a33376,
+ (q31_t)0x7164169d, (q31_t)0xc49da27a, (q31_t)0x71612c3c, (q31_t)0xc49811a3, (q31_t)0x715e4194, (q31_t)0xc49280f0, (q31_t)0x715b56a7, (q31_t)0xc48cf062,
+ (q31_t)0x71586b74, (q31_t)0xc4875ff9, (q31_t)0x71557ffa, (q31_t)0xc481cfb4, (q31_t)0x7152943b, (q31_t)0xc47c3f94, (q31_t)0x714fa836, (q31_t)0xc476af98,
+ (q31_t)0x714cbbeb, (q31_t)0xc4711fc2, (q31_t)0x7149cf5a, (q31_t)0xc46b9010, (q31_t)0x7146e284, (q31_t)0xc4660083, (q31_t)0x7143f567, (q31_t)0xc460711b,
+ (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x713e1a5c, (q31_t)0xc45552b8, (q31_t)0x713b2c6e, (q31_t)0xc44fc3be, (q31_t)0x71383e3a, (q31_t)0xc44a34e9,
+ (q31_t)0x71354fc0, (q31_t)0xc444a639, (q31_t)0x71326101, (q31_t)0xc43f17ad, (q31_t)0x712f71fb, (q31_t)0xc4398947, (q31_t)0x712c82b0, (q31_t)0xc433fb05,
+ (q31_t)0x7129931f, (q31_t)0xc42e6ce8, (q31_t)0x7126a348, (q31_t)0xc428def0, (q31_t)0x7123b32b, (q31_t)0xc423511d, (q31_t)0x7120c2c8, (q31_t)0xc41dc36f,
+ (q31_t)0x711dd220, (q31_t)0xc41835e6, (q31_t)0x711ae132, (q31_t)0xc412a882, (q31_t)0x7117effe, (q31_t)0xc40d1b42, (q31_t)0x7114fe84, (q31_t)0xc4078e28,
+ (q31_t)0x71120cc5, (q31_t)0xc4020133, (q31_t)0x710f1ac0, (q31_t)0xc3fc7462, (q31_t)0x710c2875, (q31_t)0xc3f6e7b7, (q31_t)0x710935e4, (q31_t)0xc3f15b31,
+ (q31_t)0x7106430e, (q31_t)0xc3ebced0, (q31_t)0x71034ff2, (q31_t)0xc3e64294, (q31_t)0x71005c90, (q31_t)0xc3e0b67d, (q31_t)0x70fd68e9, (q31_t)0xc3db2a8b,
+ (q31_t)0x70fa74fc, (q31_t)0xc3d59ebe, (q31_t)0x70f780c9, (q31_t)0xc3d01316, (q31_t)0x70f48c50, (q31_t)0xc3ca8793, (q31_t)0x70f19792, (q31_t)0xc3c4fc36,
+ (q31_t)0x70eea28e, (q31_t)0xc3bf70fd, (q31_t)0x70ebad45, (q31_t)0xc3b9e5ea, (q31_t)0x70e8b7b5, (q31_t)0xc3b45afc, (q31_t)0x70e5c1e1, (q31_t)0xc3aed034,
+ (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70dfd566, (q31_t)0xc3a3bb12, (q31_t)0x70dcdec0, (q31_t)0xc39e30b8, (q31_t)0x70d9e7d5, (q31_t)0xc398a685,
+ (q31_t)0x70d6f0a4, (q31_t)0xc3931c76, (q31_t)0x70d3f92d, (q31_t)0xc38d928d, (q31_t)0x70d10171, (q31_t)0xc38808c9, (q31_t)0x70ce096f, (q31_t)0xc3827f2a,
+ (q31_t)0x70cb1128, (q31_t)0xc37cf5b0, (q31_t)0x70c8189b, (q31_t)0xc3776c5c, (q31_t)0x70c51fc8, (q31_t)0xc371e32d, (q31_t)0x70c226b0, (q31_t)0xc36c5a24,
+ (q31_t)0x70bf2d53, (q31_t)0xc366d140, (q31_t)0x70bc33b0, (q31_t)0xc3614881, (q31_t)0x70b939c7, (q31_t)0xc35bbfe8, (q31_t)0x70b63f99, (q31_t)0xc3563774,
+ (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x70b04a6b, (q31_t)0xc34b26fc, (q31_t)0x70ad4f6d, (q31_t)0xc3459ef9, (q31_t)0x70aa5428, (q31_t)0xc340171b,
+ (q31_t)0x70a7589f, (q31_t)0xc33a8f62, (q31_t)0x70a45ccf, (q31_t)0xc33507cf, (q31_t)0x70a160ba, (q31_t)0xc32f8061, (q31_t)0x709e6460, (q31_t)0xc329f919,
+ (q31_t)0x709b67c0, (q31_t)0xc32471f7, (q31_t)0x70986adb, (q31_t)0xc31eeaf9, (q31_t)0x70956db1, (q31_t)0xc3196422, (q31_t)0x70927041, (q31_t)0xc313dd70,
+ (q31_t)0x708f728b, (q31_t)0xc30e56e4, (q31_t)0x708c7490, (q31_t)0xc308d07d, (q31_t)0x70897650, (q31_t)0xc3034a3c, (q31_t)0x708677ca, (q31_t)0xc2fdc420,
+ (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x708079ee, (q31_t)0xc2f2b85a, (q31_t)0x707d7a98, (q31_t)0xc2ed32af, (q31_t)0x707a7afd, (q31_t)0xc2e7ad2a,
+ (q31_t)0x70777b1c, (q31_t)0xc2e227cb, (q31_t)0x70747af6, (q31_t)0xc2dca291, (q31_t)0x70717a8a, (q31_t)0xc2d71d7e, (q31_t)0x706e79d9, (q31_t)0xc2d1988f,
+ (q31_t)0x706b78e3, (q31_t)0xc2cc13c7, (q31_t)0x706877a7, (q31_t)0xc2c68f24, (q31_t)0x70657626, (q31_t)0xc2c10aa7, (q31_t)0x70627460, (q31_t)0xc2bb8650,
+ (q31_t)0x705f7255, (q31_t)0xc2b6021f, (q31_t)0x705c7004, (q31_t)0xc2b07e14, (q31_t)0x70596d6d, (q31_t)0xc2aafa2e, (q31_t)0x70566a92, (q31_t)0xc2a5766e,
+ (q31_t)0x70536771, (q31_t)0xc29ff2d4, (q31_t)0x7050640b, (q31_t)0xc29a6f60, (q31_t)0x704d6060, (q31_t)0xc294ec12, (q31_t)0x704a5c6f, (q31_t)0xc28f68e9,
+ (q31_t)0x70475839, (q31_t)0xc289e5e7, (q31_t)0x704453be, (q31_t)0xc284630a, (q31_t)0x70414efd, (q31_t)0xc27ee054, (q31_t)0x703e49f8, (q31_t)0xc2795dc3,
+ (q31_t)0x703b44ad, (q31_t)0xc273db58, (q31_t)0x70383f1d, (q31_t)0xc26e5913, (q31_t)0x70353947, (q31_t)0xc268d6f5, (q31_t)0x7032332d, (q31_t)0xc26354fc,
+ (q31_t)0x702f2ccd, (q31_t)0xc25dd329, (q31_t)0x702c2628, (q31_t)0xc258517c, (q31_t)0x70291f3e, (q31_t)0xc252cff5, (q31_t)0x7026180e, (q31_t)0xc24d4e95,
+ (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x702008e0, (q31_t)0xc2424c46, (q31_t)0x701d00e1, (q31_t)0xc23ccb57, (q31_t)0x7019f89d, (q31_t)0xc2374a8f,
+ (q31_t)0x7016f014, (q31_t)0xc231c9ec, (q31_t)0x7013e746, (q31_t)0xc22c4970, (q31_t)0x7010de32, (q31_t)0xc226c91a, (q31_t)0x700dd4da, (q31_t)0xc22148ea,
+ (q31_t)0x700acb3c, (q31_t)0xc21bc8e1, (q31_t)0x7007c159, (q31_t)0xc21648fd, (q31_t)0x7004b731, (q31_t)0xc210c940, (q31_t)0x7001acc4, (q31_t)0xc20b49a9,
+ (q31_t)0x6ffea212, (q31_t)0xc205ca38, (q31_t)0x6ffb971b, (q31_t)0xc2004aed, (q31_t)0x6ff88bde, (q31_t)0xc1facbc9, (q31_t)0x6ff5805d, (q31_t)0xc1f54cca,
+ (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fef688b, (q31_t)0xc1ea4f41, (q31_t)0x6fec5c3b, (q31_t)0xc1e4d0b6, (q31_t)0x6fe94fa5, (q31_t)0xc1df5251,
+ (q31_t)0x6fe642ca, (q31_t)0xc1d9d412, (q31_t)0x6fe335ab, (q31_t)0xc1d455f9, (q31_t)0x6fe02846, (q31_t)0xc1ced807, (q31_t)0x6fdd1a9c, (q31_t)0xc1c95a3c,
+ (q31_t)0x6fda0cae, (q31_t)0xc1c3dc97, (q31_t)0x6fd6fe7a, (q31_t)0xc1be5f18, (q31_t)0x6fd3f001, (q31_t)0xc1b8e1bf, (q31_t)0x6fd0e144, (q31_t)0xc1b3648d,
+ (q31_t)0x6fcdd241, (q31_t)0xc1ade781, (q31_t)0x6fcac2fa, (q31_t)0xc1a86a9c, (q31_t)0x6fc7b36d, (q31_t)0xc1a2edde, (q31_t)0x6fc4a39c, (q31_t)0xc19d7145,
+ (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6fbe832a, (q31_t)0xc1927888, (q31_t)0x6fbb728a, (q31_t)0xc18cfc63, (q31_t)0x6fb861a4, (q31_t)0xc1878065,
+ (q31_t)0x6fb5507a, (q31_t)0xc182048d, (q31_t)0x6fb23f0b, (q31_t)0xc17c88dc, (q31_t)0x6faf2d57, (q31_t)0xc1770d52, (q31_t)0x6fac1b5f, (q31_t)0xc17191ee,
+ (q31_t)0x6fa90921, (q31_t)0xc16c16b0, (q31_t)0x6fa5f69e, (q31_t)0xc1669b99, (q31_t)0x6fa2e3d7, (q31_t)0xc16120a9, (q31_t)0x6f9fd0cb, (q31_t)0xc15ba5df,
+ (q31_t)0x6f9cbd79, (q31_t)0xc1562b3d, (q31_t)0x6f99a9e3, (q31_t)0xc150b0c0, (q31_t)0x6f969608, (q31_t)0xc14b366b, (q31_t)0x6f9381e9, (q31_t)0xc145bc3c,
+ (q31_t)0x6f906d84, (q31_t)0xc1404233, (q31_t)0x6f8d58db, (q31_t)0xc13ac852, (q31_t)0x6f8a43ed, (q31_t)0xc1354e97, (q31_t)0x6f872eba, (q31_t)0xc12fd503,
+ (q31_t)0x6f841942, (q31_t)0xc12a5b95, (q31_t)0x6f810386, (q31_t)0xc124e24f, (q31_t)0x6f7ded84, (q31_t)0xc11f692f, (q31_t)0x6f7ad73e, (q31_t)0xc119f036,
+ (q31_t)0x6f77c0b3, (q31_t)0xc1147764, (q31_t)0x6f74a9e4, (q31_t)0xc10efeb8, (q31_t)0x6f7192cf, (q31_t)0xc1098634, (q31_t)0x6f6e7b76, (q31_t)0xc1040dd6,
+ (q31_t)0x6f6b63d8, (q31_t)0xc0fe959f, (q31_t)0x6f684bf6, (q31_t)0xc0f91d8f, (q31_t)0x6f6533ce, (q31_t)0xc0f3a5a6, (q31_t)0x6f621b62, (q31_t)0xc0ee2de3,
+ (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f5be9bc, (q31_t)0xc0e33ed4, (q31_t)0x6f58d082, (q31_t)0xc0ddc786, (q31_t)0x6f55b703, (q31_t)0xc0d8505f,
+ (q31_t)0x6f529d40, (q31_t)0xc0d2d960, (q31_t)0x6f4f8338, (q31_t)0xc0cd6287, (q31_t)0x6f4c68eb, (q31_t)0xc0c7ebd6, (q31_t)0x6f494e5a, (q31_t)0xc0c2754b,
+ (q31_t)0x6f463383, (q31_t)0xc0bcfee7, (q31_t)0x6f431869, (q31_t)0xc0b788ab, (q31_t)0x6f3ffd09, (q31_t)0xc0b21295, (q31_t)0x6f3ce165, (q31_t)0xc0ac9ca6,
+ (q31_t)0x6f39c57d, (q31_t)0xc0a726df, (q31_t)0x6f36a94f, (q31_t)0xc0a1b13e, (q31_t)0x6f338cde, (q31_t)0xc09c3bc5, (q31_t)0x6f307027, (q31_t)0xc096c673,
+ (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6f2a35ed, (q31_t)0xc08bdc44, (q31_t)0x6f271868, (q31_t)0xc0866767, (q31_t)0x6f23faa0, (q31_t)0xc080f2b1,
+ (q31_t)0x6f20dc92, (q31_t)0xc07b7e23, (q31_t)0x6f1dbe41, (q31_t)0xc07609bb, (q31_t)0x6f1a9faa, (q31_t)0xc070957b, (q31_t)0x6f1780cf, (q31_t)0xc06b2162,
+ (q31_t)0x6f1461b0, (q31_t)0xc065ad70, (q31_t)0x6f11424c, (q31_t)0xc06039a6, (q31_t)0x6f0e22a3, (q31_t)0xc05ac603, (q31_t)0x6f0b02b6, (q31_t)0xc0555287,
+ (q31_t)0x6f07e285, (q31_t)0xc04fdf32, (q31_t)0x6f04c20f, (q31_t)0xc04a6c05, (q31_t)0x6f01a155, (q31_t)0xc044f8fe, (q31_t)0x6efe8056, (q31_t)0xc03f8620,
+ (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6ef83d8a, (q31_t)0xc034a0d8, (q31_t)0x6ef51bbe, (q31_t)0xc02f2e6f, (q31_t)0x6ef1f9ad, (q31_t)0xc029bc2e,
+ (q31_t)0x6eeed758, (q31_t)0xc0244a14, (q31_t)0x6eebb4bf, (q31_t)0xc01ed821, (q31_t)0x6ee891e1, (q31_t)0xc0196656, (q31_t)0x6ee56ebe, (q31_t)0xc013f4b2,
+ (q31_t)0x6ee24b57, (q31_t)0xc00e8336, (q31_t)0x6edf27ac, (q31_t)0xc00911e1, (q31_t)0x6edc03bc, (q31_t)0xc003a0b3, (q31_t)0x6ed8df88, (q31_t)0xbffe2fad,
+ (q31_t)0x6ed5bb10, (q31_t)0xbff8bece, (q31_t)0x6ed29653, (q31_t)0xbff34e17, (q31_t)0x6ecf7152, (q31_t)0xbfeddd88, (q31_t)0x6ecc4c0d, (q31_t)0xbfe86d20,
+ (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf, (q31_t)0x6ec600b5, (q31_t)0xbfdd8cc6, (q31_t)0x6ec2daa2, (q31_t)0xbfd81cd5, (q31_t)0x6ebfb44b, (q31_t)0xbfd2ad0b,
+ (q31_t)0x6ebc8db0, (q31_t)0xbfcd3d69, (q31_t)0x6eb966d1, (q31_t)0xbfc7cdee, (q31_t)0x6eb63fad, (q31_t)0xbfc25e9b, (q31_t)0x6eb31845, (q31_t)0xbfbcef70,
+ (q31_t)0x6eaff099, (q31_t)0xbfb7806c, (q31_t)0x6eacc8a8, (q31_t)0xbfb21190, (q31_t)0x6ea9a073, (q31_t)0xbfaca2dc, (q31_t)0x6ea677fa, (q31_t)0xbfa7344f,
+ (q31_t)0x6ea34f3d, (q31_t)0xbfa1c5ea, (q31_t)0x6ea0263b, (q31_t)0xbf9c57ac, (q31_t)0x6e9cfcf5, (q31_t)0xbf96e997, (q31_t)0x6e99d36b, (q31_t)0xbf917ba9,
+ (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e937f8a, (q31_t)0xbf86a044, (q31_t)0x6e905534, (q31_t)0xbf8132ce, (q31_t)0x6e8d2a99, (q31_t)0xbf7bc57f,
+ (q31_t)0x6e89ffb9, (q31_t)0xbf765858, (q31_t)0x6e86d496, (q31_t)0xbf70eb59, (q31_t)0x6e83a92f, (q31_t)0xbf6b7e81, (q31_t)0x6e807d83, (q31_t)0xbf6611d2,
+ (q31_t)0x6e7d5193, (q31_t)0xbf60a54a, (q31_t)0x6e7a255f, (q31_t)0xbf5b38ea, (q31_t)0x6e76f8e7, (q31_t)0xbf55ccb2, (q31_t)0x6e73cc2b, (q31_t)0xbf5060a2,
+ (q31_t)0x6e709f2a, (q31_t)0xbf4af4ba, (q31_t)0x6e6d71e6, (q31_t)0xbf4588fa, (q31_t)0x6e6a445d, (q31_t)0xbf401d61, (q31_t)0x6e671690, (q31_t)0xbf3ab1f1,
+ (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e60ba2a, (q31_t)0xbf2fdb88, (q31_t)0x6e5d8b91, (q31_t)0xbf2a708f, (q31_t)0x6e5a5cb4, (q31_t)0xbf2505bf,
+ (q31_t)0x6e572d93, (q31_t)0xbf1f9b16, (q31_t)0x6e53fe2e, (q31_t)0xbf1a3096, (q31_t)0x6e50ce84, (q31_t)0xbf14c63d, (q31_t)0x6e4d9e97, (q31_t)0xbf0f5c0d,
+ (q31_t)0x6e4a6e66, (q31_t)0xbf09f205, (q31_t)0x6e473df0, (q31_t)0xbf048824, (q31_t)0x6e440d37, (q31_t)0xbeff1e6c, (q31_t)0x6e40dc39, (q31_t)0xbef9b4dc,
+ (q31_t)0x6e3daaf8, (q31_t)0xbef44b74, (q31_t)0x6e3a7972, (q31_t)0xbeeee234, (q31_t)0x6e3747a9, (q31_t)0xbee9791c, (q31_t)0x6e34159b, (q31_t)0xbee4102d,
+ (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6e2db0b4, (q31_t)0xbed93ec6, (q31_t)0x6e2a7ddb, (q31_t)0xbed3d64f, (q31_t)0x6e274abe, (q31_t)0xbece6e00,
+ (q31_t)0x6e24175c, (q31_t)0xbec905d9, (q31_t)0x6e20e3b7, (q31_t)0xbec39ddb, (q31_t)0x6e1dafce, (q31_t)0xbebe3605, (q31_t)0x6e1a7ba1, (q31_t)0xbeb8ce57,
+ (q31_t)0x6e174730, (q31_t)0xbeb366d1, (q31_t)0x6e14127b, (q31_t)0xbeadff74, (q31_t)0x6e10dd82, (q31_t)0xbea8983f, (q31_t)0x6e0da845, (q31_t)0xbea33132,
+ (q31_t)0x6e0a72c5, (q31_t)0xbe9dca4e, (q31_t)0x6e073d00, (q31_t)0xbe986391, (q31_t)0x6e0406f8, (q31_t)0xbe92fcfe, (q31_t)0x6e00d0ac, (q31_t)0xbe8d9692,
+ (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f, (q31_t)0x6dfa6348, (q31_t)0xbe82ca35, (q31_t)0x6df72c30, (q31_t)0xbe7d6442, (q31_t)0x6df3f4d4, (q31_t)0xbe77fe78,
+ (q31_t)0x6df0bd35, (q31_t)0xbe7298d7, (q31_t)0x6ded8552, (q31_t)0xbe6d335e, (q31_t)0x6dea4d2b, (q31_t)0xbe67ce0d, (q31_t)0x6de714c0, (q31_t)0xbe6268e5,
+ (q31_t)0x6de3dc11, (q31_t)0xbe5d03e6, (q31_t)0x6de0a31f, (q31_t)0xbe579f0f, (q31_t)0x6ddd69e9, (q31_t)0xbe523a60, (q31_t)0x6dda306f, (q31_t)0xbe4cd5da,
+ (q31_t)0x6dd6f6b1, (q31_t)0xbe47717c, (q31_t)0x6dd3bcaf, (q31_t)0xbe420d47, (q31_t)0x6dd0826a, (q31_t)0xbe3ca93b, (q31_t)0x6dcd47e1, (q31_t)0xbe374557,
+ (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6dc6d204, (q31_t)0xbe2c7e09, (q31_t)0x6dc396b0, (q31_t)0xbe271a9f, (q31_t)0x6dc05b18, (q31_t)0xbe21b75d,
+ (q31_t)0x6dbd1f3c, (q31_t)0xbe1c5444, (q31_t)0x6db9e31d, (q31_t)0xbe16f154, (q31_t)0x6db6a6ba, (q31_t)0xbe118e8c, (q31_t)0x6db36a14, (q31_t)0xbe0c2bed,
+ (q31_t)0x6db02d29, (q31_t)0xbe06c977, (q31_t)0x6daceffb, (q31_t)0xbe01672a, (q31_t)0x6da9b28a, (q31_t)0xbdfc0505, (q31_t)0x6da674d5, (q31_t)0xbdf6a309,
+ (q31_t)0x6da336dc, (q31_t)0xbdf14135, (q31_t)0x6d9ff89f, (q31_t)0xbdebdf8b, (q31_t)0x6d9cba1f, (q31_t)0xbde67e09, (q31_t)0x6d997b5b, (q31_t)0xbde11cb0,
+ (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d92fd09, (q31_t)0xbdd65a78, (q31_t)0x6d8fbd7a, (q31_t)0xbdd0f999, (q31_t)0x6d8c7da8, (q31_t)0xbdcb98e3,
+ (q31_t)0x6d893d93, (q31_t)0xbdc63856, (q31_t)0x6d85fd39, (q31_t)0xbdc0d7f2, (q31_t)0x6d82bc9d, (q31_t)0xbdbb77b7, (q31_t)0x6d7f7bbc, (q31_t)0xbdb617a4,
+ (q31_t)0x6d7c3a98, (q31_t)0xbdb0b7bb, (q31_t)0x6d78f931, (q31_t)0xbdab57fa, (q31_t)0x6d75b786, (q31_t)0xbda5f862, (q31_t)0x6d727597, (q31_t)0xbda098f3,
+ (q31_t)0x6d6f3365, (q31_t)0xbd9b39ad, (q31_t)0x6d6bf0f0, (q31_t)0xbd95da91, (q31_t)0x6d68ae37, (q31_t)0xbd907b9d, (q31_t)0x6d656b3a, (q31_t)0xbd8b1cd2,
+ (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d5ee477, (q31_t)0xbd805fb7, (q31_t)0x6d5ba0b0, (q31_t)0xbd7b0167, (q31_t)0x6d585ca6, (q31_t)0xbd75a340,
+ (q31_t)0x6d551858, (q31_t)0xbd704542, (q31_t)0x6d51d3c6, (q31_t)0xbd6ae76d, (q31_t)0x6d4e8ef2, (q31_t)0xbd6589c1, (q31_t)0x6d4b49da, (q31_t)0xbd602c3f,
+ (q31_t)0x6d48047e, (q31_t)0xbd5acee5, (q31_t)0x6d44bedf, (q31_t)0xbd5571b5, (q31_t)0x6d4178fd, (q31_t)0xbd5014ad, (q31_t)0x6d3e32d7, (q31_t)0xbd4ab7cf,
+ (q31_t)0x6d3aec6e, (q31_t)0xbd455b1a, (q31_t)0x6d37a5c1, (q31_t)0xbd3ffe8e, (q31_t)0x6d345ed1, (q31_t)0xbd3aa22c, (q31_t)0x6d31179e, (q31_t)0xbd3545f2,
+ (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2, (q31_t)0x6d2a886e, (q31_t)0xbd2a8dfb, (q31_t)0x6d274070, (q31_t)0xbd25323d, (q31_t)0x6d23f830, (q31_t)0xbd1fd6a8,
+ (q31_t)0x6d20afac, (q31_t)0xbd1a7b3d, (q31_t)0x6d1d66e4, (q31_t)0xbd151ffb, (q31_t)0x6d1a1dda, (q31_t)0xbd0fc4e2, (q31_t)0x6d16d48c, (q31_t)0xbd0a69f2,
+ (q31_t)0x6d138afb, (q31_t)0xbd050f2c, (q31_t)0x6d104126, (q31_t)0xbcffb48f, (q31_t)0x6d0cf70f, (q31_t)0xbcfa5a1b, (q31_t)0x6d09acb4, (q31_t)0xbcf4ffd1,
+ (q31_t)0x6d066215, (q31_t)0xbcefa5b0, (q31_t)0x6d031734, (q31_t)0xbcea4bb9, (q31_t)0x6cffcc0f, (q31_t)0xbce4f1eb, (q31_t)0x6cfc80a7, (q31_t)0xbcdf9846,
+ (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cf5e90d, (q31_t)0xbcd4e579, (q31_t)0x6cf29cdc, (q31_t)0xbccf8c50, (q31_t)0x6cef5067, (q31_t)0xbcca3351,
+ (q31_t)0x6cec03af, (q31_t)0xbcc4da7b, (q31_t)0x6ce8b6b4, (q31_t)0xbcbf81cf, (q31_t)0x6ce56975, (q31_t)0xbcba294d, (q31_t)0x6ce21bf4, (q31_t)0xbcb4d0f4,
+ (q31_t)0x6cdece2f, (q31_t)0xbcaf78c4, (q31_t)0x6cdb8027, (q31_t)0xbcaa20be, (q31_t)0x6cd831dc, (q31_t)0xbca4c8e1, (q31_t)0x6cd4e34e, (q31_t)0xbc9f712e,
+ (q31_t)0x6cd1947c, (q31_t)0xbc9a19a5, (q31_t)0x6cce4568, (q31_t)0xbc94c245, (q31_t)0x6ccaf610, (q31_t)0xbc8f6b0f, (q31_t)0x6cc7a676, (q31_t)0xbc8a1402,
+ (q31_t)0x6cc45698, (q31_t)0xbc84bd1f, (q31_t)0x6cc10677, (q31_t)0xbc7f6665, (q31_t)0x6cbdb613, (q31_t)0xbc7a0fd6, (q31_t)0x6cba656c, (q31_t)0xbc74b96f,
+ (q31_t)0x6cb71482, (q31_t)0xbc6f6333, (q31_t)0x6cb3c355, (q31_t)0xbc6a0d20, (q31_t)0x6cb071e4, (q31_t)0xbc64b737, (q31_t)0x6cad2031, (q31_t)0xbc5f6177,
+ (q31_t)0x6ca9ce3b, (q31_t)0xbc5a0be2, (q31_t)0x6ca67c01, (q31_t)0xbc54b676, (q31_t)0x6ca32985, (q31_t)0xbc4f6134, (q31_t)0x6c9fd6c6, (q31_t)0xbc4a0c1b,
+ (q31_t)0x6c9c83c3, (q31_t)0xbc44b72c, (q31_t)0x6c99307e, (q31_t)0xbc3f6267, (q31_t)0x6c95dcf6, (q31_t)0xbc3a0dcc, (q31_t)0x6c92892a, (q31_t)0xbc34b95b,
+ (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c8be0cb, (q31_t)0xbc2a10f6, (q31_t)0x6c888c36, (q31_t)0xbc24bd02, (q31_t)0x6c85375f, (q31_t)0xbc1f6938,
+ (q31_t)0x6c81e245, (q31_t)0xbc1a1598, (q31_t)0x6c7e8ce8, (q31_t)0xbc14c221, (q31_t)0x6c7b3748, (q31_t)0xbc0f6ed5, (q31_t)0x6c77e165, (q31_t)0xbc0a1bb3,
+ (q31_t)0x6c748b3f, (q31_t)0xbc04c8ba, (q31_t)0x6c7134d7, (q31_t)0xbbff75ec, (q31_t)0x6c6dde2b, (q31_t)0xbbfa2347, (q31_t)0x6c6a873d, (q31_t)0xbbf4d0cc,
+ (q31_t)0x6c67300b, (q31_t)0xbbef7e7c, (q31_t)0x6c63d897, (q31_t)0xbbea2c55, (q31_t)0x6c6080e0, (q31_t)0xbbe4da58, (q31_t)0x6c5d28e6, (q31_t)0xbbdf8885,
+ (q31_t)0x6c59d0a9, (q31_t)0xbbda36dd, (q31_t)0x6c56782a, (q31_t)0xbbd4e55e, (q31_t)0x6c531f67, (q31_t)0xbbcf940a, (q31_t)0x6c4fc662, (q31_t)0xbbca42df,
+ (q31_t)0x6c4c6d1a, (q31_t)0xbbc4f1df, (q31_t)0x6c49138f, (q31_t)0xbbbfa108, (q31_t)0x6c45b9c1, (q31_t)0xbbba505c, (q31_t)0x6c425fb1, (q31_t)0xbbb4ffda,
+ (q31_t)0x6c3f055d, (q31_t)0xbbafaf82, (q31_t)0x6c3baac7, (q31_t)0xbbaa5f54, (q31_t)0x6c384fef, (q31_t)0xbba50f50, (q31_t)0x6c34f4d3, (q31_t)0xbb9fbf77,
+ (q31_t)0x6c319975, (q31_t)0xbb9a6fc7, (q31_t)0x6c2e3dd4, (q31_t)0xbb952042, (q31_t)0x6c2ae1f0, (q31_t)0xbb8fd0e7, (q31_t)0x6c2785ca, (q31_t)0xbb8a81b6,
+ (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6c20ccb4, (q31_t)0xbb7fe3d3, (q31_t)0x6c1d6fc6, (q31_t)0xbb7a9521, (q31_t)0x6c1a1295, (q31_t)0xbb754699,
+ (q31_t)0x6c16b521, (q31_t)0xbb6ff83c, (q31_t)0x6c13576a, (q31_t)0xbb6aaa09, (q31_t)0x6c0ff971, (q31_t)0xbb655c00, (q31_t)0x6c0c9b35, (q31_t)0xbb600e21,
+ (q31_t)0x6c093cb6, (q31_t)0xbb5ac06d, (q31_t)0x6c05ddf5, (q31_t)0xbb5572e3, (q31_t)0x6c027ef1, (q31_t)0xbb502583, (q31_t)0x6bff1faa, (q31_t)0xbb4ad84e,
+ (q31_t)0x6bfbc021, (q31_t)0xbb458b43, (q31_t)0x6bf86055, (q31_t)0xbb403e63, (q31_t)0x6bf50047, (q31_t)0xbb3af1ad, (q31_t)0x6bf19ff6, (q31_t)0xbb35a521,
+ (q31_t)0x6bee3f62, (q31_t)0xbb3058c0, (q31_t)0x6beade8c, (q31_t)0xbb2b0c8a, (q31_t)0x6be77d74, (q31_t)0xbb25c07d, (q31_t)0x6be41c18, (q31_t)0xbb20749c,
+ (q31_t)0x6be0ba7b, (q31_t)0xbb1b28e4, (q31_t)0x6bdd589a, (q31_t)0xbb15dd57, (q31_t)0x6bd9f677, (q31_t)0xbb1091f5, (q31_t)0x6bd69412, (q31_t)0xbb0b46bd,
+ (q31_t)0x6bd3316a, (q31_t)0xbb05fbb0, (q31_t)0x6bcfce80, (q31_t)0xbb00b0ce, (q31_t)0x6bcc6b53, (q31_t)0xbafb6615, (q31_t)0x6bc907e3, (q31_t)0xbaf61b88,
+ (q31_t)0x6bc5a431, (q31_t)0xbaf0d125, (q31_t)0x6bc2403d, (q31_t)0xbaeb86ed, (q31_t)0x6bbedc06, (q31_t)0xbae63cdf, (q31_t)0x6bbb778d, (q31_t)0xbae0f2fc,
+ (q31_t)0x6bb812d1, (q31_t)0xbadba943, (q31_t)0x6bb4add3, (q31_t)0xbad65fb5, (q31_t)0x6bb14892, (q31_t)0xbad11652, (q31_t)0x6bade30f, (q31_t)0xbacbcd1a,
+ (q31_t)0x6baa7d49, (q31_t)0xbac6840c, (q31_t)0x6ba71741, (q31_t)0xbac13b29, (q31_t)0x6ba3b0f7, (q31_t)0xbabbf270, (q31_t)0x6ba04a6a, (q31_t)0xbab6a9e3,
+ (q31_t)0x6b9ce39b, (q31_t)0xbab16180, (q31_t)0x6b997c8a, (q31_t)0xbaac1948, (q31_t)0x6b961536, (q31_t)0xbaa6d13a, (q31_t)0x6b92ada0, (q31_t)0xbaa18958,
+ (q31_t)0x6b8f45c7, (q31_t)0xba9c41a0, (q31_t)0x6b8bddac, (q31_t)0xba96fa13, (q31_t)0x6b88754f, (q31_t)0xba91b2b1, (q31_t)0x6b850caf, (q31_t)0xba8c6b79,
+ (q31_t)0x6b81a3cd, (q31_t)0xba87246d, (q31_t)0x6b7e3aa9, (q31_t)0xba81dd8b, (q31_t)0x6b7ad142, (q31_t)0xba7c96d4, (q31_t)0x6b776799, (q31_t)0xba775048,
+ (q31_t)0x6b73fdae, (q31_t)0xba7209e7, (q31_t)0x6b709381, (q31_t)0xba6cc3b1, (q31_t)0x6b6d2911, (q31_t)0xba677da6, (q31_t)0x6b69be5f, (q31_t)0xba6237c5,
+ (q31_t)0x6b66536b, (q31_t)0xba5cf210, (q31_t)0x6b62e834, (q31_t)0xba57ac86, (q31_t)0x6b5f7cbc, (q31_t)0xba526726, (q31_t)0x6b5c1101, (q31_t)0xba4d21f2,
+ (q31_t)0x6b58a503, (q31_t)0xba47dce8, (q31_t)0x6b5538c4, (q31_t)0xba42980a, (q31_t)0x6b51cc42, (q31_t)0xba3d5356, (q31_t)0x6b4e5f7f, (q31_t)0xba380ece,
+ (q31_t)0x6b4af279, (q31_t)0xba32ca71, (q31_t)0x6b478530, (q31_t)0xba2d863e, (q31_t)0x6b4417a6, (q31_t)0xba284237, (q31_t)0x6b40a9d9, (q31_t)0xba22fe5b,
+ (q31_t)0x6b3d3bcb, (q31_t)0xba1dbaaa, (q31_t)0x6b39cd7a, (q31_t)0xba187724, (q31_t)0x6b365ee7, (q31_t)0xba1333c9, (q31_t)0x6b32f012, (q31_t)0xba0df099,
+ (q31_t)0x6b2f80fb, (q31_t)0xba08ad95, (q31_t)0x6b2c11a1, (q31_t)0xba036abb, (q31_t)0x6b28a206, (q31_t)0xb9fe280d, (q31_t)0x6b253228, (q31_t)0xb9f8e58a,
+ (q31_t)0x6b21c208, (q31_t)0xb9f3a332, (q31_t)0x6b1e51a7, (q31_t)0xb9ee6106, (q31_t)0x6b1ae103, (q31_t)0xb9e91f04, (q31_t)0x6b17701d, (q31_t)0xb9e3dd2e,
+ (q31_t)0x6b13fef5, (q31_t)0xb9de9b83, (q31_t)0x6b108d8b, (q31_t)0xb9d95a03, (q31_t)0x6b0d1bdf, (q31_t)0xb9d418af, (q31_t)0x6b09a9f1, (q31_t)0xb9ced786,
+ (q31_t)0x6b0637c1, (q31_t)0xb9c99688, (q31_t)0x6b02c54f, (q31_t)0xb9c455b6, (q31_t)0x6aff529a, (q31_t)0xb9bf150e, (q31_t)0x6afbdfa4, (q31_t)0xb9b9d493,
+ (q31_t)0x6af86c6c, (q31_t)0xb9b49442, (q31_t)0x6af4f8f2, (q31_t)0xb9af541d, (q31_t)0x6af18536, (q31_t)0xb9aa1423, (q31_t)0x6aee1138, (q31_t)0xb9a4d455,
+ (q31_t)0x6aea9cf8, (q31_t)0xb99f94b2, (q31_t)0x6ae72876, (q31_t)0xb99a553a, (q31_t)0x6ae3b3b2, (q31_t)0xb99515ee, (q31_t)0x6ae03eac, (q31_t)0xb98fd6cd,
+ (q31_t)0x6adcc964, (q31_t)0xb98a97d8, (q31_t)0x6ad953db, (q31_t)0xb985590e, (q31_t)0x6ad5de0f, (q31_t)0xb9801a70, (q31_t)0x6ad26802, (q31_t)0xb97adbfd,
+ (q31_t)0x6acef1b2, (q31_t)0xb9759db6, (q31_t)0x6acb7b21, (q31_t)0xb9705f9a, (q31_t)0x6ac8044e, (q31_t)0xb96b21aa, (q31_t)0x6ac48d39, (q31_t)0xb965e3e5,
+ (q31_t)0x6ac115e2, (q31_t)0xb960a64c, (q31_t)0x6abd9e49, (q31_t)0xb95b68de, (q31_t)0x6aba266e, (q31_t)0xb9562b9c, (q31_t)0x6ab6ae52, (q31_t)0xb950ee86,
+ (q31_t)0x6ab335f4, (q31_t)0xb94bb19b, (q31_t)0x6aafbd54, (q31_t)0xb94674dc, (q31_t)0x6aac4472, (q31_t)0xb9413848, (q31_t)0x6aa8cb4e, (q31_t)0xb93bfbe0,
+ (q31_t)0x6aa551e9, (q31_t)0xb936bfa4, (q31_t)0x6aa1d841, (q31_t)0xb9318393, (q31_t)0x6a9e5e58, (q31_t)0xb92c47ae, (q31_t)0x6a9ae42e, (q31_t)0xb9270bf5,
+ (q31_t)0x6a9769c1, (q31_t)0xb921d067, (q31_t)0x6a93ef13, (q31_t)0xb91c9505, (q31_t)0x6a907423, (q31_t)0xb91759cf, (q31_t)0x6a8cf8f1, (q31_t)0xb9121ec5,
+ (q31_t)0x6a897d7d, (q31_t)0xb90ce3e6, (q31_t)0x6a8601c8, (q31_t)0xb907a933, (q31_t)0x6a8285d1, (q31_t)0xb9026eac, (q31_t)0x6a7f0999, (q31_t)0xb8fd3451,
+ (q31_t)0x6a7b8d1e, (q31_t)0xb8f7fa21, (q31_t)0x6a781062, (q31_t)0xb8f2c01d, (q31_t)0x6a749365, (q31_t)0xb8ed8646, (q31_t)0x6a711625, (q31_t)0xb8e84c99,
+ (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x6a6a1ae2, (q31_t)0xb8ddd9c5, (q31_t)0x6a669cdd, (q31_t)0xb8d8a09d, (q31_t)0x6a631e97, (q31_t)0xb8d367a0,
+ (q31_t)0x6a5fa010, (q31_t)0xb8ce2ecf, (q31_t)0x6a5c2147, (q31_t)0xb8c8f62b, (q31_t)0x6a58a23c, (q31_t)0xb8c3bdb2, (q31_t)0x6a5522ef, (q31_t)0xb8be8565,
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+ (q31_t)0x6a43a29a, (q31_t)0xb8a46e78, (q31_t)0x6a4021c4, (q31_t)0xb89f3733, (q31_t)0x6a3ca0ad, (q31_t)0xb89a001a, (q31_t)0x6a391f54, (q31_t)0xb894c92d,
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+ (q31_t)0x4e34ecfc, (q31_t)0x9aab9993, (q31_t)0x4e2ff38b, (q31_t)0x9aa7c2ec, (q31_t)0x4e2af9ea, (q31_t)0x9aa3ec83, (q31_t)0x4e260019, (q31_t)0x9aa01659,
+ (q31_t)0x4e210617, (q31_t)0x9a9c406e, (q31_t)0x4e1c0be6, (q31_t)0x9a986ac1, (q31_t)0x4e171184, (q31_t)0x9a949552, (q31_t)0x4e1216f2, (q31_t)0x9a90c022,
+ (q31_t)0x4e0d1c30, (q31_t)0x9a8ceb31, (q31_t)0x4e08213e, (q31_t)0x9a89167e, (q31_t)0x4e03261b, (q31_t)0x9a85420a, (q31_t)0x4dfe2ac9, (q31_t)0x9a816dd5,
+ (q31_t)0x4df92f46, (q31_t)0x9a7d99de, (q31_t)0x4df43393, (q31_t)0x9a79c625, (q31_t)0x4def37b0, (q31_t)0x9a75f2ac, (q31_t)0x4dea3b9d, (q31_t)0x9a721f71,
+ (q31_t)0x4de53f5a, (q31_t)0x9a6e4c74, (q31_t)0x4de042e7, (q31_t)0x9a6a79b6, (q31_t)0x4ddb4644, (q31_t)0x9a66a737, (q31_t)0x4dd64971, (q31_t)0x9a62d4f7,
+ (q31_t)0x4dd14c6e, (q31_t)0x9a5f02f5, (q31_t)0x4dcc4f3b, (q31_t)0x9a5b3132, (q31_t)0x4dc751d8, (q31_t)0x9a575fae, (q31_t)0x4dc25445, (q31_t)0x9a538e68,
+ (q31_t)0x4dbd5682, (q31_t)0x9a4fbd61, (q31_t)0x4db8588f, (q31_t)0x9a4bec99, (q31_t)0x4db35a6c, (q31_t)0x9a481c0f, (q31_t)0x4dae5c19, (q31_t)0x9a444bc5,
+ (q31_t)0x4da95d96, (q31_t)0x9a407bb9, (q31_t)0x4da45ee3, (q31_t)0x9a3cabeb, (q31_t)0x4d9f6001, (q31_t)0x9a38dc5d, (q31_t)0x4d9a60ee, (q31_t)0x9a350d0d,
+ (q31_t)0x4d9561ac, (q31_t)0x9a313dfc, (q31_t)0x4d90623a, (q31_t)0x9a2d6f2a, (q31_t)0x4d8b6298, (q31_t)0x9a29a097, (q31_t)0x4d8662c6, (q31_t)0x9a25d243,
+ (q31_t)0x4d8162c4, (q31_t)0x9a22042d, (q31_t)0x4d7c6293, (q31_t)0x9a1e3656, (q31_t)0x4d776231, (q31_t)0x9a1a68be, (q31_t)0x4d7261a0, (q31_t)0x9a169b65,
+ (q31_t)0x4d6d60df, (q31_t)0x9a12ce4b, (q31_t)0x4d685fef, (q31_t)0x9a0f016f, (q31_t)0x4d635ece, (q31_t)0x9a0b34d3, (q31_t)0x4d5e5d7e, (q31_t)0x9a076875,
+ (q31_t)0x4d595bfe, (q31_t)0x9a039c57, (q31_t)0x4d545a4f, (q31_t)0x99ffd077, (q31_t)0x4d4f5870, (q31_t)0x99fc04d6, (q31_t)0x4d4a5661, (q31_t)0x99f83974,
+ (q31_t)0x4d455422, (q31_t)0x99f46e51, (q31_t)0x4d4051b4, (q31_t)0x99f0a36d, (q31_t)0x4d3b4f16, (q31_t)0x99ecd8c8, (q31_t)0x4d364c48, (q31_t)0x99e90e62,
+ (q31_t)0x4d31494b, (q31_t)0x99e5443b, (q31_t)0x4d2c461e, (q31_t)0x99e17a53, (q31_t)0x4d2742c2, (q31_t)0x99ddb0aa, (q31_t)0x4d223f36, (q31_t)0x99d9e73f,
+ (q31_t)0x4d1d3b7a, (q31_t)0x99d61e14, (q31_t)0x4d18378f, (q31_t)0x99d25528, (q31_t)0x4d133374, (q31_t)0x99ce8c7b, (q31_t)0x4d0e2f2a, (q31_t)0x99cac40d,
+ (q31_t)0x4d092ab0, (q31_t)0x99c6fbde, (q31_t)0x4d042607, (q31_t)0x99c333ee, (q31_t)0x4cff212e, (q31_t)0x99bf6c3d, (q31_t)0x4cfa1c26, (q31_t)0x99bba4cb,
+ (q31_t)0x4cf516ee, (q31_t)0x99b7dd99, (q31_t)0x4cf01187, (q31_t)0x99b416a5, (q31_t)0x4ceb0bf0, (q31_t)0x99b04ff0, (q31_t)0x4ce6062a, (q31_t)0x99ac897b,
+ (q31_t)0x4ce10034, (q31_t)0x99a8c345, (q31_t)0x4cdbfa0f, (q31_t)0x99a4fd4d, (q31_t)0x4cd6f3bb, (q31_t)0x99a13795, (q31_t)0x4cd1ed37, (q31_t)0x999d721c,
+ (q31_t)0x4ccce684, (q31_t)0x9999ace3, (q31_t)0x4cc7dfa1, (q31_t)0x9995e7e8, (q31_t)0x4cc2d88f, (q31_t)0x9992232d, (q31_t)0x4cbdd14e, (q31_t)0x998e5eb1,
+ (q31_t)0x4cb8c9dd, (q31_t)0x998a9a74, (q31_t)0x4cb3c23d, (q31_t)0x9986d676, (q31_t)0x4caeba6e, (q31_t)0x998312b7, (q31_t)0x4ca9b26f, (q31_t)0x997f4f38,
+ (q31_t)0x4ca4aa41, (q31_t)0x997b8bf8, (q31_t)0x4c9fa1e4, (q31_t)0x9977c8f7, (q31_t)0x4c9a9958, (q31_t)0x99740635, (q31_t)0x4c95909c, (q31_t)0x997043b2,
+ (q31_t)0x4c9087b1, (q31_t)0x996c816f, (q31_t)0x4c8b7e97, (q31_t)0x9968bf6b, (q31_t)0x4c86754e, (q31_t)0x9964fda7, (q31_t)0x4c816bd5, (q31_t)0x99613c22,
+ (q31_t)0x4c7c622d, (q31_t)0x995d7adc, (q31_t)0x4c775856, (q31_t)0x9959b9d5, (q31_t)0x4c724e50, (q31_t)0x9955f90d, (q31_t)0x4c6d441b, (q31_t)0x99523885,
+ (q31_t)0x4c6839b7, (q31_t)0x994e783d, (q31_t)0x4c632f23, (q31_t)0x994ab833, (q31_t)0x4c5e2460, (q31_t)0x9946f869, (q31_t)0x4c59196f, (q31_t)0x994338df,
+ (q31_t)0x4c540e4e, (q31_t)0x993f7993, (q31_t)0x4c4f02fe, (q31_t)0x993bba87, (q31_t)0x4c49f77f, (q31_t)0x9937fbbb, (q31_t)0x4c44ebd1, (q31_t)0x99343d2e,
+ (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4c3ad3e7, (q31_t)0x992cc0d2, (q31_t)0x4c35c7ac, (q31_t)0x99290303, (q31_t)0x4c30bb42, (q31_t)0x99254574,
+ (q31_t)0x4c2baea9, (q31_t)0x99218824, (q31_t)0x4c26a1e1, (q31_t)0x991dcb13, (q31_t)0x4c2194e9, (q31_t)0x991a0e42, (q31_t)0x4c1c87c3, (q31_t)0x991651b1,
+ (q31_t)0x4c177a6e, (q31_t)0x9912955f, (q31_t)0x4c126cea, (q31_t)0x990ed94c, (q31_t)0x4c0d5f37, (q31_t)0x990b1d79, (q31_t)0x4c085156, (q31_t)0x990761e5,
+ (q31_t)0x4c034345, (q31_t)0x9903a691, (q31_t)0x4bfe3505, (q31_t)0x98ffeb7d, (q31_t)0x4bf92697, (q31_t)0x98fc30a8, (q31_t)0x4bf417f9, (q31_t)0x98f87612,
+ (q31_t)0x4bef092d, (q31_t)0x98f4bbbc, (q31_t)0x4be9fa32, (q31_t)0x98f101a6, (q31_t)0x4be4eb08, (q31_t)0x98ed47cf, (q31_t)0x4bdfdbaf, (q31_t)0x98e98e38,
+ (q31_t)0x4bdacc28, (q31_t)0x98e5d4e0, (q31_t)0x4bd5bc72, (q31_t)0x98e21bc8, (q31_t)0x4bd0ac8d, (q31_t)0x98de62f0, (q31_t)0x4bcb9c79, (q31_t)0x98daaa57,
+ (q31_t)0x4bc68c36, (q31_t)0x98d6f1fe, (q31_t)0x4bc17bc5, (q31_t)0x98d339e4, (q31_t)0x4bbc6b25, (q31_t)0x98cf820b, (q31_t)0x4bb75a56, (q31_t)0x98cbca70,
+ (q31_t)0x4bb24958, (q31_t)0x98c81316, (q31_t)0x4bad382c, (q31_t)0x98c45bfb, (q31_t)0x4ba826d1, (q31_t)0x98c0a520, (q31_t)0x4ba31548, (q31_t)0x98bcee84,
+ (q31_t)0x4b9e0390, (q31_t)0x98b93828, (q31_t)0x4b98f1a9, (q31_t)0x98b5820c, (q31_t)0x4b93df93, (q31_t)0x98b1cc30, (q31_t)0x4b8ecd4f, (q31_t)0x98ae1693,
+ (q31_t)0x4b89badd, (q31_t)0x98aa6136, (q31_t)0x4b84a83b, (q31_t)0x98a6ac19, (q31_t)0x4b7f956b, (q31_t)0x98a2f73c, (q31_t)0x4b7a826d, (q31_t)0x989f429e,
+ (q31_t)0x4b756f40, (q31_t)0x989b8e40, (q31_t)0x4b705be4, (q31_t)0x9897da22, (q31_t)0x4b6b485a, (q31_t)0x98942643, (q31_t)0x4b6634a2, (q31_t)0x989072a5,
+ (q31_t)0x4b6120bb, (q31_t)0x988cbf46, (q31_t)0x4b5c0ca5, (q31_t)0x98890c27, (q31_t)0x4b56f861, (q31_t)0x98855948, (q31_t)0x4b51e3ee, (q31_t)0x9881a6a9,
+ (q31_t)0x4b4ccf4d, (q31_t)0x987df449, (q31_t)0x4b47ba7e, (q31_t)0x987a422a, (q31_t)0x4b42a580, (q31_t)0x9876904a, (q31_t)0x4b3d9053, (q31_t)0x9872deaa,
+ (q31_t)0x4b387af9, (q31_t)0x986f2d4a, (q31_t)0x4b336570, (q31_t)0x986b7c2a, (q31_t)0x4b2e4fb8, (q31_t)0x9867cb4a, (q31_t)0x4b2939d2, (q31_t)0x98641aa9,
+ (q31_t)0x4b2423be, (q31_t)0x98606a49, (q31_t)0x4b1f0d7b, (q31_t)0x985cba28, (q31_t)0x4b19f70a, (q31_t)0x98590a48, (q31_t)0x4b14e06b, (q31_t)0x98555aa7,
+ (q31_t)0x4b0fc99d, (q31_t)0x9851ab46, (q31_t)0x4b0ab2a1, (q31_t)0x984dfc26, (q31_t)0x4b059b77, (q31_t)0x984a4d45, (q31_t)0x4b00841f, (q31_t)0x98469ea4,
+ (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x4af654e3, (q31_t)0x983f4223, (q31_t)0x4af13d00, (q31_t)0x983b9442, (q31_t)0x4aec24ee, (q31_t)0x9837e6a1,
+ (q31_t)0x4ae70caf, (q31_t)0x98343940, (q31_t)0x4ae1f441, (q31_t)0x98308c1f, (q31_t)0x4adcdba5, (q31_t)0x982cdf3f, (q31_t)0x4ad7c2da, (q31_t)0x9829329e,
+ (q31_t)0x4ad2a9e2, (q31_t)0x9825863d, (q31_t)0x4acd90bb, (q31_t)0x9821da1d, (q31_t)0x4ac87767, (q31_t)0x981e2e3c, (q31_t)0x4ac35de4, (q31_t)0x981a829c,
+ (q31_t)0x4abe4433, (q31_t)0x9816d73b, (q31_t)0x4ab92a54, (q31_t)0x98132c1b, (q31_t)0x4ab41046, (q31_t)0x980f813b, (q31_t)0x4aaef60b, (q31_t)0x980bd69b,
+ (q31_t)0x4aa9dba2, (q31_t)0x98082c3b, (q31_t)0x4aa4c10b, (q31_t)0x9804821b, (q31_t)0x4a9fa645, (q31_t)0x9800d83c, (q31_t)0x4a9a8b52, (q31_t)0x97fd2e9c,
+ (q31_t)0x4a957030, (q31_t)0x97f9853d, (q31_t)0x4a9054e1, (q31_t)0x97f5dc1e, (q31_t)0x4a8b3963, (q31_t)0x97f2333f, (q31_t)0x4a861db8, (q31_t)0x97ee8aa0,
+ (q31_t)0x4a8101de, (q31_t)0x97eae242, (q31_t)0x4a7be5d7, (q31_t)0x97e73a23, (q31_t)0x4a76c9a2, (q31_t)0x97e39245, (q31_t)0x4a71ad3e, (q31_t)0x97dfeaa7,
+ (q31_t)0x4a6c90ad, (q31_t)0x97dc4349, (q31_t)0x4a6773ee, (q31_t)0x97d89c2c, (q31_t)0x4a625701, (q31_t)0x97d4f54f, (q31_t)0x4a5d39e6, (q31_t)0x97d14eb2,
+ (q31_t)0x4a581c9e, (q31_t)0x97cda855, (q31_t)0x4a52ff27, (q31_t)0x97ca0239, (q31_t)0x4a4de182, (q31_t)0x97c65c5c, (q31_t)0x4a48c3b0, (q31_t)0x97c2b6c1,
+ (q31_t)0x4a43a5b0, (q31_t)0x97bf1165, (q31_t)0x4a3e8782, (q31_t)0x97bb6c4a, (q31_t)0x4a396926, (q31_t)0x97b7c76f, (q31_t)0x4a344a9d, (q31_t)0x97b422d4,
+ (q31_t)0x4a2f2be6, (q31_t)0x97b07e7a, (q31_t)0x4a2a0d01, (q31_t)0x97acda60, (q31_t)0x4a24edee, (q31_t)0x97a93687, (q31_t)0x4a1fcead, (q31_t)0x97a592ed,
+ (q31_t)0x4a1aaf3f, (q31_t)0x97a1ef94, (q31_t)0x4a158fa3, (q31_t)0x979e4c7c, (q31_t)0x4a106fda, (q31_t)0x979aa9a4, (q31_t)0x4a0b4fe2, (q31_t)0x9797070c,
+ (q31_t)0x4a062fbd, (q31_t)0x979364b5, (q31_t)0x4a010f6b, (q31_t)0x978fc29e, (q31_t)0x49fbeeea, (q31_t)0x978c20c8, (q31_t)0x49f6ce3c, (q31_t)0x97887f32,
+ (q31_t)0x49f1ad61, (q31_t)0x9784dddc, (q31_t)0x49ec8c57, (q31_t)0x97813cc7, (q31_t)0x49e76b21, (q31_t)0x977d9bf2, (q31_t)0x49e249bc, (q31_t)0x9779fb5e,
+ (q31_t)0x49dd282a, (q31_t)0x97765b0a, (q31_t)0x49d8066b, (q31_t)0x9772baf7, (q31_t)0x49d2e47e, (q31_t)0x976f1b24, (q31_t)0x49cdc263, (q31_t)0x976b7b92,
+ (q31_t)0x49c8a01b, (q31_t)0x9767dc41, (q31_t)0x49c37da5, (q31_t)0x97643d2f, (q31_t)0x49be5b02, (q31_t)0x97609e5f, (q31_t)0x49b93832, (q31_t)0x975cffcf,
+ (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x49aef208, (q31_t)0x9755c370, (q31_t)0x49a9ceaf, (q31_t)0x975225a1, (q31_t)0x49a4ab28, (q31_t)0x974e8813,
+ (q31_t)0x499f8774, (q31_t)0x974aeac6, (q31_t)0x499a6393, (q31_t)0x97474db9, (q31_t)0x49953f84, (q31_t)0x9743b0ed, (q31_t)0x49901b48, (q31_t)0x97401462,
+ (q31_t)0x498af6df, (q31_t)0x973c7817, (q31_t)0x4985d248, (q31_t)0x9738dc0d, (q31_t)0x4980ad84, (q31_t)0x97354043, (q31_t)0x497b8892, (q31_t)0x9731a4ba,
+ (q31_t)0x49766373, (q31_t)0x972e0971, (q31_t)0x49713e27, (q31_t)0x972a6e6a, (q31_t)0x496c18ae, (q31_t)0x9726d3a3, (q31_t)0x4966f307, (q31_t)0x9723391c,
+ (q31_t)0x4961cd33, (q31_t)0x971f9ed7, (q31_t)0x495ca732, (q31_t)0x971c04d2, (q31_t)0x49578103, (q31_t)0x97186b0d, (q31_t)0x49525aa7, (q31_t)0x9714d18a,
+ (q31_t)0x494d341e, (q31_t)0x97113847, (q31_t)0x49480d68, (q31_t)0x970d9f45, (q31_t)0x4942e684, (q31_t)0x970a0683, (q31_t)0x493dbf74, (q31_t)0x97066e03,
+ (q31_t)0x49389836, (q31_t)0x9702d5c3, (q31_t)0x493370cb, (q31_t)0x96ff3dc4, (q31_t)0x492e4933, (q31_t)0x96fba605, (q31_t)0x4929216e, (q31_t)0x96f80e88,
+ (q31_t)0x4923f97b, (q31_t)0x96f4774b, (q31_t)0x491ed15c, (q31_t)0x96f0e04f, (q31_t)0x4919a90f, (q31_t)0x96ed4994, (q31_t)0x49148095, (q31_t)0x96e9b319,
+ (q31_t)0x490f57ee, (q31_t)0x96e61ce0, (q31_t)0x490a2f1b, (q31_t)0x96e286e7, (q31_t)0x4905061a, (q31_t)0x96def12f, (q31_t)0x48ffdcec, (q31_t)0x96db5bb8,
+ (q31_t)0x48fab391, (q31_t)0x96d7c682, (q31_t)0x48f58a09, (q31_t)0x96d4318d, (q31_t)0x48f06054, (q31_t)0x96d09cd8, (q31_t)0x48eb3672, (q31_t)0x96cd0865,
+ (q31_t)0x48e60c62, (q31_t)0x96c97432, (q31_t)0x48e0e227, (q31_t)0x96c5e040, (q31_t)0x48dbb7be, (q31_t)0x96c24c8f, (q31_t)0x48d68d28, (q31_t)0x96beb91f,
+ (q31_t)0x48d16265, (q31_t)0x96bb25f0, (q31_t)0x48cc3775, (q31_t)0x96b79302, (q31_t)0x48c70c59, (q31_t)0x96b40055, (q31_t)0x48c1e10f, (q31_t)0x96b06de9,
+ (q31_t)0x48bcb599, (q31_t)0x96acdbbe, (q31_t)0x48b789f5, (q31_t)0x96a949d3, (q31_t)0x48b25e25, (q31_t)0x96a5b82a, (q31_t)0x48ad3228, (q31_t)0x96a226c2,
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+ (q31_t)0x43909ccd, (q31_t)0x9348eb7e, (q31_t)0x438b4691, (q31_t)0x93459a94, (q31_t)0x4385f02a, (q31_t)0x934249ed, (q31_t)0x4380999b, (q31_t)0x933ef989,
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+ (q31_t)0x433b2585, (q31_t)0x9313fc51, (q31_t)0x4335ccaf, (q31_t)0x9310af99, (q31_t)0x433073b0, (q31_t)0x930d6324, (q31_t)0x432b1a87, (q31_t)0x930a16f3,
+ (q31_t)0x4325c135, (q31_t)0x9306cb04, (q31_t)0x432067ba, (q31_t)0x93037f59, (q31_t)0x431b0e15, (q31_t)0x930033f1, (q31_t)0x4315b447, (q31_t)0x92fce8cc,
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+ (q31_t)0x3fdbb5ec, (q31_t)0x911128a8, (q31_t)0x3fd643d2, (q31_t)0x910e0653, (q31_t)0x3fd0d191, (q31_t)0x910ae442, (q31_t)0x3fcb5f28, (q31_t)0x9107c276,
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+ (q31_t)0x3f58d921, (q31_t)0x90c63a83, (q31_t)0x3f53635a, (q31_t)0x90c31e9b, (q31_t)0x3f4ded6b, (q31_t)0x90c002f7, (q31_t)0x3f487755, (q31_t)0x90bce797,
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+ (q31_t)0x3f016a61, (q31_t)0x90949c28, (q31_t)0x3efbf22a, (q31_t)0x9091848a, (q31_t)0x3ef679cc, (q31_t)0x908e6d31, (q31_t)0x3ef10148, (q31_t)0x908b561c,
+ (q31_t)0x3eeb889c, (q31_t)0x90883f4d, (q31_t)0x3ee60fca, (q31_t)0x908528c2, (q31_t)0x3ee096d1, (q31_t)0x9082127c, (q31_t)0x3edb1db1, (q31_t)0x907efc7a,
+ (q31_t)0x3ed5a46b, (q31_t)0x907be6be, (q31_t)0x3ed02afd, (q31_t)0x9078d146, (q31_t)0x3ecab169, (q31_t)0x9075bc13, (q31_t)0x3ec537ae, (q31_t)0x9072a725,
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+ (q31_t)0x3ea9d4c3, (q31_t)0x90634287, (q31_t)0x3ea45a21, (q31_t)0x90602f35, (q31_t)0x3e9edf57, (q31_t)0x905d1c29, (q31_t)0x3e996467, (q31_t)0x905a0962,
+ (q31_t)0x3e93e950, (q31_t)0x9056f6df, (q31_t)0x3e8e6e12, (q31_t)0x9053e4a1, (q31_t)0x3e88f2ae, (q31_t)0x9050d2a9, (q31_t)0x3e837724, (q31_t)0x904dc0f5,
+ (q31_t)0x3e7dfb73, (q31_t)0x904aaf86, (q31_t)0x3e787f9b, (q31_t)0x90479e5c, (q31_t)0x3e73039d, (q31_t)0x90448d76, (q31_t)0x3e6d8778, (q31_t)0x90417cd6,
+ (q31_t)0x3e680b2c, (q31_t)0x903e6c7b, (q31_t)0x3e628ebb, (q31_t)0x903b5c64, (q31_t)0x3e5d1222, (q31_t)0x90384c93, (q31_t)0x3e579564, (q31_t)0x90353d06,
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+ (q31_t)0x3e3c2369, (q31_t)0x9025f352, (q31_t)0x3e36a5c4, (q31_t)0x9022e564, (q31_t)0x3e3127f9, (q31_t)0x901fd7ba, (q31_t)0x3e2baa07, (q31_t)0x901cca55,
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+ (q31_t)0x3e10320d, (q31_t)0x900d8b69, (q31_t)0x3e0ab336, (q31_t)0x900a7fa3, (q31_t)0x3e053437, (q31_t)0x90077422, (q31_t)0x3dffb513, (q31_t)0x900468e5,
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+ (q31_t)0x3dce3614, (q31_t)0x8fe90fec, (q31_t)0x3dc8b571, (q31_t)0x8fe60763, (q31_t)0x3dc334a9, (q31_t)0x8fe2ff1f, (q31_t)0x3dbdb3ba, (q31_t)0x8fdff720,
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+ (q31_t)0x3da22cd7, (q31_t)0x8fd0d333, (q31_t)0x3d9cab04, (q31_t)0x8fcdccd3, (q31_t)0x3d97290b, (q31_t)0x8fcac6b9, (q31_t)0x3d91a6ed, (q31_t)0x8fc7c0e3,
+ (q31_t)0x3d8c24a8, (q31_t)0x8fc4bb53, (q31_t)0x3d86a23d, (q31_t)0x8fc1b608, (q31_t)0x3d811fac, (q31_t)0x8fbeb103, (q31_t)0x3d7b9cf6, (q31_t)0x8fbbac42,
+ (q31_t)0x3d761a19, (q31_t)0x8fb8a7c7, (q31_t)0x3d709717, (q31_t)0x8fb5a391, (q31_t)0x3d6b13ee, (q31_t)0x8fb29fa0, (q31_t)0x3d6590a0, (q31_t)0x8faf9bf5,
+ (q31_t)0x3d600d2c, (q31_t)0x8fac988f, (q31_t)0x3d5a8992, (q31_t)0x8fa9956e, (q31_t)0x3d5505d2, (q31_t)0x8fa69293, (q31_t)0x3d4f81ec, (q31_t)0x8fa38ffc,
+ (q31_t)0x3d49fde1, (q31_t)0x8fa08dab, (q31_t)0x3d4479b0, (q31_t)0x8f9d8ba0, (q31_t)0x3d3ef559, (q31_t)0x8f9a89da, (q31_t)0x3d3970dc, (q31_t)0x8f978859,
+ (q31_t)0x3d33ec39, (q31_t)0x8f94871d, (q31_t)0x3d2e6771, (q31_t)0x8f918627, (q31_t)0x3d28e282, (q31_t)0x8f8e8576, (q31_t)0x3d235d6f, (q31_t)0x8f8b850a,
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+ (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3d023be0, (q31_t)0x8f798836, (q31_t)0x3cfcb5c4, (q31_t)0x8f7689b0, (q31_t)0x3cf72f83, (q31_t)0x8f738b70,
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+ (q31_t)0x3cc5709e, (q31_t)0x8f58a761, (q31_t)0x3cbfe8e5, (q31_t)0x8f55abd8, (q31_t)0x3cba6107, (q31_t)0x8f52b093, (q31_t)0x3cb4d904, (q31_t)0x8f4fb595,
+ (q31_t)0x3caf50da, (q31_t)0x8f4cbadb, (q31_t)0x3ca9c88c, (q31_t)0x8f49c067, (q31_t)0x3ca44018, (q31_t)0x8f46c639, (q31_t)0x3c9eb77f, (q31_t)0x8f43cc50,
+ (q31_t)0x3c992ec0, (q31_t)0x8f40d2ad, (q31_t)0x3c93a5dc, (q31_t)0x8f3dd950, (q31_t)0x3c8e1cd3, (q31_t)0x8f3ae038, (q31_t)0x3c8893a4, (q31_t)0x8f37e765,
+ (q31_t)0x3c830a50, (q31_t)0x8f34eed8, (q31_t)0x3c7d80d6, (q31_t)0x8f31f691, (q31_t)0x3c77f737, (q31_t)0x8f2efe8f, (q31_t)0x3c726d73, (q31_t)0x8f2c06d3,
+ (q31_t)0x3c6ce38a, (q31_t)0x8f290f5c, (q31_t)0x3c67597b, (q31_t)0x8f26182b, (q31_t)0x3c61cf48, (q31_t)0x8f232140, (q31_t)0x3c5c44ee, (q31_t)0x8f202a9a,
+ (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3c512fcc, (q31_t)0x8f1a3e1f, (q31_t)0x3c4ba504, (q31_t)0x8f17484b, (q31_t)0x3c461a16, (q31_t)0x8f1452bb,
+ (q31_t)0x3c408f03, (q31_t)0x8f115d72, (q31_t)0x3c3b03ca, (q31_t)0x8f0e686e, (q31_t)0x3c35786d, (q31_t)0x8f0b73b0, (q31_t)0x3c2fecea, (q31_t)0x8f087f37,
+ (q31_t)0x3c2a6142, (q31_t)0x8f058b04, (q31_t)0x3c24d575, (q31_t)0x8f029717, (q31_t)0x3c1f4983, (q31_t)0x8effa370, (q31_t)0x3c19bd6c, (q31_t)0x8efcb00e,
+ (q31_t)0x3c143130, (q31_t)0x8ef9bcf2, (q31_t)0x3c0ea4cf, (q31_t)0x8ef6ca1c, (q31_t)0x3c091849, (q31_t)0x8ef3d78b, (q31_t)0x3c038b9e, (q31_t)0x8ef0e540,
+ (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b, (q31_t)0x3bf871d8, (q31_t)0x8eeb017c, (q31_t)0x3bf2e4be, (q31_t)0x8ee81002, (q31_t)0x3bed577e, (q31_t)0x8ee51ece,
+ (q31_t)0x3be7ca1a, (q31_t)0x8ee22de0, (q31_t)0x3be23c91, (q31_t)0x8edf3d38, (q31_t)0x3bdcaee3, (q31_t)0x8edc4cd5, (q31_t)0x3bd72110, (q31_t)0x8ed95cb8,
+ (q31_t)0x3bd19318, (q31_t)0x8ed66ce1, (q31_t)0x3bcc04fb, (q31_t)0x8ed37d50, (q31_t)0x3bc676b9, (q31_t)0x8ed08e05, (q31_t)0x3bc0e853, (q31_t)0x8ecd9eff,
+ (q31_t)0x3bbb59c7, (q31_t)0x8ecab040, (q31_t)0x3bb5cb17, (q31_t)0x8ec7c1c6, (q31_t)0x3bb03c42, (q31_t)0x8ec4d392, (q31_t)0x3baaad48, (q31_t)0x8ec1e5a4,
+ (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b9f8ee5, (q31_t)0x8ebc0a99, (q31_t)0x3b99ff7d, (q31_t)0x8eb91d7c, (q31_t)0x3b946ff0, (q31_t)0x8eb630a6,
+ (q31_t)0x3b8ee03e, (q31_t)0x8eb34415, (q31_t)0x3b895068, (q31_t)0x8eb057ca, (q31_t)0x3b83c06c, (q31_t)0x8ead6bc5, (q31_t)0x3b7e304c, (q31_t)0x8eaa8006,
+ (q31_t)0x3b78a007, (q31_t)0x8ea7948c, (q31_t)0x3b730f9e, (q31_t)0x8ea4a959, (q31_t)0x3b6d7f10, (q31_t)0x8ea1be6c, (q31_t)0x3b67ee5d, (q31_t)0x8e9ed3c4,
+ (q31_t)0x3b625d86, (q31_t)0x8e9be963, (q31_t)0x3b5ccc8a, (q31_t)0x8e98ff47, (q31_t)0x3b573b69, (q31_t)0x8e961571, (q31_t)0x3b51aa24, (q31_t)0x8e932be2,
+ (q31_t)0x3b4c18ba, (q31_t)0x8e904298, (q31_t)0x3b46872c, (q31_t)0x8e8d5994, (q31_t)0x3b40f579, (q31_t)0x8e8a70d7, (q31_t)0x3b3b63a1, (q31_t)0x8e87885f,
+ (q31_t)0x3b35d1a5, (q31_t)0x8e84a02d, (q31_t)0x3b303f84, (q31_t)0x8e81b841, (q31_t)0x3b2aad3f, (q31_t)0x8e7ed09b, (q31_t)0x3b251ad6, (q31_t)0x8e7be93c,
+ (q31_t)0x3b1f8848, (q31_t)0x8e790222, (q31_t)0x3b19f595, (q31_t)0x8e761b4e, (q31_t)0x3b1462be, (q31_t)0x8e7334c1, (q31_t)0x3b0ecfc3, (q31_t)0x8e704e79,
+ (q31_t)0x3b093ca3, (q31_t)0x8e6d6877, (q31_t)0x3b03a95e, (q31_t)0x8e6a82bc, (q31_t)0x3afe15f6, (q31_t)0x8e679d47, (q31_t)0x3af88269, (q31_t)0x8e64b817,
+ (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x3aed5ae1, (q31_t)0x8e5eee8b, (q31_t)0x3ae7c6e7, (q31_t)0x8e5c0a2e, (q31_t)0x3ae232c9, (q31_t)0x8e592617,
+ (q31_t)0x3adc9e86, (q31_t)0x8e564246, (q31_t)0x3ad70a1f, (q31_t)0x8e535ebb, (q31_t)0x3ad17593, (q31_t)0x8e507b76, (q31_t)0x3acbe0e3, (q31_t)0x8e4d9878,
+ (q31_t)0x3ac64c0f, (q31_t)0x8e4ab5bf, (q31_t)0x3ac0b717, (q31_t)0x8e47d34d, (q31_t)0x3abb21fb, (q31_t)0x8e44f121, (q31_t)0x3ab58cba, (q31_t)0x8e420f3b,
+ (q31_t)0x3aaff755, (q31_t)0x8e3f2d9b, (q31_t)0x3aaa61cc, (q31_t)0x8e3c4c41, (q31_t)0x3aa4cc1e, (q31_t)0x8e396b2e, (q31_t)0x3a9f364d, (q31_t)0x8e368a61,
+ (q31_t)0x3a99a057, (q31_t)0x8e33a9da, (q31_t)0x3a940a3e, (q31_t)0x8e30c999, (q31_t)0x3a8e7400, (q31_t)0x8e2de99e, (q31_t)0x3a88dd9d, (q31_t)0x8e2b09e9,
+ (q31_t)0x3a834717, (q31_t)0x8e282a7b, (q31_t)0x3a7db06d, (q31_t)0x8e254b53, (q31_t)0x3a78199f, (q31_t)0x8e226c71, (q31_t)0x3a7282ac, (q31_t)0x8e1f8dd6,
+ (q31_t)0x3a6ceb96, (q31_t)0x8e1caf80, (q31_t)0x3a67545b, (q31_t)0x8e19d171, (q31_t)0x3a61bcfd, (q31_t)0x8e16f3a9, (q31_t)0x3a5c257a, (q31_t)0x8e141626,
+ (q31_t)0x3a568dd4, (q31_t)0x8e1138ea, (q31_t)0x3a50f609, (q31_t)0x8e0e5bf4, (q31_t)0x3a4b5e1b, (q31_t)0x8e0b7f44, (q31_t)0x3a45c608, (q31_t)0x8e08a2db,
+ (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x3a3a9577, (q31_t)0x8e02eadb, (q31_t)0x3a34fcf9, (q31_t)0x8e000f44, (q31_t)0x3a2f6457, (q31_t)0x8dfd33f4,
+ (q31_t)0x3a29cb91, (q31_t)0x8dfa58ea, (q31_t)0x3a2432a7, (q31_t)0x8df77e27, (q31_t)0x3a1e9999, (q31_t)0x8df4a3a9, (q31_t)0x3a190068, (q31_t)0x8df1c973,
+ (q31_t)0x3a136712, (q31_t)0x8deeef82, (q31_t)0x3a0dcd99, (q31_t)0x8dec15d8, (q31_t)0x3a0833fc, (q31_t)0x8de93c74, (q31_t)0x3a029a3b, (q31_t)0x8de66357,
+ (q31_t)0x39fd0056, (q31_t)0x8de38a80, (q31_t)0x39f7664e, (q31_t)0x8de0b1ef, (q31_t)0x39f1cc21, (q31_t)0x8dddd9a5, (q31_t)0x39ec31d1, (q31_t)0x8ddb01a1,
+ (q31_t)0x39e6975e, (q31_t)0x8dd829e4, (q31_t)0x39e0fcc6, (q31_t)0x8dd5526d, (q31_t)0x39db620b, (q31_t)0x8dd27b3c, (q31_t)0x39d5c72c, (q31_t)0x8dcfa452,
+ (q31_t)0x39d02c2a, (q31_t)0x8dcccdaf, (q31_t)0x39ca9104, (q31_t)0x8dc9f751, (q31_t)0x39c4f5ba, (q31_t)0x8dc7213b, (q31_t)0x39bf5a4d, (q31_t)0x8dc44b6a,
+ (q31_t)0x39b9bebc, (q31_t)0x8dc175e0, (q31_t)0x39b42307, (q31_t)0x8dbea09d, (q31_t)0x39ae872f, (q31_t)0x8dbbcba0, (q31_t)0x39a8eb33, (q31_t)0x8db8f6ea,
+ (q31_t)0x39a34f13, (q31_t)0x8db6227a, (q31_t)0x399db2d0, (q31_t)0x8db34e50, (q31_t)0x3998166a, (q31_t)0x8db07a6d, (q31_t)0x399279e0, (q31_t)0x8dada6d1,
+ (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x39874061, (q31_t)0x8da8006c, (q31_t)0x3981a36d, (q31_t)0x8da52da3, (q31_t)0x397c0655, (q31_t)0x8da25b21,
+ (q31_t)0x39766919, (q31_t)0x8d9f88e5, (q31_t)0x3970cbba, (q31_t)0x8d9cb6f0, (q31_t)0x396b2e38, (q31_t)0x8d99e541, (q31_t)0x39659092, (q31_t)0x8d9713d9,
+ (q31_t)0x395ff2c9, (q31_t)0x8d9442b8, (q31_t)0x395a54dd, (q31_t)0x8d9171dd, (q31_t)0x3954b6cd, (q31_t)0x8d8ea148, (q31_t)0x394f1899, (q31_t)0x8d8bd0fb,
+ (q31_t)0x39497a43, (q31_t)0x8d8900f3, (q31_t)0x3943dbc9, (q31_t)0x8d863133, (q31_t)0x393e3d2c, (q31_t)0x8d8361b9, (q31_t)0x39389e6b, (q31_t)0x8d809286,
+ (q31_t)0x3932ff87, (q31_t)0x8d7dc399, (q31_t)0x392d6080, (q31_t)0x8d7af4f3, (q31_t)0x3927c155, (q31_t)0x8d782694, (q31_t)0x39222208, (q31_t)0x8d75587b,
+ (q31_t)0x391c8297, (q31_t)0x8d728aa9, (q31_t)0x3916e303, (q31_t)0x8d6fbd1d, (q31_t)0x3911434b, (q31_t)0x8d6cefd9, (q31_t)0x390ba371, (q31_t)0x8d6a22db,
+ (q31_t)0x39060373, (q31_t)0x8d675623, (q31_t)0x39006352, (q31_t)0x8d6489b3, (q31_t)0x38fac30e, (q31_t)0x8d61bd89, (q31_t)0x38f522a6, (q31_t)0x8d5ef1a5,
+ (q31_t)0x38ef821c, (q31_t)0x8d5c2609, (q31_t)0x38e9e16e, (q31_t)0x8d595ab3, (q31_t)0x38e4409e, (q31_t)0x8d568fa4, (q31_t)0x38de9faa, (q31_t)0x8d53c4db,
+ (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x38d35d59, (q31_t)0x8d4e301f, (q31_t)0x38cdbbfc, (q31_t)0x8d4b662a, (q31_t)0x38c81a7c, (q31_t)0x8d489c7d,
+ (q31_t)0x38c278d9, (q31_t)0x8d45d316, (q31_t)0x38bcd713, (q31_t)0x8d4309f6, (q31_t)0x38b7352a, (q31_t)0x8d40411d, (q31_t)0x38b1931e, (q31_t)0x8d3d788b,
+ (q31_t)0x38abf0ef, (q31_t)0x8d3ab03f, (q31_t)0x38a64e9d, (q31_t)0x8d37e83a, (q31_t)0x38a0ac29, (q31_t)0x8d35207d, (q31_t)0x389b0991, (q31_t)0x8d325905,
+ (q31_t)0x389566d6, (q31_t)0x8d2f91d5, (q31_t)0x388fc3f8, (q31_t)0x8d2ccaec, (q31_t)0x388a20f8, (q31_t)0x8d2a0449, (q31_t)0x38847dd5, (q31_t)0x8d273ded,
+ (q31_t)0x387eda8e, (q31_t)0x8d2477d8, (q31_t)0x38793725, (q31_t)0x8d21b20a, (q31_t)0x38739399, (q31_t)0x8d1eec83, (q31_t)0x386defeb, (q31_t)0x8d1c2742,
+ (q31_t)0x38684c19, (q31_t)0x8d196249, (q31_t)0x3862a825, (q31_t)0x8d169d96, (q31_t)0x385d040d, (q31_t)0x8d13d92a, (q31_t)0x38575fd4, (q31_t)0x8d111505,
+ (q31_t)0x3851bb77, (q31_t)0x8d0e5127, (q31_t)0x384c16f7, (q31_t)0x8d0b8d90, (q31_t)0x38467255, (q31_t)0x8d08ca40, (q31_t)0x3840cd90, (q31_t)0x8d060737,
+ (q31_t)0x383b28a9, (q31_t)0x8d034474, (q31_t)0x3835839f, (q31_t)0x8d0081f9, (q31_t)0x382fde72, (q31_t)0x8cfdbfc4, (q31_t)0x382a3922, (q31_t)0x8cfafdd7,
+ (q31_t)0x382493b0, (q31_t)0x8cf83c30, (q31_t)0x381eee1b, (q31_t)0x8cf57ad0, (q31_t)0x38194864, (q31_t)0x8cf2b9b8, (q31_t)0x3813a28a, (q31_t)0x8ceff8e6,
+ (q31_t)0x380dfc8d, (q31_t)0x8ced385b, (q31_t)0x3808566e, (q31_t)0x8cea7818, (q31_t)0x3802b02c, (q31_t)0x8ce7b81b, (q31_t)0x37fd09c8, (q31_t)0x8ce4f865,
+ (q31_t)0x37f76341, (q31_t)0x8ce238f6, (q31_t)0x37f1bc97, (q31_t)0x8cdf79ce, (q31_t)0x37ec15cb, (q31_t)0x8cdcbaee, (q31_t)0x37e66edd, (q31_t)0x8cd9fc54,
+ (q31_t)0x37e0c7cc, (q31_t)0x8cd73e01, (q31_t)0x37db2099, (q31_t)0x8cd47ff6, (q31_t)0x37d57943, (q31_t)0x8cd1c231, (q31_t)0x37cfd1cb, (q31_t)0x8ccf04b3,
+ (q31_t)0x37ca2a30, (q31_t)0x8ccc477d, (q31_t)0x37c48273, (q31_t)0x8cc98a8e, (q31_t)0x37beda93, (q31_t)0x8cc6cde5, (q31_t)0x37b93292, (q31_t)0x8cc41184,
+ (q31_t)0x37b38a6d, (q31_t)0x8cc1556a, (q31_t)0x37ade227, (q31_t)0x8cbe9996, (q31_t)0x37a839be, (q31_t)0x8cbbde0a, (q31_t)0x37a29132, (q31_t)0x8cb922c6,
+ (q31_t)0x379ce885, (q31_t)0x8cb667c8, (q31_t)0x37973fb5, (q31_t)0x8cb3ad11, (q31_t)0x379196c3, (q31_t)0x8cb0f2a1, (q31_t)0x378bedae, (q31_t)0x8cae3879,
+ (q31_t)0x37864477, (q31_t)0x8cab7e98, (q31_t)0x37809b1e, (q31_t)0x8ca8c4fd, (q31_t)0x377af1a3, (q31_t)0x8ca60baa, (q31_t)0x37754806, (q31_t)0x8ca3529f,
+ (q31_t)0x376f9e46, (q31_t)0x8ca099da, (q31_t)0x3769f464, (q31_t)0x8c9de15c, (q31_t)0x37644a60, (q31_t)0x8c9b2926, (q31_t)0x375ea03a, (q31_t)0x8c987137,
+ (q31_t)0x3758f5f2, (q31_t)0x8c95b98f, (q31_t)0x37534b87, (q31_t)0x8c93022e, (q31_t)0x374da0fa, (q31_t)0x8c904b14, (q31_t)0x3747f64c, (q31_t)0x8c8d9442,
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+ (q31_t)0x3112fc95, (q31_t)0x89c7f138, (q31_t)0x310d2ef0, (q31_t)0x89c588ae, (q31_t)0x3107612e, (q31_t)0x89c3206c, (q31_t)0x3101934d, (q31_t)0x89c0b873,
+ (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x30f5f730, (q31_t)0x89bbe95c, (q31_t)0x30f028f4, (q31_t)0x89b9823e, (q31_t)0x30ea5a9a, (q31_t)0x89b71b69,
+ (q31_t)0x30e48c22, (q31_t)0x89b4b4dd, (q31_t)0x30debd8c, (q31_t)0x89b24e9a, (q31_t)0x30d8eed8, (q31_t)0x89afe8a0, (q31_t)0x30d32006, (q31_t)0x89ad82ef,
+ (q31_t)0x30cd5115, (q31_t)0x89ab1d87, (q31_t)0x30c78206, (q31_t)0x89a8b868, (q31_t)0x30c1b2da, (q31_t)0x89a65391, (q31_t)0x30bbe38f, (q31_t)0x89a3ef04,
+ (q31_t)0x30b61426, (q31_t)0x89a18ac0, (q31_t)0x30b0449f, (q31_t)0x899f26c5, (q31_t)0x30aa74fa, (q31_t)0x899cc313, (q31_t)0x30a4a537, (q31_t)0x899a5faa,
+ (q31_t)0x309ed556, (q31_t)0x8997fc8a, (q31_t)0x30990557, (q31_t)0x899599b3, (q31_t)0x3093353a, (q31_t)0x89933725, (q31_t)0x308d64ff, (q31_t)0x8990d4e0,
+ (q31_t)0x308794a6, (q31_t)0x898e72e4, (q31_t)0x3081c42f, (q31_t)0x898c1131, (q31_t)0x307bf39b, (q31_t)0x8989afc8, (q31_t)0x307622e8, (q31_t)0x89874ea7,
+ (q31_t)0x30705217, (q31_t)0x8984edcf, (q31_t)0x306a8129, (q31_t)0x89828d41, (q31_t)0x3064b01d, (q31_t)0x89802cfc, (q31_t)0x305edef3, (q31_t)0x897dccff,
+ (q31_t)0x30590dab, (q31_t)0x897b6d4c, (q31_t)0x30533c45, (q31_t)0x89790de2, (q31_t)0x304d6ac1, (q31_t)0x8976aec1, (q31_t)0x30479920, (q31_t)0x89744fe9,
+ (q31_t)0x3041c761, (q31_t)0x8971f15a, (q31_t)0x303bf584, (q31_t)0x896f9315, (q31_t)0x30362389, (q31_t)0x896d3518, (q31_t)0x30305171, (q31_t)0x896ad765,
+ (q31_t)0x302a7f3a, (q31_t)0x896879fb, (q31_t)0x3024ace6, (q31_t)0x89661cda, (q31_t)0x301eda75, (q31_t)0x8963c002, (q31_t)0x301907e6, (q31_t)0x89616373,
+ (q31_t)0x30133539, (q31_t)0x895f072e, (q31_t)0x300d626e, (q31_t)0x895cab31, (q31_t)0x30078f86, (q31_t)0x895a4f7e, (q31_t)0x3001bc80, (q31_t)0x8957f414,
+ (q31_t)0x2ffbe95d, (q31_t)0x895598f3, (q31_t)0x2ff6161c, (q31_t)0x89533e1c, (q31_t)0x2ff042bd, (q31_t)0x8950e38e, (q31_t)0x2fea6f41, (q31_t)0x894e8948,
+ (q31_t)0x2fe49ba7, (q31_t)0x894c2f4c, (q31_t)0x2fdec7f0, (q31_t)0x8949d59a, (q31_t)0x2fd8f41b, (q31_t)0x89477c30, (q31_t)0x2fd32028, (q31_t)0x89452310,
+ (q31_t)0x2fcd4c19, (q31_t)0x8942ca39, (q31_t)0x2fc777eb, (q31_t)0x894071ab, (q31_t)0x2fc1a3a0, (q31_t)0x893e1967, (q31_t)0x2fbbcf38, (q31_t)0x893bc16b,
+ (q31_t)0x2fb5fab2, (q31_t)0x893969b9, (q31_t)0x2fb0260f, (q31_t)0x89371250, (q31_t)0x2faa514f, (q31_t)0x8934bb31, (q31_t)0x2fa47c71, (q31_t)0x8932645b,
+ (q31_t)0x2f9ea775, (q31_t)0x89300dce, (q31_t)0x2f98d25d, (q31_t)0x892db78a, (q31_t)0x2f92fd26, (q31_t)0x892b6190, (q31_t)0x2f8d27d3, (q31_t)0x89290bdf,
+ (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2f817cd4, (q31_t)0x89246159, (q31_t)0x2f7ba729, (q31_t)0x89220c84, (q31_t)0x2f75d160, (q31_t)0x891fb7f8,
+ (q31_t)0x2f6ffb7a, (q31_t)0x891d63b5, (q31_t)0x2f6a2577, (q31_t)0x891b0fbc, (q31_t)0x2f644f56, (q31_t)0x8918bc0c, (q31_t)0x2f5e7919, (q31_t)0x891668a6,
+ (q31_t)0x2f58a2be, (q31_t)0x89141589, (q31_t)0x2f52cc46, (q31_t)0x8911c2b5, (q31_t)0x2f4cf5b0, (q31_t)0x890f702b, (q31_t)0x2f471efe, (q31_t)0x890d1dea,
+ (q31_t)0x2f41482e, (q31_t)0x890acbf2, (q31_t)0x2f3b7141, (q31_t)0x89087a44, (q31_t)0x2f359a37, (q31_t)0x890628df, (q31_t)0x2f2fc310, (q31_t)0x8903d7c4,
+ (q31_t)0x2f29ebcc, (q31_t)0x890186f2, (q31_t)0x2f24146b, (q31_t)0x88ff3669, (q31_t)0x2f1e3ced, (q31_t)0x88fce62a, (q31_t)0x2f186551, (q31_t)0x88fa9634,
+ (q31_t)0x2f128d99, (q31_t)0x88f84687, (q31_t)0x2f0cb5c3, (q31_t)0x88f5f724, (q31_t)0x2f06ddd1, (q31_t)0x88f3a80b, (q31_t)0x2f0105c1, (q31_t)0x88f1593b,
+ (q31_t)0x2efb2d95, (q31_t)0x88ef0ab4, (q31_t)0x2ef5554b, (q31_t)0x88ecbc77, (q31_t)0x2eef7ce5, (q31_t)0x88ea6e83, (q31_t)0x2ee9a461, (q31_t)0x88e820d9,
+ (q31_t)0x2ee3cbc1, (q31_t)0x88e5d378, (q31_t)0x2eddf304, (q31_t)0x88e38660, (q31_t)0x2ed81a29, (q31_t)0x88e13992, (q31_t)0x2ed24132, (q31_t)0x88deed0e,
+ (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2ec68eed, (q31_t)0x88da54e1, (q31_t)0x2ec0b5a0, (q31_t)0x88d8093a, (q31_t)0x2ebadc35, (q31_t)0x88d5bddb,
+ (q31_t)0x2eb502ae, (q31_t)0x88d372c6, (q31_t)0x2eaf290a, (q31_t)0x88d127fb, (q31_t)0x2ea94f49, (q31_t)0x88cedd79, (q31_t)0x2ea3756b, (q31_t)0x88cc9340,
+ (q31_t)0x2e9d9b70, (q31_t)0x88ca4951, (q31_t)0x2e97c159, (q31_t)0x88c7ffac, (q31_t)0x2e91e725, (q31_t)0x88c5b650, (q31_t)0x2e8c0cd4, (q31_t)0x88c36d3e,
+ (q31_t)0x2e863267, (q31_t)0x88c12475, (q31_t)0x2e8057dd, (q31_t)0x88bedbf6, (q31_t)0x2e7a7d36, (q31_t)0x88bc93c0, (q31_t)0x2e74a272, (q31_t)0x88ba4bd4,
+ (q31_t)0x2e6ec792, (q31_t)0x88b80432, (q31_t)0x2e68ec95, (q31_t)0x88b5bcd9, (q31_t)0x2e63117c, (q31_t)0x88b375ca, (q31_t)0x2e5d3646, (q31_t)0x88b12f04,
+ (q31_t)0x2e575af3, (q31_t)0x88aee888, (q31_t)0x2e517f84, (q31_t)0x88aca255, (q31_t)0x2e4ba3f8, (q31_t)0x88aa5c6c, (q31_t)0x2e45c850, (q31_t)0x88a816cd,
+ (q31_t)0x2e3fec8b, (q31_t)0x88a5d177, (q31_t)0x2e3a10aa, (q31_t)0x88a38c6b, (q31_t)0x2e3434ac, (q31_t)0x88a147a9, (q31_t)0x2e2e5891, (q31_t)0x889f0330,
+ (q31_t)0x2e287c5a, (q31_t)0x889cbf01, (q31_t)0x2e22a007, (q31_t)0x889a7b1b, (q31_t)0x2e1cc397, (q31_t)0x88983780, (q31_t)0x2e16e70b, (q31_t)0x8895f42d,
+ (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2e0b2d9d, (q31_t)0x88916e66, (q31_t)0x2e0550bb, (q31_t)0x888f2bf1, (q31_t)0x2dff73bd, (q31_t)0x888ce9c5,
+ (q31_t)0x2df996a3, (q31_t)0x888aa7e3, (q31_t)0x2df3b96c, (q31_t)0x8888664b, (q31_t)0x2deddc19, (q31_t)0x888624fd, (q31_t)0x2de7feaa, (q31_t)0x8883e3f8,
+ (q31_t)0x2de2211e, (q31_t)0x8881a33d, (q31_t)0x2ddc4376, (q31_t)0x887f62cb, (q31_t)0x2dd665b2, (q31_t)0x887d22a4, (q31_t)0x2dd087d1, (q31_t)0x887ae2c6,
+ (q31_t)0x2dcaa9d5, (q31_t)0x8878a332, (q31_t)0x2dc4cbbc, (q31_t)0x887663e7, (q31_t)0x2dbeed86, (q31_t)0x887424e7, (q31_t)0x2db90f35, (q31_t)0x8871e630,
+ (q31_t)0x2db330c7, (q31_t)0x886fa7c2, (q31_t)0x2dad523d, (q31_t)0x886d699f, (q31_t)0x2da77397, (q31_t)0x886b2bc5, (q31_t)0x2da194d5, (q31_t)0x8868ee35,
+ (q31_t)0x2d9bb5f6, (q31_t)0x8866b0ef, (q31_t)0x2d95d6fc, (q31_t)0x886473f2, (q31_t)0x2d8ff7e5, (q31_t)0x88623740, (q31_t)0x2d8a18b3, (q31_t)0x885ffad7,
+ (q31_t)0x2d843964, (q31_t)0x885dbeb8, (q31_t)0x2d7e59f9, (q31_t)0x885b82e3, (q31_t)0x2d787a72, (q31_t)0x88594757, (q31_t)0x2d729acf, (q31_t)0x88570c16,
+ (q31_t)0x2d6cbb10, (q31_t)0x8854d11e, (q31_t)0x2d66db35, (q31_t)0x88529670, (q31_t)0x2d60fb3e, (q31_t)0x88505c0b, (q31_t)0x2d5b1b2b, (q31_t)0x884e21f1,
+ (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2d4f5ab1, (q31_t)0x8849ae9a, (q31_t)0x2d497a4a, (q31_t)0x8847755d, (q31_t)0x2d4399c7, (q31_t)0x88453c6a,
+ (q31_t)0x2d3db928, (q31_t)0x884303c1, (q31_t)0x2d37d86d, (q31_t)0x8840cb61, (q31_t)0x2d31f797, (q31_t)0x883e934c, (q31_t)0x2d2c16a4, (q31_t)0x883c5b81,
+ (q31_t)0x2d263596, (q31_t)0x883a23ff, (q31_t)0x2d20546b, (q31_t)0x8837ecc7, (q31_t)0x2d1a7325, (q31_t)0x8835b5d9, (q31_t)0x2d1491c4, (q31_t)0x88337f35,
+ (q31_t)0x2d0eb046, (q31_t)0x883148db, (q31_t)0x2d08ceac, (q31_t)0x882f12cb, (q31_t)0x2d02ecf7, (q31_t)0x882cdd04, (q31_t)0x2cfd0b26, (q31_t)0x882aa788,
+ (q31_t)0x2cf72939, (q31_t)0x88287256, (q31_t)0x2cf14731, (q31_t)0x88263d6d, (q31_t)0x2ceb650d, (q31_t)0x882408ce, (q31_t)0x2ce582cd, (q31_t)0x8821d47a,
+ (q31_t)0x2cdfa071, (q31_t)0x881fa06f, (q31_t)0x2cd9bdfa, (q31_t)0x881d6cae, (q31_t)0x2cd3db67, (q31_t)0x881b3937, (q31_t)0x2ccdf8b8, (q31_t)0x8819060a,
+ (q31_t)0x2cc815ee, (q31_t)0x8816d327, (q31_t)0x2cc23308, (q31_t)0x8814a08f, (q31_t)0x2cbc5006, (q31_t)0x88126e40, (q31_t)0x2cb66ce9, (q31_t)0x88103c3b,
+ (q31_t)0x2cb089b1, (q31_t)0x880e0a7f, (q31_t)0x2caaa65c, (q31_t)0x880bd90e, (q31_t)0x2ca4c2ed, (q31_t)0x8809a7e7, (q31_t)0x2c9edf61, (q31_t)0x8807770a,
+ (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c9317f8, (q31_t)0x8803162e, (q31_t)0x2c8d341a, (q31_t)0x8800e62f, (q31_t)0x2c875021, (q31_t)0x87feb67a,
+ (q31_t)0x2c816c0c, (q31_t)0x87fc870f, (q31_t)0x2c7b87dc, (q31_t)0x87fa57ee, (q31_t)0x2c75a390, (q31_t)0x87f82917, (q31_t)0x2c6fbf29, (q31_t)0x87f5fa8b,
+ (q31_t)0x2c69daa6, (q31_t)0x87f3cc48, (q31_t)0x2c63f609, (q31_t)0x87f19e4f, (q31_t)0x2c5e114f, (q31_t)0x87ef70a0, (q31_t)0x2c582c7b, (q31_t)0x87ed433c,
+ (q31_t)0x2c52478a, (q31_t)0x87eb1621, (q31_t)0x2c4c627f, (q31_t)0x87e8e950, (q31_t)0x2c467d58, (q31_t)0x87e6bcca, (q31_t)0x2c409816, (q31_t)0x87e4908e,
+ (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b, (q31_t)0x2c34cd40, (q31_t)0x87e038f3, (q31_t)0x2c2ee7ad, (q31_t)0x87de0d95, (q31_t)0x2c2901fd, (q31_t)0x87dbe281,
+ (q31_t)0x2c231c33, (q31_t)0x87d9b7b7, (q31_t)0x2c1d364e, (q31_t)0x87d78d38, (q31_t)0x2c17504d, (q31_t)0x87d56302, (q31_t)0x2c116a31, (q31_t)0x87d33916,
+ (q31_t)0x2c0b83fa, (q31_t)0x87d10f75, (q31_t)0x2c059da7, (q31_t)0x87cee61e, (q31_t)0x2bffb73a, (q31_t)0x87ccbd11, (q31_t)0x2bf9d0b1, (q31_t)0x87ca944e,
+ (q31_t)0x2bf3ea0d, (q31_t)0x87c86bd5, (q31_t)0x2bee034e, (q31_t)0x87c643a6, (q31_t)0x2be81c74, (q31_t)0x87c41bc2, (q31_t)0x2be2357f, (q31_t)0x87c1f427,
+ (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2bd66744, (q31_t)0x87bda5d1, (q31_t)0x2bd07ffe, (q31_t)0x87bb7f16, (q31_t)0x2bca989d, (q31_t)0x87b958a4,
+ (q31_t)0x2bc4b120, (q31_t)0x87b7327d, (q31_t)0x2bbec989, (q31_t)0x87b50c9f, (q31_t)0x2bb8e1d7, (q31_t)0x87b2e70c, (q31_t)0x2bb2fa0a, (q31_t)0x87b0c1c4,
+ (q31_t)0x2bad1221, (q31_t)0x87ae9cc5, (q31_t)0x2ba72a1e, (q31_t)0x87ac7811, (q31_t)0x2ba14200, (q31_t)0x87aa53a6, (q31_t)0x2b9b59c7, (q31_t)0x87a82f87,
+ (q31_t)0x2b957173, (q31_t)0x87a60bb1, (q31_t)0x2b8f8905, (q31_t)0x87a3e825, (q31_t)0x2b89a07b, (q31_t)0x87a1c4e4, (q31_t)0x2b83b7d7, (q31_t)0x879fa1ed,
+ (q31_t)0x2b7dcf17, (q31_t)0x879d7f41, (q31_t)0x2b77e63d, (q31_t)0x879b5cde, (q31_t)0x2b71fd48, (q31_t)0x87993ac6, (q31_t)0x2b6c1438, (q31_t)0x879718f8,
+ (q31_t)0x2b662b0e, (q31_t)0x8794f774, (q31_t)0x2b6041c9, (q31_t)0x8792d63b, (q31_t)0x2b5a5868, (q31_t)0x8790b54c, (q31_t)0x2b546eee, (q31_t)0x878e94a7,
+ (q31_t)0x2b4e8558, (q31_t)0x878c744d, (q31_t)0x2b489ba8, (q31_t)0x878a543d, (q31_t)0x2b42b1dd, (q31_t)0x87883477, (q31_t)0x2b3cc7f7, (q31_t)0x878614fb,
+ (q31_t)0x2b36ddf7, (q31_t)0x8783f5ca, (q31_t)0x2b30f3dc, (q31_t)0x8781d6e3, (q31_t)0x2b2b09a6, (q31_t)0x877fb846, (q31_t)0x2b251f56, (q31_t)0x877d99f4,
+ (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2b194a66, (q31_t)0x87795e2f, (q31_t)0x2b135fc6, (q31_t)0x877740bb, (q31_t)0x2b0d750b, (q31_t)0x87752392,
+ (q31_t)0x2b078a36, (q31_t)0x877306b4, (q31_t)0x2b019f46, (q31_t)0x8770ea20, (q31_t)0x2afbb43c, (q31_t)0x876ecdd6, (q31_t)0x2af5c917, (q31_t)0x876cb1d6,
+ (q31_t)0x2aefddd8, (q31_t)0x876a9621, (q31_t)0x2ae9f27e, (q31_t)0x87687ab7, (q31_t)0x2ae4070a, (q31_t)0x87665f96, (q31_t)0x2ade1b7c, (q31_t)0x876444c1,
+ (q31_t)0x2ad82fd2, (q31_t)0x87622a35, (q31_t)0x2ad2440f, (q31_t)0x87600ff4, (q31_t)0x2acc5831, (q31_t)0x875df5fd, (q31_t)0x2ac66c39, (q31_t)0x875bdc51,
+ (q31_t)0x2ac08026, (q31_t)0x8759c2ef, (q31_t)0x2aba93f9, (q31_t)0x8757a9d8, (q31_t)0x2ab4a7b1, (q31_t)0x8755910b, (q31_t)0x2aaebb50, (q31_t)0x87537888,
+ (q31_t)0x2aa8ced3, (q31_t)0x87516050, (q31_t)0x2aa2e23d, (q31_t)0x874f4862, (q31_t)0x2a9cf58c, (q31_t)0x874d30bf, (q31_t)0x2a9708c1, (q31_t)0x874b1966,
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+ (q31_t)0x23d6cc87, (q31_t)0x851ea652, (q31_t)0x23d0c453, (q31_t)0x851ce41a, (q31_t)0x23cabc09, (q31_t)0x851b222e, (q31_t)0x23c4b3a9, (q31_t)0x8519608d,
+ (q31_t)0x23beab33, (q31_t)0x85179f39, (q31_t)0x23b8a2a7, (q31_t)0x8515de30, (q31_t)0x23b29a05, (q31_t)0x85141d73, (q31_t)0x23ac914d, (q31_t)0x85125d02,
+ (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x23a07f9a, (q31_t)0x850edd03, (q31_t)0x239a76a0, (q31_t)0x850d1d75, (q31_t)0x23946d90, (q31_t)0x850b5e34,
+ (q31_t)0x238e646a, (q31_t)0x85099f3e, (q31_t)0x23885b2e, (q31_t)0x8507e094, (q31_t)0x238251dd, (q31_t)0x85062235, (q31_t)0x237c4875, (q31_t)0x85046423,
+ (q31_t)0x23763ef7, (q31_t)0x8502a65c, (q31_t)0x23703564, (q31_t)0x8500e8e2, (q31_t)0x236a2bba, (q31_t)0x84ff2bb3, (q31_t)0x236421fb, (q31_t)0x84fd6ed0,
+ (q31_t)0x235e1826, (q31_t)0x84fbb239, (q31_t)0x23580e3b, (q31_t)0x84f9f5ee, (q31_t)0x2352043b, (q31_t)0x84f839ee, (q31_t)0x234bfa24, (q31_t)0x84f67e3b,
+ (q31_t)0x2345eff8, (q31_t)0x84f4c2d4, (q31_t)0x233fe5b6, (q31_t)0x84f307b8, (q31_t)0x2339db5e, (q31_t)0x84f14ce8, (q31_t)0x2333d0f1, (q31_t)0x84ef9265,
+ (q31_t)0x232dc66d, (q31_t)0x84edd82d, (q31_t)0x2327bbd5, (q31_t)0x84ec1e41, (q31_t)0x2321b126, (q31_t)0x84ea64a1, (q31_t)0x231ba662, (q31_t)0x84e8ab4d,
+ (q31_t)0x23159b88, (q31_t)0x84e6f244, (q31_t)0x230f9098, (q31_t)0x84e53988, (q31_t)0x23098593, (q31_t)0x84e38118, (q31_t)0x23037a78, (q31_t)0x84e1c8f3,
+ (q31_t)0x22fd6f48, (q31_t)0x84e0111b, (q31_t)0x22f76402, (q31_t)0x84de598f, (q31_t)0x22f158a7, (q31_t)0x84dca24e, (q31_t)0x22eb4d36, (q31_t)0x84daeb5a,
+ (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22df3613, (q31_t)0x84d77e54, (q31_t)0x22d92a61, (q31_t)0x84d5c844, (q31_t)0x22d31e9a, (q31_t)0x84d4127f,
+ (q31_t)0x22cd12bd, (q31_t)0x84d25d06, (q31_t)0x22c706cb, (q31_t)0x84d0a7da, (q31_t)0x22c0fac4, (q31_t)0x84cef2f9, (q31_t)0x22baeea7, (q31_t)0x84cd3e64,
+ (q31_t)0x22b4e274, (q31_t)0x84cb8a1b, (q31_t)0x22aed62c, (q31_t)0x84c9d61f, (q31_t)0x22a8c9cf, (q31_t)0x84c8226e, (q31_t)0x22a2bd5d, (q31_t)0x84c66f09,
+ (q31_t)0x229cb0d5, (q31_t)0x84c4bbf0, (q31_t)0x2296a437, (q31_t)0x84c30924, (q31_t)0x22909785, (q31_t)0x84c156a3, (q31_t)0x228a8abd, (q31_t)0x84bfa46e,
+ (q31_t)0x22847de0, (q31_t)0x84bdf286, (q31_t)0x227e70ed, (q31_t)0x84bc40e9, (q31_t)0x227863e5, (q31_t)0x84ba8f98, (q31_t)0x227256c8, (q31_t)0x84b8de94,
+ (q31_t)0x226c4996, (q31_t)0x84b72ddb, (q31_t)0x22663c4e, (q31_t)0x84b57d6f, (q31_t)0x22602ef1, (q31_t)0x84b3cd4f, (q31_t)0x225a217f, (q31_t)0x84b21d7a,
+ (q31_t)0x225413f8, (q31_t)0x84b06df2, (q31_t)0x224e065c, (q31_t)0x84aebeb6, (q31_t)0x2247f8aa, (q31_t)0x84ad0fc6, (q31_t)0x2241eae3, (q31_t)0x84ab6122,
+ (q31_t)0x223bdd08, (q31_t)0x84a9b2ca, (q31_t)0x2235cf17, (q31_t)0x84a804be, (q31_t)0x222fc111, (q31_t)0x84a656fe, (q31_t)0x2229b2f6, (q31_t)0x84a4a98a,
+ (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x221d9680, (q31_t)0x84a14f87, (q31_t)0x22178826, (q31_t)0x849fa2f7, (q31_t)0x221179b7, (q31_t)0x849df6b4,
+ (q31_t)0x220b6b32, (q31_t)0x849c4abd, (q31_t)0x22055c99, (q31_t)0x849a9f12, (q31_t)0x21ff4dea, (q31_t)0x8498f3b3, (q31_t)0x21f93f27, (q31_t)0x849748a0,
+ (q31_t)0x21f3304f, (q31_t)0x84959dd9, (q31_t)0x21ed2162, (q31_t)0x8493f35e, (q31_t)0x21e71260, (q31_t)0x84924930, (q31_t)0x21e10349, (q31_t)0x84909f4e,
+ (q31_t)0x21daf41d, (q31_t)0x848ef5b7, (q31_t)0x21d4e4dc, (q31_t)0x848d4c6d, (q31_t)0x21ced586, (q31_t)0x848ba36f, (q31_t)0x21c8c61c, (q31_t)0x8489fabe,
+ (q31_t)0x21c2b69c, (q31_t)0x84885258, (q31_t)0x21bca708, (q31_t)0x8486aa3e, (q31_t)0x21b6975f, (q31_t)0x84850271, (q31_t)0x21b087a1, (q31_t)0x84835af0,
+ (q31_t)0x21aa77cf, (q31_t)0x8481b3bb, (q31_t)0x21a467e7, (q31_t)0x84800cd2, (q31_t)0x219e57eb, (q31_t)0x847e6636, (q31_t)0x219847da, (q31_t)0x847cbfe5,
+ (q31_t)0x219237b5, (q31_t)0x847b19e1, (q31_t)0x218c277a, (q31_t)0x84797429, (q31_t)0x2186172b, (q31_t)0x8477cebd, (q31_t)0x218006c8, (q31_t)0x8476299e,
+ (q31_t)0x2179f64f, (q31_t)0x847484ca, (q31_t)0x2173e5c2, (q31_t)0x8472e043, (q31_t)0x216dd521, (q31_t)0x84713c08, (q31_t)0x2167c46b, (q31_t)0x846f9819,
+ (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x215ba2c0, (q31_t)0x846c5120, (q31_t)0x215591cc, (q31_t)0x846aae16, (q31_t)0x214f80c4, (q31_t)0x84690b58,
+ (q31_t)0x21496fa7, (q31_t)0x846768e7, (q31_t)0x21435e75, (q31_t)0x8465c6c1, (q31_t)0x213d4d2f, (q31_t)0x846424e8, (q31_t)0x21373bd4, (q31_t)0x8462835b,
+ (q31_t)0x21312a65, (q31_t)0x8460e21a, (q31_t)0x212b18e1, (q31_t)0x845f4126, (q31_t)0x21250749, (q31_t)0x845da07e, (q31_t)0x211ef59d, (q31_t)0x845c0022,
+ (q31_t)0x2118e3dc, (q31_t)0x845a6012, (q31_t)0x2112d206, (q31_t)0x8458c04f, (q31_t)0x210cc01d, (q31_t)0x845720d8, (q31_t)0x2106ae1e, (q31_t)0x845581ad,
+ (q31_t)0x21009c0c, (q31_t)0x8453e2cf, (q31_t)0x20fa89e5, (q31_t)0x8452443d, (q31_t)0x20f477aa, (q31_t)0x8450a5f7, (q31_t)0x20ee655a, (q31_t)0x844f07fd,
+ (q31_t)0x20e852f6, (q31_t)0x844d6a50, (q31_t)0x20e2407e, (q31_t)0x844bccef, (q31_t)0x20dc2df2, (q31_t)0x844a2fda, (q31_t)0x20d61b51, (q31_t)0x84489311,
+ (q31_t)0x20d0089c, (q31_t)0x8446f695, (q31_t)0x20c9f5d3, (q31_t)0x84455a66, (q31_t)0x20c3e2f5, (q31_t)0x8443be82, (q31_t)0x20bdd003, (q31_t)0x844222eb,
+ (q31_t)0x20b7bcfe, (q31_t)0x844087a0, (q31_t)0x20b1a9e4, (q31_t)0x843eeca2, (q31_t)0x20ab96b5, (q31_t)0x843d51f0, (q31_t)0x20a58373, (q31_t)0x843bb78a,
+ (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x20995cb2, (q31_t)0x843883a3, (q31_t)0x20934933, (q31_t)0x8436ea23, (q31_t)0x208d35a0, (q31_t)0x843550ee,
+ (q31_t)0x208721f9, (q31_t)0x8433b806, (q31_t)0x20810e3e, (q31_t)0x84321f6b, (q31_t)0x207afa6f, (q31_t)0x8430871b, (q31_t)0x2074e68c, (q31_t)0x842eef18,
+ (q31_t)0x206ed295, (q31_t)0x842d5762, (q31_t)0x2068be8a, (q31_t)0x842bbff8, (q31_t)0x2062aa6b, (q31_t)0x842a28da, (q31_t)0x205c9638, (q31_t)0x84289209,
+ (q31_t)0x205681f1, (q31_t)0x8426fb84, (q31_t)0x20506d96, (q31_t)0x8425654b, (q31_t)0x204a5927, (q31_t)0x8423cf5f, (q31_t)0x204444a4, (q31_t)0x842239bf,
+ (q31_t)0x203e300d, (q31_t)0x8420a46c, (q31_t)0x20381b63, (q31_t)0x841f0f65, (q31_t)0x203206a4, (q31_t)0x841d7aaa, (q31_t)0x202bf1d2, (q31_t)0x841be63c,
+ (q31_t)0x2025dcec, (q31_t)0x841a521a, (q31_t)0x201fc7f2, (q31_t)0x8418be45, (q31_t)0x2019b2e4, (q31_t)0x84172abc, (q31_t)0x20139dc2, (q31_t)0x84159780,
+ (q31_t)0x200d888d, (q31_t)0x84140490, (q31_t)0x20077344, (q31_t)0x841271ec, (q31_t)0x20015de7, (q31_t)0x8410df95, (q31_t)0x1ffb4876, (q31_t)0x840f4d8a,
+ (q31_t)0x1ff532f2, (q31_t)0x840dbbcc, (q31_t)0x1fef1d59, (q31_t)0x840c2a5a, (q31_t)0x1fe907ae, (q31_t)0x840a9935, (q31_t)0x1fe2f1ee, (q31_t)0x8409085c,
+ (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1fd6c634, (q31_t)0x8405e790, (q31_t)0x1fd0b03a, (q31_t)0x8404579d, (q31_t)0x1fca9a2b, (q31_t)0x8402c7f6,
+ (q31_t)0x1fc4840a, (q31_t)0x8401389b, (q31_t)0x1fbe6dd4, (q31_t)0x83ffa98d, (q31_t)0x1fb8578b, (q31_t)0x83fe1acc, (q31_t)0x1fb2412f, (q31_t)0x83fc8c57,
+ (q31_t)0x1fac2abf, (q31_t)0x83fafe2e, (q31_t)0x1fa6143b, (q31_t)0x83f97052, (q31_t)0x1f9ffda4, (q31_t)0x83f7e2c3, (q31_t)0x1f99e6fa, (q31_t)0x83f65580,
+ (q31_t)0x1f93d03c, (q31_t)0x83f4c889, (q31_t)0x1f8db96a, (q31_t)0x83f33bdf, (q31_t)0x1f87a285, (q31_t)0x83f1af82, (q31_t)0x1f818b8d, (q31_t)0x83f02371,
+ (q31_t)0x1f7b7481, (q31_t)0x83ee97ad, (q31_t)0x1f755d61, (q31_t)0x83ed0c35, (q31_t)0x1f6f462f, (q31_t)0x83eb810a, (q31_t)0x1f692ee9, (q31_t)0x83e9f62b,
+ (q31_t)0x1f63178f, (q31_t)0x83e86b99, (q31_t)0x1f5d0022, (q31_t)0x83e6e153, (q31_t)0x1f56e8a2, (q31_t)0x83e5575a, (q31_t)0x1f50d10e, (q31_t)0x83e3cdad,
+ (q31_t)0x1f4ab968, (q31_t)0x83e2444d, (q31_t)0x1f44a1ad, (q31_t)0x83e0bb3a, (q31_t)0x1f3e89e0, (q31_t)0x83df3273, (q31_t)0x1f3871ff, (q31_t)0x83dda9f9,
+ (q31_t)0x1f325a0b, (q31_t)0x83dc21cb, (q31_t)0x1f2c4204, (q31_t)0x83da99ea, (q31_t)0x1f2629ea, (q31_t)0x83d91255, (q31_t)0x1f2011bc, (q31_t)0x83d78b0d,
+ (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1f13e127, (q31_t)0x83d47d63, (q31_t)0x1f0dc8c0, (q31_t)0x83d2f701, (q31_t)0x1f07b045, (q31_t)0x83d170eb,
+ (q31_t)0x1f0197b8, (q31_t)0x83cfeb22, (q31_t)0x1efb7f17, (q31_t)0x83ce65a6, (q31_t)0x1ef56664, (q31_t)0x83cce076, (q31_t)0x1eef4d9d, (q31_t)0x83cb5b93,
+ (q31_t)0x1ee934c3, (q31_t)0x83c9d6fc, (q31_t)0x1ee31bd6, (q31_t)0x83c852b2, (q31_t)0x1edd02d6, (q31_t)0x83c6ceb5, (q31_t)0x1ed6e9c3, (q31_t)0x83c54b04,
+ (q31_t)0x1ed0d09d, (q31_t)0x83c3c7a0, (q31_t)0x1ecab763, (q31_t)0x83c24488, (q31_t)0x1ec49e17, (q31_t)0x83c0c1be, (q31_t)0x1ebe84b8, (q31_t)0x83bf3f3f,
+ (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e, (q31_t)0x1eb251c1, (q31_t)0x83bc3b29, (q31_t)0x1eac3829, (q31_t)0x83bab991, (q31_t)0x1ea61e7e, (q31_t)0x83b93845,
+ (q31_t)0x1ea004c1, (q31_t)0x83b7b746, (q31_t)0x1e99eaf0, (q31_t)0x83b63694, (q31_t)0x1e93d10c, (q31_t)0x83b4b62e, (q31_t)0x1e8db716, (q31_t)0x83b33616,
+ (q31_t)0x1e879d0d, (q31_t)0x83b1b649, (q31_t)0x1e8182f1, (q31_t)0x83b036ca, (q31_t)0x1e7b68c2, (q31_t)0x83aeb797, (q31_t)0x1e754e80, (q31_t)0x83ad38b1,
+ (q31_t)0x1e6f342c, (q31_t)0x83abba17, (q31_t)0x1e6919c4, (q31_t)0x83aa3bca, (q31_t)0x1e62ff4a, (q31_t)0x83a8bdca, (q31_t)0x1e5ce4be, (q31_t)0x83a74017,
+ (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1e50af6c, (q31_t)0x83a44596, (q31_t)0x1e4a94a7, (q31_t)0x83a2c8c9, (q31_t)0x1e4479cf, (q31_t)0x83a14c48,
+ (q31_t)0x1e3e5ee5, (q31_t)0x839fd014, (q31_t)0x1e3843e8, (q31_t)0x839e542d, (q31_t)0x1e3228d9, (q31_t)0x839cd893, (q31_t)0x1e2c0db6, (q31_t)0x839b5d45,
+ (q31_t)0x1e25f282, (q31_t)0x8399e244, (q31_t)0x1e1fd73a, (q31_t)0x83986790, (q31_t)0x1e19bbe0, (q31_t)0x8396ed29, (q31_t)0x1e13a074, (q31_t)0x8395730e,
+ (q31_t)0x1e0d84f5, (q31_t)0x8393f940, (q31_t)0x1e076963, (q31_t)0x83927fbf, (q31_t)0x1e014dbf, (q31_t)0x8391068a, (q31_t)0x1dfb3208, (q31_t)0x838f8da2,
+ (q31_t)0x1df5163f, (q31_t)0x838e1507, (q31_t)0x1deefa63, (q31_t)0x838c9cb9, (q31_t)0x1de8de75, (q31_t)0x838b24b8, (q31_t)0x1de2c275, (q31_t)0x8389ad03,
+ (q31_t)0x1ddca662, (q31_t)0x8388359b, (q31_t)0x1dd68a3c, (q31_t)0x8386be80, (q31_t)0x1dd06e04, (q31_t)0x838547b2, (q31_t)0x1dca51ba, (q31_t)0x8383d130,
+ (q31_t)0x1dc4355e, (q31_t)0x83825afb, (q31_t)0x1dbe18ef, (q31_t)0x8380e513, (q31_t)0x1db7fc6d, (q31_t)0x837f6f78, (q31_t)0x1db1dfda, (q31_t)0x837dfa2a,
+ (q31_t)0x1dabc334, (q31_t)0x837c8528, (q31_t)0x1da5a67c, (q31_t)0x837b1074, (q31_t)0x1d9f89b1, (q31_t)0x83799c0c, (q31_t)0x1d996cd4, (q31_t)0x837827f0,
+ (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d8d32e4, (q31_t)0x837540a1, (q31_t)0x1d8715d0, (q31_t)0x8373cd6c, (q31_t)0x1d80f8ab, (q31_t)0x83725a84,
+ (q31_t)0x1d7adb73, (q31_t)0x8370e7e9, (q31_t)0x1d74be29, (q31_t)0x836f759b, (q31_t)0x1d6ea0cc, (q31_t)0x836e039a, (q31_t)0x1d68835e, (q31_t)0x836c91e5,
+ (q31_t)0x1d6265dd, (q31_t)0x836b207d, (q31_t)0x1d5c484b, (q31_t)0x8369af63, (q31_t)0x1d562aa6, (q31_t)0x83683e95, (q31_t)0x1d500cef, (q31_t)0x8366ce14,
+ (q31_t)0x1d49ef26, (q31_t)0x83655ddf, (q31_t)0x1d43d14b, (q31_t)0x8363edf8, (q31_t)0x1d3db35e, (q31_t)0x83627e5d, (q31_t)0x1d37955e, (q31_t)0x83610f10,
+ (q31_t)0x1d31774d, (q31_t)0x835fa00f, (q31_t)0x1d2b592a, (q31_t)0x835e315b, (q31_t)0x1d253af5, (q31_t)0x835cc2f4, (q31_t)0x1d1f1cae, (q31_t)0x835b54da,
+ (q31_t)0x1d18fe54, (q31_t)0x8359e70d, (q31_t)0x1d12dfe9, (q31_t)0x8358798c, (q31_t)0x1d0cc16c, (q31_t)0x83570c59, (q31_t)0x1d06a2dd, (q31_t)0x83559f72,
+ (q31_t)0x1d00843d, (q31_t)0x835432d8, (q31_t)0x1cfa658a, (q31_t)0x8352c68c, (q31_t)0x1cf446c5, (q31_t)0x83515a8c, (q31_t)0x1cee27ef, (q31_t)0x834feed9,
+ (q31_t)0x1ce80906, (q31_t)0x834e8373, (q31_t)0x1ce1ea0c, (q31_t)0x834d185a, (q31_t)0x1cdbcb00, (q31_t)0x834bad8e, (q31_t)0x1cd5abe3, (q31_t)0x834a430e,
+ (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1cc96d72, (q31_t)0x83476ef6, (q31_t)0x1cc34e1f, (q31_t)0x8346055e, (q31_t)0x1cbd2eba, (q31_t)0x83449c12,
+ (q31_t)0x1cb70f43, (q31_t)0x83433314, (q31_t)0x1cb0efbb, (q31_t)0x8341ca62, (q31_t)0x1caad021, (q31_t)0x834061fd, (q31_t)0x1ca4b075, (q31_t)0x833ef9e6,
+ (q31_t)0x1c9e90b8, (q31_t)0x833d921b, (q31_t)0x1c9870e9, (q31_t)0x833c2a9d, (q31_t)0x1c925109, (q31_t)0x833ac36c, (q31_t)0x1c8c3116, (q31_t)0x83395c88,
+ (q31_t)0x1c861113, (q31_t)0x8337f5f1, (q31_t)0x1c7ff0fd, (q31_t)0x83368fa7, (q31_t)0x1c79d0d6, (q31_t)0x833529aa, (q31_t)0x1c73b09d, (q31_t)0x8333c3fa,
+ (q31_t)0x1c6d9053, (q31_t)0x83325e97, (q31_t)0x1c676ff8, (q31_t)0x8330f981, (q31_t)0x1c614f8b, (q31_t)0x832f94b8, (q31_t)0x1c5b2f0c, (q31_t)0x832e303c,
+ (q31_t)0x1c550e7c, (q31_t)0x832ccc0d, (q31_t)0x1c4eedda, (q31_t)0x832b682b, (q31_t)0x1c48cd27, (q31_t)0x832a0496, (q31_t)0x1c42ac62, (q31_t)0x8328a14d,
+ (q31_t)0x1c3c8b8c, (q31_t)0x83273e52, (q31_t)0x1c366aa5, (q31_t)0x8325dba4, (q31_t)0x1c3049ac, (q31_t)0x83247943, (q31_t)0x1c2a28a2, (q31_t)0x8323172f,
+ (q31_t)0x1c240786, (q31_t)0x8321b568, (q31_t)0x1c1de659, (q31_t)0x832053ee, (q31_t)0x1c17c51b, (q31_t)0x831ef2c1, (q31_t)0x1c11a3cb, (q31_t)0x831d91e1,
+ (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1c0560f8, (q31_t)0x831ad109, (q31_t)0x1bff3f75, (q31_t)0x83197110, (q31_t)0x1bf91de0, (q31_t)0x83181164,
+ (q31_t)0x1bf2fc3a, (q31_t)0x8316b205, (q31_t)0x1becda83, (q31_t)0x831552f4, (q31_t)0x1be6b8ba, (q31_t)0x8313f42f, (q31_t)0x1be096e0, (q31_t)0x831295b7,
+ (q31_t)0x1bda74f6, (q31_t)0x8311378d, (q31_t)0x1bd452f9, (q31_t)0x830fd9af, (q31_t)0x1bce30ec, (q31_t)0x830e7c1f, (q31_t)0x1bc80ece, (q31_t)0x830d1edc,
+ (q31_t)0x1bc1ec9e, (q31_t)0x830bc1e6, (q31_t)0x1bbbca5e, (q31_t)0x830a653c, (q31_t)0x1bb5a80c, (q31_t)0x830908e0, (q31_t)0x1baf85a9, (q31_t)0x8307acd1,
+ (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1ba340b0, (q31_t)0x8304f59b, (q31_t)0x1b9d1e1a, (q31_t)0x83039a73, (q31_t)0x1b96fb73, (q31_t)0x83023f98,
+ (q31_t)0x1b90d8bb, (q31_t)0x8300e50b, (q31_t)0x1b8ab5f2, (q31_t)0x82ff8acb, (q31_t)0x1b849317, (q31_t)0x82fe30d7, (q31_t)0x1b7e702c, (q31_t)0x82fcd731,
+ (q31_t)0x1b784d30, (q31_t)0x82fb7dd8, (q31_t)0x1b722a23, (q31_t)0x82fa24cc, (q31_t)0x1b6c0705, (q31_t)0x82f8cc0d, (q31_t)0x1b65e3d7, (q31_t)0x82f7739c,
+ (q31_t)0x1b5fc097, (q31_t)0x82f61b77, (q31_t)0x1b599d46, (q31_t)0x82f4c3a0, (q31_t)0x1b5379e5, (q31_t)0x82f36c15, (q31_t)0x1b4d5672, (q31_t)0x82f214d8,
+ (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1b410f5b, (q31_t)0x82ef6745, (q31_t)0x1b3aebb6, (q31_t)0x82ee10ef, (q31_t)0x1b34c801, (q31_t)0x82ecbae7,
+ (q31_t)0x1b2ea43a, (q31_t)0x82eb652b, (q31_t)0x1b288063, (q31_t)0x82ea0fbd, (q31_t)0x1b225c7b, (q31_t)0x82e8ba9c, (q31_t)0x1b1c3883, (q31_t)0x82e765c8,
+ (q31_t)0x1b161479, (q31_t)0x82e61141, (q31_t)0x1b0ff05f, (q31_t)0x82e4bd07, (q31_t)0x1b09cc34, (q31_t)0x82e3691b, (q31_t)0x1b03a7f9, (q31_t)0x82e2157c,
+ (q31_t)0x1afd83ad, (q31_t)0x82e0c22a, (q31_t)0x1af75f50, (q31_t)0x82df6f25, (q31_t)0x1af13ae3, (q31_t)0x82de1c6d, (q31_t)0x1aeb1665, (q31_t)0x82dcca02,
+ (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5, (q31_t)0x1adecd37, (q31_t)0x82da2615, (q31_t)0x1ad8a887, (q31_t)0x82d8d492, (q31_t)0x1ad283c7, (q31_t)0x82d7835c,
+ (q31_t)0x1acc5ef6, (q31_t)0x82d63274, (q31_t)0x1ac63a14, (q31_t)0x82d4e1d8, (q31_t)0x1ac01522, (q31_t)0x82d3918a, (q31_t)0x1ab9f020, (q31_t)0x82d24189,
+ (q31_t)0x1ab3cb0d, (q31_t)0x82d0f1d5, (q31_t)0x1aada5e9, (q31_t)0x82cfa26f, (q31_t)0x1aa780b6, (q31_t)0x82ce5356, (q31_t)0x1aa15b71, (q31_t)0x82cd048a,
+ (q31_t)0x1a9b361d, (q31_t)0x82cbb60b, (q31_t)0x1a9510b7, (q31_t)0x82ca67d9, (q31_t)0x1a8eeb42, (q31_t)0x82c919f5, (q31_t)0x1a88c5bc, (q31_t)0x82c7cc5e,
+ (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a7c7a7f, (q31_t)0x82c53217, (q31_t)0x1a7654c8, (q31_t)0x82c3e568, (q31_t)0x1a702f01, (q31_t)0x82c29906,
+ (q31_t)0x1a6a0929, (q31_t)0x82c14cf1, (q31_t)0x1a63e341, (q31_t)0x82c00129, (q31_t)0x1a5dbd49, (q31_t)0x82beb5af, (q31_t)0x1a579741, (q31_t)0x82bd6a82,
+ (q31_t)0x1a517128, (q31_t)0x82bc1fa2, (q31_t)0x1a4b4aff, (q31_t)0x82bad50f, (q31_t)0x1a4524c6, (q31_t)0x82b98aca, (q31_t)0x1a3efe7c, (q31_t)0x82b840d2,
+ (q31_t)0x1a38d823, (q31_t)0x82b6f727, (q31_t)0x1a32b1b9, (q31_t)0x82b5adca, (q31_t)0x1a2c8b3f, (q31_t)0x82b464ba, (q31_t)0x1a2664b5, (q31_t)0x82b31bf7,
+ (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x1a1a1771, (q31_t)0x82b08b59, (q31_t)0x1a13f0b6, (q31_t)0x82af437e, (q31_t)0x1a0dc9ec, (q31_t)0x82adfbf0,
+ (q31_t)0x1a07a311, (q31_t)0x82acb4b0, (q31_t)0x1a017c27, (q31_t)0x82ab6dbd, (q31_t)0x19fb552c, (q31_t)0x82aa2717, (q31_t)0x19f52e22, (q31_t)0x82a8e0bf,
+ (q31_t)0x19ef0707, (q31_t)0x82a79ab3, (q31_t)0x19e8dfdc, (q31_t)0x82a654f6, (q31_t)0x19e2b8a2, (q31_t)0x82a50f85, (q31_t)0x19dc9157, (q31_t)0x82a3ca62,
+ (q31_t)0x19d669fc, (q31_t)0x82a2858c, (q31_t)0x19d04292, (q31_t)0x82a14104, (q31_t)0x19ca1b17, (q31_t)0x829ffcc8, (q31_t)0x19c3f38d, (q31_t)0x829eb8db,
+ (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x19b7a449, (q31_t)0x829c31e7, (q31_t)0x19b17c8f, (q31_t)0x829aeee1, (q31_t)0x19ab54c5, (q31_t)0x8299ac29,
+ (q31_t)0x19a52ceb, (q31_t)0x829869be, (q31_t)0x199f0502, (q31_t)0x829727a0, (q31_t)0x1998dd09, (q31_t)0x8295e5cf, (q31_t)0x1992b4ff, (q31_t)0x8294a44c,
+ (q31_t)0x198c8ce7, (q31_t)0x82936317, (q31_t)0x198664be, (q31_t)0x8292222e, (q31_t)0x19803c86, (q31_t)0x8290e194, (q31_t)0x197a143e, (q31_t)0x828fa146,
+ (q31_t)0x1973ebe6, (q31_t)0x828e6146, (q31_t)0x196dc37e, (q31_t)0x828d2193, (q31_t)0x19679b07, (q31_t)0x828be22e, (q31_t)0x19617280, (q31_t)0x828aa316,
+ (q31_t)0x195b49ea, (q31_t)0x8289644b, (q31_t)0x19552144, (q31_t)0x828825ce, (q31_t)0x194ef88e, (q31_t)0x8286e79e, (q31_t)0x1948cfc8, (q31_t)0x8285a9bb,
+ (q31_t)0x1942a6f3, (q31_t)0x82846c26, (q31_t)0x193c7e0f, (q31_t)0x82832edf, (q31_t)0x1936551b, (q31_t)0x8281f1e4, (q31_t)0x19302c17, (q31_t)0x8280b538,
+ (q31_t)0x192a0304, (q31_t)0x827f78d8, (q31_t)0x1923d9e1, (q31_t)0x827e3cc6, (q31_t)0x191db0af, (q31_t)0x827d0102, (q31_t)0x1917876d, (q31_t)0x827bc58a,
+ (q31_t)0x19115e1c, (q31_t)0x827a8a61, (q31_t)0x190b34bb, (q31_t)0x82794f84, (q31_t)0x19050b4b, (q31_t)0x827814f6, (q31_t)0x18fee1cb, (q31_t)0x8276dab4,
+ (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18f28e9e, (q31_t)0x8274671a, (q31_t)0x18ec64f0, (q31_t)0x82732dc0, (q31_t)0x18e63b33, (q31_t)0x8271f4b5,
+ (q31_t)0x18e01167, (q31_t)0x8270bbf7, (q31_t)0x18d9e78b, (q31_t)0x826f8386, (q31_t)0x18d3bda0, (q31_t)0x826e4b62, (q31_t)0x18cd93a5, (q31_t)0x826d138d,
+ (q31_t)0x18c7699b, (q31_t)0x826bdc04, (q31_t)0x18c13f82, (q31_t)0x826aa4c9, (q31_t)0x18bb155a, (q31_t)0x82696ddc, (q31_t)0x18b4eb22, (q31_t)0x8268373c,
+ (q31_t)0x18aec0db, (q31_t)0x826700e9, (q31_t)0x18a89685, (q31_t)0x8265cae4, (q31_t)0x18a26c20, (q31_t)0x8264952d, (q31_t)0x189c41ab, (q31_t)0x82635fc2,
+ (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x188fec95, (q31_t)0x8260f5d7, (q31_t)0x1889c1f3, (q31_t)0x825fc155, (q31_t)0x18839742, (q31_t)0x825e8d21,
+ (q31_t)0x187d6c82, (q31_t)0x825d593a, (q31_t)0x187741b2, (q31_t)0x825c25a1, (q31_t)0x187116d4, (q31_t)0x825af255, (q31_t)0x186aebe6, (q31_t)0x8259bf57,
+ (q31_t)0x1864c0ea, (q31_t)0x82588ca7, (q31_t)0x185e95de, (q31_t)0x82575a44, (q31_t)0x18586ac3, (q31_t)0x8256282e, (q31_t)0x18523f9a, (q31_t)0x8254f666,
+ (q31_t)0x184c1461, (q31_t)0x8253c4eb, (q31_t)0x1845e919, (q31_t)0x825293be, (q31_t)0x183fbdc3, (q31_t)0x825162df, (q31_t)0x1839925d, (q31_t)0x8250324d,
+ (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x182d3b65, (q31_t)0x824dd211, (q31_t)0x18270fd3, (q31_t)0x824ca268, (q31_t)0x1820e431, (q31_t)0x824b730c,
+ (q31_t)0x181ab881, (q31_t)0x824a43fe, (q31_t)0x18148cc2, (q31_t)0x8249153d, (q31_t)0x180e60f4, (q31_t)0x8247e6ca, (q31_t)0x18083518, (q31_t)0x8246b8a4,
+ (q31_t)0x1802092c, (q31_t)0x82458acc, (q31_t)0x17fbdd32, (q31_t)0x82445d41, (q31_t)0x17f5b129, (q31_t)0x82433004, (q31_t)0x17ef8511, (q31_t)0x82420315,
+ (q31_t)0x17e958ea, (q31_t)0x8240d673, (q31_t)0x17e32cb5, (q31_t)0x823faa1e, (q31_t)0x17dd0070, (q31_t)0x823e7e18, (q31_t)0x17d6d41d, (q31_t)0x823d525e,
+ (q31_t)0x17d0a7bc, (q31_t)0x823c26f3, (q31_t)0x17ca7b4c, (q31_t)0x823afbd5, (q31_t)0x17c44ecd, (q31_t)0x8239d104, (q31_t)0x17be223f, (q31_t)0x8238a681,
+ (q31_t)0x17b7f5a3, (q31_t)0x82377c4c, (q31_t)0x17b1c8f8, (q31_t)0x82365264, (q31_t)0x17ab9c3e, (q31_t)0x823528ca, (q31_t)0x17a56f76, (q31_t)0x8233ff7e,
+ (q31_t)0x179f429f, (q31_t)0x8232d67f, (q31_t)0x179915ba, (q31_t)0x8231adce, (q31_t)0x1792e8c6, (q31_t)0x8230856a, (q31_t)0x178cbbc4, (q31_t)0x822f5d54,
+ (q31_t)0x17868eb3, (q31_t)0x822e358b, (q31_t)0x17806194, (q31_t)0x822d0e10, (q31_t)0x177a3466, (q31_t)0x822be6e3, (q31_t)0x17740729, (q31_t)0x822ac004,
+ (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x1767ac85, (q31_t)0x8228732d, (q31_t)0x17617f1d, (q31_t)0x82274d36, (q31_t)0x175b51a7, (q31_t)0x8226278d,
+ (q31_t)0x17552422, (q31_t)0x82250232, (q31_t)0x174ef68f, (q31_t)0x8223dd24, (q31_t)0x1748c8ee, (q31_t)0x8222b863, (q31_t)0x17429b3e, (q31_t)0x822193f1,
+ (q31_t)0x173c6d80, (q31_t)0x82206fcc, (q31_t)0x17363fb4, (q31_t)0x821f4bf5, (q31_t)0x173011d9, (q31_t)0x821e286b, (q31_t)0x1729e3f0, (q31_t)0x821d052f,
+ (q31_t)0x1723b5f9, (q31_t)0x821be240, (q31_t)0x171d87f3, (q31_t)0x821abfa0, (q31_t)0x171759df, (q31_t)0x82199d4d, (q31_t)0x17112bbd, (q31_t)0x82187b47,
+ (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x1704cf4f, (q31_t)0x82163826, (q31_t)0x16fea102, (q31_t)0x82151709, (q31_t)0x16f872a7, (q31_t)0x8213f63a,
+ (q31_t)0x16f2443e, (q31_t)0x8212d5b9, (q31_t)0x16ec15c7, (q31_t)0x8211b586, (q31_t)0x16e5e741, (q31_t)0x821095a0, (q31_t)0x16dfb8ae, (q31_t)0x820f7608,
+ (q31_t)0x16d98a0c, (q31_t)0x820e56be, (q31_t)0x16d35b5c, (q31_t)0x820d37c1, (q31_t)0x16cd2c9f, (q31_t)0x820c1912, (q31_t)0x16c6fdd3, (q31_t)0x820afab1,
+ (q31_t)0x16c0cef9, (q31_t)0x8209dc9e, (q31_t)0x16baa011, (q31_t)0x8208bed8, (q31_t)0x16b4711b, (q31_t)0x8207a160, (q31_t)0x16ae4217, (q31_t)0x82068435,
+ (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x16a1e3e5, (q31_t)0x82044ac9, (q31_t)0x169bb4b7, (q31_t)0x82032e88, (q31_t)0x1695857b, (q31_t)0x82021294,
+ (q31_t)0x168f5632, (q31_t)0x8200f6ef, (q31_t)0x168926da, (q31_t)0x81ffdb96, (q31_t)0x1682f774, (q31_t)0x81fec08c, (q31_t)0x167cc801, (q31_t)0x81fda5cf,
+ (q31_t)0x1676987f, (q31_t)0x81fc8b60, (q31_t)0x167068f0, (q31_t)0x81fb713f, (q31_t)0x166a3953, (q31_t)0x81fa576c, (q31_t)0x166409a8, (q31_t)0x81f93de6,
+ (q31_t)0x165dd9f0, (q31_t)0x81f824ae, (q31_t)0x1657aa29, (q31_t)0x81f70bc3, (q31_t)0x16517a55, (q31_t)0x81f5f327, (q31_t)0x164b4a73, (q31_t)0x81f4dad8,
+ (q31_t)0x16451a83, (q31_t)0x81f3c2d7, (q31_t)0x163eea86, (q31_t)0x81f2ab24, (q31_t)0x1638ba7a, (q31_t)0x81f193be, (q31_t)0x16328a61, (q31_t)0x81f07ca6,
+ (q31_t)0x162c5a3b, (q31_t)0x81ef65dc, (q31_t)0x16262a06, (q31_t)0x81ee4f60, (q31_t)0x161ff9c4, (q31_t)0x81ed3932, (q31_t)0x1619c975, (q31_t)0x81ec2351,
+ (q31_t)0x16139918, (q31_t)0x81eb0dbe, (q31_t)0x160d68ad, (q31_t)0x81e9f879, (q31_t)0x16073834, (q31_t)0x81e8e381, (q31_t)0x160107ae, (q31_t)0x81e7ced8,
+ (q31_t)0x15fad71b, (q31_t)0x81e6ba7c, (q31_t)0x15f4a679, (q31_t)0x81e5a66e, (q31_t)0x15ee75cb, (q31_t)0x81e492ad, (q31_t)0x15e8450e, (q31_t)0x81e37f3b,
+ (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x15dbe36d, (q31_t)0x81e1593f, (q31_t)0x15d5b288, (q31_t)0x81e046b6, (q31_t)0x15cf8196, (q31_t)0x81df347b,
+ (q31_t)0x15c95097, (q31_t)0x81de228d, (q31_t)0x15c31f89, (q31_t)0x81dd10ee, (q31_t)0x15bcee6f, (q31_t)0x81dbff9c, (q31_t)0x15b6bd47, (q31_t)0x81daee98,
+ (q31_t)0x15b08c12, (q31_t)0x81d9dde1, (q31_t)0x15aa5acf, (q31_t)0x81d8cd79, (q31_t)0x15a4297f, (q31_t)0x81d7bd5e, (q31_t)0x159df821, (q31_t)0x81d6ad92,
+ (q31_t)0x1597c6b7, (q31_t)0x81d59e13, (q31_t)0x1591953e, (q31_t)0x81d48ee1, (q31_t)0x158b63b9, (q31_t)0x81d37ffe, (q31_t)0x15853226, (q31_t)0x81d27169,
+ (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x1578ced9, (q31_t)0x81d05527, (q31_t)0x15729d1f, (q31_t)0x81cf477b, (q31_t)0x156c6b57, (q31_t)0x81ce3a1d,
+ (q31_t)0x15663982, (q31_t)0x81cd2d0c, (q31_t)0x156007a0, (q31_t)0x81cc204a, (q31_t)0x1559d5b1, (q31_t)0x81cb13d5, (q31_t)0x1553a3b4, (q31_t)0x81ca07af,
+ (q31_t)0x154d71aa, (q31_t)0x81c8fbd6, (q31_t)0x15473f94, (q31_t)0x81c7f04b, (q31_t)0x15410d70, (q31_t)0x81c6e50d, (q31_t)0x153adb3f, (q31_t)0x81c5da1e,
+ (q31_t)0x1534a901, (q31_t)0x81c4cf7d, (q31_t)0x152e76b5, (q31_t)0x81c3c529, (q31_t)0x1528445d, (q31_t)0x81c2bb23, (q31_t)0x152211f8, (q31_t)0x81c1b16b,
+ (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x1515ad06, (q31_t)0x81bf9ee5, (q31_t)0x150f7a7a, (q31_t)0x81be9617, (q31_t)0x150947e1, (q31_t)0x81bd8d97,
+ (q31_t)0x1503153a, (q31_t)0x81bc8564, (q31_t)0x14fce287, (q31_t)0x81bb7d7f, (q31_t)0x14f6afc7, (q31_t)0x81ba75e9, (q31_t)0x14f07cf9, (q31_t)0x81b96ea0,
+ (q31_t)0x14ea4a1f, (q31_t)0x81b867a5, (q31_t)0x14e41738, (q31_t)0x81b760f8, (q31_t)0x14dde445, (q31_t)0x81b65a99, (q31_t)0x14d7b144, (q31_t)0x81b55488,
+ (q31_t)0x14d17e36, (q31_t)0x81b44ec4, (q31_t)0x14cb4b1c, (q31_t)0x81b3494f, (q31_t)0x14c517f4, (q31_t)0x81b24427, (q31_t)0x14bee4c0, (q31_t)0x81b13f4e,
+ (q31_t)0x14b8b17f, (q31_t)0x81b03ac2, (q31_t)0x14b27e32, (q31_t)0x81af3684, (q31_t)0x14ac4ad7, (q31_t)0x81ae3294, (q31_t)0x14a61770, (q31_t)0x81ad2ef2,
+ (q31_t)0x149fe3fc, (q31_t)0x81ac2b9e, (q31_t)0x1499b07c, (q31_t)0x81ab2898, (q31_t)0x14937cee, (q31_t)0x81aa25e0, (q31_t)0x148d4954, (q31_t)0x81a92376,
+ (q31_t)0x148715ae, (q31_t)0x81a82159, (q31_t)0x1480e1fa, (q31_t)0x81a71f8b, (q31_t)0x147aae3a, (q31_t)0x81a61e0b, (q31_t)0x14747a6d, (q31_t)0x81a51cd8,
+ (q31_t)0x146e4694, (q31_t)0x81a41bf4, (q31_t)0x146812ae, (q31_t)0x81a31b5d, (q31_t)0x1461debc, (q31_t)0x81a21b14, (q31_t)0x145baabd, (q31_t)0x81a11b1a,
+ (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x144f4299, (q31_t)0x819f1c0e, (q31_t)0x14490e74, (q31_t)0x819e1cfd, (q31_t)0x1442da43, (q31_t)0x819d1e3a,
+ (q31_t)0x143ca605, (q31_t)0x819c1fc5, (q31_t)0x143671bb, (q31_t)0x819b219e, (q31_t)0x14303d65, (q31_t)0x819a23c5, (q31_t)0x142a0902, (q31_t)0x8199263a,
+ (q31_t)0x1423d492, (q31_t)0x819828fd, (q31_t)0x141da016, (q31_t)0x81972c0e, (q31_t)0x14176b8e, (q31_t)0x81962f6d, (q31_t)0x141136f9, (q31_t)0x8195331a,
+ (q31_t)0x140b0258, (q31_t)0x81943715, (q31_t)0x1404cdaa, (q31_t)0x81933b5e, (q31_t)0x13fe98f1, (q31_t)0x81923ff4, (q31_t)0x13f8642a, (q31_t)0x819144d9,
+ (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x13ebfa79, (q31_t)0x818f4f8d, (q31_t)0x13e5c58e, (q31_t)0x818e555c, (q31_t)0x13df9097, (q31_t)0x818d5b78,
+ (q31_t)0x13d95b93, (q31_t)0x818c61e3, (q31_t)0x13d32683, (q31_t)0x818b689c, (q31_t)0x13ccf167, (q31_t)0x818a6fa3, (q31_t)0x13c6bc3f, (q31_t)0x818976f8,
+ (q31_t)0x13c0870a, (q31_t)0x81887e9a, (q31_t)0x13ba51ca, (q31_t)0x8187868b, (q31_t)0x13b41c7d, (q31_t)0x81868eca, (q31_t)0x13ade724, (q31_t)0x81859757,
+ (q31_t)0x13a7b1bf, (q31_t)0x8184a032, (q31_t)0x13a17c4d, (q31_t)0x8183a95b, (q31_t)0x139b46d0, (q31_t)0x8182b2d1, (q31_t)0x13951146, (q31_t)0x8181bc96,
+ (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x1388a60f, (q31_t)0x817fd10a, (q31_t)0x13827062, (q31_t)0x817edbb9, (q31_t)0x137c3aa8, (q31_t)0x817de6b6,
+ (q31_t)0x137604e2, (q31_t)0x817cf201, (q31_t)0x136fcf10, (q31_t)0x817bfd9b, (q31_t)0x13699933, (q31_t)0x817b0982, (q31_t)0x13636349, (q31_t)0x817a15b7,
+ (q31_t)0x135d2d53, (q31_t)0x8179223a, (q31_t)0x1356f752, (q31_t)0x81782f0b, (q31_t)0x1350c144, (q31_t)0x81773c2b, (q31_t)0x134a8b2b, (q31_t)0x81764998,
+ (q31_t)0x13445505, (q31_t)0x81755754, (q31_t)0x133e1ed4, (q31_t)0x8174655d, (q31_t)0x1337e897, (q31_t)0x817373b5, (q31_t)0x1331b24e, (q31_t)0x8172825a,
+ (q31_t)0x132b7bf9, (q31_t)0x8171914e, (q31_t)0x13254599, (q31_t)0x8170a090, (q31_t)0x131f0f2c, (q31_t)0x816fb020, (q31_t)0x1318d8b4, (q31_t)0x816ebffe,
+ (q31_t)0x1312a230, (q31_t)0x816dd02a, (q31_t)0x130c6ba0, (q31_t)0x816ce0a4, (q31_t)0x13063505, (q31_t)0x816bf16c, (q31_t)0x12fffe5d, (q31_t)0x816b0282,
+ (q31_t)0x12f9c7aa, (q31_t)0x816a13e6, (q31_t)0x12f390ec, (q31_t)0x81692599, (q31_t)0x12ed5a21, (q31_t)0x81683799, (q31_t)0x12e7234b, (q31_t)0x816749e8,
+ (q31_t)0x12e0ec6a, (q31_t)0x81665c84, (q31_t)0x12dab57c, (q31_t)0x81656f6f, (q31_t)0x12d47e83, (q31_t)0x816482a8, (q31_t)0x12ce477f, (q31_t)0x8163962f,
+ (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x12c1d953, (q31_t)0x8161be27, (q31_t)0x12bba22b, (q31_t)0x8160d298, (q31_t)0x12b56af9, (q31_t)0x815fe758,
+ (q31_t)0x12af33ba, (q31_t)0x815efc65, (q31_t)0x12a8fc70, (q31_t)0x815e11c1, (q31_t)0x12a2c51b, (q31_t)0x815d276a, (q31_t)0x129c8dba, (q31_t)0x815c3d62,
+ (q31_t)0x1296564d, (q31_t)0x815b53a8, (q31_t)0x12901ed5, (q31_t)0x815a6a3c, (q31_t)0x1289e752, (q31_t)0x8159811e, (q31_t)0x1283afc3, (q31_t)0x8158984e,
+ (q31_t)0x127d7829, (q31_t)0x8157afcd, (q31_t)0x12774083, (q31_t)0x8156c799, (q31_t)0x127108d2, (q31_t)0x8155dfb4, (q31_t)0x126ad116, (q31_t)0x8154f81d,
+ (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x125e617b, (q31_t)0x815329d9, (q31_t)0x1258299c, (q31_t)0x8152432c, (q31_t)0x1251f1b3, (q31_t)0x81515ccd,
+ (q31_t)0x124bb9be, (q31_t)0x815076bd, (q31_t)0x124581bd, (q31_t)0x814f90fb, (q31_t)0x123f49b2, (q31_t)0x814eab86, (q31_t)0x1239119b, (q31_t)0x814dc660,
+ (q31_t)0x1232d979, (q31_t)0x814ce188, (q31_t)0x122ca14b, (q31_t)0x814bfcff, (q31_t)0x12266913, (q31_t)0x814b18c3, (q31_t)0x122030cf, (q31_t)0x814a34d6,
+ (q31_t)0x1219f880, (q31_t)0x81495136, (q31_t)0x1213c026, (q31_t)0x81486de5, (q31_t)0x120d87c1, (q31_t)0x81478ae2, (q31_t)0x12074f50, (q31_t)0x8146a82e,
+ (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x11fade4e, (q31_t)0x8144e3ae, (q31_t)0x11f4a5bd, (q31_t)0x814401e4, (q31_t)0x11ee6d20, (q31_t)0x81432068,
+ (q31_t)0x11e83478, (q31_t)0x81423f3a, (q31_t)0x11e1fbc5, (q31_t)0x81415e5a, (q31_t)0x11dbc307, (q31_t)0x81407dc9, (q31_t)0x11d58a3e, (q31_t)0x813f9d86,
+ (q31_t)0x11cf516a, (q31_t)0x813ebd90, (q31_t)0x11c9188b, (q31_t)0x813ddde9, (q31_t)0x11c2dfa2, (q31_t)0x813cfe91, (q31_t)0x11bca6ad, (q31_t)0x813c1f86,
+ (q31_t)0x11b66dad, (q31_t)0x813b40ca, (q31_t)0x11b034a2, (q31_t)0x813a625b, (q31_t)0x11a9fb8d, (q31_t)0x8139843b, (q31_t)0x11a3c26c, (q31_t)0x8138a66a,
+ (q31_t)0x119d8941, (q31_t)0x8137c8e6, (q31_t)0x1197500a, (q31_t)0x8136ebb1, (q31_t)0x119116c9, (q31_t)0x81360ec9, (q31_t)0x118add7d, (q31_t)0x81353230,
+ (q31_t)0x1184a427, (q31_t)0x813455e6, (q31_t)0x117e6ac5, (q31_t)0x813379e9, (q31_t)0x11783159, (q31_t)0x81329e3b, (q31_t)0x1171f7e2, (q31_t)0x8131c2db,
+ (q31_t)0x116bbe60, (q31_t)0x8130e7c9, (q31_t)0x116584d3, (q31_t)0x81300d05, (q31_t)0x115f4b3c, (q31_t)0x812f3290, (q31_t)0x1159119a, (q31_t)0x812e5868,
+ (q31_t)0x1152d7ed, (q31_t)0x812d7e8f, (q31_t)0x114c9e35, (q31_t)0x812ca505, (q31_t)0x11466473, (q31_t)0x812bcbc8, (q31_t)0x11402aa6, (q31_t)0x812af2da,
+ (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x1133b6ed, (q31_t)0x812941e8, (q31_t)0x112d7d00, (q31_t)0x812869e4, (q31_t)0x11274309, (q31_t)0x8127922f,
+ (q31_t)0x11210907, (q31_t)0x8126bac8, (q31_t)0x111acefb, (q31_t)0x8125e3af, (q31_t)0x111494e4, (q31_t)0x81250ce4, (q31_t)0x110e5ac2, (q31_t)0x81243668,
+ (q31_t)0x11082096, (q31_t)0x8123603a, (q31_t)0x1101e65f, (q31_t)0x81228a5a, (q31_t)0x10fbac1e, (q31_t)0x8121b4c8, (q31_t)0x10f571d3, (q31_t)0x8120df85,
+ (q31_t)0x10ef377d, (q31_t)0x81200a90, (q31_t)0x10e8fd1c, (q31_t)0x811f35e9, (q31_t)0x10e2c2b2, (q31_t)0x811e6191, (q31_t)0x10dc883c, (q31_t)0x811d8d86,
+ (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x10d01333, (q31_t)0x811be65d, (q31_t)0x10c9d89e, (q31_t)0x811b133d, (q31_t)0x10c39dff, (q31_t)0x811a406c,
+ (q31_t)0x10bd6356, (q31_t)0x81196de9, (q31_t)0x10b728a3, (q31_t)0x81189bb4, (q31_t)0x10b0ede5, (q31_t)0x8117c9ce, (q31_t)0x10aab31d, (q31_t)0x8116f836,
+ (q31_t)0x10a4784b, (q31_t)0x811626ec, (q31_t)0x109e3d6e, (q31_t)0x811555f1, (q31_t)0x10980287, (q31_t)0x81148544, (q31_t)0x1091c796, (q31_t)0x8113b4e5,
+ (q31_t)0x108b8c9b, (q31_t)0x8112e4d4, (q31_t)0x10855195, (q31_t)0x81121512, (q31_t)0x107f1686, (q31_t)0x8111459e, (q31_t)0x1078db6c, (q31_t)0x81107678,
+ (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x106c651a, (q31_t)0x810ed917, (q31_t)0x106629e1, (q31_t)0x810e0adc, (q31_t)0x105fee9f, (q31_t)0x810d3cf0,
+ (q31_t)0x1059b352, (q31_t)0x810c6f52, (q31_t)0x105377fc, (q31_t)0x810ba202, (q31_t)0x104d3c9b, (q31_t)0x810ad500, (q31_t)0x10470130, (q31_t)0x810a084d,
+ (q31_t)0x1040c5bb, (q31_t)0x81093be8, (q31_t)0x103a8a3d, (q31_t)0x81086fd1, (q31_t)0x10344eb4, (q31_t)0x8107a409, (q31_t)0x102e1321, (q31_t)0x8106d88f,
+ (q31_t)0x1027d784, (q31_t)0x81060d63, (q31_t)0x10219bdd, (q31_t)0x81054286, (q31_t)0x101b602d, (q31_t)0x810477f7, (q31_t)0x10152472, (q31_t)0x8103adb6,
+ (q31_t)0x100ee8ad, (q31_t)0x8102e3c4, (q31_t)0x1008acdf, (q31_t)0x81021a20, (q31_t)0x10027107, (q31_t)0x810150ca, (q31_t)0xffc3524, (q31_t)0x810087c3,
+ (q31_t)0xff5f938, (q31_t)0x80ffbf0a, (q31_t)0xfefbd42, (q31_t)0x80fef69f, (q31_t)0xfe98143, (q31_t)0x80fe2e83, (q31_t)0xfe34539, (q31_t)0x80fd66b5,
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+ (q31_t)0xf7942c7, (q31_t)0x80f050db, (q31_t)0xf73060f, (q31_t)0x80ef8e90, (q31_t)0xf6cc94e, (q31_t)0x80eecc93, (q31_t)0xf668c83, (q31_t)0x80ee0ae4,
+ (q31_t)0xf604faf, (q31_t)0x80ed4984, (q31_t)0xf5a12d1, (q31_t)0x80ec8872, (q31_t)0xf53d5ea, (q31_t)0x80ebc7ae, (q31_t)0xf4d98f9, (q31_t)0x80eb0739,
+ (q31_t)0xf475bff, (q31_t)0x80ea4712, (q31_t)0xf411efb, (q31_t)0x80e9873a, (q31_t)0xf3ae1ee, (q31_t)0x80e8c7b0, (q31_t)0xf34a4d8, (q31_t)0x80e80874,
+ (q31_t)0xf2e67b8, (q31_t)0x80e74987, (q31_t)0xf282a8f, (q31_t)0x80e68ae8, (q31_t)0xf21ed5d, (q31_t)0x80e5cc98, (q31_t)0xf1bb021, (q31_t)0x80e50e96,
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+ (q31_t)0xefc7d6b, (q31_t)0x80e15d24, (q31_t)0xef63ff7, (q31_t)0x80e0a0f8, (q31_t)0xef0027b, (q31_t)0x80dfe51b, (q31_t)0xee9c4f5, (q31_t)0x80df298c,
+ (q31_t)0xee38766, (q31_t)0x80de6e4c, (q31_t)0xedd49ce, (q31_t)0x80ddb35a, (q31_t)0xed70c2c, (q31_t)0x80dcf8b7, (q31_t)0xed0ce82, (q31_t)0x80dc3e62,
+ (q31_t)0xeca90ce, (q31_t)0x80db845b, (q31_t)0xec45311, (q31_t)0x80dacaa3, (q31_t)0xebe154b, (q31_t)0x80da1139, (q31_t)0xeb7d77c, (q31_t)0x80d9581e,
+ (q31_t)0xeb199a4, (q31_t)0x80d89f51, (q31_t)0xeab5bc3, (q31_t)0x80d7e6d3, (q31_t)0xea51dd8, (q31_t)0x80d72ea3, (q31_t)0xe9edfe5, (q31_t)0x80d676c1,
+ (q31_t)0xe98a1e9, (q31_t)0x80d5bf2e, (q31_t)0xe9263e3, (q31_t)0x80d507e9, (q31_t)0xe8c25d5, (q31_t)0x80d450f3, (q31_t)0xe85e7be, (q31_t)0x80d39a4b,
+ (q31_t)0xe7fa99e, (q31_t)0x80d2e3f2, (q31_t)0xe796b74, (q31_t)0x80d22de7, (q31_t)0xe732d42, (q31_t)0x80d1782a, (q31_t)0xe6cef07, (q31_t)0x80d0c2bc,
+ (q31_t)0xe66b0c3, (q31_t)0x80d00d9d, (q31_t)0xe607277, (q31_t)0x80cf58cc, (q31_t)0xe5a3421, (q31_t)0x80cea449, (q31_t)0xe53f5c2, (q31_t)0x80cdf015,
+ (q31_t)0xe4db75b, (q31_t)0x80cd3c2f, (q31_t)0xe4778eb, (q31_t)0x80cc8898, (q31_t)0xe413a72, (q31_t)0x80cbd54f, (q31_t)0xe3afbf0, (q31_t)0x80cb2255,
+ (q31_t)0xe34bd66, (q31_t)0x80ca6fa9, (q31_t)0xe2e7ed2, (q31_t)0x80c9bd4c, (q31_t)0xe284036, (q31_t)0x80c90b3d, (q31_t)0xe220191, (q31_t)0x80c8597c,
+ (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a, (q31_t)0xe15842e, (q31_t)0x80c6f6e7, (q31_t)0xe0f456f, (q31_t)0x80c64612, (q31_t)0xe0906a7, (q31_t)0x80c5958b,
+ (q31_t)0xe02c7d7, (q31_t)0x80c4e553, (q31_t)0xdfc88fe, (q31_t)0x80c4356a, (q31_t)0xdf64a1c, (q31_t)0x80c385cf, (q31_t)0xdf00b32, (q31_t)0x80c2d682,
+ (q31_t)0xde9cc40, (q31_t)0x80c22784, (q31_t)0xde38d44, (q31_t)0x80c178d4, (q31_t)0xddd4e40, (q31_t)0x80c0ca73, (q31_t)0xdd70f34, (q31_t)0x80c01c60,
+ (q31_t)0xdd0d01f, (q31_t)0x80bf6e9c, (q31_t)0xdca9102, (q31_t)0x80bec127, (q31_t)0xdc451dc, (q31_t)0x80be13ff, (q31_t)0xdbe12ad, (q31_t)0x80bd6727,
+ (q31_t)0xdb7d376, (q31_t)0x80bcba9d, (q31_t)0xdb19437, (q31_t)0x80bc0e61, (q31_t)0xdab54ef, (q31_t)0x80bb6274, (q31_t)0xda5159f, (q31_t)0x80bab6d5,
+ (q31_t)0xd9ed646, (q31_t)0x80ba0b85, (q31_t)0xd9896e5, (q31_t)0x80b96083, (q31_t)0xd92577b, (q31_t)0x80b8b5d0, (q31_t)0xd8c1809, (q31_t)0x80b80b6c,
+ (q31_t)0xd85d88f, (q31_t)0x80b76156, (q31_t)0xd7f990c, (q31_t)0x80b6b78e, (q31_t)0xd795982, (q31_t)0x80b60e15, (q31_t)0xd7319ee, (q31_t)0x80b564ea,
+ (q31_t)0xd6cda53, (q31_t)0x80b4bc0e, (q31_t)0xd669aaf, (q31_t)0x80b41381, (q31_t)0xd605b03, (q31_t)0x80b36b42, (q31_t)0xd5a1b4f, (q31_t)0x80b2c351,
+ (q31_t)0xd53db92, (q31_t)0x80b21baf, (q31_t)0xd4d9bcd, (q31_t)0x80b1745c, (q31_t)0xd475c00, (q31_t)0x80b0cd57, (q31_t)0xd411c2b, (q31_t)0x80b026a1,
+ (q31_t)0xd3adc4e, (q31_t)0x80af8039, (q31_t)0xd349c68, (q31_t)0x80aeda20, (q31_t)0xd2e5c7b, (q31_t)0x80ae3455, (q31_t)0xd281c85, (q31_t)0x80ad8ed9,
+ (q31_t)0xd21dc87, (q31_t)0x80ace9ab, (q31_t)0xd1b9c81, (q31_t)0x80ac44cc, (q31_t)0xd155c73, (q31_t)0x80aba03b, (q31_t)0xd0f1c5d, (q31_t)0x80aafbf9,
+ (q31_t)0xd08dc3f, (q31_t)0x80aa5806, (q31_t)0xd029c18, (q31_t)0x80a9b461, (q31_t)0xcfc5bea, (q31_t)0x80a9110b, (q31_t)0xcf61bb4, (q31_t)0x80a86e03,
+ (q31_t)0xcefdb76, (q31_t)0x80a7cb49, (q31_t)0xce99b2f, (q31_t)0x80a728df, (q31_t)0xce35ae1, (q31_t)0x80a686c2, (q31_t)0xcdd1a8b, (q31_t)0x80a5e4f5,
+ (q31_t)0xcd6da2d, (q31_t)0x80a54376, (q31_t)0xcd099c7, (q31_t)0x80a4a245, (q31_t)0xcca5959, (q31_t)0x80a40163, (q31_t)0xcc418e3, (q31_t)0x80a360d0,
+ (q31_t)0xcbdd865, (q31_t)0x80a2c08b, (q31_t)0xcb797e0, (q31_t)0x80a22095, (q31_t)0xcb15752, (q31_t)0x80a180ed, (q31_t)0xcab16bd, (q31_t)0x80a0e194,
+ (q31_t)0xca4d620, (q31_t)0x80a04289, (q31_t)0xc9e957b, (q31_t)0x809fa3cd, (q31_t)0xc9854cf, (q31_t)0x809f0560, (q31_t)0xc92141a, (q31_t)0x809e6741,
+ (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xc85929a, (q31_t)0x809d2bef, (q31_t)0xc7f51cf, (q31_t)0x809c8ebc, (q31_t)0xc7910fb, (q31_t)0x809bf1d7,
+ (q31_t)0xc72d020, (q31_t)0x809b5541, (q31_t)0xc6c8f3e, (q31_t)0x809ab8fa, (q31_t)0xc664e53, (q31_t)0x809a1d01, (q31_t)0xc600d61, (q31_t)0x80998157,
+ (q31_t)0xc59cc68, (q31_t)0x8098e5fb, (q31_t)0xc538b66, (q31_t)0x80984aee, (q31_t)0xc4d4a5d, (q31_t)0x8097b030, (q31_t)0xc47094d, (q31_t)0x809715c0,
+ (q31_t)0xc40c835, (q31_t)0x80967b9f, (q31_t)0xc3a8715, (q31_t)0x8095e1cc, (q31_t)0xc3445ee, (q31_t)0x80954848, (q31_t)0xc2e04c0, (q31_t)0x8094af13,
+ (q31_t)0xc27c389, (q31_t)0x8094162c, (q31_t)0xc21824c, (q31_t)0x80937d93, (q31_t)0xc1b4107, (q31_t)0x8092e54a, (q31_t)0xc14ffba, (q31_t)0x80924d4f,
+ (q31_t)0xc0ebe66, (q31_t)0x8091b5a2, (q31_t)0xc087d0a, (q31_t)0x80911e44, (q31_t)0xc023ba7, (q31_t)0x80908735, (q31_t)0xbfbfa3d, (q31_t)0x808ff074,
+ (q31_t)0xbf5b8cb, (q31_t)0x808f5a02, (q31_t)0xbef7752, (q31_t)0x808ec3df, (q31_t)0xbe935d2, (q31_t)0x808e2e0a, (q31_t)0xbe2f44a, (q31_t)0x808d9884,
+ (q31_t)0xbdcb2bb, (q31_t)0x808d034c, (q31_t)0xbd67124, (q31_t)0x808c6e63, (q31_t)0xbd02f87, (q31_t)0x808bd9c9, (q31_t)0xbc9ede2, (q31_t)0x808b457d,
+ (q31_t)0xbc3ac35, (q31_t)0x808ab180, (q31_t)0xbbd6a82, (q31_t)0x808a1dd2, (q31_t)0xbb728c7, (q31_t)0x80898a72, (q31_t)0xbb0e705, (q31_t)0x8088f761,
+ (q31_t)0xbaaa53b, (q31_t)0x8088649e, (q31_t)0xba4636b, (q31_t)0x8087d22a, (q31_t)0xb9e2193, (q31_t)0x80874005, (q31_t)0xb97dfb5, (q31_t)0x8086ae2e,
+ (q31_t)0xb919dcf, (q31_t)0x80861ca6, (q31_t)0xb8b5be1, (q31_t)0x80858b6c, (q31_t)0xb8519ed, (q31_t)0x8084fa82, (q31_t)0xb7ed7f2, (q31_t)0x808469e5,
+ (q31_t)0xb7895f0, (q31_t)0x8083d998, (q31_t)0xb7253e6, (q31_t)0x80834999, (q31_t)0xb6c11d5, (q31_t)0x8082b9e9, (q31_t)0xb65cfbe, (q31_t)0x80822a87,
+ (q31_t)0xb5f8d9f, (q31_t)0x80819b74, (q31_t)0xb594b7a, (q31_t)0x80810cb0, (q31_t)0xb53094d, (q31_t)0x80807e3a, (q31_t)0xb4cc719, (q31_t)0x807ff013,
+ (q31_t)0xb4684df, (q31_t)0x807f623b, (q31_t)0xb40429d, (q31_t)0x807ed4b1, (q31_t)0xb3a0055, (q31_t)0x807e4776, (q31_t)0xb33be05, (q31_t)0x807dba89,
+ (q31_t)0xb2d7baf, (q31_t)0x807d2dec, (q31_t)0xb273952, (q31_t)0x807ca19c, (q31_t)0xb20f6ee, (q31_t)0x807c159c, (q31_t)0xb1ab483, (q31_t)0x807b89ea,
+ (q31_t)0xb147211, (q31_t)0x807afe87, (q31_t)0xb0e2f98, (q31_t)0x807a7373, (q31_t)0xb07ed19, (q31_t)0x8079e8ad, (q31_t)0xb01aa92, (q31_t)0x80795e36,
+ (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0xaf52571, (q31_t)0x80784a33, (q31_t)0xaeee2d7, (q31_t)0x8077c0a8, (q31_t)0xae8a036, (q31_t)0x8077376c,
+ (q31_t)0xae25d8d, (q31_t)0x8076ae7e, (q31_t)0xadc1adf, (q31_t)0x807625df, (q31_t)0xad5d829, (q31_t)0x80759d8e, (q31_t)0xacf956d, (q31_t)0x8075158c,
+ (q31_t)0xac952aa, (q31_t)0x80748dd9, (q31_t)0xac30fe1, (q31_t)0x80740675, (q31_t)0xabccd11, (q31_t)0x80737f5f, (q31_t)0xab68a3a, (q31_t)0x8072f898,
+ (q31_t)0xab0475c, (q31_t)0x8072721f, (q31_t)0xaaa0478, (q31_t)0x8071ebf6, (q31_t)0xaa3c18e, (q31_t)0x8071661a, (q31_t)0xa9d7e9d, (q31_t)0x8070e08e,
+ (q31_t)0xa973ba5, (q31_t)0x80705b50, (q31_t)0xa90f8a7, (q31_t)0x806fd661, (q31_t)0xa8ab5a2, (q31_t)0x806f51c1, (q31_t)0xa847297, (q31_t)0x806ecd6f,
+ (q31_t)0xa7e2f85, (q31_t)0x806e496c, (q31_t)0xa77ec6d, (q31_t)0x806dc5b8, (q31_t)0xa71a94f, (q31_t)0x806d4253, (q31_t)0xa6b662a, (q31_t)0x806cbf3c,
+ (q31_t)0xa6522fe, (q31_t)0x806c3c74, (q31_t)0xa5edfcc, (q31_t)0x806bb9fa, (q31_t)0xa589c94, (q31_t)0x806b37cf, (q31_t)0xa525955, (q31_t)0x806ab5f3,
+ (q31_t)0xa4c1610, (q31_t)0x806a3466, (q31_t)0xa45d2c5, (q31_t)0x8069b327, (q31_t)0xa3f8f73, (q31_t)0x80693237, (q31_t)0xa394c1b, (q31_t)0x8068b196,
+ (q31_t)0xa3308bd, (q31_t)0x80683143, (q31_t)0xa2cc558, (q31_t)0x8067b13f, (q31_t)0xa2681ed, (q31_t)0x8067318a, (q31_t)0xa203e7c, (q31_t)0x8066b224,
+ (q31_t)0xa19fb04, (q31_t)0x8066330c, (q31_t)0xa13b787, (q31_t)0x8065b443, (q31_t)0xa0d7403, (q31_t)0x806535c9, (q31_t)0xa073079, (q31_t)0x8064b79d,
+ (q31_t)0xa00ece8, (q31_t)0x806439c0, (q31_t)0x9faa952, (q31_t)0x8063bc32, (q31_t)0x9f465b5, (q31_t)0x80633ef3, (q31_t)0x9ee2213, (q31_t)0x8062c202,
+ (q31_t)0x9e7de6a, (q31_t)0x80624560, (q31_t)0x9e19abb, (q31_t)0x8061c90c, (q31_t)0x9db5706, (q31_t)0x80614d08, (q31_t)0x9d5134b, (q31_t)0x8060d152,
+ (q31_t)0x9cecf89, (q31_t)0x806055eb, (q31_t)0x9c88bc2, (q31_t)0x805fdad2, (q31_t)0x9c247f5, (q31_t)0x805f6009, (q31_t)0x9bc0421, (q31_t)0x805ee58e,
+ (q31_t)0x9b5c048, (q31_t)0x805e6b62, (q31_t)0x9af7c69, (q31_t)0x805df184, (q31_t)0x9a93884, (q31_t)0x805d77f5, (q31_t)0x9a2f498, (q31_t)0x805cfeb5,
+ (q31_t)0x99cb0a7, (q31_t)0x805c85c4, (q31_t)0x9966cb0, (q31_t)0x805c0d21, (q31_t)0x99028b3, (q31_t)0x805b94ce, (q31_t)0x989e4b0, (q31_t)0x805b1cc8,
+ (q31_t)0x983a0a7, (q31_t)0x805aa512, (q31_t)0x97d5c99, (q31_t)0x805a2daa, (q31_t)0x9771884, (q31_t)0x8059b692, (q31_t)0x970d46a, (q31_t)0x80593fc7,
+ (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x9644c23, (q31_t)0x8058531f, (q31_t)0x95e07f8, (q31_t)0x8057dd41, (q31_t)0x957c3c6, (q31_t)0x805767b2,
+ (q31_t)0x9517f8f, (q31_t)0x8056f272, (q31_t)0x94b3b52, (q31_t)0x80567d80, (q31_t)0x944f70f, (q31_t)0x805608dd, (q31_t)0x93eb2c6, (q31_t)0x80559489,
+ (q31_t)0x9386e78, (q31_t)0x80552084, (q31_t)0x9322a24, (q31_t)0x8054accd, (q31_t)0x92be5ca, (q31_t)0x80543965, (q31_t)0x925a16b, (q31_t)0x8053c64c,
+ (q31_t)0x91f5d06, (q31_t)0x80535381, (q31_t)0x919189c, (q31_t)0x8052e106, (q31_t)0x912d42c, (q31_t)0x80526ed9, (q31_t)0x90c8fb6, (q31_t)0x8051fcfb,
+ (q31_t)0x9064b3a, (q31_t)0x80518b6b, (q31_t)0x90006ba, (q31_t)0x80511a2b, (q31_t)0x8f9c233, (q31_t)0x8050a939, (q31_t)0x8f37da7, (q31_t)0x80503896,
+ (q31_t)0x8ed3916, (q31_t)0x804fc841, (q31_t)0x8e6f47f, (q31_t)0x804f583c, (q31_t)0x8e0afe2, (q31_t)0x804ee885, (q31_t)0x8da6b40, (q31_t)0x804e791d,
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+ (q31_t)0x8a2009a, (q31_t)0x804a9c4d, (q31_t)0x89bbbc3, (q31_t)0x804a2ff9, (q31_t)0x89576e5, (q31_t)0x8049c3f3, (q31_t)0x88f3203, (q31_t)0x8049583d,
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+ (q31_t)0x7f27157, (q31_t)0x803f376a, (q31_t)0x7ec2bf0, (q31_t)0x803ed3b3, (q31_t)0x7e5e685, (q31_t)0x803e704c, (q31_t)0x7dfa114, (q31_t)0x803e0d34,
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+ (q31_t)0x729bb4e, (q31_t)0x80335959, (q31_t)0x7237552, (q31_t)0x8032ff7d, (q31_t)0x71d2f52, (q31_t)0x8032a5ef, (q31_t)0x716e94e, (q31_t)0x80324cb1,
+ (q31_t)0x710a345, (q31_t)0x8031f3c2, (q31_t)0x70a5d37, (q31_t)0x80319b21, (q31_t)0x7041726, (q31_t)0x803142cf, (q31_t)0x6fdd110, (q31_t)0x8030eacd,
+ (q31_t)0x6f78af6, (q31_t)0x80309318, (q31_t)0x6f144d7, (q31_t)0x80303bb3, (q31_t)0x6eafeb4, (q31_t)0x802fe49d, (q31_t)0x6e4b88d, (q31_t)0x802f8dd5,
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+ (q31_t)0x67a0d76, (q31_t)0x8029f9b4, (q31_t)0x673c704, (q31_t)0x8029a878, (q31_t)0x66d808f, (q31_t)0x8029578b, (q31_t)0x6673a16, (q31_t)0x802906ec,
+ (q31_t)0x660f398, (q31_t)0x8028b69c, (q31_t)0x65aad17, (q31_t)0x8028669b, (q31_t)0x6546692, (q31_t)0x802816e9, (q31_t)0x64e2009, (q31_t)0x8027c786,
+ (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x64192eb, (q31_t)0x802729ad, (q31_t)0x63b4c57, (q31_t)0x8026db36, (q31_t)0x63505be, (q31_t)0x80268d0e,
+ (q31_t)0x62ebf22, (q31_t)0x80263f36, (q31_t)0x6287882, (q31_t)0x8025f1ac, (q31_t)0x62231de, (q31_t)0x8025a471, (q31_t)0x61beb36, (q31_t)0x80255784,
+ (q31_t)0x615a48b, (q31_t)0x80250ae7, (q31_t)0x60f5ddc, (q31_t)0x8024be99, (q31_t)0x6091729, (q31_t)0x80247299, (q31_t)0x602d072, (q31_t)0x802426e8,
+ (q31_t)0x5fc89b8, (q31_t)0x8023db86, (q31_t)0x5f642fa, (q31_t)0x80239073, (q31_t)0x5effc38, (q31_t)0x802345af, (q31_t)0x5e9b572, (q31_t)0x8022fb3a,
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+ (q31_t)0x5b137df, (q31_t)0x80206af8, (q31_t)0x5aaf0f6, (q31_t)0x80202397, (q31_t)0x5a4aa09, (q31_t)0x801fdc86, (q31_t)0x59e6319, (q31_t)0x801f95c3,
+ (q31_t)0x5981c26, (q31_t)0x801f4f4f, (q31_t)0x591d52f, (q31_t)0x801f092a, (q31_t)0x58b8e34, (q31_t)0x801ec354, (q31_t)0x5854736, (q31_t)0x801e7dcd,
+ (q31_t)0x57f0035, (q31_t)0x801e3895, (q31_t)0x578b930, (q31_t)0x801df3ab, (q31_t)0x5727228, (q31_t)0x801daf11, (q31_t)0x56c2b1c, (q31_t)0x801d6ac5,
+ (q31_t)0x565e40d, (q31_t)0x801d26c8, (q31_t)0x55f9cfb, (q31_t)0x801ce31a, (q31_t)0x55955e6, (q31_t)0x801c9fbb, (q31_t)0x5530ecd, (q31_t)0x801c5cab,
+ (q31_t)0x54cc7b1, (q31_t)0x801c19ea, (q31_t)0x5468092, (q31_t)0x801bd777, (q31_t)0x540396f, (q31_t)0x801b9554, (q31_t)0x539f249, (q31_t)0x801b537f,
+ (q31_t)0x533ab20, (q31_t)0x801b11fa, (q31_t)0x52d63f4, (q31_t)0x801ad0c3, (q31_t)0x5271cc4, (q31_t)0x801a8fdb, (q31_t)0x520d592, (q31_t)0x801a4f42,
+ (q31_t)0x51a8e5c, (q31_t)0x801a0ef8, (q31_t)0x5144723, (q31_t)0x8019cefd, (q31_t)0x50dffe7, (q31_t)0x80198f50, (q31_t)0x507b8a8, (q31_t)0x80194ff3,
+ (q31_t)0x5017165, (q31_t)0x801910e4, (q31_t)0x4fb2a20, (q31_t)0x8018d225, (q31_t)0x4f4e2d8, (q31_t)0x801893b4, (q31_t)0x4ee9b8c, (q31_t)0x80185592,
+ (q31_t)0x4e8543e, (q31_t)0x801817bf, (q31_t)0x4e20cec, (q31_t)0x8017da3b, (q31_t)0x4dbc597, (q31_t)0x80179d06, (q31_t)0x4d57e40, (q31_t)0x80176020,
+ (q31_t)0x4cf36e5, (q31_t)0x80172388, (q31_t)0x4c8ef88, (q31_t)0x8016e740, (q31_t)0x4c2a827, (q31_t)0x8016ab46, (q31_t)0x4bc60c4, (q31_t)0x80166f9c,
+ (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x4afd1f4, (q31_t)0x8015f933, (q31_t)0x4a98a88, (q31_t)0x8015be75, (q31_t)0x4a34319, (q31_t)0x80158406,
+ (q31_t)0x49cfba7, (q31_t)0x801549e6, (q31_t)0x496b432, (q31_t)0x80151015, (q31_t)0x4906cbb, (q31_t)0x8014d693, (q31_t)0x48a2540, (q31_t)0x80149d5f,
+ (q31_t)0x483ddc3, (q31_t)0x8014647b, (q31_t)0x47d9643, (q31_t)0x80142be5, (q31_t)0x4774ec1, (q31_t)0x8013f39e, (q31_t)0x471073b, (q31_t)0x8013bba7,
+ (q31_t)0x46abfb3, (q31_t)0x801383fe, (q31_t)0x4647828, (q31_t)0x80134ca4, (q31_t)0x45e309a, (q31_t)0x80131599, (q31_t)0x457e90a, (q31_t)0x8012dedd,
+ (q31_t)0x451a177, (q31_t)0x8012a86f, (q31_t)0x44b59e1, (q31_t)0x80127251, (q31_t)0x4451249, (q31_t)0x80123c82, (q31_t)0x43ecaae, (q31_t)0x80120701,
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+ (q31_t)0x41f6480, (q31_t)0x8011001f, (q31_t)0x4191cd5, (q31_t)0x8010cc78, (q31_t)0x412d528, (q31_t)0x8010991f, (q31_t)0x40c8d79, (q31_t)0x80106616,
+ (q31_t)0x40645c7, (q31_t)0x8010335c, (q31_t)0x3fffe12, (q31_t)0x801000f1, (q31_t)0x3f9b65b, (q31_t)0x800fced4, (q31_t)0x3f36ea2, (q31_t)0x800f9d07,
+ (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x3e6df28, (q31_t)0x800f3a59, (q31_t)0x3e09767, (q31_t)0x800f0978, (q31_t)0x3da4fa4, (q31_t)0x800ed8e6,
+ (q31_t)0x3d407df, (q31_t)0x800ea8a3, (q31_t)0x3cdc017, (q31_t)0x800e78af, (q31_t)0x3c7784d, (q31_t)0x800e490a, (q31_t)0x3c13080, (q31_t)0x800e19b4,
+ (q31_t)0x3bae8b2, (q31_t)0x800deaad, (q31_t)0x3b4a0e0, (q31_t)0x800dbbf5, (q31_t)0x3ae590d, (q31_t)0x800d8d8b, (q31_t)0x3a81137, (q31_t)0x800d5f71,
+ (q31_t)0x3a1c960, (q31_t)0x800d31a5, (q31_t)0x39b8185, (q31_t)0x800d0429, (q31_t)0x39539a9, (q31_t)0x800cd6fb, (q31_t)0x38ef1ca, (q31_t)0x800caa1c,
+ (q31_t)0x388a9ea, (q31_t)0x800c7d8c, (q31_t)0x3826207, (q31_t)0x800c514c, (q31_t)0x37c1a22, (q31_t)0x800c255a, (q31_t)0x375d23a, (q31_t)0x800bf9b7,
+ (q31_t)0x36f8a51, (q31_t)0x800bce63, (q31_t)0x3694265, (q31_t)0x800ba35d, (q31_t)0x362fa78, (q31_t)0x800b78a7, (q31_t)0x35cb288, (q31_t)0x800b4e40,
+ (q31_t)0x3566a96, (q31_t)0x800b2427, (q31_t)0x35022a2, (q31_t)0x800afa5e, (q31_t)0x349daac, (q31_t)0x800ad0e3, (q31_t)0x34392b4, (q31_t)0x800aa7b8,
+ (q31_t)0x33d4abb, (q31_t)0x800a7edb, (q31_t)0x33702bf, (q31_t)0x800a564e, (q31_t)0x330bac1, (q31_t)0x800a2e0f, (q31_t)0x32a72c1, (q31_t)0x800a061f,
+ (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x31de2bb, (q31_t)0x8009b72c, (q31_t)0x3179ab5, (q31_t)0x80099029, (q31_t)0x31152ae, (q31_t)0x80096975,
+ (q31_t)0x30b0aa4, (q31_t)0x80094310, (q31_t)0x304c299, (q31_t)0x80091cf9, (q31_t)0x2fe7a8c, (q31_t)0x8008f732, (q31_t)0x2f8327d, (q31_t)0x8008d1ba,
+ (q31_t)0x2f1ea6c, (q31_t)0x8008ac90, (q31_t)0x2eba259, (q31_t)0x800887b6, (q31_t)0x2e55a44, (q31_t)0x8008632a, (q31_t)0x2df122e, (q31_t)0x80083eed,
+ (q31_t)0x2d8ca16, (q31_t)0x80081b00, (q31_t)0x2d281fc, (q31_t)0x8007f761, (q31_t)0x2cc39e1, (q31_t)0x8007d411, (q31_t)0x2c5f1c3, (q31_t)0x8007b110,
+ (q31_t)0x2bfa9a4, (q31_t)0x80078e5e, (q31_t)0x2b96184, (q31_t)0x80076bfb, (q31_t)0x2b31961, (q31_t)0x800749e7, (q31_t)0x2acd13d, (q31_t)0x80072822,
+ (q31_t)0x2a68917, (q31_t)0x800706ac, (q31_t)0x2a040f0, (q31_t)0x8006e585, (q31_t)0x299f8c7, (q31_t)0x8006c4ac, (q31_t)0x293b09c, (q31_t)0x8006a423,
+ (q31_t)0x28d6870, (q31_t)0x800683e8, (q31_t)0x2872043, (q31_t)0x800663fd, (q31_t)0x280d813, (q31_t)0x80064460, (q31_t)0x27a8fe2, (q31_t)0x80062513,
+ (q31_t)0x27447b0, (q31_t)0x80060614, (q31_t)0x26dff7c, (q31_t)0x8005e764, (q31_t)0x267b747, (q31_t)0x8005c904, (q31_t)0x2616f10, (q31_t)0x8005aaf2,
+ (q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x254de9e, (q31_t)0x80056fbb, (q31_t)0x24e9662, (q31_t)0x80055296, (q31_t)0x2484e26, (q31_t)0x800535c0,
+ (q31_t)0x24205e8, (q31_t)0x80051939, (q31_t)0x23bbda8, (q31_t)0x8004fd00, (q31_t)0x2357567, (q31_t)0x8004e117, (q31_t)0x22f2d25, (q31_t)0x8004c57d,
+ (q31_t)0x228e4e2, (q31_t)0x8004aa32, (q31_t)0x2229c9d, (q31_t)0x80048f35, (q31_t)0x21c5457, (q31_t)0x80047488, (q31_t)0x2160c0f, (q31_t)0x80045a29,
+ (q31_t)0x20fc3c6, (q31_t)0x8004401a, (q31_t)0x2097b7c, (q31_t)0x80042659, (q31_t)0x2033331, (q31_t)0x80040ce7, (q31_t)0x1fceae4, (q31_t)0x8003f3c5,
+ (q31_t)0x1f6a297, (q31_t)0x8003daf1, (q31_t)0x1f05a48, (q31_t)0x8003c26c, (q31_t)0x1ea11f7, (q31_t)0x8003aa36, (q31_t)0x1e3c9a6, (q31_t)0x8003924f,
+ (q31_t)0x1dd8154, (q31_t)0x80037ab7, (q31_t)0x1d73900, (q31_t)0x8003636e, (q31_t)0x1d0f0ab, (q31_t)0x80034c74, (q31_t)0x1caa855, (q31_t)0x800335c9,
+ (q31_t)0x1c45ffe, (q31_t)0x80031f6d, (q31_t)0x1be17a6, (q31_t)0x80030960, (q31_t)0x1b7cf4d, (q31_t)0x8002f3a1, (q31_t)0x1b186f3, (q31_t)0x8002de32,
+ (q31_t)0x1ab3e97, (q31_t)0x8002c912, (q31_t)0x1a4f63b, (q31_t)0x8002b440, (q31_t)0x19eaddd, (q31_t)0x80029fbe, (q31_t)0x198657f, (q31_t)0x80028b8a,
+ (q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x18bd4bf, (q31_t)0x80026410, (q31_t)0x1858c5e, (q31_t)0x800250c9, (q31_t)0x17f43fc, (q31_t)0x80023dd2,
+ (q31_t)0x178fb99, (q31_t)0x80022b29, (q31_t)0x172b335, (q31_t)0x800218cf, (q31_t)0x16c6ad0, (q31_t)0x800206c4, (q31_t)0x166226a, (q31_t)0x8001f508,
+ (q31_t)0x15fda03, (q31_t)0x8001e39b, (q31_t)0x159919c, (q31_t)0x8001d27d, (q31_t)0x1534934, (q31_t)0x8001c1ae, (q31_t)0x14d00ca, (q31_t)0x8001b12e,
+ (q31_t)0x146b860, (q31_t)0x8001a0fd, (q31_t)0x1406ff6, (q31_t)0x8001911b, (q31_t)0x13a278a, (q31_t)0x80018187, (q31_t)0x133df1e, (q31_t)0x80017243,
+ (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x1274e43, (q31_t)0x800154a7, (q31_t)0x12105d5, (q31_t)0x80014650, (q31_t)0x11abd66, (q31_t)0x80013847,
+ (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0x10e2c85, (q31_t)0x80011d23, (q31_t)0x107e414, (q31_t)0x80011008, (q31_t)0x1019ba2, (q31_t)0x8001033b,
+ (q31_t)0x0fb5330, (q31_t)0x8000f6bd, (q31_t)0x0f50abd, (q31_t)0x8000ea8e, (q31_t)0x0eec249, (q31_t)0x8000deaf, (q31_t)0x0e879d5, (q31_t)0x8000d31e,
+ (q31_t)0x0e23160, (q31_t)0x8000c7dc, (q31_t)0x0dbe8eb, (q31_t)0x8000bce9, (q31_t)0x0d5a075, (q31_t)0x8000b245, (q31_t)0x0cf57ff, (q31_t)0x8000a7f0,
+ (q31_t)0x0c90f88, (q31_t)0x80009dea, (q31_t)0x0c2c711, (q31_t)0x80009433, (q31_t)0x0bc7e99, (q31_t)0x80008aca, (q31_t)0x0b63621, (q31_t)0x800081b1,
+ (q31_t)0x0afeda8, (q31_t)0x800078e7, (q31_t)0x0a9a52f, (q31_t)0x8000706c, (q31_t)0x0a35cb5, (q31_t)0x8000683f, (q31_t)0x09d143b, (q31_t)0x80006062,
+ (q31_t)0x096cbc1, (q31_t)0x800058d4, (q31_t)0x0908346, (q31_t)0x80005194, (q31_t)0x08a3acb, (q31_t)0x80004aa4, (q31_t)0x083f250, (q31_t)0x80004402,
+ (q31_t)0x07da9d4, (q31_t)0x80003daf, (q31_t)0x0776159, (q31_t)0x800037ac, (q31_t)0x07118dc, (q31_t)0x800031f7, (q31_t)0x06ad060, (q31_t)0x80002c91,
+ (q31_t)0x06487e3, (q31_t)0x8000277a, (q31_t)0x05e3f66, (q31_t)0x800022b3, (q31_t)0x057f6e9, (q31_t)0x80001e3a, (q31_t)0x051ae6b, (q31_t)0x80001a10,
+ (q31_t)0x04b65ee, (q31_t)0x80001635, (q31_t)0x0451d70, (q31_t)0x800012a9, (q31_t)0x03ed4f2, (q31_t)0x80000f6c, (q31_t)0x0388c74, (q31_t)0x80000c7e,
+ (q31_t)0x03243f5, (q31_t)0x800009df, (q31_t)0x02bfb77, (q31_t)0x8000078e, (q31_t)0x025b2f8, (q31_t)0x8000058d, (q31_t)0x01f6a7a, (q31_t)0x800003db,
+ (q31_t)0x01921fb, (q31_t)0x80000278, (q31_t)0x012d97c, (q31_t)0x80000163, (q31_t)0x00c90fe, (q31_t)0x8000009e, (q31_t)0x006487f, (q31_t)0x80000027
};
/**
-* \par
-* cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre>
-* \par
-* C command to generate the table
-* <pre>
-* for(i = 0; i< N; i++)
-* {
-* cos_factors[i]= 2 * cos((2*i+1)*c/2);
-* } </pre>
-* \par
-* where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
-* \par
-* Then converted to q31 format by multiplying with 2^31 and saturated if required.
+ @par
+ cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre>
+ @par
+ C command to generate the table
+ <pre>
+ for (i = 0; i< N; i++)
+ {
+ cos_factors[i] = 2 * cos((2*i+1)*c/2);
+ } </pre>
+ @par
+ where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
+ @par
+ Then converted to q31 format by multiplying with 2^31 and saturated if required.
*/
@@ -5541,2077 +3492,1058 @@
};
static const q31_t cos_factorsQ31_8192[8192] = {
- (q31_t)0x7ffffff6, (q31_t)0x7fffffa7, (q31_t)0x7fffff09, (q31_t)0x7ffffe1c, (q31_t)0x7ffffce1, (q31_t)0x7ffffb56,
- (q31_t)0x7ffff97c, (q31_t)0x7ffff753,
- (q31_t)0x7ffff4dc, (q31_t)0x7ffff215, (q31_t)0x7fffef00, (q31_t)0x7fffeb9b, (q31_t)0x7fffe7e8, (q31_t)0x7fffe3e5,
- (q31_t)0x7fffdf94, (q31_t)0x7fffdaf3,
- (q31_t)0x7fffd604, (q31_t)0x7fffd0c6, (q31_t)0x7fffcb39, (q31_t)0x7fffc55c, (q31_t)0x7fffbf31, (q31_t)0x7fffb8b7,
- (q31_t)0x7fffb1ee, (q31_t)0x7fffaad6,
- (q31_t)0x7fffa36f, (q31_t)0x7fff9bb9, (q31_t)0x7fff93b4, (q31_t)0x7fff8b61, (q31_t)0x7fff82be, (q31_t)0x7fff79cc,
- (q31_t)0x7fff708b, (q31_t)0x7fff66fc,
- (q31_t)0x7fff5d1d, (q31_t)0x7fff52ef, (q31_t)0x7fff4873, (q31_t)0x7fff3da8, (q31_t)0x7fff328d, (q31_t)0x7fff2724,
- (q31_t)0x7fff1b6b, (q31_t)0x7fff0f64,
- (q31_t)0x7fff030e, (q31_t)0x7ffef669, (q31_t)0x7ffee975, (q31_t)0x7ffedc31, (q31_t)0x7ffece9f, (q31_t)0x7ffec0be,
- (q31_t)0x7ffeb28e, (q31_t)0x7ffea40f,
- (q31_t)0x7ffe9542, (q31_t)0x7ffe8625, (q31_t)0x7ffe76b9, (q31_t)0x7ffe66fe, (q31_t)0x7ffe56f5, (q31_t)0x7ffe469c,
- (q31_t)0x7ffe35f4, (q31_t)0x7ffe24fe,
- (q31_t)0x7ffe13b8, (q31_t)0x7ffe0224, (q31_t)0x7ffdf040, (q31_t)0x7ffdde0e, (q31_t)0x7ffdcb8d, (q31_t)0x7ffdb8bc,
- (q31_t)0x7ffda59d, (q31_t)0x7ffd922f,
- (q31_t)0x7ffd7e72, (q31_t)0x7ffd6a66, (q31_t)0x7ffd560b, (q31_t)0x7ffd4161, (q31_t)0x7ffd2c68, (q31_t)0x7ffd1720,
- (q31_t)0x7ffd0189, (q31_t)0x7ffceba4,
- (q31_t)0x7ffcd56f, (q31_t)0x7ffcbeeb, (q31_t)0x7ffca819, (q31_t)0x7ffc90f7, (q31_t)0x7ffc7987, (q31_t)0x7ffc61c7,
- (q31_t)0x7ffc49b9, (q31_t)0x7ffc315b,
- (q31_t)0x7ffc18af, (q31_t)0x7ffbffb4, (q31_t)0x7ffbe66a, (q31_t)0x7ffbccd0, (q31_t)0x7ffbb2e8, (q31_t)0x7ffb98b1,
- (q31_t)0x7ffb7e2b, (q31_t)0x7ffb6356,
- (q31_t)0x7ffb4833, (q31_t)0x7ffb2cc0, (q31_t)0x7ffb10fe, (q31_t)0x7ffaf4ed, (q31_t)0x7ffad88e, (q31_t)0x7ffabbdf,
- (q31_t)0x7ffa9ee2, (q31_t)0x7ffa8195,
- (q31_t)0x7ffa63fa, (q31_t)0x7ffa460f, (q31_t)0x7ffa27d6, (q31_t)0x7ffa094e, (q31_t)0x7ff9ea76, (q31_t)0x7ff9cb50,
- (q31_t)0x7ff9abdb, (q31_t)0x7ff98c17,
- (q31_t)0x7ff96c04, (q31_t)0x7ff94ba2, (q31_t)0x7ff92af1, (q31_t)0x7ff909f2, (q31_t)0x7ff8e8a3, (q31_t)0x7ff8c705,
- (q31_t)0x7ff8a519, (q31_t)0x7ff882dd,
- (q31_t)0x7ff86053, (q31_t)0x7ff83d79, (q31_t)0x7ff81a51, (q31_t)0x7ff7f6da, (q31_t)0x7ff7d313, (q31_t)0x7ff7aefe,
- (q31_t)0x7ff78a9a, (q31_t)0x7ff765e7,
- (q31_t)0x7ff740e5, (q31_t)0x7ff71b94, (q31_t)0x7ff6f5f4, (q31_t)0x7ff6d005, (q31_t)0x7ff6a9c8, (q31_t)0x7ff6833b,
- (q31_t)0x7ff65c5f, (q31_t)0x7ff63535,
- (q31_t)0x7ff60dbb, (q31_t)0x7ff5e5f3, (q31_t)0x7ff5bddc, (q31_t)0x7ff59576, (q31_t)0x7ff56cc0, (q31_t)0x7ff543bc,
- (q31_t)0x7ff51a69, (q31_t)0x7ff4f0c7,
- (q31_t)0x7ff4c6d6, (q31_t)0x7ff49c96, (q31_t)0x7ff47208, (q31_t)0x7ff4472a, (q31_t)0x7ff41bfd, (q31_t)0x7ff3f082,
- (q31_t)0x7ff3c4b7, (q31_t)0x7ff3989e,
- (q31_t)0x7ff36c36, (q31_t)0x7ff33f7e, (q31_t)0x7ff31278, (q31_t)0x7ff2e523, (q31_t)0x7ff2b77f, (q31_t)0x7ff2898c,
- (q31_t)0x7ff25b4a, (q31_t)0x7ff22cb9,
- (q31_t)0x7ff1fdd9, (q31_t)0x7ff1ceab, (q31_t)0x7ff19f2d, (q31_t)0x7ff16f61, (q31_t)0x7ff13f45, (q31_t)0x7ff10edb,
- (q31_t)0x7ff0de22, (q31_t)0x7ff0ad19,
- (q31_t)0x7ff07bc2, (q31_t)0x7ff04a1c, (q31_t)0x7ff01827, (q31_t)0x7fefe5e4, (q31_t)0x7fefb351, (q31_t)0x7fef806f,
- (q31_t)0x7fef4d3e, (q31_t)0x7fef19bf,
- (q31_t)0x7feee5f0, (q31_t)0x7feeb1d3, (q31_t)0x7fee7d67, (q31_t)0x7fee48ac, (q31_t)0x7fee13a1, (q31_t)0x7fedde48,
- (q31_t)0x7feda8a0, (q31_t)0x7fed72aa,
- (q31_t)0x7fed3c64, (q31_t)0x7fed05cf, (q31_t)0x7fecceec, (q31_t)0x7fec97b9, (q31_t)0x7fec6038, (q31_t)0x7fec2867,
- (q31_t)0x7febf048, (q31_t)0x7febb7da,
- (q31_t)0x7feb7f1d, (q31_t)0x7feb4611, (q31_t)0x7feb0cb6, (q31_t)0x7fead30c, (q31_t)0x7fea9914, (q31_t)0x7fea5ecc,
- (q31_t)0x7fea2436, (q31_t)0x7fe9e950,
- (q31_t)0x7fe9ae1c, (q31_t)0x7fe97299, (q31_t)0x7fe936c7, (q31_t)0x7fe8faa6, (q31_t)0x7fe8be36, (q31_t)0x7fe88177,
- (q31_t)0x7fe84469, (q31_t)0x7fe8070d,
- (q31_t)0x7fe7c961, (q31_t)0x7fe78b67, (q31_t)0x7fe74d1e, (q31_t)0x7fe70e85, (q31_t)0x7fe6cf9e, (q31_t)0x7fe69068,
- (q31_t)0x7fe650e3, (q31_t)0x7fe61110,
- (q31_t)0x7fe5d0ed, (q31_t)0x7fe5907b, (q31_t)0x7fe54fbb, (q31_t)0x7fe50eac, (q31_t)0x7fe4cd4d, (q31_t)0x7fe48ba0,
- (q31_t)0x7fe449a4, (q31_t)0x7fe40759,
- (q31_t)0x7fe3c4bf, (q31_t)0x7fe381d7, (q31_t)0x7fe33e9f, (q31_t)0x7fe2fb19, (q31_t)0x7fe2b743, (q31_t)0x7fe2731f,
- (q31_t)0x7fe22eac, (q31_t)0x7fe1e9ea,
- (q31_t)0x7fe1a4d9, (q31_t)0x7fe15f79, (q31_t)0x7fe119cb, (q31_t)0x7fe0d3cd, (q31_t)0x7fe08d81, (q31_t)0x7fe046e5,
- (q31_t)0x7fdffffb, (q31_t)0x7fdfb8c2,
- (q31_t)0x7fdf713a, (q31_t)0x7fdf2963, (q31_t)0x7fdee13e, (q31_t)0x7fde98c9, (q31_t)0x7fde5006, (q31_t)0x7fde06f3,
- (q31_t)0x7fddbd92, (q31_t)0x7fdd73e2,
- (q31_t)0x7fdd29e3, (q31_t)0x7fdcdf95, (q31_t)0x7fdc94f9, (q31_t)0x7fdc4a0d, (q31_t)0x7fdbfed3, (q31_t)0x7fdbb349,
- (q31_t)0x7fdb6771, (q31_t)0x7fdb1b4a,
- (q31_t)0x7fdaced4, (q31_t)0x7fda820f, (q31_t)0x7fda34fc, (q31_t)0x7fd9e799, (q31_t)0x7fd999e8, (q31_t)0x7fd94be8,
- (q31_t)0x7fd8fd98, (q31_t)0x7fd8aefa,
- (q31_t)0x7fd8600e, (q31_t)0x7fd810d2, (q31_t)0x7fd7c147, (q31_t)0x7fd7716e, (q31_t)0x7fd72146, (q31_t)0x7fd6d0cf,
- (q31_t)0x7fd68009, (q31_t)0x7fd62ef4,
- (q31_t)0x7fd5dd90, (q31_t)0x7fd58bdd, (q31_t)0x7fd539dc, (q31_t)0x7fd4e78c, (q31_t)0x7fd494ed, (q31_t)0x7fd441ff,
- (q31_t)0x7fd3eec2, (q31_t)0x7fd39b36,
- (q31_t)0x7fd3475c, (q31_t)0x7fd2f332, (q31_t)0x7fd29eba, (q31_t)0x7fd249f3, (q31_t)0x7fd1f4dd, (q31_t)0x7fd19f78,
- (q31_t)0x7fd149c5, (q31_t)0x7fd0f3c2,
- (q31_t)0x7fd09d71, (q31_t)0x7fd046d1, (q31_t)0x7fcfefe2, (q31_t)0x7fcf98a4, (q31_t)0x7fcf4117, (q31_t)0x7fcee93c,
- (q31_t)0x7fce9112, (q31_t)0x7fce3898,
- (q31_t)0x7fcddfd0, (q31_t)0x7fcd86b9, (q31_t)0x7fcd2d54, (q31_t)0x7fccd39f, (q31_t)0x7fcc799c, (q31_t)0x7fcc1f4a,
- (q31_t)0x7fcbc4a9, (q31_t)0x7fcb69b9,
- (q31_t)0x7fcb0e7a, (q31_t)0x7fcab2ed, (q31_t)0x7fca5710, (q31_t)0x7fc9fae5, (q31_t)0x7fc99e6b, (q31_t)0x7fc941a2,
- (q31_t)0x7fc8e48b, (q31_t)0x7fc88724,
- (q31_t)0x7fc8296f, (q31_t)0x7fc7cb6b, (q31_t)0x7fc76d18, (q31_t)0x7fc70e76, (q31_t)0x7fc6af86, (q31_t)0x7fc65046,
- (q31_t)0x7fc5f0b8, (q31_t)0x7fc590db,
- (q31_t)0x7fc530af, (q31_t)0x7fc4d035, (q31_t)0x7fc46f6b, (q31_t)0x7fc40e53, (q31_t)0x7fc3acec, (q31_t)0x7fc34b36,
- (q31_t)0x7fc2e931, (q31_t)0x7fc286de,
- (q31_t)0x7fc2243b, (q31_t)0x7fc1c14a, (q31_t)0x7fc15e0a, (q31_t)0x7fc0fa7b, (q31_t)0x7fc0969e, (q31_t)0x7fc03271,
- (q31_t)0x7fbfcdf6, (q31_t)0x7fbf692c,
- (q31_t)0x7fbf0414, (q31_t)0x7fbe9eac, (q31_t)0x7fbe38f6, (q31_t)0x7fbdd2f0, (q31_t)0x7fbd6c9c, (q31_t)0x7fbd05fa,
- (q31_t)0x7fbc9f08, (q31_t)0x7fbc37c8,
- (q31_t)0x7fbbd039, (q31_t)0x7fbb685b, (q31_t)0x7fbb002e, (q31_t)0x7fba97b2, (q31_t)0x7fba2ee8, (q31_t)0x7fb9c5cf,
- (q31_t)0x7fb95c67, (q31_t)0x7fb8f2b0,
- (q31_t)0x7fb888ab, (q31_t)0x7fb81e57, (q31_t)0x7fb7b3b4, (q31_t)0x7fb748c2, (q31_t)0x7fb6dd81, (q31_t)0x7fb671f2,
- (q31_t)0x7fb60614, (q31_t)0x7fb599e7,
- (q31_t)0x7fb52d6b, (q31_t)0x7fb4c0a1, (q31_t)0x7fb45387, (q31_t)0x7fb3e61f, (q31_t)0x7fb37869, (q31_t)0x7fb30a63,
- (q31_t)0x7fb29c0f, (q31_t)0x7fb22d6c,
- (q31_t)0x7fb1be7a, (q31_t)0x7fb14f39, (q31_t)0x7fb0dfaa, (q31_t)0x7fb06fcb, (q31_t)0x7fafff9e, (q31_t)0x7faf8f23,
- (q31_t)0x7faf1e58, (q31_t)0x7faead3f,
- (q31_t)0x7fae3bd7, (q31_t)0x7fadca20, (q31_t)0x7fad581b, (q31_t)0x7face5c6, (q31_t)0x7fac7323, (q31_t)0x7fac0031,
- (q31_t)0x7fab8cf1, (q31_t)0x7fab1962,
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- (q31_t)0x3b7c4c9, (q31_t)0x3b17cf7, (q31_t)0x3ab3523, (q31_t)0x3a4ed4c, (q31_t)0x39ea573, (q31_t)0x3985d97, (q31_t)0x39215ba,
- (q31_t)0x38bcdda,
- (q31_t)0x38585f8, (q31_t)0x37f3e14, (q31_t)0x378f62e, (q31_t)0x372ae46, (q31_t)0x36c665b, (q31_t)0x3661e6f, (q31_t)0x35fd680,
- (q31_t)0x3598e8f,
- (q31_t)0x353469c, (q31_t)0x34cfea8, (q31_t)0x346b6b1, (q31_t)0x3406eb8, (q31_t)0x33a26bd, (q31_t)0x333dec0, (q31_t)0x32d96c1,
- (q31_t)0x3274ec0,
- (q31_t)0x32106bd, (q31_t)0x31abeb9, (q31_t)0x31476b2, (q31_t)0x30e2ea9, (q31_t)0x307e69f, (q31_t)0x3019e93, (q31_t)0x2fb5684,
- (q31_t)0x2f50e74,
- (q31_t)0x2eec663, (q31_t)0x2e87e4f, (q31_t)0x2e2363a, (q31_t)0x2dbee22, (q31_t)0x2d5a609, (q31_t)0x2cf5def, (q31_t)0x2c915d2,
- (q31_t)0x2c2cdb4,
- (q31_t)0x2bc8594, (q31_t)0x2b63d73, (q31_t)0x2aff54f, (q31_t)0x2a9ad2a, (q31_t)0x2a36504, (q31_t)0x29d1cdc, (q31_t)0x296d4b2,
- (q31_t)0x2908c87,
- (q31_t)0x28a445a, (q31_t)0x283fc2b, (q31_t)0x27db3fb, (q31_t)0x2776bc9, (q31_t)0x2712396, (q31_t)0x26adb62, (q31_t)0x264932b,
- (q31_t)0x25e4af4,
- (q31_t)0x25802bb, (q31_t)0x251ba80, (q31_t)0x24b7244, (q31_t)0x2452a07, (q31_t)0x23ee1c8, (q31_t)0x2389988, (q31_t)0x2325147,
- (q31_t)0x22c0904,
- (q31_t)0x225c0bf, (q31_t)0x21f787a, (q31_t)0x2193033, (q31_t)0x212e7eb, (q31_t)0x20c9fa1, (q31_t)0x2065757, (q31_t)0x2000f0b,
- (q31_t)0x1f9c6be,
- (q31_t)0x1f37e6f, (q31_t)0x1ed3620, (q31_t)0x1e6edcf, (q31_t)0x1e0a57d, (q31_t)0x1da5d2a, (q31_t)0x1d414d6, (q31_t)0x1cdcc80,
- (q31_t)0x1c7842a,
- (q31_t)0x1c13bd2, (q31_t)0x1baf37a, (q31_t)0x1b4ab20, (q31_t)0x1ae62c5, (q31_t)0x1a81a69, (q31_t)0x1a1d20c, (q31_t)0x19b89ae,
- (q31_t)0x1954150,
- (q31_t)0x18ef8f0, (q31_t)0x188b08f, (q31_t)0x182682d, (q31_t)0x17c1fcb, (q31_t)0x175d767, (q31_t)0x16f8f03, (q31_t)0x169469d,
- (q31_t)0x162fe37,
- (q31_t)0x15cb5d0, (q31_t)0x1566d68, (q31_t)0x15024ff, (q31_t)0x149dc96, (q31_t)0x143942b, (q31_t)0x13d4bc0, (q31_t)0x1370354,
- (q31_t)0x130bae7,
- (q31_t)0x12a727a, (q31_t)0x1242a0c, (q31_t)0x11de19d, (q31_t)0x117992e, (q31_t)0x11150be, (q31_t)0x10b084d, (q31_t)0x104bfdb,
- (q31_t)0xfe7769,
- (q31_t)0xf82ef6, (q31_t)0xf1e683, (q31_t)0xeb9e0f, (q31_t)0xe5559b, (q31_t)0xdf0d26, (q31_t)0xd8c4b0, (q31_t)0xd27c3a,
- (q31_t)0xcc33c3,
- (q31_t)0xc5eb4c, (q31_t)0xbfa2d5, (q31_t)0xb95a5d, (q31_t)0xb311e4, (q31_t)0xacc96b, (q31_t)0xa680f2, (q31_t)0xa03878,
- (q31_t)0x99effe,
- (q31_t)0x93a784, (q31_t)0x8d5f09, (q31_t)0x87168e, (q31_t)0x80ce12, (q31_t)0x7a8597, (q31_t)0x743d1a, (q31_t)0x6df49e,
- (q31_t)0x67ac21,
- (q31_t)0x6163a5, (q31_t)0x5b1b27, (q31_t)0x54d2aa, (q31_t)0x4e8a2c, (q31_t)0x4841af, (q31_t)0x41f931, (q31_t)0x3bb0b3,
- (q31_t)0x356835,
+ (q31_t)0x7ffffff6, (q31_t)0x7fffffa7, (q31_t)0x7fffff09, (q31_t)0x7ffffe1c, (q31_t)0x7ffffce1, (q31_t)0x7ffffb56, (q31_t)0x7ffff97c, (q31_t)0x7ffff753,
+ (q31_t)0x7ffff4dc, (q31_t)0x7ffff215, (q31_t)0x7fffef00, (q31_t)0x7fffeb9b, (q31_t)0x7fffe7e8, (q31_t)0x7fffe3e5, (q31_t)0x7fffdf94, (q31_t)0x7fffdaf3,
+ (q31_t)0x7fffd604, (q31_t)0x7fffd0c6, (q31_t)0x7fffcb39, (q31_t)0x7fffc55c, (q31_t)0x7fffbf31, (q31_t)0x7fffb8b7, (q31_t)0x7fffb1ee, (q31_t)0x7fffaad6,
+ (q31_t)0x7fffa36f, (q31_t)0x7fff9bb9, (q31_t)0x7fff93b4, (q31_t)0x7fff8b61, (q31_t)0x7fff82be, (q31_t)0x7fff79cc, (q31_t)0x7fff708b, (q31_t)0x7fff66fc,
+ (q31_t)0x7fff5d1d, (q31_t)0x7fff52ef, (q31_t)0x7fff4873, (q31_t)0x7fff3da8, (q31_t)0x7fff328d, (q31_t)0x7fff2724, (q31_t)0x7fff1b6b, (q31_t)0x7fff0f64,
+ (q31_t)0x7fff030e, (q31_t)0x7ffef669, (q31_t)0x7ffee975, (q31_t)0x7ffedc31, (q31_t)0x7ffece9f, (q31_t)0x7ffec0be, (q31_t)0x7ffeb28e, (q31_t)0x7ffea40f,
+ (q31_t)0x7ffe9542, (q31_t)0x7ffe8625, (q31_t)0x7ffe76b9, (q31_t)0x7ffe66fe, (q31_t)0x7ffe56f5, (q31_t)0x7ffe469c, (q31_t)0x7ffe35f4, (q31_t)0x7ffe24fe,
+ (q31_t)0x7ffe13b8, (q31_t)0x7ffe0224, (q31_t)0x7ffdf040, (q31_t)0x7ffdde0e, (q31_t)0x7ffdcb8d, (q31_t)0x7ffdb8bc, (q31_t)0x7ffda59d, (q31_t)0x7ffd922f,
+ (q31_t)0x7ffd7e72, (q31_t)0x7ffd6a66, (q31_t)0x7ffd560b, (q31_t)0x7ffd4161, (q31_t)0x7ffd2c68, (q31_t)0x7ffd1720, (q31_t)0x7ffd0189, (q31_t)0x7ffceba4,
+ (q31_t)0x7ffcd56f, (q31_t)0x7ffcbeeb, (q31_t)0x7ffca819, (q31_t)0x7ffc90f7, (q31_t)0x7ffc7987, (q31_t)0x7ffc61c7, (q31_t)0x7ffc49b9, (q31_t)0x7ffc315b,
+ (q31_t)0x7ffc18af, (q31_t)0x7ffbffb4, (q31_t)0x7ffbe66a, (q31_t)0x7ffbccd0, (q31_t)0x7ffbb2e8, (q31_t)0x7ffb98b1, (q31_t)0x7ffb7e2b, (q31_t)0x7ffb6356,
+ (q31_t)0x7ffb4833, (q31_t)0x7ffb2cc0, (q31_t)0x7ffb10fe, (q31_t)0x7ffaf4ed, (q31_t)0x7ffad88e, (q31_t)0x7ffabbdf, (q31_t)0x7ffa9ee2, (q31_t)0x7ffa8195,
+ (q31_t)0x7ffa63fa, (q31_t)0x7ffa460f, (q31_t)0x7ffa27d6, (q31_t)0x7ffa094e, (q31_t)0x7ff9ea76, (q31_t)0x7ff9cb50, (q31_t)0x7ff9abdb, (q31_t)0x7ff98c17,
+ (q31_t)0x7ff96c04, (q31_t)0x7ff94ba2, (q31_t)0x7ff92af1, (q31_t)0x7ff909f2, (q31_t)0x7ff8e8a3, (q31_t)0x7ff8c705, (q31_t)0x7ff8a519, (q31_t)0x7ff882dd,
+ (q31_t)0x7ff86053, (q31_t)0x7ff83d79, (q31_t)0x7ff81a51, (q31_t)0x7ff7f6da, (q31_t)0x7ff7d313, (q31_t)0x7ff7aefe, (q31_t)0x7ff78a9a, (q31_t)0x7ff765e7,
+ (q31_t)0x7ff740e5, (q31_t)0x7ff71b94, (q31_t)0x7ff6f5f4, (q31_t)0x7ff6d005, (q31_t)0x7ff6a9c8, (q31_t)0x7ff6833b, (q31_t)0x7ff65c5f, (q31_t)0x7ff63535,
+ (q31_t)0x7ff60dbb, (q31_t)0x7ff5e5f3, (q31_t)0x7ff5bddc, (q31_t)0x7ff59576, (q31_t)0x7ff56cc0, (q31_t)0x7ff543bc, (q31_t)0x7ff51a69, (q31_t)0x7ff4f0c7,
+ (q31_t)0x7ff4c6d6, (q31_t)0x7ff49c96, (q31_t)0x7ff47208, (q31_t)0x7ff4472a, (q31_t)0x7ff41bfd, (q31_t)0x7ff3f082, (q31_t)0x7ff3c4b7, (q31_t)0x7ff3989e,
+ (q31_t)0x7ff36c36, (q31_t)0x7ff33f7e, (q31_t)0x7ff31278, (q31_t)0x7ff2e523, (q31_t)0x7ff2b77f, (q31_t)0x7ff2898c, (q31_t)0x7ff25b4a, (q31_t)0x7ff22cb9,
+ (q31_t)0x7ff1fdd9, (q31_t)0x7ff1ceab, (q31_t)0x7ff19f2d, (q31_t)0x7ff16f61, (q31_t)0x7ff13f45, (q31_t)0x7ff10edb, (q31_t)0x7ff0de22, (q31_t)0x7ff0ad19,
+ (q31_t)0x7ff07bc2, (q31_t)0x7ff04a1c, (q31_t)0x7ff01827, (q31_t)0x7fefe5e4, (q31_t)0x7fefb351, (q31_t)0x7fef806f, (q31_t)0x7fef4d3e, (q31_t)0x7fef19bf,
+ (q31_t)0x7feee5f0, (q31_t)0x7feeb1d3, (q31_t)0x7fee7d67, (q31_t)0x7fee48ac, (q31_t)0x7fee13a1, (q31_t)0x7fedde48, (q31_t)0x7feda8a0, (q31_t)0x7fed72aa,
+ (q31_t)0x7fed3c64, (q31_t)0x7fed05cf, (q31_t)0x7fecceec, (q31_t)0x7fec97b9, (q31_t)0x7fec6038, (q31_t)0x7fec2867, (q31_t)0x7febf048, (q31_t)0x7febb7da,
+ (q31_t)0x7feb7f1d, (q31_t)0x7feb4611, (q31_t)0x7feb0cb6, (q31_t)0x7fead30c, (q31_t)0x7fea9914, (q31_t)0x7fea5ecc, (q31_t)0x7fea2436, (q31_t)0x7fe9e950,
+ (q31_t)0x7fe9ae1c, (q31_t)0x7fe97299, (q31_t)0x7fe936c7, (q31_t)0x7fe8faa6, (q31_t)0x7fe8be36, (q31_t)0x7fe88177, (q31_t)0x7fe84469, (q31_t)0x7fe8070d,
+ (q31_t)0x7fe7c961, (q31_t)0x7fe78b67, (q31_t)0x7fe74d1e, (q31_t)0x7fe70e85, (q31_t)0x7fe6cf9e, (q31_t)0x7fe69068, (q31_t)0x7fe650e3, (q31_t)0x7fe61110,
+ (q31_t)0x7fe5d0ed, (q31_t)0x7fe5907b, (q31_t)0x7fe54fbb, (q31_t)0x7fe50eac, (q31_t)0x7fe4cd4d, (q31_t)0x7fe48ba0, (q31_t)0x7fe449a4, (q31_t)0x7fe40759,
+ (q31_t)0x7fe3c4bf, (q31_t)0x7fe381d7, (q31_t)0x7fe33e9f, (q31_t)0x7fe2fb19, (q31_t)0x7fe2b743, (q31_t)0x7fe2731f, (q31_t)0x7fe22eac, (q31_t)0x7fe1e9ea,
+ (q31_t)0x7fe1a4d9, (q31_t)0x7fe15f79, (q31_t)0x7fe119cb, (q31_t)0x7fe0d3cd, (q31_t)0x7fe08d81, (q31_t)0x7fe046e5, (q31_t)0x7fdffffb, (q31_t)0x7fdfb8c2,
+ (q31_t)0x7fdf713a, (q31_t)0x7fdf2963, (q31_t)0x7fdee13e, (q31_t)0x7fde98c9, (q31_t)0x7fde5006, (q31_t)0x7fde06f3, (q31_t)0x7fddbd92, (q31_t)0x7fdd73e2,
+ (q31_t)0x7fdd29e3, (q31_t)0x7fdcdf95, (q31_t)0x7fdc94f9, (q31_t)0x7fdc4a0d, (q31_t)0x7fdbfed3, (q31_t)0x7fdbb349, (q31_t)0x7fdb6771, (q31_t)0x7fdb1b4a,
+ (q31_t)0x7fdaced4, (q31_t)0x7fda820f, (q31_t)0x7fda34fc, (q31_t)0x7fd9e799, (q31_t)0x7fd999e8, (q31_t)0x7fd94be8, (q31_t)0x7fd8fd98, (q31_t)0x7fd8aefa,
+ (q31_t)0x7fd8600e, (q31_t)0x7fd810d2, (q31_t)0x7fd7c147, (q31_t)0x7fd7716e, (q31_t)0x7fd72146, (q31_t)0x7fd6d0cf, (q31_t)0x7fd68009, (q31_t)0x7fd62ef4,
+ (q31_t)0x7fd5dd90, (q31_t)0x7fd58bdd, (q31_t)0x7fd539dc, (q31_t)0x7fd4e78c, (q31_t)0x7fd494ed, (q31_t)0x7fd441ff, (q31_t)0x7fd3eec2, (q31_t)0x7fd39b36,
+ (q31_t)0x7fd3475c, (q31_t)0x7fd2f332, (q31_t)0x7fd29eba, (q31_t)0x7fd249f3, (q31_t)0x7fd1f4dd, (q31_t)0x7fd19f78, (q31_t)0x7fd149c5, (q31_t)0x7fd0f3c2,
+ (q31_t)0x7fd09d71, (q31_t)0x7fd046d1, (q31_t)0x7fcfefe2, (q31_t)0x7fcf98a4, (q31_t)0x7fcf4117, (q31_t)0x7fcee93c, (q31_t)0x7fce9112, (q31_t)0x7fce3898,
+ (q31_t)0x7fcddfd0, (q31_t)0x7fcd86b9, (q31_t)0x7fcd2d54, (q31_t)0x7fccd39f, (q31_t)0x7fcc799c, (q31_t)0x7fcc1f4a, (q31_t)0x7fcbc4a9, (q31_t)0x7fcb69b9,
+ (q31_t)0x7fcb0e7a, (q31_t)0x7fcab2ed, (q31_t)0x7fca5710, (q31_t)0x7fc9fae5, (q31_t)0x7fc99e6b, (q31_t)0x7fc941a2, (q31_t)0x7fc8e48b, (q31_t)0x7fc88724,
+ (q31_t)0x7fc8296f, (q31_t)0x7fc7cb6b, (q31_t)0x7fc76d18, (q31_t)0x7fc70e76, (q31_t)0x7fc6af86, (q31_t)0x7fc65046, (q31_t)0x7fc5f0b8, (q31_t)0x7fc590db,
+ (q31_t)0x7fc530af, (q31_t)0x7fc4d035, (q31_t)0x7fc46f6b, (q31_t)0x7fc40e53, (q31_t)0x7fc3acec, (q31_t)0x7fc34b36, (q31_t)0x7fc2e931, (q31_t)0x7fc286de,
+ (q31_t)0x7fc2243b, (q31_t)0x7fc1c14a, (q31_t)0x7fc15e0a, (q31_t)0x7fc0fa7b, (q31_t)0x7fc0969e, (q31_t)0x7fc03271, (q31_t)0x7fbfcdf6, (q31_t)0x7fbf692c,
+ (q31_t)0x7fbf0414, (q31_t)0x7fbe9eac, (q31_t)0x7fbe38f6, (q31_t)0x7fbdd2f0, (q31_t)0x7fbd6c9c, (q31_t)0x7fbd05fa, (q31_t)0x7fbc9f08, (q31_t)0x7fbc37c8,
+ (q31_t)0x7fbbd039, (q31_t)0x7fbb685b, (q31_t)0x7fbb002e, (q31_t)0x7fba97b2, (q31_t)0x7fba2ee8, (q31_t)0x7fb9c5cf, (q31_t)0x7fb95c67, (q31_t)0x7fb8f2b0,
+ (q31_t)0x7fb888ab, (q31_t)0x7fb81e57, (q31_t)0x7fb7b3b4, (q31_t)0x7fb748c2, (q31_t)0x7fb6dd81, (q31_t)0x7fb671f2, (q31_t)0x7fb60614, (q31_t)0x7fb599e7,
+ (q31_t)0x7fb52d6b, (q31_t)0x7fb4c0a1, (q31_t)0x7fb45387, (q31_t)0x7fb3e61f, (q31_t)0x7fb37869, (q31_t)0x7fb30a63, (q31_t)0x7fb29c0f, (q31_t)0x7fb22d6c,
+ (q31_t)0x7fb1be7a, (q31_t)0x7fb14f39, (q31_t)0x7fb0dfaa, (q31_t)0x7fb06fcb, (q31_t)0x7fafff9e, (q31_t)0x7faf8f23, (q31_t)0x7faf1e58, (q31_t)0x7faead3f,
+ (q31_t)0x7fae3bd7, (q31_t)0x7fadca20, (q31_t)0x7fad581b, (q31_t)0x7face5c6, (q31_t)0x7fac7323, (q31_t)0x7fac0031, (q31_t)0x7fab8cf1, (q31_t)0x7fab1962,
+ (q31_t)0x7faaa584, (q31_t)0x7faa3157, (q31_t)0x7fa9bcdb, (q31_t)0x7fa94811, (q31_t)0x7fa8d2f8, (q31_t)0x7fa85d90, (q31_t)0x7fa7e7d9, (q31_t)0x7fa771d4,
+ (q31_t)0x7fa6fb80, (q31_t)0x7fa684dd, (q31_t)0x7fa60dec, (q31_t)0x7fa596ac, (q31_t)0x7fa51f1d, (q31_t)0x7fa4a73f, (q31_t)0x7fa42f12, (q31_t)0x7fa3b697,
+ (q31_t)0x7fa33dcd, (q31_t)0x7fa2c4b5, (q31_t)0x7fa24b4d, (q31_t)0x7fa1d197, (q31_t)0x7fa15792, (q31_t)0x7fa0dd3f, (q31_t)0x7fa0629c, (q31_t)0x7f9fe7ab,
+ (q31_t)0x7f9f6c6b, (q31_t)0x7f9ef0dd, (q31_t)0x7f9e7500, (q31_t)0x7f9df8d4, (q31_t)0x7f9d7c59, (q31_t)0x7f9cff90, (q31_t)0x7f9c8278, (q31_t)0x7f9c0511,
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+ (q31_t)0x7df119a7, (q31_t)0x7deffa35, (q31_t)0x7deeda77, (q31_t)0x7dedba6a, (q31_t)0x7dec9a10, (q31_t)0x7deb7968, (q31_t)0x7dea5872, (q31_t)0x7de9372f,
+ (q31_t)0x7de8159e, (q31_t)0x7de6f3c0, (q31_t)0x7de5d193, (q31_t)0x7de4af1a, (q31_t)0x7de38c52, (q31_t)0x7de2693d, (q31_t)0x7de145da, (q31_t)0x7de02229,
+ (q31_t)0x7ddefe2b, (q31_t)0x7dddd9e0, (q31_t)0x7ddcb546, (q31_t)0x7ddb905f, (q31_t)0x7dda6b2a, (q31_t)0x7dd945a8, (q31_t)0x7dd81fd8, (q31_t)0x7dd6f9ba,
+ (q31_t)0x7dd5d34f, (q31_t)0x7dd4ac96, (q31_t)0x7dd38590, (q31_t)0x7dd25e3c, (q31_t)0x7dd1369a, (q31_t)0x7dd00eab, (q31_t)0x7dcee66e, (q31_t)0x7dcdbde3,
+ (q31_t)0x7dcc950b, (q31_t)0x7dcb6be6, (q31_t)0x7dca4272, (q31_t)0x7dc918b1, (q31_t)0x7dc7eea3, (q31_t)0x7dc6c447, (q31_t)0x7dc5999d, (q31_t)0x7dc46ea6,
+ (q31_t)0x7dc34361, (q31_t)0x7dc217cf, (q31_t)0x7dc0ebef, (q31_t)0x7dbfbfc1, (q31_t)0x7dbe9346, (q31_t)0x7dbd667d, (q31_t)0x7dbc3967, (q31_t)0x7dbb0c03,
+ (q31_t)0x7db9de52, (q31_t)0x7db8b053, (q31_t)0x7db78207, (q31_t)0x7db6536d, (q31_t)0x7db52485, (q31_t)0x7db3f550, (q31_t)0x7db2c5cd, (q31_t)0x7db195fd,
+ (q31_t)0x7db065df, (q31_t)0x7daf3574, (q31_t)0x7dae04bb, (q31_t)0x7dacd3b5, (q31_t)0x7daba261, (q31_t)0x7daa70c0, (q31_t)0x7da93ed1, (q31_t)0x7da80c95,
+ (q31_t)0x7da6da0b, (q31_t)0x7da5a733, (q31_t)0x7da4740e, (q31_t)0x7da3409c, (q31_t)0x7da20cdc, (q31_t)0x7da0d8cf, (q31_t)0x7d9fa474, (q31_t)0x7d9e6fcb,
+ (q31_t)0x7d9d3ad6, (q31_t)0x7d9c0592, (q31_t)0x7d9ad001, (q31_t)0x7d999a23, (q31_t)0x7d9863f7, (q31_t)0x7d972d7e, (q31_t)0x7d95f6b7, (q31_t)0x7d94bfa3,
+ (q31_t)0x7d938841, (q31_t)0x7d925092, (q31_t)0x7d911896, (q31_t)0x7d8fe04c, (q31_t)0x7d8ea7b4, (q31_t)0x7d8d6ecf, (q31_t)0x7d8c359d, (q31_t)0x7d8afc1d,
+ (q31_t)0x7d89c250, (q31_t)0x7d888835, (q31_t)0x7d874dcd, (q31_t)0x7d861317, (q31_t)0x7d84d814, (q31_t)0x7d839cc4, (q31_t)0x7d826126, (q31_t)0x7d81253a,
+ (q31_t)0x7d7fe902, (q31_t)0x7d7eac7c, (q31_t)0x7d7d6fa8, (q31_t)0x7d7c3287, (q31_t)0x7d7af519, (q31_t)0x7d79b75d, (q31_t)0x7d787954, (q31_t)0x7d773afd,
+ (q31_t)0x7d75fc59, (q31_t)0x7d74bd68, (q31_t)0x7d737e29, (q31_t)0x7d723e9d, (q31_t)0x7d70fec4, (q31_t)0x7d6fbe9d, (q31_t)0x7d6e7e29, (q31_t)0x7d6d3d67,
+ (q31_t)0x7d6bfc58, (q31_t)0x7d6abafc, (q31_t)0x7d697952, (q31_t)0x7d68375b, (q31_t)0x7d66f517, (q31_t)0x7d65b285, (q31_t)0x7d646fa6, (q31_t)0x7d632c79,
+ (q31_t)0x7d61e8ff, (q31_t)0x7d60a538, (q31_t)0x7d5f6124, (q31_t)0x7d5e1cc2, (q31_t)0x7d5cd813, (q31_t)0x7d5b9316, (q31_t)0x7d5a4dcc, (q31_t)0x7d590835,
+ (q31_t)0x7d57c251, (q31_t)0x7d567c1f, (q31_t)0x7d5535a0, (q31_t)0x7d53eed3, (q31_t)0x7d52a7ba, (q31_t)0x7d516053, (q31_t)0x7d50189e, (q31_t)0x7d4ed09d,
+ (q31_t)0x7d4d884e, (q31_t)0x7d4c3fb1, (q31_t)0x7d4af6c8, (q31_t)0x7d49ad91, (q31_t)0x7d48640d, (q31_t)0x7d471a3c, (q31_t)0x7d45d01d, (q31_t)0x7d4485b1,
+ (q31_t)0x7d433af8, (q31_t)0x7d41eff1, (q31_t)0x7d40a49e, (q31_t)0x7d3f58fd, (q31_t)0x7d3e0d0e, (q31_t)0x7d3cc0d3, (q31_t)0x7d3b744a, (q31_t)0x7d3a2774,
+ (q31_t)0x7d38da51, (q31_t)0x7d378ce0, (q31_t)0x7d363f23, (q31_t)0x7d34f118, (q31_t)0x7d33a2bf, (q31_t)0x7d32541a, (q31_t)0x7d310527, (q31_t)0x7d2fb5e7,
+ (q31_t)0x7d2e665a, (q31_t)0x7d2d1680, (q31_t)0x7d2bc659, (q31_t)0x7d2a75e4, (q31_t)0x7d292522, (q31_t)0x7d27d413, (q31_t)0x7d2682b6, (q31_t)0x7d25310d,
+ (q31_t)0x7d23df16, (q31_t)0x7d228cd2, (q31_t)0x7d213a41, (q31_t)0x7d1fe762, (q31_t)0x7d1e9437, (q31_t)0x7d1d40be, (q31_t)0x7d1becf8, (q31_t)0x7d1a98e5,
+ (q31_t)0x7d194485, (q31_t)0x7d17efd8, (q31_t)0x7d169add, (q31_t)0x7d154595, (q31_t)0x7d13f001, (q31_t)0x7d129a1f, (q31_t)0x7d1143ef, (q31_t)0x7d0fed73,
+ (q31_t)0x7d0e96aa, (q31_t)0x7d0d3f93, (q31_t)0x7d0be82f, (q31_t)0x7d0a907e, (q31_t)0x7d093880, (q31_t)0x7d07e035, (q31_t)0x7d06879d, (q31_t)0x7d052eb8,
+ (q31_t)0x7d03d585, (q31_t)0x7d027c05, (q31_t)0x7d012239, (q31_t)0x7cffc81f, (q31_t)0x7cfe6db8, (q31_t)0x7cfd1304, (q31_t)0x7cfbb803, (q31_t)0x7cfa5cb4,
+ (q31_t)0x7cf90119, (q31_t)0x7cf7a531, (q31_t)0x7cf648fb, (q31_t)0x7cf4ec79, (q31_t)0x7cf38fa9, (q31_t)0x7cf2328c, (q31_t)0x7cf0d522, (q31_t)0x7cef776b,
+ (q31_t)0x7cee1967, (q31_t)0x7cecbb16, (q31_t)0x7ceb5c78, (q31_t)0x7ce9fd8d, (q31_t)0x7ce89e55, (q31_t)0x7ce73ed0, (q31_t)0x7ce5defd, (q31_t)0x7ce47ede,
+ (q31_t)0x7ce31e72, (q31_t)0x7ce1bdb8, (q31_t)0x7ce05cb2, (q31_t)0x7cdefb5e, (q31_t)0x7cdd99be, (q31_t)0x7cdc37d0, (q31_t)0x7cdad596, (q31_t)0x7cd9730e,
+ (q31_t)0x7cd8103a, (q31_t)0x7cd6ad18, (q31_t)0x7cd549aa, (q31_t)0x7cd3e5ee, (q31_t)0x7cd281e5, (q31_t)0x7cd11d90, (q31_t)0x7ccfb8ed, (q31_t)0x7cce53fe,
+ (q31_t)0x7ccceec1, (q31_t)0x7ccb8937, (q31_t)0x7cca2361, (q31_t)0x7cc8bd3d, (q31_t)0x7cc756cd, (q31_t)0x7cc5f010, (q31_t)0x7cc48905, (q31_t)0x7cc321ae,
+ (q31_t)0x7cc1ba09, (q31_t)0x7cc05218, (q31_t)0x7cbee9da, (q31_t)0x7cbd814f, (q31_t)0x7cbc1877, (q31_t)0x7cbaaf51, (q31_t)0x7cb945df, (q31_t)0x7cb7dc20,
+ (q31_t)0x7cb67215, (q31_t)0x7cb507bc, (q31_t)0x7cb39d16, (q31_t)0x7cb23223, (q31_t)0x7cb0c6e4, (q31_t)0x7caf5b57, (q31_t)0x7cadef7e, (q31_t)0x7cac8358,
+ (q31_t)0x7cab16e4, (q31_t)0x7ca9aa24, (q31_t)0x7ca83d17, (q31_t)0x7ca6cfbd, (q31_t)0x7ca56216, (q31_t)0x7ca3f423, (q31_t)0x7ca285e2, (q31_t)0x7ca11755,
+ (q31_t)0x7c9fa87a, (q31_t)0x7c9e3953, (q31_t)0x7c9cc9df, (q31_t)0x7c9b5a1e, (q31_t)0x7c99ea10, (q31_t)0x7c9879b6, (q31_t)0x7c97090e, (q31_t)0x7c95981a,
+ (q31_t)0x7c9426d8, (q31_t)0x7c92b54a, (q31_t)0x7c91436f, (q31_t)0x7c8fd148, (q31_t)0x7c8e5ed3, (q31_t)0x7c8cec12, (q31_t)0x7c8b7903, (q31_t)0x7c8a05a8,
+ (q31_t)0x7c889200, (q31_t)0x7c871e0c, (q31_t)0x7c85a9ca, (q31_t)0x7c84353c, (q31_t)0x7c82c060, (q31_t)0x7c814b39, (q31_t)0x7c7fd5c4, (q31_t)0x7c7e6002,
+ (q31_t)0x7c7ce9f4, (q31_t)0x7c7b7399, (q31_t)0x7c79fcf1, (q31_t)0x7c7885fc, (q31_t)0x7c770eba, (q31_t)0x7c75972c, (q31_t)0x7c741f51, (q31_t)0x7c72a729,
+ (q31_t)0x7c712eb5, (q31_t)0x7c6fb5f3, (q31_t)0x7c6e3ce5, (q31_t)0x7c6cc38a, (q31_t)0x7c6b49e3, (q31_t)0x7c69cfee, (q31_t)0x7c6855ad, (q31_t)0x7c66db1f,
+ (q31_t)0x7c656045, (q31_t)0x7c63e51e, (q31_t)0x7c6269aa, (q31_t)0x7c60ede9, (q31_t)0x7c5f71db, (q31_t)0x7c5df581, (q31_t)0x7c5c78da, (q31_t)0x7c5afbe6,
+ (q31_t)0x7c597ea6, (q31_t)0x7c580119, (q31_t)0x7c56833f, (q31_t)0x7c550519, (q31_t)0x7c5386a6, (q31_t)0x7c5207e6, (q31_t)0x7c5088d9, (q31_t)0x7c4f0980,
+ (q31_t)0x7c4d89da, (q31_t)0x7c4c09e8, (q31_t)0x7c4a89a8, (q31_t)0x7c49091c, (q31_t)0x7c478844, (q31_t)0x7c46071f, (q31_t)0x7c4485ad, (q31_t)0x7c4303ee,
+ (q31_t)0x7c4181e3, (q31_t)0x7c3fff8b, (q31_t)0x7c3e7ce7, (q31_t)0x7c3cf9f5, (q31_t)0x7c3b76b8, (q31_t)0x7c39f32d, (q31_t)0x7c386f56, (q31_t)0x7c36eb33,
+ (q31_t)0x7c3566c2, (q31_t)0x7c33e205, (q31_t)0x7c325cfc, (q31_t)0x7c30d7a6, (q31_t)0x7c2f5203, (q31_t)0x7c2dcc14, (q31_t)0x7c2c45d8, (q31_t)0x7c2abf4f,
+ (q31_t)0x7c29387a, (q31_t)0x7c27b158, (q31_t)0x7c2629ea, (q31_t)0x7c24a22f, (q31_t)0x7c231a28, (q31_t)0x7c2191d4, (q31_t)0x7c200933, (q31_t)0x7c1e8046,
+ (q31_t)0x7c1cf70c, (q31_t)0x7c1b6d86, (q31_t)0x7c19e3b3, (q31_t)0x7c185994, (q31_t)0x7c16cf28, (q31_t)0x7c15446f, (q31_t)0x7c13b96a, (q31_t)0x7c122e19,
+ (q31_t)0x7c10a27b, (q31_t)0x7c0f1690, (q31_t)0x7c0d8a59, (q31_t)0x7c0bfdd5, (q31_t)0x7c0a7105, (q31_t)0x7c08e3e8, (q31_t)0x7c07567f, (q31_t)0x7c05c8c9,
+ (q31_t)0x7c043ac7, (q31_t)0x7c02ac78, (q31_t)0x7c011ddd, (q31_t)0x7bff8ef5, (q31_t)0x7bfdffc1, (q31_t)0x7bfc7041, (q31_t)0x7bfae073, (q31_t)0x7bf9505a,
+ (q31_t)0x7bf7bff4, (q31_t)0x7bf62f41, (q31_t)0x7bf49e42, (q31_t)0x7bf30cf6, (q31_t)0x7bf17b5e, (q31_t)0x7befe97a, (q31_t)0x7bee5749, (q31_t)0x7becc4cc,
+ (q31_t)0x7beb3202, (q31_t)0x7be99eec, (q31_t)0x7be80b89, (q31_t)0x7be677da, (q31_t)0x7be4e3df, (q31_t)0x7be34f97, (q31_t)0x7be1bb02, (q31_t)0x7be02621,
+ (q31_t)0x7bde90f4, (q31_t)0x7bdcfb7b, (q31_t)0x7bdb65b5, (q31_t)0x7bd9cfa2, (q31_t)0x7bd83944, (q31_t)0x7bd6a298, (q31_t)0x7bd50ba1, (q31_t)0x7bd3745d,
+ (q31_t)0x7bd1dccc, (q31_t)0x7bd044f0, (q31_t)0x7bceacc7, (q31_t)0x7bcd1451, (q31_t)0x7bcb7b8f, (q31_t)0x7bc9e281, (q31_t)0x7bc84927, (q31_t)0x7bc6af80,
+ (q31_t)0x7bc5158c, (q31_t)0x7bc37b4d, (q31_t)0x7bc1e0c1, (q31_t)0x7bc045e9, (q31_t)0x7bbeaac4, (q31_t)0x7bbd0f53, (q31_t)0x7bbb7396, (q31_t)0x7bb9d78c,
+ (q31_t)0x7bb83b36, (q31_t)0x7bb69e94, (q31_t)0x7bb501a5, (q31_t)0x7bb3646a, (q31_t)0x7bb1c6e3, (q31_t)0x7bb02910, (q31_t)0x7bae8af0, (q31_t)0x7bacec84,
+ (q31_t)0x7bab4dcc, (q31_t)0x7ba9aec7, (q31_t)0x7ba80f76, (q31_t)0x7ba66fd9, (q31_t)0x7ba4cfef, (q31_t)0x7ba32fba, (q31_t)0x7ba18f38, (q31_t)0x7b9fee69,
+ (q31_t)0x7b9e4d4f, (q31_t)0x7b9cabe8, (q31_t)0x7b9b0a35, (q31_t)0x7b996836, (q31_t)0x7b97c5ea, (q31_t)0x7b962352, (q31_t)0x7b94806e, (q31_t)0x7b92dd3e,
+ (q31_t)0x7b9139c2, (q31_t)0x7b8f95f9, (q31_t)0x7b8df1e4, (q31_t)0x7b8c4d83, (q31_t)0x7b8aa8d6, (q31_t)0x7b8903dc, (q31_t)0x7b875e96, (q31_t)0x7b85b904,
+ (q31_t)0x7b841326, (q31_t)0x7b826cfc, (q31_t)0x7b80c686, (q31_t)0x7b7f1fc3, (q31_t)0x7b7d78b4, (q31_t)0x7b7bd159, (q31_t)0x7b7a29b2, (q31_t)0x7b7881be,
+ (q31_t)0x7b76d97f, (q31_t)0x7b7530f3, (q31_t)0x7b73881b, (q31_t)0x7b71def7, (q31_t)0x7b703587, (q31_t)0x7b6e8bcb, (q31_t)0x7b6ce1c2, (q31_t)0x7b6b376e,
+ (q31_t)0x7b698ccd, (q31_t)0x7b67e1e0, (q31_t)0x7b6636a7, (q31_t)0x7b648b22, (q31_t)0x7b62df51, (q31_t)0x7b613334, (q31_t)0x7b5f86ca, (q31_t)0x7b5dda15,
+ (q31_t)0x7b5c2d13, (q31_t)0x7b5a7fc6, (q31_t)0x7b58d22c, (q31_t)0x7b572446, (q31_t)0x7b557614, (q31_t)0x7b53c796, (q31_t)0x7b5218cc, (q31_t)0x7b5069b6,
+ (q31_t)0x7b4eba53, (q31_t)0x7b4d0aa5, (q31_t)0x7b4b5aab, (q31_t)0x7b49aa64, (q31_t)0x7b47f9d2, (q31_t)0x7b4648f3, (q31_t)0x7b4497c9, (q31_t)0x7b42e652,
+ (q31_t)0x7b413490, (q31_t)0x7b3f8281, (q31_t)0x7b3dd026, (q31_t)0x7b3c1d80, (q31_t)0x7b3a6a8d, (q31_t)0x7b38b74e, (q31_t)0x7b3703c3, (q31_t)0x7b354fed,
+ (q31_t)0x7b339bca, (q31_t)0x7b31e75b, (q31_t)0x7b3032a0, (q31_t)0x7b2e7d9a, (q31_t)0x7b2cc847, (q31_t)0x7b2b12a8, (q31_t)0x7b295cbe, (q31_t)0x7b27a687,
+ (q31_t)0x7b25f004, (q31_t)0x7b243936, (q31_t)0x7b22821b, (q31_t)0x7b20cab5, (q31_t)0x7b1f1302, (q31_t)0x7b1d5b04, (q31_t)0x7b1ba2b9, (q31_t)0x7b19ea23,
+ (q31_t)0x7b183141, (q31_t)0x7b167813, (q31_t)0x7b14be99, (q31_t)0x7b1304d3, (q31_t)0x7b114ac1, (q31_t)0x7b0f9063, (q31_t)0x7b0dd5b9, (q31_t)0x7b0c1ac4,
+ (q31_t)0x7b0a5f82, (q31_t)0x7b08a3f5, (q31_t)0x7b06e81b, (q31_t)0x7b052bf6, (q31_t)0x7b036f85, (q31_t)0x7b01b2c8, (q31_t)0x7afff5bf, (q31_t)0x7afe386a,
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+ (q31_t)0x6ef9ce57, (q31_t)0x6ef6acad, (q31_t)0x6ef38abe, (q31_t)0x6ef0688b, (q31_t)0x6eed4614, (q31_t)0x6eea2358, (q31_t)0x6ee70058, (q31_t)0x6ee3dd13,
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+ (q31_t)0x6e62515d, (q31_t)0x6e5f22e6, (q31_t)0x6e5bf42b, (q31_t)0x6e58c52c, (q31_t)0x6e5595e9, (q31_t)0x6e526662, (q31_t)0x6e4f3696, (q31_t)0x6e4c0687,
+ (q31_t)0x6e48d633, (q31_t)0x6e45a59c, (q31_t)0x6e4274c1, (q31_t)0x6e3f43a1, (q31_t)0x6e3c123e, (q31_t)0x6e38e096, (q31_t)0x6e35aeab, (q31_t)0x6e327c7b,
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+ (q31_t)0x6d949cb7, (q31_t)0x6d915d4a, (q31_t)0x6d8e1d9a, (q31_t)0x6d8adda6, (q31_t)0x6d879d6e, (q31_t)0x6d845cf3, (q31_t)0x6d811c35, (q31_t)0x6d7ddb33,
+ (q31_t)0x6d7a99ed, (q31_t)0x6d775864, (q31_t)0x6d741697, (q31_t)0x6d70d487, (q31_t)0x6d6d9233, (q31_t)0x6d6a4f9c, (q31_t)0x6d670cc1, (q31_t)0x6d63c9a3,
+ (q31_t)0x6d608641, (q31_t)0x6d5d429c, (q31_t)0x6d59feb3, (q31_t)0x6d56ba87, (q31_t)0x6d537617, (q31_t)0x6d503164, (q31_t)0x6d4cec6e, (q31_t)0x6d49a734,
+ (q31_t)0x6d4661b7, (q31_t)0x6d431bf6, (q31_t)0x6d3fd5f2, (q31_t)0x6d3c8fab, (q31_t)0x6d394920, (q31_t)0x6d360252, (q31_t)0x6d32bb40, (q31_t)0x6d2f73eb,
+ (q31_t)0x6d2c2c53, (q31_t)0x6d28e477, (q31_t)0x6d259c58, (q31_t)0x6d2253f6, (q31_t)0x6d1f0b50, (q31_t)0x6d1bc267, (q31_t)0x6d18793b, (q31_t)0x6d152fcc,
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+ (q31_t)0x6cf78f0d, (q31_t)0x6cf442fd, (q31_t)0x6cf0f6aa, (q31_t)0x6cedaa13, (q31_t)0x6cea5d3a, (q31_t)0x6ce7101d, (q31_t)0x6ce3c2bd, (q31_t)0x6ce0751a,
+ (q31_t)0x6cdd2733, (q31_t)0x6cd9d90a, (q31_t)0x6cd68a9d, (q31_t)0x6cd33bed, (q31_t)0x6ccfecfa, (q31_t)0x6ccc9dc4, (q31_t)0x6cc94e4b, (q31_t)0x6cc5fe8f,
+ (q31_t)0x6cc2ae90, (q31_t)0x6cbf5e4d, (q31_t)0x6cbc0dc8, (q31_t)0x6cb8bcff, (q31_t)0x6cb56bf4, (q31_t)0x6cb21aa5, (q31_t)0x6caec913, (q31_t)0x6cab773e,
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+ (q31_t)0x6c72e013, (q31_t)0x6c6f8989, (q31_t)0x6c6c32bc, (q31_t)0x6c68dbac, (q31_t)0x6c658459, (q31_t)0x6c622cc4, (q31_t)0x6c5ed4eb, (q31_t)0x6c5b7cd0,
+ (q31_t)0x6c582472, (q31_t)0x6c54cbd1, (q31_t)0x6c5172ed, (q31_t)0x6c4e19c6, (q31_t)0x6c4ac05d, (q31_t)0x6c4766b0, (q31_t)0x6c440cc1, (q31_t)0x6c40b28f,
+ (q31_t)0x6c3d581b, (q31_t)0x6c39fd63, (q31_t)0x6c36a269, (q31_t)0x6c33472c, (q31_t)0x6c2febad, (q31_t)0x6c2c8fea, (q31_t)0x6c2933e5, (q31_t)0x6c25d79d,
+ (q31_t)0x6c227b13, (q31_t)0x6c1f1e45, (q31_t)0x6c1bc136, (q31_t)0x6c1863e3, (q31_t)0x6c15064e, (q31_t)0x6c11a876, (q31_t)0x6c0e4a5b, (q31_t)0x6c0aebfe,
+ (q31_t)0x6c078d5e, (q31_t)0x6c042e7b, (q31_t)0x6c00cf56, (q31_t)0x6bfd6fee, (q31_t)0x6bfa1044, (q31_t)0x6bf6b056, (q31_t)0x6bf35027, (q31_t)0x6befefb5,
+ (q31_t)0x6bec8f00, (q31_t)0x6be92e08, (q31_t)0x6be5ccce, (q31_t)0x6be26b52, (q31_t)0x6bdf0993, (q31_t)0x6bdba791, (q31_t)0x6bd8454d, (q31_t)0x6bd4e2c6,
+ (q31_t)0x6bd17ffd, (q31_t)0x6bce1cf1, (q31_t)0x6bcab9a3, (q31_t)0x6bc75613, (q31_t)0x6bc3f23f, (q31_t)0x6bc08e2a, (q31_t)0x6bbd29d2, (q31_t)0x6bb9c537,
+ (q31_t)0x6bb6605a, (q31_t)0x6bb2fb3b, (q31_t)0x6baf95d9, (q31_t)0x6bac3034, (q31_t)0x6ba8ca4e, (q31_t)0x6ba56425, (q31_t)0x6ba1fdb9, (q31_t)0x6b9e970b,
+ (q31_t)0x6b9b301b, (q31_t)0x6b97c8e8, (q31_t)0x6b946173, (q31_t)0x6b90f9bc, (q31_t)0x6b8d91c2, (q31_t)0x6b8a2986, (q31_t)0x6b86c107, (q31_t)0x6b835846,
+ (q31_t)0x6b7fef43, (q31_t)0x6b7c85fe, (q31_t)0x6b791c76, (q31_t)0x6b75b2ac, (q31_t)0x6b7248a0, (q31_t)0x6b6ede51, (q31_t)0x6b6b73c0, (q31_t)0x6b6808ed,
+ (q31_t)0x6b649dd8, (q31_t)0x6b613280, (q31_t)0x6b5dc6e6, (q31_t)0x6b5a5b0a, (q31_t)0x6b56eeec, (q31_t)0x6b53828b, (q31_t)0x6b5015e9, (q31_t)0x6b4ca904,
+ (q31_t)0x6b493bdd, (q31_t)0x6b45ce73, (q31_t)0x6b4260c8, (q31_t)0x6b3ef2da, (q31_t)0x6b3b84ab, (q31_t)0x6b381639, (q31_t)0x6b34a785, (q31_t)0x6b31388e,
+ (q31_t)0x6b2dc956, (q31_t)0x6b2a59dc, (q31_t)0x6b26ea1f, (q31_t)0x6b237a21, (q31_t)0x6b2009e0, (q31_t)0x6b1c995d, (q31_t)0x6b192898, (q31_t)0x6b15b791,
+ (q31_t)0x6b124648, (q31_t)0x6b0ed4bd, (q31_t)0x6b0b62f0, (q31_t)0x6b07f0e1, (q31_t)0x6b047e90, (q31_t)0x6b010bfd, (q31_t)0x6afd9928, (q31_t)0x6afa2610,
+ (q31_t)0x6af6b2b7, (q31_t)0x6af33f1c, (q31_t)0x6aefcb3f, (q31_t)0x6aec5720, (q31_t)0x6ae8e2bf, (q31_t)0x6ae56e1c, (q31_t)0x6ae1f937, (q31_t)0x6ade8410,
+ (q31_t)0x6adb0ea8, (q31_t)0x6ad798fd, (q31_t)0x6ad42311, (q31_t)0x6ad0ace2, (q31_t)0x6acd3672, (q31_t)0x6ac9bfc0, (q31_t)0x6ac648cb, (q31_t)0x6ac2d195,
+ (q31_t)0x6abf5a1e, (q31_t)0x6abbe264, (q31_t)0x6ab86a68, (q31_t)0x6ab4f22b, (q31_t)0x6ab179ac, (q31_t)0x6aae00eb, (q31_t)0x6aaa87e8, (q31_t)0x6aa70ea4,
+ (q31_t)0x6aa3951d, (q31_t)0x6aa01b55, (q31_t)0x6a9ca14b, (q31_t)0x6a992700, (q31_t)0x6a95ac72, (q31_t)0x6a9231a3, (q31_t)0x6a8eb692, (q31_t)0x6a8b3b3f,
+ (q31_t)0x6a87bfab, (q31_t)0x6a8443d5, (q31_t)0x6a80c7bd, (q31_t)0x6a7d4b64, (q31_t)0x6a79cec8, (q31_t)0x6a7651ec, (q31_t)0x6a72d4cd, (q31_t)0x6a6f576d,
+ (q31_t)0x6a6bd9cb, (q31_t)0x6a685be8, (q31_t)0x6a64ddc2, (q31_t)0x6a615f5c, (q31_t)0x6a5de0b3, (q31_t)0x6a5a61c9, (q31_t)0x6a56e29e, (q31_t)0x6a536331,
+ (q31_t)0x6a4fe382, (q31_t)0x6a4c6391, (q31_t)0x6a48e360, (q31_t)0x6a4562ec, (q31_t)0x6a41e237, (q31_t)0x6a3e6140, (q31_t)0x6a3ae008, (q31_t)0x6a375e8f,
+ (q31_t)0x6a33dcd4, (q31_t)0x6a305ad7, (q31_t)0x6a2cd899, (q31_t)0x6a295619, (q31_t)0x6a25d358, (q31_t)0x6a225055, (q31_t)0x6a1ecd11, (q31_t)0x6a1b498c,
+ (q31_t)0x6a17c5c5, (q31_t)0x6a1441bc, (q31_t)0x6a10bd72, (q31_t)0x6a0d38e7, (q31_t)0x6a09b41a, (q31_t)0x6a062f0c, (q31_t)0x6a02a9bc, (q31_t)0x69ff242b,
+ (q31_t)0x69fb9e59, (q31_t)0x69f81845, (q31_t)0x69f491f0, (q31_t)0x69f10b5a, (q31_t)0x69ed8482, (q31_t)0x69e9fd69, (q31_t)0x69e6760f, (q31_t)0x69e2ee73,
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+ (q31_t)0x69a6c618, (q31_t)0x69a339e6, (q31_t)0x699fad73, (q31_t)0x699c20be, (q31_t)0x699893c9, (q31_t)0x69950692, (q31_t)0x6991791a, (q31_t)0x698deb61,
+ (q31_t)0x698a5d67, (q31_t)0x6986cf2c, (q31_t)0x698340af, (q31_t)0x697fb1f2, (q31_t)0x697c22f3, (q31_t)0x697893b4, (q31_t)0x69750433, (q31_t)0x69717472,
+ (q31_t)0x696de46f, (q31_t)0x696a542b, (q31_t)0x6966c3a6, (q31_t)0x696332e1, (q31_t)0x695fa1da, (q31_t)0x695c1092, (q31_t)0x69587f09, (q31_t)0x6954ed40,
+ (q31_t)0x69515b35, (q31_t)0x694dc8e9, (q31_t)0x694a365c, (q31_t)0x6946a38f, (q31_t)0x69431080, (q31_t)0x693f7d31, (q31_t)0x693be9a0, (q31_t)0x693855cf,
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+ (q31_t)0x6918180c, (q31_t)0x691481b2, (q31_t)0x6910eb17, (q31_t)0x690d543b, (q31_t)0x6909bd1f, (q31_t)0x690625c2, (q31_t)0x69028e24, (q31_t)0x68fef645,
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+ (q31_t)0x68de940f, (q31_t)0x68daf9a9, (q31_t)0x68d75f02, (q31_t)0x68d3c41b, (q31_t)0x68d028f2, (q31_t)0x68cc8d8a, (q31_t)0x68c8f1e0, (q31_t)0x68c555f6,
+ (q31_t)0x68c1b9cc, (q31_t)0x68be1d61, (q31_t)0x68ba80b5, (q31_t)0x68b6e3c8, (q31_t)0x68b3469b, (q31_t)0x68afa92e, (q31_t)0x68ac0b7f, (q31_t)0x68a86d91,
+ (q31_t)0x68a4cf61, (q31_t)0x68a130f1, (q31_t)0x689d9241, (q31_t)0x6899f350, (q31_t)0x6896541f, (q31_t)0x6892b4ad, (q31_t)0x688f14fa, (q31_t)0x688b7507,
+ (q31_t)0x6887d4d4, (q31_t)0x68843460, (q31_t)0x688093ab, (q31_t)0x687cf2b6, (q31_t)0x68795181, (q31_t)0x6875b00b, (q31_t)0x68720e55, (q31_t)0x686e6c5e,
+ (q31_t)0x686aca27, (q31_t)0x686727b0, (q31_t)0x686384f8, (q31_t)0x685fe200, (q31_t)0x685c3ec7, (q31_t)0x68589b4e, (q31_t)0x6854f795, (q31_t)0x6851539b,
+ (q31_t)0x684daf61, (q31_t)0x684a0ae6, (q31_t)0x6846662c, (q31_t)0x6842c131, (q31_t)0x683f1bf5, (q31_t)0x683b7679, (q31_t)0x6837d0bd, (q31_t)0x68342ac1,
+ (q31_t)0x68308485, (q31_t)0x682cde08, (q31_t)0x6829374b, (q31_t)0x6825904d, (q31_t)0x6821e910, (q31_t)0x681e4192, (q31_t)0x681a99d4, (q31_t)0x6816f1d6,
+ (q31_t)0x68134997, (q31_t)0x680fa118, (q31_t)0x680bf85a, (q31_t)0x68084f5a, (q31_t)0x6804a61b, (q31_t)0x6800fc9c, (q31_t)0x67fd52dc, (q31_t)0x67f9a8dd,
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+ (q31_t)0x67d8a39a, (q31_t)0x67d4f71a, (q31_t)0x67d14a59, (q31_t)0x67cd9d58, (q31_t)0x67c9f017, (q31_t)0x67c64297, (q31_t)0x67c294d6, (q31_t)0x67bee6d5,
+ (q31_t)0x67bb3894, (q31_t)0x67b78a13, (q31_t)0x67b3db53, (q31_t)0x67b02c52, (q31_t)0x67ac7d11, (q31_t)0x67a8cd91, (q31_t)0x67a51dd0, (q31_t)0x67a16dcf,
+ (q31_t)0x679dbd8f, (q31_t)0x679a0d0f, (q31_t)0x67965c4e, (q31_t)0x6792ab4e, (q31_t)0x678efa0e, (q31_t)0x678b488e, (q31_t)0x678796ce, (q31_t)0x6783e4cf,
+ (q31_t)0x6780328f, (q31_t)0x677c8010, (q31_t)0x6778cd50, (q31_t)0x67751a51, (q31_t)0x67716713, (q31_t)0x676db394, (q31_t)0x6769ffd5, (q31_t)0x67664bd7,
+ (q31_t)0x67629799, (q31_t)0x675ee31b, (q31_t)0x675b2e5e, (q31_t)0x67577960, (q31_t)0x6753c423, (q31_t)0x67500ea7, (q31_t)0x674c58ea, (q31_t)0x6748a2ee,
+ (q31_t)0x6744ecb2, (q31_t)0x67413636, (q31_t)0x673d7f7b, (q31_t)0x6739c880, (q31_t)0x67361145, (q31_t)0x673259ca, (q31_t)0x672ea210, (q31_t)0x672aea17,
+ (q31_t)0x672731dd, (q31_t)0x67237964, (q31_t)0x671fc0ac, (q31_t)0x671c07b4, (q31_t)0x67184e7c, (q31_t)0x67149504, (q31_t)0x6710db4d, (q31_t)0x670d2157,
+ (q31_t)0x67096721, (q31_t)0x6705acab, (q31_t)0x6701f1f6, (q31_t)0x66fe3701, (q31_t)0x66fa7bcd, (q31_t)0x66f6c059, (q31_t)0x66f304a6, (q31_t)0x66ef48b3,
+ (q31_t)0x66eb8c80, (q31_t)0x66e7d00f, (q31_t)0x66e4135d, (q31_t)0x66e0566c, (q31_t)0x66dc993c, (q31_t)0x66d8dbcd, (q31_t)0x66d51e1d, (q31_t)0x66d1602f,
+ (q31_t)0x66cda201, (q31_t)0x66c9e393, (q31_t)0x66c624e7, (q31_t)0x66c265fa, (q31_t)0x66bea6cf, (q31_t)0x66bae764, (q31_t)0x66b727ba, (q31_t)0x66b367d0,
+ (q31_t)0x66afa7a7, (q31_t)0x66abe73f, (q31_t)0x66a82697, (q31_t)0x66a465b0, (q31_t)0x66a0a489, (q31_t)0x669ce324, (q31_t)0x6699217f, (q31_t)0x66955f9b,
+ (q31_t)0x66919d77, (q31_t)0x668ddb14, (q31_t)0x668a1872, (q31_t)0x66865591, (q31_t)0x66829270, (q31_t)0x667ecf11, (q31_t)0x667b0b72, (q31_t)0x66774793,
+ (q31_t)0x66738376, (q31_t)0x666fbf19, (q31_t)0x666bfa7d, (q31_t)0x666835a2, (q31_t)0x66647088, (q31_t)0x6660ab2f, (q31_t)0x665ce596, (q31_t)0x66591fbf,
+ (q31_t)0x665559a8, (q31_t)0x66519352, (q31_t)0x664dccbd, (q31_t)0x664a05e9, (q31_t)0x66463ed6, (q31_t)0x66427784, (q31_t)0x663eaff2, (q31_t)0x663ae822,
+ (q31_t)0x66372012, (q31_t)0x663357c4, (q31_t)0x662f8f36, (q31_t)0x662bc66a, (q31_t)0x6627fd5e, (q31_t)0x66243413, (q31_t)0x66206a8a, (q31_t)0x661ca0c1,
+ (q31_t)0x6618d6b9, (q31_t)0x66150c73, (q31_t)0x661141ed, (q31_t)0x660d7729, (q31_t)0x6609ac25, (q31_t)0x6605e0e3, (q31_t)0x66021561, (q31_t)0x65fe49a1,
+ (q31_t)0x65fa7da2, (q31_t)0x65f6b164, (q31_t)0x65f2e4e7, (q31_t)0x65ef182b, (q31_t)0x65eb4b30, (q31_t)0x65e77df6, (q31_t)0x65e3b07e, (q31_t)0x65dfe2c6,
+ (q31_t)0x65dc14d0, (q31_t)0x65d8469b, (q31_t)0x65d47827, (q31_t)0x65d0a975, (q31_t)0x65ccda83, (q31_t)0x65c90b53, (q31_t)0x65c53be4, (q31_t)0x65c16c36,
+ (q31_t)0x65bd9c49, (q31_t)0x65b9cc1e, (q31_t)0x65b5fbb4, (q31_t)0x65b22b0b, (q31_t)0x65ae5a23, (q31_t)0x65aa88fd, (q31_t)0x65a6b798, (q31_t)0x65a2e5f4,
+ (q31_t)0x659f1412, (q31_t)0x659b41f1, (q31_t)0x65976f91, (q31_t)0x65939cf3, (q31_t)0x658fca15, (q31_t)0x658bf6fa, (q31_t)0x6588239f, (q31_t)0x65845006,
+ (q31_t)0x65807c2f, (q31_t)0x657ca818, (q31_t)0x6578d3c4, (q31_t)0x6574ff30, (q31_t)0x65712a5e, (q31_t)0x656d554d, (q31_t)0x65697ffe, (q31_t)0x6565aa71,
+ (q31_t)0x6561d4a4, (q31_t)0x655dfe99, (q31_t)0x655a2850, (q31_t)0x655651c8, (q31_t)0x65527b02, (q31_t)0x654ea3fd, (q31_t)0x654accba, (q31_t)0x6546f538,
+ (q31_t)0x65431d77, (q31_t)0x653f4579, (q31_t)0x653b6d3b, (q31_t)0x653794c0, (q31_t)0x6533bc06, (q31_t)0x652fe30d, (q31_t)0x652c09d6, (q31_t)0x65283061,
+ (q31_t)0x652456ad, (q31_t)0x65207cbb, (q31_t)0x651ca28a, (q31_t)0x6518c81b, (q31_t)0x6514ed6e, (q31_t)0x65111283, (q31_t)0x650d3759, (q31_t)0x65095bf0,
+ (q31_t)0x6505804a, (q31_t)0x6501a465, (q31_t)0x64fdc841, (q31_t)0x64f9ebe0, (q31_t)0x64f60f40, (q31_t)0x64f23262, (q31_t)0x64ee5546, (q31_t)0x64ea77eb,
+ (q31_t)0x64e69a52, (q31_t)0x64e2bc7b, (q31_t)0x64dede66, (q31_t)0x64db0012, (q31_t)0x64d72180, (q31_t)0x64d342b0, (q31_t)0x64cf63a2, (q31_t)0x64cb8456,
+ (q31_t)0x64c7a4cb, (q31_t)0x64c3c502, (q31_t)0x64bfe4fc, (q31_t)0x64bc04b6, (q31_t)0x64b82433, (q31_t)0x64b44372, (q31_t)0x64b06273, (q31_t)0x64ac8135,
+ (q31_t)0x64a89fba, (q31_t)0x64a4be00, (q31_t)0x64a0dc08, (q31_t)0x649cf9d2, (q31_t)0x6499175e, (q31_t)0x649534ac, (q31_t)0x649151bc, (q31_t)0x648d6e8e,
+ (q31_t)0x64898b22, (q31_t)0x6485a778, (q31_t)0x6481c390, (q31_t)0x647ddf6a, (q31_t)0x6479fb06, (q31_t)0x64761664, (q31_t)0x64723184, (q31_t)0x646e4c66,
+ (q31_t)0x646a670a, (q31_t)0x64668170, (q31_t)0x64629b98, (q31_t)0x645eb582, (q31_t)0x645acf2e, (q31_t)0x6456e89d, (q31_t)0x645301cd, (q31_t)0x644f1ac0,
+ (q31_t)0x644b3375, (q31_t)0x64474bec, (q31_t)0x64436425, (q31_t)0x643f7c20, (q31_t)0x643b93dd, (q31_t)0x6437ab5d, (q31_t)0x6433c29f, (q31_t)0x642fd9a3,
+ (q31_t)0x642bf069, (q31_t)0x642806f1, (q31_t)0x64241d3c, (q31_t)0x64203348, (q31_t)0x641c4917, (q31_t)0x64185ea9, (q31_t)0x641473fc, (q31_t)0x64108912,
+ (q31_t)0x640c9dea, (q31_t)0x6408b284, (q31_t)0x6404c6e1, (q31_t)0x6400db00, (q31_t)0x63fceee1, (q31_t)0x63f90285, (q31_t)0x63f515eb, (q31_t)0x63f12913,
+ (q31_t)0x63ed3bfd, (q31_t)0x63e94eaa, (q31_t)0x63e5611a, (q31_t)0x63e1734b, (q31_t)0x63dd853f, (q31_t)0x63d996f6, (q31_t)0x63d5a86f, (q31_t)0x63d1b9aa,
+ (q31_t)0x63cdcaa8, (q31_t)0x63c9db68, (q31_t)0x63c5ebeb, (q31_t)0x63c1fc30, (q31_t)0x63be0c37, (q31_t)0x63ba1c01, (q31_t)0x63b62b8e, (q31_t)0x63b23add,
+ (q31_t)0x63ae49ee, (q31_t)0x63aa58c2, (q31_t)0x63a66759, (q31_t)0x63a275b2, (q31_t)0x639e83cd, (q31_t)0x639a91ac, (q31_t)0x63969f4c, (q31_t)0x6392acaf,
+ (q31_t)0x638eb9d5, (q31_t)0x638ac6be, (q31_t)0x6386d369, (q31_t)0x6382dfd6, (q31_t)0x637eec07, (q31_t)0x637af7fa, (q31_t)0x637703af, (q31_t)0x63730f27,
+ (q31_t)0x636f1a62, (q31_t)0x636b2560, (q31_t)0x63673020, (q31_t)0x63633aa3, (q31_t)0x635f44e8, (q31_t)0x635b4ef0, (q31_t)0x635758bb, (q31_t)0x63536249,
+ (q31_t)0x634f6b99, (q31_t)0x634b74ad, (q31_t)0x63477d82, (q31_t)0x6343861b, (q31_t)0x633f8e76, (q31_t)0x633b9695, (q31_t)0x63379e76, (q31_t)0x6333a619,
+ (q31_t)0x632fad80, (q31_t)0x632bb4a9, (q31_t)0x6327bb96, (q31_t)0x6323c245, (q31_t)0x631fc8b7, (q31_t)0x631bceeb, (q31_t)0x6317d4e3, (q31_t)0x6313da9e,
+ (q31_t)0x630fe01b, (q31_t)0x630be55b, (q31_t)0x6307ea5e, (q31_t)0x6303ef25, (q31_t)0x62fff3ae, (q31_t)0x62fbf7fa, (q31_t)0x62f7fc08, (q31_t)0x62f3ffda,
+ (q31_t)0x62f0036f, (q31_t)0x62ec06c7, (q31_t)0x62e809e2, (q31_t)0x62e40cbf, (q31_t)0x62e00f60, (q31_t)0x62dc11c4, (q31_t)0x62d813eb, (q31_t)0x62d415d4,
+ (q31_t)0x62d01781, (q31_t)0x62cc18f1, (q31_t)0x62c81a24, (q31_t)0x62c41b1a, (q31_t)0x62c01bd3, (q31_t)0x62bc1c4f, (q31_t)0x62b81c8f, (q31_t)0x62b41c91,
+ (q31_t)0x62b01c57, (q31_t)0x62ac1bdf, (q31_t)0x62a81b2b, (q31_t)0x62a41a3a, (q31_t)0x62a0190c, (q31_t)0x629c17a1, (q31_t)0x629815fa, (q31_t)0x62941415,
+ (q31_t)0x629011f4, (q31_t)0x628c0f96, (q31_t)0x62880cfb, (q31_t)0x62840a23, (q31_t)0x6280070f, (q31_t)0x627c03be, (q31_t)0x62780030, (q31_t)0x6273fc65,
+ (q31_t)0x626ff85e, (q31_t)0x626bf41a, (q31_t)0x6267ef99, (q31_t)0x6263eadc, (q31_t)0x625fe5e1, (q31_t)0x625be0ab, (q31_t)0x6257db37, (q31_t)0x6253d587,
+ (q31_t)0x624fcf9a, (q31_t)0x624bc970, (q31_t)0x6247c30a, (q31_t)0x6243bc68, (q31_t)0x623fb588, (q31_t)0x623bae6c, (q31_t)0x6237a714, (q31_t)0x62339f7e,
+ (q31_t)0x622f97ad, (q31_t)0x622b8f9e, (q31_t)0x62278754, (q31_t)0x62237ecc, (q31_t)0x621f7608, (q31_t)0x621b6d08, (q31_t)0x621763cb, (q31_t)0x62135a51,
+ (q31_t)0x620f509b, (q31_t)0x620b46a9, (q31_t)0x62073c7a, (q31_t)0x6203320e, (q31_t)0x61ff2766, (q31_t)0x61fb1c82, (q31_t)0x61f71161, (q31_t)0x61f30604,
+ (q31_t)0x61eefa6b, (q31_t)0x61eaee95, (q31_t)0x61e6e282, (q31_t)0x61e2d633, (q31_t)0x61dec9a8, (q31_t)0x61dabce0, (q31_t)0x61d6afdd, (q31_t)0x61d2a29c,
+ (q31_t)0x61ce9520, (q31_t)0x61ca8767, (q31_t)0x61c67971, (q31_t)0x61c26b40, (q31_t)0x61be5cd2, (q31_t)0x61ba4e28, (q31_t)0x61b63f41, (q31_t)0x61b2301e,
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+ (q31_t)0x581c2798, (q31_t)0x581798bb, (q31_t)0x581309a9, (q31_t)0x580e7a60, (q31_t)0x5809eae1, (q31_t)0x58055b2b, (q31_t)0x5800cb3f, (q31_t)0x57fc3b1d,
+ (q31_t)0x57f7aac5, (q31_t)0x57f31a36, (q31_t)0x57ee8971, (q31_t)0x57e9f876, (q31_t)0x57e56744, (q31_t)0x57e0d5dd, (q31_t)0x57dc443f, (q31_t)0x57d7b26b,
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+ (q31_t)0x57ae8872, (q31_t)0x57a9f480, (q31_t)0x57a56059, (q31_t)0x57a0cbfb, (q31_t)0x579c3768, (q31_t)0x5797a29e, (q31_t)0x57930d9e, (q31_t)0x578e7869,
+ (q31_t)0x5789e2fd, (q31_t)0x57854d5b, (q31_t)0x5780b784, (q31_t)0x577c2176, (q31_t)0x57778b32, (q31_t)0x5772f4b9, (q31_t)0x576e5e09, (q31_t)0x5769c724,
+ (q31_t)0x57653009, (q31_t)0x576098b7, (q31_t)0x575c0130, (q31_t)0x57576973, (q31_t)0x5752d180, (q31_t)0x574e3957, (q31_t)0x5749a0f9, (q31_t)0x57450864,
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+ (q31_t)0x571ba1b7, (q31_t)0x57170708, (q31_t)0x57126c24, (q31_t)0x570dd10a, (q31_t)0x570935bb, (q31_t)0x57049a36, (q31_t)0x56fffe7b, (q31_t)0x56fb628b,
+ (q31_t)0x56f6c664, (q31_t)0x56f22a09, (q31_t)0x56ed8d77, (q31_t)0x56e8f0b0, (q31_t)0x56e453b4, (q31_t)0x56dfb681, (q31_t)0x56db1919, (q31_t)0x56d67b7c,
+ (q31_t)0x56d1dda9, (q31_t)0x56cd3fa1, (q31_t)0x56c8a162, (q31_t)0x56c402ef, (q31_t)0x56bf6446, (q31_t)0x56bac567, (q31_t)0x56b62653, (q31_t)0x56b18709,
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+ (q31_t)0x5687e40e, (q31_t)0x568342ae, (q31_t)0x567ea118, (q31_t)0x5679ff4e, (q31_t)0x56755d4e, (q31_t)0x5670bb19, (q31_t)0x566c18ae, (q31_t)0x5667760e,
+ (q31_t)0x5662d339, (q31_t)0x565e302e, (q31_t)0x56598cee, (q31_t)0x5654e979, (q31_t)0x565045cf, (q31_t)0x564ba1f0, (q31_t)0x5646fddb, (q31_t)0x56425991,
+ (q31_t)0x563db512, (q31_t)0x5639105d, (q31_t)0x56346b74, (q31_t)0x562fc655, (q31_t)0x562b2101, (q31_t)0x56267b78, (q31_t)0x5621d5ba, (q31_t)0x561d2fc6,
+ (q31_t)0x5618899e, (q31_t)0x5613e340, (q31_t)0x560f3cae, (q31_t)0x560a95e6, (q31_t)0x5605eee9, (q31_t)0x560147b7, (q31_t)0x55fca050, (q31_t)0x55f7f8b4,
+ (q31_t)0x55f350e3, (q31_t)0x55eea8dd, (q31_t)0x55ea00a2, (q31_t)0x55e55832, (q31_t)0x55e0af8d, (q31_t)0x55dc06b3, (q31_t)0x55d75da4, (q31_t)0x55d2b460,
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+ (q31_t)0x55a8b7b0, (q31_t)0x55a40c5b, (q31_t)0x559f60d1, (q31_t)0x559ab513, (q31_t)0x55960920, (q31_t)0x55915cf8, (q31_t)0x558cb09b, (q31_t)0x55880409,
+ (q31_t)0x55835743, (q31_t)0x557eaa48, (q31_t)0x5579fd18, (q31_t)0x55754fb3, (q31_t)0x5570a21a, (q31_t)0x556bf44c, (q31_t)0x55674649, (q31_t)0x55629812,
+ (q31_t)0x555de9a6, (q31_t)0x55593b05, (q31_t)0x55548c30, (q31_t)0x554fdd26, (q31_t)0x554b2de7, (q31_t)0x55467e74, (q31_t)0x5541cecc, (q31_t)0x553d1ef0,
+ (q31_t)0x55386edf, (q31_t)0x5533be99, (q31_t)0x552f0e1f, (q31_t)0x552a5d70, (q31_t)0x5525ac8d, (q31_t)0x5520fb75, (q31_t)0x551c4a29, (q31_t)0x551798a8,
+ (q31_t)0x5512e6f3, (q31_t)0x550e3509, (q31_t)0x550982eb, (q31_t)0x5504d099, (q31_t)0x55001e12, (q31_t)0x54fb6b56, (q31_t)0x54f6b866, (q31_t)0x54f20542,
+ (q31_t)0x54ed51e9, (q31_t)0x54e89e5c, (q31_t)0x54e3ea9a, (q31_t)0x54df36a5, (q31_t)0x54da827a, (q31_t)0x54d5ce1c, (q31_t)0x54d11989, (q31_t)0x54cc64c2,
+ (q31_t)0x54c7afc6, (q31_t)0x54c2fa96, (q31_t)0x54be4532, (q31_t)0x54b98f9a, (q31_t)0x54b4d9cd, (q31_t)0x54b023cc, (q31_t)0x54ab6d97, (q31_t)0x54a6b72e,
+ (q31_t)0x54a20090, (q31_t)0x549d49bf, (q31_t)0x549892b9, (q31_t)0x5493db7f, (q31_t)0x548f2410, (q31_t)0x548a6c6e, (q31_t)0x5485b497, (q31_t)0x5480fc8c,
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+ (q31_t)0x54567b03, (q31_t)0x5451c0f0, (q31_t)0x544d06a8, (q31_t)0x54484c2d, (q31_t)0x5443917d, (q31_t)0x543ed699, (q31_t)0x543a1b82, (q31_t)0x54356037,
+ (q31_t)0x5430a4b7, (q31_t)0x542be904, (q31_t)0x54272d1d, (q31_t)0x54227102, (q31_t)0x541db4b3, (q31_t)0x5418f830, (q31_t)0x54143b79, (q31_t)0x540f7e8e,
+ (q31_t)0x540ac170, (q31_t)0x5406041d, (q31_t)0x54014697, (q31_t)0x53fc88dd, (q31_t)0x53f7caef, (q31_t)0x53f30cce, (q31_t)0x53ee4e78, (q31_t)0x53e98fef,
+ (q31_t)0x53e4d132, (q31_t)0x53e01242, (q31_t)0x53db531d, (q31_t)0x53d693c5, (q31_t)0x53d1d439, (q31_t)0x53cd147a, (q31_t)0x53c85486, (q31_t)0x53c3945f,
+ (q31_t)0x53bed405, (q31_t)0x53ba1377, (q31_t)0x53b552b5, (q31_t)0x53b091bf, (q31_t)0x53abd096, (q31_t)0x53a70f39, (q31_t)0x53a24da9, (q31_t)0x539d8be5,
+ (q31_t)0x5398c9ed, (q31_t)0x539407c2, (q31_t)0x538f4564, (q31_t)0x538a82d1, (q31_t)0x5385c00c, (q31_t)0x5380fd12, (q31_t)0x537c39e6, (q31_t)0x53777685,
+ (q31_t)0x5372b2f2, (q31_t)0x536def2a, (q31_t)0x53692b30, (q31_t)0x53646701, (q31_t)0x535fa2a0, (q31_t)0x535ade0b, (q31_t)0x53561942, (q31_t)0x53515447,
+ (q31_t)0x534c8f17, (q31_t)0x5347c9b5, (q31_t)0x5343041f, (q31_t)0x533e3e55, (q31_t)0x53397859, (q31_t)0x5334b229, (q31_t)0x532febc5, (q31_t)0x532b252f,
+ (q31_t)0x53265e65, (q31_t)0x53219767, (q31_t)0x531cd037, (q31_t)0x531808d3, (q31_t)0x5313413c, (q31_t)0x530e7972, (q31_t)0x5309b174, (q31_t)0x5304e943,
+ (q31_t)0x530020df, (q31_t)0x52fb5848, (q31_t)0x52f68f7e, (q31_t)0x52f1c680, (q31_t)0x52ecfd4f, (q31_t)0x52e833ec, (q31_t)0x52e36a55, (q31_t)0x52dea08a,
+ (q31_t)0x52d9d68d, (q31_t)0x52d50c5d, (q31_t)0x52d041f9, (q31_t)0x52cb7763, (q31_t)0x52c6ac99, (q31_t)0x52c1e19d, (q31_t)0x52bd166d, (q31_t)0x52b84b0a,
+ (q31_t)0x52b37f74, (q31_t)0x52aeb3ac, (q31_t)0x52a9e7b0, (q31_t)0x52a51b81, (q31_t)0x52a04f1f, (q31_t)0x529b828a, (q31_t)0x5296b5c3, (q31_t)0x5291e8c8,
+ (q31_t)0x528d1b9b, (q31_t)0x52884e3a, (q31_t)0x528380a7, (q31_t)0x527eb2e0, (q31_t)0x5279e4e7, (q31_t)0x527516bb, (q31_t)0x5270485c, (q31_t)0x526b79ca,
+ (q31_t)0x5266ab06, (q31_t)0x5261dc0e, (q31_t)0x525d0ce4, (q31_t)0x52583d87, (q31_t)0x52536df7, (q31_t)0x524e9e34, (q31_t)0x5249ce3f, (q31_t)0x5244fe17,
+ (q31_t)0x52402dbc, (q31_t)0x523b5d2e, (q31_t)0x52368c6e, (q31_t)0x5231bb7b, (q31_t)0x522cea55, (q31_t)0x522818fc, (q31_t)0x52234771, (q31_t)0x521e75b3,
+ (q31_t)0x5219a3c3, (q31_t)0x5214d1a0, (q31_t)0x520fff4a, (q31_t)0x520b2cc2, (q31_t)0x52065a07, (q31_t)0x52018719, (q31_t)0x51fcb3f9, (q31_t)0x51f7e0a6,
+ (q31_t)0x51f30d21, (q31_t)0x51ee3969, (q31_t)0x51e9657e, (q31_t)0x51e49162, (q31_t)0x51dfbd12, (q31_t)0x51dae890, (q31_t)0x51d613dc, (q31_t)0x51d13ef5,
+ (q31_t)0x51cc69db, (q31_t)0x51c79490, (q31_t)0x51c2bf11, (q31_t)0x51bde960, (q31_t)0x51b9137d, (q31_t)0x51b43d68, (q31_t)0x51af6720, (q31_t)0x51aa90a5,
+ (q31_t)0x51a5b9f9, (q31_t)0x51a0e31a, (q31_t)0x519c0c08, (q31_t)0x519734c4, (q31_t)0x51925d4e, (q31_t)0x518d85a6, (q31_t)0x5188adcb, (q31_t)0x5183d5be,
+ (q31_t)0x517efd7f, (q31_t)0x517a250d, (q31_t)0x51754c69, (q31_t)0x51707393, (q31_t)0x516b9a8b, (q31_t)0x5166c150, (q31_t)0x5161e7e4, (q31_t)0x515d0e45,
+ (q31_t)0x51583473, (q31_t)0x51535a70, (q31_t)0x514e803b, (q31_t)0x5149a5d3, (q31_t)0x5144cb39, (q31_t)0x513ff06d, (q31_t)0x513b156f, (q31_t)0x51363a3f,
+ (q31_t)0x51315edd, (q31_t)0x512c8348, (q31_t)0x5127a782, (q31_t)0x5122cb8a, (q31_t)0x511def5f, (q31_t)0x51191302, (q31_t)0x51143674, (q31_t)0x510f59b3,
+ (q31_t)0x510a7cc1, (q31_t)0x51059f9c, (q31_t)0x5100c246, (q31_t)0x50fbe4bd, (q31_t)0x50f70703, (q31_t)0x50f22916, (q31_t)0x50ed4af8, (q31_t)0x50e86ca8,
+ (q31_t)0x50e38e25, (q31_t)0x50deaf71, (q31_t)0x50d9d08b, (q31_t)0x50d4f173, (q31_t)0x50d0122a, (q31_t)0x50cb32ae, (q31_t)0x50c65301, (q31_t)0x50c17322,
+ (q31_t)0x50bc9311, (q31_t)0x50b7b2ce, (q31_t)0x50b2d259, (q31_t)0x50adf1b3, (q31_t)0x50a910db, (q31_t)0x50a42fd1, (q31_t)0x509f4e95, (q31_t)0x509a6d28,
+ (q31_t)0x50958b88, (q31_t)0x5090a9b8, (q31_t)0x508bc7b5, (q31_t)0x5086e581, (q31_t)0x5082031b, (q31_t)0x507d2083, (q31_t)0x50783dba, (q31_t)0x50735abf,
+ (q31_t)0x506e7793, (q31_t)0x50699435, (q31_t)0x5064b0a5, (q31_t)0x505fcce4, (q31_t)0x505ae8f1, (q31_t)0x505604cd, (q31_t)0x50512077, (q31_t)0x504c3bef,
+ (q31_t)0x50475736, (q31_t)0x5042724c, (q31_t)0x503d8d30, (q31_t)0x5038a7e2, (q31_t)0x5033c263, (q31_t)0x502edcb2, (q31_t)0x5029f6d1, (q31_t)0x502510bd,
+ (q31_t)0x50202a78, (q31_t)0x501b4402, (q31_t)0x50165d5a, (q31_t)0x50117681, (q31_t)0x500c8f77, (q31_t)0x5007a83b, (q31_t)0x5002c0cd, (q31_t)0x4ffdd92f,
+ (q31_t)0x4ff8f15f, (q31_t)0x4ff4095e, (q31_t)0x4fef212b, (q31_t)0x4fea38c7, (q31_t)0x4fe55032, (q31_t)0x4fe0676c, (q31_t)0x4fdb7e74, (q31_t)0x4fd6954b,
+ (q31_t)0x4fd1abf0, (q31_t)0x4fccc265, (q31_t)0x4fc7d8a8, (q31_t)0x4fc2eeba, (q31_t)0x4fbe049b, (q31_t)0x4fb91a4b, (q31_t)0x4fb42fc9, (q31_t)0x4faf4517,
+ (q31_t)0x4faa5a33, (q31_t)0x4fa56f1e, (q31_t)0x4fa083d8, (q31_t)0x4f9b9861, (q31_t)0x4f96acb8, (q31_t)0x4f91c0df, (q31_t)0x4f8cd4d4, (q31_t)0x4f87e899,
+ (q31_t)0x4f82fc2c, (q31_t)0x4f7e0f8f, (q31_t)0x4f7922c0, (q31_t)0x4f7435c0, (q31_t)0x4f6f488f, (q31_t)0x4f6a5b2e, (q31_t)0x4f656d9b, (q31_t)0x4f607fd7,
+ (q31_t)0x4f5b91e3, (q31_t)0x4f56a3bd, (q31_t)0x4f51b566, (q31_t)0x4f4cc6df, (q31_t)0x4f47d827, (q31_t)0x4f42e93d, (q31_t)0x4f3dfa23, (q31_t)0x4f390ad8,
+ (q31_t)0x4f341b5c, (q31_t)0x4f2f2baf, (q31_t)0x4f2a3bd2, (q31_t)0x4f254bc3, (q31_t)0x4f205b84, (q31_t)0x4f1b6b14, (q31_t)0x4f167a73, (q31_t)0x4f1189a1,
+ (q31_t)0x4f0c989f, (q31_t)0x4f07a76b, (q31_t)0x4f02b608, (q31_t)0x4efdc473, (q31_t)0x4ef8d2ad, (q31_t)0x4ef3e0b7, (q31_t)0x4eeeee90, (q31_t)0x4ee9fc39,
+ (q31_t)0x4ee509b1, (q31_t)0x4ee016f8, (q31_t)0x4edb240e, (q31_t)0x4ed630f4, (q31_t)0x4ed13da9, (q31_t)0x4ecc4a2e, (q31_t)0x4ec75682, (q31_t)0x4ec262a5,
+ (q31_t)0x4ebd6e98, (q31_t)0x4eb87a5a, (q31_t)0x4eb385ec, (q31_t)0x4eae914d, (q31_t)0x4ea99c7d, (q31_t)0x4ea4a77d, (q31_t)0x4e9fb24d, (q31_t)0x4e9abcec,
+ (q31_t)0x4e95c75b, (q31_t)0x4e90d199, (q31_t)0x4e8bdba6, (q31_t)0x4e86e583, (q31_t)0x4e81ef30, (q31_t)0x4e7cf8ac, (q31_t)0x4e7801f8, (q31_t)0x4e730b14,
+ (q31_t)0x4e6e13ff, (q31_t)0x4e691cba, (q31_t)0x4e642544, (q31_t)0x4e5f2d9e, (q31_t)0x4e5a35c7, (q31_t)0x4e553dc1, (q31_t)0x4e50458a, (q31_t)0x4e4b4d22,
+ (q31_t)0x4e46548b, (q31_t)0x4e415bc3, (q31_t)0x4e3c62cb, (q31_t)0x4e3769a2, (q31_t)0x4e32704a, (q31_t)0x4e2d76c1, (q31_t)0x4e287d08, (q31_t)0x4e23831e,
+ (q31_t)0x4e1e8905, (q31_t)0x4e198ebb, (q31_t)0x4e149441, (q31_t)0x4e0f9997, (q31_t)0x4e0a9ebd, (q31_t)0x4e05a3b2, (q31_t)0x4e00a878, (q31_t)0x4dfbad0d,
+ (q31_t)0x4df6b173, (q31_t)0x4df1b5a8, (q31_t)0x4decb9ad, (q31_t)0x4de7bd82, (q31_t)0x4de2c127, (q31_t)0x4dddc49c, (q31_t)0x4dd8c7e1, (q31_t)0x4dd3caf6,
+ (q31_t)0x4dcecdda, (q31_t)0x4dc9d08f, (q31_t)0x4dc4d314, (q31_t)0x4dbfd569, (q31_t)0x4dbad78e, (q31_t)0x4db5d983, (q31_t)0x4db0db48, (q31_t)0x4dabdcdd,
+ (q31_t)0x4da6de43, (q31_t)0x4da1df78, (q31_t)0x4d9ce07d, (q31_t)0x4d97e153, (q31_t)0x4d92e1f9, (q31_t)0x4d8de26f, (q31_t)0x4d88e2b5, (q31_t)0x4d83e2cb,
+ (q31_t)0x4d7ee2b1, (q31_t)0x4d79e268, (q31_t)0x4d74e1ef, (q31_t)0x4d6fe146, (q31_t)0x4d6ae06d, (q31_t)0x4d65df64, (q31_t)0x4d60de2c, (q31_t)0x4d5bdcc4,
+ (q31_t)0x4d56db2d, (q31_t)0x4d51d965, (q31_t)0x4d4cd76e, (q31_t)0x4d47d547, (q31_t)0x4d42d2f1, (q31_t)0x4d3dd06b, (q31_t)0x4d38cdb5, (q31_t)0x4d33cad0,
+ (q31_t)0x4d2ec7bb, (q31_t)0x4d29c476, (q31_t)0x4d24c102, (q31_t)0x4d1fbd5e, (q31_t)0x4d1ab98b, (q31_t)0x4d15b588, (q31_t)0x4d10b155, (q31_t)0x4d0bacf3,
+ (q31_t)0x4d06a862, (q31_t)0x4d01a3a0, (q31_t)0x4cfc9eb0, (q31_t)0x4cf79990, (q31_t)0x4cf29440, (q31_t)0x4ced8ec1, (q31_t)0x4ce88913, (q31_t)0x4ce38335,
+ (q31_t)0x4cde7d28, (q31_t)0x4cd976eb, (q31_t)0x4cd4707f, (q31_t)0x4ccf69e3, (q31_t)0x4cca6318, (q31_t)0x4cc55c1e, (q31_t)0x4cc054f4, (q31_t)0x4cbb4d9b,
+ (q31_t)0x4cb64613, (q31_t)0x4cb13e5b, (q31_t)0x4cac3674, (q31_t)0x4ca72e5e, (q31_t)0x4ca22619, (q31_t)0x4c9d1da4, (q31_t)0x4c981500, (q31_t)0x4c930c2d,
+ (q31_t)0x4c8e032a, (q31_t)0x4c88f9f8, (q31_t)0x4c83f097, (q31_t)0x4c7ee707, (q31_t)0x4c79dd48, (q31_t)0x4c74d359, (q31_t)0x4c6fc93b, (q31_t)0x4c6abeef,
+ (q31_t)0x4c65b473, (q31_t)0x4c60a9c8, (q31_t)0x4c5b9eed, (q31_t)0x4c5693e4, (q31_t)0x4c5188ac, (q31_t)0x4c4c7d44, (q31_t)0x4c4771ae, (q31_t)0x4c4265e8,
+ (q31_t)0x4c3d59f3, (q31_t)0x4c384dd0, (q31_t)0x4c33417d, (q31_t)0x4c2e34fb, (q31_t)0x4c29284b, (q31_t)0x4c241b6b, (q31_t)0x4c1f0e5c, (q31_t)0x4c1a011f,
+ (q31_t)0x4c14f3b2, (q31_t)0x4c0fe617, (q31_t)0x4c0ad84c, (q31_t)0x4c05ca53, (q31_t)0x4c00bc2b, (q31_t)0x4bfbadd4, (q31_t)0x4bf69f4e, (q31_t)0x4bf19099,
+ (q31_t)0x4bec81b5, (q31_t)0x4be772a3, (q31_t)0x4be26362, (q31_t)0x4bdd53f2, (q31_t)0x4bd84453, (q31_t)0x4bd33485, (q31_t)0x4bce2488, (q31_t)0x4bc9145d,
+ (q31_t)0x4bc40403, (q31_t)0x4bbef37b, (q31_t)0x4bb9e2c3, (q31_t)0x4bb4d1dd, (q31_t)0x4bafc0c8, (q31_t)0x4baaaf85, (q31_t)0x4ba59e12, (q31_t)0x4ba08c72,
+ (q31_t)0x4b9b7aa2, (q31_t)0x4b9668a4, (q31_t)0x4b915677, (q31_t)0x4b8c441c, (q31_t)0x4b873192, (q31_t)0x4b821ed9, (q31_t)0x4b7d0bf2, (q31_t)0x4b77f8dc,
+ (q31_t)0x4b72e598, (q31_t)0x4b6dd225, (q31_t)0x4b68be84, (q31_t)0x4b63aab4, (q31_t)0x4b5e96b6, (q31_t)0x4b598289, (q31_t)0x4b546e2d, (q31_t)0x4b4f59a4,
+ (q31_t)0x4b4a44eb, (q31_t)0x4b453005, (q31_t)0x4b401aef, (q31_t)0x4b3b05ac, (q31_t)0x4b35f03a, (q31_t)0x4b30da9a, (q31_t)0x4b2bc4cb, (q31_t)0x4b26aece,
+ (q31_t)0x4b2198a2, (q31_t)0x4b1c8248, (q31_t)0x4b176bc0, (q31_t)0x4b12550a, (q31_t)0x4b0d3e25, (q31_t)0x4b082712, (q31_t)0x4b030fd1, (q31_t)0x4afdf861,
+ (q31_t)0x4af8e0c3, (q31_t)0x4af3c8f7, (q31_t)0x4aeeb0fd, (q31_t)0x4ae998d4, (q31_t)0x4ae4807d, (q31_t)0x4adf67f8, (q31_t)0x4ada4f45, (q31_t)0x4ad53664,
+ (q31_t)0x4ad01d54, (q31_t)0x4acb0417, (q31_t)0x4ac5eaab, (q31_t)0x4ac0d111, (q31_t)0x4abbb749, (q31_t)0x4ab69d53, (q31_t)0x4ab1832f, (q31_t)0x4aac68dc,
+ (q31_t)0x4aa74e5c, (q31_t)0x4aa233ae, (q31_t)0x4a9d18d1, (q31_t)0x4a97fdc7, (q31_t)0x4a92e28e, (q31_t)0x4a8dc728, (q31_t)0x4a88ab93, (q31_t)0x4a838fd1,
+ (q31_t)0x4a7e73e0, (q31_t)0x4a7957c2, (q31_t)0x4a743b76, (q31_t)0x4a6f1efc, (q31_t)0x4a6a0253, (q31_t)0x4a64e57d, (q31_t)0x4a5fc879, (q31_t)0x4a5aab48,
+ (q31_t)0x4a558de8, (q31_t)0x4a50705a, (q31_t)0x4a4b529f, (q31_t)0x4a4634b6, (q31_t)0x4a41169f, (q31_t)0x4a3bf85a, (q31_t)0x4a36d9e7, (q31_t)0x4a31bb47,
+ (q31_t)0x4a2c9c79, (q31_t)0x4a277d7d, (q31_t)0x4a225e53, (q31_t)0x4a1d3efc, (q31_t)0x4a181f77, (q31_t)0x4a12ffc4, (q31_t)0x4a0ddfe4, (q31_t)0x4a08bfd5,
+ (q31_t)0x4a039f9a, (q31_t)0x49fe7f30, (q31_t)0x49f95e99, (q31_t)0x49f43dd4, (q31_t)0x49ef1ce2, (q31_t)0x49e9fbc2, (q31_t)0x49e4da74, (q31_t)0x49dfb8f9,
+ (q31_t)0x49da9750, (q31_t)0x49d5757a, (q31_t)0x49d05376, (q31_t)0x49cb3145, (q31_t)0x49c60ee6, (q31_t)0x49c0ec59, (q31_t)0x49bbc9a0, (q31_t)0x49b6a6b8,
+ (q31_t)0x49b183a3, (q31_t)0x49ac6061, (q31_t)0x49a73cf1, (q31_t)0x49a21954, (q31_t)0x499cf589, (q31_t)0x4997d191, (q31_t)0x4992ad6c, (q31_t)0x498d8919,
+ (q31_t)0x49886499, (q31_t)0x49833fec, (q31_t)0x497e1b11, (q31_t)0x4978f609, (q31_t)0x4973d0d3, (q31_t)0x496eab70, (q31_t)0x496985e0, (q31_t)0x49646023,
+ (q31_t)0x495f3a38, (q31_t)0x495a1420, (q31_t)0x4954eddb, (q31_t)0x494fc768, (q31_t)0x494aa0c9, (q31_t)0x494579fc, (q31_t)0x49405302, (q31_t)0x493b2bdb,
+ (q31_t)0x49360486, (q31_t)0x4930dd05, (q31_t)0x492bb556, (q31_t)0x49268d7a, (q31_t)0x49216571, (q31_t)0x491c3d3b, (q31_t)0x491714d8, (q31_t)0x4911ec47,
+ (q31_t)0x490cc38a, (q31_t)0x49079aa0, (q31_t)0x49027188, (q31_t)0x48fd4844, (q31_t)0x48f81ed2, (q31_t)0x48f2f534, (q31_t)0x48edcb68, (q31_t)0x48e8a170,
+ (q31_t)0x48e3774a, (q31_t)0x48de4cf8, (q31_t)0x48d92278, (q31_t)0x48d3f7cc, (q31_t)0x48ceccf3, (q31_t)0x48c9a1ed, (q31_t)0x48c476b9, (q31_t)0x48bf4b59,
+ (q31_t)0x48ba1fcd, (q31_t)0x48b4f413, (q31_t)0x48afc82c, (q31_t)0x48aa9c19, (q31_t)0x48a56fd9, (q31_t)0x48a0436c, (q31_t)0x489b16d2, (q31_t)0x4895ea0b,
+ (q31_t)0x4890bd18, (q31_t)0x488b8ff8, (q31_t)0x488662ab, (q31_t)0x48813531, (q31_t)0x487c078b, (q31_t)0x4876d9b8, (q31_t)0x4871abb8, (q31_t)0x486c7d8c,
+ (q31_t)0x48674f33, (q31_t)0x486220ad, (q31_t)0x485cf1fa, (q31_t)0x4857c31b, (q31_t)0x48529410, (q31_t)0x484d64d7, (q31_t)0x48483572, (q31_t)0x484305e1,
+ (q31_t)0x483dd623, (q31_t)0x4838a638, (q31_t)0x48337621, (q31_t)0x482e45dd, (q31_t)0x4829156d, (q31_t)0x4823e4d0, (q31_t)0x481eb407, (q31_t)0x48198311,
+ (q31_t)0x481451ef, (q31_t)0x480f20a0, (q31_t)0x4809ef25, (q31_t)0x4804bd7e, (q31_t)0x47ff8baa, (q31_t)0x47fa59a9, (q31_t)0x47f5277d, (q31_t)0x47eff523,
+ (q31_t)0x47eac29e, (q31_t)0x47e58fec, (q31_t)0x47e05d0e, (q31_t)0x47db2a03, (q31_t)0x47d5f6cc, (q31_t)0x47d0c369, (q31_t)0x47cb8fd9, (q31_t)0x47c65c1d,
+ (q31_t)0x47c12835, (q31_t)0x47bbf421, (q31_t)0x47b6bfe0, (q31_t)0x47b18b74, (q31_t)0x47ac56da, (q31_t)0x47a72215, (q31_t)0x47a1ed24, (q31_t)0x479cb806,
+ (q31_t)0x479782bc, (q31_t)0x47924d46, (q31_t)0x478d17a4, (q31_t)0x4787e1d6, (q31_t)0x4782abdb, (q31_t)0x477d75b5, (q31_t)0x47783f62, (q31_t)0x477308e3,
+ (q31_t)0x476dd239, (q31_t)0x47689b62, (q31_t)0x4763645f, (q31_t)0x475e2d30, (q31_t)0x4758f5d5, (q31_t)0x4753be4e, (q31_t)0x474e869b, (q31_t)0x47494ebc,
+ (q31_t)0x474416b1, (q31_t)0x473ede7a, (q31_t)0x4739a617, (q31_t)0x47346d89, (q31_t)0x472f34ce, (q31_t)0x4729fbe7, (q31_t)0x4724c2d5, (q31_t)0x471f8996,
+ (q31_t)0x471a502c, (q31_t)0x47151696, (q31_t)0x470fdcd4, (q31_t)0x470aa2e6, (q31_t)0x470568cd, (q31_t)0x47002e87, (q31_t)0x46faf416, (q31_t)0x46f5b979,
+ (q31_t)0x46f07eb0, (q31_t)0x46eb43bc, (q31_t)0x46e6089b, (q31_t)0x46e0cd4f, (q31_t)0x46db91d8, (q31_t)0x46d65634, (q31_t)0x46d11a65, (q31_t)0x46cbde6a,
+ (q31_t)0x46c6a244, (q31_t)0x46c165f1, (q31_t)0x46bc2974, (q31_t)0x46b6ecca, (q31_t)0x46b1aff5, (q31_t)0x46ac72f4, (q31_t)0x46a735c8, (q31_t)0x46a1f870,
+ (q31_t)0x469cbaed, (q31_t)0x46977d3e, (q31_t)0x46923f63, (q31_t)0x468d015d, (q31_t)0x4687c32c, (q31_t)0x468284cf, (q31_t)0x467d4646, (q31_t)0x46780792,
+ (q31_t)0x4672c8b3, (q31_t)0x466d89a8, (q31_t)0x46684a71, (q31_t)0x46630b0f, (q31_t)0x465dcb82, (q31_t)0x46588bc9, (q31_t)0x46534be5, (q31_t)0x464e0bd6,
+ (q31_t)0x4648cb9b, (q31_t)0x46438b35, (q31_t)0x463e4aa3, (q31_t)0x463909e7, (q31_t)0x4633c8fe, (q31_t)0x462e87eb, (q31_t)0x462946ac, (q31_t)0x46240542,
+ (q31_t)0x461ec3ad, (q31_t)0x461981ec, (q31_t)0x46144001, (q31_t)0x460efde9, (q31_t)0x4609bba7, (q31_t)0x4604793a, (q31_t)0x45ff36a1, (q31_t)0x45f9f3dd,
+ (q31_t)0x45f4b0ee, (q31_t)0x45ef6dd4, (q31_t)0x45ea2a8f, (q31_t)0x45e4e71f, (q31_t)0x45dfa383, (q31_t)0x45da5fbc, (q31_t)0x45d51bcb, (q31_t)0x45cfd7ae,
+ (q31_t)0x45ca9366, (q31_t)0x45c54ef3, (q31_t)0x45c00a55, (q31_t)0x45bac58c, (q31_t)0x45b58098, (q31_t)0x45b03b79, (q31_t)0x45aaf630, (q31_t)0x45a5b0bb,
+ (q31_t)0x45a06b1b, (q31_t)0x459b2550, (q31_t)0x4595df5a, (q31_t)0x45909939, (q31_t)0x458b52ee, (q31_t)0x45860c77, (q31_t)0x4580c5d6, (q31_t)0x457b7f0a,
+ (q31_t)0x45763813, (q31_t)0x4570f0f1, (q31_t)0x456ba9a4, (q31_t)0x4566622c, (q31_t)0x45611a8a, (q31_t)0x455bd2bc, (q31_t)0x45568ac4, (q31_t)0x455142a2,
+ (q31_t)0x454bfa54, (q31_t)0x4546b1dc, (q31_t)0x45416939, (q31_t)0x453c206b, (q31_t)0x4536d773, (q31_t)0x45318e4f, (q31_t)0x452c4502, (q31_t)0x4526fb89,
+ (q31_t)0x4521b1e6, (q31_t)0x451c6818, (q31_t)0x45171e20, (q31_t)0x4511d3fd, (q31_t)0x450c89af, (q31_t)0x45073f37, (q31_t)0x4501f494, (q31_t)0x44fca9c6,
+ (q31_t)0x44f75ecf, (q31_t)0x44f213ac, (q31_t)0x44ecc85f, (q31_t)0x44e77ce7, (q31_t)0x44e23145, (q31_t)0x44dce579, (q31_t)0x44d79982, (q31_t)0x44d24d60,
+ (q31_t)0x44cd0114, (q31_t)0x44c7b49e, (q31_t)0x44c267fd, (q31_t)0x44bd1b32, (q31_t)0x44b7ce3c, (q31_t)0x44b2811c, (q31_t)0x44ad33d2, (q31_t)0x44a7e65d,
+ (q31_t)0x44a298be, (q31_t)0x449d4af5, (q31_t)0x4497fd01, (q31_t)0x4492aee3, (q31_t)0x448d609b, (q31_t)0x44881228, (q31_t)0x4482c38b, (q31_t)0x447d74c4,
+ (q31_t)0x447825d2, (q31_t)0x4472d6b7, (q31_t)0x446d8771, (q31_t)0x44683801, (q31_t)0x4462e866, (q31_t)0x445d98a2, (q31_t)0x445848b3, (q31_t)0x4452f89b,
+ (q31_t)0x444da858, (q31_t)0x444857ea, (q31_t)0x44430753, (q31_t)0x443db692, (q31_t)0x443865a7, (q31_t)0x44331491, (q31_t)0x442dc351, (q31_t)0x442871e8,
+ (q31_t)0x44232054, (q31_t)0x441dce96, (q31_t)0x44187caf, (q31_t)0x44132a9d, (q31_t)0x440dd861, (q31_t)0x440885fc, (q31_t)0x4403336c, (q31_t)0x43fde0b2,
+ (q31_t)0x43f88dcf, (q31_t)0x43f33ac1, (q31_t)0x43ede78a, (q31_t)0x43e89429, (q31_t)0x43e3409d, (q31_t)0x43ddece8, (q31_t)0x43d8990a, (q31_t)0x43d34501,
+ (q31_t)0x43cdf0ce, (q31_t)0x43c89c72, (q31_t)0x43c347eb, (q31_t)0x43bdf33b, (q31_t)0x43b89e62, (q31_t)0x43b3495e, (q31_t)0x43adf431, (q31_t)0x43a89ed9,
+ (q31_t)0x43a34959, (q31_t)0x439df3ae, (q31_t)0x43989dda, (q31_t)0x439347dc, (q31_t)0x438df1b4, (q31_t)0x43889b63, (q31_t)0x438344e8, (q31_t)0x437dee43,
+ (q31_t)0x43789775, (q31_t)0x4373407d, (q31_t)0x436de95b, (q31_t)0x43689210, (q31_t)0x43633a9c, (q31_t)0x435de2fd, (q31_t)0x43588b36, (q31_t)0x43533344,
+ (q31_t)0x434ddb29, (q31_t)0x434882e5, (q31_t)0x43432a77, (q31_t)0x433dd1e0, (q31_t)0x4338791f, (q31_t)0x43332035, (q31_t)0x432dc721, (q31_t)0x43286de4,
+ (q31_t)0x4323147d, (q31_t)0x431dbaed, (q31_t)0x43186133, (q31_t)0x43130751, (q31_t)0x430dad44, (q31_t)0x4308530f, (q31_t)0x4302f8b0, (q31_t)0x42fd9e28,
+ (q31_t)0x42f84376, (q31_t)0x42f2e89b, (q31_t)0x42ed8d97, (q31_t)0x42e83269, (q31_t)0x42e2d713, (q31_t)0x42dd7b93, (q31_t)0x42d81fe9, (q31_t)0x42d2c417,
+ (q31_t)0x42cd681b, (q31_t)0x42c80bf6, (q31_t)0x42c2afa8, (q31_t)0x42bd5331, (q31_t)0x42b7f690, (q31_t)0x42b299c7, (q31_t)0x42ad3cd4, (q31_t)0x42a7dfb8,
+ (q31_t)0x42a28273, (q31_t)0x429d2505, (q31_t)0x4297c76e, (q31_t)0x429269ae, (q31_t)0x428d0bc4, (q31_t)0x4287adb2, (q31_t)0x42824f76, (q31_t)0x427cf112,
+ (q31_t)0x42779285, (q31_t)0x427233ce, (q31_t)0x426cd4ef, (q31_t)0x426775e6, (q31_t)0x426216b5, (q31_t)0x425cb75a, (q31_t)0x425757d7, (q31_t)0x4251f82b,
+ (q31_t)0x424c9856, (q31_t)0x42473858, (q31_t)0x4241d831, (q31_t)0x423c77e1, (q31_t)0x42371769, (q31_t)0x4231b6c7, (q31_t)0x422c55fd, (q31_t)0x4226f50a,
+ (q31_t)0x422193ee, (q31_t)0x421c32a9, (q31_t)0x4216d13c, (q31_t)0x42116fa5, (q31_t)0x420c0de6, (q31_t)0x4206abfe, (q31_t)0x420149ee, (q31_t)0x41fbe7b5,
+ (q31_t)0x41f68553, (q31_t)0x41f122c8, (q31_t)0x41ebc015, (q31_t)0x41e65d39, (q31_t)0x41e0fa35, (q31_t)0x41db9707, (q31_t)0x41d633b1, (q31_t)0x41d0d033,
+ (q31_t)0x41cb6c8c, (q31_t)0x41c608bc, (q31_t)0x41c0a4c4, (q31_t)0x41bb40a3, (q31_t)0x41b5dc5a, (q31_t)0x41b077e8, (q31_t)0x41ab134e, (q31_t)0x41a5ae8b,
+ (q31_t)0x41a049a0, (q31_t)0x419ae48c, (q31_t)0x41957f4f, (q31_t)0x419019eb, (q31_t)0x418ab45d, (q31_t)0x41854ea8, (q31_t)0x417fe8ca, (q31_t)0x417a82c3,
+ (q31_t)0x41751c94, (q31_t)0x416fb63d, (q31_t)0x416a4fbd, (q31_t)0x4164e916, (q31_t)0x415f8245, (q31_t)0x415a1b4d, (q31_t)0x4154b42c, (q31_t)0x414f4ce2,
+ (q31_t)0x4149e571, (q31_t)0x41447dd7, (q31_t)0x413f1615, (q31_t)0x4139ae2b, (q31_t)0x41344618, (q31_t)0x412edddd, (q31_t)0x4129757b, (q31_t)0x41240cef,
+ (q31_t)0x411ea43c, (q31_t)0x41193b61, (q31_t)0x4113d25d, (q31_t)0x410e6931, (q31_t)0x4108ffdd, (q31_t)0x41039661, (q31_t)0x40fe2cbd, (q31_t)0x40f8c2f1,
+ (q31_t)0x40f358fc, (q31_t)0x40edeee0, (q31_t)0x40e8849b, (q31_t)0x40e31a2f, (q31_t)0x40ddaf9b, (q31_t)0x40d844de, (q31_t)0x40d2d9f9, (q31_t)0x40cd6eed,
+ (q31_t)0x40c803b8, (q31_t)0x40c2985c, (q31_t)0x40bd2cd8, (q31_t)0x40b7c12b, (q31_t)0x40b25557, (q31_t)0x40ace95b, (q31_t)0x40a77d37, (q31_t)0x40a210eb,
+ (q31_t)0x409ca477, (q31_t)0x409737dc, (q31_t)0x4091cb18, (q31_t)0x408c5e2d, (q31_t)0x4086f11a, (q31_t)0x408183df, (q31_t)0x407c167c, (q31_t)0x4076a8f1,
+ (q31_t)0x40713b3f, (q31_t)0x406bcd65, (q31_t)0x40665f63, (q31_t)0x4060f13a, (q31_t)0x405b82e9, (q31_t)0x40561470, (q31_t)0x4050a5cf, (q31_t)0x404b3707,
+ (q31_t)0x4045c817, (q31_t)0x404058ff, (q31_t)0x403ae9c0, (q31_t)0x40357a59, (q31_t)0x40300acb, (q31_t)0x402a9b15, (q31_t)0x40252b37, (q31_t)0x401fbb32,
+ (q31_t)0x401a4b05, (q31_t)0x4014dab1, (q31_t)0x400f6a35, (q31_t)0x4009f992, (q31_t)0x400488c7, (q31_t)0x3fff17d5, (q31_t)0x3ff9a6bb, (q31_t)0x3ff4357a,
+ (q31_t)0x3feec411, (q31_t)0x3fe95281, (q31_t)0x3fe3e0c9, (q31_t)0x3fde6eeb, (q31_t)0x3fd8fce4, (q31_t)0x3fd38ab6, (q31_t)0x3fce1861, (q31_t)0x3fc8a5e5,
+ (q31_t)0x3fc33341, (q31_t)0x3fbdc076, (q31_t)0x3fb84d83, (q31_t)0x3fb2da6a, (q31_t)0x3fad6729, (q31_t)0x3fa7f3c0, (q31_t)0x3fa28031, (q31_t)0x3f9d0c7a,
+ (q31_t)0x3f97989c, (q31_t)0x3f922496, (q31_t)0x3f8cb06a, (q31_t)0x3f873c16, (q31_t)0x3f81c79b, (q31_t)0x3f7c52f9, (q31_t)0x3f76de30, (q31_t)0x3f71693f,
+ (q31_t)0x3f6bf428, (q31_t)0x3f667ee9, (q31_t)0x3f610983, (q31_t)0x3f5b93f6, (q31_t)0x3f561e42, (q31_t)0x3f50a867, (q31_t)0x3f4b3265, (q31_t)0x3f45bc3c,
+ (q31_t)0x3f4045ec, (q31_t)0x3f3acf75, (q31_t)0x3f3558d7, (q31_t)0x3f2fe211, (q31_t)0x3f2a6b25, (q31_t)0x3f24f412, (q31_t)0x3f1f7cd8, (q31_t)0x3f1a0577,
+ (q31_t)0x3f148def, (q31_t)0x3f0f1640, (q31_t)0x3f099e6b, (q31_t)0x3f04266e, (q31_t)0x3efeae4a, (q31_t)0x3ef93600, (q31_t)0x3ef3bd8f, (q31_t)0x3eee44f7,
+ (q31_t)0x3ee8cc38, (q31_t)0x3ee35352, (q31_t)0x3eddda46, (q31_t)0x3ed86113, (q31_t)0x3ed2e7b9, (q31_t)0x3ecd6e38, (q31_t)0x3ec7f491, (q31_t)0x3ec27ac2,
+ (q31_t)0x3ebd00cd, (q31_t)0x3eb786b2, (q31_t)0x3eb20c6f, (q31_t)0x3eac9206, (q31_t)0x3ea71777, (q31_t)0x3ea19cc1, (q31_t)0x3e9c21e4, (q31_t)0x3e96a6e0,
+ (q31_t)0x3e912bb6, (q31_t)0x3e8bb065, (q31_t)0x3e8634ee, (q31_t)0x3e80b950, (q31_t)0x3e7b3d8c, (q31_t)0x3e75c1a1, (q31_t)0x3e70458f, (q31_t)0x3e6ac957,
+ (q31_t)0x3e654cf8, (q31_t)0x3e5fd073, (q31_t)0x3e5a53c8, (q31_t)0x3e54d6f6, (q31_t)0x3e4f59fe, (q31_t)0x3e49dcdf, (q31_t)0x3e445f99, (q31_t)0x3e3ee22e,
+ (q31_t)0x3e39649c, (q31_t)0x3e33e6e3, (q31_t)0x3e2e6904, (q31_t)0x3e28eaff, (q31_t)0x3e236cd4, (q31_t)0x3e1dee82, (q31_t)0x3e18700a, (q31_t)0x3e12f16b,
+ (q31_t)0x3e0d72a6, (q31_t)0x3e07f3bb, (q31_t)0x3e0274aa, (q31_t)0x3dfcf572, (q31_t)0x3df77615, (q31_t)0x3df1f691, (q31_t)0x3dec76e6, (q31_t)0x3de6f716,
+ (q31_t)0x3de1771f, (q31_t)0x3ddbf703, (q31_t)0x3dd676c0, (q31_t)0x3dd0f656, (q31_t)0x3dcb75c7, (q31_t)0x3dc5f512, (q31_t)0x3dc07436, (q31_t)0x3dbaf335,
+ (q31_t)0x3db5720d, (q31_t)0x3daff0c0, (q31_t)0x3daa6f4c, (q31_t)0x3da4edb2, (q31_t)0x3d9f6bf2, (q31_t)0x3d99ea0d, (q31_t)0x3d946801, (q31_t)0x3d8ee5cf,
+ (q31_t)0x3d896377, (q31_t)0x3d83e0f9, (q31_t)0x3d7e5e56, (q31_t)0x3d78db8c, (q31_t)0x3d73589d, (q31_t)0x3d6dd587, (q31_t)0x3d68524c, (q31_t)0x3d62ceeb,
+ (q31_t)0x3d5d4b64, (q31_t)0x3d57c7b7, (q31_t)0x3d5243e4, (q31_t)0x3d4cbfeb, (q31_t)0x3d473bcd, (q31_t)0x3d41b789, (q31_t)0x3d3c331f, (q31_t)0x3d36ae8f,
+ (q31_t)0x3d3129da, (q31_t)0x3d2ba4fe, (q31_t)0x3d261ffd, (q31_t)0x3d209ad7, (q31_t)0x3d1b158a, (q31_t)0x3d159018, (q31_t)0x3d100a80, (q31_t)0x3d0a84c3,
+ (q31_t)0x3d04fee0, (q31_t)0x3cff78d7, (q31_t)0x3cf9f2a9, (q31_t)0x3cf46c55, (q31_t)0x3ceee5db, (q31_t)0x3ce95f3c, (q31_t)0x3ce3d877, (q31_t)0x3cde518d,
+ (q31_t)0x3cd8ca7d, (q31_t)0x3cd34347, (q31_t)0x3ccdbbed, (q31_t)0x3cc8346c, (q31_t)0x3cc2acc6, (q31_t)0x3cbd24fb, (q31_t)0x3cb79d0a, (q31_t)0x3cb214f4,
+ (q31_t)0x3cac8cb8, (q31_t)0x3ca70457, (q31_t)0x3ca17bd0, (q31_t)0x3c9bf324, (q31_t)0x3c966a53, (q31_t)0x3c90e15c, (q31_t)0x3c8b5840, (q31_t)0x3c85cefe,
+ (q31_t)0x3c804598, (q31_t)0x3c7abc0c, (q31_t)0x3c75325a, (q31_t)0x3c6fa883, (q31_t)0x3c6a1e87, (q31_t)0x3c649466, (q31_t)0x3c5f0a20, (q31_t)0x3c597fb4,
+ (q31_t)0x3c53f523, (q31_t)0x3c4e6a6d, (q31_t)0x3c48df91, (q31_t)0x3c435491, (q31_t)0x3c3dc96b, (q31_t)0x3c383e20, (q31_t)0x3c32b2b0, (q31_t)0x3c2d271b,
+ (q31_t)0x3c279b61, (q31_t)0x3c220f81, (q31_t)0x3c1c837d, (q31_t)0x3c16f753, (q31_t)0x3c116b04, (q31_t)0x3c0bde91, (q31_t)0x3c0651f8, (q31_t)0x3c00c53a,
+ (q31_t)0x3bfb3857, (q31_t)0x3bf5ab50, (q31_t)0x3bf01e23, (q31_t)0x3bea90d1, (q31_t)0x3be5035a, (q31_t)0x3bdf75bf, (q31_t)0x3bd9e7fe, (q31_t)0x3bd45a19,
+ (q31_t)0x3bcecc0e, (q31_t)0x3bc93ddf, (q31_t)0x3bc3af8b, (q31_t)0x3bbe2112, (q31_t)0x3bb89274, (q31_t)0x3bb303b1, (q31_t)0x3bad74c9, (q31_t)0x3ba7e5bd,
+ (q31_t)0x3ba2568c, (q31_t)0x3b9cc736, (q31_t)0x3b9737bb, (q31_t)0x3b91a81c, (q31_t)0x3b8c1857, (q31_t)0x3b86886e, (q31_t)0x3b80f861, (q31_t)0x3b7b682e,
+ (q31_t)0x3b75d7d7, (q31_t)0x3b70475c, (q31_t)0x3b6ab6bb, (q31_t)0x3b6525f6, (q31_t)0x3b5f950c, (q31_t)0x3b5a03fe, (q31_t)0x3b5472cb, (q31_t)0x3b4ee173,
+ (q31_t)0x3b494ff7, (q31_t)0x3b43be57, (q31_t)0x3b3e2c91, (q31_t)0x3b389aa8, (q31_t)0x3b330899, (q31_t)0x3b2d7666, (q31_t)0x3b27e40f, (q31_t)0x3b225193,
+ (q31_t)0x3b1cbef3, (q31_t)0x3b172c2e, (q31_t)0x3b119945, (q31_t)0x3b0c0637, (q31_t)0x3b067305, (q31_t)0x3b00dfaf, (q31_t)0x3afb4c34, (q31_t)0x3af5b894,
+ (q31_t)0x3af024d1, (q31_t)0x3aea90e9, (q31_t)0x3ae4fcdc, (q31_t)0x3adf68ac, (q31_t)0x3ad9d457, (q31_t)0x3ad43fdd, (q31_t)0x3aceab40, (q31_t)0x3ac9167e,
+ (q31_t)0x3ac38198, (q31_t)0x3abdec8d, (q31_t)0x3ab8575f, (q31_t)0x3ab2c20c, (q31_t)0x3aad2c95, (q31_t)0x3aa796fa, (q31_t)0x3aa2013a, (q31_t)0x3a9c6b57,
+ (q31_t)0x3a96d54f, (q31_t)0x3a913f23, (q31_t)0x3a8ba8d3, (q31_t)0x3a86125f, (q31_t)0x3a807bc7, (q31_t)0x3a7ae50a, (q31_t)0x3a754e2a, (q31_t)0x3a6fb726,
+ (q31_t)0x3a6a1ffd, (q31_t)0x3a6488b1, (q31_t)0x3a5ef140, (q31_t)0x3a5959ab, (q31_t)0x3a53c1f3, (q31_t)0x3a4e2a16, (q31_t)0x3a489216, (q31_t)0x3a42f9f2,
+ (q31_t)0x3a3d61a9, (q31_t)0x3a37c93d, (q31_t)0x3a3230ad, (q31_t)0x3a2c97f9, (q31_t)0x3a26ff21, (q31_t)0x3a216625, (q31_t)0x3a1bcd05, (q31_t)0x3a1633c1,
+ (q31_t)0x3a109a5a, (q31_t)0x3a0b00cf, (q31_t)0x3a056720, (q31_t)0x39ffcd4d, (q31_t)0x39fa3356, (q31_t)0x39f4993c, (q31_t)0x39eefefe, (q31_t)0x39e9649c,
+ (q31_t)0x39e3ca17, (q31_t)0x39de2f6d, (q31_t)0x39d894a0, (q31_t)0x39d2f9b0, (q31_t)0x39cd5e9b, (q31_t)0x39c7c363, (q31_t)0x39c22808, (q31_t)0x39bc8c89,
+ (q31_t)0x39b6f0e6, (q31_t)0x39b1551f, (q31_t)0x39abb935, (q31_t)0x39a61d28, (q31_t)0x39a080f6, (q31_t)0x399ae4a2, (q31_t)0x39954829, (q31_t)0x398fab8e,
+ (q31_t)0x398a0ece, (q31_t)0x398471ec, (q31_t)0x397ed4e5, (q31_t)0x397937bc, (q31_t)0x39739a6e, (q31_t)0x396dfcfe, (q31_t)0x39685f6a, (q31_t)0x3962c1b2,
+ (q31_t)0x395d23d7, (q31_t)0x395785d9, (q31_t)0x3951e7b8, (q31_t)0x394c4973, (q31_t)0x3946ab0a, (q31_t)0x39410c7f, (q31_t)0x393b6dd0, (q31_t)0x3935cefd,
+ (q31_t)0x39303008, (q31_t)0x392a90ef, (q31_t)0x3924f1b3, (q31_t)0x391f5254, (q31_t)0x3919b2d1, (q31_t)0x3914132b, (q31_t)0x390e7362, (q31_t)0x3908d376,
+ (q31_t)0x39033367, (q31_t)0x38fd9334, (q31_t)0x38f7f2de, (q31_t)0x38f25266, (q31_t)0x38ecb1ca, (q31_t)0x38e7110a, (q31_t)0x38e17028, (q31_t)0x38dbcf23,
+ (q31_t)0x38d62dfb, (q31_t)0x38d08caf, (q31_t)0x38caeb41, (q31_t)0x38c549af, (q31_t)0x38bfa7fb, (q31_t)0x38ba0623, (q31_t)0x38b46429, (q31_t)0x38aec20b,
+ (q31_t)0x38a91fcb, (q31_t)0x38a37d67, (q31_t)0x389ddae1, (q31_t)0x38983838, (q31_t)0x3892956c, (q31_t)0x388cf27d, (q31_t)0x38874f6b, (q31_t)0x3881ac36,
+ (q31_t)0x387c08de, (q31_t)0x38766564, (q31_t)0x3870c1c6, (q31_t)0x386b1e06, (q31_t)0x38657a23, (q31_t)0x385fd61d, (q31_t)0x385a31f5, (q31_t)0x38548daa,
+ (q31_t)0x384ee93b, (q31_t)0x384944ab, (q31_t)0x38439ff7, (q31_t)0x383dfb21, (q31_t)0x38385628, (q31_t)0x3832b10d, (q31_t)0x382d0bce, (q31_t)0x3827666d,
+ (q31_t)0x3821c0ea, (q31_t)0x381c1b44, (q31_t)0x3816757b, (q31_t)0x3810cf90, (q31_t)0x380b2982, (q31_t)0x38058351, (q31_t)0x37ffdcfe, (q31_t)0x37fa3688,
+ (q31_t)0x37f48ff0, (q31_t)0x37eee936, (q31_t)0x37e94259, (q31_t)0x37e39b59, (q31_t)0x37ddf437, (q31_t)0x37d84cf2, (q31_t)0x37d2a58b, (q31_t)0x37ccfe02,
+ (q31_t)0x37c75656, (q31_t)0x37c1ae87, (q31_t)0x37bc0697, (q31_t)0x37b65e84, (q31_t)0x37b0b64e, (q31_t)0x37ab0df6, (q31_t)0x37a5657c, (q31_t)0x379fbce0,
+ (q31_t)0x379a1421, (q31_t)0x37946b40, (q31_t)0x378ec23d, (q31_t)0x37891917, (q31_t)0x37836fcf, (q31_t)0x377dc665, (q31_t)0x37781cd9, (q31_t)0x3772732a,
+ (q31_t)0x376cc959, (q31_t)0x37671f66, (q31_t)0x37617551, (q31_t)0x375bcb1a, (q31_t)0x375620c1, (q31_t)0x37507645, (q31_t)0x374acba7, (q31_t)0x374520e7,
+ (q31_t)0x373f7606, (q31_t)0x3739cb02, (q31_t)0x37341fdc, (q31_t)0x372e7493, (q31_t)0x3728c929, (q31_t)0x37231d9d, (q31_t)0x371d71ef, (q31_t)0x3717c61f,
+ (q31_t)0x37121a2d, (q31_t)0x370c6e19, (q31_t)0x3706c1e2, (q31_t)0x3701158a, (q31_t)0x36fb6910, (q31_t)0x36f5bc75, (q31_t)0x36f00fb7, (q31_t)0x36ea62d7,
+ (q31_t)0x36e4b5d6, (q31_t)0x36df08b2, (q31_t)0x36d95b6d, (q31_t)0x36d3ae06, (q31_t)0x36ce007d, (q31_t)0x36c852d2, (q31_t)0x36c2a506, (q31_t)0x36bcf718,
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+ (q31_t)0x3689d3c9, (q31_t)0x3684248a, (q31_t)0x367e7529, (q31_t)0x3678c5a7, (q31_t)0x36731602, (q31_t)0x366d663d, (q31_t)0x3667b655, (q31_t)0x3662064c,
+ (q31_t)0x365c5622, (q31_t)0x3656a5d6, (q31_t)0x3650f569, (q31_t)0x364b44da, (q31_t)0x36459429, (q31_t)0x363fe357, (q31_t)0x363a3264, (q31_t)0x3634814f,
+ (q31_t)0x362ed019, (q31_t)0x36291ec1, (q31_t)0x36236d48, (q31_t)0x361dbbad, (q31_t)0x361809f1, (q31_t)0x36125814, (q31_t)0x360ca615, (q31_t)0x3606f3f5,
+ (q31_t)0x360141b4, (q31_t)0x35fb8f52, (q31_t)0x35f5dcce, (q31_t)0x35f02a28, (q31_t)0x35ea7762, (q31_t)0x35e4c47a, (q31_t)0x35df1171, (q31_t)0x35d95e47,
+ (q31_t)0x35d3aafc, (q31_t)0x35cdf78f, (q31_t)0x35c84401, (q31_t)0x35c29052, (q31_t)0x35bcdc82, (q31_t)0x35b72891, (q31_t)0x35b1747e, (q31_t)0x35abc04b,
+ (q31_t)0x35a60bf6, (q31_t)0x35a05781, (q31_t)0x359aa2ea, (q31_t)0x3594ee32, (q31_t)0x358f3959, (q31_t)0x3589845f, (q31_t)0x3583cf44, (q31_t)0x357e1a08,
+ (q31_t)0x357864ab, (q31_t)0x3572af2d, (q31_t)0x356cf98e, (q31_t)0x356743ce, (q31_t)0x35618ded, (q31_t)0x355bd7eb, (q31_t)0x355621c9, (q31_t)0x35506b85,
+ (q31_t)0x354ab520, (q31_t)0x3544fe9b, (q31_t)0x353f47f5, (q31_t)0x3539912e, (q31_t)0x3533da46, (q31_t)0x352e233d, (q31_t)0x35286c14, (q31_t)0x3522b4c9,
+ (q31_t)0x351cfd5e, (q31_t)0x351745d2, (q31_t)0x35118e26, (q31_t)0x350bd658, (q31_t)0x35061e6a, (q31_t)0x3500665c, (q31_t)0x34faae2c, (q31_t)0x34f4f5dc,
+ (q31_t)0x34ef3d6b, (q31_t)0x34e984da, (q31_t)0x34e3cc28, (q31_t)0x34de1355, (q31_t)0x34d85a62, (q31_t)0x34d2a14e, (q31_t)0x34cce819, (q31_t)0x34c72ec4,
+ (q31_t)0x34c1754e, (q31_t)0x34bbbbb8, (q31_t)0x34b60202, (q31_t)0x34b0482a, (q31_t)0x34aa8e33, (q31_t)0x34a4d41a, (q31_t)0x349f19e2, (q31_t)0x34995f88,
+ (q31_t)0x3493a50f, (q31_t)0x348dea75, (q31_t)0x34882fba, (q31_t)0x348274e0, (q31_t)0x347cb9e4, (q31_t)0x3476fec9, (q31_t)0x3471438d, (q31_t)0x346b8830,
+ (q31_t)0x3465ccb4, (q31_t)0x34601117, (q31_t)0x345a5559, (q31_t)0x3454997c, (q31_t)0x344edd7e, (q31_t)0x34492160, (q31_t)0x34436521, (q31_t)0x343da8c3,
+ (q31_t)0x3437ec44, (q31_t)0x34322fa5, (q31_t)0x342c72e6, (q31_t)0x3426b606, (q31_t)0x3420f907, (q31_t)0x341b3be7, (q31_t)0x34157ea7, (q31_t)0x340fc147,
+ (q31_t)0x340a03c7, (q31_t)0x34044626, (q31_t)0x33fe8866, (q31_t)0x33f8ca86, (q31_t)0x33f30c85, (q31_t)0x33ed4e65, (q31_t)0x33e79024, (q31_t)0x33e1d1c4,
+ (q31_t)0x33dc1343, (q31_t)0x33d654a2, (q31_t)0x33d095e2, (q31_t)0x33cad701, (q31_t)0x33c51801, (q31_t)0x33bf58e1, (q31_t)0x33b999a0, (q31_t)0x33b3da40,
+ (q31_t)0x33ae1ac0, (q31_t)0x33a85b20, (q31_t)0x33a29b60, (q31_t)0x339cdb81, (q31_t)0x33971b81, (q31_t)0x33915b62, (q31_t)0x338b9b22, (q31_t)0x3385dac4,
+ (q31_t)0x33801a45, (q31_t)0x337a59a6, (q31_t)0x337498e8, (q31_t)0x336ed80a, (q31_t)0x3369170c, (q31_t)0x336355ef, (q31_t)0x335d94b2, (q31_t)0x3357d355,
+ (q31_t)0x335211d8, (q31_t)0x334c503c, (q31_t)0x33468e80, (q31_t)0x3340cca5, (q31_t)0x333b0aaa, (q31_t)0x3335488f, (q31_t)0x332f8655, (q31_t)0x3329c3fb,
+ (q31_t)0x33240182, (q31_t)0x331e3ee9, (q31_t)0x33187c31, (q31_t)0x3312b959, (q31_t)0x330cf661, (q31_t)0x3307334a, (q31_t)0x33017014, (q31_t)0x32fbacbe,
+ (q31_t)0x32f5e948, (q31_t)0x32f025b4, (q31_t)0x32ea61ff, (q31_t)0x32e49e2c, (q31_t)0x32deda39, (q31_t)0x32d91626, (q31_t)0x32d351f5, (q31_t)0x32cd8da4,
+ (q31_t)0x32c7c933, (q31_t)0x32c204a3, (q31_t)0x32bc3ff4, (q31_t)0x32b67b26, (q31_t)0x32b0b638, (q31_t)0x32aaf12b, (q31_t)0x32a52bff, (q31_t)0x329f66b4,
+ (q31_t)0x3299a149, (q31_t)0x3293dbbf, (q31_t)0x328e1616, (q31_t)0x3288504e, (q31_t)0x32828a67, (q31_t)0x327cc460, (q31_t)0x3276fe3a, (q31_t)0x327137f6,
+ (q31_t)0x326b7192, (q31_t)0x3265ab0f, (q31_t)0x325fe46c, (q31_t)0x325a1dab, (q31_t)0x325456cb, (q31_t)0x324e8fcc, (q31_t)0x3248c8ad, (q31_t)0x32430170,
+ (q31_t)0x323d3a14, (q31_t)0x32377298, (q31_t)0x3231aafe, (q31_t)0x322be345, (q31_t)0x32261b6c, (q31_t)0x32205375, (q31_t)0x321a8b5f, (q31_t)0x3214c32a,
+ (q31_t)0x320efad6, (q31_t)0x32093263, (q31_t)0x320369d2, (q31_t)0x31fda121, (q31_t)0x31f7d852, (q31_t)0x31f20f64, (q31_t)0x31ec4657, (q31_t)0x31e67d2b,
+ (q31_t)0x31e0b3e0, (q31_t)0x31daea77, (q31_t)0x31d520ef, (q31_t)0x31cf5748, (q31_t)0x31c98d83, (q31_t)0x31c3c39e, (q31_t)0x31bdf99b, (q31_t)0x31b82f7a,
+ (q31_t)0x31b2653a, (q31_t)0x31ac9adb, (q31_t)0x31a6d05d, (q31_t)0x31a105c1, (q31_t)0x319b3b06, (q31_t)0x3195702d, (q31_t)0x318fa535, (q31_t)0x3189da1e,
+ (q31_t)0x31840ee9, (q31_t)0x317e4395, (q31_t)0x31787823, (q31_t)0x3172ac92, (q31_t)0x316ce0e3, (q31_t)0x31671515, (q31_t)0x31614929, (q31_t)0x315b7d1e,
+ (q31_t)0x3155b0f5, (q31_t)0x314fe4ae, (q31_t)0x314a1848, (q31_t)0x31444bc3, (q31_t)0x313e7f21, (q31_t)0x3138b260, (q31_t)0x3132e580, (q31_t)0x312d1882,
+ (q31_t)0x31274b66, (q31_t)0x31217e2c, (q31_t)0x311bb0d3, (q31_t)0x3115e35c, (q31_t)0x311015c6, (q31_t)0x310a4813, (q31_t)0x31047a41, (q31_t)0x30feac51,
+ (q31_t)0x30f8de42, (q31_t)0x30f31016, (q31_t)0x30ed41cb, (q31_t)0x30e77362, (q31_t)0x30e1a4db, (q31_t)0x30dbd636, (q31_t)0x30d60772, (q31_t)0x30d03891,
+ (q31_t)0x30ca6991, (q31_t)0x30c49a74, (q31_t)0x30becb38, (q31_t)0x30b8fbde, (q31_t)0x30b32c66, (q31_t)0x30ad5cd0, (q31_t)0x30a78d1c, (q31_t)0x30a1bd4a,
+ (q31_t)0x309bed5a, (q31_t)0x30961d4c, (q31_t)0x30904d20, (q31_t)0x308a7cd6, (q31_t)0x3084ac6e, (q31_t)0x307edbe9, (q31_t)0x30790b45, (q31_t)0x30733a83,
+ (q31_t)0x306d69a4, (q31_t)0x306798a7, (q31_t)0x3061c78b, (q31_t)0x305bf652, (q31_t)0x305624fb, (q31_t)0x30505387, (q31_t)0x304a81f4, (q31_t)0x3044b044,
+ (q31_t)0x303ede76, (q31_t)0x30390c8a, (q31_t)0x30333a80, (q31_t)0x302d6859, (q31_t)0x30279614, (q31_t)0x3021c3b1, (q31_t)0x301bf131, (q31_t)0x30161e93,
+ (q31_t)0x30104bd7, (q31_t)0x300a78fe, (q31_t)0x3004a607, (q31_t)0x2ffed2f2, (q31_t)0x2ff8ffc0, (q31_t)0x2ff32c70, (q31_t)0x2fed5902, (q31_t)0x2fe78577,
+ (q31_t)0x2fe1b1cf, (q31_t)0x2fdbde09, (q31_t)0x2fd60a25, (q31_t)0x2fd03624, (q31_t)0x2fca6206, (q31_t)0x2fc48dc9, (q31_t)0x2fbeb970, (q31_t)0x2fb8e4f9,
+ (q31_t)0x2fb31064, (q31_t)0x2fad3bb3, (q31_t)0x2fa766e3, (q31_t)0x2fa191f7, (q31_t)0x2f9bbced, (q31_t)0x2f95e7c5, (q31_t)0x2f901280, (q31_t)0x2f8a3d1e,
+ (q31_t)0x2f84679f, (q31_t)0x2f7e9202, (q31_t)0x2f78bc48, (q31_t)0x2f72e671, (q31_t)0x2f6d107c, (q31_t)0x2f673a6a, (q31_t)0x2f61643b, (q31_t)0x2f5b8def,
+ (q31_t)0x2f55b785, (q31_t)0x2f4fe0ff, (q31_t)0x2f4a0a5b, (q31_t)0x2f44339a, (q31_t)0x2f3e5cbb, (q31_t)0x2f3885c0, (q31_t)0x2f32aea8, (q31_t)0x2f2cd772,
+ (q31_t)0x2f27001f, (q31_t)0x2f2128af, (q31_t)0x2f1b5122, (q31_t)0x2f157979, (q31_t)0x2f0fa1b2, (q31_t)0x2f09c9ce, (q31_t)0x2f03f1cd, (q31_t)0x2efe19ae,
+ (q31_t)0x2ef84173, (q31_t)0x2ef2691b, (q31_t)0x2eec90a7, (q31_t)0x2ee6b815, (q31_t)0x2ee0df66, (q31_t)0x2edb069a, (q31_t)0x2ed52db1, (q31_t)0x2ecf54ac,
+ (q31_t)0x2ec97b89, (q31_t)0x2ec3a24a, (q31_t)0x2ebdc8ee, (q31_t)0x2eb7ef75, (q31_t)0x2eb215df, (q31_t)0x2eac3c2d, (q31_t)0x2ea6625d, (q31_t)0x2ea08871,
+ (q31_t)0x2e9aae68, (q31_t)0x2e94d443, (q31_t)0x2e8efa00, (q31_t)0x2e891fa1, (q31_t)0x2e834525, (q31_t)0x2e7d6a8d, (q31_t)0x2e778fd8, (q31_t)0x2e71b506,
+ (q31_t)0x2e6bda17, (q31_t)0x2e65ff0c, (q31_t)0x2e6023e5, (q31_t)0x2e5a48a0, (q31_t)0x2e546d3f, (q31_t)0x2e4e91c2, (q31_t)0x2e48b628, (q31_t)0x2e42da71,
+ (q31_t)0x2e3cfe9e, (q31_t)0x2e3722ae, (q31_t)0x2e3146a2, (q31_t)0x2e2b6a79, (q31_t)0x2e258e34, (q31_t)0x2e1fb1d3, (q31_t)0x2e19d554, (q31_t)0x2e13f8ba,
+ (q31_t)0x2e0e1c03, (q31_t)0x2e083f30, (q31_t)0x2e026240, (q31_t)0x2dfc8534, (q31_t)0x2df6a80b, (q31_t)0x2df0cac6, (q31_t)0x2deaed65, (q31_t)0x2de50fe8,
+ (q31_t)0x2ddf324e, (q31_t)0x2dd95498, (q31_t)0x2dd376c5, (q31_t)0x2dcd98d7, (q31_t)0x2dc7bacc, (q31_t)0x2dc1dca4, (q31_t)0x2dbbfe61, (q31_t)0x2db62001,
+ (q31_t)0x2db04186, (q31_t)0x2daa62ee, (q31_t)0x2da4843a, (q31_t)0x2d9ea569, (q31_t)0x2d98c67d, (q31_t)0x2d92e774, (q31_t)0x2d8d084f, (q31_t)0x2d87290f,
+ (q31_t)0x2d8149b2, (q31_t)0x2d7b6a39, (q31_t)0x2d758aa4, (q31_t)0x2d6faaf3, (q31_t)0x2d69cb26, (q31_t)0x2d63eb3d, (q31_t)0x2d5e0b38, (q31_t)0x2d582b17,
+ (q31_t)0x2d524ada, (q31_t)0x2d4c6a81, (q31_t)0x2d468a0c, (q31_t)0x2d40a97b, (q31_t)0x2d3ac8ce, (q31_t)0x2d34e805, (q31_t)0x2d2f0721, (q31_t)0x2d292620,
+ (q31_t)0x2d234504, (q31_t)0x2d1d63cc, (q31_t)0x2d178278, (q31_t)0x2d11a108, (q31_t)0x2d0bbf7d, (q31_t)0x2d05ddd5, (q31_t)0x2cfffc12, (q31_t)0x2cfa1a33,
+ (q31_t)0x2cf43839, (q31_t)0x2cee5622, (q31_t)0x2ce873f0, (q31_t)0x2ce291a2, (q31_t)0x2cdcaf39, (q31_t)0x2cd6ccb4, (q31_t)0x2cd0ea13, (q31_t)0x2ccb0756,
+ (q31_t)0x2cc5247e, (q31_t)0x2cbf418b, (q31_t)0x2cb95e7b, (q31_t)0x2cb37b51, (q31_t)0x2cad980a, (q31_t)0x2ca7b4a8, (q31_t)0x2ca1d12a, (q31_t)0x2c9bed91,
+ (q31_t)0x2c9609dd, (q31_t)0x2c90260d, (q31_t)0x2c8a4221, (q31_t)0x2c845e1a, (q31_t)0x2c7e79f7, (q31_t)0x2c7895b9, (q31_t)0x2c72b160, (q31_t)0x2c6ccceb,
+ (q31_t)0x2c66e85b, (q31_t)0x2c6103af, (q31_t)0x2c5b1ee8, (q31_t)0x2c553a06, (q31_t)0x2c4f5508, (q31_t)0x2c496fef, (q31_t)0x2c438abb, (q31_t)0x2c3da56b,
+ (q31_t)0x2c37c000, (q31_t)0x2c31da7a, (q31_t)0x2c2bf4d8, (q31_t)0x2c260f1c, (q31_t)0x2c202944, (q31_t)0x2c1a4351, (q31_t)0x2c145d42, (q31_t)0x2c0e7719,
+ (q31_t)0x2c0890d4, (q31_t)0x2c02aa74, (q31_t)0x2bfcc3f9, (q31_t)0x2bf6dd63, (q31_t)0x2bf0f6b1, (q31_t)0x2beb0fe5, (q31_t)0x2be528fd, (q31_t)0x2bdf41fb,
+ (q31_t)0x2bd95add, (q31_t)0x2bd373a4, (q31_t)0x2bcd8c51, (q31_t)0x2bc7a4e2, (q31_t)0x2bc1bd58, (q31_t)0x2bbbd5b3, (q31_t)0x2bb5edf4, (q31_t)0x2bb00619,
+ (q31_t)0x2baa1e23, (q31_t)0x2ba43613, (q31_t)0x2b9e4de7, (q31_t)0x2b9865a1, (q31_t)0x2b927d3f, (q31_t)0x2b8c94c3, (q31_t)0x2b86ac2c, (q31_t)0x2b80c37a,
+ (q31_t)0x2b7adaae, (q31_t)0x2b74f1c6, (q31_t)0x2b6f08c4, (q31_t)0x2b691fa6, (q31_t)0x2b63366f, (q31_t)0x2b5d4d1c, (q31_t)0x2b5763ae, (q31_t)0x2b517a26,
+ (q31_t)0x2b4b9083, (q31_t)0x2b45a6c6, (q31_t)0x2b3fbced, (q31_t)0x2b39d2fa, (q31_t)0x2b33e8ed, (q31_t)0x2b2dfec5, (q31_t)0x2b281482, (q31_t)0x2b222a24,
+ (q31_t)0x2b1c3fac, (q31_t)0x2b165519, (q31_t)0x2b106a6c, (q31_t)0x2b0a7fa4, (q31_t)0x2b0494c2, (q31_t)0x2afea9c5, (q31_t)0x2af8bead, (q31_t)0x2af2d37b,
+ (q31_t)0x2aece82f, (q31_t)0x2ae6fcc8, (q31_t)0x2ae11146, (q31_t)0x2adb25aa, (q31_t)0x2ad539f4, (q31_t)0x2acf4e23, (q31_t)0x2ac96238, (q31_t)0x2ac37633,
+ (q31_t)0x2abd8a13, (q31_t)0x2ab79dd8, (q31_t)0x2ab1b184, (q31_t)0x2aabc515, (q31_t)0x2aa5d88b, (q31_t)0x2a9febe8, (q31_t)0x2a99ff2a, (q31_t)0x2a941252,
+ (q31_t)0x2a8e255f, (q31_t)0x2a883853, (q31_t)0x2a824b2c, (q31_t)0x2a7c5deb, (q31_t)0x2a76708f, (q31_t)0x2a70831a, (q31_t)0x2a6a958a, (q31_t)0x2a64a7e0,
+ (q31_t)0x2a5eba1c, (q31_t)0x2a58cc3e, (q31_t)0x2a52de46, (q31_t)0x2a4cf033, (q31_t)0x2a470207, (q31_t)0x2a4113c0, (q31_t)0x2a3b2560, (q31_t)0x2a3536e5,
+ (q31_t)0x2a2f4850, (q31_t)0x2a2959a1, (q31_t)0x2a236ad9, (q31_t)0x2a1d7bf6, (q31_t)0x2a178cf9, (q31_t)0x2a119de2, (q31_t)0x2a0baeb2, (q31_t)0x2a05bf67,
+ (q31_t)0x29ffd003, (q31_t)0x29f9e084, (q31_t)0x29f3f0ec, (q31_t)0x29ee013a, (q31_t)0x29e8116e, (q31_t)0x29e22188, (q31_t)0x29dc3188, (q31_t)0x29d6416f,
+ (q31_t)0x29d0513b, (q31_t)0x29ca60ee, (q31_t)0x29c47087, (q31_t)0x29be8007, (q31_t)0x29b88f6c, (q31_t)0x29b29eb8, (q31_t)0x29acadea, (q31_t)0x29a6bd02,
+ (q31_t)0x29a0cc01, (q31_t)0x299adae6, (q31_t)0x2994e9b1, (q31_t)0x298ef863, (q31_t)0x298906fb, (q31_t)0x2983157a, (q31_t)0x297d23df, (q31_t)0x2977322a,
+ (q31_t)0x2971405b, (q31_t)0x296b4e74, (q31_t)0x29655c72, (q31_t)0x295f6a57, (q31_t)0x29597823, (q31_t)0x295385d5, (q31_t)0x294d936d, (q31_t)0x2947a0ec,
+ (q31_t)0x2941ae52, (q31_t)0x293bbb9e, (q31_t)0x2935c8d1, (q31_t)0x292fd5ea, (q31_t)0x2929e2ea, (q31_t)0x2923efd0, (q31_t)0x291dfc9d, (q31_t)0x29180951,
+ (q31_t)0x291215eb, (q31_t)0x290c226c, (q31_t)0x29062ed4, (q31_t)0x29003b23, (q31_t)0x28fa4758, (q31_t)0x28f45374, (q31_t)0x28ee5f76, (q31_t)0x28e86b5f,
+ (q31_t)0x28e27730, (q31_t)0x28dc82e6, (q31_t)0x28d68e84, (q31_t)0x28d09a09, (q31_t)0x28caa574, (q31_t)0x28c4b0c6, (q31_t)0x28bebbff, (q31_t)0x28b8c71f,
+ (q31_t)0x28b2d226, (q31_t)0x28acdd13, (q31_t)0x28a6e7e8, (q31_t)0x28a0f2a3, (q31_t)0x289afd46, (q31_t)0x289507cf, (q31_t)0x288f123f, (q31_t)0x28891c97,
+ (q31_t)0x288326d5, (q31_t)0x287d30fa, (q31_t)0x28773b07, (q31_t)0x287144fa, (q31_t)0x286b4ed5, (q31_t)0x28655896, (q31_t)0x285f623f, (q31_t)0x28596bce,
+ (q31_t)0x28537545, (q31_t)0x284d7ea3, (q31_t)0x284787e8, (q31_t)0x28419114, (q31_t)0x283b9a28, (q31_t)0x2835a322, (q31_t)0x282fac04, (q31_t)0x2829b4cd,
+ (q31_t)0x2823bd7d, (q31_t)0x281dc615, (q31_t)0x2817ce93, (q31_t)0x2811d6f9, (q31_t)0x280bdf46, (q31_t)0x2805e77b, (q31_t)0x27ffef97, (q31_t)0x27f9f79a,
+ (q31_t)0x27f3ff85, (q31_t)0x27ee0756, (q31_t)0x27e80f10, (q31_t)0x27e216b0, (q31_t)0x27dc1e38, (q31_t)0x27d625a8, (q31_t)0x27d02cff, (q31_t)0x27ca343d,
+ (q31_t)0x27c43b63, (q31_t)0x27be4270, (q31_t)0x27b84965, (q31_t)0x27b25041, (q31_t)0x27ac5705, (q31_t)0x27a65db0, (q31_t)0x27a06443, (q31_t)0x279a6abd,
+ (q31_t)0x2794711f, (q31_t)0x278e7768, (q31_t)0x27887d99, (q31_t)0x278283b2, (q31_t)0x277c89b3, (q31_t)0x27768f9b, (q31_t)0x2770956a, (q31_t)0x276a9b21,
+ (q31_t)0x2764a0c0, (q31_t)0x275ea647, (q31_t)0x2758abb6, (q31_t)0x2752b10c, (q31_t)0x274cb64a, (q31_t)0x2746bb6f, (q31_t)0x2740c07d, (q31_t)0x273ac572,
+ (q31_t)0x2734ca4f, (q31_t)0x272ecf14, (q31_t)0x2728d3c0, (q31_t)0x2722d855, (q31_t)0x271cdcd1, (q31_t)0x2716e136, (q31_t)0x2710e582, (q31_t)0x270ae9b6,
+ (q31_t)0x2704edd2, (q31_t)0x26fef1d5, (q31_t)0x26f8f5c1, (q31_t)0x26f2f995, (q31_t)0x26ecfd51, (q31_t)0x26e700f5, (q31_t)0x26e10480, (q31_t)0x26db07f4,
+ (q31_t)0x26d50b50, (q31_t)0x26cf0e94, (q31_t)0x26c911c0, (q31_t)0x26c314d4, (q31_t)0x26bd17d0, (q31_t)0x26b71ab4, (q31_t)0x26b11d80, (q31_t)0x26ab2034,
+ (q31_t)0x26a522d1, (q31_t)0x269f2556, (q31_t)0x269927c3, (q31_t)0x26932a18, (q31_t)0x268d2c55, (q31_t)0x26872e7b, (q31_t)0x26813088, (q31_t)0x267b327e,
+ (q31_t)0x2675345d, (q31_t)0x266f3623, (q31_t)0x266937d2, (q31_t)0x26633969, (q31_t)0x265d3ae9, (q31_t)0x26573c50, (q31_t)0x26513da1, (q31_t)0x264b3ed9,
+ (q31_t)0x26453ffa, (q31_t)0x263f4103, (q31_t)0x263941f5, (q31_t)0x263342cf, (q31_t)0x262d4392, (q31_t)0x2627443d, (q31_t)0x262144d0, (q31_t)0x261b454c,
+ (q31_t)0x261545b0, (q31_t)0x260f45fd, (q31_t)0x26094633, (q31_t)0x26034651, (q31_t)0x25fd4657, (q31_t)0x25f74646, (q31_t)0x25f1461e, (q31_t)0x25eb45de,
+ (q31_t)0x25e54587, (q31_t)0x25df4519, (q31_t)0x25d94493, (q31_t)0x25d343f6, (q31_t)0x25cd4341, (q31_t)0x25c74276, (q31_t)0x25c14192, (q31_t)0x25bb4098,
+ (q31_t)0x25b53f86, (q31_t)0x25af3e5d, (q31_t)0x25a93d1d, (q31_t)0x25a33bc6, (q31_t)0x259d3a57, (q31_t)0x259738d1, (q31_t)0x25913734, (q31_t)0x258b3580,
+ (q31_t)0x258533b5, (q31_t)0x257f31d2, (q31_t)0x25792fd8, (q31_t)0x25732dc8, (q31_t)0x256d2ba0, (q31_t)0x25672961, (q31_t)0x2561270b, (q31_t)0x255b249e,
+ (q31_t)0x2555221a, (q31_t)0x254f1f7e, (q31_t)0x25491ccc, (q31_t)0x25431a03, (q31_t)0x253d1723, (q31_t)0x2537142c, (q31_t)0x2531111e, (q31_t)0x252b0df9,
+ (q31_t)0x25250abd, (q31_t)0x251f076a, (q31_t)0x25190400, (q31_t)0x25130080, (q31_t)0x250cfce8, (q31_t)0x2506f93a, (q31_t)0x2500f574, (q31_t)0x24faf198,
+ (q31_t)0x24f4eda6, (q31_t)0x24eee99c, (q31_t)0x24e8e57c, (q31_t)0x24e2e144, (q31_t)0x24dcdcf6, (q31_t)0x24d6d892, (q31_t)0x24d0d416, (q31_t)0x24cacf84,
+ (q31_t)0x24c4cadb, (q31_t)0x24bec61c, (q31_t)0x24b8c146, (q31_t)0x24b2bc59, (q31_t)0x24acb756, (q31_t)0x24a6b23b, (q31_t)0x24a0ad0b, (q31_t)0x249aa7c4,
+ (q31_t)0x2494a266, (q31_t)0x248e9cf1, (q31_t)0x24889766, (q31_t)0x248291c5, (q31_t)0x247c8c0d, (q31_t)0x2476863e, (q31_t)0x24708059, (q31_t)0x246a7a5e,
+ (q31_t)0x2464744c, (q31_t)0x245e6e23, (q31_t)0x245867e4, (q31_t)0x2452618f, (q31_t)0x244c5b24, (q31_t)0x244654a1, (q31_t)0x24404e09, (q31_t)0x243a475a,
+ (q31_t)0x24344095, (q31_t)0x242e39ba, (q31_t)0x242832c8, (q31_t)0x24222bc0, (q31_t)0x241c24a1, (q31_t)0x24161d6d, (q31_t)0x24101622, (q31_t)0x240a0ec1,
+ (q31_t)0x24040749, (q31_t)0x23fdffbc, (q31_t)0x23f7f818, (q31_t)0x23f1f05e, (q31_t)0x23ebe88e, (q31_t)0x23e5e0a7, (q31_t)0x23dfd8ab, (q31_t)0x23d9d098,
+ (q31_t)0x23d3c86f, (q31_t)0x23cdc031, (q31_t)0x23c7b7dc, (q31_t)0x23c1af71, (q31_t)0x23bba6f0, (q31_t)0x23b59e59, (q31_t)0x23af95ac, (q31_t)0x23a98ce8,
+ (q31_t)0x23a3840f, (q31_t)0x239d7b20, (q31_t)0x2397721b, (q31_t)0x23916900, (q31_t)0x238b5fcf, (q31_t)0x23855688, (q31_t)0x237f4d2b, (q31_t)0x237943b9,
+ (q31_t)0x23733a30, (q31_t)0x236d3092, (q31_t)0x236726dd, (q31_t)0x23611d13, (q31_t)0x235b1333, (q31_t)0x2355093e, (q31_t)0x234eff32, (q31_t)0x2348f511,
+ (q31_t)0x2342eada, (q31_t)0x233ce08d, (q31_t)0x2336d62a, (q31_t)0x2330cbb2, (q31_t)0x232ac124, (q31_t)0x2324b680, (q31_t)0x231eabc7, (q31_t)0x2318a0f8,
+ (q31_t)0x23129613, (q31_t)0x230c8b19, (q31_t)0x23068009, (q31_t)0x230074e3, (q31_t)0x22fa69a8, (q31_t)0x22f45e57, (q31_t)0x22ee52f1, (q31_t)0x22e84775,
+ (q31_t)0x22e23be4, (q31_t)0x22dc303d, (q31_t)0x22d62480, (q31_t)0x22d018ae, (q31_t)0x22ca0cc7, (q31_t)0x22c400ca, (q31_t)0x22bdf4b8, (q31_t)0x22b7e890,
+ (q31_t)0x22b1dc53, (q31_t)0x22abd001, (q31_t)0x22a5c399, (q31_t)0x229fb71b, (q31_t)0x2299aa89, (q31_t)0x22939de1, (q31_t)0x228d9123, (q31_t)0x22878451,
+ (q31_t)0x22817769, (q31_t)0x227b6a6c, (q31_t)0x22755d59, (q31_t)0x226f5032, (q31_t)0x226942f5, (q31_t)0x226335a2, (q31_t)0x225d283b, (q31_t)0x22571abe,
+ (q31_t)0x22510d2d, (q31_t)0x224aff86, (q31_t)0x2244f1c9, (q31_t)0x223ee3f8, (q31_t)0x2238d612, (q31_t)0x2232c816, (q31_t)0x222cba06, (q31_t)0x2226abe0,
+ (q31_t)0x22209da5, (q31_t)0x221a8f56, (q31_t)0x221480f1, (q31_t)0x220e7277, (q31_t)0x220863e8, (q31_t)0x22025544, (q31_t)0x21fc468b, (q31_t)0x21f637be,
+ (q31_t)0x21f028db, (q31_t)0x21ea19e3, (q31_t)0x21e40ad7, (q31_t)0x21ddfbb5, (q31_t)0x21d7ec7f, (q31_t)0x21d1dd34, (q31_t)0x21cbcdd3, (q31_t)0x21c5be5e,
+ (q31_t)0x21bfaed5, (q31_t)0x21b99f36, (q31_t)0x21b38f83, (q31_t)0x21ad7fba, (q31_t)0x21a76fdd, (q31_t)0x21a15fec, (q31_t)0x219b4fe5, (q31_t)0x21953fca,
+ (q31_t)0x218f2f9a, (q31_t)0x21891f55, (q31_t)0x21830efc, (q31_t)0x217cfe8e, (q31_t)0x2176ee0b, (q31_t)0x2170dd74, (q31_t)0x216accc8, (q31_t)0x2164bc08,
+ (q31_t)0x215eab33, (q31_t)0x21589a49, (q31_t)0x2152894b, (q31_t)0x214c7838, (q31_t)0x21466710, (q31_t)0x214055d4, (q31_t)0x213a4484, (q31_t)0x2134331f,
+ (q31_t)0x212e21a6, (q31_t)0x21281018, (q31_t)0x2121fe76, (q31_t)0x211becbf, (q31_t)0x2115daf4, (q31_t)0x210fc914, (q31_t)0x2109b720, (q31_t)0x2103a518,
+ (q31_t)0x20fd92fb, (q31_t)0x20f780ca, (q31_t)0x20f16e84, (q31_t)0x20eb5c2b, (q31_t)0x20e549bd, (q31_t)0x20df373a, (q31_t)0x20d924a4, (q31_t)0x20d311f9,
+ (q31_t)0x20ccff3a, (q31_t)0x20c6ec66, (q31_t)0x20c0d97f, (q31_t)0x20bac683, (q31_t)0x20b4b373, (q31_t)0x20aea04f, (q31_t)0x20a88d17, (q31_t)0x20a279ca,
+ (q31_t)0x209c666a, (q31_t)0x209652f5, (q31_t)0x20903f6c, (q31_t)0x208a2bcf, (q31_t)0x2084181e, (q31_t)0x207e0459, (q31_t)0x2077f080, (q31_t)0x2071dc93,
+ (q31_t)0x206bc892, (q31_t)0x2065b47d, (q31_t)0x205fa054, (q31_t)0x20598c17, (q31_t)0x205377c6, (q31_t)0x204d6361, (q31_t)0x20474ee8, (q31_t)0x20413a5b,
+ (q31_t)0x203b25bb, (q31_t)0x20351106, (q31_t)0x202efc3e, (q31_t)0x2028e761, (q31_t)0x2022d271, (q31_t)0x201cbd6d, (q31_t)0x2016a856, (q31_t)0x2010932a,
+ (q31_t)0x200a7deb, (q31_t)0x20046898, (q31_t)0x1ffe5331, (q31_t)0x1ff83db6, (q31_t)0x1ff22828, (q31_t)0x1fec1286, (q31_t)0x1fe5fcd0, (q31_t)0x1fdfe707,
+ (q31_t)0x1fd9d12a, (q31_t)0x1fd3bb39, (q31_t)0x1fcda535, (q31_t)0x1fc78f1d, (q31_t)0x1fc178f1, (q31_t)0x1fbb62b2, (q31_t)0x1fb54c60, (q31_t)0x1faf35f9,
+ (q31_t)0x1fa91f80, (q31_t)0x1fa308f2, (q31_t)0x1f9cf252, (q31_t)0x1f96db9d, (q31_t)0x1f90c4d5, (q31_t)0x1f8aadfa, (q31_t)0x1f84970b, (q31_t)0x1f7e8009,
+ (q31_t)0x1f7868f4, (q31_t)0x1f7251ca, (q31_t)0x1f6c3a8e, (q31_t)0x1f66233e, (q31_t)0x1f600bdb, (q31_t)0x1f59f465, (q31_t)0x1f53dcdb, (q31_t)0x1f4dc53d,
+ (q31_t)0x1f47ad8d, (q31_t)0x1f4195c9, (q31_t)0x1f3b7df2, (q31_t)0x1f356608, (q31_t)0x1f2f4e0a, (q31_t)0x1f2935f9, (q31_t)0x1f231dd5, (q31_t)0x1f1d059e,
+ (q31_t)0x1f16ed54, (q31_t)0x1f10d4f6, (q31_t)0x1f0abc85, (q31_t)0x1f04a401, (q31_t)0x1efe8b6a, (q31_t)0x1ef872c0, (q31_t)0x1ef25a03, (q31_t)0x1eec4132,
+ (q31_t)0x1ee6284f, (q31_t)0x1ee00f58, (q31_t)0x1ed9f64f, (q31_t)0x1ed3dd32, (q31_t)0x1ecdc402, (q31_t)0x1ec7aac0, (q31_t)0x1ec1916a, (q31_t)0x1ebb7802,
+ (q31_t)0x1eb55e86, (q31_t)0x1eaf44f8, (q31_t)0x1ea92b56, (q31_t)0x1ea311a2, (q31_t)0x1e9cf7db, (q31_t)0x1e96de01, (q31_t)0x1e90c414, (q31_t)0x1e8aaa14,
+ (q31_t)0x1e849001, (q31_t)0x1e7e75dc, (q31_t)0x1e785ba3, (q31_t)0x1e724158, (q31_t)0x1e6c26fa, (q31_t)0x1e660c8a, (q31_t)0x1e5ff206, (q31_t)0x1e59d770,
+ (q31_t)0x1e53bcc7, (q31_t)0x1e4da20c, (q31_t)0x1e47873d, (q31_t)0x1e416c5d, (q31_t)0x1e3b5169, (q31_t)0x1e353663, (q31_t)0x1e2f1b4a, (q31_t)0x1e29001e,
+ (q31_t)0x1e22e4e0, (q31_t)0x1e1cc990, (q31_t)0x1e16ae2c, (q31_t)0x1e1092b6, (q31_t)0x1e0a772e, (q31_t)0x1e045b93, (q31_t)0x1dfe3fe6, (q31_t)0x1df82426,
+ (q31_t)0x1df20853, (q31_t)0x1debec6f, (q31_t)0x1de5d077, (q31_t)0x1ddfb46e, (q31_t)0x1dd99851, (q31_t)0x1dd37c23, (q31_t)0x1dcd5fe2, (q31_t)0x1dc7438e,
+ (q31_t)0x1dc12729, (q31_t)0x1dbb0ab0, (q31_t)0x1db4ee26, (q31_t)0x1daed189, (q31_t)0x1da8b4da, (q31_t)0x1da29819, (q31_t)0x1d9c7b45, (q31_t)0x1d965e5f,
+ (q31_t)0x1d904167, (q31_t)0x1d8a245c, (q31_t)0x1d840740, (q31_t)0x1d7dea11, (q31_t)0x1d77ccd0, (q31_t)0x1d71af7d, (q31_t)0x1d6b9217, (q31_t)0x1d6574a0,
+ (q31_t)0x1d5f5716, (q31_t)0x1d59397a, (q31_t)0x1d531bcc, (q31_t)0x1d4cfe0d, (q31_t)0x1d46e03a, (q31_t)0x1d40c256, (q31_t)0x1d3aa460, (q31_t)0x1d348658,
+ (q31_t)0x1d2e683e, (q31_t)0x1d284a12, (q31_t)0x1d222bd3, (q31_t)0x1d1c0d83, (q31_t)0x1d15ef21, (q31_t)0x1d0fd0ad, (q31_t)0x1d09b227, (q31_t)0x1d03938f,
+ (q31_t)0x1cfd74e5, (q31_t)0x1cf7562a, (q31_t)0x1cf1375c, (q31_t)0x1ceb187d, (q31_t)0x1ce4f98c, (q31_t)0x1cdeda89, (q31_t)0x1cd8bb74, (q31_t)0x1cd29c4d,
+ (q31_t)0x1ccc7d15, (q31_t)0x1cc65dca, (q31_t)0x1cc03e6e, (q31_t)0x1cba1f01, (q31_t)0x1cb3ff81, (q31_t)0x1caddff0, (q31_t)0x1ca7c04d, (q31_t)0x1ca1a099,
+ (q31_t)0x1c9b80d3, (q31_t)0x1c9560fb, (q31_t)0x1c8f4112, (q31_t)0x1c892117, (q31_t)0x1c83010a, (q31_t)0x1c7ce0ec, (q31_t)0x1c76c0bc, (q31_t)0x1c70a07b,
+ (q31_t)0x1c6a8028, (q31_t)0x1c645fc3, (q31_t)0x1c5e3f4d, (q31_t)0x1c581ec6, (q31_t)0x1c51fe2d, (q31_t)0x1c4bdd83, (q31_t)0x1c45bcc7, (q31_t)0x1c3f9bf9,
+ (q31_t)0x1c397b1b, (q31_t)0x1c335a2b, (q31_t)0x1c2d3929, (q31_t)0x1c271816, (q31_t)0x1c20f6f2, (q31_t)0x1c1ad5bc, (q31_t)0x1c14b475, (q31_t)0x1c0e931d,
+ (q31_t)0x1c0871b4, (q31_t)0x1c025039, (q31_t)0x1bfc2ead, (q31_t)0x1bf60d0f, (q31_t)0x1befeb60, (q31_t)0x1be9c9a1, (q31_t)0x1be3a7cf, (q31_t)0x1bdd85ed,
+ (q31_t)0x1bd763fa, (q31_t)0x1bd141f5, (q31_t)0x1bcb1fdf, (q31_t)0x1bc4fdb8, (q31_t)0x1bbedb80, (q31_t)0x1bb8b937, (q31_t)0x1bb296dc, (q31_t)0x1bac7471,
+ (q31_t)0x1ba651f5, (q31_t)0x1ba02f67, (q31_t)0x1b9a0cc8, (q31_t)0x1b93ea19, (q31_t)0x1b8dc758, (q31_t)0x1b87a487, (q31_t)0x1b8181a4, (q31_t)0x1b7b5eb0,
+ (q31_t)0x1b753bac, (q31_t)0x1b6f1897, (q31_t)0x1b68f570, (q31_t)0x1b62d239, (q31_t)0x1b5caef1, (q31_t)0x1b568b98, (q31_t)0x1b50682e, (q31_t)0x1b4a44b3,
+ (q31_t)0x1b442127, (q31_t)0x1b3dfd8b, (q31_t)0x1b37d9de, (q31_t)0x1b31b620, (q31_t)0x1b2b9251, (q31_t)0x1b256e71, (q31_t)0x1b1f4a81, (q31_t)0x1b192680,
+ (q31_t)0x1b13026e, (q31_t)0x1b0cde4c, (q31_t)0x1b06ba19, (q31_t)0x1b0095d5, (q31_t)0x1afa7180, (q31_t)0x1af44d1b, (q31_t)0x1aee28a6, (q31_t)0x1ae8041f,
+ (q31_t)0x1ae1df88, (q31_t)0x1adbbae1, (q31_t)0x1ad59629, (q31_t)0x1acf7160, (q31_t)0x1ac94c87, (q31_t)0x1ac3279d, (q31_t)0x1abd02a3, (q31_t)0x1ab6dd98,
+ (q31_t)0x1ab0b87d, (q31_t)0x1aaa9352, (q31_t)0x1aa46e16, (q31_t)0x1a9e48c9, (q31_t)0x1a98236c, (q31_t)0x1a91fdff, (q31_t)0x1a8bd881, (q31_t)0x1a85b2f3,
+ (q31_t)0x1a7f8d54, (q31_t)0x1a7967a6, (q31_t)0x1a7341e6, (q31_t)0x1a6d1c17, (q31_t)0x1a66f637, (q31_t)0x1a60d047, (q31_t)0x1a5aaa47, (q31_t)0x1a548436,
+ (q31_t)0x1a4e5e15, (q31_t)0x1a4837e4, (q31_t)0x1a4211a3, (q31_t)0x1a3beb52, (q31_t)0x1a35c4f0, (q31_t)0x1a2f9e7e, (q31_t)0x1a2977fc, (q31_t)0x1a23516a,
+ (q31_t)0x1a1d2ac8, (q31_t)0x1a170416, (q31_t)0x1a10dd53, (q31_t)0x1a0ab681, (q31_t)0x1a048f9e, (q31_t)0x19fe68ac, (q31_t)0x19f841a9, (q31_t)0x19f21a96,
+ (q31_t)0x19ebf374, (q31_t)0x19e5cc41, (q31_t)0x19dfa4fe, (q31_t)0x19d97dac, (q31_t)0x19d35649, (q31_t)0x19cd2ed7, (q31_t)0x19c70754, (q31_t)0x19c0dfc2,
+ (q31_t)0x19bab820, (q31_t)0x19b4906e, (q31_t)0x19ae68ac, (q31_t)0x19a840da, (q31_t)0x19a218f9, (q31_t)0x199bf107, (q31_t)0x1995c906, (q31_t)0x198fa0f5,
+ (q31_t)0x198978d4, (q31_t)0x198350a4, (q31_t)0x197d2864, (q31_t)0x19770014, (q31_t)0x1970d7b4, (q31_t)0x196aaf45, (q31_t)0x196486c6, (q31_t)0x195e5e37,
+ (q31_t)0x19583599, (q31_t)0x19520ceb, (q31_t)0x194be42d, (q31_t)0x1945bb60, (q31_t)0x193f9283, (q31_t)0x19396997, (q31_t)0x1933409b, (q31_t)0x192d178f,
+ (q31_t)0x1926ee74, (q31_t)0x1920c54a, (q31_t)0x191a9c10, (q31_t)0x191472c6, (q31_t)0x190e496d, (q31_t)0x19082005, (q31_t)0x1901f68d, (q31_t)0x18fbcd06,
+ (q31_t)0x18f5a36f, (q31_t)0x18ef79c9, (q31_t)0x18e95014, (q31_t)0x18e3264f, (q31_t)0x18dcfc7b, (q31_t)0x18d6d297, (q31_t)0x18d0a8a4, (q31_t)0x18ca7ea2,
+ (q31_t)0x18c45491, (q31_t)0x18be2a70, (q31_t)0x18b80040, (q31_t)0x18b1d601, (q31_t)0x18ababb2, (q31_t)0x18a58154, (q31_t)0x189f56e8, (q31_t)0x18992c6b,
+ (q31_t)0x189301e0, (q31_t)0x188cd746, (q31_t)0x1886ac9c, (q31_t)0x188081e4, (q31_t)0x187a571c, (q31_t)0x18742c45, (q31_t)0x186e015f, (q31_t)0x1867d66a,
+ (q31_t)0x1861ab66, (q31_t)0x185b8053, (q31_t)0x18555530, (q31_t)0x184f29ff, (q31_t)0x1848febf, (q31_t)0x1842d370, (q31_t)0x183ca812, (q31_t)0x18367ca5,
+ (q31_t)0x18305129, (q31_t)0x182a259e, (q31_t)0x1823fa04, (q31_t)0x181dce5b, (q31_t)0x1817a2a4, (q31_t)0x181176dd, (q31_t)0x180b4b08, (q31_t)0x18051f24,
+ (q31_t)0x17fef331, (q31_t)0x17f8c72f, (q31_t)0x17f29b1e, (q31_t)0x17ec6eff, (q31_t)0x17e642d1, (q31_t)0x17e01694, (q31_t)0x17d9ea49, (q31_t)0x17d3bdee,
+ (q31_t)0x17cd9186, (q31_t)0x17c7650e, (q31_t)0x17c13888, (q31_t)0x17bb0bf3, (q31_t)0x17b4df4f, (q31_t)0x17aeb29d, (q31_t)0x17a885dc, (q31_t)0x17a2590d,
+ (q31_t)0x179c2c2f, (q31_t)0x1795ff42, (q31_t)0x178fd247, (q31_t)0x1789a53d, (q31_t)0x17837825, (q31_t)0x177d4afe, (q31_t)0x17771dc9, (q31_t)0x1770f086,
+ (q31_t)0x176ac333, (q31_t)0x176495d3, (q31_t)0x175e6864, (q31_t)0x17583ae7, (q31_t)0x17520d5b, (q31_t)0x174bdfc1, (q31_t)0x1745b218, (q31_t)0x173f8461,
+ (q31_t)0x1739569c, (q31_t)0x173328c8, (q31_t)0x172cfae6, (q31_t)0x1726ccf6, (q31_t)0x17209ef8, (q31_t)0x171a70eb, (q31_t)0x171442d0, (q31_t)0x170e14a7,
+ (q31_t)0x1707e670, (q31_t)0x1701b82a, (q31_t)0x16fb89d6, (q31_t)0x16f55b74, (q31_t)0x16ef2d04, (q31_t)0x16e8fe86, (q31_t)0x16e2cff9, (q31_t)0x16dca15f,
+ (q31_t)0x16d672b6, (q31_t)0x16d043ff, (q31_t)0x16ca153a, (q31_t)0x16c3e667, (q31_t)0x16bdb787, (q31_t)0x16b78898, (q31_t)0x16b1599b, (q31_t)0x16ab2a90,
+ (q31_t)0x16a4fb77, (q31_t)0x169ecc50, (q31_t)0x16989d1b, (q31_t)0x16926dd8, (q31_t)0x168c3e87, (q31_t)0x16860f29, (q31_t)0x167fdfbc, (q31_t)0x1679b042,
+ (q31_t)0x167380ba, (q31_t)0x166d5123, (q31_t)0x1667217f, (q31_t)0x1660f1ce, (q31_t)0x165ac20e, (q31_t)0x16549241, (q31_t)0x164e6266, (q31_t)0x1648327d,
+ (q31_t)0x16420286, (q31_t)0x163bd282, (q31_t)0x1635a270, (q31_t)0x162f7250, (q31_t)0x16294222, (q31_t)0x162311e7, (q31_t)0x161ce19e, (q31_t)0x1616b148,
+ (q31_t)0x161080e4, (q31_t)0x160a5072, (q31_t)0x16041ff3, (q31_t)0x15fdef66, (q31_t)0x15f7becc, (q31_t)0x15f18e24, (q31_t)0x15eb5d6e, (q31_t)0x15e52cab,
+ (q31_t)0x15defbdb, (q31_t)0x15d8cafd, (q31_t)0x15d29a11, (q31_t)0x15cc6918, (q31_t)0x15c63812, (q31_t)0x15c006fe, (q31_t)0x15b9d5dd, (q31_t)0x15b3a4ae,
+ (q31_t)0x15ad7372, (q31_t)0x15a74228, (q31_t)0x15a110d2, (q31_t)0x159adf6e, (q31_t)0x1594adfc, (q31_t)0x158e7c7d, (q31_t)0x15884af1, (q31_t)0x15821958,
+ (q31_t)0x157be7b1, (q31_t)0x1575b5fe, (q31_t)0x156f843c, (q31_t)0x1569526e, (q31_t)0x15632093, (q31_t)0x155ceeaa, (q31_t)0x1556bcb4, (q31_t)0x15508ab1,
+ (q31_t)0x154a58a1, (q31_t)0x15442683, (q31_t)0x153df459, (q31_t)0x1537c221, (q31_t)0x15318fdd, (q31_t)0x152b5d8b, (q31_t)0x15252b2c, (q31_t)0x151ef8c0,
+ (q31_t)0x1518c648, (q31_t)0x151293c2, (q31_t)0x150c612f, (q31_t)0x15062e8f, (q31_t)0x14fffbe2, (q31_t)0x14f9c928, (q31_t)0x14f39662, (q31_t)0x14ed638e,
+ (q31_t)0x14e730ae, (q31_t)0x14e0fdc0, (q31_t)0x14dacac6, (q31_t)0x14d497bf, (q31_t)0x14ce64ab, (q31_t)0x14c8318a, (q31_t)0x14c1fe5c, (q31_t)0x14bbcb22,
+ (q31_t)0x14b597da, (q31_t)0x14af6486, (q31_t)0x14a93125, (q31_t)0x14a2fdb8, (q31_t)0x149cca3e, (q31_t)0x149696b7, (q31_t)0x14906323, (q31_t)0x148a2f82,
+ (q31_t)0x1483fbd5, (q31_t)0x147dc81c, (q31_t)0x14779455, (q31_t)0x14716082, (q31_t)0x146b2ca3, (q31_t)0x1464f8b7, (q31_t)0x145ec4be, (q31_t)0x145890b9,
+ (q31_t)0x14525ca7, (q31_t)0x144c2888, (q31_t)0x1445f45d, (q31_t)0x143fc026, (q31_t)0x14398be2, (q31_t)0x14335792, (q31_t)0x142d2335, (q31_t)0x1426eecb,
+ (q31_t)0x1420ba56, (q31_t)0x141a85d3, (q31_t)0x14145145, (q31_t)0x140e1caa, (q31_t)0x1407e803, (q31_t)0x1401b34f, (q31_t)0x13fb7e8f, (q31_t)0x13f549c3,
+ (q31_t)0x13ef14ea, (q31_t)0x13e8e005, (q31_t)0x13e2ab14, (q31_t)0x13dc7616, (q31_t)0x13d6410d, (q31_t)0x13d00bf7, (q31_t)0x13c9d6d4, (q31_t)0x13c3a1a6,
+ (q31_t)0x13bd6c6b, (q31_t)0x13b73725, (q31_t)0x13b101d2, (q31_t)0x13aacc73, (q31_t)0x13a49707, (q31_t)0x139e6190, (q31_t)0x13982c0d, (q31_t)0x1391f67d,
+ (q31_t)0x138bc0e1, (q31_t)0x13858b3a, (q31_t)0x137f5586, (q31_t)0x13791fc6, (q31_t)0x1372e9fb, (q31_t)0x136cb423, (q31_t)0x13667e3f, (q31_t)0x13604850,
+ (q31_t)0x135a1254, (q31_t)0x1353dc4c, (q31_t)0x134da639, (q31_t)0x1347701a, (q31_t)0x134139ee, (q31_t)0x133b03b7, (q31_t)0x1334cd74, (q31_t)0x132e9725,
+ (q31_t)0x132860ca, (q31_t)0x13222a64, (q31_t)0x131bf3f2, (q31_t)0x1315bd73, (q31_t)0x130f86ea, (q31_t)0x13095054, (q31_t)0x130319b3, (q31_t)0x12fce305,
+ (q31_t)0x12f6ac4d, (q31_t)0x12f07588, (q31_t)0x12ea3eb8, (q31_t)0x12e407dc, (q31_t)0x12ddd0f4, (q31_t)0x12d79a01, (q31_t)0x12d16303, (q31_t)0x12cb2bf8,
+ (q31_t)0x12c4f4e2, (q31_t)0x12bebdc1, (q31_t)0x12b88693, (q31_t)0x12b24f5b, (q31_t)0x12ac1817, (q31_t)0x12a5e0c7, (q31_t)0x129fa96c, (q31_t)0x12997205,
+ (q31_t)0x12933a93, (q31_t)0x128d0315, (q31_t)0x1286cb8c, (q31_t)0x128093f7, (q31_t)0x127a5c57, (q31_t)0x127424ac, (q31_t)0x126decf5, (q31_t)0x1267b533,
+ (q31_t)0x12617d66, (q31_t)0x125b458d, (q31_t)0x12550da9, (q31_t)0x124ed5ba, (q31_t)0x12489dbf, (q31_t)0x124265b9, (q31_t)0x123c2da8, (q31_t)0x1235f58b,
+ (q31_t)0x122fbd63, (q31_t)0x12298530, (q31_t)0x12234cf2, (q31_t)0x121d14a9, (q31_t)0x1216dc54, (q31_t)0x1210a3f5, (q31_t)0x120a6b8a, (q31_t)0x12043314,
+ (q31_t)0x11fdfa93, (q31_t)0x11f7c207, (q31_t)0x11f18970, (q31_t)0x11eb50cd, (q31_t)0x11e51820, (q31_t)0x11dedf68, (q31_t)0x11d8a6a4, (q31_t)0x11d26dd6,
+ (q31_t)0x11cc34fc, (q31_t)0x11c5fc18, (q31_t)0x11bfc329, (q31_t)0x11b98a2e, (q31_t)0x11b35129, (q31_t)0x11ad1819, (q31_t)0x11a6defe, (q31_t)0x11a0a5d8,
+ (q31_t)0x119a6ca7, (q31_t)0x1194336b, (q31_t)0x118dfa25, (q31_t)0x1187c0d3, (q31_t)0x11818777, (q31_t)0x117b4e10, (q31_t)0x1175149e, (q31_t)0x116edb22,
+ (q31_t)0x1168a19b, (q31_t)0x11626809, (q31_t)0x115c2e6c, (q31_t)0x1155f4c4, (q31_t)0x114fbb12, (q31_t)0x11498156, (q31_t)0x1143478e, (q31_t)0x113d0dbc,
+ (q31_t)0x1136d3df, (q31_t)0x113099f8, (q31_t)0x112a6006, (q31_t)0x11242609, (q31_t)0x111dec02, (q31_t)0x1117b1f0, (q31_t)0x111177d4, (q31_t)0x110b3dad,
+ (q31_t)0x1105037c, (q31_t)0x10fec940, (q31_t)0x10f88efa, (q31_t)0x10f254a9, (q31_t)0x10ec1a4e, (q31_t)0x10e5dfe8, (q31_t)0x10dfa578, (q31_t)0x10d96afe,
+ (q31_t)0x10d33079, (q31_t)0x10ccf5ea, (q31_t)0x10c6bb50, (q31_t)0x10c080ac, (q31_t)0x10ba45fe, (q31_t)0x10b40b45, (q31_t)0x10add082, (q31_t)0x10a795b5,
+ (q31_t)0x10a15ade, (q31_t)0x109b1ffc, (q31_t)0x1094e510, (q31_t)0x108eaa1a, (q31_t)0x10886f19, (q31_t)0x1082340f, (q31_t)0x107bf8fa, (q31_t)0x1075bddb,
+ (q31_t)0x106f82b2, (q31_t)0x1069477f, (q31_t)0x10630c41, (q31_t)0x105cd0fa, (q31_t)0x105695a8, (q31_t)0x10505a4d, (q31_t)0x104a1ee7, (q31_t)0x1043e377,
+ (q31_t)0x103da7fd, (q31_t)0x10376c79, (q31_t)0x103130ec, (q31_t)0x102af554, (q31_t)0x1024b9b2, (q31_t)0x101e7e06, (q31_t)0x10184251, (q31_t)0x10120691,
+ (q31_t)0x100bcac7, (q31_t)0x10058ef4, (q31_t)0xfff5317, (q31_t)0xff91730, (q31_t)0xff2db3e, (q31_t)0xfec9f44, (q31_t)0xfe6633f, (q31_t)0xfe02730,
+ (q31_t)0xfd9eb18, (q31_t)0xfd3aef6, (q31_t)0xfcd72ca, (q31_t)0xfc73695, (q31_t)0xfc0fa55, (q31_t)0xfbabe0c, (q31_t)0xfb481ba, (q31_t)0xfae455d,
+ (q31_t)0xfa808f7, (q31_t)0xfa1cc87, (q31_t)0xf9b900e, (q31_t)0xf95538b, (q31_t)0xf8f16fe, (q31_t)0xf88da68, (q31_t)0xf829dc8, (q31_t)0xf7c611f,
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+ (q31_t)0xbf29810, (q31_t)0xbec5693, (q31_t)0xbe6150f, (q31_t)0xbdfd383, (q31_t)0xbd991f0, (q31_t)0xbd35056, (q31_t)0xbcd0eb5, (q31_t)0xbc6cd0c,
+ (q31_t)0xbc08b5c, (q31_t)0xbba49a5, (q31_t)0xbb407e7, (q31_t)0xbadc621, (q31_t)0xba78454, (q31_t)0xba14280, (q31_t)0xb9b00a5, (q31_t)0xb94bec2,
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+ (q31_t)0xb5c6c8d, (q31_t)0xb562a64, (q31_t)0xb4fe834, (q31_t)0xb49a5fd, (q31_t)0xb4363bf, (q31_t)0xb3d217a, (q31_t)0xb36df2e, (q31_t)0xb309cdb,
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+ (q31_t)0xaf846bc, (q31_t)0xaf20425, (q31_t)0xaebc187, (q31_t)0xae57ee2, (q31_t)0xadf3c37, (q31_t)0xad8f985, (q31_t)0xad2b6cc, (q31_t)0xacc740c,
+ (q31_t)0xac63146, (q31_t)0xabfee79, (q31_t)0xab9aba6, (q31_t)0xab368cc, (q31_t)0xaad25eb, (q31_t)0xaa6e304, (q31_t)0xaa0a016, (q31_t)0xa9a5d22,
+ (q31_t)0xa941a27, (q31_t)0xa8dd725, (q31_t)0xa87941d, (q31_t)0xa81510f, (q31_t)0xa7b0dfa, (q31_t)0xa74cadf, (q31_t)0xa6e87bd, (q31_t)0xa684495,
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+ (q31_t)0x9fdcb1e, (q31_t)0x9f78784, (q31_t)0x9f143e5, (q31_t)0x9eb003f, (q31_t)0x9e4bc93, (q31_t)0x9de78e1, (q31_t)0x9d83529, (q31_t)0x9d1f16b,
+ (q31_t)0x9cbada7, (q31_t)0x9c569dc, (q31_t)0x9bf260c, (q31_t)0x9b8e236, (q31_t)0x9b29e59, (q31_t)0x9ac5a77, (q31_t)0x9a6168f, (q31_t)0x99fd2a0,
+ (q31_t)0x9998eac, (q31_t)0x9934ab2, (q31_t)0x98d06b2, (q31_t)0x986c2ac, (q31_t)0x9807ea1, (q31_t)0x97a3a8f, (q31_t)0x973f678, (q31_t)0x96db25a,
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+ (q31_t)0x9354c4f, (q31_t)0x92f07f8, (q31_t)0x928c39b, (q31_t)0x9227f39, (q31_t)0x91c3ad2, (q31_t)0x915f664, (q31_t)0x90fb1f1, (q31_t)0x9096d79,
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+ (q31_t)0x86cb6c7, (q31_t)0x86671c2, (q31_t)0x8602cb9, (q31_t)0x859e7aa, (q31_t)0x853a296, (q31_t)0x84d5d7d, (q31_t)0x847185e, (q31_t)0x840d33b,
+ (q31_t)0x83a8e12, (q31_t)0x83448e5, (q31_t)0x82e03b2, (q31_t)0x827be7a, (q31_t)0x821793e, (q31_t)0x81b33fc, (q31_t)0x814eeb5, (q31_t)0x80ea969,
+ (q31_t)0x8086419, (q31_t)0x8021ec3, (q31_t)0x7fbd968, (q31_t)0x7f59409, (q31_t)0x7ef4ea4, (q31_t)0x7e9093b, (q31_t)0x7e2c3cd, (q31_t)0x7dc7e5a,
+ (q31_t)0x7d638e2, (q31_t)0x7cff365, (q31_t)0x7c9ade4, (q31_t)0x7c3685d, (q31_t)0x7bd22d2, (q31_t)0x7b6dd42, (q31_t)0x7b097ad, (q31_t)0x7aa5214,
+ (q31_t)0x7a40c76, (q31_t)0x79dc6d3, (q31_t)0x797812b, (q31_t)0x7913b7f, (q31_t)0x78af5ce, (q31_t)0x784b019, (q31_t)0x77e6a5e, (q31_t)0x77824a0,
+ (q31_t)0x771dedc, (q31_t)0x76b9914, (q31_t)0x7655347, (q31_t)0x75f0d76, (q31_t)0x758c7a1, (q31_t)0x75281c6, (q31_t)0x74c3be7, (q31_t)0x745f604,
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+ (q31_t)0x676ea3d, (q31_t)0x670a3ca, (q31_t)0x66a5d53, (q31_t)0x66416d8, (q31_t)0x65dd058, (q31_t)0x65789d5, (q31_t)0x651434e, (q31_t)0x64afcc3,
+ (q31_t)0x644b634, (q31_t)0x63e6fa2, (q31_t)0x638290b, (q31_t)0x631e271, (q31_t)0x62b9bd3, (q31_t)0x6255531, (q31_t)0x61f0e8b, (q31_t)0x618c7e1,
+ (q31_t)0x6128134, (q31_t)0x60c3a83, (q31_t)0x605f3ce, (q31_t)0x5ffad15, (q31_t)0x5f96659, (q31_t)0x5f31f99, (q31_t)0x5ecd8d6, (q31_t)0x5e6920e,
+ (q31_t)0x5e04b43, (q31_t)0x5da0475, (q31_t)0x5d3bda3, (q31_t)0x5cd76cd, (q31_t)0x5c72ff4, (q31_t)0x5c0e917, (q31_t)0x5baa237, (q31_t)0x5b45b53,
+ (q31_t)0x5ae146b, (q31_t)0x5a7cd80, (q31_t)0x5a18692, (q31_t)0x59b3fa0, (q31_t)0x594f8aa, (q31_t)0x58eb1b2, (q31_t)0x5886ab5, (q31_t)0x58223b6,
+ (q31_t)0x57bdcb3, (q31_t)0x57595ac, (q31_t)0x56f4ea2, (q31_t)0x5690795, (q31_t)0x562c085, (q31_t)0x55c7971, (q31_t)0x556325a, (q31_t)0x54feb3f,
+ (q31_t)0x549a422, (q31_t)0x5435d01, (q31_t)0x53d15dd, (q31_t)0x536ceb5, (q31_t)0x530878a, (q31_t)0x52a405d, (q31_t)0x523f92c, (q31_t)0x51db1f7,
+ (q31_t)0x5176ac0, (q31_t)0x5112385, (q31_t)0x50adc48, (q31_t)0x5049507, (q31_t)0x4fe4dc3, (q31_t)0x4f8067c, (q31_t)0x4f1bf32, (q31_t)0x4eb77e5,
+ (q31_t)0x4e53095, (q31_t)0x4dee942, (q31_t)0x4d8a1ec, (q31_t)0x4d25a93, (q31_t)0x4cc1337, (q31_t)0x4c5cbd8, (q31_t)0x4bf8476, (q31_t)0x4b93d11,
+ (q31_t)0x4b2f5a9, (q31_t)0x4acae3e, (q31_t)0x4a666d1, (q31_t)0x4a01f60, (q31_t)0x499d7ed, (q31_t)0x4939077, (q31_t)0x48d48fe, (q31_t)0x4870182,
+ (q31_t)0x480ba04, (q31_t)0x47a7282, (q31_t)0x4742afe, (q31_t)0x46de377, (q31_t)0x4679bee, (q31_t)0x4615461, (q31_t)0x45b0cd2, (q31_t)0x454c541,
+ (q31_t)0x44e7dac, (q31_t)0x4483615, (q31_t)0x441ee7c, (q31_t)0x43ba6df, (q31_t)0x4355f40, (q31_t)0x42f179f, (q31_t)0x428cffb, (q31_t)0x4228854,
+ (q31_t)0x41c40ab, (q31_t)0x415f8ff, (q31_t)0x40fb151, (q31_t)0x40969a0, (q31_t)0x40321ed, (q31_t)0x3fcda37, (q31_t)0x3f6927f, (q31_t)0x3f04ac4,
+ (q31_t)0x3ea0307, (q31_t)0x3e3bb48, (q31_t)0x3dd7386, (q31_t)0x3d72bc2, (q31_t)0x3d0e3fb, (q31_t)0x3ca9c32, (q31_t)0x3c45467, (q31_t)0x3be0c99,
+ (q31_t)0x3b7c4c9, (q31_t)0x3b17cf7, (q31_t)0x3ab3523, (q31_t)0x3a4ed4c, (q31_t)0x39ea573, (q31_t)0x3985d97, (q31_t)0x39215ba, (q31_t)0x38bcdda,
+ (q31_t)0x38585f8, (q31_t)0x37f3e14, (q31_t)0x378f62e, (q31_t)0x372ae46, (q31_t)0x36c665b, (q31_t)0x3661e6f, (q31_t)0x35fd680, (q31_t)0x3598e8f,
+ (q31_t)0x353469c, (q31_t)0x34cfea8, (q31_t)0x346b6b1, (q31_t)0x3406eb8, (q31_t)0x33a26bd, (q31_t)0x333dec0, (q31_t)0x32d96c1, (q31_t)0x3274ec0,
+ (q31_t)0x32106bd, (q31_t)0x31abeb9, (q31_t)0x31476b2, (q31_t)0x30e2ea9, (q31_t)0x307e69f, (q31_t)0x3019e93, (q31_t)0x2fb5684, (q31_t)0x2f50e74,
+ (q31_t)0x2eec663, (q31_t)0x2e87e4f, (q31_t)0x2e2363a, (q31_t)0x2dbee22, (q31_t)0x2d5a609, (q31_t)0x2cf5def, (q31_t)0x2c915d2, (q31_t)0x2c2cdb4,
+ (q31_t)0x2bc8594, (q31_t)0x2b63d73, (q31_t)0x2aff54f, (q31_t)0x2a9ad2a, (q31_t)0x2a36504, (q31_t)0x29d1cdc, (q31_t)0x296d4b2, (q31_t)0x2908c87,
+ (q31_t)0x28a445a, (q31_t)0x283fc2b, (q31_t)0x27db3fb, (q31_t)0x2776bc9, (q31_t)0x2712396, (q31_t)0x26adb62, (q31_t)0x264932b, (q31_t)0x25e4af4,
+ (q31_t)0x25802bb, (q31_t)0x251ba80, (q31_t)0x24b7244, (q31_t)0x2452a07, (q31_t)0x23ee1c8, (q31_t)0x2389988, (q31_t)0x2325147, (q31_t)0x22c0904,
+ (q31_t)0x225c0bf, (q31_t)0x21f787a, (q31_t)0x2193033, (q31_t)0x212e7eb, (q31_t)0x20c9fa1, (q31_t)0x2065757, (q31_t)0x2000f0b, (q31_t)0x1f9c6be,
+ (q31_t)0x1f37e6f, (q31_t)0x1ed3620, (q31_t)0x1e6edcf, (q31_t)0x1e0a57d, (q31_t)0x1da5d2a, (q31_t)0x1d414d6, (q31_t)0x1cdcc80, (q31_t)0x1c7842a,
+ (q31_t)0x1c13bd2, (q31_t)0x1baf37a, (q31_t)0x1b4ab20, (q31_t)0x1ae62c5, (q31_t)0x1a81a69, (q31_t)0x1a1d20c, (q31_t)0x19b89ae, (q31_t)0x1954150,
+ (q31_t)0x18ef8f0, (q31_t)0x188b08f, (q31_t)0x182682d, (q31_t)0x17c1fcb, (q31_t)0x175d767, (q31_t)0x16f8f03, (q31_t)0x169469d, (q31_t)0x162fe37,
+ (q31_t)0x15cb5d0, (q31_t)0x1566d68, (q31_t)0x15024ff, (q31_t)0x149dc96, (q31_t)0x143942b, (q31_t)0x13d4bc0, (q31_t)0x1370354, (q31_t)0x130bae7,
+ (q31_t)0x12a727a, (q31_t)0x1242a0c, (q31_t)0x11de19d, (q31_t)0x117992e, (q31_t)0x11150be, (q31_t)0x10b084d, (q31_t)0x104bfdb, (q31_t)0xfe7769,
+ (q31_t)0xf82ef6, (q31_t)0xf1e683, (q31_t)0xeb9e0f, (q31_t)0xe5559b, (q31_t)0xdf0d26, (q31_t)0xd8c4b0, (q31_t)0xd27c3a, (q31_t)0xcc33c3,
+ (q31_t)0xc5eb4c, (q31_t)0xbfa2d5, (q31_t)0xb95a5d, (q31_t)0xb311e4, (q31_t)0xacc96b, (q31_t)0xa680f2, (q31_t)0xa03878, (q31_t)0x99effe,
+ (q31_t)0x93a784, (q31_t)0x8d5f09, (q31_t)0x87168e, (q31_t)0x80ce12, (q31_t)0x7a8597, (q31_t)0x743d1a, (q31_t)0x6df49e, (q31_t)0x67ac21,
+ (q31_t)0x6163a5, (q31_t)0x5b1b27, (q31_t)0x54d2aa, (q31_t)0x4e8a2c, (q31_t)0x4841af, (q31_t)0x41f931, (q31_t)0x3bb0b3, (q31_t)0x356835,
(q31_t)0x2f1fb6, (q31_t)0x28d738, (q31_t)0x228eb9, (q31_t)0x1c463b, (q31_t)0x15fdbc, (q31_t)0xfb53d, (q31_t)0x96cbe, (q31_t)0x3243f
};
/**
- * @} end of DCT4_IDCT4_Table group
+ @} end of DCT4_IDCT4_Table group
*/
/**
- * @addtogroup DCT4_IDCT4
- * @{
+ @addtogroup DCT4_IDCT4
+ @{
*/
/**
- * @brief Initialization function for the Q31 DCT4/IDCT4.
- * @param[in,out] *S points to an instance of Q31 DCT4/IDCT4 structure.
- * @param[in] *S_RFFT points to an instance of Q31 RFFT/RIFFT structure
- * @param[in] *S_CFFT points to an instance of Q31 CFFT/CIFFT structure
- * @param[in] N length of the DCT4.
- * @param[in] Nby2 half of the length of the DCT4.
- * @param[in] normalize normalizing factor.
- * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
- * \par Normalizing factor:
- * The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
- * Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:
- * \image html dct4NormalizingQ31Table.gif
+ @brief Initialization function for the Q31 DCT4/IDCT4.
+ @param[in,out] S points to an instance of Q31 DCT4/IDCT4 structure.
+ @param[in] S_RFFT points to an instance of Q31 RFFT/RIFFT structure
+ @param[in] S_CFFT points to an instance of Q31 CFFT/CIFFT structure
+ @param[in] N length of the DCT4.
+ @param[in] Nby2 half of the length of the DCT4.
+ @param[in] normalize normalizing factor.
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : <code>N</code> is not a supported transform length
+
+ @par Normalizing factor:
+ The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
+ Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:
+
+ \image html dct4NormalizingQ31Table.gif
*/
arm_status arm_dct4_init_q31(
@@ -7622,17 +4554,18 @@
uint16_t Nby2,
q31_t normalize)
{
- /* Initialise the default arm status */
+ /* Initialize the default arm status */
arm_status status = ARM_MATH_SUCCESS;
/* Initializing the pointer array with the weight table base addresses of different lengths */
- q31_t *twiddlePtr[4] = { (q31_t *) WeightsQ31_128, (q31_t *) WeightsQ31_512,
+ q31_t *twiddlePtr[4] =
+ { (q31_t *) WeightsQ31_128, (q31_t *) WeightsQ31_512,
(q31_t *) WeightsQ31_2048, (q31_t *) WeightsQ31_8192
};
/* Initializing the pointer array with the cos factor table base addresses of different lengths */
q31_t *pCosFactor[4] =
- { (q31_t *) cos_factorsQ31_128, (q31_t *) cos_factorsQ31_512,
+ { (q31_t *) cos_factorsQ31_128, (q31_t *) cos_factorsQ31_512,
(q31_t *) cos_factorsQ31_2048, (q31_t *) cos_factorsQ31_8192
};
@@ -7675,12 +4608,12 @@
}
/* Initialize the RFFT/RIFFT Function */
- arm_rfft_init_q31(S->pRfft, S->N, 0, 1);
+ arm_rfft_init_q31(S->pRfft, S->N, 0U, 1U);
/* return the status of DCT4 Init function */
return (status);
}
/**
- * @} end of DCT4_IDCT4 group
+ @} end of DCT4_IDCT4 group
*/
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c b/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c
index 918f0bd..b31c2e1 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c
@@ -3,13 +3,13 @@
* Title: arm_dct4_q15.c
* Description: Processing function of DCT4 & IDCT4 Q15
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,35 +29,35 @@
#include "arm_math.h"
/**
- * @addtogroup DCT4_IDCT4
- * @{
+ @addtogroup DCT4_IDCT4
+ @{
*/
/**
- * @brief Processing function for the Q15 DCT4/IDCT4.
- * @param[in] *S points to an instance of the Q15 DCT4 structure.
- * @param[in] *pState points to state buffer.
- * @param[in,out] *pInlineBuffer points to the in-place input and output buffer.
- * @return none.
- *
- * \par Input an output formats:
- * Internally inputs are downscaled in the RFFT process function to avoid overflows.
- * Number of bits downscaled, depends on the size of the transform.
- * The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:
- *
- * \image html dct4FormatsQ15Table.gif
+ @brief Processing function for the Q15 DCT4/IDCT4.
+ @param[in] S points to an instance of the Q15 DCT4 structure.
+ @param[in] pState points to state buffer.
+ @param[in,out] pInlineBuffer points to the in-place input and output buffer.
+ @return none
+
+ @par Input an output formats
+ Internally inputs are downscaled in the RFFT process function to avoid overflows.
+ Number of bits downscaled, depends on the size of the transform. The input and output
+ formats for different DCT sizes and number of bits to upscale are mentioned in the table below:
+
+ \image html dct4FormatsQ15Table.gif
*/
void arm_dct4_q15(
const arm_dct4_instance_q15 * S,
- q15_t * pState,
- q15_t * pInlineBuffer)
+ q15_t * pState,
+ q15_t * pInlineBuffer)
{
- uint32_t i; /* Loop counter */
- q15_t *weights = S->pTwiddle; /* Pointer to the Weights table */
- q15_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */
- q15_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and pState buffer */
- q15_t in; /* Temporary variable */
+ const q15_t *weights = S->pTwiddle; /* Pointer to the Weights table */
+ const q15_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */
+ q15_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and pState buffer */
+ q15_t in; /* Temporary variable */
+ uint32_t i; /* Loop counter */
/* DCT4 computation involves DCT2 (which is calculated using RFFT)
@@ -79,10 +79,10 @@
* (d) Multiplying the output with the normalizing factor sqrt(2/N).
*/
- /*-------- Pre-processing ------------*/
+ /*-------- Pre-processing ------------*/
/* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
- arm_mult_q15(pInlineBuffer, cosFact, pInlineBuffer, S->N);
- arm_shift_q15(pInlineBuffer, 1, pInlineBuffer, S->N);
+ arm_mult_q15 (pInlineBuffer, cosFact, pInlineBuffer, S->N);
+ arm_shift_q15 (pInlineBuffer, 1, pInlineBuffer, S->N);
/* ----------------------------------------------------------------
* Step1: Re-ordering of even and odd elements as
@@ -100,12 +100,10 @@
pbuff = pInlineBuffer;
-#if defined (ARM_MATH_DSP)
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
/* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
- i = (uint32_t) S->Nby2 >> 2U;
+ i = S->Nby2 >> 2U;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
@@ -126,7 +124,7 @@
*pS1++ = *pbuff++;
*pS2-- = *pbuff++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
} while (i > 0U);
@@ -137,7 +135,7 @@
pS1 = pState;
/* Initializing the loop counter to N/4 instead of N for loop unrolling */
- i = (uint32_t) S->N >> 2U;
+ i = S->N >> 2U;
/* Processing with loop unrolling 4 times as N is always multiple of 4.
* Compute 4 outputs at a time */
@@ -158,16 +156,16 @@
* Step2: Calculate RFFT for N-point input
* ---------------------------------------------------------- */
/* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
- arm_rfft_q15(S->pRfft, pInlineBuffer, pState);
+ arm_rfft_q15 (S->pRfft, pInlineBuffer, pState);
- /*----------------------------------------------------------------------
- * Step3: Multiply the FFT output with the weights.
- *----------------------------------------------------------------------*/
- arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);
+ /*----------------------------------------------------------------------
+ * Step3: Multiply the FFT output with the weights.
+ *----------------------------------------------------------------------*/
+ arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N);
/* The output of complex multiplication is in 3.13 format.
* Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
- arm_shift_q15(pState, 2, pState, S->N * 2);
+ arm_shift_q15 (pState, 2, pState, S->N * 2);
/* ----------- Post-processing ---------- */
/* DCT-IV can be obtained from DCT-II by the equation,
@@ -176,7 +174,7 @@
/* Getting only real part from the output and Converting to DCT-IV */
/* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
- i = ((uint32_t) S->N - 1U) >> 2U;
+ i = (S->N - 1U) >> 2U;
/* pbuff initialized to input buffer. */
pbuff = pInlineBuffer;
@@ -221,7 +219,7 @@
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
- i = ((uint32_t) S->N - 1U) % 0x4U;
+ i = (S->N - 1U) % 0x4U;
while (i > 0U)
{
@@ -229,18 +227,19 @@
/* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
in = *pS1++ - in;
*pbuff++ = in;
+
/* points to the next real value */
pS1++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
- /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+ /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
/* Initializing the loop counter to N/4 instead of N for loop unrolling */
- i = (uint32_t) S->N >> 2U;
+ i = S->N >> 2U;
/* pbuff initialized to the pInlineBuffer(now contains the output values) */
pbuff = pInlineBuffer;
@@ -261,17 +260,15 @@
in = *pbuff;
*pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
} while (i > 0U);
#else
- /* Run the below code for Cortex-M0 */
-
/* Initializing the loop counter to N/2 */
- i = (uint32_t) S->Nby2;
+ i = S->Nby2;
do
{
@@ -292,7 +289,7 @@
pS1 = pState;
/* Initializing the loop counter */
- i = (uint32_t) S->N;
+ i = S->N;
do
{
@@ -308,16 +305,16 @@
* Step2: Calculate RFFT for N-point input
* ---------------------------------------------------------- */
/* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
- arm_rfft_q15(S->pRfft, pInlineBuffer, pState);
+ arm_rfft_q15 (S->pRfft, pInlineBuffer, pState);
- /*----------------------------------------------------------------------
- * Step3: Multiply the FFT output with the weights.
- *----------------------------------------------------------------------*/
- arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);
+ /*----------------------------------------------------------------------
+ * Step3: Multiply the FFT output with the weights.
+ *----------------------------------------------------------------------*/
+ arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N);
/* The output of complex multiplication is in 3.13 format.
* Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
- arm_shift_q15(pState, 2, pState, S->N * 2);
+ arm_shift_q15 (pState, 2, pState, S->N * 2);
/* ----------- Post-processing ---------- */
/* DCT-IV can be obtained from DCT-II by the equation,
@@ -325,9 +322,6 @@
* Hence, Y4(0) = Y2(0)/2 */
/* Getting only real part from the output and Converting to DCT-IV */
- /* Initializing the loop counter */
- i = ((uint32_t) S->N - 1U);
-
/* pbuff initialized to input buffer. */
pbuff = pInlineBuffer;
@@ -342,25 +336,29 @@
/* pState pointer is incremented twice as the real values are located alternatively in the array */
pS1++;
+ /* Initializing the loop counter */
+ i = (S->N - 1U);
+
do
{
/* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
/* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
in = *pS1++ - in;
*pbuff++ = in;
+
/* points to the next real value */
pS1++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
} while (i > 0U);
- /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+ /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
- /* Initializing the loop counter */
- i = (uint32_t) S->N;
+ /* Initializing loop counter */
+ i = S->N;
- /* pbuff initialized to the pInlineBuffer(now contains the output values) */
+ /* pbuff initialized to the pInlineBuffer (now contains the output values) */
pbuff = pInlineBuffer;
do
@@ -369,14 +367,15 @@
in = *pbuff;
*pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
+
} while (i > 0U);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
}
/**
- * @} end of DCT4_IDCT4 group
- */
+ @} end of DCT4_IDCT4 group
+ */
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c b/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c
index 0569778..1db381c 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c
@@ -3,13 +3,13 @@
* Title: arm_dct4_q31.c
* Description: Processing function of DCT4 & IDCT4 Q31
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,36 +29,38 @@
#include "arm_math.h"
/**
- * @addtogroup DCT4_IDCT4
- * @{
+ @addtogroup DCT4_IDCT4
+ @{
*/
/**
- * @brief Processing function for the Q31 DCT4/IDCT4.
- * @param[in] *S points to an instance of the Q31 DCT4 structure.
- * @param[in] *pState points to state buffer.
- * @param[in,out] *pInlineBuffer points to the in-place input and output buffer.
- * @return none.
- * \par Input an output formats:
- * Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process,
- * as the conversion from DCT2 to DCT4 involves one subtraction.
- * Internally inputs are downscaled in the RFFT process function to avoid overflows.
- * Number of bits downscaled, depends on the size of the transform.
- * The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:
- *
- * \image html dct4FormatsQ31Table.gif
+ @brief Processing function for the Q31 DCT4/IDCT4.
+ @param[in] S points to an instance of the Q31 DCT4 structure.
+ @param[in] pState points to state buffer.
+ @param[in,out] pInlineBuffer points to the in-place input and output buffer.
+ @return none
+
+ @par Input an output formats
+ Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process,
+ as the conversion from DCT2 to DCT4 involves one subtraction.
+ Internally inputs are downscaled in the RFFT process function to avoid overflows.
+ Number of bits downscaled, depends on the size of the transform.
+ The input and output formats for different DCT sizes and number of bits to upscale are
+ mentioned in the table below:
+
+ \image html dct4FormatsQ31Table.gif
*/
void arm_dct4_q31(
const arm_dct4_instance_q31 * S,
- q31_t * pState,
- q31_t * pInlineBuffer)
+ q31_t * pState,
+ q31_t * pInlineBuffer)
{
- uint16_t i; /* Loop counter */
- q31_t *weights = S->pTwiddle; /* Pointer to the Weights table */
- q31_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */
- q31_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and pState buffer */
- q31_t in; /* Temporary variable */
+ const q31_t *weights = S->pTwiddle; /* Pointer to the Weights table */
+ const q31_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */
+ q31_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and pState buffer */
+ q31_t in; /* Temporary variable */
+ uint32_t i; /* Loop counter */
/* DCT4 computation involves DCT2 (which is calculated using RFFT)
@@ -80,10 +82,10 @@
* (d) Multiplying the output with the normalizing factor sqrt(2/N).
*/
- /*-------- Pre-processing ------------*/
+ /*-------- Pre-processing ------------*/
/* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
- arm_mult_q31(pInlineBuffer, cosFact, pInlineBuffer, S->N);
- arm_shift_q31(pInlineBuffer, 1, pInlineBuffer, S->N);
+ arm_mult_q31 (pInlineBuffer, cosFact, pInlineBuffer, S->N);
+ arm_shift_q31 (pInlineBuffer, 1, pInlineBuffer, S->N);
/* ----------------------------------------------------------------
* Step1: Re-ordering of even and odd elements as
@@ -100,9 +102,8 @@
/* pbuff initialized to input buffer */
pbuff = pInlineBuffer;
-#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
/* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
i = S->Nby2 >> 2U;
@@ -126,7 +127,7 @@
*pS1++ = *pbuff++;
*pS2-- = *pbuff++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
} while (i > 0U);
@@ -158,16 +159,16 @@
* Step2: Calculate RFFT for N-point input
* ---------------------------------------------------------- */
/* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
- arm_rfft_q31(S->pRfft, pInlineBuffer, pState);
+ arm_rfft_q31 (S->pRfft, pInlineBuffer, pState);
/*----------------------------------------------------------------------
* Step3: Multiply the FFT output with the weights.
*----------------------------------------------------------------------*/
- arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);
+ arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N);
/* The output of complex multiplication is in 3.29 format.
* Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
- arm_shift_q31(pState, 2, pState, S->N * 2);
+ arm_shift_q31 (pState, 2, pState, S->N * 2);
/* ----------- Post-processing ---------- */
/* DCT-IV can be obtained from DCT-II by the equation,
@@ -229,15 +230,16 @@
/* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
in = *pS1++ - in;
*pbuff++ = in;
+
/* points to the next real value */
pS1++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
- /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+ /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
/* Initializing the loop counter to N/4 instead of N for loop unrolling */
i = S->N >> 2U;
@@ -261,15 +263,13 @@
in = *pbuff;
*pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
} while (i > 0U);
#else
- /* Run the below code for Cortex-M0 */
-
/* Initializing the loop counter to N/2 */
i = S->Nby2;
@@ -308,12 +308,12 @@
* Step2: Calculate RFFT for N-point input
* ---------------------------------------------------------- */
/* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
- arm_rfft_q31(S->pRfft, pInlineBuffer, pState);
+ arm_rfft_q31 (S->pRfft, pInlineBuffer, pState);
/*----------------------------------------------------------------------
* Step3: Multiply the FFT output with the weights.
*----------------------------------------------------------------------*/
- arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);
+ arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N);
/* The output of complex multiplication is in 3.29 format.
* Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
@@ -348,20 +348,20 @@
/* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
in = *pS1++ - in;
*pbuff++ = in;
+
/* points to the next real value */
pS1++;
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
}
+ /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
- /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
- /* Initializing the loop counter */
+ /* Initializing loop counter */
i = S->N;
- /* pbuff initialized to the pInlineBuffer(now contains the output values) */
+ /* pbuff initialized to the pInlineBuffer (now contains the output values) */
pbuff = pInlineBuffer;
do
@@ -370,14 +370,14 @@
in = *pbuff;
*pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
- /* Decrement the loop counter */
+ /* Decrement loop counter */
i--;
} while (i > 0U);
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
}
/**
- * @} end of DCT4_IDCT4 group
- */
+ @} end of DCT4_IDCT4 group
+ */
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c
index a1bd81b..a75fde2 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c
@@ -3,13 +3,13 @@
* Title: arm_rfft_f32.c
* Description: RFFT & RIFFT Floating point process function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -33,159 +33,149 @@
* -------------------------------------------------------------------- */
extern void arm_radix4_butterfly_f32(
- float32_t * pSrc,
- uint16_t fftLen,
- float32_t * pCoef,
- uint16_t twidCoefModifier);
+ float32_t * pSrc,
+ uint16_t fftLen,
+ const float32_t * pCoef,
+ uint16_t twidCoefModifier);
extern void arm_radix4_butterfly_inverse_f32(
- float32_t * pSrc,
- uint16_t fftLen,
- float32_t * pCoef,
- uint16_t twidCoefModifier,
- float32_t onebyfftLen);
+ float32_t * pSrc,
+ uint16_t fftLen,
+ const float32_t * pCoef,
+ uint16_t twidCoefModifier,
+ float32_t onebyfftLen);
extern void arm_bitreversal_f32(
- float32_t * pSrc,
- uint16_t fftSize,
- uint16_t bitRevFactor,
- uint16_t * pBitRevTab);
+ float32_t * pSrc,
+ uint16_t fftSize,
+ uint16_t bitRevFactor,
+ const uint16_t * pBitRevTab);
void arm_split_rfft_f32(
- float32_t * pSrc,
- uint32_t fftLen,
- float32_t * pATable,
- float32_t * pBTable,
- float32_t * pDst,
- uint32_t modifier);
+ float32_t * pSrc,
+ uint32_t fftLen,
+ const float32_t * pATable,
+ const float32_t * pBTable,
+ float32_t * pDst,
+ uint32_t modifier);
void arm_split_rifft_f32(
- float32_t * pSrc,
- uint32_t fftLen,
- float32_t * pATable,
- float32_t * pBTable,
- float32_t * pDst,
- uint32_t modifier);
+ float32_t * pSrc,
+ uint32_t fftLen,
+ const float32_t * pATable,
+ const float32_t * pBTable,
+ float32_t * pDst,
+ uint32_t modifier);
/**
-* @ingroup groupTransforms
-*/
-
-/**
- * @addtogroup RealFFT
- * @{
+ @ingroup groupTransforms
*/
/**
- * @brief Processing function for the floating-point RFFT/RIFFT.
- * @deprecated Do not use this function. It has been superceded by \ref arm_rfft_fast_f32 and will be removed
- * in the future.
- * @param[in] *S points to an instance of the floating-point RFFT/RIFFT structure.
- * @param[in] *pSrc points to the input buffer.
- * @param[out] *pDst points to the output buffer.
- * @return none.
+ @addtogroup RealFFT
+ @{
+ */
+
+/**
+ @brief Processing function for the floating-point RFFT/RIFFT.
+ @deprecated Do not use this function. It has been superceded by \ref arm_rfft_fast_f32 and will be removed in the future.
+ @param[in] S points to an instance of the floating-point RFFT/RIFFT structure
+ @param[in] pSrc points to the input buffer
+ @param[out] pDst points to the output buffer
+ @return none
*/
void arm_rfft_f32(
const arm_rfft_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst)
+ float32_t * pSrc,
+ float32_t * pDst)
{
const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft;
-
/* Calculation of Real IFFT of input */
if (S->ifftFlagR == 1U)
{
- /* Real IFFT core process */
- arm_split_rifft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal,
- S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+ /* Real IFFT core process */
+ arm_split_rifft_f32 (pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
- /* Complex radix-4 IFFT process */
- arm_radix4_butterfly_inverse_f32(pDst, S_CFFT->fftLen,
- S_CFFT->pTwiddle,
- S_CFFT->twidCoefModifier,
- S_CFFT->onebyfftLen);
+ /* Complex radix-4 IFFT process */
+ arm_radix4_butterfly_inverse_f32 (pDst, S_CFFT->fftLen, S_CFFT->pTwiddle, S_CFFT->twidCoefModifier, S_CFFT->onebyfftLen);
/* Bit reversal process */
if (S->bitReverseFlagR == 1U)
{
- arm_bitreversal_f32(pDst, S_CFFT->fftLen,
- S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
+ arm_bitreversal_f32 (pDst, S_CFFT->fftLen, S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
}
}
else
{
-
/* Calculation of RFFT of input */
/* Complex radix-4 FFT process */
- arm_radix4_butterfly_f32(pSrc, S_CFFT->fftLen,
- S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
+ arm_radix4_butterfly_f32 (pSrc, S_CFFT->fftLen, S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
/* Bit reversal process */
if (S->bitReverseFlagR == 1U)
{
- arm_bitreversal_f32(pSrc, S_CFFT->fftLen,
- S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
+ arm_bitreversal_f32 (pSrc, S_CFFT->fftLen, S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
}
-
/* Real FFT core process */
- arm_split_rfft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal,
- S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+ arm_split_rfft_f32 (pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
}
}
/**
- * @} end of RealFFT group
- */
+ @} end of RealFFT group
+ */
/**
- * @brief Core Real FFT process
- * @param[in] *pSrc points to the input buffer.
- * @param[in] fftLen length of FFT.
- * @param[in] *pATable points to the twiddle Coef A buffer.
- * @param[in] *pBTable points to the twiddle Coef B buffer.
- * @param[out] *pDst points to the output buffer.
- * @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
+ @brief Core Real FFT process
+ @param[in] pSrc points to input buffer
+ @param[in] fftLen length of FFT
+ @param[in] pATable points to twiddle Coef A buffer
+ @param[in] pBTable points to twiddle Coef B buffer
+ @param[out] pDst points to output buffer
+ @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+ @return none
*/
void arm_split_rfft_f32(
- float32_t * pSrc,
- uint32_t fftLen,
- float32_t * pATable,
- float32_t * pBTable,
- float32_t * pDst,
- uint32_t modifier)
+ float32_t * pSrc,
+ uint32_t fftLen,
+ const float32_t * pATable,
+ const float32_t * pBTable,
+ float32_t * pDst,
+ uint32_t modifier)
{
- uint32_t i; /* Loop Counter */
- float32_t outR, outI; /* Temporary variables for output */
- float32_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */
- float32_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */
- float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4U * fftLen) - 1U]; /* temp pointers for output buffer */
- float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2U * fftLen) - 1U]; /* temp pointers for input buffer */
+ uint32_t i; /* Loop Counter */
+ float32_t outR, outI; /* Temporary variables for output */
+ const float32_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */
+ float32_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */
+ float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4U * fftLen) - 1U]; /* temp pointers for output buffer */
+ float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2U * fftLen) - 1U]; /* temp pointers for input buffer */
/* Init coefficient pointers */
- pCoefA = &pATable[modifier * 2U];
- pCoefB = &pBTable[modifier * 2U];
+ pCoefA = &pATable[modifier * 2];
+ pCoefB = &pBTable[modifier * 2];
i = fftLen - 1U;
while (i > 0U)
{
- /*
- outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
- + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
- pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
- */
+ /*
+ outR = ( pSrc[2 * i] * pATable[2 * i]
+ - pSrc[2 * i + 1] * pATable[2 * i + 1]
+ + pSrc[2 * n - 2 * i] * pBTable[2 * i]
+ + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
- /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
- pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
+ outI = ( pIn[2 * i + 1] * pATable[2 * i]
+ + pIn[2 * i] * pATable[2 * i + 1]
+ + pIn[2 * n - 2 * i] * pBTable[2 * i + 1]
+ - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+ */
/* read pATable[2 * i] */
CoefA1 = *pCoefA++;
@@ -238,81 +228,82 @@
/**
- * @brief Core Real IFFT process
- * @param[in] *pSrc points to the input buffer.
- * @param[in] fftLen length of FFT.
- * @param[in] *pATable points to the twiddle Coef A buffer.
- * @param[in] *pBTable points to the twiddle Coef B buffer.
- * @param[out] *pDst points to the output buffer.
- * @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
+ @brief Core Real IFFT process
+ @param[in] pSrc points to input buffer
+ @param[in] fftLen length of FFT
+ @param[in] pATable points to twiddle Coef A buffer
+ @param[in] pBTable points to twiddle Coef B buffer
+ @param[out] pDst points to output buffer
+ @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+ @return none
*/
void arm_split_rifft_f32(
- float32_t * pSrc,
- uint32_t fftLen,
- float32_t * pATable,
- float32_t * pBTable,
- float32_t * pDst,
- uint32_t modifier)
+ float32_t * pSrc,
+ uint32_t fftLen,
+ const float32_t * pATable,
+ const float32_t * pBTable,
+ float32_t * pDst,
+ uint32_t modifier)
{
- float32_t outR, outI; /* Temporary variables for output */
- float32_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */
- float32_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */
- float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2U * fftLen) + 1U];
+ float32_t outR, outI; /* Temporary variables for output */
+ const float32_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */
+ float32_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */
+ float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2U * fftLen) + 1U];
pCoefA = &pATable[0];
pCoefB = &pBTable[0];
while (fftLen > 0U)
{
- /*
- outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
- pIn[2 * n - 2 * i] * pBTable[2 * i] -
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+ /*
+ outR = ( pIn[2 * i] * pATable[2 * i]
+ + pIn[2 * i + 1] * pATable[2 * i + 1]
+ + pIn[2 * n - 2 * i] * pBTable[2 * i]
+ - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
- outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
- pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+ outI = ( pIn[2 * i + 1] * pATable[2 * i]
+ - pIn[2 * i] * pATable[2 * i + 1]
+ - pIn[2 * n - 2 * i] * pBTable[2 * i + 1]
+ - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+ */
- */
+ CoefA1 = *pCoefA++;
+ CoefA2 = *pCoefA;
- CoefA1 = *pCoefA++;
- CoefA2 = *pCoefA;
+ /* outR = (pSrc[2 * i] * CoefA1 */
+ outR = *pSrc1 * CoefA1;
- /* outR = (pSrc[2 * i] * CoefA1 */
- outR = *pSrc1 * CoefA1;
+ /* - pSrc[2 * i] * CoefA2 */
+ outI = -(*pSrc1++) * CoefA2;
- /* - pSrc[2 * i] * CoefA2 */
- outI = -(*pSrc1++) * CoefA2;
+ /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
+ outR += (*pSrc1 + *pSrc2) * CoefA2;
- /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
- outR += (*pSrc1 + *pSrc2) * CoefA2;
+ /* pSrc[2 * i + 1] * CoefA1 */
+ outI += (*pSrc1++) * CoefA1;
- /* pSrc[2 * i + 1] * CoefA1 */
- outI += (*pSrc1++) * CoefA1;
+ CoefB1 = *pCoefB;
- CoefB1 = *pCoefB;
+ /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
+ outI -= *pSrc2-- * CoefB1;
- /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
- outI -= *pSrc2-- * CoefB1;
+ /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
+ outR += *pSrc2 * CoefB1;
- /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
- outR += *pSrc2 * CoefB1;
+ /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
+ outI += *pSrc2-- * CoefA2;
- /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
- outI += *pSrc2-- * CoefA2;
+ /* write output */
+ *pDst++ = outR;
+ *pDst++ = outI;
- /* write output */
- *pDst++ = outR;
- *pDst++ = outI;
+ /* update coefficient pointer */
+ pCoefB = pCoefB + (modifier * 2);
+ pCoefA = pCoefA + (modifier * 2 - 1);
- /* update coefficient pointer */
- pCoefB = pCoefB + (modifier * 2U);
- pCoefA = pCoefA + ((modifier * 2U) - 1U);
-
- /* Decrement loop count */
- fftLen--;
+ /* Decrement loop count */
+ fftLen--;
}
}
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c
index f7c52e9..2bd8c84 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c
@@ -3,13 +3,13 @@
* Title: arm_rfft_f32.c
* Description: RFFT & RIFFT Floating point process function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,17 +29,18 @@
#include "arm_math.h"
void stage_rfft_f32(
- arm_rfft_fast_instance_f32 * S,
- float32_t * p, float32_t * pOut)
+ const arm_rfft_fast_instance_f32 * S,
+ float32_t * p,
+ float32_t * pOut)
{
- uint32_t k; /* Loop Counter */
- float32_t twR, twI; /* RFFT Twiddle coefficients */
- float32_t * pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */
- float32_t *pA = p; /* increasing pointer */
- float32_t *pB = p; /* decreasing pointer */
- float32_t xAR, xAI, xBR, xBI; /* temporary variables */
- float32_t t1a, t1b; /* temporary variables */
- float32_t p0, p1, p2, p3; /* temporary variables */
+ uint32_t k; /* Loop Counter */
+ float32_t twR, twI; /* RFFT Twiddle coefficients */
+ const float32_t * pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */
+ float32_t *pA = p; /* increasing pointer */
+ float32_t *pB = p; /* decreasing pointer */
+ float32_t xAR, xAI, xBR, xBI; /* temporary variables */
+ float32_t t1a, t1b; /* temporary variables */
+ float32_t p0, p1, p2, p3; /* temporary variables */
k = (S->Sint).fftLen - 1;
@@ -115,16 +116,17 @@
/* Prepares data for inverse cfft */
void merge_rfft_f32(
-arm_rfft_fast_instance_f32 * S,
-float32_t * p, float32_t * pOut)
+ const arm_rfft_fast_instance_f32 * S,
+ float32_t * p,
+ float32_t * pOut)
{
- uint32_t k; /* Loop Counter */
- float32_t twR, twI; /* RFFT Twiddle coefficients */
- float32_t *pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */
- float32_t *pA = p; /* increasing pointer */
- float32_t *pB = p; /* decreasing pointer */
- float32_t xAR, xAI, xBR, xBI; /* temporary variables */
- float32_t t1a, t1b, r, s, t, u; /* temporary variables */
+ uint32_t k; /* Loop Counter */
+ float32_t twR, twI; /* RFFT Twiddle coefficients */
+ const float32_t *pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */
+ float32_t *pA = p; /* increasing pointer */
+ float32_t *pB = p; /* decreasing pointer */
+ float32_t xAR, xAI, xBR, xBI; /* temporary variables */
+ float32_t t1a, t1b, r, s, t, u; /* temporary variables */
k = (S->Sint).fftLen - 1;
@@ -173,122 +175,123 @@
}
/**
-* @ingroup groupTransforms
+ @ingroup groupTransforms
*/
/**
- * @defgroup RealFFT Real FFT Functions
- *
- * \par
- * The CMSIS DSP library includes specialized algorithms for computing the
- * FFT of real data sequences. The FFT is defined over complex data but
- * in many applications the input is real. Real FFT algorithms take advantage
- * of the symmetry properties of the FFT and have a speed advantage over complex
- * algorithms of the same length.
- * \par
- * The Fast RFFT algorith relays on the mixed radix CFFT that save processor usage.
- * \par
- * The real length N forward FFT of a sequence is computed using the steps shown below.
- * \par
- * \image html RFFT.gif "Real Fast Fourier Transform"
- * \par
- * The real sequence is initially treated as if it were complex to perform a CFFT.
- * Later, a processing stage reshapes the data to obtain half of the frequency spectrum
- * in complex format. Except the first complex number that contains the two real numbers
- * X[0] and X[N/2] all the data is complex. In other words, the first complex sample
- * contains two real values packed.
- * \par
- * The input for the inverse RFFT should keep the same format as the output of the
- * forward RFFT. A first processing stage pre-process the data to later perform an
- * inverse CFFT.
- * \par
- * \image html RIFFT.gif "Real Inverse Fast Fourier Transform"
- * \par
- * The algorithms for floating-point, Q15, and Q31 data are slightly different
- * and we describe each algorithm in turn.
- * \par Floating-point
- * The main functions are arm_rfft_fast_f32() and arm_rfft_fast_init_f32().
- * The older functions arm_rfft_f32() and arm_rfft_init_f32() have been
- * deprecated but are still documented.
- * \par
- * The FFT of a real N-point sequence has even symmetry in the frequency
- * domain. The second half of the data equals the conjugate of the first
- * half flipped in frequency. Looking at the data, we see that we can
- * uniquely represent the FFT using only N/2 complex numbers. These are
- * packed into the output array in alternating real and imaginary
- * components:
- * \par
- * X = { real[0], imag[0], real[1], imag[1], real[2], imag[2] ...
- * real[(N/2)-1], imag[(N/2)-1 }
- * \par
- * It happens that the first complex number (real[0], imag[0]) is actually
- * all real. real[0] represents the DC offset, and imag[0] should be 0.
- * (real[1], imag[1]) is the fundamental frequency, (real[2], imag[2]) is
- * the first harmonic and so on.
- * \par
- * The real FFT functions pack the frequency domain data in this fashion.
- * The forward transform outputs the data in this form and the inverse
- * transform expects input data in this form. The function always performs
- * the needed bitreversal so that the input and output data is always in
- * normal order. The functions support lengths of [32, 64, 128, ..., 4096]
- * samples.
- * \par Q15 and Q31
- * The real algorithms are defined in a similar manner and utilize N/2 complex
- * transforms behind the scenes.
- * \par
- * The complex transforms used internally include scaling to prevent fixed-point
- * overflows. The overall scaling equals 1/(fftLen/2).
- * \par
- * A separate instance structure must be defined for each transform used but
- * twiddle factor and bit reversal tables can be reused.
- * \par
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Initializes twiddle factor table and bit reversal table pointers.
- * - Initializes the internal complex FFT data structure.
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure
- * cannot be placed into a const data section. To place an instance structure
- * into a const data section, the instance structure should be manually
- * initialized as follows:
- * <pre>
- *arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
- *arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
- * </pre>
- * where <code>fftLenReal</code> is the length of the real transform;
- * <code>fftLenBy2</code> length of the internal complex transform.
- * <code>ifftFlagR</code> Selects forward (=0) or inverse (=1) transform.
- * <code>bitReverseFlagR</code> Selects bit reversed output (=0) or normal order
- * output (=1).
- * <code>twidCoefRModifier</code> stride modifier for the twiddle factor table.
- * The value is based on the FFT length;
- * <code>pTwiddleAReal</code>points to the A array of twiddle coefficients;
- * <code>pTwiddleBReal</code>points to the B array of twiddle coefficients;
- * <code>pCfft</code> points to the CFFT Instance structure. The CFFT structure
- * must also be initialized. Refer to arm_cfft_radix4_f32() for details regarding
- * static initialization of the complex FFT instance structure.
+ @defgroup RealFFT Real FFT Functions
+
+ @par
+ The CMSIS DSP library includes specialized algorithms for computing the
+ FFT of real data sequences. The FFT is defined over complex data but
+ in many applications the input is real. Real FFT algorithms take advantage
+ of the symmetry properties of the FFT and have a speed advantage over complex
+ algorithms of the same length.
+ @par
+ The Fast RFFT algorith relays on the mixed radix CFFT that save processor usage.
+ @par
+ The real length N forward FFT of a sequence is computed using the steps shown below.
+ @par
+ \image html RFFT.gif "Real Fast Fourier Transform"
+ @par
+ The real sequence is initially treated as if it were complex to perform a CFFT.
+ Later, a processing stage reshapes the data to obtain half of the frequency spectrum
+ in complex format. Except the first complex number that contains the two real numbers
+ X[0] and X[N/2] all the data is complex. In other words, the first complex sample
+ contains two real values packed.
+ @par
+ The input for the inverse RFFT should keep the same format as the output of the
+ forward RFFT. A first processing stage pre-process the data to later perform an
+ inverse CFFT.
+ @par
+ \image html RIFFT.gif "Real Inverse Fast Fourier Transform"
+ @par
+ The algorithms for floating-point, Q15, and Q31 data are slightly different
+ and we describe each algorithm in turn.
+ @par Floating-point
+ The main functions are \ref arm_rfft_fast_f32() and \ref arm_rfft_fast_init_f32().
+ The older functions \ref arm_rfft_f32() and \ref arm_rfft_init_f32() have been deprecated
+ but are still documented.
+ @par
+ The FFT of a real N-point sequence has even symmetry in the frequency domain.
+ The second half of the data equals the conjugate of the first half flipped in frequency.
+ Looking at the data, we see that we can uniquely represent the FFT using only N/2 complex numbers.
+ These are packed into the output array in alternating real and imaginary components:
+ @par
+ X = { real[0], imag[0], real[1], imag[1], real[2], imag[2] ...
+ real[(N/2)-1], imag[(N/2)-1 }
+ @par
+ It happens that the first complex number (real[0], imag[0]) is actually
+ all real. real[0] represents the DC offset, and imag[0] should be 0.
+ (real[1], imag[1]) is the fundamental frequency, (real[2], imag[2]) is
+ the first harmonic and so on.
+ @par
+ The real FFT functions pack the frequency domain data in this fashion.
+ The forward transform outputs the data in this form and the inverse
+ transform expects input data in this form. The function always performs
+ the needed bitreversal so that the input and output data is always in
+ normal order. The functions support lengths of [32, 64, 128, ..., 4096]
+ samples.
+ @par Q15 and Q31
+ The real algorithms are defined in a similar manner and utilize N/2 complex
+ transforms behind the scenes.
+ @par
+ The complex transforms used internally include scaling to prevent fixed-point
+ overflows. The overall scaling equals 1/(fftLen/2).
+ @par
+ A separate instance structure must be defined for each transform used but
+ twiddle factor and bit reversal tables can be reused.
+ @par
+ There is also an associated initialization function for each data type.
+ The initialization function performs the following operations:
+ - Sets the values of the internal structure fields.
+ - Initializes twiddle factor table and bit reversal table pointers.
+ - Initializes the internal complex FFT data structure.
+ @par
+ Use of the initialization function is optional.
+ However, if the initialization function is used, then the instance structure
+ cannot be placed into a const data section. To place an instance structure
+ into a const data section, the instance structure should be manually
+ initialized as follows:
+ <pre>
+ arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
+ arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
+ </pre>
+ where <code>fftLenReal</code> is the length of the real transform;
+ <code>fftLenBy2</code> length of the internal complex transform.
+ <code>ifftFlagR</code> Selects forward (=0) or inverse (=1) transform.
+ <code>bitReverseFlagR</code> Selects bit reversed output (=0) or normal order
+ output (=1).
+ <code>twidCoefRModifier</code> stride modifier for the twiddle factor table.
+ The value is based on the FFT length;
+ <code>pTwiddleAReal</code>points to the A array of twiddle coefficients;
+ <code>pTwiddleBReal</code>points to the B array of twiddle coefficients;
+ <code>pCfft</code> points to the CFFT Instance structure. The CFFT structure
+ must also be initialized. Refer to arm_cfft_radix4_f32() for details regarding
+ static initialization of the complex FFT instance structure.
*/
/**
-* @addtogroup RealFFT
-* @{
+ @addtogroup RealFFT
+ @{
*/
/**
-* @brief Processing function for the floating-point real FFT.
-* @param[in] *S points to an arm_rfft_fast_instance_f32 structure.
-* @param[in] *p points to the input buffer.
-* @param[in] *pOut points to the output buffer.
-* @param[in] ifftFlag RFFT if flag is 0, RIFFT if flag is 1
-* @return none.
+ @brief Processing function for the floating-point real FFT.
+ @param[in] S points to an arm_rfft_fast_instance_f32 structure
+ @param[in] p points to input buffer
+ @param[in] pOut points to output buffer
+ @param[in] ifftFlag
+ - value = 0: RFFT
+ - value = 1: RIFFT
+ @return none
*/
void arm_rfft_fast_f32(
-arm_rfft_fast_instance_f32 * S,
-float32_t * p, float32_t * pOut,
-uint8_t ifftFlag)
+ arm_rfft_fast_instance_f32 * S,
+ float32_t * p,
+ float32_t * pOut,
+ uint8_t ifftFlag)
{
arm_cfft_instance_f32 * Sint = &(S->Sint);
Sint->fftLen = S->fftLenRFFT / 2;
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c
index 7b74c90..c0df36a 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_cfft_init_f32.c
* Description: Split Radix Decimation in Frequency CFFT Floating point processing function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,20 +30,23 @@
#include "arm_common_tables.h"
/**
- * @ingroup groupTransforms
+ @ingroup groupTransforms
*/
/**
- * @addtogroup RealFFT
- * @{
+ @addtogroup RealFFT
+ @{
*/
/**
-* @brief Initialization function for the 32pt floating-point real FFT.
-* @param[in,out] *S points to an arm_rfft_fast_instance_f32 structure.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if an error is detected.
-*/
+ @brief Initialization function for the 32pt floating-point real FFT.
+ @param[in,out] S points to an arm_rfft_fast_instance_f32 structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
arm_status arm_rfft_32_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
arm_cfft_instance_f32 * Sint;
@@ -60,14 +63,16 @@
S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_32;
return ARM_MATH_SUCCESS;
-
}
/**
-* @brief Initialization function for the 64pt floating-point real FFT.
-* @param[in,out] *S points to an arm_rfft_fast_instance_f32 structure.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if an error is detected.
-*/
+ @brief Initialization function for the 64pt floating-point real FFT.
+ @param[in,out] S points to an arm_rfft_fast_instance_f32 structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
arm_status arm_rfft_64_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
arm_cfft_instance_f32 * Sint;
@@ -84,14 +89,16 @@
S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_64;
return ARM_MATH_SUCCESS;
-
}
/**
-* @brief Initialization function for the 128pt floating-point real FFT.
-* @param[in,out] *S points to an arm_rfft_fast_instance_f32 structure.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if an error is detected.
-*/
+ @brief Initialization function for the 128pt floating-point real FFT.
+ @param[in,out] S points to an arm_rfft_fast_instance_f32 structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
arm_status arm_rfft_128_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
arm_cfft_instance_f32 * Sint;
@@ -108,14 +115,16 @@
S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_128;
return ARM_MATH_SUCCESS;
-
}
/**
-* @brief Initialization function for the 256pt floating-point real FFT.
-* @param[in,out] *S points to an arm_rfft_fast_instance_f32 structure.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if an error is detected.
+ @brief Initialization function for the 256pt floating-point real FFT.
+ @param[in,out] S points to an arm_rfft_fast_instance_f32 structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
*/
+
arm_status arm_rfft_256_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
arm_cfft_instance_f32 * Sint;
@@ -132,14 +141,16 @@
S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_256;
return ARM_MATH_SUCCESS;
-
}
/**
-* @brief Initialization function for the 512pt floating-point real FFT.
-* @param[in,out] *S points to an arm_rfft_fast_instance_f32 structure.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if an error is detected.
-*/
+ @brief Initialization function for the 512pt floating-point real FFT.
+ @param[in,out] S points to an arm_rfft_fast_instance_f32 structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
arm_status arm_rfft_512_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
arm_cfft_instance_f32 * Sint;
@@ -156,14 +167,16 @@
S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_512;
return ARM_MATH_SUCCESS;
-
}
/**
-* @brief Initialization function for the 1024pt floating-point real FFT.
-* @param[in,out] *S points to an arm_rfft_fast_instance_f32 structure.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if an error is detected.
-*/
+ @brief Initialization function for the 1024pt floating-point real FFT.
+ @param[in,out] S points to an arm_rfft_fast_instance_f32 structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
arm_status arm_rfft_1024_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
arm_cfft_instance_f32 * Sint;
@@ -180,14 +193,15 @@
S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_1024;
return ARM_MATH_SUCCESS;
-
}
/**
-* @brief Initialization function for the 2048pt floating-point real FFT.
-* @param[in,out] *S points to an arm_rfft_fast_instance_f32 structure.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if an error is detected.
-*/
+ @brief Initialization function for the 2048pt floating-point real FFT.
+ @param[in,out] S points to an arm_rfft_fast_instance_f32 structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
arm_status arm_rfft_2048_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
arm_cfft_instance_f32 * Sint;
@@ -204,14 +218,16 @@
S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_2048;
return ARM_MATH_SUCCESS;
-
}
/**
-* @brief Initialization function for the 4096pt floating-point real FFT.
-* @param[in,out] *S points to an arm_rfft_fast_instance_f32 structure.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if an error is detected.
-*/
+* @brief Initialization function for the 4096pt floating-point real FFT.
+* @param[in,out] S points to an arm_rfft_fast_instance_f32 structure
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
arm_status arm_rfft_4096_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
arm_cfft_instance_f32 * Sint;
@@ -228,21 +244,23 @@
S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_4096;
return ARM_MATH_SUCCESS;
-
}
/**
-* @brief Initialization function for the floating-point real FFT.
-* @param[in,out] *S points to an arm_rfft_fast_instance_f32 structure.
-* @param[in] fftLen length of the Real Sequence.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>fftLen</code> Specifies length of RFFT/CIFFT process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096.
-* \par
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
-*/
+ @brief Initialization function for the floating-point real FFT.
+ @param[in,out] S points to an arm_rfft_fast_instance_f32 structure
+ @param[in] fftLen length of the Real Sequence
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+ @par Description
+ The parameter <code>fftLen</code> specifies the length of RFFT/CIFFT process.
+ Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096.
+ @par
+ This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
+
arm_status arm_rfft_fast_init_f32(
arm_rfft_fast_instance_f32 * S,
uint16_t fftLen)
@@ -276,6 +294,8 @@
case 32U:
fptr = arm_rfft_32_fast_init_f32;
break;
+ default:
+ return ARM_MATH_ARGUMENT_ERROR;
}
if( ! fptr ) return ARM_MATH_ARGUMENT_ERROR;
@@ -284,5 +304,5 @@
}
/**
- * @} end of RealFFT group
+ @} end of RealFFT group
*/
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c
index bb3213a..6e7184f 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c
@@ -3,13 +3,13 @@
* Title: arm_rfft_init_f32.c
* Description: RFFT & RIFFT Floating point initialisation function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,25 +29,26 @@
#include "arm_math.h"
/**
- * @ingroup RealFFT
+ @ingroup RealFFT
*/
/**
- * @addtogroup RealFFT_Table Real FFT Tables
- * @{
+ @addtogroup RealFFT_Table Real FFT Tables
+ @{
*/
/**
-* \par
-* Generation of realCoefA array:
-* \par
-* n = 4096
-* <pre>for (i = 0; i < n; i++)
-* {
-* pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
-* pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-* } </pre>
-*/
+ @par
+ Generation of realCoefA array:
+ @par
+ n = 4096
+ <pre>for (i = 0; i < n; i++)
+ {
+ pATable[2 * i] = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+ pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+ }</pre>
+ */
+
static const float32_t realCoefA[8192] = {
0.500000000000000f, -0.500000000000000f, 0.499616503715515f, -0.499999850988388f,
0.499233007431030f, -0.499999403953552f, 0.498849511146545f, -0.499998688697815f,
@@ -2101,17 +2102,17 @@
/**
-* \par
-* Generation of realCoefB array:
-* \par
-* n = 4096
-* <pre>for (i = 0; i < n; i++)
-* {
-* pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
-* pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-* } </pre>
-*
-*/
+ @par
+ Generation of realCoefB array:
+ @par
+ n = 4096
+ <pre>for (i = 0; i < n; i++)
+ {
+ pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+ pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+ }</pre>
+ */
+
static const float32_t realCoefB[8192] = {
0.500000000000000f, 0.500000000000000f, 0.500383496284485f, 0.499999850988388f,
0.500766992568970f, 0.499999403953552f, 0.501150488853455f, 0.499998688697815f,
@@ -4166,37 +4167,42 @@
/**
-* @brief Initialization function for the floating-point RFFT/RIFFT.
-* @deprecated Do not use this function. It has been superceded by \ref arm_rfft_fast_init_f32 and will be removed
-* in the future.
-* @param[in,out] *S points to an instance of the floating-point RFFT/RIFFT structure.
-* @param[in,out] *S_CFFT points to an instance of the floating-point CFFT/CIFFT structure.
-* @param[in] fftLenReal length of the FFT.
-* @param[in] ifftFlagR flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
-* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>fftLenReal</code> Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.
-* \par
-* The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* This function also initializes Twiddle factor table.
-*/
+ @} end of RealFFT_Table group
+ */
/**
-* @} end of RealFFT_Table group
-*/
+ @addtogroup RealFFT
+ @{
+ */
/**
-* @addtogroup RealFFT
-* @{
-*/
+ @brief Initialization function for the floating-point RFFT/RIFFT.
+ @deprecated Do not use this function. It has been superceded by \ref arm_rfft_fast_init_f32 and will be removed in the future.
+ @param[in,out] S points to an instance of the floating-point RFFT/RIFFT structure
+ @param[in,out] S_CFFT points to an instance of the floating-point CFFT/CIFFT structure
+ @param[in] fftLenReal length of the FFT.
+ @param[in] ifftFlagR flag that selects transform direction
+ - value = 0: forward transform
+ - value = 1: inverse transform
+ @param[in] bitReverseFlag flag that enables / disables bit reversal of output
+ - value = 0: disables bit reversal of output
+ - value = 1: enables bit reversal of output
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLenReal</code> is not a supported length
+
+ @par Description
+ The parameter <code>fftLenReal</code>specifies length of RFFT/RIFFT Process.
+ Supported FFT Lengths are 128, 512, 2048.
+ @par
+ The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
+ Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
+ @par
+ The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+ Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+ @par
+ This function also initializes Twiddle factor table.
+ */
arm_status arm_rfft_init_f32(
arm_rfft_instance_f32 * S,
@@ -4268,6 +4274,6 @@
}
- /**
- * @} end of RealFFT group
- */
+/**
+ @} end of RealFFT group
+ */
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c
index 0e09737..755f740 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c
@@ -3,13 +3,13 @@
* Title: arm_rfft_init_q15.c
* Description: RFFT & RIFFT Q15 initialisation function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -31,29 +31,29 @@
#include "arm_const_structs.h"
/**
-* @ingroup RealFFT
-*/
+ @ingroup RealFFT
+ */
/**
- * @addtogroup RealFFT_Table Real FFT Tables
-* @{
-*/
+ @addtogroup RealFFT_Table Real FFT Tables
+ @{
+ */
/**
-* \par
-* Generation fixed-point realCoefAQ15 array in Q15 format:
-* \par
-* n = 4096
-* <pre>for (i = 0; i < n; i++)
-* {
-* pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
-* pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-* } </pre>
-* \par
-* Convert to fixed point Q15 format
-* round(pATable[i] * pow(2, 15))
-*/
-const q15_t ALIGN4 realCoefAQ15[8192] = {
+ @par
+ Generation fixed-point realCoefAQ15 array in Q15 format:
+ @par
+ n = 4096
+ <pre>for (i = 0; i < n; i++)
+ {
+ pATable[2 * i] = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+ pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+ }</pre>
+ @par
+ Convert to fixed point Q15 format
+ round(pATable[i] * pow(2, 15))
+ */
+const q15_t __ALIGNED(4) realCoefAQ15[8192] = {
(q15_t)0x4000, (q15_t)0xc000, (q15_t)0x3ff3, (q15_t)0xc000, (q15_t)0x3fe7, (q15_t)0xc000, (q15_t)0x3fda, (q15_t)0xc000,
(q15_t)0x3fce, (q15_t)0xc000, (q15_t)0x3fc1, (q15_t)0xc000, (q15_t)0x3fb5, (q15_t)0xc000, (q15_t)0x3fa8, (q15_t)0xc000,
(q15_t)0x3f9b, (q15_t)0xc000, (q15_t)0x3f8f, (q15_t)0xc000, (q15_t)0x3f82, (q15_t)0xc000, (q15_t)0x3f76, (q15_t)0xc001,
@@ -1081,21 +1081,20 @@
};
/**
-* \par
-* Generation of real_CoefB array:
-* \par
-* n = 4096
-* <pre>for (i = 0; i < n; i++)
-* {
-* pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
-* pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-* } </pre>
-* \par
-* Convert to fixed point Q15 format
-* round(pBTable[i] * pow(2, 15))
-*
+ @par
+ Generation of real_CoefB array:
+ @par
+ n = 4096
+ <pre>for (i = 0; i < n; i++)
+ {
+ pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+ pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+ }</pre>
+ @par
+ Convert to fixed point Q15 format
+ round(pBTable[i] * pow(2, 15))
*/
-const q15_t ALIGN4 realCoefBQ15[8192] = {
+const q15_t __ALIGNED(4) realCoefBQ15[8192] = {
(q15_t)0x4000, (q15_t)0x4000, (q15_t)0x400d, (q15_t)0x4000, (q15_t)0x4019, (q15_t)0x4000, (q15_t)0x4026, (q15_t)0x4000,
(q15_t)0x4032, (q15_t)0x4000, (q15_t)0x403f, (q15_t)0x4000, (q15_t)0x404b, (q15_t)0x4000, (q15_t)0x4058, (q15_t)0x4000,
(q15_t)0x4065, (q15_t)0x4000, (q15_t)0x4071, (q15_t)0x4000, (q15_t)0x407e, (q15_t)0x4000, (q15_t)0x408a, (q15_t)0x3fff,
@@ -2123,34 +2122,41 @@
};
/**
-* @} end of RealFFT_Table group
-*/
+ @} end of RealFFT_Table group
+ */
/**
-* @addtogroup RealFFT
-* @{
-*/
+ @addtogroup RealFFT
+ @{
+ */
/**
-* @brief Initialization function for the Q15 RFFT/RIFFT.
-* @param[in, out] *S points to an instance of the Q15 RFFT/RIFFT structure.
-* @param[in] fftLenReal length of the FFT.
-* @param[in] ifftFlagR flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
-* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>fftLenReal</code> Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
-* \par
-* The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* This function also initializes Twiddle factor table.
-*/
+ @brief Initialization function for the Q15 RFFT/RIFFT.
+ @param[in,out] S points to an instance of the Q15 RFFT/RIFFT structure
+ @param[in] fftLenReal length of the FFT
+ @param[in] ifftFlagR flag that selects transform direction
+ - value = 0: forward transform
+ - value = 1: inverse transform
+ @param[in] bitReverseFlag flag that enables / disables bit reversal of output
+ - value = 0: disables bit reversal of output
+ - value = 1: enables bit reversal of output
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLenReal</code> is not a supported length
+
+ @par Details
+ The parameter <code>fftLenReal</code> specifies length of RFFT/RIFFT Process.
+ Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
+ @par
+ The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
+ Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
+ @par
+ The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+ Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+ @par
+ This function also initializes Twiddle factor table.
+ */
+
arm_status arm_rfft_init_q15(
arm_rfft_instance_q15 * S,
uint32_t fftLenReal,
@@ -2225,5 +2231,5 @@
}
/**
-* @} end of RealFFT group
-*/
+ @} end of RealFFT group
+ */
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c
index 71ec4f5..10af53f 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c
@@ -3,13 +3,13 @@
* Title: arm_rfft_init_q31.c
* Description: RFFT & RIFFT Q31 initialisation function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -31,27 +31,27 @@
#include "arm_const_structs.h"
/**
-* @ingroup RealFFT
-*/
+ @ingroup RealFFT
+ */
/**
- * @addtogroup RealFFT_Table Real FFT Tables
-* @{
-*/
+ @addtogroup RealFFT_Table Real FFT Tables
+ @{
+ */
/**
-* \par
-* Generation fixed-point realCoefAQ31 array in Q31 format:
-* \par
-* n = 4096
-* <pre>for (i = 0; i < n; i++)
-* {
-* pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
-* pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-* }</pre>
-* \par
-* Convert to fixed point Q31 format
-* round(pATable[i] * pow(2, 31))
+ @par
+ Generation fixed-point realCoefAQ31 array in Q31 format:
+ @par
+ n = 4096
+ <pre>for (i = 0; i < n; i++)
+ {
+ pATable[2 * i] = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+ pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+ }</pre>
+ @par
+ Convert to fixed point Q31 format
+ round(pATable[i] * pow(2, 31))
*/
const q31_t realCoefAQ31[8192] = {
(q31_t)0x40000000, (q31_t)0xc0000000, (q31_t)0x3ff36f02, (q31_t)0xc000013c,
@@ -2106,20 +2106,19 @@
/**
-* \par
-* Generation of realCoefBQ31 array:
-* \par
-* n = 4096
-* <pre>for (i = 0; i < n; i++)
-* {
-* pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
-* pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-* } </pre>
-* \par
-* Convert to fixed point Q31 format
-* round(pBTable[i] * pow(2, 31))
-*
-*/
+ @par
+ Generation of realCoefBQ31 array:
+ @par
+ n = 4096
+ <pre>for (i = 0; i < n; i++)
+ {
+ pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+ pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+ } </pre>
+ @par
+ Convert to fixed point Q31 format
+ round(pBTable[i] * pow(2, 31))
+ */
const q31_t realCoefBQ31[8192] = {
(q31_t)0x40000000, (q31_t)0x40000000, (q31_t)0x400c90fe, (q31_t)0x3ffffec4,
@@ -4173,33 +4172,39 @@
};
/**
-* @} end of RealFFT_Table group
-*/
+ @} end of RealFFT_Table group
+ */
/**
-* @addtogroup RealFFT
-* @{
-*/
+ @addtogroup RealFFT
+ @{
+ */
/**
-* @brief Initialization function for the Q31 RFFT/RIFFT.
-* @param[in, out] *S points to an instance of the Q31 RFFT/RIFFT structure.
-* @param[in] fftLenReal length of the FFT.
-* @param[in] ifftFlagR flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
-* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>fftLenReal</code> Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
-* \par
-* The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par 7
-* This function also initializes Twiddle factor table.
+ @brief Initialization function for the Q31 RFFT/RIFFT.
+ @param[in,out] S points to an instance of the Q31 RFFT/RIFFT structure
+ @param[in] fftLenReal length of the FFT
+ @param[in] ifftFlagR flag that selects transform direction
+ - value = 0: forward transform
+ - value = 1: inverse transform
+ @param[in] bitReverseFlag flag that enables / disables bit reversal of output
+ - value = 0: disables bit reversal of output
+ - value = 1: enables bit reversal of output
+ @return execution status
+ - \ref ARM_MATH_SUCCESS : Operation successful
+ - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLenReal</code> is not a supported length
+
+ @par Details
+ The parameter <code>fftLenReal</code> specifies length of RFFT/RIFFT Process.
+ Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
+ @par
+ The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
+ Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
+ @par
+ The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+ Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+ @par
+ This function also initializes Twiddle factor table.
*/
arm_status arm_rfft_init_q31(
@@ -4276,5 +4281,5 @@
}
/**
-* @} end of RealFFT group
-*/
+ @} end of RealFFT group
+ */
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c
index f85cf30..dd5fa77 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c
@@ -3,13 +3,13 @@
* Title: arm_rfft_q15.c
* Description: RFFT & RIFFT Q15 process function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -33,173 +33,161 @@
* -------------------------------------------------------------------- */
void arm_split_rfft_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- q15_t * pATable,
- q15_t * pBTable,
- q15_t * pDst,
- uint32_t modifier);
+ q15_t * pSrc,
+ uint32_t fftLen,
+ const q15_t * pATable,
+ const q15_t * pBTable,
+ q15_t * pDst,
+ uint32_t modifier);
void arm_split_rifft_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- q15_t * pATable,
- q15_t * pBTable,
- q15_t * pDst,
- uint32_t modifier);
+ q15_t * pSrc,
+ uint32_t fftLen,
+ const q15_t * pATable,
+ const q15_t * pBTable,
+ q15_t * pDst,
+ uint32_t modifier);
/**
-* @addtogroup RealFFT
-* @{
-*/
+ @addtogroup RealFFT
+ @{
+ */
/**
-* @brief Processing function for the Q15 RFFT/RIFFT.
-* @param[in] *S points to an instance of the Q15 RFFT/RIFFT structure.
-* @param[in] *pSrc points to the input buffer.
-* @param[out] *pDst points to the output buffer.
-* @return none.
-*
-* \par Input an output formats:
-* \par
-* Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
-* Hence the output format is different for different RFFT sizes.
-* The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
-* \par
-* \image html RFFTQ15.gif "Input and Output Formats for Q15 RFFT"
-* \par
-* \image html RIFFTQ15.gif "Input and Output Formats for Q15 RIFFT"
-*/
+ @brief Processing function for the Q15 RFFT/RIFFT.
+ @param[in] S points to an instance of the Q15 RFFT/RIFFT structure
+ @param[in] pSrc points to input buffer
+ @param[out] pDst points to output buffer
+ @return none
+
+ @par Input an output formats
+ Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+ Hence the output format is different for different RFFT sizes.
+ The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
+ @par
+ \image html RFFTQ15.gif "Input and Output Formats for Q15 RFFT"
+ @par
+ \image html RIFFTQ15.gif "Input and Output Formats for Q15 RIFFT"
+ */
void arm_rfft_q15(
- const arm_rfft_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst)
+ const arm_rfft_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst)
{
- const arm_cfft_instance_q15 *S_CFFT = S->pCfft;
- uint32_t i;
- uint32_t L2 = S->fftLenReal >> 1;
+ const arm_cfft_instance_q15 *S_CFFT = S->pCfft;
+ uint32_t L2 = S->fftLenReal >> 1U;
+ uint32_t i;
- /* Calculation of RIFFT of input */
- if (S->ifftFlagR == 1U)
- {
- /* Real IFFT core process */
- arm_split_rifft_q15(pSrc, L2, S->pTwiddleAReal,
- S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+ /* Calculation of RIFFT of input */
+ if (S->ifftFlagR == 1U)
+ {
+ /* Real IFFT core process */
+ arm_split_rifft_q15 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
- /* Complex IFFT process */
- arm_cfft_q15(S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
+ /* Complex IFFT process */
+ arm_cfft_q15 (S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
- for(i=0;i<S->fftLenReal;i++)
- {
- pDst[i] = pDst[i] << 1;
- }
- }
- else
- {
- /* Calculation of RFFT of input */
+ for(i = 0; i < S->fftLenReal; i++)
+ {
+ pDst[i] = pDst[i] << 1U;
+ }
+ }
+ else
+ {
+ /* Calculation of RFFT of input */
- /* Complex FFT process */
- arm_cfft_q15(S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
+ /* Complex FFT process */
+ arm_cfft_q15 (S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
- /* Real FFT core process */
- arm_split_rfft_q15(pSrc, L2, S->pTwiddleAReal,
- S->pTwiddleBReal, pDst, S->twidCoefRModifier);
- }
+ /* Real FFT core process */
+ arm_split_rfft_q15 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+ }
+
}
/**
-* @} end of RealFFT group
-*/
+ @} end of RealFFT group
+ */
/**
-* @brief Core Real FFT process
-* @param *pSrc points to the input buffer.
-* @param fftLen length of FFT.
-* @param *pATable points to the A twiddle Coef buffer.
-* @param *pBTable points to the B twiddle Coef buffer.
-* @param *pDst points to the output buffer.
-* @param modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @return none.
-* The function implements a Real FFT
-*/
+ @brief Core Real FFT process
+ @param[in] pSrc points to input buffer
+ @param[in] fftLen length of FFT
+ @param[in] pATable points to twiddle Coef A buffer
+ @param[in] pBTable points to twiddle Coef B buffer
+ @param[out] pDst points to output buffer
+ @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+ @return none
+
+ @par
+ The function implements a Real FFT
+ */
void arm_split_rfft_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- q15_t * pATable,
- q15_t * pBTable,
- q15_t * pDst,
- uint32_t modifier)
-{
- uint32_t i; /* Loop Counter */
- q31_t outR, outI; /* Temporary variables for output */
- q15_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */
- q15_t *pSrc1, *pSrc2;
+ q15_t * pSrc,
+ uint32_t fftLen,
+ const q15_t * pATable,
+ const q15_t * pBTable,
+ q15_t * pDst,
+ uint32_t modifier)
+{
+ uint32_t i; /* Loop Counter */
+ q31_t outR, outI; /* Temporary variables for output */
+ const q15_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */
+ q15_t *pSrc1, *pSrc2;
#if defined (ARM_MATH_DSP)
- q15_t *pD1, *pD2;
+ q15_t *pD1, *pD2;
#endif
- // pSrc[2U * fftLen] = pSrc[0];
- // pSrc[(2U * fftLen) + 1U] = pSrc[1];
+ /* Init coefficient pointers */
+ pCoefA = &pATable[modifier * 2];
+ pCoefB = &pBTable[modifier * 2];
- pCoefA = &pATable[modifier * 2U];
- pCoefB = &pBTable[modifier * 2U];
-
- pSrc1 = &pSrc[2];
- pSrc2 = &pSrc[(2U * fftLen) - 2U];
+ pSrc1 = &pSrc[2];
+ pSrc2 = &pSrc[(2U * fftLen) - 2U];
#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
i = 1U;
pD1 = pDst + 2;
pD2 = pDst + (4U * fftLen) - 2;
- for(i = fftLen - 1; i > 0; i--)
+ for (i = fftLen - 1; i > 0; i--)
{
/*
- outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
- + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
- pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
- */
+ outR = ( pSrc[2 * i] * pATable[2 * i]
+ - pSrc[2 * i + 1] * pATable[2 * i + 1]
+ + pSrc[2 * n - 2 * i] * pBTable[2 * i]
+ + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
- /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
- pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
+ outI = ( pIn[2 * i + 1] * pATable[2 * i]
+ + pIn[2 * i] * pATable[2 * i + 1]
+ + pIn[2 * n - 2 * i] * pBTable[2 * i + 1]
+ - pIn[2 * n - 2 * i + 1] * pBTable[2 * i])
+ */
#ifndef ARM_MATH_BIG_ENDIAN
-
/* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */
- outR = __SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA));
-
+ outR = __SMUSD(read_q15x2 (pSrc1), read_q15x2((q15_t *) pCoefA));
#else
-
/* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */
- outR = -(__SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA)));
+ outR = -(__SMUSD(read_q15x2 (pSrc1), read_q15x2((q15_t *) pCoefA)));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ /* pSrc[2 * n - 2 * i] * pBTable[2 * i] + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
+ outR = __SMLAD(read_q15x2 (pSrc2), read_q15x2((q15_t *) pCoefB), outR) >> 16U;
- /* pSrc[2 * n - 2 * i] * pBTable[2 * i] +
- pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
- outR = __SMLAD(*__SIMD32(pSrc2), *__SIMD32(pCoefB), outR) >> 16U;
-
- /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-
+ /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
#ifndef ARM_MATH_BIG_ENDIAN
-
- outI = __SMUSDX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
-
+ outI = __SMUSDX(read_q15x2_da (&pSrc2), read_q15x2((q15_t *) pCoefB));
#else
-
- outI = __SMUSDX(*__SIMD32(pCoefB), *__SIMD32(pSrc2)--);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ outI = __SMUSDX(read_q15x2 ((q15_t *) pCoefB), read_q15x2_da (&pSrc2));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */
- outI = __SMLADX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), outI);
+ outI = __SMLADX(read_q15x2_ia (&pSrc1), read_q15x2 ((q15_t *) pCoefA), outI);
/* write output */
*pD1++ = (q15_t) outR;
@@ -215,23 +203,23 @@
pCoefA = pCoefA + (2U * modifier);
}
- pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
- pDst[(2U * fftLen) + 1U] = 0;
+ pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1U;
+ pDst[2U * fftLen + 1U] = 0;
- pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
+ pDst[0] = (pSrc[0] + pSrc[1]) >> 1U;
pDst[1] = 0;
#else
- /* Run the below code for Cortex-M0 */
i = 1U;
while (i < fftLen)
{
/*
- outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
- + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
- pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+ outR = ( pSrc[2 * i] * pATable[2 * i]
+ - pSrc[2 * i + 1] * pATable[2 * i + 1]
+ + pSrc[2 * n - 2 * i] * pBTable[2 * i]
+ + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
*/
outR = *pSrc1 * *pCoefA;
@@ -239,10 +227,11 @@
outR = outR + (*pSrc2 * *pCoefB);
outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 16;
-
- /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
- pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+ /*
+ outI = ( pIn[2 * i + 1] * pATable[2 * i]
+ + pIn[2 * i] * pATable[2 * i + 1]
+ + pIn[2 * n - 2 * i] * pBTable[2 * i + 1]
+ - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
*/
outI = *pSrc2 * *(pCoefB + 1);
@@ -256,7 +245,7 @@
/* write output */
pDst[2U * i] = (q15_t) outR;
- pDst[(2U * i) + 1U] = outI >> 16U;
+ pDst[2U * i + 1U] = outI >> 16U;
/* write complex conjugate output */
pDst[(4U * fftLen) - (2U * i)] = (q15_t) outR;
@@ -270,7 +259,7 @@
}
pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
- pDst[(2U * fftLen) + 1U] = 0;
+ pDst[2U * fftLen + 1U] = 0;
pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
pDst[1] = 0;
@@ -280,147 +269,112 @@
/**
-* @brief Core Real IFFT process
-* @param[in] *pSrc points to the input buffer.
-* @param[in] fftLen length of FFT.
-* @param[in] *pATable points to the twiddle Coef A buffer.
-* @param[in] *pBTable points to the twiddle Coef B buffer.
-* @param[out] *pDst points to the output buffer.
-* @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @return none.
-* The function implements a Real IFFT
-*/
+ @brief Core Real IFFT process
+ @param[in] pSrc points to input buffer
+ @param[in] fftLen length of FFT
+ @param[in] pATable points to twiddle Coef A buffer
+ @param[in] pBTable points to twiddle Coef B buffer
+ @param[out] pDst points to output buffer
+ @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+ @return none
+
+ @par
+ The function implements a Real IFFT
+ */
+
void arm_split_rifft_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- q15_t * pATable,
- q15_t * pBTable,
- q15_t * pDst,
- uint32_t modifier)
+ q15_t * pSrc,
+ uint32_t fftLen,
+ const q15_t * pATable,
+ const q15_t * pBTable,
+ q15_t * pDst,
+ uint32_t modifier)
{
- uint32_t i; /* Loop Counter */
- q31_t outR, outI; /* Temporary variables for output */
- q15_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */
- q15_t *pSrc1, *pSrc2;
- q15_t *pDst1 = &pDst[0];
+ uint32_t i; /* Loop Counter */
+ q31_t outR, outI; /* Temporary variables for output */
+ const q15_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */
+ q15_t *pSrc1, *pSrc2;
+ q15_t *pDst1 = &pDst[0];
- pCoefA = &pATable[0];
- pCoefB = &pBTable[0];
+ pCoefA = &pATable[0];
+ pCoefB = &pBTable[0];
- pSrc1 = &pSrc[0];
- pSrc2 = &pSrc[2U * fftLen];
+ pSrc1 = &pSrc[0];
+ pSrc2 = &pSrc[2 * fftLen];
+
+ i = fftLen;
+ while (i > 0U)
+ {
+ /*
+ outR = ( pIn[2 * i] * pATable[2 * i]
+ + pIn[2 * i + 1] * pATable[2 * i + 1]
+ + pIn[2 * n - 2 * i] * pBTable[2 * i]
+ - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+
+ outI = ( pIn[2 * i + 1] * pATable[2 * i]
+ - pIn[2 * i] * pATable[2 * i + 1]
+ - pIn[2 * n - 2 * i] * pBTable[2 * i + 1]
+ - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+ */
#if defined (ARM_MATH_DSP)
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- i = fftLen;
-
- while (i > 0U)
- {
- /*
- outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
- pIn[2 * n - 2 * i] * pBTable[2 * i] -
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
-
- outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
- pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
- */
-
-
#ifndef ARM_MATH_BIG_ENDIAN
-
- /* pIn[2 * n - 2 * i] * pBTable[2 * i] -
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
- outR = __SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB));
-
+ /* pIn[2 * n - 2 * i] * pBTable[2 * i] - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
+ outR = __SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *) pCoefB));
#else
+ /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] + pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */
+ outR = -(__SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *) pCoefB)));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] +
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */
- outR = -(__SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB)));
+ /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] + pIn[2 * n - 2 * i] * pBTable[2 * i] */
+ outR = __SMLAD(read_q15x2(pSrc1), read_q15x2 ((q15_t *) pCoefA), outR) >> 16U;
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+ /* -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] + pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
+ outI = __SMUADX(read_q15x2_da (&pSrc2), read_q15x2((q15_t *) pCoefB));
- /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
- pIn[2 * n - 2 * i] * pBTable[2 * i] */
- outR = __SMLAD(*__SIMD32(pSrc1), *__SIMD32(pCoefA), outR) >> 16U;
-
- /*
- -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] +
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
- outI = __SMUADX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
-
- /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */
-
+ /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */
#ifndef ARM_MATH_BIG_ENDIAN
-
- outI = __SMLSDX(*__SIMD32(pCoefA), *__SIMD32(pSrc1)++, -outI);
-
+ outI = __SMLSDX(read_q15x2 ((q15_t *) pCoefA), read_q15x2_ia (&pSrc1), -outI);
#else
+ outI = __SMLSDX(read_q15x2_ia (&pSrc1), read_q15x2 ((q15_t *) pCoefA), -outI);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- outI = __SMLSDX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), -outI);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- /* write output */
-
+ /* write output */
#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst1)++ = __PKHBT(outR, (outI >> 16U), 16);
-
+ write_q15x2_ia (&pDst1, __PKHBT(outR, (outI >> 16U), 16));
#else
+ write_q15x2_ia (&pDst1, __PKHBT((outI >> 16U), outR, 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
- *__SIMD32(pDst1)++ = __PKHBT((outI >> 16U), outR, 16);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#else /* #if defined (ARM_MATH_DSP) */
- /* update coefficient pointer */
- pCoefB = pCoefB + (2U * modifier);
- pCoefA = pCoefA + (2U * modifier);
+ outR = *pSrc2 * *pCoefB;
+ outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1));
+ outR = outR + (*pSrc1 * *pCoefA);
+ outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 16;
- i--;
- }
-#else
- /* Run the below code for Cortex-M0 */
- i = fftLen;
+ outI = *(pSrc1 + 1) * *pCoefA;
+ outI = outI - (*pSrc1 * *(pCoefA + 1));
+ outI = outI - (*pSrc2 * *(pCoefB + 1));
+ outI = outI - (*(pSrc2 + 1) * *(pCoefB));
- while (i > 0U)
- {
- /*
- outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
- pIn[2 * n - 2 * i] * pBTable[2 * i] -
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
- */
+ /* update input pointers */
+ pSrc1 += 2U;
+ pSrc2 -= 2U;
- outR = *pSrc2 * *pCoefB;
- outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1));
- outR = outR + (*pSrc1 * *pCoefA);
- outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 16;
+ /* write output */
+ *pDst1++ = (q15_t) outR;
+ *pDst1++ = (q15_t) (outI >> 16);
- /*
- outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
- pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
- */
-
- outI = *(pSrc1 + 1) * *pCoefA;
- outI = outI - (*pSrc1 * *(pCoefA + 1));
- outI = outI - (*pSrc2 * *(pCoefB + 1));
- outI = outI - (*(pSrc2 + 1) * *(pCoefB));
-
- /* update input pointers */
- pSrc1 += 2U;
- pSrc2 -= 2U;
-
- /* write output */
- *pDst1++ = (q15_t) outR;
- *pDst1++ = (q15_t) (outI >> 16);
-
- /* update coefficient pointer */
- pCoefB = pCoefB + (2U * modifier);
- pCoefA = pCoefA + (2U * modifier);
-
- i--;
- }
#endif /* #if defined (ARM_MATH_DSP) */
+
+ /* update coefficient pointer */
+ pCoefB = pCoefB + (2 * modifier);
+ pCoefA = pCoefA + (2 * modifier);
+
+ i--;
+ }
+
}
diff --git a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c
index 5386140..3230f2f 100644
--- a/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c
+++ b/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c
@@ -3,13 +3,13 @@
* Title: arm_rfft_q31.c
* Description: FFT & RIFFT Q31 process function
*
- * $Date: 27. January 2017
- * $Revision: V.1.5.1
+ * $Date: 28. February 2019
+ * $Revision: V.1.5.5
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -33,251 +33,260 @@
* -------------------------------------------------------------------- */
void arm_split_rfft_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- q31_t * pATable,
- q31_t * pBTable,
- q31_t * pDst,
- uint32_t modifier);
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pATable,
+ const q31_t * pBTable,
+ q31_t * pDst,
+ uint32_t modifier);
void arm_split_rifft_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- q31_t * pATable,
- q31_t * pBTable,
- q31_t * pDst,
- uint32_t modifier);
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pATable,
+ const q31_t * pBTable,
+ q31_t * pDst,
+ uint32_t modifier);
/**
-* @addtogroup RealFFT
-* @{
-*/
+ @addtogroup RealFFT
+ @{
+ */
/**
-* @brief Processing function for the Q31 RFFT/RIFFT.
-* @param[in] *S points to an instance of the Q31 RFFT/RIFFT structure.
-* @param[in] *pSrc points to the input buffer.
-* @param[out] *pDst points to the output buffer.
-* @return none.
-*
-* \par Input an output formats:
-* \par
-* Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
-* Hence the output format is different for different RFFT sizes.
-* The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
-* \par
-* \image html RFFTQ31.gif "Input and Output Formats for Q31 RFFT"
-*
-* \par
-* \image html RIFFTQ31.gif "Input and Output Formats for Q31 RIFFT"
-*/
+ @brief Processing function for the Q31 RFFT/RIFFT.
+ @param[in] S points to an instance of the Q31 RFFT/RIFFT structure
+ @param[in] pSrc points to input buffer
+ @param[out] pDst points to output buffer
+ @return none
+
+ @par Input an output formats
+ Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+ Hence the output format is different for different RFFT sizes.
+ The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
+ @par
+ \image html RFFTQ31.gif "Input and Output Formats for Q31 RFFT"
+ @par
+ \image html RIFFTQ31.gif "Input and Output Formats for Q31 RIFFT"
+ */
+
void arm_rfft_q31(
- const arm_rfft_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst)
+ const arm_rfft_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst)
{
- const arm_cfft_instance_q31 *S_CFFT = S->pCfft;
- uint32_t i;
- uint32_t L2 = S->fftLenReal >> 1;
+ const arm_cfft_instance_q31 *S_CFFT = S->pCfft;
+ uint32_t L2 = S->fftLenReal >> 1U;
+ uint32_t i;
- /* Calculation of RIFFT of input */
- if (S->ifftFlagR == 1U)
- {
- /* Real IFFT core process */
- arm_split_rifft_q31(pSrc, L2, S->pTwiddleAReal,
- S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+ /* Calculation of RIFFT of input */
+ if (S->ifftFlagR == 1U)
+ {
+ /* Real IFFT core process */
+ arm_split_rifft_q31 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
- /* Complex IFFT process */
- arm_cfft_q31(S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
+ /* Complex IFFT process */
+ arm_cfft_q31 (S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
- for(i=0;i<S->fftLenReal;i++)
- {
- pDst[i] = pDst[i] << 1;
- }
- }
- else
- {
- /* Calculation of RFFT of input */
+ for(i = 0; i < S->fftLenReal; i++)
+ {
+ pDst[i] = pDst[i] << 1U;
+ }
+ }
+ else
+ {
+ /* Calculation of RFFT of input */
- /* Complex FFT process */
- arm_cfft_q31(S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
+ /* Complex FFT process */
+ arm_cfft_q31 (S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
- /* Real FFT core process */
- arm_split_rfft_q31(pSrc, L2, S->pTwiddleAReal,
- S->pTwiddleBReal, pDst, S->twidCoefRModifier);
- }
+ /* Real FFT core process */
+ arm_split_rfft_q31 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+ }
+
}
/**
-* @} end of RealFFT group
-*/
+ @} end of RealFFT group
+ */
/**
-* @brief Core Real FFT process
-* @param[in] *pSrc points to the input buffer.
-* @param[in] fftLen length of FFT.
-* @param[in] *pATable points to the twiddle Coef A buffer.
-* @param[in] *pBTable points to the twiddle Coef B buffer.
-* @param[out] *pDst points to the output buffer.
-* @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @return none.
-*/
+ @brief Core Real FFT process
+ @param[in] pSrc points to input buffer
+ @param[in] fftLen length of FFT
+ @param[in] pATable points to twiddle Coef A buffer
+ @param[in] pBTable points to twiddle Coef B buffer
+ @param[out] pDst points to output buffer
+ @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+ @return none
+ */
+
void arm_split_rfft_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- q31_t * pATable,
- q31_t * pBTable,
- q31_t * pDst,
- uint32_t modifier)
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pATable,
+ const q31_t * pBTable,
+ q31_t * pDst,
+ uint32_t modifier)
{
- uint32_t i; /* Loop Counter */
- q31_t outR, outI; /* Temporary variables for output */
- q31_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */
- q31_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */
- q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[(4U * fftLen) - 1U];
- q31_t *pIn1 = &pSrc[2], *pIn2 = &pSrc[(2U * fftLen) - 1U];
+ uint32_t i; /* Loop Counter */
+ q31_t outR, outI; /* Temporary variables for output */
+ const q31_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */
+ q31_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */
+ q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[4 * fftLen - 1];
+ q31_t *pIn1 = &pSrc[2], *pIn2 = &pSrc[2 * fftLen - 1];
- /* Init coefficient pointers */
- pCoefA = &pATable[modifier * 2U];
- pCoefB = &pBTable[modifier * 2U];
+ /* Init coefficient pointers */
+ pCoefA = &pATable[modifier * 2];
+ pCoefB = &pBTable[modifier * 2];
- i = fftLen - 1U;
+ i = fftLen - 1U;
- while (i > 0U)
- {
- /*
- outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
- + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
- pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
- */
+ while (i > 0U)
+ {
+ /*
+ outR = ( pSrc[2 * i] * pATable[2 * i]
+ - pSrc[2 * i + 1] * pATable[2 * i + 1]
+ + pSrc[2 * n - 2 * i] * pBTable[2 * i]
+ + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
- /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
- pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
+ outI = ( pIn[2 * i + 1] * pATable[2 * i]
+ + pIn[2 * i] * pATable[2 * i + 1]
+ + pIn[2 * n - 2 * i] * pBTable[2 * i + 1]
+ - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+ */
- CoefA1 = *pCoefA++;
- CoefA2 = *pCoefA;
+ CoefA1 = *pCoefA++;
+ CoefA2 = *pCoefA;
- /* outR = (pSrc[2 * i] * pATable[2 * i] */
- mult_32x32_keep32_R(outR, *pIn1, CoefA1);
+ /* outR = (pSrc[2 * i] * pATable[2 * i] */
+ mult_32x32_keep32_R (outR, *pIn1, CoefA1);
- /* outI = pIn[2 * i] * pATable[2 * i + 1] */
- mult_32x32_keep32_R(outI, *pIn1++, CoefA2);
+ /* outI = pIn[2 * i] * pATable[2 * i + 1] */
+ mult_32x32_keep32_R (outI, *pIn1++, CoefA2);
- /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */
- multSub_32x32_keep32_R(outR, *pIn1, CoefA2);
+ /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */
+ multSub_32x32_keep32_R (outR, *pIn1, CoefA2);
- /* (pIn[2 * i + 1] * pATable[2 * i] */
- multAcc_32x32_keep32_R(outI, *pIn1++, CoefA1);
+ /* (pIn[2 * i + 1] * pATable[2 * i] */
+ multAcc_32x32_keep32_R (outI, *pIn1++, CoefA1);
- /* pSrc[2 * n - 2 * i] * pBTable[2 * i] */
- multSub_32x32_keep32_R(outR, *pIn2, CoefA2);
- CoefB1 = *pCoefB;
+ /* pSrc[2 * n - 2 * i] * pBTable[2 * i] */
+ multSub_32x32_keep32_R (outR, *pIn2, CoefA2);
+ CoefB1 = *pCoefB;
- /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
- multSub_32x32_keep32_R(outI, *pIn2--, CoefB1);
+ /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
+ multSub_32x32_keep32_R (outI, *pIn2--, CoefB1);
- /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
- multAcc_32x32_keep32_R(outR, *pIn2, CoefB1);
+ /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
+ multAcc_32x32_keep32_R (outR, *pIn2, CoefB1);
- /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
- multSub_32x32_keep32_R(outI, *pIn2--, CoefA2);
+ /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
+ multSub_32x32_keep32_R (outI, *pIn2--, CoefA2);
- /* write output */
- *pOut1++ = outR;
- *pOut1++ = outI;
+ /* write output */
+ *pOut1++ = outR;
+ *pOut1++ = outI;
- /* write complex conjugate output */
- *pOut2-- = -outI;
- *pOut2-- = outR;
+ /* write complex conjugate output */
+ *pOut2-- = -outI;
+ *pOut2-- = outR;
- /* update coefficient pointer */
- pCoefB = pCoefB + (modifier * 2U);
- pCoefA = pCoefA + ((modifier * 2U) - 1U);
+ /* update coefficient pointer */
+ pCoefB = pCoefB + (2 * modifier);
+ pCoefA = pCoefA + (2 * modifier - 1);
- i--;
- }
- pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
- pDst[(2U * fftLen) + 1U] = 0;
+ /* Decrement loop count */
+ i--;
+ }
- pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
- pDst[1] = 0;
+ pDst[2 * fftLen] = (pSrc[0] - pSrc[1]) >> 1U;
+ pDst[2 * fftLen + 1] = 0;
+
+ pDst[0] = (pSrc[0] + pSrc[1]) >> 1U;
+ pDst[1] = 0;
}
+
/**
-* @brief Core Real IFFT process
-* @param[in] *pSrc points to the input buffer.
-* @param[in] fftLen length of FFT.
-* @param[in] *pATable points to the twiddle Coef A buffer.
-* @param[in] *pBTable points to the twiddle Coef B buffer.
-* @param[out] *pDst points to the output buffer.
-* @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @return none.
-*/
+ @brief Core Real IFFT process
+ @param[in] pSrc points to input buffer
+ @param[in] fftLen length of FFT
+ @param[in] pATable points to twiddle Coef A buffer
+ @param[in] pBTable points to twiddle Coef B buffer
+ @param[out] pDst points to output buffer
+ @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+ @return none
+ */
+
void arm_split_rifft_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- q31_t * pATable,
- q31_t * pBTable,
- q31_t * pDst,
- uint32_t modifier)
-{
- q31_t outR, outI; /* Temporary variables for output */
- q31_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */
- q31_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */
- q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[(2U * fftLen) + 1U];
+ q31_t * pSrc,
+ uint32_t fftLen,
+ const q31_t * pATable,
+ const q31_t * pBTable,
+ q31_t * pDst,
+ uint32_t modifier)
+{
+ q31_t outR, outI; /* Temporary variables for output */
+ const q31_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */
+ q31_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */
+ q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[2 * fftLen + 1];
- pCoefA = &pATable[0];
- pCoefB = &pBTable[0];
+ pCoefA = &pATable[0];
+ pCoefB = &pBTable[0];
- while (fftLen > 0U)
- {
- /*
- outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
- pIn[2 * n - 2 * i] * pBTable[2 * i] -
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+ while (fftLen > 0U)
+ {
+ /*
+ outR = ( pIn[2 * i] * pATable[2 * i]
+ + pIn[2 * i + 1] * pATable[2 * i + 1]
+ + pIn[2 * n - 2 * i] * pBTable[2 * i]
+ - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
- outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
- pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
- pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
- */
- CoefA1 = *pCoefA++;
- CoefA2 = *pCoefA;
+ outI = ( pIn[2 * i + 1] * pATable[2 * i]
+ - pIn[2 * i] * pATable[2 * i + 1]
+ - pIn[2 * n - 2 * i] * pBTable[2 * i + 1]
+ - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+ */
- /* outR = (pIn[2 * i] * pATable[2 * i] */
- mult_32x32_keep32_R(outR, *pIn1, CoefA1);
+ CoefA1 = *pCoefA++;
+ CoefA2 = *pCoefA;
- /* - pIn[2 * i] * pATable[2 * i + 1] */
- mult_32x32_keep32_R(outI, *pIn1++, -CoefA2);
+ /* outR = (pIn[2 * i] * pATable[2 * i] */
+ mult_32x32_keep32_R (outR, *pIn1, CoefA1);
- /* pIn[2 * i + 1] * pATable[2 * i + 1] */
- multAcc_32x32_keep32_R(outR, *pIn1, CoefA2);
+ /* - pIn[2 * i] * pATable[2 * i + 1] */
+ mult_32x32_keep32_R (outI, *pIn1++, -CoefA2);
- /* pIn[2 * i + 1] * pATable[2 * i] */
- multAcc_32x32_keep32_R(outI, *pIn1++, CoefA1);
+ /* pIn[2 * i + 1] * pATable[2 * i + 1] */
+ multAcc_32x32_keep32_R (outR, *pIn1, CoefA2);
- /* pIn[2 * n - 2 * i] * pBTable[2 * i] */
- multAcc_32x32_keep32_R(outR, *pIn2, CoefA2);
- CoefB1 = *pCoefB;
+ /* pIn[2 * i + 1] * pATable[2 * i] */
+ multAcc_32x32_keep32_R (outI, *pIn1++, CoefA1);
- /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
- multSub_32x32_keep32_R(outI, *pIn2--, CoefB1);
+ /* pIn[2 * n - 2 * i] * pBTable[2 * i] */
+ multAcc_32x32_keep32_R (outR, *pIn2, CoefA2);
+ CoefB1 = *pCoefB;
- /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
- multAcc_32x32_keep32_R(outR, *pIn2, CoefB1);
+ /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
+ multSub_32x32_keep32_R (outI, *pIn2--, CoefB1);
- /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
- multAcc_32x32_keep32_R(outI, *pIn2--, CoefA2);
+ /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
+ multAcc_32x32_keep32_R (outR, *pIn2, CoefB1);
- /* write output */
- *pDst++ = outR;
- *pDst++ = outI;
+ /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
+ multAcc_32x32_keep32_R (outI, *pIn2--, CoefA2);
- /* update coefficient pointer */
- pCoefB = pCoefB + (modifier * 2U);
- pCoefA = pCoefA + ((modifier * 2U) - 1U);
+ /* write output */
+ *pDst++ = outR;
+ *pDst++ = outI;
- /* Decrement loop count */
- fftLen--;
- }
+ /* update coefficient pointer */
+ pCoefB = pCoefB + (modifier * 2);
+ pCoefA = pCoefA + (modifier * 2 - 1);
+
+ /* Decrement loop count */
+ fftLen--;
+ }
+
}
diff --git a/CMSIS/DoxyGen/DSP/dsp.dxy b/CMSIS/DoxyGen/DSP/dsp.dxy
index 5468b8d..3f7732c 100644
--- a/CMSIS/DoxyGen/DSP/dsp.dxy
+++ b/CMSIS/DoxyGen/DSP/dsp.dxy
@@ -38,7 +38,7 @@
# could be handy for archiving the generated documentation or if some version
# control system is used.
-PROJECT_NUMBER = "Version 1.5.3"
+PROJECT_NUMBER = "Version 1.5.5"
# Using the PROJECT_BRIEF tag one can provide an optional one line description
# for a project that appears at the top of each page and should give viewer a
@@ -952,13 +952,13 @@
# function all documented functions referencing it will be listed.
# The default value is: NO.
-REFERENCED_BY_RELATION = YES
+REFERENCED_BY_RELATION = NO
# If the REFERENCES_RELATION tag is set to YES then for each documented function
# all documented entities called/used by that function will be listed.
# The default value is: NO.
-REFERENCES_RELATION = YES
+REFERENCES_RELATION = NO
# If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set
# to YES, then the hyperlinks from functions in REFERENCES_RELATION and
@@ -1855,13 +1855,13 @@
# validating XML parser to check the syntax of the XML files.
# This tag requires that the tag GENERATE_XML is set to YES.
-XML_SCHEMA =
+#XML_SCHEMA =
# The XML_DTD tag can be used to specify a XML DTD, which can be used by a
# validating XML parser to check the syntax of the XML files.
# This tag requires that the tag GENERATE_XML is set to YES.
-XML_DTD =
+#XML_DTD =
# If the XML_PROGRAMLISTING tag is set to YES doxygen will dump the program
# listings (including syntax highlighting and cross-referencing information) to
diff --git a/CMSIS/DoxyGen/DSP/src/history.txt b/CMSIS/DoxyGen/DSP/src/history.txt
index e982ee9..6772b4c 100644
--- a/CMSIS/DoxyGen/DSP/src/history.txt
+++ b/CMSIS/DoxyGen/DSP/src/history.txt
@@ -7,6 +7,27 @@
<th>Description</th>
</tr>
<tr>
+ <td>V1.5.5</td>
+ <td>
+ Reworked DSP library source files
+ - added macro ARM_MATH_LOOPUNROLL
+ - removed macro UNALIGNED_SUPPORT_DISABLE
+ - added const-correctness
+ - replaced SIMD pointer construct with memcopy solution
+ Reworked DSP library documentation
+ Changed DSP folder structure
+ - moved DSP libraries to ./DSP/Lib
+ ARM DSP Libraries are built with ARMCLANG
+ Added DSP Libraries source variant
+ </td>
+ <td>V1.5.4</td>
+ <td>
+ Note: binaries NOT rebuild!
+
+ Updated IAR projects
+ </td>
+ </tr>
+ <tr>
<td>V1.5.3</td>
<td>
Note: binaries NOT rebuild!
@@ -25,7 +46,7 @@
- FilteringFunctions\arm_correlate_q15.c
- FilteringFunctions\arm_fir_f32.c
- MatrixFunctions\arm_mat_scale_q31.c
- - StatisticsFunctions\arm_rms_q31.ck
+ - StatisticsFunctions\arm_rms_q31.c
- TransformFunctions\arm_bitreversal2.S
- TransformFunctions\arm_cfft_radix4_q31.c
Reworked DSP_Lib_TestSuite
diff --git a/CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib b/CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib
deleted file mode 100644
index 89ea93d..0000000
--- a/CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:26151a55ce8dbfa20f2608b928797c0b1ebd67e08b9950b3230dd287c944cd9e
-size 2248646
diff --git a/CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib b/CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib
deleted file mode 100644
index f907fb2..0000000
--- a/CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:c38ac6458ec41781d221bdc95d70a96eb519cd71fcbbf5e5f1ae3b2ffcae7c88
-size 2524674
diff --git a/CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib b/CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib
deleted file mode 100644
index 4020dec..0000000
--- a/CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:92ccd7675968b9d0a81d9af525a3766cab912e19cda54d978f1e38d25b2f091c
-size 3016698
diff --git a/CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib b/CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib
deleted file mode 100644
index 6263f84..0000000
--- a/CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib
+++ /dev/null
@@ -1,3 +0,0 @@
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-oid sha256:875d51628acf7c667ca0bda33702eba465d05013229d35760b13b07dc07efec0
-size 2988050
diff --git a/CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib b/CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib
deleted file mode 100644
index 351fa21..0000000
--- a/CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:d899bb1517ad59cb6822a97f7bd280e7ff7704e8b40bc1b1d966b99278a1321d
-size 2518530
diff --git a/CMSIS/Lib/ARM/arm_cortexM0b_math.lib b/CMSIS/Lib/ARM/arm_cortexM0b_math.lib
deleted file mode 100644
index 3fc8238..0000000
--- a/CMSIS/Lib/ARM/arm_cortexM0b_math.lib
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:3f3bd22dcfa72927138a8e8f0c523b2f75fb3d6b6f0900d6036ff161f1961f6f
-size 13085890
diff --git a/CMSIS/Lib/ARM/arm_cortexM0l_math.lib b/CMSIS/Lib/ARM/arm_cortexM0l_math.lib
deleted file mode 100644
index 9725a65..0000000
--- a/CMSIS/Lib/ARM/arm_cortexM0l_math.lib
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
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diff --git a/CMSIS/Lib/ARM/arm_cortexM3b_math.lib b/CMSIS/Lib/ARM/arm_cortexM3b_math.lib
deleted file mode 100644
index 2298a1d..0000000
--- a/CMSIS/Lib/ARM/arm_cortexM3b_math.lib
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
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-size 13694834
diff --git a/CMSIS/Lib/ARM/arm_cortexM3l_math.lib b/CMSIS/Lib/ARM/arm_cortexM3l_math.lib
deleted file mode 100644
index 2e4f80b..0000000
--- a/CMSIS/Lib/ARM/arm_cortexM3l_math.lib
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
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-size 13671734
diff --git a/CMSIS/Lib/ARM/arm_cortexM4b_math.lib b/CMSIS/Lib/ARM/arm_cortexM4b_math.lib
deleted file mode 100644
index a2cf156..0000000
--- a/CMSIS/Lib/ARM/arm_cortexM4b_math.lib
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:e303b81c765f6d8a473948f32e32311fa48566fd9c19e84035d8be347687536b
-size 13573204
diff --git a/CMSIS/Lib/ARM/arm_cortexM4bf_math.lib b/CMSIS/Lib/ARM/arm_cortexM4bf_math.lib
deleted file mode 100644
index 388faba..0000000
--- a/CMSIS/Lib/ARM/arm_cortexM4bf_math.lib
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:6dae037fe9f9a108a688a7fea62525aae358c0c39789a86203f4d3112bdf5453
-size 13682084
diff --git a/CMSIS/Lib/ARM/arm_cortexM4l_math.lib b/CMSIS/Lib/ARM/arm_cortexM4l_math.lib
deleted file mode 100644
index 253e492..0000000
--- a/CMSIS/Lib/ARM/arm_cortexM4l_math.lib
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:79d37b4b54c9a733916d78a0e0a56352aa96c5dc50c4be6199af7bd64dab5cc3
-size 13550380
diff --git a/CMSIS/Lib/ARM/arm_cortexM4lf_math.lib b/CMSIS/Lib/ARM/arm_cortexM4lf_math.lib
deleted file mode 100644
index ef900dd..0000000
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diff --git a/CMSIS/Utilities/gen_pack.bat b/CMSIS/Utilities/gen_pack.bat
index bb430d0..d2bc482 100644
--- a/CMSIS/Utilities/gen_pack.bat
+++ b/CMSIS/Utilities/gen_pack.bat
@@ -60,19 +60,7 @@
XCOPY /Q /S /Y ..\..\CMSIS\Driver\*.* %RELEASE_PATH%\CMSIS\Driver\*.*
:: -- DSP files
-XCOPY /Q /S /Y ..\..\CMSIS\DSP\Include\*.* %RELEASE_PATH%\CMSIS\DSP\Include\*.*
-XCOPY /Q /S /Y ..\..\CMSIS\DSP\Source\*.* %RELEASE_PATH%\CMSIS\DSP\Source\*.*
-XCOPY /Q /S /Y ..\..\CMSIS\DSP\Projects\*.* %RELEASE_PATH%\CMSIS\DSP\Projects\*.*
-XCOPY /Q /S /Y ..\..\CMSIS\DSP\Examples\*.* %RELEASE_PATH%\CMSIS\DSP\Examples\*.*
-XCOPY /Q /S /Y ..\..\CMSIS\DSP\Include\*.* %RELEASE_PATH%\CMSIS\Include\*.*
-XCOPY /Q /S /Y ..\..\CMSIS\DSP\Source\*.* %RELEASE_PATH%\CMSIS\DSP_Lib\Source\*.*
-XCOPY /Q /S /Y ..\..\CMSIS\DSP\Projects\*.* %RELEASE_PATH%\CMSIS\DSP_Lib\Source\*.*
-XCOPY /Q /S /Y ..\..\CMSIS\DSP\Examples\*.* %RELEASE_PATH%\CMSIS\DSP_Lib\Examples\*.*
-
-:: -- DSP libraries
-XCOPY /Q /S /Y ..\..\CMSIS\Lib\ARM\*.lib %RELEASE_PATH%\CMSIS\Lib\ARM\*.*
-XCOPY /Q /S /Y ..\..\CMSIS\Lib\GCC\*.a %RELEASE_PATH%\CMSIS\Lib\GCC\*.*
-XCOPY /Q /S /Y ..\..\CMSIS\Lib\IAR\*.a %RELEASE_PATH%\CMSIS\Lib\IAR\*.*
+XCOPY /Q /S /Y ..\..\CMSIS\DSP\*.* %RELEASE_PATH%\CMSIS\DSP\*.*
:: -- NN files
XCOPY /Q /S /Y ..\..\CMSIS\NN\*.* %RELEASE_PATH%\CMSIS\NN\*.*