TrustedFirmware Git Browser
Code Review Sign In
review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 4b3045d64851f9cf6de2dca899c229ff11b614ce / . / ARM.CMSIS.pdsc
blob: 7eb78b0168a592a8e8a1aa29e77990e633f7fc45 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
7 <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame^]11 <release version="5.0.0-Beta7">
12 CMSIS_Core:
13 - Added macro __ALIGNED.
14 </release>
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]15 <release version="5.0.0-Beta6">
16 CMSIS_Core:
17 - Added SCB_CFSR register bit definitions in core_*.h.
18 - Added NVIC_GetEnableIRQ function in core_*.h.
19 - Updated core instruction macros in cmsis_gcc.h.
20 </release>
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]21 <release version="5.0.0-Beta5">
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]22 CMSIS_DSP:
23 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
24 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]25 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]26 <release version="5.0.0-Beta4">
27 Updated ARMv8MML device files.
28 - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
29 Updated CMSIS core files.
30 - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
31 </release>
32 <release version="5.0.0-Beta3">
33 Updated CMSIS ARMv8M core / device files
34 - increased SAU regions to 8.
35 - moved TZ_SAU_Setup() to partition_#device#.h.
36 </release>
37 <release version="5.0.0-Beta2">
38 - renamed core_*.h to lower case.
39 - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
40 - updated ARMv8M?L.svd.
41 </release>
42 <release version="5.0.0-Beta1">
43 - added function SCB_GetFPUType() to all CMSIS cores.
44 - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
45 - updated CMSIS core files to V5.0
46 - updated CMSIS Core change log.
47 - updated CMSIS DSP_Lib change log.
48 - updated CMSIS DSP_Lib libraries.
49 </release>
50 <release version="5.0.0-Beta" date="2015-12-15">
51 Added ARMv8M support to CMSIS-Core.
52 - CMSIS-Core 5.0.0 Beta (see revision history for details)
53 - CMSIS-RTOS
54 -- API 1.02 (unchanged)
55 -- RTX 4.81.0 (see revision history for details)
56 - CMSIS-SVD 1.3.2 (see revision history for details)
57 </release>
58 <release version="4.5.0" date="2015-10-28">
59 - CMSIS-Core 4.30.0 (see revision history for details)
60 - CMSIS-DAP 1.1.0 (unchanged)
61 - CMSIS-Driver 2.04.0 (see revision history for details)
62 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
63 - CMSIS-PACK 1.4.1 (see revision history for details)
64 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
65 - CMSIS-SVD 1.3.1 (see revision history for details)
66 </release>
67 <release version="4.4.0" date="2015-09-11">
68 - CMSIS-Core 4.20 (see revision history for details)
69 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
70 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
71 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
72 - CMSIS-RTOS
73 -- API 1.02 (unchanged)
74 -- RTX 4.79 (see revision history for details)
75 - CMSIS-SVD 1.3.0 (see revision history for details)
76 - CMSIS-DAP 1.1.0 (extended with SWO support)
77 </release>
78 <release version="4.3.0" date="2015-03-20">
79 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
80 - CMSIS-DSP 1.4.5 (see revision history for details)
81 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
82 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
83 - CMSIS-RTOS
84 -- API 1.02 (unchanged)
85 -- RTX 4.78 (see revision history for details)
86 - CMSIS-SVD 1.2 (unchanged)
87 </release>
88 <release version="4.2.0" date="2014-09-24">
89 Adding Cortex-M7 support
90 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
91 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
92 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
93 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
94 - CMSIS-RTOS RTX 4.75 (see revision history for details)
95 </release>
96 <release version="4.1.1" date="2014-06-30">
97 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
98 </release>
99 <release version="4.1.0" date="2014-06-12">
100 - CMSIS-Driver 2.02 (incompatible update)
101 - CMSIS-Pack 1.3 (see revision history for details)
102 - CMSIS-DSP 1.4.2 (unchanged)
103 - CMSIS-Core 3.30 (unchanged)
104 - CMSIS-RTOS RTX 4.74 (unchanged)
105 - CMSIS-RTOS API 1.02 (unchanged)
106 - CMSIS-SVD 1.10 (unchanged)
107 PACK:
108 - removed G++ specific files from PACK
109 - added Component Startup variant "C Startup"
110 - added Pack Checking Utility
111 - updated conditions to reflect tool-chain dependency
112 - added Taxonomy for Graphics
113 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
114 </release>
115 <release version="4.0.0">
116 - CMSIS-Driver 2.00 Preliminary (incompatible update)
117 - CMSIS-Pack 1.1 Preliminary
118 - CMSIS-DSP 1.4.2 (see revision history for details)
119 - CMSIS-Core 3.30 (see revision history for details)
120 - CMSIS-RTOS RTX 4.74 (see revision history for details)
121 - CMSIS-RTOS API 1.02 (unchanged)
122 - CMSIS-SVD 1.10 (unchanged)
123 </release>
124 <release version="3.20.4">
125 - CMSIS-RTOS 4.74 (see revision history for details)
126 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
127 </release>
128 <release version="3.20.3">
129 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
130 - CMSIS-RTOS 4.73 (see revision history for details)
131 </release>
132 <release version="3.20.2">
133 - CMSIS-Pack documentation has been added
134 - CMSIS-Drivers header and documentation have been added to PACK
135 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
136 </release>
137 <release version="3.20.1">
138 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
139 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
140 </release>
141 <release version="3.20.0">
142 The software portions that are deployed in the application program are now under a BSD license which allows usage
143 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
144 The individual components have been update as listed below:
145 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
146 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
147 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
148 - CMSIS-SVD is unchanged.
149 </release>
150 </releases>
151
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]152 <taxonomy>
153 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
154 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
155 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
156 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
157 <description Cclass="File System">File Drive Support and File System</description>
158 <description Cclass="Graphics">Graphical User Interface</description>
159 <description Cclass="Network">Network Stack using Internet Protocols</description>
160 <description Cclass="USB">Universal Serial Bus Stack</description>
161 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
162 </taxonomy>
163
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]164 <devices>
165 <!-- ****************************** Cortex-M0 ****************************** -->
166 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]167 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]168 <description>
169The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
170- simple, easy-to-use programmers model
171- highly efficient ultra-low power operation
172- excellent code density
173- deterministic, high-performance interrupt handling
174- upward compatibility with the rest of the Cortex-M processor family.
175 </description>
176 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
177 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
178 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
179 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
180
181 <device Dname="ARMCM0">
182 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
183 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
184 </device>
185 </family>
186
187 <!-- ****************************** Cortex-M0P ****************************** -->
188 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]189 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]190 <description>
191The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
192- simple, easy-to-use programmers model
193- highly efficient ultra-low power operation
194- excellent code density
195- deterministic, high-performance interrupt handling
196- upward compatibility with the rest of the Cortex-M processor family.
197 </description>
198 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
199 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
200 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
201 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
202
203 <device Dname="ARMCM0P">
204 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
205 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
206 </device>
207 </family>
208
209 <!-- ****************************** Cortex-M3 ****************************** -->
210 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]211 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]212 <description>
213The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
214- simple, easy-to-use programmers model
215- highly efficient ultra-low power operation
216- excellent code density
217- deterministic, high-performance interrupt handling
218- upward compatibility with the rest of the Cortex-M processor family.
219 </description>
220 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
221 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
222 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
223 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
224
225 <device Dname="ARMCM3">
226 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
227 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
228 </device>
229 </family>
230
231 <!-- ****************************** Cortex-M4 ****************************** -->
232 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]233 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]234 <description>
235The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
236- simple, easy-to-use programmers model
237- highly efficient ultra-low power operation
238- excellent code density
239- deterministic, high-performance interrupt handling
240- upward compatibility with the rest of the Cortex-M processor family.
241 </description>
242 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
243 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
244 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
245 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
246
247 <device Dname="ARMCM4">
248 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
249 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
250 </device>
251
252 <device Dname="ARMCM4_FP">
253 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
254 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
255 </device>
256 </family>
257
258 <!-- ****************************** Cortex-M7 ****************************** -->
259 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]260 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]261 <description>
262The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
263- simple, easy-to-use programmers model
264- highly efficient ultra-low power operation
265- excellent code density
266- deterministic, high-performance interrupt handling
267- upward compatibility with the rest of the Cortex-M processor family.
268 </description>
269 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
270 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
271 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
272 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
273
274 <device Dname="ARMCM7">
275 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
276 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
277 </device>
278
279 <device Dname="ARMCM7_SP">
280 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
281 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
282 </device>
283
284 <device Dname="ARMCM7_DP">
285 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
286 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
287 </device>
288 </family>
289
290 <!-- ****************************** ARMSC000 ****************************** -->
291 <family Dfamily="ARM SC000" Dvendor="ARM:82">
292 <description>
293The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
294- simple, easy-to-use programmers model
295- highly efficient ultra-low power operation
296- excellent code density
297- deterministic, high-performance interrupt handling
298 </description>
299 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
300 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
301 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
302 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
303
304 <device Dname="ARMSC000">
305 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
306 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
307 </device>
308 </family>
309
310 <!-- ****************************** ARMSC300 ****************************** -->
311 <family Dfamily="ARM SC300" Dvendor="ARM:82">
312 <description>
313The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
314- simple, easy-to-use programmers model
315- highly efficient ultra-low power operation
316- excellent code density
317- deterministic, high-performance interrupt handling
318 </description>
319 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
320 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
321 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
322 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
323
324 <device Dname="ARMSC300">
325 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
326 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
327 </device>
328 </family>
329
330 <!-- ****************************** ARMv8-M Baseline ********************** -->
331 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
332 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
333 <description>
334The ARMv8MBL processor is brand new.
335 </description>
336 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
337 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
338 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
339 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
340
341 <device Dname="ARMv8MBL">
342 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
343 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
344 </device>
345 </family>
346
347 <!-- ****************************** ARMv8-M Mainline ****************************** -->
348 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
349 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
350 <description>
351The ARMv8MML processor is brand new.
352 </description>
353 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
354 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
355 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
356 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
357
358 <device Dname="ARMv8MML">
359 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
360 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
361 </device>
362
363 <device Dname="ARMv8MML_SP">
364 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
365 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
366 </device>
367
368 <device Dname="ARMv8MML_DP">
369 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
370 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
371 </device>
372 </family>
373
374 </devices>
375
376
377 <apis>
378 <!-- CMSIS-RTOS API -->
379 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
380 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
381 <files>
382 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
383 </files>
384 </api>
385 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
386 <description>USART Driver API for Cortex-M</description>
387 <files>
388 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
389 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
390 </files>
391 </api>
392 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
393 <description>SPI Driver API for Cortex-M</description>
394 <files>
395 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
396 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
397 </files>
398 </api>
399 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
400 <description>SAI Driver API for Cortex-M</description>
401 <files>
402 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
403 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
404 </files>
405 </api>
406 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
407 <description>I2C Driver API for Cortex-M</description>
408 <files>
409 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
410 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
411 </files>
412 </api>
413 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
414 <description>CAN Driver API for Cortex-M</description>
415 <files>
416 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
417 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
418 </files>
419 </api>
420 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
421 <description>Flash Driver API for Cortex-M</description>
422 <files>
423 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
424 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
425 </files>
426 </api>
427 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
428 <description>MCI Driver API for Cortex-M</description>
429 <files>
430 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
431 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
432 </files>
433 </api>
434 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
435 <description>NAND Flash Driver API for Cortex-M</description>
436 <files>
437 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
438 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
439 </files>
440 </api>
441 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
442 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
443 <files>
444 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
445 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
446 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
447 </files>
448 </api>
449 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
450 <description>Ethernet MAC Driver API for Cortex-M</description>
451 <files>
452 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
453 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
454 </files>
455 </api>
456 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
457 <description>Ethernet PHY Driver API for Cortex-M</description>
458 <files>
459 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
460 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
461 </files>
462 </api>
463 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
464 <description>USB Device Driver API for Cortex-M</description>
465 <files>
466 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
467 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
468 </files>
469 </api>
470 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
471 <description>USB Host Driver API for Cortex-M</description>
472 <files>
473 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
474 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
475 </files>
476 </api>
477 </apis>
478
479 <!-- conditions are dependency rules that can apply to a component or an individual file -->
480 <conditions>
481 <condition id="ARMCC">
482 <require Tcompiler="ARMCC"/>
483 </condition>
484
485 <condition id="GCC">
486 <require Tcompiler="GCC"/>
487 </condition>
488
489 <condition id="IAR">
490 <require Tcompiler="IAR"/>
491 </condition>
492
493 <condition id="ARMCC GCC">
494 <accept Tcompiler="ARMCC"/>
495 <accept Tcompiler="GCC"/>
496 </condition>
497
498 <condition id="Cortex-M Device">
499 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000</description>
500 <accept Dcore="Cortex-M0"/>
501 <accept Dcore="Cortex-M0+"/>
502 <accept Dcore="Cortex-M3"/>
503 <accept Dcore="Cortex-M4"/>
504 <accept Dcore="Cortex-M7"/>
505 <accept Dcore="SC000"/>
506 <accept Dcore="SC300"/>
507 </condition>
508
509 <condition id="Cortex-M ARMv8-M Device">
510 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000, ARMv8MBL, ARMv8MML</description>
511 <accept Dcore="Cortex-M0"/>
512 <accept Dcore="Cortex-M0+"/>
513 <accept Dcore="Cortex-M3"/>
514 <accept Dcore="Cortex-M4"/>
515 <accept Dcore="Cortex-M7"/>
516 <accept Dcore="SC000"/>
517 <accept Dcore="SC300"/>
518 <accept Dcore="ARMV8MBL"/>
519 <accept Dcore="ARMV8MML"/>
520 </condition>
521
522 <condition id="Cortex-M Device CMSIS Core">
523 <description>ARM Cortex-M device that depends on CMSIS Core component</description>
524 <require condition="Cortex-M Device"/>
525 <require Cclass="CMSIS" Cgroup="CORE"/>
526 </condition>
527
528 <condition id="Cortex-M Device Startup">
529 <description>Only show for Cortex-M based devices. Depends on Device Startup component.</description>
530 <require condition="Cortex-M Device"/>
531 <require Cclass="Device" Cgroup="Startup"/>
532 </condition>
533
534 <condition id="CMSIS Core">
535 <description>CMSIS CORE processor and device specific Startup files</description>
536 <require Cclass="CMSIS" Cgroup="CORE"/>
537 </condition>
538
539 <condition id="ARMCM0 CMSIS">
540 <!-- conditions selecting Devices -->
541 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
542 <require Dvendor="ARM:82" Dname="ARMCM0"/>
543 <require Cclass="CMSIS" Cgroup="CORE"/>
544 </condition>
545
546 <condition id="ARMCM0 CMSIS GCC">
547 <!-- conditions selecting Devices -->
548 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
549 <require condition="ARMCM0 CMSIS"/>
550 <require condition="GCC"/>
551 </condition>
552
553 <condition id="ARMCM0+ CMSIS">
554 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
555 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
556 <require Cclass="CMSIS" Cgroup="CORE"/>
557 </condition>
558
559 <condition id="ARMCM0+ CMSIS GCC">
560 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
561 <require condition="ARMCM0+ CMSIS"/>
562 <require condition="GCC"/>
563 </condition>
564
565 <condition id="ARMCM3 CMSIS">
566 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
567 <require Dvendor="ARM:82" Dname="ARMCM3"/>
568 <require Cclass="CMSIS" Cgroup="CORE"/>
569 </condition>
570
571 <condition id="ARMCM3 CMSIS GCC">
572 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
573 <require condition="ARMCM3 CMSIS"/>
574 <require condition="GCC"/>
575 </condition>
576
577 <condition id="ARMCM4 CMSIS">
578 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
579 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
580 <require Cclass="CMSIS" Cgroup="CORE"/>
581 </condition>
582
583 <condition id="ARMCM4 CMSIS GCC">
584 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
585 <require condition="ARMCM4 CMSIS"/>
586 <require condition="GCC"/>
587 </condition>
588
589 <condition id="ARMCM7 CMSIS">
590 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
591 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
592 <require Cclass="CMSIS" Cgroup="CORE"/>
593 </condition>
594
595 <condition id="ARMCM7 CMSIS GCC">
596 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
597 <require condition="ARMCM7 CMSIS"/>
598 <require condition="GCC"/>
599 </condition>
600
601 <condition id="ARMSC000 CMSIS">
602 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
603 <require Dvendor="ARM:82" Dname="ARMSC000"/>
604 <require Cclass="CMSIS" Cgroup="CORE"/>
605 </condition>
606
607 <condition id="ARMSC000 CMSIS GCC">
608 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
609 <require condition="ARMSC000 CMSIS"/>
610 <require condition="GCC"/>
611 </condition>
612
613 <condition id="ARMSC300 CMSIS">
614 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
615 <require Dvendor="ARM:82" Dname="ARMSC300"/>
616 <require Cclass="CMSIS" Cgroup="CORE"/>
617 </condition>
618
619 <condition id="ARMSC300 CMSIS GCC">
620 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
621 <require condition="ARMSC300 CMSIS"/>
622 <require condition="GCC"/>
623 </condition>
624
625 <condition id="ARMv8MBL CMSIS">
626 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
627 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
628 <require Cclass="CMSIS" Cgroup="CORE"/>
629 </condition>
630
631 <condition id="ARMv8MBL CMSIS GCC">
632 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
633 <require condition="ARMv8MBL CMSIS"/>
634 <require condition="GCC"/>
635 </condition>
636
637 <condition id="ARMv8MML CMSIS">
638 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
639 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
640 <require Cclass="CMSIS" Cgroup="CORE"/>
641 </condition>
642
643 <condition id="ARMv8MML CMSIS GCC">
644 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
645 <require condition="ARMv8MML CMSIS"/>
646 <require condition="GCC"/>
647 </condition>
648
649 <condition id="CMSIS DSP">
650 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
651 <require condition="Cortex-M Device CMSIS Core"/>
652 <accept Tcompiler="GCC"/>
653 <accept Tcompiler="ARMCC"/>
654 <accept Tcompiler="IAR"/>
655 </condition>
656
657 <!-- ARMCC compiler -->
658 <condition id="CM0_LE_ARMCC">
659 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
660 <accept Dcore="Cortex-M0"/>
661 <accept Dcore="Cortex-M0+"/>
662 <accept Dcore="SC000"/>
663 <require Dendian="Little-endian"/>
664 <require Tcompiler="ARMCC"/>
665 </condition>
666
667 <condition id="CM0_BE_ARMCC">
668 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
669 <accept Dcore="Cortex-M0"/>
670 <accept Dcore="Cortex-M0+"/>
671 <accept Dcore="SC000"/>
672 <require Dendian="Big-endian"/>
673 <require Tcompiler="ARMCC"/>
674 </condition>
675
676 <condition id="CM3_LE_ARMCC">
677 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
678 <accept Dcore="Cortex-M3"/>
679 <accept Dcore="SC300"/>
680 <require Dendian="Little-endian"/>
681 <require Tcompiler="ARMCC"/>
682 </condition>
683
684 <condition id="CM3_BE_ARMCC">
685 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
686 <accept Dcore="Cortex-M3"/>
687 <accept Dcore="SC300"/>
688 <require Dendian="Big-endian"/>
689 <require Tcompiler="ARMCC"/>
690 </condition>
691
692 <condition id="CM4_LE_ARMCC">
693 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
694 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
695 <require Tcompiler="ARMCC"/>
696 </condition>
697
698 <condition id="CM4_BE_ARMCC">
699 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
700 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
701 <require Tcompiler="ARMCC"/>
702 </condition>
703
704 <condition id="CM4F_LE_ARMCC">
705 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
706 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
707 <require Tcompiler="ARMCC"/>
708 </condition>
709
710 <condition id="CM4F_BE_ARMCC">
711 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
712 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
713 <require Tcompiler="ARMCC"/>
714 </condition>
715
716 <!-- XMC 4000 Series devices from Infineon require a special library -->
717 <condition id="CM4_LE_ARMCC_STD">
718 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
719 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
720 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
721 <require Tcompiler="ARMCC"/>
722 </condition>
723 <condition id="CM4_LE_ARMCC_IFX">
724 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
725 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
726 <require Tcompiler="ARMCC"/>
727 </condition>
728 <condition id="CM4F_LE_ARMCC_STD">
729 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
730 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
731 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
732 <require Tcompiler="ARMCC"/>
733 </condition>
734 <condition id="CM4F_LE_ARMCC_IFX">
735 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
736 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
737 <require Tcompiler="ARMCC"/>
738 </condition>
739
740 <condition id="CM7_LE_ARMCC">
741 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
742 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
743 <require Tcompiler="ARMCC"/>
744 </condition>
745
746 <condition id="CM7_BE_ARMCC">
747 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
748 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
749 <require Tcompiler="ARMCC"/>
750 </condition>
751
752 <condition id="CM7F_LE_ARMCC">
753 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
754 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
755 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
756 <require Tcompiler="ARMCC"/>
757 </condition>
758
759 <condition id="CM7F_BE_ARMCC">
760 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
761 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
762 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
763 <require Tcompiler="ARMCC"/>
764 </condition>
765
766 <condition id="CM7FSP_LE_ARMCC">
767 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
768 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
769 <require Tcompiler="ARMCC"/>
770 </condition>
771
772 <condition id="CM7FSP_BE_ARMCC">
773 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
774 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
775 <require Tcompiler="ARMCC"/>
776 </condition>
777
778 <condition id="CM7FDP_LE_ARMCC">
779 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
780 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
781 <require Tcompiler="ARMCC"/>
782 </condition>
783
784 <condition id="CM7FDP_BE_ARMCC">
785 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
786 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
787 <require Tcompiler="ARMCC"/>
788 </condition>
789
790 <!-- GCC compiler -->
791 <condition id="CM0_LE_GCC">
792 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
793 <accept Dcore="Cortex-M0"/>
794 <accept Dcore="Cortex-M0+"/>
795 <accept Dcore="SC000"/>
796 <require Dendian="Little-endian"/>
797 <require Tcompiler="GCC"/>
798 </condition>
799
800 <condition id="CM0_BE_GCC">
801 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
802 <accept Dcore="Cortex-M0"/>
803 <accept Dcore="Cortex-M0+"/>
804 <accept Dcore="SC000"/>
805 <require Dendian="Big-endian"/>
806 <require Tcompiler="GCC"/>
807 </condition>
808
809 <condition id="CM3_LE_GCC">
810 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
811 <accept Dcore="Cortex-M3"/>
812 <accept Dcore="SC300"/>
813 <require Dendian="Little-endian"/>
814 <require Tcompiler="GCC"/>
815 </condition>
816
817 <condition id="CM3_BE_GCC">
818 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
819 <accept Dcore="Cortex-M3"/>
820 <accept Dcore="SC300"/>
821 <require Dendian="Big-endian"/>
822 <require Tcompiler="GCC"/>
823 </condition>
824
825 <condition id="CM4_LE_GCC">
826 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
827 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
828 <require Tcompiler="GCC"/>
829 </condition>
830
831 <condition id="CM4_BE_GCC">
832 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
833 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
834 <require Tcompiler="GCC"/>
835 </condition>
836
837 <condition id="CM4F_LE_GCC">
838 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
839 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
840 <require Tcompiler="GCC"/>
841 </condition>
842
843 <condition id="CM4F_BE_GCC">
844 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
845 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
846 <require Tcompiler="GCC"/>
847 </condition>
848
849 <!-- XMC 4000 Series devices from Infineon require a special library -->
850 <condition id="CM4_LE_GCC_STD">
851 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
852 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
853 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
854 <require Tcompiler="GCC"/>
855 </condition>
856 <condition id="CM4_LE_GCC_IFX">
857 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
858 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
859 <require Tcompiler="GCC"/>
860 </condition>
861 <condition id="CM4F_LE_GCC_STD">
862 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
863 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
864 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
865 <require Tcompiler="GCC"/>
866 </condition>
867 <condition id="CM4F_LE_GCC_IFX">
868 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
869 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
870 <require Tcompiler="GCC"/>
871 </condition>
872
873 <condition id="CM7_LE_GCC">
874 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
875 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
876 <require Tcompiler="GCC"/>
877 </condition>
878
879 <condition id="CM7_BE_GCC">
880 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
881 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
882 <require Tcompiler="GCC"/>
883 </condition>
884
885 <condition id="CM7F_LE_GCC">
886 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
887 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
888 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
889 <require Tcompiler="GCC"/>
890 </condition>
891
892 <condition id="CM7F_BE_GCC">
893 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
894 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
895 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
896 <require Tcompiler="GCC"/>
897 </condition>
898
899 <condition id="CM7FSP_LE_GCC">
900 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
901 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
902 <require Tcompiler="GCC"/>
903 </condition>
904
905 <condition id="CM7FSP_BE_GCC">
906 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
907 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
908 <require Tcompiler="GCC"/>
909 </condition>
910
911 <condition id="CM7FDP_LE_GCC">
912 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
913 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
914 <require Tcompiler="GCC"/>
915 </condition>
916
917 <condition id="CM7FDP_BE_GCC">
918 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
919 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
920 <require Tcompiler="GCC"/>
921 </condition>
922
923 <!-- IAR compiler -->
924 <condition id="CM0_LE_IAR">
925 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
926 <accept Dcore="Cortex-M0"/>
927 <accept Dcore="Cortex-M0+"/>
928 <accept Dcore="SC000"/>
929 <require Dendian="Little-endian"/>
930 <require Tcompiler="IAR"/>
931 </condition>
932
933 <condition id="CM0_BE_IAR">
934 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
935 <accept Dcore="Cortex-M0"/>
936 <accept Dcore="Cortex-M0+"/>
937 <accept Dcore="SC000"/>
938 <require Dendian="Big-endian"/>
939 <require Tcompiler="IAR"/>
940 </condition>
941
942 <condition id="CM3_LE_IAR">
943 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
944 <accept Dcore="Cortex-M3"/>
945 <accept Dcore="SC300"/>
946 <require Dendian="Little-endian"/>
947 <require Tcompiler="IAR"/>
948 </condition>
949
950 <condition id="CM3_BE_IAR">
951 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
952 <accept Dcore="Cortex-M3"/>
953 <accept Dcore="SC300"/>
954 <require Dendian="Big-endian"/>
955 <require Tcompiler="IAR"/>
956 </condition>
957
958 <condition id="CM4_LE_IAR">
959 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
960 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
961 <require Tcompiler="IAR"/>
962 </condition>
963
964 <condition id="CM4_BE_IAR">
965 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
966 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
967 <require Tcompiler="IAR"/>
968 </condition>
969
970 <condition id="CM4F_LE_IAR">
971 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
972 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
973 <require Tcompiler="IAR"/>
974 </condition>
975
976 <condition id="CM4F_BE_IAR">
977 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
978 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
979 <require Tcompiler="IAR"/>
980 </condition>
981
982 <condition id="CM7_LE_IAR">
983 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
984 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
985 <require Tcompiler="IAR"/>
986 </condition>
987
988 <condition id="CM7_BE_IAR">
989 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
990 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
991 <require Tcompiler="IAR"/>
992 </condition>
993
994 <condition id="CM7F_LE_IAR">
995 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
996 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
997 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
998 <require Tcompiler="IAR"/>
999 </condition>
1000
1001 <condition id="CM7F_BE_IAR">
1002 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1003 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1004 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1005 <require Tcompiler="IAR"/>
1006 </condition>
1007
1008 <condition id="CM7FSP_LE_IAR">
1009 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1010 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1011 <require Tcompiler="IAR"/>
1012 </condition>
1013
1014 <condition id="CM7FSP_BE_IAR">
1015 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1016 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1017 <require Tcompiler="IAR"/>
1018 </condition>
1019
1020 <condition id="CM7FDP_LE_IAR">
1021 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1022 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1023 <require Tcompiler="IAR"/>
1024 </condition>
1025
1026 <condition id="CM7FDP_BE_IAR">
1027 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1028 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1029 <require Tcompiler="IAR"/>
1030 </condition>
1031 </conditions>
1032
1033 <components>
1034 <!-- CMSIS-Core component -->
1035 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="Cortex-M ARMv8-M Device" >
1036 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1037 <files>
1038 <!-- CPU independent -->
1039 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1040 <file category="include" name="CMSIS/Include/"/>
1041 </files>
1042 </component>
1043
1044 <!-- CMSIS-Startup components -->
1045 <!-- Cortex-M0 -->
1046 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1047 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1048 <files>
1049 <!-- include folder / device header file -->
1050 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1051 <!-- startup / system file -->
1052 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1053 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1054 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1055 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1056 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1057 </files>
1058 </component>
1059 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1060 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1061 <files>
1062 <!-- include folder / device header file -->
1063 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1064 <!-- startup / system file -->
1065 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1066 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1067 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1068 </files>
1069 </component>
1070
1071 <!-- Cortex-M0+ -->
1072 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1073 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1074 <files>
1075 <!-- include folder / device header file -->
1076 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1077 <!-- startup / system file -->
1078 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1079 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1080 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1081 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1082 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1083 </files>
1084 </component>
1085 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1086 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1087 <files>
1088 <!-- include folder / device header file -->
1089 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1090 <!-- startup / system file -->
1091 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1092 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1093 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1094 </files>
1095 </component>
1096
1097 <!-- Cortex-M3 -->
1098 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1099 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1100 <files>
1101 <!-- include folder / device header file -->
1102 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1103 <!-- startup / system file -->
1104 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1105 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1106 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1107 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1108 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1109 </files>
1110 </component>
1111 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1112 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1113 <files>
1114 <!-- include folder / device header file -->
1115 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1116 <!-- startup / system file -->
1117 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1118 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1119 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1120 </files>
1121 </component>
1122
1123 <!-- Cortex-M4 -->
1124 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1125 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1126 <files>
1127 <!-- include folder / device header file -->
1128 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1129 <!-- startup / system file -->
1130 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1131 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1132 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1133 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1134 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1135 </files>
1136 </component>
1137 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1138 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1139 <files>
1140 <!-- include folder / device header file -->
1141 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1142 <!-- startup / system file -->
1143 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1144 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1145 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1146 </files>
1147 </component>
1148
1149 <!-- Cortex-M7 -->
1150 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1151 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1152 <files>
1153 <!-- include folder / device header file -->
1154 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1155 <!-- startup / system file -->
1156 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1157 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1158 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1159 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1160 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1161 </files>
1162 </component>
1163 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1164 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1165 <files>
1166 <!-- include folder / device header file -->
1167 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1168 <!-- startup / system file -->
1169 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1170 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1171 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1172 </files>
1173 </component>
1174
1175 <!-- Cortex-SC000 -->
1176 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1177 <description>System and Startup for Generic ARM SC000 device</description>
1178 <files>
1179 <!-- include folder / device header file -->
1180 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1181 <!-- startup / system file -->
1182 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1183 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1184 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1185 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1186 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1187 </files>
1188 </component>
1189 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1190 <description>System and Startup for Generic ARM SC000 device</description>
1191 <files>
1192 <!-- include folder / device header file -->
1193 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1194 <!-- startup / system file -->
1195 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1196 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1197 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1198 </files>
1199 </component>
1200
1201 <!-- Cortex-SC300 -->
1202 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1203 <description>System and Startup for Generic ARM SC300 device</description>
1204 <files>
1205 <!-- include folder / device header file -->
1206 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1207 <!-- startup / system file -->
1208 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1209 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1210 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1211 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1212 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1213 </files>
1214 </component>
1215 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1216 <description>System and Startup for Generic ARM SC300 device</description>
1217 <files>
1218 <!-- include folder / device header file -->
1219 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1220 <!-- startup / system file -->
1221 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1222 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1223 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1224 </files>
1225 </component>
1226
1227 <!-- ARMv8MBL -->
1228 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1229 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1230 <files>
1231 <!-- include folder / device header file -->
1232 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1233 <!-- startup / system file -->
1234 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1235 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1236 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1237 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1238 <!-- SAU configuration -->
1239 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1240 </files>
1241 </component>
1242 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1243 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1244 <files>
1245 <!-- include folder / device header file -->
1246 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1247 <!-- startup / system file -->
1248 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1249 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1250 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
1251 </files>
1252 </component>
1253
1254 <!-- ARMv8MML -->
1255 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
1256 <description>System and Startup for Generic ARM ARMv8MML device</description>
1257 <files>
1258 <!-- include folder / device header file -->
1259 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1260 <!-- startup / system file -->
1261 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
1262 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
1263 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1264 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1265 <!-- SAU configuration -->
1266 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
1267 </files>
1268 </component>
1269 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
1270 <description>System and Startup for Generic ARM ARMv8MML device</description>
1271 <files>
1272 <!-- include folder / device header file -->
1273 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1274 <!-- startup / system file -->
1275 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
1276 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1277 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
1278 </files>
1279 </component>
1280
1281
1282 <!-- CMSIS-DSP component -->
1283 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
1284 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
1285 <files>
1286 <!-- CPU independent -->
1287 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
1288 <!-- <file category="header" name="CMSIS/Include/arm_common_tables.h"/> -->
1289 <file category="header" name="CMSIS/Include/arm_math.h"/>
1290 <!-- CPU and Compiler dependent -->
1291 <!-- ARMCC -->
1292 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1293 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1294 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1295 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1296 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1297 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1298 <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1299 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1300 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1301 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1302 <file category="library" condition="CM7FSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1303 <file category="library" condition="CM7FSP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1304 <file category="library" condition="CM7FDP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1305 <file category="library" condition="CM7FDP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1306 <!-- GCC -->
1307 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1308 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1309 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1310 <file category="library" condition="CM4F_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1311 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1312 <file category="library" condition="CM7FSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1313 <file category="library" condition="CM7FDP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1314 </files>
1315 </component>
1316
1317 <!-- CMSIS-RTOS Keil RTX component -->
1318 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="Cortex-M Device Startup">
1319 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1320 <RTE_Components_h>
1321 <!-- the following content goes into file 'RTE_Components.h' -->
1322 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1323 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1324 </RTE_Components_h>
1325 <files>
1326 <!-- CPU independent -->
1327 <file category="doc" name="CMSIS/Documentation/RTOS/html/_r_t_x_implementation.html"/>
1328 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
1329 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
1330
1331 <!-- RTX templates -->
1332 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
1333 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
1334 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
1335 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
1336 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
1337 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
1338 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
1339 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
1340 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
1341 <!-- tool-chain specific template file -->
1342 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1343 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
1344 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1345
1346 <!-- CPU and Compiler dependent -->
1347 <!-- ARMCC -->
1348 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1349 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1350 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1351 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1352 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1353 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1354 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1355 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1356 <file category="library" condition="CM4F_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1357 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1358 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1359 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1360 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1361 <file category="library" condition="CM7F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1362 <!-- GCC -->
1363 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1364 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1365 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1366 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1367 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1368 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1369 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1370 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1371 <file category="library" condition="CM4F_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1372 <file category="library" condition="CM4F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1373 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1374 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1375 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1376 <file category="library" condition="CM7F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1377 <!-- IAR -->
1378 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1379 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1380 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1381 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1382 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1383 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1384 <file category="library" condition="CM4F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1385 <file category="library" condition="CM4F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1386 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1387 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1388 <file category="library" condition="CM7F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1389 <file category="library" condition="CM7F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1390 </files>
1391 </component>
1392 </components>
1393
1394 <boards>
1395 <board name="uVision Simulator" vendor="Keil">
1396 <description>uVision Simulator</description>
1397 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
1398 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
1399 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
1400 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
1401 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
1402 </board>
1403 </boards>
1404
1405 <examples>
1406 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
1407 <description>DSP_Lib Class Marks example</description>
1408 <board name="uVision Simulator" vendor="Keil"/>
1409 <project>
1410 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
1411 </project>
1412 <attributes>
1413 <component Cclass="CMSIS" Cgroup="CORE"/>
1414 <component Cclass="CMSIS" Cgroup="DSP"/>
1415 <component Cclass="Device" Cgroup="Startup"/>
1416 <category>Getting Started</category>
1417 </attributes>
1418 </example>
1419
1420 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
1421 <description>DSP_Lib Convolution example</description>
1422 <board name="uVision Simulator" vendor="Keil"/>
1423 <project>
1424 <environment name="uv" load="arm_convolution_example.uvprojx"/>
1425 </project>
1426 <attributes>
1427 <component Cclass="CMSIS" Cgroup="CORE"/>
1428 <component Cclass="CMSIS" Cgroup="DSP"/>
1429 <component Cclass="Device" Cgroup="Startup"/>
1430 <category>Getting Started</category>
1431 </attributes>
1432 </example>
1433
1434 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
1435 <description>DSP_Lib Dotproduct example</description>
1436 <board name="uVision Simulator" vendor="Keil"/>
1437 <project>
1438 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
1439 </project>
1440 <attributes>
1441 <component Cclass="CMSIS" Cgroup="CORE"/>
1442 <component Cclass="CMSIS" Cgroup="DSP"/>
1443 <component Cclass="Device" Cgroup="Startup"/>
1444 <category>Getting Started</category>
1445 </attributes>
1446 </example>
1447
1448 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
1449 <description>DSP_Lib FFT Bin example</description>
1450 <board name="uVision Simulator" vendor="Keil"/>
1451 <project>
1452 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
1453 </project>
1454 <attributes>
1455 <component Cclass="CMSIS" Cgroup="CORE"/>
1456 <component Cclass="CMSIS" Cgroup="DSP"/>
1457 <component Cclass="Device" Cgroup="Startup"/>
1458 <category>Getting Started</category>
1459 </attributes>
1460 </example>
1461
1462 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
1463 <description>DSP_Lib FIR example</description>
1464 <board name="uVision Simulator" vendor="Keil"/>
1465 <project>
1466 <environment name="uv" load="arm_fir_example.uvprojx"/>
1467 </project>
1468 <attributes>
1469 <component Cclass="CMSIS" Cgroup="CORE"/>
1470 <component Cclass="CMSIS" Cgroup="DSP"/>
1471 <component Cclass="Device" Cgroup="Startup"/>
1472 <category>Getting Started</category>
1473 </attributes>
1474 </example>
1475
1476 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
1477 <description>DSP_Lib Graphic Equalizer example</description>
1478 <board name="uVision Simulator" vendor="Keil"/>
1479 <project>
1480 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
1481 </project>
1482 <attributes>
1483 <component Cclass="CMSIS" Cgroup="CORE"/>
1484 <component Cclass="CMSIS" Cgroup="DSP"/>
1485 <component Cclass="Device" Cgroup="Startup"/>
1486 <category>Getting Started</category>
1487 </attributes>
1488 </example>
1489
1490 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
1491 <description>DSP_Lib Linear Interpolation example</description>
1492 <board name="uVision Simulator" vendor="Keil"/>
1493 <project>
1494 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
1495 </project>
1496 <attributes>
1497 <component Cclass="CMSIS" Cgroup="CORE"/>
1498 <component Cclass="CMSIS" Cgroup="DSP"/>
1499 <component Cclass="Device" Cgroup="Startup"/>
1500 <category>Getting Started</category>
1501 </attributes>
1502 </example>
1503
1504 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
1505 <description>DSP_Lib Matrix example</description>
1506 <board name="uVision Simulator" vendor="Keil"/>
1507 <project>
1508 <environment name="uv" load="arm_matrix_example.uvprojx"/>
1509 </project>
1510 <attributes>
1511 <component Cclass="CMSIS" Cgroup="CORE"/>
1512 <component Cclass="CMSIS" Cgroup="DSP"/>
1513 <component Cclass="Device" Cgroup="Startup"/>
1514 <category>Getting Started</category>
1515 </attributes>
1516 </example>
1517
1518 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
1519 <description>DSP_Lib Signal Convergence example</description>
1520 <board name="uVision Simulator" vendor="Keil"/>
1521 <project>
1522 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
1523 </project>
1524 <attributes>
1525 <component Cclass="CMSIS" Cgroup="CORE"/>
1526 <component Cclass="CMSIS" Cgroup="DSP"/>
1527 <component Cclass="Device" Cgroup="Startup"/>
1528 <category>Getting Started</category>
1529 </attributes>
1530 </example>
1531
1532 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
1533 <description>DSP_Lib Sinus/Cosinus example</description>
1534 <board name="uVision Simulator" vendor="Keil"/>
1535 <project>
1536 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
1537 </project>
1538 <attributes>
1539 <component Cclass="CMSIS" Cgroup="CORE"/>
1540 <component Cclass="CMSIS" Cgroup="DSP"/>
1541 <component Cclass="Device" Cgroup="Startup"/>
1542 <category>Getting Started</category>
1543 </attributes>
1544 </example>
1545
1546 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
1547 <description>DSP_Lib Variance example</description>
1548 <board name="uVision Simulator" vendor="Keil"/>
1549 <project>
1550 <environment name="uv" load="arm_variance_example.uvprojx"/>
1551 </project>
1552 <attributes>
1553 <component Cclass="CMSIS" Cgroup="CORE"/>
1554 <component Cclass="CMSIS" Cgroup="DSP"/>
1555 <component Cclass="Device" Cgroup="Startup"/>
1556 <category>Getting Started</category>
1557 </attributes>
1558 </example>
1559 </examples>
1560
1561</package>