TrustedFirmware Git Browser
Code Review Sign In
review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / b39a6bcc5d08abc2e76124e2077d6abc0d60d24e / . / ARM.CMSIS.pdsc
blob: 06b498b6ac5dee7117221383bec6a5302b972b91 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
7 <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]11 <release version="5.0.0-Beta6">
12 CMSIS_Core:
13 - Added SCB_CFSR register bit definitions in core_*.h.
14 - Added NVIC_GetEnableIRQ function in core_*.h.
15 - Updated core instruction macros in cmsis_gcc.h.
16 </release>
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]17 <release version="5.0.0-Beta5">
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]18 CMSIS_DSP:
19 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
20 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]21 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]22 <release version="5.0.0-Beta4">
23 Updated ARMv8MML device files.
24 - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
25 Updated CMSIS core files.
26 - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
27 </release>
28 <release version="5.0.0-Beta3">
29 Updated CMSIS ARMv8M core / device files
30 - increased SAU regions to 8.
31 - moved TZ_SAU_Setup() to partition_#device#.h.
32 </release>
33 <release version="5.0.0-Beta2">
34 - renamed core_*.h to lower case.
35 - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
36 - updated ARMv8M?L.svd.
37 </release>
38 <release version="5.0.0-Beta1">
39 - added function SCB_GetFPUType() to all CMSIS cores.
40 - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
41 - updated CMSIS core files to V5.0
42 - updated CMSIS Core change log.
43 - updated CMSIS DSP_Lib change log.
44 - updated CMSIS DSP_Lib libraries.
45 </release>
46 <release version="5.0.0-Beta" date="2015-12-15">
47 Added ARMv8M support to CMSIS-Core.
48 - CMSIS-Core 5.0.0 Beta (see revision history for details)
49 - CMSIS-RTOS
50 -- API 1.02 (unchanged)
51 -- RTX 4.81.0 (see revision history for details)
52 - CMSIS-SVD 1.3.2 (see revision history for details)
53 </release>
54 <release version="4.5.0" date="2015-10-28">
55 - CMSIS-Core 4.30.0 (see revision history for details)
56 - CMSIS-DAP 1.1.0 (unchanged)
57 - CMSIS-Driver 2.04.0 (see revision history for details)
58 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
59 - CMSIS-PACK 1.4.1 (see revision history for details)
60 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
61 - CMSIS-SVD 1.3.1 (see revision history for details)
62 </release>
63 <release version="4.4.0" date="2015-09-11">
64 - CMSIS-Core 4.20 (see revision history for details)
65 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
66 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
67 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
68 - CMSIS-RTOS
69 -- API 1.02 (unchanged)
70 -- RTX 4.79 (see revision history for details)
71 - CMSIS-SVD 1.3.0 (see revision history for details)
72 - CMSIS-DAP 1.1.0 (extended with SWO support)
73 </release>
74 <release version="4.3.0" date="2015-03-20">
75 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
76 - CMSIS-DSP 1.4.5 (see revision history for details)
77 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
78 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
79 - CMSIS-RTOS
80 -- API 1.02 (unchanged)
81 -- RTX 4.78 (see revision history for details)
82 - CMSIS-SVD 1.2 (unchanged)
83 </release>
84 <release version="4.2.0" date="2014-09-24">
85 Adding Cortex-M7 support
86 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
87 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
88 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
89 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
90 - CMSIS-RTOS RTX 4.75 (see revision history for details)
91 </release>
92 <release version="4.1.1" date="2014-06-30">
93 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
94 </release>
95 <release version="4.1.0" date="2014-06-12">
96 - CMSIS-Driver 2.02 (incompatible update)
97 - CMSIS-Pack 1.3 (see revision history for details)
98 - CMSIS-DSP 1.4.2 (unchanged)
99 - CMSIS-Core 3.30 (unchanged)
100 - CMSIS-RTOS RTX 4.74 (unchanged)
101 - CMSIS-RTOS API 1.02 (unchanged)
102 - CMSIS-SVD 1.10 (unchanged)
103 PACK:
104 - removed G++ specific files from PACK
105 - added Component Startup variant "C Startup"
106 - added Pack Checking Utility
107 - updated conditions to reflect tool-chain dependency
108 - added Taxonomy for Graphics
109 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
110 </release>
111 <release version="4.0.0">
112 - CMSIS-Driver 2.00 Preliminary (incompatible update)
113 - CMSIS-Pack 1.1 Preliminary
114 - CMSIS-DSP 1.4.2 (see revision history for details)
115 - CMSIS-Core 3.30 (see revision history for details)
116 - CMSIS-RTOS RTX 4.74 (see revision history for details)
117 - CMSIS-RTOS API 1.02 (unchanged)
118 - CMSIS-SVD 1.10 (unchanged)
119 </release>
120 <release version="3.20.4">
121 - CMSIS-RTOS 4.74 (see revision history for details)
122 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
123 </release>
124 <release version="3.20.3">
125 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
126 - CMSIS-RTOS 4.73 (see revision history for details)
127 </release>
128 <release version="3.20.2">
129 - CMSIS-Pack documentation has been added
130 - CMSIS-Drivers header and documentation have been added to PACK
131 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
132 </release>
133 <release version="3.20.1">
134 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
135 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
136 </release>
137 <release version="3.20.0">
138 The software portions that are deployed in the application program are now under a BSD license which allows usage
139 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
140 The individual components have been update as listed below:
141 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
142 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
143 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
144 - CMSIS-SVD is unchanged.
145 </release>
146 </releases>
147
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]148 <taxonomy>
149 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
150 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
151 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
152 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
153 <description Cclass="File System">File Drive Support and File System</description>
154 <description Cclass="Graphics">Graphical User Interface</description>
155 <description Cclass="Network">Network Stack using Internet Protocols</description>
156 <description Cclass="USB">Universal Serial Bus Stack</description>
157 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
158 </taxonomy>
159
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]160 <devices>
161 <!-- ****************************** Cortex-M0 ****************************** -->
162 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]163 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]164 <description>
165The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
166- simple, easy-to-use programmers model
167- highly efficient ultra-low power operation
168- excellent code density
169- deterministic, high-performance interrupt handling
170- upward compatibility with the rest of the Cortex-M processor family.
171 </description>
172 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
173 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
174 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
175 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
176
177 <device Dname="ARMCM0">
178 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
179 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
180 </device>
181 </family>
182
183 <!-- ****************************** Cortex-M0P ****************************** -->
184 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]185 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]186 <description>
187The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
188- simple, easy-to-use programmers model
189- highly efficient ultra-low power operation
190- excellent code density
191- deterministic, high-performance interrupt handling
192- upward compatibility with the rest of the Cortex-M processor family.
193 </description>
194 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
195 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
196 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
197 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
198
199 <device Dname="ARMCM0P">
200 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
201 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
202 </device>
203 </family>
204
205 <!-- ****************************** Cortex-M3 ****************************** -->
206 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]207 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]208 <description>
209The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
210- simple, easy-to-use programmers model
211- highly efficient ultra-low power operation
212- excellent code density
213- deterministic, high-performance interrupt handling
214- upward compatibility with the rest of the Cortex-M processor family.
215 </description>
216 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
217 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
218 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
219 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
220
221 <device Dname="ARMCM3">
222 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
223 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
224 </device>
225 </family>
226
227 <!-- ****************************** Cortex-M4 ****************************** -->
228 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]229 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]230 <description>
231The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
232- simple, easy-to-use programmers model
233- highly efficient ultra-low power operation
234- excellent code density
235- deterministic, high-performance interrupt handling
236- upward compatibility with the rest of the Cortex-M processor family.
237 </description>
238 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
239 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
240 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
241 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
242
243 <device Dname="ARMCM4">
244 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
245 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
246 </device>
247
248 <device Dname="ARMCM4_FP">
249 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
250 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
251 </device>
252 </family>
253
254 <!-- ****************************** Cortex-M7 ****************************** -->
255 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]256 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]257 <description>
258The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
259- simple, easy-to-use programmers model
260- highly efficient ultra-low power operation
261- excellent code density
262- deterministic, high-performance interrupt handling
263- upward compatibility with the rest of the Cortex-M processor family.
264 </description>
265 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
266 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
267 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
268 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
269
270 <device Dname="ARMCM7">
271 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
272 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
273 </device>
274
275 <device Dname="ARMCM7_SP">
276 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
277 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
278 </device>
279
280 <device Dname="ARMCM7_DP">
281 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
282 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
283 </device>
284 </family>
285
286 <!-- ****************************** ARMSC000 ****************************** -->
287 <family Dfamily="ARM SC000" Dvendor="ARM:82">
288 <description>
289The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
290- simple, easy-to-use programmers model
291- highly efficient ultra-low power operation
292- excellent code density
293- deterministic, high-performance interrupt handling
294 </description>
295 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
296 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
297 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
298 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
299
300 <device Dname="ARMSC000">
301 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
302 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
303 </device>
304 </family>
305
306 <!-- ****************************** ARMSC300 ****************************** -->
307 <family Dfamily="ARM SC300" Dvendor="ARM:82">
308 <description>
309The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
310- simple, easy-to-use programmers model
311- highly efficient ultra-low power operation
312- excellent code density
313- deterministic, high-performance interrupt handling
314 </description>
315 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
316 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
317 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
318 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
319
320 <device Dname="ARMSC300">
321 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
322 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
323 </device>
324 </family>
325
326 <!-- ****************************** ARMv8-M Baseline ********************** -->
327 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
328 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
329 <description>
330The ARMv8MBL processor is brand new.
331 </description>
332 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
333 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
334 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
335 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
336
337 <device Dname="ARMv8MBL">
338 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
339 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
340 </device>
341 </family>
342
343 <!-- ****************************** ARMv8-M Mainline ****************************** -->
344 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
345 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
346 <description>
347The ARMv8MML processor is brand new.
348 </description>
349 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
350 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
351 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
352 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
353
354 <device Dname="ARMv8MML">
355 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
356 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
357 </device>
358
359 <device Dname="ARMv8MML_SP">
360 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
361 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
362 </device>
363
364 <device Dname="ARMv8MML_DP">
365 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
366 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
367 </device>
368 </family>
369
370 </devices>
371
372
373 <apis>
374 <!-- CMSIS-RTOS API -->
375 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
376 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
377 <files>
378 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
379 </files>
380 </api>
381 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
382 <description>USART Driver API for Cortex-M</description>
383 <files>
384 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
385 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
386 </files>
387 </api>
388 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
389 <description>SPI Driver API for Cortex-M</description>
390 <files>
391 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
392 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
393 </files>
394 </api>
395 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
396 <description>SAI Driver API for Cortex-M</description>
397 <files>
398 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
399 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
400 </files>
401 </api>
402 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
403 <description>I2C Driver API for Cortex-M</description>
404 <files>
405 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
406 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
407 </files>
408 </api>
409 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
410 <description>CAN Driver API for Cortex-M</description>
411 <files>
412 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
413 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
414 </files>
415 </api>
416 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
417 <description>Flash Driver API for Cortex-M</description>
418 <files>
419 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
420 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
421 </files>
422 </api>
423 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
424 <description>MCI Driver API for Cortex-M</description>
425 <files>
426 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
427 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
428 </files>
429 </api>
430 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
431 <description>NAND Flash Driver API for Cortex-M</description>
432 <files>
433 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
434 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
435 </files>
436 </api>
437 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
438 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
439 <files>
440 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
441 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
442 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
443 </files>
444 </api>
445 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
446 <description>Ethernet MAC Driver API for Cortex-M</description>
447 <files>
448 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
449 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
450 </files>
451 </api>
452 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
453 <description>Ethernet PHY Driver API for Cortex-M</description>
454 <files>
455 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
456 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
457 </files>
458 </api>
459 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
460 <description>USB Device Driver API for Cortex-M</description>
461 <files>
462 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
463 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
464 </files>
465 </api>
466 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
467 <description>USB Host Driver API for Cortex-M</description>
468 <files>
469 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
470 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
471 </files>
472 </api>
473 </apis>
474
475 <!-- conditions are dependency rules that can apply to a component or an individual file -->
476 <conditions>
477 <condition id="ARMCC">
478 <require Tcompiler="ARMCC"/>
479 </condition>
480
481 <condition id="GCC">
482 <require Tcompiler="GCC"/>
483 </condition>
484
485 <condition id="IAR">
486 <require Tcompiler="IAR"/>
487 </condition>
488
489 <condition id="ARMCC GCC">
490 <accept Tcompiler="ARMCC"/>
491 <accept Tcompiler="GCC"/>
492 </condition>
493
494 <condition id="Cortex-M Device">
495 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000</description>
496 <accept Dcore="Cortex-M0"/>
497 <accept Dcore="Cortex-M0+"/>
498 <accept Dcore="Cortex-M3"/>
499 <accept Dcore="Cortex-M4"/>
500 <accept Dcore="Cortex-M7"/>
501 <accept Dcore="SC000"/>
502 <accept Dcore="SC300"/>
503 </condition>
504
505 <condition id="Cortex-M ARMv8-M Device">
506 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000, ARMv8MBL, ARMv8MML</description>
507 <accept Dcore="Cortex-M0"/>
508 <accept Dcore="Cortex-M0+"/>
509 <accept Dcore="Cortex-M3"/>
510 <accept Dcore="Cortex-M4"/>
511 <accept Dcore="Cortex-M7"/>
512 <accept Dcore="SC000"/>
513 <accept Dcore="SC300"/>
514 <accept Dcore="ARMV8MBL"/>
515 <accept Dcore="ARMV8MML"/>
516 </condition>
517
518 <condition id="Cortex-M Device CMSIS Core">
519 <description>ARM Cortex-M device that depends on CMSIS Core component</description>
520 <require condition="Cortex-M Device"/>
521 <require Cclass="CMSIS" Cgroup="CORE"/>
522 </condition>
523
524 <condition id="Cortex-M Device Startup">
525 <description>Only show for Cortex-M based devices. Depends on Device Startup component.</description>
526 <require condition="Cortex-M Device"/>
527 <require Cclass="Device" Cgroup="Startup"/>
528 </condition>
529
530 <condition id="CMSIS Core">
531 <description>CMSIS CORE processor and device specific Startup files</description>
532 <require Cclass="CMSIS" Cgroup="CORE"/>
533 </condition>
534
535 <condition id="ARMCM0 CMSIS">
536 <!-- conditions selecting Devices -->
537 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
538 <require Dvendor="ARM:82" Dname="ARMCM0"/>
539 <require Cclass="CMSIS" Cgroup="CORE"/>
540 </condition>
541
542 <condition id="ARMCM0 CMSIS GCC">
543 <!-- conditions selecting Devices -->
544 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
545 <require condition="ARMCM0 CMSIS"/>
546 <require condition="GCC"/>
547 </condition>
548
549 <condition id="ARMCM0+ CMSIS">
550 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
551 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
552 <require Cclass="CMSIS" Cgroup="CORE"/>
553 </condition>
554
555 <condition id="ARMCM0+ CMSIS GCC">
556 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
557 <require condition="ARMCM0+ CMSIS"/>
558 <require condition="GCC"/>
559 </condition>
560
561 <condition id="ARMCM3 CMSIS">
562 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
563 <require Dvendor="ARM:82" Dname="ARMCM3"/>
564 <require Cclass="CMSIS" Cgroup="CORE"/>
565 </condition>
566
567 <condition id="ARMCM3 CMSIS GCC">
568 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
569 <require condition="ARMCM3 CMSIS"/>
570 <require condition="GCC"/>
571 </condition>
572
573 <condition id="ARMCM4 CMSIS">
574 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
575 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
576 <require Cclass="CMSIS" Cgroup="CORE"/>
577 </condition>
578
579 <condition id="ARMCM4 CMSIS GCC">
580 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
581 <require condition="ARMCM4 CMSIS"/>
582 <require condition="GCC"/>
583 </condition>
584
585 <condition id="ARMCM7 CMSIS">
586 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
587 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
588 <require Cclass="CMSIS" Cgroup="CORE"/>
589 </condition>
590
591 <condition id="ARMCM7 CMSIS GCC">
592 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
593 <require condition="ARMCM7 CMSIS"/>
594 <require condition="GCC"/>
595 </condition>
596
597 <condition id="ARMSC000 CMSIS">
598 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
599 <require Dvendor="ARM:82" Dname="ARMSC000"/>
600 <require Cclass="CMSIS" Cgroup="CORE"/>
601 </condition>
602
603 <condition id="ARMSC000 CMSIS GCC">
604 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
605 <require condition="ARMSC000 CMSIS"/>
606 <require condition="GCC"/>
607 </condition>
608
609 <condition id="ARMSC300 CMSIS">
610 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
611 <require Dvendor="ARM:82" Dname="ARMSC300"/>
612 <require Cclass="CMSIS" Cgroup="CORE"/>
613 </condition>
614
615 <condition id="ARMSC300 CMSIS GCC">
616 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
617 <require condition="ARMSC300 CMSIS"/>
618 <require condition="GCC"/>
619 </condition>
620
621 <condition id="ARMv8MBL CMSIS">
622 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
623 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
624 <require Cclass="CMSIS" Cgroup="CORE"/>
625 </condition>
626
627 <condition id="ARMv8MBL CMSIS GCC">
628 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
629 <require condition="ARMv8MBL CMSIS"/>
630 <require condition="GCC"/>
631 </condition>
632
633 <condition id="ARMv8MML CMSIS">
634 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
635 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
636 <require Cclass="CMSIS" Cgroup="CORE"/>
637 </condition>
638
639 <condition id="ARMv8MML CMSIS GCC">
640 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
641 <require condition="ARMv8MML CMSIS"/>
642 <require condition="GCC"/>
643 </condition>
644
645 <condition id="CMSIS DSP">
646 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
647 <require condition="Cortex-M Device CMSIS Core"/>
648 <accept Tcompiler="GCC"/>
649 <accept Tcompiler="ARMCC"/>
650 <accept Tcompiler="IAR"/>
651 </condition>
652
653 <!-- ARMCC compiler -->
654 <condition id="CM0_LE_ARMCC">
655 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
656 <accept Dcore="Cortex-M0"/>
657 <accept Dcore="Cortex-M0+"/>
658 <accept Dcore="SC000"/>
659 <require Dendian="Little-endian"/>
660 <require Tcompiler="ARMCC"/>
661 </condition>
662
663 <condition id="CM0_BE_ARMCC">
664 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
665 <accept Dcore="Cortex-M0"/>
666 <accept Dcore="Cortex-M0+"/>
667 <accept Dcore="SC000"/>
668 <require Dendian="Big-endian"/>
669 <require Tcompiler="ARMCC"/>
670 </condition>
671
672 <condition id="CM3_LE_ARMCC">
673 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
674 <accept Dcore="Cortex-M3"/>
675 <accept Dcore="SC300"/>
676 <require Dendian="Little-endian"/>
677 <require Tcompiler="ARMCC"/>
678 </condition>
679
680 <condition id="CM3_BE_ARMCC">
681 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
682 <accept Dcore="Cortex-M3"/>
683 <accept Dcore="SC300"/>
684 <require Dendian="Big-endian"/>
685 <require Tcompiler="ARMCC"/>
686 </condition>
687
688 <condition id="CM4_LE_ARMCC">
689 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
690 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
691 <require Tcompiler="ARMCC"/>
692 </condition>
693
694 <condition id="CM4_BE_ARMCC">
695 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
696 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
697 <require Tcompiler="ARMCC"/>
698 </condition>
699
700 <condition id="CM4F_LE_ARMCC">
701 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
702 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
703 <require Tcompiler="ARMCC"/>
704 </condition>
705
706 <condition id="CM4F_BE_ARMCC">
707 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
708 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
709 <require Tcompiler="ARMCC"/>
710 </condition>
711
712 <!-- XMC 4000 Series devices from Infineon require a special library -->
713 <condition id="CM4_LE_ARMCC_STD">
714 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
715 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
716 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
717 <require Tcompiler="ARMCC"/>
718 </condition>
719 <condition id="CM4_LE_ARMCC_IFX">
720 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
721 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
722 <require Tcompiler="ARMCC"/>
723 </condition>
724 <condition id="CM4F_LE_ARMCC_STD">
725 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
726 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
727 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
728 <require Tcompiler="ARMCC"/>
729 </condition>
730 <condition id="CM4F_LE_ARMCC_IFX">
731 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
732 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
733 <require Tcompiler="ARMCC"/>
734 </condition>
735
736 <condition id="CM7_LE_ARMCC">
737 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
738 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
739 <require Tcompiler="ARMCC"/>
740 </condition>
741
742 <condition id="CM7_BE_ARMCC">
743 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
744 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
745 <require Tcompiler="ARMCC"/>
746 </condition>
747
748 <condition id="CM7F_LE_ARMCC">
749 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
750 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
751 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
752 <require Tcompiler="ARMCC"/>
753 </condition>
754
755 <condition id="CM7F_BE_ARMCC">
756 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
757 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
758 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
759 <require Tcompiler="ARMCC"/>
760 </condition>
761
762 <condition id="CM7FSP_LE_ARMCC">
763 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
764 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
765 <require Tcompiler="ARMCC"/>
766 </condition>
767
768 <condition id="CM7FSP_BE_ARMCC">
769 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
770 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
771 <require Tcompiler="ARMCC"/>
772 </condition>
773
774 <condition id="CM7FDP_LE_ARMCC">
775 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
776 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
777 <require Tcompiler="ARMCC"/>
778 </condition>
779
780 <condition id="CM7FDP_BE_ARMCC">
781 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
782 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
783 <require Tcompiler="ARMCC"/>
784 </condition>
785
786 <!-- GCC compiler -->
787 <condition id="CM0_LE_GCC">
788 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
789 <accept Dcore="Cortex-M0"/>
790 <accept Dcore="Cortex-M0+"/>
791 <accept Dcore="SC000"/>
792 <require Dendian="Little-endian"/>
793 <require Tcompiler="GCC"/>
794 </condition>
795
796 <condition id="CM0_BE_GCC">
797 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
798 <accept Dcore="Cortex-M0"/>
799 <accept Dcore="Cortex-M0+"/>
800 <accept Dcore="SC000"/>
801 <require Dendian="Big-endian"/>
802 <require Tcompiler="GCC"/>
803 </condition>
804
805 <condition id="CM3_LE_GCC">
806 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
807 <accept Dcore="Cortex-M3"/>
808 <accept Dcore="SC300"/>
809 <require Dendian="Little-endian"/>
810 <require Tcompiler="GCC"/>
811 </condition>
812
813 <condition id="CM3_BE_GCC">
814 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
815 <accept Dcore="Cortex-M3"/>
816 <accept Dcore="SC300"/>
817 <require Dendian="Big-endian"/>
818 <require Tcompiler="GCC"/>
819 </condition>
820
821 <condition id="CM4_LE_GCC">
822 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
823 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
824 <require Tcompiler="GCC"/>
825 </condition>
826
827 <condition id="CM4_BE_GCC">
828 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
829 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
830 <require Tcompiler="GCC"/>
831 </condition>
832
833 <condition id="CM4F_LE_GCC">
834 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
835 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
836 <require Tcompiler="GCC"/>
837 </condition>
838
839 <condition id="CM4F_BE_GCC">
840 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
841 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
842 <require Tcompiler="GCC"/>
843 </condition>
844
845 <!-- XMC 4000 Series devices from Infineon require a special library -->
846 <condition id="CM4_LE_GCC_STD">
847 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
848 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
849 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
850 <require Tcompiler="GCC"/>
851 </condition>
852 <condition id="CM4_LE_GCC_IFX">
853 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
854 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
855 <require Tcompiler="GCC"/>
856 </condition>
857 <condition id="CM4F_LE_GCC_STD">
858 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
859 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
860 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
861 <require Tcompiler="GCC"/>
862 </condition>
863 <condition id="CM4F_LE_GCC_IFX">
864 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
865 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
866 <require Tcompiler="GCC"/>
867 </condition>
868
869 <condition id="CM7_LE_GCC">
870 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
871 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
872 <require Tcompiler="GCC"/>
873 </condition>
874
875 <condition id="CM7_BE_GCC">
876 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
877 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
878 <require Tcompiler="GCC"/>
879 </condition>
880
881 <condition id="CM7F_LE_GCC">
882 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
883 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
884 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
885 <require Tcompiler="GCC"/>
886 </condition>
887
888 <condition id="CM7F_BE_GCC">
889 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
890 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
891 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
892 <require Tcompiler="GCC"/>
893 </condition>
894
895 <condition id="CM7FSP_LE_GCC">
896 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
897 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
898 <require Tcompiler="GCC"/>
899 </condition>
900
901 <condition id="CM7FSP_BE_GCC">
902 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
903 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
904 <require Tcompiler="GCC"/>
905 </condition>
906
907 <condition id="CM7FDP_LE_GCC">
908 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
909 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
910 <require Tcompiler="GCC"/>
911 </condition>
912
913 <condition id="CM7FDP_BE_GCC">
914 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
915 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
916 <require Tcompiler="GCC"/>
917 </condition>
918
919 <!-- IAR compiler -->
920 <condition id="CM0_LE_IAR">
921 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
922 <accept Dcore="Cortex-M0"/>
923 <accept Dcore="Cortex-M0+"/>
924 <accept Dcore="SC000"/>
925 <require Dendian="Little-endian"/>
926 <require Tcompiler="IAR"/>
927 </condition>
928
929 <condition id="CM0_BE_IAR">
930 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
931 <accept Dcore="Cortex-M0"/>
932 <accept Dcore="Cortex-M0+"/>
933 <accept Dcore="SC000"/>
934 <require Dendian="Big-endian"/>
935 <require Tcompiler="IAR"/>
936 </condition>
937
938 <condition id="CM3_LE_IAR">
939 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
940 <accept Dcore="Cortex-M3"/>
941 <accept Dcore="SC300"/>
942 <require Dendian="Little-endian"/>
943 <require Tcompiler="IAR"/>
944 </condition>
945
946 <condition id="CM3_BE_IAR">
947 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
948 <accept Dcore="Cortex-M3"/>
949 <accept Dcore="SC300"/>
950 <require Dendian="Big-endian"/>
951 <require Tcompiler="IAR"/>
952 </condition>
953
954 <condition id="CM4_LE_IAR">
955 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
956 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
957 <require Tcompiler="IAR"/>
958 </condition>
959
960 <condition id="CM4_BE_IAR">
961 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
962 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
963 <require Tcompiler="IAR"/>
964 </condition>
965
966 <condition id="CM4F_LE_IAR">
967 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
968 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
969 <require Tcompiler="IAR"/>
970 </condition>
971
972 <condition id="CM4F_BE_IAR">
973 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
974 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
975 <require Tcompiler="IAR"/>
976 </condition>
977
978 <condition id="CM7_LE_IAR">
979 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
980 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
981 <require Tcompiler="IAR"/>
982 </condition>
983
984 <condition id="CM7_BE_IAR">
985 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
986 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
987 <require Tcompiler="IAR"/>
988 </condition>
989
990 <condition id="CM7F_LE_IAR">
991 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
992 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
993 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
994 <require Tcompiler="IAR"/>
995 </condition>
996
997 <condition id="CM7F_BE_IAR">
998 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
999 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1000 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1001 <require Tcompiler="IAR"/>
1002 </condition>
1003
1004 <condition id="CM7FSP_LE_IAR">
1005 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1006 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1007 <require Tcompiler="IAR"/>
1008 </condition>
1009
1010 <condition id="CM7FSP_BE_IAR">
1011 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1012 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1013 <require Tcompiler="IAR"/>
1014 </condition>
1015
1016 <condition id="CM7FDP_LE_IAR">
1017 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1018 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1019 <require Tcompiler="IAR"/>
1020 </condition>
1021
1022 <condition id="CM7FDP_BE_IAR">
1023 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1024 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1025 <require Tcompiler="IAR"/>
1026 </condition>
1027 </conditions>
1028
1029 <components>
1030 <!-- CMSIS-Core component -->
1031 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="Cortex-M ARMv8-M Device" >
1032 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1033 <files>
1034 <!-- CPU independent -->
1035 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1036 <file category="include" name="CMSIS/Include/"/>
1037 </files>
1038 </component>
1039
1040 <!-- CMSIS-Startup components -->
1041 <!-- Cortex-M0 -->
1042 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1043 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1044 <files>
1045 <!-- include folder / device header file -->
1046 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1047 <!-- startup / system file -->
1048 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1049 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1050 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1051 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1052 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1053 </files>
1054 </component>
1055 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1056 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1057 <files>
1058 <!-- include folder / device header file -->
1059 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1060 <!-- startup / system file -->
1061 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1062 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1063 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1064 </files>
1065 </component>
1066
1067 <!-- Cortex-M0+ -->
1068 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1069 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1070 <files>
1071 <!-- include folder / device header file -->
1072 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1073 <!-- startup / system file -->
1074 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1075 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1076 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1077 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1078 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1079 </files>
1080 </component>
1081 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1082 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1083 <files>
1084 <!-- include folder / device header file -->
1085 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1086 <!-- startup / system file -->
1087 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1088 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1089 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1090 </files>
1091 </component>
1092
1093 <!-- Cortex-M3 -->
1094 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1095 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1096 <files>
1097 <!-- include folder / device header file -->
1098 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1099 <!-- startup / system file -->
1100 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1101 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1102 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1103 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1104 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1105 </files>
1106 </component>
1107 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1108 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1109 <files>
1110 <!-- include folder / device header file -->
1111 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1112 <!-- startup / system file -->
1113 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1114 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1115 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1116 </files>
1117 </component>
1118
1119 <!-- Cortex-M4 -->
1120 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1121 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1122 <files>
1123 <!-- include folder / device header file -->
1124 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1125 <!-- startup / system file -->
1126 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1127 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1128 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1129 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1130 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1131 </files>
1132 </component>
1133 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1134 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1135 <files>
1136 <!-- include folder / device header file -->
1137 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1138 <!-- startup / system file -->
1139 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1140 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1141 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1142 </files>
1143 </component>
1144
1145 <!-- Cortex-M7 -->
1146 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1147 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1148 <files>
1149 <!-- include folder / device header file -->
1150 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1151 <!-- startup / system file -->
1152 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1153 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1154 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1155 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1156 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1157 </files>
1158 </component>
1159 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1160 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1161 <files>
1162 <!-- include folder / device header file -->
1163 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1164 <!-- startup / system file -->
1165 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1166 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1167 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1168 </files>
1169 </component>
1170
1171 <!-- Cortex-SC000 -->
1172 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1173 <description>System and Startup for Generic ARM SC000 device</description>
1174 <files>
1175 <!-- include folder / device header file -->
1176 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1177 <!-- startup / system file -->
1178 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1179 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1180 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1181 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1182 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1183 </files>
1184 </component>
1185 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1186 <description>System and Startup for Generic ARM SC000 device</description>
1187 <files>
1188 <!-- include folder / device header file -->
1189 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1190 <!-- startup / system file -->
1191 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1192 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1193 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1194 </files>
1195 </component>
1196
1197 <!-- Cortex-SC300 -->
1198 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1199 <description>System and Startup for Generic ARM SC300 device</description>
1200 <files>
1201 <!-- include folder / device header file -->
1202 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1203 <!-- startup / system file -->
1204 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1205 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1206 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1207 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1208 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1209 </files>
1210 </component>
1211 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1212 <description>System and Startup for Generic ARM SC300 device</description>
1213 <files>
1214 <!-- include folder / device header file -->
1215 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1216 <!-- startup / system file -->
1217 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1218 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1219 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1220 </files>
1221 </component>
1222
1223 <!-- ARMv8MBL -->
1224 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1225 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1226 <files>
1227 <!-- include folder / device header file -->
1228 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1229 <!-- startup / system file -->
1230 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1231 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1232 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1233 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1234 <!-- SAU configuration -->
1235 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1236 </files>
1237 </component>
1238 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1239 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1240 <files>
1241 <!-- include folder / device header file -->
1242 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1243 <!-- startup / system file -->
1244 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1245 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1246 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
1247 </files>
1248 </component>
1249
1250 <!-- ARMv8MML -->
1251 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
1252 <description>System and Startup for Generic ARM ARMv8MML device</description>
1253 <files>
1254 <!-- include folder / device header file -->
1255 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1256 <!-- startup / system file -->
1257 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
1258 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
1259 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1260 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1261 <!-- SAU configuration -->
1262 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
1263 </files>
1264 </component>
1265 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
1266 <description>System and Startup for Generic ARM ARMv8MML device</description>
1267 <files>
1268 <!-- include folder / device header file -->
1269 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1270 <!-- startup / system file -->
1271 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
1272 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1273 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
1274 </files>
1275 </component>
1276
1277
1278 <!-- CMSIS-DSP component -->
1279 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
1280 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
1281 <files>
1282 <!-- CPU independent -->
1283 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
1284 <!-- <file category="header" name="CMSIS/Include/arm_common_tables.h"/> -->
1285 <file category="header" name="CMSIS/Include/arm_math.h"/>
1286 <!-- CPU and Compiler dependent -->
1287 <!-- ARMCC -->
1288 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1289 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1290 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1291 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1292 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1293 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1294 <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1295 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1296 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1297 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1298 <file category="library" condition="CM7FSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1299 <file category="library" condition="CM7FSP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1300 <file category="library" condition="CM7FDP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1301 <file category="library" condition="CM7FDP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1302 <!-- GCC -->
1303 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1304 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1305 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1306 <file category="library" condition="CM4F_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1307 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1308 <file category="library" condition="CM7FSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1309 <file category="library" condition="CM7FDP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1310 </files>
1311 </component>
1312
1313 <!-- CMSIS-RTOS Keil RTX component -->
1314 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="Cortex-M Device Startup">
1315 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1316 <RTE_Components_h>
1317 <!-- the following content goes into file 'RTE_Components.h' -->
1318 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1319 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1320 </RTE_Components_h>
1321 <files>
1322 <!-- CPU independent -->
1323 <file category="doc" name="CMSIS/Documentation/RTOS/html/_r_t_x_implementation.html"/>
1324 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
1325 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
1326
1327 <!-- RTX templates -->
1328 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
1329 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
1330 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
1331 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
1332 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
1333 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
1334 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
1335 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
1336 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
1337 <!-- tool-chain specific template file -->
1338 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1339 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
1340 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1341
1342 <!-- CPU and Compiler dependent -->
1343 <!-- ARMCC -->
1344 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1345 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1346 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1347 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1348 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1349 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1350 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1351 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1352 <file category="library" condition="CM4F_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1353 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1354 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1355 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1356 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1357 <file category="library" condition="CM7F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1358 <!-- GCC -->
1359 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1360 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1361 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1362 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1363 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1364 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1365 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1366 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1367 <file category="library" condition="CM4F_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1368 <file category="library" condition="CM4F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1369 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1370 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1371 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1372 <file category="library" condition="CM7F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1373 <!-- IAR -->
1374 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1375 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1376 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1377 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1378 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1379 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1380 <file category="library" condition="CM4F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1381 <file category="library" condition="CM4F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1382 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1383 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1384 <file category="library" condition="CM7F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1385 <file category="library" condition="CM7F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1386 </files>
1387 </component>
1388 </components>
1389
1390 <boards>
1391 <board name="uVision Simulator" vendor="Keil">
1392 <description>uVision Simulator</description>
1393 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
1394 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
1395 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
1396 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
1397 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
1398 </board>
1399 </boards>
1400
1401 <examples>
1402 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
1403 <description>DSP_Lib Class Marks example</description>
1404 <board name="uVision Simulator" vendor="Keil"/>
1405 <project>
1406 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
1407 </project>
1408 <attributes>
1409 <component Cclass="CMSIS" Cgroup="CORE"/>
1410 <component Cclass="CMSIS" Cgroup="DSP"/>
1411 <component Cclass="Device" Cgroup="Startup"/>
1412 <category>Getting Started</category>
1413 </attributes>
1414 </example>
1415
1416 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
1417 <description>DSP_Lib Convolution example</description>
1418 <board name="uVision Simulator" vendor="Keil"/>
1419 <project>
1420 <environment name="uv" load="arm_convolution_example.uvprojx"/>
1421 </project>
1422 <attributes>
1423 <component Cclass="CMSIS" Cgroup="CORE"/>
1424 <component Cclass="CMSIS" Cgroup="DSP"/>
1425 <component Cclass="Device" Cgroup="Startup"/>
1426 <category>Getting Started</category>
1427 </attributes>
1428 </example>
1429
1430 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
1431 <description>DSP_Lib Dotproduct example</description>
1432 <board name="uVision Simulator" vendor="Keil"/>
1433 <project>
1434 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
1435 </project>
1436 <attributes>
1437 <component Cclass="CMSIS" Cgroup="CORE"/>
1438 <component Cclass="CMSIS" Cgroup="DSP"/>
1439 <component Cclass="Device" Cgroup="Startup"/>
1440 <category>Getting Started</category>
1441 </attributes>
1442 </example>
1443
1444 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
1445 <description>DSP_Lib FFT Bin example</description>
1446 <board name="uVision Simulator" vendor="Keil"/>
1447 <project>
1448 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
1449 </project>
1450 <attributes>
1451 <component Cclass="CMSIS" Cgroup="CORE"/>
1452 <component Cclass="CMSIS" Cgroup="DSP"/>
1453 <component Cclass="Device" Cgroup="Startup"/>
1454 <category>Getting Started</category>
1455 </attributes>
1456 </example>
1457
1458 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
1459 <description>DSP_Lib FIR example</description>
1460 <board name="uVision Simulator" vendor="Keil"/>
1461 <project>
1462 <environment name="uv" load="arm_fir_example.uvprojx"/>
1463 </project>
1464 <attributes>
1465 <component Cclass="CMSIS" Cgroup="CORE"/>
1466 <component Cclass="CMSIS" Cgroup="DSP"/>
1467 <component Cclass="Device" Cgroup="Startup"/>
1468 <category>Getting Started</category>
1469 </attributes>
1470 </example>
1471
1472 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
1473 <description>DSP_Lib Graphic Equalizer example</description>
1474 <board name="uVision Simulator" vendor="Keil"/>
1475 <project>
1476 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
1477 </project>
1478 <attributes>
1479 <component Cclass="CMSIS" Cgroup="CORE"/>
1480 <component Cclass="CMSIS" Cgroup="DSP"/>
1481 <component Cclass="Device" Cgroup="Startup"/>
1482 <category>Getting Started</category>
1483 </attributes>
1484 </example>
1485
1486 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
1487 <description>DSP_Lib Linear Interpolation example</description>
1488 <board name="uVision Simulator" vendor="Keil"/>
1489 <project>
1490 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
1491 </project>
1492 <attributes>
1493 <component Cclass="CMSIS" Cgroup="CORE"/>
1494 <component Cclass="CMSIS" Cgroup="DSP"/>
1495 <component Cclass="Device" Cgroup="Startup"/>
1496 <category>Getting Started</category>
1497 </attributes>
1498 </example>
1499
1500 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
1501 <description>DSP_Lib Matrix example</description>
1502 <board name="uVision Simulator" vendor="Keil"/>
1503 <project>
1504 <environment name="uv" load="arm_matrix_example.uvprojx"/>
1505 </project>
1506 <attributes>
1507 <component Cclass="CMSIS" Cgroup="CORE"/>
1508 <component Cclass="CMSIS" Cgroup="DSP"/>
1509 <component Cclass="Device" Cgroup="Startup"/>
1510 <category>Getting Started</category>
1511 </attributes>
1512 </example>
1513
1514 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
1515 <description>DSP_Lib Signal Convergence example</description>
1516 <board name="uVision Simulator" vendor="Keil"/>
1517 <project>
1518 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
1519 </project>
1520 <attributes>
1521 <component Cclass="CMSIS" Cgroup="CORE"/>
1522 <component Cclass="CMSIS" Cgroup="DSP"/>
1523 <component Cclass="Device" Cgroup="Startup"/>
1524 <category>Getting Started</category>
1525 </attributes>
1526 </example>
1527
1528 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
1529 <description>DSP_Lib Sinus/Cosinus example</description>
1530 <board name="uVision Simulator" vendor="Keil"/>
1531 <project>
1532 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
1533 </project>
1534 <attributes>
1535 <component Cclass="CMSIS" Cgroup="CORE"/>
1536 <component Cclass="CMSIS" Cgroup="DSP"/>
1537 <component Cclass="Device" Cgroup="Startup"/>
1538 <category>Getting Started</category>
1539 </attributes>
1540 </example>
1541
1542 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
1543 <description>DSP_Lib Variance example</description>
1544 <board name="uVision Simulator" vendor="Keil"/>
1545 <project>
1546 <environment name="uv" load="arm_variance_example.uvprojx"/>
1547 </project>
1548 <attributes>
1549 <component Cclass="CMSIS" Cgroup="CORE"/>
1550 <component Cclass="CMSIS" Cgroup="DSP"/>
1551 <component Cclass="Device" Cgroup="Startup"/>
1552 <category>Getting Started</category>
1553 </attributes>
1554 </example>
1555 </examples>
1556
1557</package>