Infineon: Add cyw20829 platform, shared slot feature, json memory map, psoc6 xip
Based in 1.8.0 release of MCUBoot library
This commit adds CYW20829 Infineon platform support with following capabilities:
1. Overwrite and swap upgrade mode support
2. Multi-image with up to 4 images
3. Hardware security counter is supported for CYW20829 platform
Add XIP support for PSOC6 platform - place BOOT slot in external memory and execute it in place using SMIF in XIP mode
and some new features for Infineon devices.
1. Shared upgrade slot feature - use one shared area for upgrade slots of multiple images
2. Memory map defined using JSON file - define memory regions for bootloader and user app in conventional way using JSON file
diff --git a/boot/cypress/BlinkyApp/BlinkyApp.md b/boot/cypress/BlinkyApp/BlinkyApp.md
index d380673..f3f20da 100644
--- a/boot/cypress/BlinkyApp/BlinkyApp.md
+++ b/boot/cypress/BlinkyApp/BlinkyApp.md
@@ -1,191 +1,184 @@
-### Blinking LED Test Application For Mcubootapp Bootloading Application
+## Blinking LED test application for MCUBootApp bootloading application
### Description
-Implements simple Blinky LED CM4 application to demonstrate MCUBootApp bootloading application operation in terms of boot and upgrade processes.
+Implements a simple Blinky LED application to demonstrate the MCUBootApp bootloading application operation for the boot and upgrade processes.
-It is validated and started by MCUBootApp which is running on CM0p core of PSoC 6 device.
+It is validated and started by MCUBootApp, which is running on the CM0p core of PSoC™ 6 devices, or CM33 core for the CYW20829 device.
Functionality:
-* Blinks RED led with 2 different rates, depending on type of image - BOOT or UPGRADE.
-* Prints debug info and version of itself to terminal at 115200 baud rate.
-* Manages watchdog timer started in MCUBootApp as one of confirmation mechanisms.
-* Sets special bit in flash to confirm image is operable (UPGRADE image).
-* Can be built for BOOT slot or UPGRADE slot of bootloader.
+* Blinks red LED with 2 different rates, depending on the image type - BOOT or UPGRADE.
+* Prints debug info and the appplication version to the terminal at baud rate 115200.
+* Manages the watchdog-timer start in MCUBootApp as one of the confirmation mechanisms.
+* Sets a special bit in flash to confirm that the image is operable (UPGRADE image).
+* Can be built for boot slot or UPGRADE slot of the bootloader.
* Can be used to evaluate `swap` and `overwrite only` upgrade modes.
-### Hardware Limitations
+### Hardware limitations
-Since this application is created to demonstrate MCUBoot library features and not as reference examples some considerations are taken.
+This application is created to demonstrate the MCUboot library features.
-1. Port/pin `P5_0` and `P5_1` used to configure serial port for debug prints. These pins are the most commonly used for serial port connection among available Cypress PSoC 6 kits. If you try to use custom hardware with this application - change definitions of `CY_DEBUG_UART_TX` and `CY_DEBUG_UART_RX` in `main.c` of BlinkyApp to port/pin pairs corresponding to your design.
-2. Port `GPIO_PRT13` pin `7U` used to define user connection LED. This pin is the most commonly used for USER_LED connection among available Cypress PSoC 6 kits. If you try to use custom hardware with this application - change definitions of `LED_PORT` and `LED_PIN` in `main.c` of BlinkyApp to port/pin pairs corresponding to your design.
+1. Port/pin `P5_0` and `P5_1` are used to configure a serial port for debug prints. These pins are the most commonly used for serial port connection among available Cypress PSoC™ 6 kits. To use custom hardware with this application, change the definitions of `CY_DEBUG_UART_TX` and `CY_DEBUG_UART_RX` in `main.c` of BlinkyApp to port/pin pairs corresponding to your design.
+2. Port `GPIO_PRT13` pin `7U` is used to define the user connection-LED. This pin is the most commonly used for USER_LED connection among available Cypress PSoC™ 6 kits. To use custom hardware with this application, change the definitions of `LED_PORT` and `LED_PIN` in `main.c` of BlinkyApp to port/pin pairs corresponding to your design.
-### Pre-build Action
+### Pre-build action
-Pre-build action is implemented to define start address and size of flash, as well as RAM start address and size for BlinkyApp.
+Pre-build action is implemented to define the start address and flash size, as well as the RAM start address and BlinkyApp size.
-These values are set by specifing following macros (default values shown):
-`SLOT_SIZE ?= 0x10000` - for slot located in internal flash
-`SLOT_SIZE ?= 0x40200` - for slot located in external flash
+`FLASH_MAP` `make` parameter is used to provide an input file for pre-build action. Refer to `MCUBootApp.md` for details.
-For PSoC 6 2M devices:
-`DEFINES_APP += -DRAM_START=0x08040000`
-`DEFINES_APP += -DRAM_SIZE=0x10000`
+The result of pre-build script is auto-generated `flashmap.mk` file with a set of makefile flags:
-For PSoC 6 1M and 512K devices:
-`DEFINES_APP += -DRAM_START=0x08020000`
-`DEFINES_APP += -DRAM_SIZE=0x10000`
+`PRIMARY_IMG_START` - start address of primary image in flash, this value is defined in the JSON flash map as the `"value"` field of the address section for `"application_#"`.
-For all devices:
-`DEFINES_APP += -DUSER_APP_START=0x10018000`
+`SECONDARY_IMG_START`- start address of secondary image in flash, this value is defined in the JSON flash map as the `"upgrade_address"` field of the `"address"` section for `"application_#"`.
-in `boot/cypress/BlinkyApp.mk`.
+`SLOT_SIZE` - slot size for the primary and the secondary images, this value is taken from `"value"` field of `"size"` section of `"application_#"` from JSON file.
-Pre-build action calls GCC preprocessor which replaces defines to particular values in `BlinkyApp_template.ld`.
+`BOOTLOADER_SIZE` - size of Bootloader application, this value is defined in the JSON flash map as the `"size"` field of the address section for `"bootloader"`.
-**Important**: make sure RAM areas of CM4-based BlinkyApp and CM0p-based MCUBootApp bootloader do not overlap.
+`USE_EXTERNAL_FLASH` - is set to 1 if flash map with `_smif` suffix is chosen.
-Memory (stack) corruption of CM0p application can cause failure if SystemCall-served operations invoked from CM4.
+`USE_XIP` - is set to 1 if the "external_flash" section with "mode": "XIP" is present in the flash map file.
-### Building An Application
+These values are set by specifying the following macros (default values shown):
+`SLOT_SIZE ?= 0x10000` - for slot located in internal flash of PSoC™ 6 chips
+`SLOT_SIZE ?= 0x40200` - for slot located in external flash of PsoC™ 6 kits
+`SLOT_SIZE ?= 0x20000` - for slot located in external flash of CYW20829 kits
-Supported platforms:
+The pre-build action also calls the GCC preprocessor, which replaces the defines to particular values in `BlinkyApp_template.ld`.
+
+**Important (PSoC™ 6)**: ensure that the RAM areas of CM4-based BlinkyApp and CM0p-based MCUBootApp bootloader do not overlap.
+
+Memory (stack) corruption of the CM0p application can cause a failure if SystemCall-served operations were invoked from CM4.
+
+### Building an application
+
+The supported platforms:
* PSOC_062_2M
* PSOC_062_1M
* PSOC_062_512K
+* CYW20829
-Root directory for build is **boot/cypress.**
+The root directory for build is **boot/cypress.**
-**Single image**
+**Single-image**
-The following command will build regular HEX file of a BlinkyApp for primary (BOOT) slot:
+The following command will build BlinkyApp as a regular HEX file for the primary (BOOT) slot to be used in single image case with `swap` upgrade type of Bootloader:
- make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=BOOT
+ make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=BOOT FLASH_MAP=cy_flash_pal/flash_psoc6/flashmap/psoc62_swap_single.json IMG_ID=1
-_Note: HEADER_OFFSET=%SLOT_SIZE%_
+To build an image for the secondary (UPGRADE) slot to be used in single image case with `swap` upgrade type of Bootloader:
-To build image for secondary (UPGRADE) slot to use in `swap` upgrade:
+ make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE FLASH_MAP=cy_flash_pal/flash_psoc6/flashmap/psoc62_swap_single.json IMG_ID=1
- make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE HEADER_OFFSET=0x10000 SWAP_UPGRADE=1
+To build an image for the secondary (UPGRADE) slot to be used in single image case with `overwrite` upgrade type of Bootloader:
-To build image for secondary (UPGRADE) slot to use in `overwrite only` upgrade:
+ make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE FLASH_MAP=cy_flash_pal/flash_psoc6/flashmap/psoc62_overwrite_single.json IMG_ID=1
- make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE HEADER_OFFSET=0x10000 SWAP_UPGRADE=0
+**Multi-image**
-To build image for primary (BOOT) image for custom slot size `0x70000`:
+`BlinkyApp` can be built in multi-image bootloader configuration for PSoC™ 6 chips only.
- make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=BOOT SLOT_SIZE=0x70000
+To obtain the appropriate hex files to use with multi-image MCUBootApp, makefile flag `IMG_ID` is used.
-To build image for secondary (UPGRADE) image for custom slot size `0x70000` to use in `swap` upgrade:
+`IMG_ID` flag value should correspond to `application_#` number of JSON file used for build. For example to build `BlinkyApp` for UPGRADE slot of second image following command is used:
- make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE SLOT_SIZE=0x70000 HEADER_OFFSET=0x70000 SWAP_UPGRADE=1
+ make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE FLASH_MAP=cy_flash_pal/flash_psoc6/flashmap/psoc62_overwrite_single.json IMG_ID=2
-**Multi image**
-
-`BlinkyApp` can be built to use in multi image bootloader configuration.
-
-To obtain appropriate hex files to use with multi image MCUBootApp, makefile flag `HEADER_OFFSET=` can be used.
-
-Example usage:
-
-Considering default config:
-
-* first image BOOT (PRIMARY) slot starts `0x10018000`
-* slot size `0x10000`
-* second image BOOT (PRIMARY) slot starts at `0x10038000`
-
-To obtain appropriate artifact for second image PRIMARY slot run this command:
-
- make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=BOOT HEADER_OFFSET=0x20000
-
-*Note:* only 2 images are supported at the moment.
+When this option is omitted, `IMG_ID=1` is assumed.
**Upgrade mode dependency**
-`MCUBootApp` can upgrade image either by overwriting an image from a secondary slot to a primary slot or by swapping the two images.
+`MCUBootApp` can upgrade an image either by overwriting the image from a secondary slot to a primary slot or by swapping the two images.
-To build `BlinkyApp` for different upgrade mode `SWAP_UPGRADE` flag is used.
+To build `BlinkyApp` for different upgrade mode choose flash map JSON file with the corresponding suffix - either _swap_ or _overwrite_.
-`SWAP_UPGRADE=0` - for overwrite mode.
-`SWAP_UPGRADE=1` - for swap upgrade mode (default).
+**Upgrade image for external memory (PSoC™ 6)**
-**Upgrade image for external memory**
+To prepare MCUBootApp for work with external memory, refer to [ExternalMemory.md](../MCUBootApp/ExternalMemory.md).
-To prepare MCUBootApp for work with external memory refer to `MCUBootApp/ExternalMemory.md`.
+To build a `BlinkyApp` upgrade image for external memory to be used in single image configuration with overwrite upgrade mode, use command:
-To build `BlinkyApp` upgrade image for external memory use command:
+ make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE FLASH_MAP=cy_flash_pal/flash_psoc6/flashmap/psoc62_overwrite_single_smif.json IMG_ID=1
- make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE HEADER_OFFSET=0x7FE8000 ERASED_VALUE=0xff USE_EXTERNAL_FLASH=1
+`ERASED_VALUE` defines the memory cell contents in the erased state. It is `0x00` for PSoC™ 6 internal flash and `0xff` for S25FL512S. For `CYW20289` default value is `0xff` since it only uses an external flash.
-`HEADER_OFFSET` defines the offset from original boot image address. This one in line above suggests secondary slot will start from `0x18000000`, which is a start of external memory related addreses on PSoC 6 devices.
+In multi-image configuration, an upgrade image for the second application is built using command:
-`ERASED_VALUE` defines the memory cell contents in erased state. It is `0x00` for PSoC 6 internal Flash and `0xff` for S25FL512S.
-
-In case of using muti-image configuration, upgrade image for second application can be built using next command:
-
- make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE HEADER_OFFSET=0x8228000 ERASED_VALUE=0xff USE_EXTERNAL_FLASH=1
-
-Note: for S25FL512S block address should be mutiple of 0x40000.
+ make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE FLASH_MAP=cy_flash_pal/flash_psoc6/flashmap/psoc62_overwrite_multi_smif.json IMG_ID=2
**Encrypted upgrade image**
-To prepare MCUBootApp for work with encrypted upgrade image please refer to `MCUBootApp/Readme.md`.
+To prepare MCUBootApp for work with an encrypted upgrade image, refer to [MCUBootApp.md](../MCUBootApp/MCUBootApp.md).
-To obtain encrypted upgrade image of BlinkyApp extra flag ENC_IMG=1 should be passed in command line, for example:
+To obtain an encrypted upgrade image of BlinkyApp, pass extra flag `ENC_IMG=1` in the command line, for example:
- make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE HEADER_OFFSET=0x20000 ENC_IMG=1
+ make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE FLASH_MAP=cy_flash_pal/flash_psoc6/flashmap/psoc62_overwrite_single_smif.json IMG_ID=1 ENC_IMG=1
-This also suggests user already placed corresponing *.pem key in \keys folder. The key variables are defined in root Makefile as SIGN_KEY_FILE and ENC_KEY_FILE
+This also suggests that the user has already placed a corresponding *.pem key in the \keys folder. The key variables are defined in root Makefile as SIGN_KEY_FILE and ENC_KEY_FILE
-### Complete Build Flags Description
-- `BUILDCFG` - configuration type
+Refer to [CYW20829.md](../platforms/CYW20829/CYW20829.md) for details of encrypted image build for the CYW20289 platfrom.
+
+### Complete build flags description
+- `BUILDCFG` - The configuration type
- Release
- Debug
-- `MAKEINFO` - build verbosity level
+- `VERBOSE` - The build verbosity level
- 0 (default) - less build info
- 1 - verbose output of compilation
- `PLATFORM`
- - `PSOC_062_2M` - only supported now
-- `SLOT_SIZE` - size of primary/secondary slot of MCUBootApp this app will be used with
+ - `PSOC_062_2M`
+ - `PSOC_062_1M`
+ - `PSOC_062_512K`
+ - `CYW20289`
+- `SLOT_SIZE` - The size of the primary/secondary slot of MCUBootApp. This app will be used with
- 0x%VALUE%
-- `HEADER_OFFSET` - shift start address of image by value
- - 0 (default) - no offset of output hex file
- - 0x%VALUE% - offset for output hex file
-- `IMG_TYPE` - for which slot of MCUBootApp image is build
- - `BOOT` (default) - build image for primary (BOOT) slot
- - `UPGRADE` - build image for secondary (UPGRADE) slot
-- `SWAP_UPGRADE` - define upgrade mode type on `MCUBootApp` this app will be used with
- - `0` - for overwrite mode.
- - `1` - (default) for swap upgrade mode
-- `ERASED_VALUE` - define memory cell contents in erased state
- - `0x0` - internal memory
- - `0xff` - external memory
-- `TOOLCHAIN_PATH` - path to gcc compiler to use for build
- - Example: TOOLCHAIN_PATH=/home/fw-security/ModusToolbox/tools_2.0/gcc-7.2.1
- - Example: TOOLCHAIN_PATH=C:\gcc
+- `IMG_TYPE` - The slot of MCUBootApp, for which the image is being built.
+ - `BOOT` (default) - A build image for the primary (BOOT) slot.
+ - `UPGRADE` - A build image for the secondary (UPGRADE) slot.
+- `ERASED_VALUE` - Define memory cell contents in the erased state.
+ - `0x0` - Internal memory.
+ - `0xff` - External memory.
+- `TOOLCHAIN_PATH` - The path to the GCC compiler to use for build.
+ - Example: TOOLCHAIN_PATH=/home/user/ModusToolbox/tools_2.4/gcc
+ - Example: TOOLCHAIN_PATH=C:/ModusToolbox/tools_2.4/gcc
-### Post-Build
+Flags set by pre-build action.
-Post build action is executed at compile time for `BlinkyApp`. In case of build for `PSOC_062_2M`, `PSOC_062_1M`, `PSOC_062_512K` platforms it calls `imgtool` from `MCUBoot` scripts and adds signature to compiled image.
+- `USE_OVERWRITE` - Define the Upgrade mode type of `MCUBootApp` to use with this app.
+ - `1` - For Overwrite mode.
+ - `0` - (default) For Swap Upgrade mode.
+- `USE_EXTERNAL_FLASH` - Define support of external flash.
+ - `1` - external flash is present.
+ - `0` - external flash is absent.
+- `USE_XIP` - Define support of eXecute in Place mode.
+ - `0` - Not used
+ - `1` - Used
-Flags passed to `imgtool` for signature are defined in `SIGN_ARGS` variable in BlinkyApp.mk.
+### Post-build
-### How To Program An Application
+The post-build action is executed at the compile time for `BlinkyApp`. For the `PSOC_062_2M`, `PSOC_062_1M`, `PSOC_062_512K` platforms, it calls `imgtool` from `MCUboot` scripts and adds a signature to the compiled image.
-There are couple ways of programming BlinkyApp firmware. Following instructions assume usage of one of Cypress development kits, for example `CY8CPROTO_062_4343W`.
+Flags passed to `imgtool` for a signature are defined in the `SIGN_ARGS` variable in BlinkyApp.mk.
+
+For `CYW20829`, `cysecuretools` is used for the image signing.
+
+### How to program an application
+
+BlinkyApp firmware can be programmed in different ways. The following instructions assume the usage of one of Cypress development kits, for example `CY8CPROTO_062_4343W`.
1. Direct usage of OpenOCD.
-OpenOCD package is supplied with ModusToolbox IDE and can be found in installation folder under `./tools_2.1/openocd`.
+Connect a board to your computer. Switch Kitprog3 to DAP-BULK mode by clicking the `SW3 MODE` button until `LED2 STATUS` constantly shines.
-Open terminal application - and execute following command after substitution `PATH_TO_APPLICATION.hex` and `OPENOCD` paths.
+The OpenOCD package is supplied with ModusToolbox™ IDE and can be found in the ModusToolbox™ installation folder `ModusToolbox/tools_2.4/openocd`.
-Connect a board to your computer. Switch Kitprog3 to DAP-BULK mode by pressing `SW3 MODE` button until `LED2 STATUS` constantly shines.
+Open the terminal application and execute the following command after substitution of the `PATH_TO_APPLICATION.hex` and `OPENOCD` paths:
- export OPENOCD=/Applications/ModusToolbox/tools_2.1/openocd
+ export OPENOCD=/Applications/ModusToolbox/tools_2.4/openocd
${OPENOCD}/bin/openocd -s ${OPENOCD}/scripts \
-f ${OPENOCD}/scripts/interface/kitprog3.cfg \
@@ -197,48 +190,48 @@
Follow [link](https://www.cypress.com/products/psoc-programming-solutions) to download.
-Connect board to your computer. Switch Kitprog3 to DAP-BULK mode by pressing `SW3 MODE` button until `LED2 STATUS` constantly shines. Open `Cypress Programmer` and click `Connect`, then choose hex file: `MCUBootApp.hex` or `BlinkyApp.hex` and click `Program`. Check log to ensure programming success. Reset board.
+Connect the board to your computer. Switch Kitprog3 to DAP-BULK mode by clicking the `SW3 MODE` button until `LED2 STATUS` constantly shines. Open `Cypress Programmer` and click `Connect`, then choose the hex file `MCUBootApp.hex` or `BlinkyApp.hex`, and finally click `Program`. Check the log to ensure that the programming is successful. Reset the board.
3. Using `DAPLINK`.
-Connect board to your computer. Switch embeded Kitprog3 to `DAPLINK` mode by pressing `SW3 MODE` button until `LED2 STATUS` blinks fast and mass storage device appeared in OS. Drag and drop `hex` files you wish to program to `DAPLINK` drive in your OS.
+Connect the board to your computer. Switch embedded Kitprog3 to `DAPLINK` mode by clicking the `SW3 MODE` button until `LED2 STATUS` blinks fast and the USB mass storage device displays in the OS. Drag and drop the `hex` files to be programmed to the `DAPLINK` drive in your OS.
**Hex file names to use for programming**
-`BlinkyApp` always produce build artifacts in 2 separate folders: `BlinkyApp/out/PSOC_062_2M/Debug/boot` and `BlinkyApp/out/PSOC_062_2M/Debug/upgrade`.
+`BlinkyApp` always produces build artifacts in two separate folders: `BlinkyApp/out/PSOC_062_2M/Debug/boot` and `BlinkyApp/out/PSOC_062_2M/Debug/upgrade`.
These files are ready to be flashed to the board:
-* **BlinkyApp.hex** from `boot` folder
-* **BlinkyApp_upgrade.hex** from `upgrade` folder
+* **BlinkyApp.hex** from the `boot` folder
+* **BlinkyApp_upgrade.hex** from the `upgrade` folder
-`BlinkyApp_unsigned.hex` hex file is also preserved in both cases for possible troubleshooting.
+The `BlinkyApp_unsigned.hex` hex file is also preserved in both cases for possible troubleshooting.
-**Important: When swap status upgrade mode used**
+**Important: When Swap status Upgrade mode is used**
- In case of using this application in a system with `swap` type of upgrade refer first to `MCUBootApp.md` section **SWAP/Expected lifecycle**.
+ While using this application in a system with the `swap` type of upgrade, refer first to the [MCUBootApp.md](../MCUBootApp/MCUBootApp.md) section **SWAP/Expected lifecycle**.
-**BlinkyApp.hex** should be programmed to a device once. All firmware upgrades should be delivered using secondary (UPGRADE) slot thus **BlinkyApp_upgrade.hex** image.
+**BlinkyApp.hex** can be programmed to a device once. All firmware upgrades are delivered using the secondary (UPGRADE) slot, thus a **BlinkyApp_upgrade.hex** image.
-If user for some reason tries to program **BlinkyApp.hex** to primary slot directly second time - **system state should be reset**.
+If the user tries to program **BlinkyApp.hex** to the primary slot directly for the second time - **system state should be reset**.
-To reset system state at least `swap status partition` area in flash should be erased - see addresses in `MCUBootApp.md` paragraph **Memory maps**.
+To reset the system state, erase at least the `swap status partition` area in flash - see the addresses in the [MCUBootApp.md](../MCUBootApp/MCUBootApp.md) paragraph **Memory maps**.
-To erase swap status partition area in MCUBootApp with a single image configuration with default memory map using `OpenOCD` execute command:
+To erase the swap status partition area in MCUBootApp with single-image configuration with the default memory map, use the `OpenOCD` command:
$OPENOCD_PATH/bin/openocd -s "$OPENOCD_PATH/scripts" -f "$OPENOCD_PATH/ scripts/interface/kitprog3.cfg" -f "$OPENOCD_PATH/scripts/target/psoc6_2m.cfg" -c "init; reset init" -c "flash erase_address 0x10038000 0x1000" -c "reset; shutdown"
-To erase swap status partition area in MCUBootApp with a multi image configuration with default memory map using `OpenOCD` execute command:
+To erase the swap status partition area in MCUBootApp with multi-image configuration with the default memory map, use the `OpenOCD` command:
$OPENOCD_PATH/bin/openocd -s "$OPENOCD_PATH/scripts" -f "$OPENOCD_PATH/ scripts/interface/kitprog3.cfg" -f "$OPENOCD_PATH/scripts/target/psoc6_2m.cfg" -c "init; reset init" -c "flash erase_address 0x10078000 0x2000" -c "reset; shutdown"
-In both cases it is easier to erase all device flash or all flash after MCUBootApp. This command erases all flash after MCUBootApp including primary, secondary and swap status partiton.
+In both cases, it is easier to erase the whole device flash or all flash after MCUBootApp. This command erases all flash after MCUBootApp, including the primary, secondary, and swap status partiton:
- $OPENOCD_PATH/bin/openocd -s "$OPENOCD_PATH/scripts" -f "$OPENOCD_PATH/ scripts/interface/kitprog3.cfg" -f "$OPENOCD_PATH/scripts/target/psoc6_2m.cfg" -c "init; reset init" -c "flash erase_address 0x10018000" -c "reset; shutdown"
+ $OPENOCD_PATH/bin/openocd -s "$OPENOCD_PATH/scripts" -f "$OPENOCD_PATH/ scripts/interface/kitprog3.cfg" -f "$OPENOCD_PATH/scripts/target/psoc6_2m.cfg" -c "init; reset init" -c "flash erase_address 0x10018000 0x1E8000" -c "reset; shutdown"
-### Example Terminal Output
+### Example terminal output
-When user application programmed in BOOT slot:
+When the user application is programmed in the boot slot:
===========================
[BlinkyApp] BlinkyApp v1.0 [CM4]
@@ -250,7 +243,7 @@
[BlinkyApp] Update watchdog timer started in MCUBootApp to mark sucessful start of user app
[BlinkyApp] Turn off watchdog timer
-When user application programmed in UPRADE slot and upgrade procedure was successful:
+When the user application is programmed in the upgrade slot and the upgrade procedure was successful:
===========================
[BlinkyApp] BlinkyApp v2.0 [+]
diff --git a/boot/cypress/BlinkyApp/BlinkyApp.mk b/boot/cypress/BlinkyApp/BlinkyApp.mk
index edfaed6..d06cd99 100644
--- a/boot/cypress/BlinkyApp/BlinkyApp.mk
+++ b/boot/cypress/BlinkyApp/BlinkyApp.mk
@@ -32,89 +32,21 @@
# - image type to BOOT
COMPILER ?= GCC_ARM
IMG_TYPE ?= BOOT
-
-# For which core this application is built
-CORE ?= CM4
+IMG_ID ?= 1
# image type can be BOOT or UPGRADE
IMG_TYPES = BOOT UPGRADE
-# use SWAP_UPGRADE = 0 for overwrite only mode
-# use SWAP_UPGRADE = 1 for swap upgrade mode
-SWAP_UPGRADE ?= 1
-
-# possible values are 0 and 0xff
-# internal Flash by default
-ERASED_VALUE ?= 0
-
-ifneq ($(COMPILER), GCC_ARM)
-$(error Only GCC ARM is supported at this moment)
-endif
-
CUR_APP_PATH = $(PRJ_DIR)/$(APP_NAME)
-include $(PRJ_DIR)/platforms.mk
-include $(PRJ_DIR)/common_libs.mk
-include $(PRJ_DIR)/toolchains.mk
-
-# Application-specific DEFINES
-ifeq ($(IMG_TYPE), BOOT)
- DEFINES_APP := -DBOOT_IMG
-else
- DEFINES_APP := -DUPGRADE_IMG
- DEFINES_APP += -DSWAP_ENABLED=$(SWAP_UPGRADE)
+ifneq ($(FLASH_MAP), )
+$(CUR_APP_PATH)/flashmap.mk:
+ $(PYTHON_PATH) scripts/flashmap.py -p $(PLATFORM) -i $(FLASH_MAP) -o $(PRJ_DIR)/cy_flash_pal/cy_flash_map.h -d $(IMG_ID) > $(CUR_APP_PATH)/flashmap.mk
+include $(CUR_APP_PATH)/flashmap.mk
+DEFINES_APP := -DCY_FLASH_MAP_JSON
endif
-# Define start of application, RAM start and size, slot size
-ifeq ($(PLATFORM), PSOC_062_2M)
- DEFINES_APP += -DRAM_START=0x08040000
- DEFINES_APP += -DRAM_SIZE=0x10000
-else ifeq ($(PLATFORM), PSOC_062_1M)
- DEFINES_APP += -DRAM_START=0x08020000
- DEFINES_APP += -DRAM_SIZE=0x10000
-else ifeq ($(PLATFORM), PSOC_062_512K)
- DEFINES_APP += -DRAM_START=0x08020000
- DEFINES_APP += -DRAM_SIZE=0x10000
-endif
-ifeq ($(USE_EXTERNAL_FLASH), 1)
-$(warning You are trying to build BlinkyApp for MCUBootApp with external memory support. Ensure you build MCUBootApp with USE_EXTERNAL_FLASH=1 flag!)
- SLOT_SIZE ?= 0x40200
-else
- SLOT_SIZE ?= 0x10000
-endif
-
-DEFINES_APP += -DUSER_APP_SIZE=$(SLOT_SIZE)
-DEFINES_APP += -DUSER_APP_START=0x10018000
-
-# Collect Test Application sources
-SOURCES_APP_SRC := $(wildcard $(CUR_APP_PATH)/*.c)
-# Collect all the sources
-SOURCES_APP += $(SOURCES_APP_SRC)
-
-# Collect includes for BlinkyApp
-INCLUDE_DIRS_APP := $(addprefix -I, $(CURDIR))
-INCLUDE_DIRS_APP += $(addprefix -I, $(CUR_APP_PATH))
-
-# Overwite path to linker script if custom is required, otherwise default from BSP is used
-ifeq ($(COMPILER), GCC_ARM)
-LINKER_SCRIPT := $(subst /cygdrive/c,c:,$(CUR_APP_PATH)/linker/$(APP_NAME).ld)
-else
-$(error Only GCC ARM is supported at this moment)
-endif
-
-ASM_FILES_APP :=
-ASM_FILES_APP += $(ASM_FILES_STARTUP)
-
-# We still need this for MCUBoot apps signing
-IMGTOOL_PATH ?= ../../scripts/imgtool.py
-
-# add flag to imgtool if not using swap for upgrade
-ifeq ($(SWAP_UPGRADE), 0)
-UPGRADE_TYPE := --overwrite-only
-endif
-
-SIGN_ARGS := sign --header-size 1024 --pad-header --align 8 -v "2.0" -S $(SLOT_SIZE) -M 512 $(UPGRADE_TYPE) -R $(ERASED_VALUE) -k keys/$(SIGN_KEY_FILE).pem
-
+# TODO: optimize here and in MCUBootApp.mk
# Output folder
OUT := $(APP_NAME)/out
# Output folder to contain build artifacts
@@ -122,25 +54,201 @@
OUT_CFG := $(OUT_TARGET)/$(BUILDCFG)
+BOOTLOADER_SIZE ?= $(PLATFORM_BOOTLOADER_SIZE)
+
# Set build directory for BOOT and UPGRADE images
ifeq ($(IMG_TYPE), UPGRADE)
- ifeq ($(ENC_IMG), 1)
- SIGN_ARGS += --encrypt ../../$(ENC_KEY_FILE).pem
- SIGN_ARGS += --use-random-iv
- endif
- SIGN_ARGS += --pad
- UPGRADE_SUFFIX :=_upgrade
OUT_CFG := $(OUT_CFG)/upgrade
else
OUT_CFG := $(OUT_CFG)/boot
endif
+# Set parameters needed for signing
+ifeq ($(IMG_TYPE), UPGRADE)
+ UPGRADE_SUFFIX :=_upgrade
+endif
+
+include $(PRJ_DIR)/platforms.mk
+include $(PRJ_DIR)/common_libs.mk
+include $(PRJ_DIR)/toolchains.mk
+
+# use USE_OVERWRITE = 1 for overwrite only mode
+# use USE_OVERWRITE = 0 for swap upgrade mode
+ifeq ($(USE_OVERWRITE), )
+USE_OVERWRITE ?= $(PLATFORM_DEFAULT_USE_OVERWRITE)
+endif
+
+# possible values are 0 and 0xff
+# internal Flash by default
+ifeq ($(ERASED_VALUE), )
+ERASED_VALUE ?= $(PLATFORM_DEFAULT_ERASED_VALUE)
+endif
+
+# Application-specific DEFINES
+ifeq ($(IMG_TYPE), BOOT)
+ DEFINES_APP := -DBOOT_IMAGE
+ ENC_IMG := 0
+else
+ DEFINES_APP := -DUPGRADE_IMAGE
+ DEFINES_APP += -DSWAP_DISABLED=$(USE_OVERWRITE)
+endif
+
+# Inherit platform default values for application start
+# if not set directly as make command argument
+# App start may vary, depending on mode of operation
+# for example in XIP mode image start adress and app start
+# address may be different
+USER_APP_START ?= $(PLATFORM_USER_APP_START)
+
+ifeq ($(USER_APP_RAM_START), )
+USER_APP_RAM_START ?= $(PLATFORM_DEFAULT_RAM_START)
+endif
+ifeq ($(USER_APP_RAM_SIZE), )
+USER_APP_RAM_SIZE ?= $(PLATFORM_DEFAULT_RAM_SIZE)
+endif
+
+DEFINES_APP += -DUSER_APP_RAM_START=$(USER_APP_RAM_START)
+DEFINES_APP += -DUSER_APP_RAM_SIZE=$(USER_APP_RAM_SIZE)
+DEFINES_APP += -DUSER_APP_START=$(USER_APP_START)
+DEFINES_APP += -DPRIMARY_IMG_START=$(PRIMARY_IMG_START)
+DEFINES_APP += -DUSER_APP_SIZE=$(SLOT_SIZE)
+DEFINES_APP += $(PLATFORM_DEFINES_APP)
+
+ifeq ($(USE_XIP), 1)
+DEFINES_APP += -DUSE_XIP
+LD_SUFFIX = _xip
+endif
+
+# Add version metadata to image
+ifneq ($(IMG_VER), )
+IMG_VER_ARG = -v "$(IMG_VER)"
+else
+IMG_VER_ARG = $(PLATFORM_DEFAULT_IMG_VER_ARG)
+$(info WARNING - setting platform default version number, to set custom value - pass IMG_VER=x.x.x argument to make command)
+endif
+
+# Add dependencies metadata to image
+ifneq ($(IMG_DEPS_ID), )
+ifneq ($(IMG_DEPS_VER), )
+IMG_DEPS_ARG = -d "($(IMG_DEPS_ID), $(IMG_DEPS_VER))"
+endif
+endif
+
+# Collect Test Application sources
+SOURCES_APP_SRC := $(wildcard $(CUR_APP_PATH)/*.c)
+
+# Include confirmation flag setting (img_ok) implementation
+ifeq ($(IMG_TYPE), UPGRADE)
+ifeq ($(USE_OVERWRITE), 0)
+SOURCES_APP_SRC += $(PRJ_DIR)/platforms/$(FAMILY)/img_confirm/set_img_ok.c
+endif
+endif
+
+# Set offset for secondary image
+ifeq ($(IMG_TYPE), UPGRADE)
+HEADER_OFFSET := $(SECONDARY_IMG_START)
+else
+HEADER_OFFSET := $(PRIMARY_IMG_START)
+endif
+
+# Collect all the sources
+SOURCES_APP += $(SOURCES_APP_SRC)
+SOURCES_APP += $(PLATFORM_SOURCES_FLASH)
+
+# Collect includes for BlinkyApp
+INCLUDE_DIRS_APP := $(addprefix -I, $(CURDIR))
+INCLUDE_DIRS_APP += $(addprefix -I, $(CUR_APP_PATH))
+INCLUDE_DIRS_APP += $(addprefix -I, $(PLATFORM_INCLUDE_DIRS_FLASH))
+
+# ++++
+INCLUDE_DIRS_APP += $(addprefix -I, $(PRJ_DIR)/MCUBootApp/config)
+INCLUDE_DIRS_APP += $(addprefix -I, $(PRJ_DIR)/MCUBootApp)
+INCLUDE_DIRS_APP += $(addprefix -I, $(PRJ_DIR)/../bootutil/include)
+INCLUDE_DIRS_APP += $(addprefix -I, $(PRJ_DIR)/../bootutil/src)
+INCLUDE_DIRS_APP += $(addprefix -I, $(PRJ_DIR)/../bootutil/include/bootutil)
+# +++
+
+# Overwite path to linker script if custom is required, otherwise default from BSP is used
+ifeq ($(COMPILER), GCC_ARM)
+LINKER_SCRIPT := $(CUR_APP_PATH)/linker/$(APP_NAME).ld
+else
+$(error Only GCC ARM is supported at this moment)
+endif
+
+ASM_FILES_APP :=
+ASM_FILES_APP += $(ASM_FILES_STARTUP)
+
+# add flag to imgtool if not using swap for upgrade
+ifeq ($(USE_OVERWRITE), 1)
+UPGRADE_TYPE := --overwrite-only
+endif
+
+SIGN_ARGS := $(PLATFORM_SIGN_ARGS) $(IMG_VER_ARG) $(IMG_DEPS_ARG)
+
+# Set parameters needed for signing
+ifeq ($(IMG_TYPE), UPGRADE)
+ # Set img_ok flag to trigger swap type permanent
+ ifeq ($(CONFIRM), 1)
+ SIGN_ARGS += --confirm
+ endif
+ SIGN_ARGS += --pad
+endif
+
+$(info $(SIGN_ARGS))
+
pre_build:
$(info [PRE_BUILD] - Generating linker script for application $(CUR_APP_PATH)/linker/$(APP_NAME).ld)
- @$(CC) -E -x c $(CFLAGS) $(INCLUDE_DIRS) $(CUR_APP_PATH)/linker/$(APP_NAME)_template.ld | grep -v '^#' >$(CUR_APP_PATH)/linker/$(APP_NAME).ld
+ @$(CC) -E -x c $(CFLAGS) $(INCLUDE_DIRS) $(CUR_APP_PATH)/linker/$(APP_NAME)_$(CORE)_template$(LD_SUFFIX).ld | grep -v '^#' >$(CUR_APP_PATH)/linker/$(APP_NAME).ld
-# Post build action to execute after main build job
-post_build: $(OUT_CFG)/$(APP_NAME).hex
- $(info [POST_BUILD] - Executing post build script for $(APP_NAME))
- mv -f $(OUT_CFG)/$(APP_NAME).hex $(OUT_CFG)/$(APP_NAME)_unsigned.hex
- $(PYTHON_PATH) $(IMGTOOL_PATH) $(SIGN_ARGS) $(OUT_CFG)/$(APP_NAME)_unsigned.hex $(OUT_CFG)/$(APP_NAME)$(UPGRADE_SUFFIX).hex
+###############################################################################
+# Print debug information about all settings used and/or set in this file
+ifeq ($(VERBOSE), 1)
+$(info #### BlinkyApp.mk ####)
+$(info APP_NAME <-- $(APP_NAME))
+$(info ASM_FILES_APP <-> $(ASM_FILES_APP))
+$(info ASM_FILES_STARTUP <-- $(ASM_FILES_STARTUP))
+$(info BUILDCFG <-- $(BUILDCFG))
+$(info CC <-- $(CC))
+$(info CFLAGS <-- $(CFLAGS))
+$(info COMPILER <-> $(COMPILER))
+$(info CONFIRM <-- $(CONFIRM))
+$(info CORE <-- $(CORE))
+$(info CURDIR <-- $(CURDIR))
+$(info CUR_APP_PATH <-- $(CUR_APP_PATH))
+$(info DEFINES_APP <-> $(DEFINES_APP))
+$(info ENC_IMG --> $(ENC_IMG))
+$(info ERASED_VALUE <-> $(ERASED_VALUE))
+$(info IMG_TYPE <-> $(IMG_TYPE))
+$(info INCLUDE_DIRS <-- $(INCLUDE_DIRS))
+$(info INCLUDE_DIRS_APP <-> $(INCLUDE_DIRS_APP))
+$(info LINKER_SCRIPT <-> $(LINKER_SCRIPT))
+$(info OUT <-> $(OUT))
+$(info OUT_CFG <-> $(OUT_CFG))
+$(info OUT_TARGET <-> $(OUT_TARGET))
+$(info PLATFORM <-- $(PLATFORM))
+$(info PLATFORM_DEFAULT_ERASED_VALUE <-- $(PLATFORM_DEFAULT_ERASED_VALUE))
+$(info PLATFORM_DEFAULT_RAM_SIZE <-- $(PLATFORM_DEFAULT_RAM_SIZE))
+$(info PLATFORM_DEFAULT_RAM_START <-- $(PLATFORM_DEFAULT_RAM_START))
+$(info PLATFORM_DEFAULT_SLOT_SIZE <-- $(PLATFORM_DEFAULT_SLOT_SIZE))
+$(info PLATFORM_DEFAULT_USER_APP_START <-- $(PLATFORM_DEFAULT_USER_APP_START))
+$(info PLATFORM_DEFAULT_PRIMARY_IMG_START <-- $(PLATFORM_DEFAULT_PRIMARY_IMG_START))
+$(info PLATFORM_DEFAULT_USE_OVERWRITE <-- $(PLATFORM_DEFAULT_USE_OVERWRITE))
+$(info PLATFORM_DEFINES_APP <-- $(PLATFORM_DEFINES_APP))
+$(info PLATFORM_INCLUDE_DIRS_FLASH <-- $(PLATFORM_INCLUDE_DIRS_FLASH))
+$(info PLATFORM_SIGN_ARGS <-- $(PLATFORM_SIGN_ARGS))
+$(info PLATFORM_SOURCES_FLASH <-- $(PLATFORM_SOURCES_FLASH))
+$(info PRJ_DIR <-- $(PRJ_DIR))
+$(info IMG_VER_ARG <-- $(IMG_VER_ARG))
+$(info IMG_DEPS_ARG <-- $(IMG_DEPS_ARG))
+$(info SIGN_ARGS <-> $(SIGN_ARGS))
+$(info SLOT_SIZE <-> $(SLOT_SIZE))
+$(info SOURCES_APP <-> $(SOURCES_APP))
+$(info SOURCES_APP_SRC <-> $(SOURCES_APP_SRC))
+$(info UPGRADE_SUFFIX --> $(UPGRADE_SUFFIX))
+$(info UPGRADE_TYPE --> $(UPGRADE_TYPE))
+$(info USER_APP_RAM_SIZE <-> $(USER_APP_RAM_SIZE))
+$(info USER_APP_RAM_START <-> $(USER_APP_RAM_START))
+$(info USER_APP_START <-> $(USER_APP_START))
+$(info PRIMARY_IMG_START <-> $(PRIMARY_IMG_START))
+$(info USE_OVERWRITE <-> $(USE_OVERWRITE))
+endif
diff --git a/boot/cypress/BlinkyApp/BlinkyApp_CM4_Debug.launch b/boot/cypress/BlinkyApp/BlinkyApp_CM4_Debug.launch
deleted file mode 100644
index 34a173b..0000000
--- a/boot/cypress/BlinkyApp/BlinkyApp_CM4_Debug.launch
+++ /dev/null
@@ -1,62 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="false"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="true"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="false"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="true"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${cy_tools_path:openocd}/bin/openocd"/>
-<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-s "${cy_tools_path:openocd}/scripts" -s "${workspace_loc}/BlinkyLED_config/GeneratedSource" -c "source [find interface/kitprog3.cfg]" -c "source [find target/psoc6_2m.cfg]" -c "gdb_port 3332" -c "puts stderr {Started by GNU MCU Eclipse}" -c "init; reset init""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666"/>
-<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value=""/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value="/Users/rnok/repos/cy_mcuboot_project/cy_mcuboot/boot/cypress/BlinkyApp/out/boot/CY8CKIT-064S2-4343W/Debug/BlinkyApp.elf"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="false"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
-<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="false"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value=""/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value="/Users/rnok/repos/cy_mcuboot_project/cy_mcuboot/boot/cypress/BlinkyApp/out/CY8CKIT-064S2-4343W/Debug/boot/BlinkyApp.elf"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
-<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cy_sdk_install_dir}/tools/gcc-7.2.1-1.0/bin/arm-none-eabi-gdb${cy_exe_platform_ext}"/>
-<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
-<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="0"/>
-<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
-<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
-<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="boot/cypress/BlinkyApp/out/PSOC_062_2M/Debug/boot/BlinkyApp.elf"/>
-<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="cy_mcuboot"/>
-<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
-<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="ilg.gnuarmeclipse.managedbuild.cross.toolchain.base.1139973781"/>
-<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
-<listEntry value="/cy_mcuboot"/>
-</listAttribute>
-<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
-<listEntry value="4"/>
-</listAttribute>
-<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="Context string"> <memoryBlockExpression address="268566528" label="0x10020000"/> <memoryBlockExpression address="268632064" label="0x10030000"/> </memoryBlockExpressionList> "/>
-<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
-</launchConfiguration>
diff --git a/boot/cypress/BlinkyApp/libs.mk b/boot/cypress/BlinkyApp/libs.mk
index 6e1ba7a..08fc130 100644
--- a/boot/cypress/BlinkyApp/libs.mk
+++ b/boot/cypress/BlinkyApp/libs.mk
@@ -31,31 +31,59 @@
CUR_LIBS_PATH = $(PRJ_DIR)/libs
# Collect source files for Retarget-io
+ifneq ($(PLATFORM), CYW20829)
SOURCES_RETARGET_IO := $(wildcard $(CUR_LIBS_PATH)/retarget-io/*.c)
+endif
SOURCES_WATCHDOG := $(wildcard $(CUR_LIBS_PATH)/watchdog/*.c)
# Collect source files for HAL
-SOURCES_HAL := $(wildcard $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/*.c)
-SOURCES_HAL += $(wildcard $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/triggers/*.c)
-SOURCES_HAL += $(wildcard $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/pin_packages/*.c)
+ifneq ($(PLATFORM), CYW20829)
+SOURCES_HAL_BLINKY := $(wildcard $(CUR_LIBS_PATH)/mtb-hal-cat1/source/*.c)
+SOURCES_HAL_BLINKY += $(wildcard $(CUR_LIBS_PATH)/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/*.c)
+SOURCES_HAL_BLINKY += $(wildcard $(CUR_LIBS_PATH)/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/*.c)
+endif
# Retarget-io related include directories
INCLUDE_DIRS_RETARGET_IO := $(CUR_LIBS_PATH)/retarget-io
INCLUDE_DIRS_WATCHDOG := $(CUR_LIBS_PATH)/watchdog
# Collect dirrectories containing headers for PSOC6 HAL
-INCLUDE_DIRS_HAL := $(CUR_LIBS_PATH)/psoc6hal/include
-INCLUDE_DIRS_HAL += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include
-INCLUDE_DIRS_HAL += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include/pin_packages
-INCLUDE_DIRS_HAL += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include/triggers
+ifneq ($(PLATFORM), CYW20829)
+INCLUDE_DIRS_HAL_BLINKY := $(CUR_LIBS_PATH)/mtb-hal-cat1/COMPONENT_CAT1A
+INCLUDE_DIRS_HAL_BLINKY := $(CUR_LIBS_PATH)/mtb-hal-cat1/COMPONENT_CAT1A/include
+INCLUDE_DIRS_HAL_BLINKY += $(CUR_LIBS_PATH)/mtb-hal-cat1/include
+INCLUDE_DIRS_HAL_BLINKY += $(CUR_LIBS_PATH)/mtb-hal-cat1/include_pvt
+INCLUDE_DIRS_HAL_BLINKY += $(CUR_LIBS_PATH)/mtb-hal-cat1/COMPONENT_CAT1A/include/pin_packages
+INCLUDE_DIRS_HAL_BLINKY += $(CUR_LIBS_PATH)/mtb-hal-cat1/COMPONENT_CAT1A/include/triggers
+endif
# Collected source files for libraries
-SOURCES_LIBS += $(SOURCES_RETARGET_IO)
SOURCES_LIBS += $(SOURCES_WATCHDOG)
-SOURCES_LIBS += $(SOURCES_HAL)
+ifneq ($(PLATFORM), CYW20829)
+SOURCES_LIBS += $(SOURCES_RETARGET_IO)
+SOURCES_LIBS += $(SOURCES_HAL_BLINKY)
+endif
# Collected include directories for libraries
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_WATCHDOG))
+ifneq ($(PLATFORM), CYW20829)
INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_RETARGET_IO))
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_WATCHDOG))
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_HAL))
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_WATCHDOG))
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_HAL_BLINKY))
+endif
+
+###############################################################################
+# Print debug information about all settings used and/or set in this file
+ifeq ($(VERBOSE), 1)
+$(info #### libs.mk ####)
+$(info CUR_LIBS_PATH <-- $(CUR_LIBS_PATH))
+$(info INCLUDE_DIRS_HAL_BLINKY <-> $(INCLUDE_DIRS_HAL_BLINKY))
+$(info INCLUDE_DIRS_LIBS --> $(INCLUDE_DIRS_LIBS))
+$(info INCLUDE_DIRS_RETARGET_IO <-> $(INCLUDE_DIRS_RETARGET_IO))
+$(info INCLUDE_DIRS_WATCHDOG <-> $(INCLUDE_DIRS_WATCHDOG))
+$(info PLATFORM <-- $(PLATFORM))
+$(info PRJ_DIR <-- $(PRJ_DIR))
+$(info SOURCES_HAL_BLINKY <-> $(SOURCES_HAL_BLINKY))
+$(info SOURCES_LIBS --> $(SOURCES_LIBS))
+$(info SOURCES_RETARGET_IO <-> $(SOURCES_RETARGET_IO))
+$(info SOURCES_WATCHDOG <-> $(SOURCES_WATCHDOG))
+endif
diff --git a/boot/cypress/BlinkyApp/linker/BlinkyApp_CM33_template_xip.ld b/boot/cypress/BlinkyApp/linker/BlinkyApp_CM33_template_xip.ld
new file mode 100644
index 0000000..bf7ea08
--- /dev/null
+++ b/boot/cypress/BlinkyApp/linker/BlinkyApp_CM33_template_xip.ld
@@ -0,0 +1,503 @@
+/***************************************************************************//**
+* \file cyw20829_ns.ld
+* \version 1.0.0
+*
+* Linker file for the GNU C compiler.
+*
+* The main purpose of the linker script is to describe how the sections in the
+* input files should be mapped into the output file, and to control the memory
+* layout of the output file.
+*
+* \note The entry point location is fixed and starts at 0x10000000. The valid
+* application image should be placed there.
+*
+* \note The linker files included with the PDL template projects must be generic
+* and handle all common use cases. Your project may not use every section
+* defined in the linker files. In that case you may see warnings during the
+* build process. In your project, you can simply comment out or remove the
+* relevant code in the linker file.
+*
+********************************************************************************
+* \copyright
+* Copyright 2016-2020 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+GROUP(-lgcc -lc -lnosys )
+SEARCH_DIR(.)
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+ENTRY(Reset_Handler)
+
+/* The size of the stack section at the end of CM4 SRAM */
+STACK_SIZE = 0x1000;
+
+USER_APP_START_ADDR = 0x400 + USER_APP_START_OFF;
+
+FLASH_START_ADDR_SAHB = 0x60000000 + USER_APP_START_ADDR;
+FLASH_START_ADDR_CBUS = 0x08000000 + USER_APP_START_ADDR;
+RAM_START_ADDR_SAHB = 0x20000000;
+RAM_START_ADDR_CBUS = 0x04000000;
+RAM_END_ADDR_SAHB = 0x20020000; /* 128K */
+RAM_END_ADDR_CBUS = 0x04020000; /* 128K */
+FLASH_END_ADDR_SAHB = 0x60080000; /* 512K */
+
+BOOTSTRAP_OFFSET_FLASH = 0x00000050; /* toc2=0x10, l1_desc=0x1C, sign_header=0x20, padding=0x4 (encrypted data should be aligned to 0x10 boundary) */
+BOOTSTRAP_OFFSET_RAM = 0x0001E000; /* was 0x00004000 Modify this value to change the size of Bootstrap code + Data */
+APPCODE_OFFSET_FLASH = 0x00002200;
+
+RAMVECTORS_ALIGNMENT = 512;
+
+/* Memory reserved for Bootstrap code and data */
+BOOTSTRAP_SIZE = RAM_END_ADDR_SAHB - RAM_START_ADDR_SAHB - BOOTSTRAP_OFFSET_RAM; /* 0x00002000 */
+/* vma for bootstrap code region */
+CODE_VMA = RAM_START_ADDR_CBUS + BOOTSTRAP_OFFSET_RAM; /* 0x0401E000 */
+/* lma for bootstrap code region */
+CODE_LMA = FLASH_START_ADDR_SAHB + BOOTSTRAP_OFFSET_FLASH; /* 0x6000004C */
+/* Maximum bootstrap code + data size */
+CODE_BS_SIZE = BOOTSTRAP_SIZE; /* 8KB */
+/* vma for bootstrap data region */
+DATA_BS_VMA = RAM_START_ADDR_SAHB + BOOTSTRAP_OFFSET_RAM; /* 0x2001E000 */
+/* vma for bootstrap and app data region */
+DATA_VMA = RAM_START_ADDR_SAHB; /* 0x20000000 */
+/* vma for appCodeRam region */
+DATA_CBUS_VMA = RAM_START_ADDR_CBUS; /* 0x04000000 */
+/* lma for bootstrap and app data region */
+DATA_LMA = CODE_LMA + CODE_BS_SIZE; /* 0x6000204C */
+/* data size */
+DATA_SIZE = RAM_END_ADDR_SAHB - DATA_VMA - BOOTSTRAP_SIZE; /* 0x1E000 */
+/* vma for application XIP region */
+XIP_VMA = FLASH_START_ADDR_CBUS + APPCODE_OFFSET_FLASH; /* 0x08002200 */
+/* lma for application XIP region */
+XIP_LMA = FLASH_START_ADDR_SAHB + APPCODE_OFFSET_FLASH; /* 0x60002200 */
+/* size of XIP region */
+XIP_SIZE = FLASH_END_ADDR_SAHB - XIP_LMA;
+/* Total size of SRAM */
+RAM_SIZE = RAM_END_ADDR_SAHB - RAM_START_ADDR_SAHB; /* 0x00020000 */
+/* Size of Bootstrap data is kept same as BOOTSTRAP_SIZE */
+DATA_BS_SIZE = BOOTSTRAP_SIZE;
+
+/* Force symbol to be entered in the output file as an undefined symbol. Doing
+* this may, for example, trigger linking of additional modules from standard
+* libraries. You may list several symbols for each EXTERN, and you may use
+* EXTERN multiple times. This command has the same effect as the -u command-line
+* option.
+*/
+EXTERN(Reset_Handler)
+
+/* The MEMORY section below describes the location and size of blocks of memory in the target.
+* Use this section to specify the memory regions available for allocation.
+*/
+MEMORY
+{
+ /* The ram and flash regions control RAM and flash memory allocation for the CM33 core.
+ */
+ code (rx) : ORIGIN = CODE_VMA, LENGTH = CODE_BS_SIZE
+ bsData (rwx) : ORIGIN = DATA_BS_VMA, LENGTH = DATA_BS_SIZE
+ appCodeRam (rx) : ORIGIN = DATA_CBUS_VMA, LENGTH = DATA_SIZE
+ data (rwx) : ORIGIN = DATA_VMA, LENGTH = DATA_SIZE
+ xip (rx) : ORIGIN = XIP_VMA, LENGTH = XIP_SIZE
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ * Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ * __exidx_start
+ * __exidx_end
+ * __copy_table_start__
+ * __copy_table_end__
+ * __zero_table_start__
+ * __zero_table_end__
+ * __etext
+ * __data_start__
+ * __preinit_array_start
+ * __preinit_array_end
+ * __init_array_start
+ * __init_array_end
+ * __fini_array_start
+ * __fini_array_end
+ * __data_end__
+ * __bss_start__
+ * __bss_end__
+ * __end__
+ * end
+ * __HeapLimit
+ * __StackLimit
+ * __StackTop
+ * __stack
+ * __Vectors_End
+ * __Vectors_Size
+ */
+
+SECTIONS
+{
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy RAM_START_ADDR_SAHB (NOLOAD):
+ {
+ KEEP(*(.stack*))
+ } > data
+
+ /* Set stack top beginning of RAM minus the size of stack, and stack limit move down by
+ * size of stack_dummy section */
+ . = ALIGN(32);
+ __StackTop = RAM_START_ADDR_SAHB + STACK_SIZE;
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ . = ALIGN(RAMVECTORS_ALIGNMENT);
+ __ramVectors_vma__ = RAM_START_ADDR_SAHB + STACK_SIZE;
+
+ .ramVectors __ramVectors_vma__ (NOLOAD):
+ {
+ __ram_vectors_start__ = .;
+ KEEP(*(.ram_vectors))
+ . = ALIGN(4);
+ __ram_vectors_end__ = .;
+ } > data
+
+ __appTextRam_vma__ = (__ram_vectors_end__ - RAM_START_ADDR_SAHB) + RAM_START_ADDR_CBUS;
+ __appTextRam_lma__ = (__zero_table_end__ - FLASH_START_ADDR_CBUS) + FLASH_START_ADDR_SAHB;
+ __ezerotable = __zero_table_end__;
+
+ .appTextRam __appTextRam_vma__ : AT (__appTextRam_lma__)
+ {
+ . = ALIGN(4);
+ __app_text_ram_begin__ = .;
+ KEEP(*(.cy_ramfunc*))
+ . = ALIGN(4);
+
+ *cy_smif.o(.text*)
+ *cy_smif_memslot.o(.text*)
+ *cy_smif_sfdp.o(.text*)
+ *cy_gpio.o(.text*)
+ *cy_smif_hybrid_sect.o(.text*)
+
+ . = ALIGN(4);
+ __app_text_ram_end__ = .;
+
+ } > appCodeRam
+
+ __data_vma__ = (__app_text_ram_end__ - RAM_START_ADDR_CBUS) + RAM_START_ADDR_SAHB;
+ __data_lma__ = (__app_text_ram_end__ - __app_text_ram_begin__) + __appTextRam_lma__;
+ __etext = __data_lma__ - FLASH_START_ADDR_SAHB + FLASH_START_ADDR_CBUS;
+
+ .data __data_vma__ : AT (__data_lma__)
+ {
+ __data_start__ = .;
+
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ . = ALIGN(4);
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+
+ . = ALIGN(4);
+ KEEP(*(.cy_l2func*))
+ . = ALIGN(4);
+
+ __data_end__ = .;
+
+ } > data
+
+ /* Check if data is exceeding the flash size */
+ ASSERT((__data_lma__ + (__data_end__ - __data_start__)) <= FLASH_END_ADDR_SAHB, "data section exceeds Flash size !")
+
+ /* Place variables in the section that should not be initialized during the
+ * device startup.
+ */
+ .noinit (NOLOAD) : ALIGN(8)
+ {
+ KEEP(*(.noinit))
+ } > data
+
+ /* The uninitialized global or static variables are placed in this section.
+ *
+ * The NOLOAD attribute tells linker that .bss section does not consume
+ * any space in the image. The NOLOAD attribute changes the .bss type to
+ * NOBITS, and that makes linker to A) not allocate section in memory, and
+ * A) put information to clear the section with all zeros during application
+ * loading.
+ *
+ * Without the NOLOAD attribute, the .bss section might get PROGBITS type.
+ * This makes linker to A) allocate zeroed section in memory, and B) copy
+ * this section to RAM during application loading.
+ */
+ .bss (NOLOAD):
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > data
+
+ /* Use ramining RAM for Heap */
+ __heap_size__ = (RAM_SIZE - ((__bss_end__ - RAM_START_ADDR_SAHB) + (RAM_END_ADDR_CBUS - __bootstrapText_vma__)) - 4);
+
+ .heap (NOLOAD):
+ {
+ . = ALIGN(8);
+ __HeapBase = .;
+ __end1__ = .;
+ end = __end1__;
+ KEEP(*(.heap*))
+ . += __heap_size__;
+ __HeapLimit = .;
+ } > data
+
+ __bootstrapText_vma__ = ORIGIN(code);
+ __bootstrapText_lma__ = CODE_LMA;
+
+ /* Cortex-M33 bootstrap code area */
+ .bootstrapText __bootstrapText_vma__ : AT (__bootstrapText_lma__)
+ {
+ /* Cortex-M33 code vector table */
+ . = ALIGN(4);
+ __bootstrapText_begin = .;
+
+ __Vectors = . ;
+ KEEP(*(.vectors))
+ . = ALIGN(4);
+ __Vectors_End = .;
+ __Vectors_Size = __Vectors_End - __Vectors;
+ __end__ = .;
+
+ . = ALIGN(4);
+
+ /* startup code */
+ *ns_start_cyw20829.o(.text*)
+ *ns_system_cyw20829.o(.text*)
+
+ /* drivers */
+ *cy_device.o(.text*)
+ *cy_btss.o(.text*)
+ *cy_gpio.o(.text*)
+ *cy_sysclk_v2.o(.text*)
+ *cy_syspm_v2.o(.text*)
+ *cy_sysint_v2.o(.text*)
+ *cy_syslib*.o(.text*)
+ *ppu_v1.o(.text*)
+ *cy_mpc.o(.text*)
+ *cy_pd_ppu.o(.text*)
+ *cy_smif.o(.text*)
+ *cy_smif_memslot.o(.text*)
+ *cy_smif_sfdp.o(.text*)
+ *cyhal_system.o(.text*)
+
+ KEEP(*(.cy_l1func*))
+
+ . = ALIGN(4);
+ __bootstrapText_end = .;
+ } > code
+
+ __bootstrap_zerotable_lma__ = (CODE_LMA + (__bootstrapText_end - __bootstrapText_begin));
+
+ .bootstrapzero.table : AT (__bootstrap_zerotable_lma__)
+ {
+ . = ALIGN(4);
+ __bootstrapzero_table_start__ = .;
+ LONG (__bootstrap_bss_start__)
+ LONG ((__bootstrap_bss_end__ - __bootstrap_bss_start__)/4)
+ . = ALIGN(4);
+ __bootstrapzero_table_end__ = .;
+ } > code
+
+ __bootstrapData_vma__ = ((__bootstrapzero_table_end__ - RAM_START_ADDR_CBUS) + RAM_START_ADDR_SAHB);
+ __bootstrapData_lma__ = (__bootstrap_zerotable_lma__ + (__bootstrapzero_table_end__ - __bootstrapzero_table_start__));
+
+ .bootstrapData __bootstrapData_vma__ : AT (__bootstrapData_lma__)
+ {
+ __bootstrapData_start__ = .;
+ . = ALIGN(4);
+
+ /* startup code */
+ *ns_start_cyw20829.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *ns_system_cyw20829.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+
+ /* drivers */
+ *cy_device.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_btss.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_gpio.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_sysclk_v2.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_syspm_v2.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_sysint_v2.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_syslib.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *ppu_v1.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_mpc.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_pd_ppu.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_smif.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_smif_memslot.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_smif_sfdp.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cycfg_qspi_memslot.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cyhal_system.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+
+ KEEP(*(.cy_l1data*))
+
+ . = ALIGN(4);
+
+ __bootstrapData_end__ = .;
+ __bootstrap_size_end__ = .;
+ } > bsData
+
+ .bootstrapBss (NOLOAD):
+ {
+ . = ALIGN(4);
+ __bootstrap_bss_start__ = .;
+
+ /* startup code */
+ *ns_start_cyw20829.o(.bss* COMMON)
+ *ns_system_cyw20829.o(.bss* COMMON)
+
+ /* drivers */
+ *cy_device.o(.bss* COMMON)
+ *cy_btss.o(.bss* COMMON)
+ *cy_gpio.o(.bss* COMMON)
+ *cy_sysclk_v2.o(.bss* COMMON)
+ *cy_syspm_v2.o(.bss* COMMON)
+ *cy_sysint_v2.o(.bss* COMMON)
+ *cy_syslib.o(.bss* COMMON)
+ *ppu_v1.o(.bss* COMMON)
+ *cy_mpc.o(.bss* COMMON)
+ *cy_pd_ppu.o(.bss* COMMON)
+ *cy_smif.o(.bss* COMMON)
+ *cy_smif_memslot.o(.bss* COMMON)
+ *cy_smif_sfdp.o(.bss* COMMON)
+
+ KEEP(*(.cy_l1bss*))
+
+ . = ALIGN(4);
+ __bootstrap_bss_end__ = .;
+ } > bsData
+
+ /* Check if bootstrap code + data exceeds RAM limit */
+ ASSERT(__bootstrap_bss_end__ < RAM_END_ADDR_SAHB, "bootstrap region exceeds RAM size !")
+
+ __app_text_vma__ = ORIGIN(xip);
+ __app_text_lma__ = XIP_LMA;
+
+ /* Cortex-M33 application flash area */
+ .appText (__app_text_vma__) : AT (__app_text_lma__)
+ {
+ /* Cortex-M33 flash vector table */
+ . = ALIGN(4);
+ __text_begin = .;
+
+ *(EXCLUDE_FILE(*cy_gpio.o
+ *cy_smif.o
+ *cy_smif_memslot.o
+ *cy_smif_sfdp.o
+ *cy_smif_hybrid_sect.o) .text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* Read-only code (constants). */
+ *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+
+ KEEP(*(.eh_frame*))
+ . = ALIGN(4);
+ __text_end = .;
+
+ } > xip
+
+
+ .copy.table : AT (__app_text_lma__ + (__text_end - __text_begin))
+ {
+ . = ALIGN(4);
+ __copy_table_start__ = .;
+
+ /* Copy data section to RAM */
+ LONG (__etext) /* From */
+ LONG (__data_start__) /* To */
+ LONG ((__data_end__ - __data_start__)/4) /* Size */
+
+ /* Copy appTextRam section to RAM */
+ LONG (__ezerotable) /* From */
+ LONG (__ram_vectors_end__) /* To */
+ LONG ((__app_text_ram_end__ - __app_text_ram_begin__)/4) /* Size */
+
+ . = ALIGN(4);
+ __copy_table_end__ = .;
+ } > xip
+
+
+
+ .ARM.extab : AT (__app_text_lma__ + (__text_end - __text_begin) + (__copy_table_end__ - __copy_table_start__))
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > xip
+
+ __exidx_start = .;
+
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > xip
+ __exidx_end = .;
+
+
+ /* To clear multiple BSS sections,
+ * uncomment .zero.table section and,
+ * define __STARTUP_CLEAR_BSS_MULTIPLE in CAT1B devices */
+ .zero.table : AT (__exidx_end - __app_text_vma__ + __app_text_lma__)
+ {
+ . = ALIGN(4);
+ __zero_table_start__ = .;
+ LONG (__bss_start__)
+ LONG ((__bss_end__ - __bss_start__)/4)
+
+ . = ALIGN(4);
+ __zero_table_end__ = .;
+ } > xip
+}
+
+/* start of bootstrap code sahb address */
+__bootstrap_start_addr__ = RAM_START_ADDR_SAHB + BOOTSTRAP_OFFSET_RAM;
+/* bootstrap size */
+__bootstrap_size__ = __bootstrap_size_end__ - __bootstrap_start_addr__;
+
diff --git a/boot/cypress/BlinkyApp/linker/BlinkyApp_template.ld b/boot/cypress/BlinkyApp/linker/BlinkyApp_CM4_template.ld
similarity index 76%
rename from boot/cypress/BlinkyApp/linker/BlinkyApp_template.ld
rename to boot/cypress/BlinkyApp/linker/BlinkyApp_CM4_template.ld
index 81fbc22..4324012 100644
--- a/boot/cypress/BlinkyApp/linker/BlinkyApp_template.ld
+++ b/boot/cypress/BlinkyApp/linker/BlinkyApp_CM4_template.ld
@@ -1,6 +1,6 @@
/***************************************************************************//**
-* \file cy8c6xxa_cm4_dual.ld
-* \version 2.60
+* \file cyb06xxa_cm4.ld
+* \version 2.91
*
* Linker file for the GNU C compiler.
*
@@ -8,7 +8,7 @@
* input files should be mapped into the output file, and to control the memory
* layout of the output file.
*
-* \note The entry point location is fixed and starts at 0x10000000. The valid
+* \note The entry point location is fixed and starts at 0x100E0000. The valid
* application image should be placed there.
*
* \note The linker files included with the PDL template projects must be generic
@@ -19,7 +19,7 @@
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2021 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -61,13 +61,8 @@
MEMORY
{
/* The ram and flash regions control RAM and flash memory allocation for the CM4 core.
- * You can change the memory allocation by editing the 'ram' and 'flash' regions.
- * Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use.
- * Using this memory region for other purposes will lead to unexpected behavior.
- * Your changes must be aligned with the corresponding memory regions for CM0+ core in 'xx_cm0plus.ld',
- * where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.ld'.
*/
- ram (rwx) : ORIGIN = RAM_START, LENGTH = RAM_SIZE
+ ram (rwx) : ORIGIN = USER_APP_RAM_START, LENGTH = USER_APP_RAM_SIZE
flash (rx) : ORIGIN = USER_APP_START, LENGTH = USER_APP_SIZE
/* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
@@ -78,13 +73,7 @@
em_eeprom (rx) : ORIGIN = 0x14000000, LENGTH = 0x8000 /* 32 KB */
/* The following regions define device specific memory regions and must not be changed. */
- sflash_user_data (rx) : ORIGIN = 0x16000800, LENGTH = 0x800 /* Supervisory flash: User data */
- sflash_nar (rx) : ORIGIN = 0x16001A00, LENGTH = 0x200 /* Supervisory flash: Normal Access Restrictions (NAR) */
- sflash_public_key (rx) : ORIGIN = 0x16005A00, LENGTH = 0xC00 /* Supervisory flash: Public Key */
- sflash_toc_2 (rx) : ORIGIN = 0x16007C00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 */
- sflash_rtoc_2 (rx) : ORIGIN = 0x16007E00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 Copy */
xip (rx) : ORIGIN = 0x18000000, LENGTH = 0x8000000 /* 128 MB */
- efuse (r) : ORIGIN = 0x90700000, LENGTH = 0x100000 /* 1 MB */
}
/* Library configurations */
@@ -129,6 +118,7 @@
/* Cortex-M4 application flash area */
.text ORIGIN(flash) + BOOT_HEADER_SIZE :
{
+ /* Cortex-M4 flash vector table */
. = ALIGN(4);
__Vectors = . ;
KEEP(*(.vectors))
@@ -223,8 +213,9 @@
} > ram
- .data __ram_vectors_end__ : AT (__etext)
+ .data __ram_vectors_end__ :
{
+ . = ALIGN(4);
__data_start__ = .;
*(vtable)
@@ -258,7 +249,7 @@
__data_end__ = .;
- } > ram
+ } > ram AT>flash
/* Place variables in the section that should not be initialized during the
@@ -338,88 +329,18 @@
} > em_eeprom
- /* Supervisory Flash: User data */
- .cy_sflash_user_data :
- {
- KEEP(*(.cy_sflash_user_data))
- } > sflash_user_data
-
-
- /* Supervisory Flash: Normal Access Restrictions (NAR) */
- .cy_sflash_nar :
- {
- KEEP(*(.cy_sflash_nar))
- } > sflash_nar
-
-
- /* Supervisory Flash: Public Key */
- .cy_sflash_public_key :
- {
- KEEP(*(.cy_sflash_public_key))
- } > sflash_public_key
-
-
- /* Supervisory Flash: Table of Content # 2 */
- .cy_toc_part2 :
- {
- KEEP(*(.cy_toc_part2))
- } > sflash_toc_2
-
-
- /* Supervisory Flash: Table of Content # 2 Copy */
- .cy_rtoc_part2 :
- {
- KEEP(*(.cy_rtoc_part2))
- } > sflash_rtoc_2
-
-
/* Places the code in the Execute in Place (XIP) section. See the smif driver
* documentation for details.
*/
- .cy_xip :
+ cy_xip :
{
+ __cy_xip_start = .;
KEEP(*(.cy_xip))
+ __cy_xip_end = .;
} > xip
- /* eFuse */
- .cy_efuse :
- {
- KEEP(*(.cy_efuse))
- } > efuse
-
-
- /* These sections are used for additional metadata (silicon revision,
- * Silicon/JTAG ID, etc.) storage.
- */
- .cymeta 0x90500000 : { KEEP(*(.cymeta)) } :NONE
}
-/* The following symbols used by the cymcuelftool. */
-/* Flash */
-__cy_memory_0_start = 0x10000000;
-__cy_memory_0_length = 0x00200000;
-__cy_memory_0_row_size = 0x200;
-
-/* Emulated EEPROM Flash area */
-__cy_memory_1_start = 0x14000000;
-__cy_memory_1_length = 0x8000;
-__cy_memory_1_row_size = 0x200;
-
-/* Supervisory Flash */
-__cy_memory_2_start = 0x16000000;
-__cy_memory_2_length = 0x8000;
-__cy_memory_2_row_size = 0x200;
-
-/* XIP */
-__cy_memory_3_start = 0x18000000;
-__cy_memory_3_length = 0x08000000;
-__cy_memory_3_row_size = 0x200;
-
-/* eFuse */
-__cy_memory_4_start = 0x90700000;
-__cy_memory_4_length = 0x100000;
-__cy_memory_4_row_size = 1;
-
/* EOF */
diff --git a/boot/cypress/BlinkyApp/linker/BlinkyApp_template.ld b/boot/cypress/BlinkyApp/linker/BlinkyApp_CM4_template_xip.ld
similarity index 75%
copy from boot/cypress/BlinkyApp/linker/BlinkyApp_template.ld
copy to boot/cypress/BlinkyApp/linker/BlinkyApp_CM4_template_xip.ld
index 81fbc22..55b307a 100644
--- a/boot/cypress/BlinkyApp/linker/BlinkyApp_template.ld
+++ b/boot/cypress/BlinkyApp/linker/BlinkyApp_CM4_template_xip.ld
@@ -1,6 +1,6 @@
/***************************************************************************//**
-* \file cy8c6xxa_cm4_dual.ld
-* \version 2.60
+* \file BlinkyApp.ld
+* \version 2.91
*
* Linker file for the GNU C compiler.
*
@@ -8,7 +8,7 @@
* input files should be mapped into the output file, and to control the memory
* layout of the output file.
*
-* \note The entry point location is fixed and starts at 0x10000000. The valid
+* \note The entry point location is fixed and starts at 0x100E0000. The valid
* application image should be placed there.
*
* \note The linker files included with the PDL template projects must be generic
@@ -19,7 +19,8 @@
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2021 Cypress Semiconductor Corporation
+* Copyright 2022 Infineon Technologies AG
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -43,7 +44,6 @@
/* Size of the stack section at the end of CM4 SRAM */
STACK_SIZE = 0x1000;
-
/* The size of the MCU boot header area at the start of FLASH */
BOOT_HEADER_SIZE = 0x400;
@@ -61,15 +61,11 @@
MEMORY
{
/* The ram and flash regions control RAM and flash memory allocation for the CM4 core.
- * You can change the memory allocation by editing the 'ram' and 'flash' regions.
- * Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use.
- * Using this memory region for other purposes will lead to unexpected behavior.
- * Your changes must be aligned with the corresponding memory regions for CM0+ core in 'xx_cm0plus.ld',
- * where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.ld'.
*/
- ram (rwx) : ORIGIN = RAM_START, LENGTH = RAM_SIZE
+ ram (rwx) : ORIGIN = USER_APP_RAM_START, LENGTH = USER_APP_RAM_SIZE
flash (rx) : ORIGIN = USER_APP_START, LENGTH = USER_APP_SIZE
+ public_ram (rw) : ORIGIN = 0x08000000, LENGTH = 0x800
/* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
* You can assign sections to this memory region for only one of the cores.
* Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
@@ -78,13 +74,7 @@
em_eeprom (rx) : ORIGIN = 0x14000000, LENGTH = 0x8000 /* 32 KB */
/* The following regions define device specific memory regions and must not be changed. */
- sflash_user_data (rx) : ORIGIN = 0x16000800, LENGTH = 0x800 /* Supervisory flash: User data */
- sflash_nar (rx) : ORIGIN = 0x16001A00, LENGTH = 0x200 /* Supervisory flash: Normal Access Restrictions (NAR) */
- sflash_public_key (rx) : ORIGIN = 0x16005A00, LENGTH = 0xC00 /* Supervisory flash: Public Key */
- sflash_toc_2 (rx) : ORIGIN = 0x16007C00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 */
- sflash_rtoc_2 (rx) : ORIGIN = 0x16007E00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 Copy */
xip (rx) : ORIGIN = 0x18000000, LENGTH = 0x8000000 /* 128 MB */
- efuse (r) : ORIGIN = 0x90700000, LENGTH = 0x100000 /* 1 MB */
}
/* Library configurations */
@@ -126,9 +116,11 @@
SECTIONS
{
+
/* Cortex-M4 application flash area */
.text ORIGIN(flash) + BOOT_HEADER_SIZE :
{
+ /* Cortex-M4 flash vector table */
. = ALIGN(4);
__Vectors = . ;
KEEP(*(.vectors))
@@ -136,9 +128,11 @@
__Vectors_End = .;
__Vectors_Size = __Vectors_End - __Vectors;
__end__ = .;
-
. = ALIGN(4);
- *(.text*)
+
+ EXCLUDE_FILE(*cy_smif.o *cy_smif_memslot.o *cy_smif_sfdp.o
+ *cy_sysclk.o *cy_smif_hybrid_sect.o *flash_qspi.o
+ *cy_syslib.o *cy_syslib_gcc.o *system_psoc6_cm4.o) *(.text)
KEEP(*(.init))
KEEP(*(.fini))
@@ -223,8 +217,9 @@
} > ram
- .data __ram_vectors_end__ : AT (__etext)
+ .data __ram_vectors_end__ :
{
+ . = ALIGN(4);
__data_start__ = .;
*(vtable)
@@ -256,9 +251,18 @@
KEEP(*(.cy_ramfunc*))
. = ALIGN(4);
+ *cy_smif.o(.text*)
+ *cy_smif_memslot.o(.text*)
+ *cy_smif_sfdp.o(.text*)
+ *cy_sysclk.o(.text*)
+ *cy_smif_hybrid_sect.o(.text*)
+ *flash_qspi.o(.text*)
+ *cy_syslib.o(.text*)
+ *cy_syslib_gcc.o(.text*)
+
__data_end__ = .;
- } > ram
+ } > ram AT>flash
/* Place variables in the section that should not be initialized during the
@@ -303,6 +307,14 @@
__HeapLimit = .;
} > ram
+ .cy_sharedmem (NOLOAD):
+ {
+ . = ALIGN(4);
+ __public_ram_start__ = .;
+ KEEP(*(.cy_sharedmem))
+ . = ALIGN(4);
+ __public_ram_end__ = .;
+ } > public_ram
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
@@ -338,88 +350,18 @@
} > em_eeprom
- /* Supervisory Flash: User data */
- .cy_sflash_user_data :
- {
- KEEP(*(.cy_sflash_user_data))
- } > sflash_user_data
-
-
- /* Supervisory Flash: Normal Access Restrictions (NAR) */
- .cy_sflash_nar :
- {
- KEEP(*(.cy_sflash_nar))
- } > sflash_nar
-
-
- /* Supervisory Flash: Public Key */
- .cy_sflash_public_key :
- {
- KEEP(*(.cy_sflash_public_key))
- } > sflash_public_key
-
-
- /* Supervisory Flash: Table of Content # 2 */
- .cy_toc_part2 :
- {
- KEEP(*(.cy_toc_part2))
- } > sflash_toc_2
-
-
- /* Supervisory Flash: Table of Content # 2 Copy */
- .cy_rtoc_part2 :
- {
- KEEP(*(.cy_rtoc_part2))
- } > sflash_rtoc_2
-
-
/* Places the code in the Execute in Place (XIP) section. See the smif driver
* documentation for details.
*/
- .cy_xip :
+ cy_xip :
{
+ __cy_xip_start = .;
KEEP(*(.cy_xip))
+ __cy_xip_end = .;
} > xip
- /* eFuse */
- .cy_efuse :
- {
- KEEP(*(.cy_efuse))
- } > efuse
-
-
- /* These sections are used for additional metadata (silicon revision,
- * Silicon/JTAG ID, etc.) storage.
- */
- .cymeta 0x90500000 : { KEEP(*(.cymeta)) } :NONE
}
-/* The following symbols used by the cymcuelftool. */
-/* Flash */
-__cy_memory_0_start = 0x10000000;
-__cy_memory_0_length = 0x00200000;
-__cy_memory_0_row_size = 0x200;
-
-/* Emulated EEPROM Flash area */
-__cy_memory_1_start = 0x14000000;
-__cy_memory_1_length = 0x8000;
-__cy_memory_1_row_size = 0x200;
-
-/* Supervisory Flash */
-__cy_memory_2_start = 0x16000000;
-__cy_memory_2_length = 0x8000;
-__cy_memory_2_row_size = 0x200;
-
-/* XIP */
-__cy_memory_3_start = 0x18000000;
-__cy_memory_3_length = 0x08000000;
-__cy_memory_3_row_size = 0x200;
-
-/* eFuse */
-__cy_memory_4_start = 0x90700000;
-__cy_memory_4_length = 0x100000;
-__cy_memory_4_row_size = 1;
-
/* EOF */
diff --git a/boot/cypress/BlinkyApp/main.c b/boot/cypress/BlinkyApp/main.c
index 1679bf2..59cee6a 100644
--- a/boot/cypress/BlinkyApp/main.c
+++ b/boot/cypress/BlinkyApp/main.c
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2020 Cypress Semiconductor Corporation
+ * Copyright (c) 2021 Infineon Technologies AG
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -21,21 +22,37 @@
* specific language governing permissions and limitations
* under the License.
*/
- /*******************************************************************************/
+#ifdef CYW20829
+#include <inttypes.h>
+#include "cybsp.h"
+#include "cycfg_pins.h"
+#include "cyhal_wdt.h"
+#else
#include "system_psoc6.h"
+#endif /* CYW20829 */
+
#include "cy_pdl.h"
-#include "cyhal.h"
#include "cy_retarget_io.h"
+#include "cyhal.h"
#include "watchdog.h"
-/* Define pins for UART debug output */
+#include "flash_qspi.h"
+#if !(SWAP_DISABLED) && defined(UPGRADE_IMAGE)
+#include "set_img_ok.h"
+#endif
+
+/* Define pins for UART debug output */
+#ifdef CYW20829
+#define CY_DEBUG_UART_TX (CYBSP_DEBUG_UART_TX)
+#define CY_DEBUG_UART_RX (CYBSP_DEBUG_UART_RX)
+#else
#define CY_DEBUG_UART_TX (P5_1)
#define CY_DEBUG_UART_RX (P5_0)
+#endif /* CYW20829 */
#if defined(PSOC_062_2M)
-#warning "Check if User LED is correct for your target board."
#define LED_PORT GPIO_PRT13
#define LED_PIN 7U
#elif defined(PSOC_062_1M)
@@ -44,12 +61,11 @@
#elif defined(PSOC_062_512K)
#define LED_PORT GPIO_PRT11
#define LED_PIN 1U
+#elif defined(CYW20829)
+#define LED_PORT GPIO_PRT0
+#define LED_PIN 0U
#endif
-#define LED_NUM 5U
-#define LED_DRIVEMODE CY_GPIO_DM_STRONG_IN_OFF
-#define LED_INIT_DRIVESTATE 1
-
const cy_stc_gpio_pin_config_t LED_config =
{
.outVal = 1,
@@ -67,53 +83,31 @@
.vohSel = 0UL,
};
-#define WATCHDOG_UPD_MESSAGE "[BlinkyApp] Update watchdog timer started in MCUBootApp to mark successful start of user app\r\n"
-#define WATCHDOG_FREE_MESSAGE "[BlinkyApp] Turn off watchdog timer\r\n"
+uint32_t smif_id = 1; /* Assume SlaveSelect_0 is used for External Memory */
-#ifdef BOOT_IMG
+#ifdef BOOT_IMAGE
#define BLINK_PERIOD (1000u)
#define GREETING_MESSAGE_VER "[BlinkyApp] BlinkyApp v1.0 [CM4]\r\n"
#define GREETING_MESSAGE_INFO "[BlinkyApp] Red led blinks with 1 sec period\r\n"
-#elif defined(UPGRADE_IMG)
+#elif defined(UPGRADE_IMAGE)
#define BLINK_PERIOD (250u)
#define GREETING_MESSAGE_VER "[BlinkyApp] BlinkyApp v2.0 [+]\r\n"
#define GREETING_MESSAGE_INFO "[BlinkyApp] Red led blinks with 0.25 sec period\r\n"
#else
- #error "[BlinkyApp] Please specify type of image: -DBOOT_IMG or -DUPGRADE_IMG\r\n"
+ #error "[BlinkyApp] Please specify type of image: -DBOOT_IMAGE or -DUPGRADE_IMAGE\r\n"
#endif
-void check_result(int res)
+#define WATCHDOG_FREE_MESSAGE "[BlinkyApp] Turn off watchdog timer\r\n"
+
+static void check_result(int res)
{
if (res != CY_RSLT_SUCCESS) {
CY_ASSERT(0);
+ /* Loop forever... */
+ for (;;) {}
}
}
-/*
-* Writes 1 byte `src` into flash memory at `address`
-* It does a sequence of RD/Modify/WR of data in a Flash Row.
- */
-int flash_write_byte(uint32_t address, uint8_t src)
-{
- cy_en_flashdrv_status_t rc = CY_FLASH_DRV_SUCCESS;
- uint32_t row_addr = 0;
- uint8_t row_buff[512];
-
- /* accepting arbitrary address */
- row_addr = (address/CY_FLASH_SIZEOF_ROW)*CY_FLASH_SIZEOF_ROW;
-
- /* preserving Row */
- memcpy(row_buff, (void *)row_addr, sizeof(row_buff));
-
- /* Modifying the target byte */
- row_buff[address%CY_FLASH_SIZEOF_ROW] = src;
-
- /* Programming updated row back */
- rc = Cy_Flash_WriteRow(row_addr, (const uint32_t *)row_buff);
-
- return (int) rc;
-}
-
void test_app_init_hardware(void)
{
/* enable interrupts */
@@ -121,6 +115,7 @@
/* Disabling watchdog so it will not interrupt normal flow later */
Cy_GPIO_Pin_Init(LED_PORT, LED_PIN, &LED_config);
+
/* Initialize retarget-io to use the debug UART port */
check_result(cy_retarget_io_init(CY_DEBUG_UART_TX, CY_DEBUG_UART_RX,
CY_RETARGET_IO_BAUDRATE));
@@ -133,50 +128,63 @@
printf("[BlinkyApp] UART initialized \r\n");
printf("[BlinkyApp] Retarget I/O set to 115200 baudrate \r\n");
+#ifdef CYW20829
+ cy_en_smif_status_t rc = CY_SMIF_CMD_NOT_FOUND;
+
+ rc = qspi_init_sfdp(smif_id);
+ if (CY_SMIF_SUCCESS == rc) {
+ printf("[BlinkyApp] External Memory initialized w/ SFDP. \r\n");
+ }
+ else {
+ printf("[BlinkyApp] External Memory initialization w/ SFDP FAILED: 0x%" PRIx32 " \r\n", (uint32_t)rc);
+ }
+#endif /* CYW20829 */
}
int main(void)
{
uint32_t blinky_period = BLINK_PERIOD;
+#if defined CYW20829
+ cybsp_init();
+#endif /* CYW20829 */
+
test_app_init_hardware();
printf(GREETING_MESSAGE_INFO);
- /* Update watchdog timer to mark successful start up of application */
- printf(WATCHDOG_UPD_MESSAGE);
- cy_wdg_kick();
+ /* Disable watchdog timer to mark successful start up of application.
+ * For PSOC6 WDT is disabled in SystemInit() function.
+ */
printf(WATCHDOG_FREE_MESSAGE);
+#ifdef CYW20829
+ cyhal_wdt_t *cyw20829_wdt = NULL;
+ cyhal_wdt_free(cyw20829_wdt);
+#else
cy_wdg_free();
+#endif /* CYW20829 */
-#if defined(SWAP_ENABLED) && defined(UPGRADE_IMG)
-
- #define USER_SWAP_IMAGE_OK_OFFS (24)
- #define USER_SWAP_IMAGE_OK (1)
- uint32_t img_ok_addr;
- int rc;
+#if !(SWAP_DISABLED) && defined(UPGRADE_IMAGE)
+ int rc = -1;
printf("[BlinkyApp] Try to set img_ok to confirm upgrade image\r\n");
/* Write Image OK flag to the slot trailer, so MCUBoot-loader
- * will not revert new image */
- img_ok_addr = USER_APP_START + USER_APP_SIZE - USER_SWAP_IMAGE_OK_OFFS;
- if (*((uint8_t *)img_ok_addr) != USER_SWAP_IMAGE_OK)
- {
- rc = flash_write_byte(img_ok_addr, USER_SWAP_IMAGE_OK);
- if (0 == rc)
- {
- printf("[BlinkyApp] SWAP Status : Image OK was set at 0x%08lx.\r\n", img_ok_addr);
- }
- else
- {
- printf("[BlinkyApp] SWAP Status : Failed to set Image OK.\r\n");
- }
- } else
- {
+ * will not revert new image
+ */
+ rc = set_img_ok(IMG_OK_ADDR, USER_SWAP_IMAGE_OK);
+
+ if (IMG_OK_ALREADY_SET == rc) {
printf("[BlinkyApp] Img_ok is already set in trailer\r\n");
}
-#endif
+ else if (IMG_OK_SET_SUCCESS == rc) {
+ printf("[BlinkyApp] SWAP Status : Image OK was set at 0x%08x.\r\n", IMG_OK_ADDR);
+ }
+ else {
+ printf("[BlinkyApp] SWAP Status : Failed to set Image OK.\r\n");
+ }
+
+#endif /* !(SWAP_DISABLED) && defined(UPGRADE_IMAGE) */
for (;;)
{
@@ -186,5 +194,6 @@
/* Invert the USER LED state */
Cy_GPIO_Inv(LED_PORT, LED_PIN);
}
+
return 0;
}
diff --git a/boot/cypress/BlinkyApp/set_img_ok.h b/boot/cypress/BlinkyApp/set_img_ok.h
new file mode 100644
index 0000000..68d4ac2
--- /dev/null
+++ b/boot/cypress/BlinkyApp/set_img_ok.h
@@ -0,0 +1,39 @@
+/********************************************************************************
+* Copyright 2021 Infineon Technologies AG
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+********************************************************************************/
+
+#if !defined(SET_IMG_OK_H)
+#define SET_IMG_OK_H
+
+#include "cy_flash.h"
+#include "flash_qspi.h"
+#include "sysflash/sysflash.h"
+#include <string.h>
+
+#define FLASH_ROW_BUF_SZ CY_FLASH_ALIGN
+#define IMG_TRAILER_SZ CY_FLASH_ALIGN
+
+#define USER_SWAP_IMAGE_OK_OFFS (24)
+#define USER_SWAP_IMAGE_OK (1)
+#define IMG_OK_ADDR (PRIMARY_IMG_START + USER_APP_SIZE - USER_SWAP_IMAGE_OK_OFFS)
+
+#define IMG_OK_SET_FAILED -1
+#define IMG_OK_ALREADY_SET 1
+#define IMG_OK_SET_SUCCESS 0
+
+int set_img_ok(uint32_t address, uint8_t value);
+
+#endif /* SET_IMG_OK_H */
\ No newline at end of file