Infineon: Add cyw20829 platform, shared slot feature, json memory map, psoc6 xip
Based in 1.8.0 release of MCUBoot library
This commit adds CYW20829 Infineon platform support with following capabilities:
1. Overwrite and swap upgrade mode support
2. Multi-image with up to 4 images
3. Hardware security counter is supported for CYW20829 platform
Add XIP support for PSOC6 platform - place BOOT slot in external memory and execute it in place using SMIF in XIP mode
and some new features for Infineon devices.
1. Shared upgrade slot feature - use one shared area for upgrade slots of multiple images
2. Memory map defined using JSON file - define memory regions for bootloader and user app in conventional way using JSON file
diff --git a/boot/cypress/MCUBootApp/ExternalMemory.md b/boot/cypress/MCUBootApp/ExternalMemory.md
index ce1cb7e..70f862d 100644
--- a/boot/cypress/MCUBootApp/ExternalMemory.md
+++ b/boot/cypress/MCUBootApp/ExternalMemory.md
@@ -1,88 +1,106 @@
-### External Memory Support For Secondary Slot
+### Support of secondary slot in external memory for PSoC™ 6 devices
+
+* For the CYW20829 external memory support, see the [CYW20829.md](../platforms/CYW20829/CYW20829.md) file.
#### Description
-Given document describes the use of external memory module as a secondary (upgrade) slot with Cypress' PSoC 6 devices.
+This document describes the use of the external memory module as a secondary (upgrade) slot with Cypress PSoC™ 6 devices.
-The demonstration device is `CY8CPROTO-062-4343W` board which is PSoC 6 device with 2M of Flash available, but other kits with 1M (CY8CKIT-062-WIFI-BT) or 512K (CY8CPROTO-062S3-4343W) chips can be used as well.
-The memory module present on boards is S25FL512SAGMFI010 512-Mbit external Quad SPI NOR Flash.
+The demonstration device is the `CY8CPROTO-062-4343W` board, which is a PSoC™ 6 device with 2M-flash, but other kits with 1M (CY8CKIT-062-WIFI-BT) or 512K (CY8CPROTO-062S3-4343W) chips can be used as well.
+The memory module on boards is S25FL512SAGMFI010 512-Mbit external Quad SPI NOR flash.
-Using external memory for secondary slot allows to nearly double the size of Boot Image.
+Using external memory for secondary slots allows nearly doubling the Boot Image size.
-#### Operation Design and Flow
+#### Operation design and flow
-The design is based on using SFDP command's auto-discovery functionality of memory module IC and Cypress' SMIF PDL driver.
+The design is based on using the SFDP command's auto-discovery functionality of memory module IC and Cypress SMIF PDL driver.
-It is assumed that user's design meets following:
-* The memory-module used is SFDP-compliant;
-* There only one module is being used for secondary slot;
-* The address for secondary slot should start from 0x18000000.
-This corresponds to PSoC 6's SMIF (Serial Memory InterFace) IP block mapping.
-* The slot size and start address for upgrade slot meets requirements, when using swap upgrade.
+A user's design example:
+* The memory-module is SFDP-compliant.
+* Only one module is used for the secondary slot.
+* The address for the secondary slot starts from 0x18000000.
+This corresponds to PSoC™ 6 SMIF (Serial Memory InterFace) IP block mapping.
+* The slot size and start address for the upgrade slot meet the requirements, when using swap upgrade.
-The default flash map can be foung in MCUBootApp.md.
+The default flash map can be found in the [MCUBootApp.md](MCUBootApp.md) file.
-MCUBootApp's `main.c` contains the call to Init-SFDP API which performs required GPIO configurations, SMIF IP block configurations, SFDP protocol read and memory-config structure initialization.
+MCUBootApp's `main.c` contains the call to Init-SFDP API, which performs the required GPIO configurations, SMIF IP block configuration, SFDP protocol read and memory-config structure initialization.
-After that MCUBootApp is ready to accept upgrade image from external memory module.
+Now, MCUBootApp is ready to accept an upgrade image from the external memory module.
Upgrades from external memory are supported for both `overwrite only` and `swap with status partition` modes of MCUBootApp.
-##### Requirements to size and start address of upgrade slot when using swap mode.
+##### Requirements to size and start address of upgrade slot when using Swap mode
-Due to mcuboot image structure some restrictions applies when using upgrades from external flash. The main requirement is the following:
+Due to the MCUboot image structure, some restrictions apply when using upgrades from external flash. The main requirement:
-**Trailer portion of UPGRADE image should be possible to erase separately.**
+**The trailer portion of an upgrade image can be erased separately.**
-To achive this requirement image trailer should be placed separately on full flash page, which equls 0x40200 in case of S25FL512SAGMFI010. Considering default slot size for external memory case described in MCUBootApp.md, occupied external flash would look as follows:
+To meet this requirement, the image trailer is placed separately on a full flash page, which equals 0x40200 for S25FL512SAGMFI010.
+Considering the default slot size for the external memory case described in the [MCUBootApp.md](MCUBootApp.md) file, occupied external flash looks as follows:
0x18000000 [xxxxxxxxxxxxxxxx][ttfffffffffffff][fffffffffffffff]
Here:
-`0x18000000` - start address of external memory
-`[xxxxxxxxxxxxxxxx]` - first flash page of minimum erase size 0x40000 occupied by firmware.
-`[tt]` - trailer portion (last 0x200 of image) of upgrade slot placed on separate flash page.
-`[fffff]` - remained portion of flash page, used to store image trailer - this area should not be used for anything else.
+`0x18000000` - The start address of external memory.
+`[xxxxxxxxxxxxxxxx]` - The first flash page of minimum erase size 0x40000 occupied by the firmware.
+`[tt]` - The trailer portion (last 0x200 of image) of the upgrade slot placed on a separate flash page.
+`[fffff]` - The remained portion of the flash page, used to store the image trailer - this area cannot be used for anything else.
-When using slots sizes other, then default `0x40200` described above shoulb be considered.
+When using slots sizes other than default, consider the above-described `0x40200`.
-When slot size does not aligned to `0x40000`, start address of UPGRADE image in external flash should be calculated starting from image trailer location. Consider example below.
+When the slot size is not aligned to `0x40200`, the start address of the upgrade image in the external flash is calculated starting from the image trailer location. Consider the following example:
-Primary slot size required is 590336 bytes (576k + 512b).
+The primary slot size required is 590336 bytes (576k + 512b).
-4 flash pages are required to fit secondary slot (P1-P4):
+Four flash pages are required to fit the secondary slot (P1-P4):
0x1800 0000 - 0x1804 0000 - P1
0x1804 0000 - 0x1808 0000 - P2
0x1808 0000 - 0x180C 0000 - P3
0x1808 0000 - 0x180C 0000 - P4
-Primary slot consist of 512 bytes of image trailer, it goes to P4, 2 full sectors of 256k goes in P3 and P2, reminded 64k is resided in P1.
+The primary slot consists of 512 bytes of the image trailer, it goes to P4, 2 full sectors of 256k goes in P3 and P2, the remainder of 64k is resided in P1.
-Thus start address of secondary slot is: 0x1804 0000 - 0x10000 (64k) = 0x1803 0000. Size occupied is 4 * 256k = 786k
+Thus, the start address of the secondary slot is: 0x1804 0000 - 0x10000 (64k) = 0x1803 0000. The size occupied is 4 * 256k = 786k
-##### How to enable external memory support:
+#### Execute in place (XIP) mode
-1. Pass `USE_EXTERNAL_FLASH=1` flag to `make` command when building MCUBootApp.
-2. Navigate to `cy_flash_map.c` and check if secondary slot start address and size meet the application's needs.
-3. Define which slave select is used for external memory on a board by setting `smif_id` value in `main.c`.
-4. Build MCUBootApp as described in `Readme.md`.
+In the XIP mode firmware image can be placed in the external memory and executed from there directly. This mode is useful for devices with small internal flash or when one wishes to reserve internal flash for other purposes.
-**Note 3**: External memory code is developed basing on PDL and can be run on CM0p core only. It may require modifications if used on CM4.
+On CYW20829 platform XIP mode is always used due to absence of internal memory.
-**How to build upgrade image for external memory:**
+This is optional for PSoC™ 6 devices. The JSON flash map should contain `"mode": "XIP"` in the `"external_flash" section`. `USE_XIP` flag is added to auto-generated `flashmap.mk` on pre-build action.
- make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE HEADER_OFFSET=0x7FE8000 ERASED_VALUE=0xff
+When XIP mode is used primary slot of an image can be placed in external memory.
-`HEADER_OFFSET` defines the offset from original boot image address. This one in line above suggests secondary slot will start from `0x18000000`.
+This repository provides default flash map files with suffix _xip_ to be used for XIP mode in `cy_flash_pal/flash_%platform_name%/flashmap`.
-`ERASED_VALUE` defines the memory cell contents in erased state. It is `0x00` for PSoC 6's internal Flash and `0xff` for S25FL512S.
+#### How to enable external memory support
-**Programming to external memory**
+External memory is enabled when `make` flag `USE_EXTERNAL_FLASH` is set to `1`. Value of this flag is set in auto-generated `flashmap.mk` files when field `"external_flash"` is present in JSON file.
-The MCUBootApp programming can be done similarly to described in `Readme.md`:
+Default flash maps with suffix _smif_ are provided in `cy_flash_pal/flash_psoc6/flashmap` folder for PSoC™ 6 devices, where presense of external memory in system is optional.
- export OPENOCD=/Applications/ModusToolbox/tools_2.1/openocd
+Build MCUBootApp as described in the [MCUBootApp.md](MCUBootApp.md) file.
+
+**Building an upgrade image for external memory:**
+
+ make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE ERASED_VALUE=0xff FLASH_MAP=cy_flash_pal/flash_psoc6/flashmap/psoc62_swap_single_smif.json IMG_ID=1
+
+`ERASED_VALUE` - Defines the memory cell contents in the erased state. It is `0x00` for PSoC™ 6 internal flash and `0xff` for S25FL512S.
+
+**Programming external memory**
+
+Programming tools require configuration of SMIF block to debug/program external memory. When `MCUBootApp` is built with `BUILDCFG=Debug` flag SMIF configuration structures are added to the `MCUBootApp.hex` image. Additional sections:
+
+At SFlash address `0x16000800` address of SMIF configuration structure is placed.
+
+At SFlash address `0x16007c00` updated content of TOC2 structure is placed.
+
+The MCUBootApp can be programmed similarly to described in the [MCUBootApp.md](MCUBootApp.md) file:
+
+ export OPENOCD=/Applications/ModusToolbox/tools_2.4/openocd
${OPENOCD}/bin/openocd -s ${OPENOCD}/scripts \
-f ${OPENOCD}/scripts/interface/kitprog3.cfg \
@@ -91,11 +109,11 @@
-c "init; reset init; program PATH_TO_APPLICATION.hex" \
-c "resume; reset; exit"
-There is a NULL-pointer placed for SMIF configuration pointer in TOC2 (Table Of Contents, `cy_serial_flash_prog.c`).
-This is done to force CY8PROTO-062-4343W DAP Link firmware to program external memory with hardcoded values.
+There is a NULL-pointer placed for the SMIF configuration pointer in TOC2 (Table Of Contents, `cy_serial_flash_prog.c`).
+This is done to force the CY8PROTO-062-4343W DAP Link firmware to program external memory with hardcoded values.
-1. Press SW3 Mode button on a board to switch the board into DAP Link mode.
-2. Once DAP Link removable disk appeared drop (copy) the upgrade image HEX file to it.
-This will invoke firmware to program external memory.
+1. Click the SW3 Mode button on the board to switch the board to DAP Link mode.
+2. Once DAP Link removable disk displays, drop (copy) the upgrade image HEX file to it.
+This will invoke the firmware to program external memory.
-**Note 3:** the programming of external memory is limited to S25FL512S p/n only at this moment.
+**Note :** the programming of external memory is limited to S25FL512S p/n only at this moment.
diff --git a/boot/cypress/MCUBootApp/MCUBootApp.md b/boot/cypress/MCUBootApp/MCUBootApp.md
index f4337c7..d15f667 100644
--- a/boot/cypress/MCUBootApp/MCUBootApp.md
+++ b/boot/cypress/MCUBootApp/MCUBootApp.md
@@ -1,234 +1,430 @@
-## MCUBootApp - demo bootloading application to be used with Cypress targets
+## MCUBootApp - demo bootloading application to use with Cypress targets
-### Solution Description
+### Solution description
-MCUBootApp is created to demonstrate operation of MCUBoot library on Cypress' PSoC 6 device. It supports various operation modes and features of MCUBoot library.
+This solution demonstrates operation of MCUboot on Cypress PSoC™ 6 and CYW20829 devices.
-* single/multi image operation modes
-* overwrite/swap upgrade modes
-* interrupted upgrade recovery for swap upgrades
-* upgrade image confirmation
-* reverting of bad upgrade images
-* secondary slots located in external flash
+* Single-/Multi-image operation modes
+* Overwrite/Swap upgrade modes
+* Interrupted upgrade recovery for swap upgrades
+* Upgrade image confirmation
+* Reverting of bad upgrade images
+* Secondary slots located in external flash
-This demo supports PSoC 6 chips with 1M, 2M and 512K Flash on board.
-Evaluation kits are:
+This demo supports PSoC™ 6 chips with the 1M-, 2M-, and 512K-flash on board, and the CYW20829 chip with no internal flash.
+The evaluation kits are:
* `CY8CPROTO-062-4343W`
* `CY8CKIT-062-WIFI-BT`
-* `CY8CPROTO-062S3-4343W`.
+* `CY8CPROTO-062S3-4343W`
+* `CYW920829M2EVB-01`
-### Memory Maps
+### Platfrom specifics
-MCUBoot terminology assumes a slot from which **boot** is happening to be named **primary**, and a slot where **upgrade** image is placed - **secondary**.
+MCUBootApp can be built for different platforms. So, the main application makefile `MCUBootApp.mk` operates with common build variables and flags. Most of them can be passed to build system as a `make` command parameter and each platform defines the default value prefixed with `PLATFORM_` in the corresponding makefile - `PSOC6.mk` or `CYW20829.mk`. The build flags and variables are described in detail in the following paragraphs.
-#### Internal Flash
+### Memory maps
-The flash map is defined at compile time. It can be configured through makefiles and `MCUBootApp/sysflash/sysflash.h` and `cypress/cy_flash_pal/cy_flash_map.c`.
+The MCUboot terminology names a slot from which **boot** occurs as **primary** and a slot where an **upgrade** image is placed as **secondary**. Some platforms support both internal and external flash, some only external flash.
-The default `MCUBootApp` flash map is defined for demonstration purpose. Sizes of slots are adjusted to be compatible with all supported device families: 1M, 2M and 512K.
+The flash map of bootloader is defined at compile time and cannot be changed dynamically. Flash map is prepared in the industry-accepted JSON (JavaScript Object Notation) format. It should follow the rules described in section **How to modify flash map**.
-Actual addresses provided below are calculated by preprocessor in `sysflash.h` and `cy_flash_map.c` per slot sizes set.
+`MCUBootApp` contains JSON templates for flash maps with commonly used configurations. They can be found in `cy_flash_pal/flash_%platform_name%/flashmap` The slots' sizes are defined per platform to be compatible with all supported device families.
-##### Single Image Mode
+The actual addresses are provided in corresponding platform doc files:
-| Start addr | End addr | Size | Description |
-|------------|------------|---------|-------------------------------------------|
-| 0x10000000 | 0x10018000 | 0x18000 | MCUBootApp (bootloader) area; |
-| 0x10018000 | 0x10028000 | 0x10000 | Primary_1 (BOOT) slot for BlinkyApp; |
-| 0x10028000 | 0x10038000 | 0x10000 | Secondary_1 (UPGRADE) slot for BlinkyApp; |
+- [PSOC6.md](../platforms/PSOC6/PSOC6.md)
+- [CYW20289.md](../platforms/CYW20829/CYW20829.md)
-If upgrade type is swap using scratch:
+#### How to modify flash map
-| Start addr | Size | Description |
-|------------|-----------|---------------------------------|
-| 0x10038000 | 0x1800 | Start of swap status partition; |
-| 0x10039800 | 0x1000 | Start of scratch area partition;|
+When modifying slots sizes, ensure aligning new values with the linker script files for appropriate applications.
-##### Multi Image Mode
+##### Flash map definition
+Flash map describes what flash memory areas are allocated and defines their addresses and sizes. Also, it specifies the type of external flash memory, if applicable.
-| Start addr | End addr | Size | Description |
-|------------|------------|---------|-------------------------------------------|
-| 0x10000000 | 0x10018000 | 0x18000 | MCUBootApp (bootloader) area; |
-| 0x10018000 | 0x10028000 | 0x10000 | Primary_1 (BOOT) slot for BlinkyApp; |
-| 0x10028000 | 0x10038000 | 0x10000 | Secondary_1 (UPGRADE) slot for BlinkyApp; |
-| 0x10038000 | 0x10058000 | 0x20000 | Primary_2 (BOOT) slot of Bootloader |
-| 0x10058000 | 0x10078000 | 0x20000 | Secondary_2 (UPGRADE) slot of Bootloader |
+To build `MCUBootApp` with the given flash map (e.g., `flash_map.json`), supply the following parameter to `make`:
+`FLASH_MAP=flash_map.json`
-If upgrade type swap:
+###### Flash map format
+Flash map must have the `"boot_and_upgrade"` section, define the location of `MCUBootApp` and at least one image. For instance:
+```
+{
+ "boot_and_upgrade": {
+ "bootloader": {
+ "address": {
+ "description": "Address of the bootloader",
+ "value": "0x10000000"
+ },
+ "size": {
+ "description": "Size of the bootloader",
+ "value": "0x18000"
+ }
+ },
+ "application_1": {
+ "address": {
+ "description": "Address of the application primary slot",
+ "value": "0x10018000"
+ },
+ "size": {
+ "description": "Size of the application primary slot",
+ "value": "0x10000"
+ },
+ "upgrade_address": {
+ "description": "Address of the application secondary slot",
+ "value": "0x18030200"
+ },
+ "upgrade_size": {
+ "description": "Size of the application secondary slot",
+ "value": "0x10000"
+ }
+ }
+ }
+}
+```
+Here an application identifier should follow the pattern, i.e., the 2nd image in the multi-image case is `"application_2"`, the 3rd is `"application_3"`, and so on. Up to four applications are supported at this moment.
-| Start addr | Size | Description |
-|------------|-----------|---------------------------------|
-| 0x10078000 | 0x2800 | Start of swap status partition; |
-| 0x1007a800 | 0x1000 | Start of scratch area partition;|
+For each image the location and size of its primary slot is given in the `"address"` and `"size"` parameters. The location and size of the secondary slot is specified in the `"upgrade_address"` and `"upgrade_size"`. All four values described above are mandatory.
-**SWAP upgrade from external memory**
+There also should be a mandatory `"bootloader"` section, describing the location and size of `MCUBootApp` in the `"address"` and `"size"` parameters, respectively.
-When MCUBootApp is configured to support upgrade images places in external memory following fixed addresses are predefined:
+Under some circumstances (e.g., PSoC™ 62 with application slots in both internal and external flash memories), the slot address must be properly aligned, as the image trailer should start exactly at the erase block boundary. When an improper address is specified, `make` will fail with a message like:
+```
+Misaligned application_1 (secondary slot) - suggested address 0x18030200
+```
+This gives the nearest larger address that satisfy the slot location requirements. Other errors, such as overlapping flash areas, are also checked and reported.
-| SMIF base address | Offset | Description |
-|-------------------|-------------|---------------------------------|
-| 0x18000000 | 0x0 | Start of Secondary_1 (UPGRADE) image; |
-| 0x18000000 | 0x240000 | Start of Secondary_2 (UPGRADE) image; |
-| 0x18000000 | 0x440000 | Start of scratch area partition;|
+###### Scratch area
+If there is a scratch area, what is generally true, its location and size is given in the `"scratch_address"` and `"scratch_size"` parameters of the `"bootloader"` subsection. For example:
+```
+{
+ "boot_and_upgrade": {
+ "bootloader": {
+ . . .
+ "scratch_address": {
+ "description": "Address of the scratch area",
+ "value": "0x18440000"
+ },
+ "scratch_size": {
+ "description": "Size of the scratch area",
+ "value": "0x10000"
+ },
+ },
+ . . .
+```
-##### Single Image Mode
+###### Swap status partition
+If the desired upgrade mode is `swap scratch with status partition`, one should define the `"status_address"` and `"status_size"` parameters in the `"bootloader"` subsection, e.g.:
+```
+{
+ "boot_and_upgrade": {
+ "bootloader": {
+ . . .
+ "status_address": {
+ "description": "Address of the swap status partition",
+ "value": "0x10038000"
+ },
+ "status_size": {
+ "description": "Size of the swap status partition",
+ "value": "0x3800"
+ }
+ },
+ . . .
+```
+The required size of the status partition relies on many factors. If an insufficient size is given in the flash map, `make` will fail with a message such as:
+```
+Insufficient swap status area - suggested size 0x3800
+```
+To calculate the minimal correct size of the status partition, one could specify `"value": "0"` for the `"status_size"`. After the intentional `make` failure, copy the correct size from the error message.
-| Start addr | End addr | Size | Description |
-|------------|------------|---------|-------------------------------------------|
-| 0x10000000 | 0x10018000 | 0x18000 | MCUBootApp (bootloader) area; |
-| 0x10018000 | 0x10058200 | 0x40200 | Primary_1 (BOOT) slot for BlinkyApp; |
-| 0x18000000 | 0x18040200 | 0x40200 | Secondary_1 (UPGRADE) slot for BlinkyApp; |
+###### External flash
+If an external flash memory is used, one should specify its parameters. The first way is specyfing the exact model:
+```
+{
+ "external_flash": [
+ {
+ "model": "S25HS256T"
+ }
+ ],
+ "boot_and_upgrade": {
+ . . .
+```
+However, the supported model list is incomplete. The known models are Infineon `S25HS256T`/`S25HS512T`/`S25HS01GT` SEMPER™ NOR Flash ICs, and a couple of SPI Flash ICs from other vendors. Another way is specyfing the important parameters, like:
+```
+{
+ "external_flash": [
+ {
+ "flash-size": "0x100000",
+ "erase-size": "0x1000"
+ }
+ ],
+ "boot_and_upgrade": {
+ . . .
+```
+for a typical 8-Mbit SPI flash with uniform 4-KByte erase blocks. While JSON list syntax is used for the `"external_flash"` section, only single instance is supported at this moment.
-If upgrade type swap:
+If the main application image is located in the external flash, `XIP` (eXecute In Place) mode should be turned on. To do so, supply the corresponding `"mode"` parameter:
+```
+{
+ "external_flash": [
+ {
+ "model": "S25HS256T",
+ "mode": "XIP"
+ }
+ ],
+ . . .
+```
+###### Service RAM Application
+The CYW20829 platform has a hardware-supported security counter. For more details on rollback protection support, refer to the [CYW20289.md](../platforms/CYW20829/CYW20829.md) file.
+The mentioned feature requires a dedicated area in the flash memory to store the Service RAM Application and other required data. The layout of these areas is defined in the `"service_app"` JSON section:
+```
+ . . .
+ "boot_and_upgrade":
+ {
+ "bootloader": {
+ . . .
+ },
+ "service_app": {
+ "address": {
+ "description": "Address of the service application",
+ "value": "0x60070000"
+ },
+ "size": {
+ "description": "Size of the service application",
+ "value": "0x8000"
+ },
+ "params_address": {
+ "description": "Address of the service application input parameters",
+ "value": "0x60078000"
+ },
+ "params_size": {
+ "description": "Size of the service application input parameters",
+ "value": "0x400"
+ },
+ "desc_address": {
+ "description": "Address of the service application descriptor",
+ "value": "0x60078400"
+ },
+ "desc_size": {
+ "description": "Size of the service application descriptor",
+ "value": "0x20"
+ }
+ },
+ "application_1": {
+ . . .
+```
+###### Shared secondary slot
+In the multi-image case, one can reduce the utilization of flash memory by placing secondary images into the same area. This area is reffered to as **Shared secondary slot**. This is especially desirable if there are more than two images.
-| Start addr | Size | Description |
-|------------|-----------|---------------------------------|
-| 0x10058200 | 0x3c00 | Start of swap status partition; |
+Important consideration is that this option assumes updates are performed in sequential manner (consider the Swap upgrade method): place the 1st image into the shared slot, reset to MCUBoot, check the updated image and set the Image OK flag for the 1st image, reset to MCUBoot for permanent swap. Then place the 2nd image into the shared slot, reset to MCUBoot, check the updated image and set the Image OK flag for the 2nd image, reset to MCUBoot for permanent swap, etc.
-##### Multi Image Mode
+Take into account that it is possible to revert only the last updated image, as its previous version resides in the Shared secondary slot. There is no way to revert changes for previous images, as their backups are gone! That is trade-off of the Shared secondary slot.
-| Start addr | End addr | Size | Description |
-|------------|------------|---------|-------------------------------------------|
-| 0x10000000 | 0x10018000 | 0x18000 | MCUBootApp (bootloader) area; |
-| 0x10018000 | 0x10058200 | 0x40200 | Primary_1 (BOOT) slot for BlinkyApp; |
-| 0x10058200 | 0x10098400 | 0x40200 | Primary_2 (BOOT) slot of Bootloader |
-| 0x18000000 | 0x18040200 | 0x40200 | Secondary_1 (UPGRADE) slot for BlinkyApp; |
-| 0x18240000 | 0x18280200 | 0x40200 | Secondary_2 (UPGRADE) slot of Bootloader; |
+Shared secondary slot is rather a virtual concept, we still create individual flash areas for all secondary images. However, this areas are now overlapped (this is prohibited in the standard multi-image scenario). Moreover, special placing of secondary slots is required, as described below. Consider the triple-image example:
+```
+| |---------| |\
+| | | | \
+|---------| | | \
+| | | | \
+| Image 1 | Image 2 |---------| \
+| | | | Shared
+|---------| | | Secondary
+| Trailer | | Image 3 | Slot
+|---------|---------| | /
+| | Trailer | | /
+| |---------|---------| /
+| | | Trailer | /
+| | |---------|/
+```
+The purpose of such layout is to allow MCUBoot to understand what image is placed in the shared secondary slot. While secondary images now can (and should) overlap, their trailers must under no circumstances share the same address!
-If upgrade type is swap using scratch:
+Normally image trailer occupies the whole erase block (e.g. 512 bytes for PSoC™ 62 internal Flash, or 256 kilobytes for SEMPER™ Secure NOR Flash). There is a specific case when images are placed in both memory types, refer to the [PSOC6.md](../platforms/PSOC6/PSOC6.md) file.
-| Start addr | Size | Description |
-|------------|-----------|---------------------------------|
-| 0x10098400 | 0x6400 | Start of swap status partition; |
+One can declare all secondary slots as shared using the following JSON syntax:
+```
+ "boot_and_upgrade": {
+ "bootloader": {
+ . . .
+ "shared_slot": {
+ "description": "Using shared secondary slot",
+ "value": true
+ }
+ },
+```
+Alternatively, this can be done for each application:
+```
+ "boot_and_upgrade": {
+ "bootloader": {
+ . . .
+ },
+ "application_1": {
+ . . .
+ "shared_slot": {
+ "description": "Using shared secondary slot",
+ "value": true
+ }
+ },
+ "application_2": {
+ . . .
+ "shared_slot": {
+ "description": "Using shared secondary slot",
+ "value": true
+ }
+ },
+ . . .
+```
+where `true` marks the shared slot, `false` marks the normal (non-shared) secondary slot. In theory, one can use a separate secondary slot for the 1st image, and shared secondary slot for all other images.
-##### How To Modify Flash Map
+When the `shared_slot` flag is set, different checks are performed at the pre-build stage. For instance, the following error is reported if image trailers appear at the same address:
+```
+Same trailer address for application_3 (secondary slot) and application_2 (secondary slot)
+```
+As mentioned above, shared secondary slot is a virtual concept, so overlapped flash areas are created for each image's secondary slot. No separate flash area is created for the shared slot itself.
-When modifying slots sizes - make sure to align new values with linker script files for appropriate applications.
+**Upgrade process deviations**
-**Option 1**
+Shared slot feature has some differences and limitations in the update algorithm when there is one or more invalid images in primary slots and upgrade of these images is initiated through the shared upgrade slot (so-called **bootstrap** mode of bootloader). In this case, the bootloader allows to update the image even if other images are not valid (unlike the classic multi-image case). Bootloader however does not transfer control to these images until all primary slots become valid. ImageOK flag is set by updated images only after their successful validation and start.
-Navigate to `sysflash.h` and modify slots sizes directly to meet your needs.
+Considering above there is a certain limitation for the shared slot mode. For **swap mode**, an update of valid slots is not possible as long as there is at least one image with an invalid prime slot.
-`CY_BOOT_BOOTLOADER_SIZE` defines size of MCUBootApp.
-`CY_BOOT_IMAGE_1_SIZE` defines slot size for single image case.
-`CY_BOOT_IMAGE_2_SIZE` defines slot size of second image in multi image case.
+Attempting to upgrade a valid primary slot of one image with an invalid primary slot of another image may run a revert procedure the next time the bootloader is started (provided that the data of shared slot has not been changed before). Therefore, for the shared slot, it is recommended to first make all invalid primary slots valid and only then update other images through the shared slot.
-__Option 2.__
+###### JSON syntax rules
+| Group | Item | Description |
+|--------------------|-------------------|----------------------------------------------------------|
+| `external_flash` | `model` | External flash model (if supported), e.g. `S25HS256T` |
+| `external_flash` | `flash-size` | External flash size in bytes (if model is not supported) |
+| `external_flash` | `erase-size` | Erase block size in bytes (if model is not supported) |
+| `external_flash` | `mode` | Set to `XIP` for eXecute In Place |
+| `boot_and_upgrade` | `bootloader` | Contains flash areas used by the `MCUBootApp` |
+| `bootloader` | `address` | Absolute address of the `MCUBootApp` |
+| `bootloader` | `size` | Size of the `MCUBootApp` in bytes |
+| `bootloader` | `scratch_address` | Absolute address of the Scratch Area |
+| `bootloader` | `scratch_size` | Size of the Scratch Area in bytes |
+| `bootloader` | `status_address` | Absolute address of the Swap Status Partition |
+| `bootloader` | `status_size` | Size of the Swap Status Partition in bytes |
+| `bootloader` | `shared_slot` | Marking the shared secondary slot for all images |
+| `boot_and_upgrade` | `service_app` | Reserves flash space for Service RAM Application |
+| `service_app` | `address` | Address of the Service RAM Application |
+| `service_app` | `size` | Size of the Service RAM Application |
+| `service_app` | `params_address` | Address of the input parameters (follows the app) |
+| `service_app` | `params_size` | Size of the service application input parameters |
+| `service_app` | `desc_address` | Address of the app descriptor (follows the parameters) |
+| `service_app` | `desc_size` | Size of the service application descriptor (always 0x20) |
+| `boot_and_upgrade` | `application_1` | Contains flash areas of the 1st application image |
+| `boot_and_upgrade` | `application_2` | 2nd image, see the description of `application_1` |
+| `boot_and_upgrade` | `application_3` | 3rd image, see the description of `application_1` |
+| `boot_and_upgrade` | `application_4` | 4th image, see the description of `application_1` |
+| `application_1` | `address` | Absolute address of the Primary Slot of the 1st image |
+| `application_1` | `size` | Size (in bytes) of the Primary Slot of the 1st image |
+| `application_1` | `upgrade_address` | Absolute address of the Secondary Slot of the 1st image |
+| `application_1` | `upgrade_size` | Size (in bytes) of the Secondary Slot of the 1st image |
+| `application_1` | `shared_slot` | Marking the shared secondary slot for the 1st image |
+| `address` | `value` | Value of the given address (hex or decimal) |
+| `scratch_address` | `value` | Value of the Scratch Area address (hex or decimal) |
+| `status_address` | `value` | Value of the Status Partition address (hex or decimal) |
+| `upgrade_address` | `value` | Value of the Secondary Slot address (hex or decimal) |
+| `size` | `value` | Value of the given size (hex or decimal) |
+| `scratch_size` | `value` | Value of the Scratch Area size (hex or decimal) |
+| `status_size` | `value` | Value of the Status Partition size (hex or decimal) |
+| `upgrade_size` | `value` | Value of the Secondary Slot size (hex or decimal) |
+| `shared_slot` | `value` | Set to `true` for the Shared secondary slot |
-Navigate to `sysflash/sysflash.h` and uncomment `CY_FLASH_MAP_EXT_DESC` definition.
-Now define and initialize `struct flash_area *boot_area_descs[]` in a code with flash memory addresses and sizes you need at the beginning of application, so flash APIs from `cy_flash_pal/cy_flash_map.c` will use it.
+###### Flash map internals
+When the `FLASH_MAP=` option is supplied to `make`, it involves the Python script `boot/cypress/scripts/flashmap.py`. It takes the JSON file and converts flash map into the C header file `boot/cypress/MCUBootApp/cy_flash_pal/cy_flash_map.h`.
-__Note:__ for both options make sure to use correct `MCUBOOT_MAX_IMG_SECTORS`. This should correspond to slot size used. Maximum value of sectors can be set by passing a flag `MAX_IMG_SECTORS=__number__` to `make`. By default it is set to 256 sectors, which corresponds to `0x20000` slot size in multi image use case. Sector size assumed to be 512 bytes, so 128 sectors needed to fill `0x10000`, 256 sectors for `0x20000` and so on.
+At the same time it creates the `boot/cypress/MCUBootApp/flashmap.mk`, which is conditionally included from the `boot/cypress/MCUBootApp/MCUBootApp.mk`. The generated file contains various definitions derived from the flash map, such as `MCUBOOT_IMAGE_NUMBER`, `MAX_IMG_SECTORS`, `USE_EXTERNAL_FLASH`, and `USE_XIP`. So, there is no need to specify these and similar parameters manually.
-###### How To Override The Flash Map Values During Build Process
+Do not edit neither `sysflash/cy_flash_map.h` nor `flashmap.mk`, as both files are overwritten on every build.
-It is possible to override MCUBootApp definitions from build system. Navigate to `MCUBootApp.mk`, find section `DEFINES_APP +=`
-Using this construction macros can be defined and passed to compiler.
+#### External flash
-The full list of macros used to configure the custom multi image case with upgrade from external memory:
+Some Cypress devices, for example `CYW20829`, only have external flash, so all memory areas are located in external flash.
-* MCUBOOT_MAX_IMG_SECTORS
-* CY_FLASH_MAP_EXT_DESC
-* CY_BOOT_SCRATCH_SIZE
-* CY_BOOT_BOOTLOADER_SIZE
-* CY_BOOT_IMAGE_1_SIZE
-* CY_BOOT_IMAGE_2_SIZE
-* CY_BOOT_EXTERNAL_FLASH_SECONDARY_1_OFFSET
-* CY_BOOT_EXTERNAL_FLASH_SECONDARY_2_OFFSET
-* CY_BOOT_EXTERNAL_FLASH_SCRATCH_OFFSET
+Hoewever, PSoC™ 6 chips has internal flash and, additionally, support the external memory connection. Thus, it is possible to place secondary (upgrade) slots in the external memory module and use most of internal flash for the primary image.
+For more details on External Memory usage, refer to the [ExternalMemory.md](ExternalMemory.md) file.
-As an example in a makefile slots sizes redefinition should look like following:
+#### PSoC™ 6 RAM
-`DEFINES_APP +=-DCY_BOOT_EXTERNAL_FLASH_SCRATCH_OFFSET=0x18780000`
-`DEFINES_APP +=-DMCUBOOT_MAX_IMG_SECTORS=168`
-`DEFINES_APP +=-DCY_BOOT_IMAGE_1_SIZE=0x15000`
-`DEFINES_APP +=-DCY_BOOT_IMAGE_2_SIZE=0x15000`
+RAM areas in the MCUBootApp bootloading application and BlinkyApp are defined as an example pair. If your user application requires a different RAM area, ensure that it is not overlapped with the MCUBootApp RAM area. The memory (stack) corruption of the bootloading application can cause a failure if SystemCall-served operations were invoked from the user app.
-#### External Flash
+The MCUBootApp linker script also contains the special section `public_ram`, which serves as a shared RAM area between the CM0p and CM4 cores. When CM4 and CM0p cores perform operations with internal flash, this area is used for the interprocessor data sharing.
-It is also possible to place secondary (upgrade) slots in external memory module and use most of internal for primary image.
-Details about External Memory usage are described in separate guiding document `MCUBootApp/ExternalMemory.md`.
+#### CYW20829 RAM
-#### RAM
+Only one CM33 core is used in the CYW20829 chips, so there are no restrictions for the RAM usage by the layer1 and layer2 applications (i.e. MCUBootApp and BlinkyApp).
-RAM areas in CM0p-based MCUBootApp bootloading application and CM4-based BlinkyApp are defined as an example pair. If your CM4 user application requires different RAM area make sure it is not overlap with MCUBootApp ram area. Memory (stack) corruption of CM0p application can cause failure if SystemCall-served operations invoked from CM4.
+### Hardware cryptography acceleration
-MCUBootApp linker script also contains special section `public_ram`. This section serves for shared ram area between CM0p and CM4 cores. When CM4 and CM0p cores perform operations with internal flash, this area is used for interprocessor connection data sharing.
+Cypress PSoC™ 6 MCU family supports hardware acceleration of the cryptography based on the mbedTLS Library via a shim layer. The implementation of this layer is supplied as the separate submodule `cy-mbedtls-acceleration`. The hardware acceleration of the cryptography shortens the boot time by more than four times compared to the software implementation (observation results).
-### Hardware Cryptography Acceleration
+The CYW20289 chip has hardware acceleration of the SHA256 algorithm only, and in other cases, uses pure software implementation of the cryptography based on MbedTLS.
-Cypress PSoC 6 MCU family supports hardware acceleration of cryptography based on mbedTLS Library via shim layer. Implementation of this layer is supplied as separate submodule `cy-mbedtls-acceleration`. HW acceleration of cryptography shortens boot time in more then 4 times, comparing to software implementation (observation results).
+To enable the hardware acceleration in `MCUBootApp`, pass flag `USE_CRYPTO_HW=1` to `make` during build.
-To enable hardware acceleration in `MCUBootApp` pass flag `USE_CRYPTO_HW=1` to `make` while build.
+The hardware cryptographic acceleration is disabled for all devices at the moment. `USE_CRYPTO_HW` flag is set to 0 by default. This package will be updated in next version.
-Hardware acceleration of cryptography is enabled for PSoC 6 devices by default.
+__NOTE__: Hardware acceleration is not available in current version of mcuboot since `cy-mbedtls-acceleration` does not support `mbedTLS 3.0` yet.
-### Multi Image Mode
+### Multi-image mode
-Multi image operation considers upgrading and verification of more then one image on the device.
+Multi-image operation considers upgrading and verification of more than one image on a device.
-By default MCUBootApp is configured for single image mode. To enable multi image operation pass `MCUBOOT_IMAGE_NUMBER=2` as parameter to `make`.
+Single or multi-image mode is dictated by `MCUBOOT_IMAGE_NUMBER` `make` flag. This flag's value is set in auto-generated `flashmap.mk` file per flash map used. There is no need to pass it manually.
- `MCUBOOT_IMAGE_NUMBER` can also be changed permanently in `MCUBootApp/config/mcuboot_config.h` file. This value can only be set to 2 (only dual-image is supported at the moment).
+In Multi-image operation up to four images are supported.
-In multi image operation (two images are considered for simplicity) MCUBootApp bootloading application operates as following:
+Consider MCUBootApp with 2 images supported. Operation is the following:
-1. Verifies Primary_1 and Primary_2 images;
-2. Verifies Secondary_1 and Secondary_2 images;
-3. Upgrades Secondary to Primary if valid images found;
-4. Boots image from Primary_1 slot only;
-5. Boots Primary_1 only if both - Primary_1 and Primary_2 are present and valid;
+1. Verification of the Secondary_1 and Secondary_2 images.
+2. Upgrades Secondary to Primary if valid images found.
+3. Verification of the Primary_1 and Primary_2 images.
+4. Boots the image from the Primary_1 slot only.
+5. Boots Primary_1 only if both - Primary_1 and Primary_2 are present and valid.
-This ensures two dependent applications can be accepted by device only in case both images are valid.
+This ensures that two dependent applications can be accepted by the device only if both images are valid.
-### Upgrade Modes
+### Upgrade modes
-There are two different types of upgrade process supported by MCUBootApp. In case of `overwrite only` type of upgrade - secondary image is simply copied to primary slot after successful validation. No way to revert upgrade in a case when secondary image is inoperable.
+There are two different types of the upgrade process supported by MCUBootApp. For the `overwrite only` type of upgrade - the secondary image is simply copied to the primary slot after successful validation. No way to revert upgrade if the secondary image is inoperable.
-In case of `swap` upgrade mode - images in primary and secondary slots are swaped. Upgrade can be reverted if secondary image did not confirm its operation.
+For `swap` upgrade mode - images in the primary and secondary slots are swapped. Upgrade can be reverted if the secondary image did not confirm its operation.
-Upgrade mode is the same for all images in multi image mode.
+Upgrade mode is the same for all images in Multi-image mode.
-#### Overwrite Only
+#### Overwrite only
-To build MCUBootApp for overwrite upgrades only `MCUBootApp/config/mcuboot_config/mcuboot_config.h` should contain following define:
+To build MCUBootApp for overwrite upgrades only, `MCUBootApp/config/mcuboot_config/mcuboot_config.h` must contain the following definition:
`#define MCUBOOT_OVERWRITE_ONLY 1`
-This define can also be set in `MCUBootApp/MCUBootApp.mk`:
+This flag's value is set in auto-generated `flashmap.mk` file per flash map used. There is no need to pass it manually.
-`DEFINES_APP +=-DMCUBOOT_OVERWRITE_ONLY=1`
+In Overwrite-only mode, MCUBootApp first checks if any upgrade image is present in the secondary slot(s), then validates the digital signature of the upgrade image in the secondary slot(s). If validation is successful, MCUBootApp starts copying the secondary slot content to the primary slot. After the copy is done, MCUBootApp starts the upgrade image execution from the primary slot.
-In ovewrite only mode MCUBootApp first checks if any upgrade image is present in secondary slot(s), then validates digital signature of upgrade image in secondary slot(s). If validation is successful MCUBootApp starts copying secondary slot content to primary slot. After copy is done MCUBootApp starts upgrade image execution from primary slot.
+If the upgraded application does not work - there is no way to revert back to the previous working version. Only the new upgrade firmware can fix the previous broken upgrade.
-If upgraded application does not work - there is no way no revert back to previous working version. In this case only new upgrade firmware can fix previous broken upgrade.
+#### Swap mode
-#### Swap Mode
-
-There are 2 basic types of swap modes supported in MCUBoot:
-* scratch
-* move
-
-For devices with large minimum erase size like PSoC 6 with 512 bytes and also for configurations which use external flash with even bigger minimum erase size there is an additional option in MCUBoot to use dedicated `status partition` for robust storage of swap related information.
+For devices with a large minimum-erase size like PSoC™ 6 with 512 bytes and also for configurations, which use external flash with an even bigger minimum-erase size, there is an additional option in MCUBoot to use the dedicated `status partition` for robust storage of swap-related information.
##### Why use swap with status partition
-Originally MCUBoot library has been designed with a consideration, that minimum write/erase size of flash would always be 8 bytes or less. This value is critical, because swap algorithms use it to align portions of data that contain swap operation status of each flash sector in slot before writing to flash. Data alignment is also performed before writes of special purpose data to image trailer.
+Originally, the MCUboot library has been designed with a consideration that the minimum write/erase size of flash is always 8 bytes or less. This value is critical, because the swap algorithms use it to align portions of data that contain the swap operation status of each flash sector in a slot before writing to flash. Data alignment is also performed before writes of special-purpose data to the image trailer.
-Writing of flash sector status or image trailer data should be `single cycle` operation to ensure power loss and unpredicted resets robustness of bootloading applications. This requirement eliminates usage of `read-modify-write` type of operations with flash.
+Writing of the flash sector status or image trailer data will be the `single cycle` operation to ensure that the power loss and unpredicted resets robustness of bootloading applications. This requirement eliminates the usage of the `read-modify-write` type of operations with flash.
-`Swap with status partition` is implemented specifically to address devices with large write/erase size. It is based on existing mcuboot swap algorithms, but does not have restriction of 8 bytes alignment. Instead minimum write/erase size can be specified by user and algorithm will calculate sizes of status partition, considering this value. All write/erase operations are aligned to this minimum write/erase size as well.
+`Swap with status partition` is implemented specifically to address devices with a large write/erase size. It is based on existing MCUboot swap algorithms, but does not have restriction of the 8-byte alignment. Instead, the minimum write/erase size can be specified by the user and the algorithm will calculate sizes of the status partition considering this value. All write/erase operations are aligned to this minimum write/erase size as well.
-##### Swap Status Partition Description
+##### Swap status partition description
-The main distinction of `swap with status partition` is that separate flash area (partition) is used to store swap status values and image trailer instead of using free flash area at the end of primary/secondary image slot.
+The main distinction of `swap with status partition` is that a separate flash area (partition) is used to store the swap status values and image trailer instead of using the free flash area at the end of the primary/secondary image slot.
This partition consists of separate areas:
-* area to store swap status values
+* the area to store swap status values
* swap_status_0
* ...
* swap_status_x
-* area to store image trailer data:
+* the area to store image trailer data:
* Encryption key 0
* Encryption key 1
* Swap size
@@ -237,7 +433,7 @@
* Image ok
* Boot image magic
-Principal diagram of status partition:
+The principal diagram of the status partition:
```
+-+-+-+-+-+-+ +-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ \
@@ -278,146 +474,167 @@
```
**Scheme legend:**
-`PRIMARY` and `SECONRADY` are areas in status partition to contain data regarding corresponding slot in mcuboot.
-`D0`, `D1` and `Dx` are duplicates of data described on the left. At least 2 duplicates should be present in system. This duplication is used to eliminate flash wear. Each of `Dx` contains valid data for `current swap step - 1`. Each swap operation for flash sector updates status for this sector in current `Dx` and value on `CNT` inreases. Next operation checks least value of `CNT` in available `Dx`'s, copies there data from `Dx` with `CNT+1` and updates status of current sector. This continues until all sectors in slot are moved and then swaped.
-`CRC` - 4 bytes value - checksum of data contaited in area.
-`CNT` - 4 bytes value.
-`swap_status_0`, `swap_status_1`- one byte values, that contain status for corresponding image sector.
-`swap_status_x` - last sector of `BOOT_MAX_IMAGE_SECTORS`.
-`swap_status_max` - maximum number of sectors that fits in min write/erase size for particular flash hardware. If `swap_status_max` is less then `swap_status_x` additional slice of min write/erase flash area is allocated to store swap status data.
-`Image trailer` - should be at least 64 bytes. Code calculates how many min write/erase sizes need to be allocated to store image trailer data.m.
+`PRIMARY` and `SECONDARY` are areas in the status partition to contain data regarding a corresponding slot in MCUboot.
+`D0`, `D1`, and `Dx` are duplicates of data described on the left. At least 2 duplicates are present in the system. This duplication is used to eliminate flash wear. Each of `Dx` contains valid data for `current swap step - 1`. Each swap operation for the flash sector updates the status for this sector in the current `Dx` and the value on `CNT` increases. The next operation checks the least value of `CNT` in the available `Dx`s, copies the data from `Dx` with `CNT+1` and updates the status of the current sector. This continues until all sectors in the slot are moved and then swapped.
+`CRC` - A 4-byte value - the checksum of data contained in the area.
+`CNT` - A 4-byte value.
+`swap_status_0`, `swap_status_1` - 1-byte values that contain the status for a corresponding image sector.
+`swap_status_x` - The last sector of `BOOT_MAX_IMAGE_SECTORS`.
+`swap_status_max` - The maximum number of sectors that fits in the min write/erase size for particular flash hardware. If `swap_status_max` is less than `swap_status_x`, an additional slice of the min write/erase flash area is allocated to store swap status data.
+`Image trailer` - No less than 64 bytes. The code calculates how many min write/erase sizes to allocate for storing image trailer data.
-**Calculation example for PSoC 6 with minimum write/erase size of 512 bytes is used.**
+**A calculation example for PSoC™ 6 with the minimum write/erase size of 512 bytes.**
-Following considered:
-* Single image case
+The following are considered:
+* Single-image case
* Minimum write/erase size 512 bytes
* PRIMARY/SECONDARY slots size `0x50000`
* BOOT_MAX_IMG_SECTORS 0x50000 / 512 = 640
* Number of duplicates `Dx = 2`
-One slice of `min write/erase` size can store data for maximum number of 500 sectors: 512 - 4 (CRC) - 4 (CNT) - 4 (area magic) = 500. Since BOOT_MAX_IMG_SECTORS is 640 - 2 slices of `min write/erase` is allocated. Total size is 1024 bytes.
-Image trailer data fits in 64 bytes, so one slice of `min write/erase` size is allocated. Total size is 1024 + 512 = 1536 bytes.
-Duplicates number equals 2. Total size is 1536 * 2 = 3072 bytes.
-2 slots are used in particular case PRIMARY and SECONDARY, each needs 3072 bytes to store swap status data. Tolal is 3072 * 2 = 6144 bytes.
+One slice of the `min write/erase` size can store data for the maximum number of 500 sectors: 512 - 4 (CRC) - 4 (CNT) - 4 (area magic) = 500. BOOT_MAX_IMG_SECTORS is 640, so 2 slices of `min write/erase` are allocated. The total size is 1024 bytes.
+Image trailer data fits in 64 bytes, so one slice of the `min write/erase` size is allocated. The total size is 1024 + 512 = 1536 bytes.
+The number of duplicates 2. The total size is 1536 * 2 = 3072 bytes.
+2 slots are used in the particular case PRIMARY and SECONDARY, each needs 3072 bytes to store swap status data. The total is 3072 * 2 = 6144 bytes.
-Swap status partition occupies 6144 bytes of flash area in this case.
+The swap status partition occupies 6144 bytes of the flash area.
**Expected lifecycle**
-Since bootloading application that uses swap using status partition upgrade mode stores system state in separate flash area following product lifecycle is expected:
-`Empty` - Fully erased device
-`Ready` - `Empty` device is programmed with MCUBoot based bootloading application - MCUBootApp in this case.
-`Flashed` - Initial version v1.0 of user applicatio, BlinkyApp is this case, flashed to primary (BOOT) slot.
-`Upgraded` - updated firmware image of user application is delivered to secondary slot (UPGRADE) and bootloading application performs upgrade.
+The bootloading application uses the swap using the status partition, so Upgrade mode stores the system state in a separate flash area and the following product lifecycle is expected:
-It is expected that product stays in `Upgraded` state ultil end of its lifecycle.
+`Empty` - A fully-erased device.
+`Ready` - `Empty` -The device is programmed with the MCUboot-based bootloading application - MCUBootApp in this case.
+`Flashed` - Initial version v1.0 of the user application, BlinkyApp in this case, is flashed to the primary (BOOT) slot.
+`Upgraded` - The updated firmware image of the user application is delivered to the secondary slot (UPGRADE) and the bootloading application performs upgrade.
-In case there is a need to wipe out product and flash new firmware directly to primary (BOOT) slot - device should be transfered to `Empty` or `Ready` state and then walk through all states again.
+It is expected that the product stays in the `Upgraded` state until the end of its lifecycle.
-### Hardware Limitations
+If there is a need to wipe out product and flash new firmware directly to the primary (BOOT) slot, the device is transferred to the `Empty` or `Ready` state and then walks through all the states again.
-Since this application is created to demonstrate MCUBoot library features and not as reference examples some considerations are taken.
+### Hardware limitations
-1. `SCB5` used to configure serial port for debug prints. This is the most commonly used Serial Communication Block number among available Cypress PSoC 6 kits. If you try to use custom hardware with this application - change definition of `CYBSP_UART_HW` in `main.c` of MCUBootApp to SCB* that correspond to your design.
+This application is created to demonstrate the MCUboot library features and not as a reference examples. So, some considerations are taken.
-2. `CY_SMIF_SLAVE_SELECT_0` is used as definition SMIF driver API. This configuration is used on evaluation kit for this example CY8CPROTO-062-4343W. If you try to use custom hardware with this application - change value of `smif_id` in `main.c` of MCUBootApp to value that corresponds to your design.
+1. `SCB5` is used to configure a serial port for debug prints. This is the most commonly used Serial Communication Block number among available Cypress PSoC™ 6 kits. To use custom hardware with this application, set custom `SCB*` and pins in the `cypress/MCUBootApp/custom_debug_uart_cfg.h` file and pass the `USE_CUSTOM_DEBUG_UART=1` parameter to the `make` command upon MCUBootApp build.
-### Downloading Solution's Assets
+The `custom_debug_uart_cfg.h` file description:
-There is a set assets required:
+`CUSTOM_UART_HW` - Sets a custom SCB name used as the debug serial port. (e.g. `SCB1`, `SCB2`, ...)
+`CUSTOM_UART_SCB_NUMBER` - Sets the number of SCB. It is `x` in the custom SCBx, which is set in `CUSTOM_UART_HW`.
+ (e.g. `1` if `CUSTOM_UART_HW` is set to SCB1, `2` if `CUSTOM_UART_HW`is set to SCB2, ...)
+`CUSTOM_UART_PORT` - Sets the GPIO port number whose pins are used as RX and TX of the debug serial port.
+`CUSTOM_UART_RX_PIN` - Sets the pin number in the GPIO port used as RX of the debug serial port.
+`CUSTOM_UART_TX_PIN` - Sets the pin number in the GPIO port used as TX of the debug serial port.
+
+The above-described applies only to the `PSoC™ 062` platform.
+
+2. `CY_SMIF_SLAVE_SELECT_0` is used to define the chip select for the SMIF driver. This configuration is used on the evaluation kit for this example CY8CPROTO-062-4343W. To use custom hardware with this application, change the value of `smif_id` in `main.c` of MCUBootApp to a value that corresponds to your design.
+
+### Downloading solution assets
+
+The required set of assets:
* MCUBooot Library (root repository)
-* PSoC 6 HAL Library (submodule)
-* PSoC 6 Peripheral Drivers Library (PDL) (submodule)
+* HAL Library (submodule)
+* Peripheral Drivers Library (PDL) (submodule)
* mbedTLS Cryptographic Library (submodule)
To get submodules - run the following command:
git submodule update --init --recursive
-### Configuring MCUBootApp Bootloading Application
+### Configuring MCUBootApp bootloading application
-1. Choose upgrade mode:
-
-`SWAP` - this mode is set by default in `MCUBootApp/config/mcuboot_config/mcuboot_config.h`. `MCUBOOT_SWAP_USING_STATUS` preprocessor symbol is defined to enable this mode.
+1. Choose Upgrade mode and number of images.
-`Ovewrite only` - pass `USE_OVERWRITE=1` parameter to `make` for overwrite mode compilation.
-
-2. Change memory map
+`cy_flash_pal/flash_%platform_name%/flashmap` folder contains a set of predefined flash map JSON files with suffixes _overwrite_ or _swap_ for upgrade methods and _single_ or _multi_ for images number in its names. Depending on the file chosen upgrade method and images number is configured:
-Check paragraph **How to modify Flash map** above.
+`USE_OVERWRITE` `make` flag is set to 1 or 0 for `overwrite` or `swap` mode;
+`MCUBOOT_IMAGE_NUMBER` flag is set to number of corresponding `application_#` sections in flash map file.
-3. Enable hardware acceleration of cryptography
+These flags values are set in auto-generated `flashmap.mk` file per flash map used. There is no need to pass them manually.
-Pass `USE_CRYPTO_HW=1` to `make` command. This option is enabled by default.
+2. Enable the hardware acceleration of the cryptography on devices that support this feature.
-4. Change number of images - single or multi image configuration
+Pass `USE_CRYPTO_HW=1` to the `make` command. This option is temporarily disabled by default - see paragraph **Hardware cryptography acceleration**.
+
+Additionally user can configure hardware rollback protection on the supported platforms. To do this flash map file from `cy_flash_pal/flash_%platform_name%/flashmap/hw_rollback_prot` folder should be used.
+
+`USE_HW_ROLLBACK_PROT` `make` flag is set to 1 in auto-generated `flashmap.mk`.
+
+Rollback protection feature is currently supported on CYW20829 devices in Secure mode only.
+
+### Building solution
+
+Folder `boot/cypress` contains make-files infrastructure for building MCUBootApp bootloader applications. Example build commands are provided later in this document for different build configurations.
+
+* Build MCUBootApp in the `Debug` configuration for Single-image mode with swap upgrade.
+
+ make app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug FLASH_MAP=cy_flash_pal/flash_psoc6/flashmap/psoc62_swap_single.json
+
+* Build MCUBootApp in `Release` configuration for Multi-image mode with overwrite update.
+
+ make app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Release FLASH_MAP=cy_flash_pal/flash_psoc6/flashmap/psoc62_overwrite_multi.json
+
+The root directory for build is `boot/cypress`.
+
+### Encrypted image support
+
+To protect firmware content from read, plain binary data can be encrypted. MCUBootApp supports the encrypted image in some implementations, depending on the platform.
+
+On PSoC™ 6, an upgrade image can be encrypted and then programmed to corresponding Secondary slot of MCUBootApp. It is then decrypted and transferred to the primary slot using the preferred upgrade method. For more details on the encrypted image implementation, refer to the [PSOC6.md](../platforms/PSOC6/PSOC6.md) file.
+
+On CYW20829, an encrypted image is supported in both slots. The firmware here is located in external memory, so, the chip's SMIF block encrypted eXecution In Place (XIP) feature is used. Encrypted firmware is placed directly in the primary slot and is decrypted on the fly. The encrypted upgrade image is first validated by MCUBootApp in the secondary slot and then transferred to the primary slot as it is. For more details on the encrypted image implementation, refer to the [CYW20289.md](../platforms/CYW20829/CYW20829.md) file.
+
+### Rollback protection
+
+MCUboot supports the security counter implementation to provide downgrade prevention. This mechanism allows the user to explicitly restrict the possibility to execute/upgrade images whose security counters are less than the current firmware counter. So, it can be guaranteed, that obsolete firmware with possible vulnerabilities can not be executed on the device.
+
+**Currently, only the CYW20829 platform supports the hardware rollback counter protection.**
+For more details on the implementation, refer to the [CYW20289.md](../platforms/CYW20829/CYW20829.md) file.
+
+### Complete build flags and parameters description
-Pass `MCUBOOT_IMAGE_NUMBER=1` for single image configuration
-Pass `MCUBOOT_IMAGE_NUMBER=2` for multi image configuration
+Can be passed to `make` or set in makefiles.
-### Building Solution
+`MCUBOOT_LOG_LEVEL` - Can be set at `MCUBOOT_LOG_LEVEL_DEBUG` to enable the verbose output of MCUBootApp.
+`ENC_IMG` - When set to `1`, enables the encrypted image support in MCUBootApp.
+`APP_DEFAULT_POLICY` - The path to a policy file to use for signing MCUBootApp and user application (BlinkyApp) on the CYW20829 platform.
+`USE_BOOTSTRAP` - When set to `1` and Swap mode is enabled, the application in the secondary slot will overwrite the primary slot, if the primary slot application is invalid.
+`USE_CRYPTO_HW` - When set to `1`, uses the hardware accelerated cryptography on the PSoC™ 6 platform, and SHA-256 HW acceleration for the CYW20289 platform.
+`LSC` - The lifecycle state of the chip. Possible options are `SECURE` and `NORMAL_NO_SECURE` (effective on CYW20829 chip only).
-This folder `boot/cypress` contains make files infrastructure for building MCUBootApp bootloader application. Example build command are provided below for couple different build configurations.
+Set by script in auto-generated makefile file.
-* Build MCUBootApp in `Debug` configuration for single image use case.
+`MCUBOOT_IMAGE_NUMBER` - The number of images to be supported by the current build of MCUBootApp.
+`USE_OVERWRITE` - `0` - Use swap with Scratch upgrade mode, `1` - use Overwrite only upgrade.
+`USE_EXTERNAL_FLASH` - When set to `1`, enables the external memory support on the PSoC™ 6 platform. This value is always set to `1` on CYW20829.
+`USE_HW_ROLLBACK_PROT` - When set to `1`, enables the hardware rollback protection on the CYW20829 platform with Secure mode enabled.
- make app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug MCUBOOT_IMAGE_NUMBER=1
+### Programming solution
-* Build MCUBootApp in `Release` configuration for multi image use case.
+The MCUBootApp firmware can be programmed in different ways.
- make app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Release MCUBOOT_IMAGE_NUMBER=2
+1. The direct usage of OpenOCD.
-Root directory for build is `boot/cypress`.
+The OpenOCD package is supplied with ModusToolbox™ IDE and can be found in installation folder `ModusToolbox/tools_2.4/openocd`.
-### Encrypted Image Support
+Set environment variable `OPENOCD` to the path to the openocd folder in ModusToolbox™. Exact commands for programming images are provided in the corresponding platform readme files.
-To protect user image from unwanted read - Upgrade Image Encryption can be applied. The ECDH/HKDF with EC256 scheme is used in a given solution as well as mbedTLS as a crypto provider.
-
-To enable image encryption support use `ENC_IMG=1` build flag (BlinkyApp should also be built with this flash set 1).
-
-User is also responsible for providing corresponding binary key data in `enc_priv_key[]` (file `\MCUBootApp\keys.c`). The public part will be used by imgtool when signing and encrypting upgrade image. Signing image with encryption is described in `\BlinkyApp\Readme.md`.
-
-After MCUBootApp is built with these settings unencrypted and encrypted images will be accepted in secondary (upgrade) slot.
-
-Example command:
-
- make app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug MCUBOOT_IMAGE_NUMBER=1 ENC_IMG=1
-
-__NOTE__: Debug configuration of MCUBootApp with multi image encrypted upgrades in external flash (built with flags `BUILDCFG=Debug` `MCUBOOT_IMG_NUMBER=2 USE_EXTERNAL_FLASH=1 ENC_IMG=1`) is set to use optimization level `-O2 -g3` to fit into `0x18000` allocated for `MCUBootApp`.
-
-### Programming Solution
-
-There are couple ways of programming MCUBootApp firmware. Following instructions assume usage of one of Cypress development kits `CY8CPROTO_062_4343W`.
-
-1. Direct usage of OpenOCD.
-
-OpenOCD package is supplied with ModuToolbox IDE and can be found in installation folder under `./tools_2.1/openocd`.
-
-Open terminal application - and execute following command after substitution `PATH_TO_APPLICATION.hex` and `OPENOCD` paths.
-
-Connect a board to your computer. Switch Kitprog3 to DAP-BULK mode by pressing `SW3 MODE` button until `LED2 STATUS` constantly shines.
-
- export OPENOCD=/Applications/ModusToolbox/tools_2.1/openocd
-
- ${OPENOCD}/bin/openocd -s ${OPENOCD}/scripts \
- -f ${OPENOCD}/scripts/interface/kitprog3.cfg \
- -f ${OPENOCD}/scripts/target/psoc6_2m.cfg \
- -c "init; reset init; program PATH_TO_APPLICATION.hex" \
- -c "resume; reset; exit"
-
-2. Using GUI tool `Cypress Programmer`
+2. Using the GUI tool `Cypress Programmer`
Follow [link](https://www.cypress.com/products/psoc-programming-solutions) to download.
-Connect board to your computer. Switch Kitprog3 to DAP-BULK mode by pressing `SW3 MODE` button until `LED2 STATUS` constantly shines. Open `Cypress Programmer` and click `Connect`, then choose hex file: `MCUBootApp.hex` or `BlinkyApp.hex` and click `Program`. Check log to ensure programming success. Reset board.
+Connect the board to your computer. Switch Kitprog3 to DAP-BULK mode by clicking the `SW3 MODE` button until `LED2 STATUS` constantly shines. Open `Cypress Programmer` and click `Connect`, then choose hex file: `MCUBootApp.hex` or `BlinkyApp.hex` and click `Program`. Check the log to ensure the programming is successful. Reset the board.
3. Using `DAPLINK`.
-Connect board to your computer. Switch embeded Kitprog3 to `DAPLINK` mode by pressing `SW3 MODE` button until `LED2 STATUS` blinks fast and mass storage device appeared in OS. Drag and drop `hex` files you wish to program to `DAPLINK` drive in your OS.
+This mode is currently supported only on PSoC™ 6 development kits.
-### Build Environment Troubleshooting
+Connect the board to your computer. Switch the embedded Kitprog3 to `DAPLINK` mode by clicking the `SW3 MODE` button until `LED2 STATUS` blinks fast and the mass storage device displays on the OS. Drag and drop `hex` files you wish to program to the `DAPLINK` drive in your OS.
+
+### Build environment troubleshooting
Regular shell/terminal combination on Linux and MacOS.
@@ -426,18 +643,11 @@
* Cygwin
* Msys2
-Also IDE may be used:
-* Eclipse / ModusToolbox ("makefile project from existing source")
+Also, an IDE can be used:
+* Eclipse / ModusToolbox™ ("makefile project from existing source")
-*Make* - make sure it is added to system's `PATH` variable and correct path is first in the list;
+*Make* - ensure that it is added to the system's `PATH` variable and the correct path is the first on the list.
-*Python/Python3* - make sure you have correct path referenced in `PATH`;
+*Python/Python3* - ensure that you have the correct path referenced in `PATH`.
-*Msys2* - to use systems PATH navigate to msys2 folder, open `msys2_shell.cmd`, uncomment set `MSYS2_PATH_TYPE=inherit`, restart MSYS2 shell.
-
-*Cygwin* - add following to build command `CURDIR=pwd | cygpath --mixed -f -` so that build command looks like that:
-
- make app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M CURDIR=`pwd | cygpath --mixed -f -`
-
-This will iherit system's PATH so should find `python3.7` installed in regular way as well as imgtool and its dependencies.
-
+*Msys2* - To use the systems path, navigate to the msys2 folder, open `msys2_shell.cmd`, uncomment set `MSYS2_PATH_TYPE=inherit`, restart the MSYS2 shell. This will inherit the system's path and find `python` installed in the regular way as well as `imgtool` and its dependencies.
diff --git a/boot/cypress/MCUBootApp/MCUBootApp.mk b/boot/cypress/MCUBootApp/MCUBootApp.mk
index 7b9a48a..e6ed9ed 100644
--- a/boot/cypress/MCUBootApp/MCUBootApp.mk
+++ b/boot/cypress/MCUBootApp/MCUBootApp.mk
@@ -25,111 +25,31 @@
include host.mk
+APP_NAME := MCUBootApp
+
# Cypress' MCUBoot Application supports GCC ARM only at this moment
# Set default compiler to GCC if not specified from command line
COMPILER ?= GCC_ARM
-USE_CRYPTO_HW ?= 1
-USE_EXTERNAL_FLASH ?= 0
-USE_OVERWRITE ?= 0
+CUR_APP_PATH = $(PRJ_DIR)/$(APP_NAME)
+
+ifneq ($(FLASH_MAP), )
+$(CUR_APP_PATH)/flashmap.mk:
+ $(PYTHON_PATH) scripts/flashmap.py -p $(PLATFORM) -i $(FLASH_MAP) -o $(PRJ_DIR)/cy_flash_pal/cy_flash_map.h > $(CUR_APP_PATH)/flashmap.mk
+include $(CUR_APP_PATH)/flashmap.mk
+DEFINES_APP := -DCY_FLASH_MAP_JSON
+endif
+
MCUBOOT_IMAGE_NUMBER ?= 1
ENC_IMG ?= 0
-
-# For which core this application is built
-CORE ?= CM0P
+USE_BOOTSTRAP ?= 1
+MCUBOOT_LOG_LEVEL ?= MCUBOOT_LOG_LEVEL_DEBUG
+USE_SHARED_SLOT ?= 0
ifneq ($(COMPILER), GCC_ARM)
$(error Only GCC ARM is supported at this moment)
endif
-CUR_APP_PATH = $(PRJ_DIR)/$(APP_NAME)
-
-include $(PRJ_DIR)/platforms.mk
-include $(PRJ_DIR)/common_libs.mk
-include $(PRJ_DIR)/toolchains.mk
-
-# default slot size is 0x10000 for single image
-# larger slot size is 0x20000 for multi image, 512bytes per row/sector, so 256 sectors will work for both
-MAX_IMG_SECTORS ?= 256
-
-# define slot sizes for IMAGE1 and IMAGE2 in case of usage with
-# external memory upgrade. 0x40000 slot size is acceptable for
-# all platforms in single image case with external upgrade
-ifeq ($(USE_EXTERNAL_FLASH), 1)
-IMAGE_1_SLOT_SIZE ?= 0x40200
-ifeq ($(MCUBOOT_IMAGE_NUMBER), 2)
-IMAGE_2_SLOT_SIZE ?= 0x40200
-endif
-endif
-
-# Application-specific DEFINES
-DEFINES_APP := -DMBEDTLS_CONFIG_FILE="\"mcuboot_crypto_config.h\""
-DEFINES_APP += -DECC256_KEY_FILE="\"keys/$(SIGN_KEY_FILE).pub\""
-DEFINES_APP += -DCORE=$(CORE)
-DEFINES_APP += -DMCUBOOT_IMAGE_NUMBER=$(MCUBOOT_IMAGE_NUMBER)
-
-ifeq ($(USE_OVERWRITE), 1)
-DEFINES_APP += -DMCUBOOT_OVERWRITE_ONLY
-endif
-
-ifeq ($(USE_EXTERNAL_FLASH), 1)
-DEFINES_APP += -DCY_BOOT_USE_EXTERNAL_FLASH
-MAX_IMG_SECTORS = 1536
-DEFINES_APP += -DCY_BOOT_IMAGE_1_SIZE=$(IMAGE_1_SLOT_SIZE)
-ifeq ($(MCUBOOT_IMAGE_NUMBER), 2)
-DEFINES_APP += -DCY_BOOT_IMAGE_2_SIZE=$(IMAGE_2_SLOT_SIZE)
-endif
-endif
-
-DEFINES_APP += -DMCUBOOT_MAX_IMG_SECTORS=$(MAX_IMG_SECTORS)
-# Hardrware acceleration support
-ifeq ($(USE_CRYPTO_HW), 1)
-DEFINES_APP += -DMBEDTLS_USER_CONFIG_FILE="\"mcuboot_crypto_acc_config.h\""
-DEFINES_APP += -DCY_CRYPTO_HAL_DISABLE
-DEFINES_APP += -DCY_MBEDTLS_HW_ACCELERATION
-endif
-# Encrypted image support
-ifeq ($(ENC_IMG), 1)
-DEFINES_APP += -DENC_IMG=1
-# Use higher optimization level for enc image in multi image mode
-# with external flash so it would fit into 0x18000 size of MCUBootApp
-ifeq ($(BUILDCFG), Debug)
-ifeq ($(MCUBOOT_IMAGE_NUMBER), 2)
-ifeq ($(USE_EXTERNAL_FLASH), 1)
-CFLAGS_OPTIMIZATION := -O2 -g3
-endif
-endif
-endif
-endif
-
-# Collect MCUBoot sourses
-SOURCES_MCUBOOT := $(wildcard $(CURDIR)/../bootutil/src/*.c)
-# Collect MCUBoot Application sources
-SOURCES_APP_SRC := $(wildcard $(CUR_APP_PATH)/*.c)
-
-# Collect Flash Layer port sources
-SOURCES_FLASH_PORT := $(wildcard $(CURDIR)/cy_flash_pal/*.c)
-SOURCES_FLASH_PORT += $(wildcard $(CURDIR)/cy_flash_pal/flash_qspi/*.c)
-# Collect all the sources
-SOURCES_APP := $(SOURCES_MCUBOOT)
-SOURCES_APP += $(SOURCES_APP_SRC)
-SOURCES_APP += $(SOURCES_FLASH_PORT)
-
-INCLUDE_DIRS_MCUBOOT := $(addprefix -I, $(CURDIR)/../bootutil/include)
-INCLUDE_DIRS_MCUBOOT += $(addprefix -I, $(CURDIR)/../bootutil/src)
-INCLUDE_DIRS_MCUBOOT += $(addprefix -I, $(CURDIR)/..)
-
-INCLUDE_DIRS_APP := $(addprefix -I, $(CURDIR))
-INCLUDE_DIRS_APP += $(addprefix -I, $(CURDIR)/cy_flash_pal/flash_qspi)
-INCLUDE_DIRS_APP += $(addprefix -I, $(CURDIR)/cy_flash_pal/include)
-INCLUDE_DIRS_APP += $(addprefix -I, $(CURDIR)/cy_flash_pal/include/flash_map_backend)
-INCLUDE_DIRS_APP += $(addprefix -I, $(CUR_APP_PATH))
-INCLUDE_DIRS_APP += $(addprefix -I, $(CUR_APP_PATH)/config)
-INCLUDE_DIRS_APP += $(addprefix -I, $(CUR_APP_PATH)/os)
-
-ASM_FILES_APP :=
-ASM_FILES_APP += $(ASM_FILES_STARTUP)
-
# Output folder
OUT := $(APP_NAME)/out
# Output folder to contain build artifacts
@@ -137,9 +57,198 @@
OUT_CFG := $(OUT_TARGET)/$(BUILDCFG)
-# Overwite path to linker script if custom is required
+include $(PRJ_DIR)/platforms.mk
+include $(PRJ_DIR)/common_libs.mk
+include $(PRJ_DIR)/toolchains.mk
+
+ifeq ($(MAX_IMG_SECTORS), )
+MAX_IMG_SECTORS ?= $(PLATFORM_MAX_IMG_SECTORS)
+endif
+
+# Application-specific DEFINES
+DEFINES_APP += -DMBEDTLS_CONFIG_FILE="\"mcuboot_crypto_config.h\""
+DEFINES_APP += -DECC256_KEY_FILE="\"keys/$(SIGN_KEY_FILE).pub\""
+DEFINES_APP += -D$(CORE)
+DEFINES_APP += -DMCUBOOT_IMAGE_NUMBER=$(MCUBOOT_IMAGE_NUMBER)
+DEFINES_APP += -DUSE_SHARED_SLOT=$(USE_SHARED_SLOT)
+
+# Define MCUboot size and pass it to linker script
+BOOTLOADER_SIZE ?= $(PLATFORM_BOOTLOADER_SIZE)
+LDFLAGS_DEFSYM += -Wl,--defsym,BOOTLOADER_SIZE=$(BOOTLOADER_SIZE)
+
+
+APP_DEFAULT_POLICY ?= $(PLATFORM_APP_DEFAULT_POLICY)
+
+ifeq ($(USE_EXTERNAL_FLASH), 1)
+ifeq ($(USE_XIP), 1)
+DEFINES_APP += -DUSE_XIP
+endif
+DEFINES_APP += -DCY_BOOT_USE_EXTERNAL_FLASH
+DEFINES_APP += -DCY_MAX_EXT_FLASH_ERASE_SIZE=$(PLATFORM_CY_MAX_EXT_FLASH_ERASE_SIZE)
+endif
+
+ifeq ($(USE_OVERWRITE), 1)
+DEFINES_APP += -DMCUBOOT_OVERWRITE_ONLY
+ifeq ($(USE_SW_DOWNGRADE_PREV), 1)
+DEFINES_APP += -DMCUBOOT_DOWNGRADE_PREVENTION
+endif
+else
+ifeq ($(USE_BOOTSTRAP), 1)
+DEFINES_APP += -DMCUBOOT_BOOTSTRAP
+endif
+endif
+DEFINES_APP += -DMCUBOOT_MAX_IMG_SECTORS=$(MAX_IMG_SECTORS)
+DEFINES_APP += -DMCUBOOT_LOG_LEVEL=$(MCUBOOT_LOG_LEVEL)
+ifeq ($(USE_HW_ROLLBACK_PROT), 1)
+DEFINES_APP += -DMCUBOOT_HW_ROLLBACK_PROT
+# Service RAM app address (size 0x8000)
+DEFINES_APP += -DSERVICE_APP_OFFSET=$(PLATFORM_SERVICE_APP_OFFSET)
+# Service RAM app input parameters address (size 0x400)
+DEFINES_APP += -DSERVICE_APP_INPUT_PARAMS_OFFSET=$(PLATFORM_SERVICE_APP_INPUT_PARAMS_OFFSET)
+# Service RAM app descriptor addr (size 0x20)
+DEFINES_APP += -DSERVICE_APP_DESC_OFFSET=$(PLATFORM_SERVICE_APP_DESC_OFFSET)
+# Service RAM app size
+DEFINES_APP += -DSERVICE_APP_SIZE=$(PLATFORM_SERVICE_APP_SIZE)
+endif
+# Hardrware acceleration support
+ifeq ($(USE_CRYPTO_HW), 1)
+DEFINES_APP += -DMBEDTLS_USER_CONFIG_FILE="\"mcuboot_crypto_acc_config.h\""
+DEFINES_APP += -DCY_CRYPTO_HAL_DISABLE
+DEFINES_APP += -DCY_MBEDTLS_HW_ACCELERATION
+endif
+
+# Compile with user redefined values for UART HW, port, pins
+ifeq ($(USE_CUSTOM_DEBUG_UART), 1)
+DEFINES_APP += -DUSE_CUSTOM_DEBUG_UART=1
+endif
+
+# Encrypted image support
+ifeq ($(ENC_IMG), 1)
+DEFINES_APP += -DENC_IMG=1
+ifeq ($(PLATFORM), CYW20829)
+DEFINES_APP += -DMCUBOOT_ENC_IMAGES_XIP
+endif
+# Use maximum optimization level for PSOC6 encrypted image with
+# external flash so it would fit into 0x18000 size of MCUBootApp
+ifneq ($(PLATFORM), CYW20829)
+ifeq ($(BUILDCFG), Debug)
+ifeq ($(USE_EXTERNAL_FLASH), 1)
+CFLAGS_OPTIMIZATION := -Os -g3
+endif
+endif
+endif
+endif
+
+
+# Collect MCUBoot sourses
+SOURCES_MCUBOOT := $(wildcard $(PRJ_DIR)/../bootutil/src/*.c)
+# Collect MCUBoot Application sources
+SOURCES_APP_SRC := main.c cy_security_cnt.c keys.c
+
+# Collect Flash Layer sources and header files dirs
+INCLUDE_DIRS_FLASH := $(PLATFORM_INCLUDE_DIRS_FLASH)
+INCLUDE_DIRS_UTILS := $(PLATFORM_INCLUDE_DIRS_UTILS)
+SOURCES_FLASH := $(PLATFORM_SOURCES_FLASH)
+
+# Collect all the sources
+SOURCES_APP := $(SOURCES_MCUBOOT)
+SOURCES_APP += $(SOURCES_FLASH)
+SOURCES_APP += $(addprefix $(CUR_APP_PATH)/, $(SOURCES_APP_SRC))
+SOURCES_APP += $(PLATFORM_APP_SOURCES)
+
+INCLUDE_DIRS_MCUBOOT := $(addprefix -I, $(PRJ_DIR)/../bootutil/include)
+INCLUDE_DIRS_MCUBOOT += $(addprefix -I, $(PRJ_DIR)/../bootutil/src)
+INCLUDE_DIRS_MCUBOOT += $(addprefix -I, $(PRJ_DIR)/..)
+
+INCLUDE_DIRS_APP += $(addprefix -I, $(PRJ_DIR))
+INCLUDE_DIRS_APP += $(addprefix -I, $(CUR_APP_PATH))
+INCLUDE_DIRS_APP += $(addprefix -I, $(CUR_APP_PATH)/config)
+INCLUDE_DIRS_APP += $(addprefix -I, $(CUR_APP_PATH)/os)
+INCLUDE_DIRS_APP += $(addprefix -I, $(INCLUDE_DIRS_FLASH))
+INCLUDE_DIRS_APP += $(addprefix -I, $(INCLUDE_DIRS_UTILS))
+
+ASM_FILES_APP :=
+ASM_FILES_APP += $(ASM_FILES_STARTUP)
+
+# Pass variables to linker script and overwrite path to it, if custom is required
ifeq ($(COMPILER), GCC_ARM)
-LINKER_SCRIPT := $(subst /cygdrive/c,c:,$(CUR_APP_PATH)/$(APP_NAME).ld)
+LDFLAGS += $(LDFLAGS_DEFSYM)
+LINKER_SCRIPT := $(CUR_APP_PATH)/$(APP_NAME)_$(CORE).ld
else
$(error Only GCC ARM is supported at this moment)
-endif
\ No newline at end of file
+endif
+
+###############################################################################
+# Print debug information about all settings used and/or set in this file
+ifeq ($(VERBOSE), 1)
+$(info #### MCUBootApp.mk ####)
+$(info APP_DEFAULT_POLICY --> $(APP_DEFAULT_POLICY))
+$(info APP_NAME <-> $(APP_NAME))
+$(info ASM_FILES_APP --> $(ASM_FILES_APP))
+$(info ASM_FILES_STARTUP <-- $(ASM_FILES_STARTUP))
+$(info BOOTLOADER_SIZE <-> $(BOOTLOADER_SIZE))
+$(info BUILDCFG <-- $(BUILDCFG))
+$(info CFLAGS_OPTIMIZATION --> $(CFLAGS_OPTIMIZATION))
+$(info COMPILER <-> $(COMPILER))
+$(info CORE <-- $(CORE))
+$(info CUR_APP_PATH <-- $(CUR_APP_PATH))
+$(info DEFINES_APP --> $(DEFINES_APP))
+$(info ENC_IMG <-> $(ENC_IMG))
+$(info EXTERNAL_FLASH_PRIMARY_2_OFFSET <-> $(EXTERNAL_FLASH_PRIMARY_2_OFFSET))
+$(info EXTERNAL_FLASH_SCRATCH_OFFSET <-> $(EXTERNAL_FLASH_SCRATCH_OFFSET))
+$(info EXTERNAL_FLASH_SECONDARY_1_OFFSET <-> $(EXTERNAL_FLASH_SECONDARY_1_OFFSET))
+$(info EXTERNAL_FLASH_SECONDARY_2_OFFSET <-> $(EXTERNAL_FLASH_SECONDARY_2_OFFSET))
+$(info FLASH_MAP <-- $(FLASH_MAP))
+$(info IMAGE_1_SLOT_SIZE <-> $(IMAGE_1_SLOT_SIZE))
+$(info IMAGE_2_SLOT_SIZE <-> $(IMAGE_2_SLOT_SIZE))
+$(info INCLUDE_DIRS_APP --> $(INCLUDE_DIRS_APP))
+$(info INCLUDE_DIRS_FLASH <-> $(INCLUDE_DIRS_FLASH))
+$(info INCLUDE_DIRS_MCUBOOT --> $(INCLUDE_DIRS_MCUBOOT))
+$(info LDFLAGS --> $(LDFLAGS))
+$(info LDFLAGS_DEFSYM <-> $(LDFLAGS_DEFSYM))
+$(info LINKER_SCRIPT --> $(LINKER_SCRIPT))
+$(info MAX_IMG_SECTORS <-> $(MAX_IMG_SECTORS))
+$(info MCUBOOT_IMAGE_NUMBER <-> $(MCUBOOT_IMAGE_NUMBER))
+$(info MCUBOOT_LOG_LEVEL <-> $(MCUBOOT_LOG_LEVEL))
+$(info OUT <-> $(OUT))
+$(info OUT_CFG --> $(OUT_CFG))
+$(info OUT_TARGET <-> $(OUT_TARGET))
+$(info PLATFORM <-- $(PLATFORM))
+$(info PLATFORM_APP_DEFAULT_POLICY <-- $(PLATFORM_APP_DEFAULT_POLICY))
+$(info PLATFORM_APP_SOURCES <-- $(PLATFORM_APP_SOURCES))
+$(info PLATFORM_BOOTLOADER_SIZE <-- $(PLATFORM_BOOTLOADER_SIZE))
+$(info PLATFORM_CHUNK_SIZE <-- $(PLATFORM_CHUNK_SIZE))
+$(info PLATFORM_CY_MAX_EXT_FLASH_ERASE_SIZE <-- $(PLATFORM_CY_MAX_EXT_FLASH_ERASE_SIZE))
+$(info PLATFORM_EXTERNAL_FLASH_PRIMARY_2_OFFSET <-- $(PLATFORM_EXTERNAL_FLASH_PRIMARY_2_OFFSET))
+$(info PLATFORM_EXTERNAL_FLASH_SCRATCH_OFFSET <-- $(PLATFORM_EXTERNAL_FLASH_SCRATCH_OFFSET))
+$(info PLATFORM_EXTERNAL_FLASH_SECONDARY_1_OFFSET <-- $(PLATFORM_EXTERNAL_FLASH_SECONDARY_1_OFFSET))
+$(info PLATFORM_EXTERNAL_FLASH_SECONDARY_2_OFFSET <-- $(PLATFORM_EXTERNAL_FLASH_SECONDARY_2_OFFSET))
+$(info PLATFORM_IMAGE_1_SLOT_SIZE <-- $(PLATFORM_IMAGE_1_SLOT_SIZE))
+$(info PLATFORM_IMAGE_2_SLOT_SIZE <-- $(PLATFORM_IMAGE_2_SLOT_SIZE))
+$(info PLATFORM_INCLUDE_DIRS_FLASH <-- $(PLATFORM_INCLUDE_DIRS_FLASH))
+$(info PLATFORM_MAX_IMG_SECTORS <-- $(PLATFORM_MAX_IMG_SECTORS))
+$(info PLATFORM_SCRATCH_SIZE <-- $(PLATFORM_SCRATCH_SIZE))
+$(info PLATFORM_SERVICE_APP_DESC_OFFSET <-- $(PLATFORM_SERVICE_APP_DESC_OFFSET))
+$(info PLATFORM_SERVICE_APP_INPUT_PARAMS_OFFSET <-- $(PLATFORM_SERVICE_APP_INPUT_PARAMS_OFFSET))
+$(info PLATFORM_SERVICE_APP_OFFSET <-- $(PLATFORM_SERVICE_APP_OFFSET))
+$(info PLATFORM_SERVICE_APP_SIZE <-- $(PLATFORM_SERVICE_APP_SIZE))
+$(info PLATFORM_SOURCES_FLASH <-- $(PLATFORM_SOURCES_FLASH))
+$(info PLATFORM_STATUS_PARTITION_OFFSET <-- $(PLATFORM_STATUS_PARTITION_OFFSET))
+$(info PRJ_DIR <-- $(PRJ_DIR))
+$(info PYTHON_PATH <-- $(PYTHON_PATH))
+$(info SCRATCH_SIZE <-> $(SCRATCH_SIZE))
+$(info SIGN_KEY_FILE <-- $(SIGN_KEY_FILE))
+$(info SOURCES_APP --> $(SOURCES_APP))
+$(info SOURCES_APP_SRC <-> $(SOURCES_APP_SRC))
+$(info SOURCES_FLASH <-> $(SOURCES_FLASH))
+$(info SOURCES_MCUBOOT <-> $(SOURCES_MCUBOOT))
+$(info STATUS_PARTITION_OFFSET <-> $(STATUS_PARTITION_OFFSET))
+$(info USE_BOOTSTRAP <-> $(USE_BOOTSTRAP))
+$(info USE_CRYPTO_HW <-- $(USE_CRYPTO_HW))
+$(info USE_CUSTOM_DEBUG_UART <-- $(USE_CUSTOM_DEBUG_UART))
+$(info USE_CUSTOM_MEMORY_MAP <-- $(USE_CUSTOM_MEMORY_MAP))
+$(info USE_EXTERNAL_FLASH <-- $(USE_EXTERNAL_FLASH))
+$(info USE_HW_ROLLBACK_PROT <-- $(USE_HW_ROLLBACK_PROT))
+$(info USE_OVERWRITE <-- $(USE_OVERWRITE))
+$(info USE_XIP <-- $(USE_XIP))
+endif
diff --git a/boot/cypress/MCUBootApp/MCUBootApp.ld b/boot/cypress/MCUBootApp/MCUBootApp_CM0P.ld
similarity index 87%
rename from boot/cypress/MCUBootApp/MCUBootApp.ld
rename to boot/cypress/MCUBootApp/MCUBootApp_CM0P.ld
index c78c598..9d9a32d 100644
--- a/boot/cypress/MCUBootApp/MCUBootApp.ld
+++ b/boot/cypress/MCUBootApp/MCUBootApp_CM0P.ld
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy8c6xxa_cm0plus.ld
-* \version 2.60
+* \version 2.91
*
* Linker file for the GNU C compiler.
*
@@ -19,7 +19,7 @@
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2021 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -40,7 +40,7 @@
GROUP(-lgcc -lc -lnosys)
ENTRY(Reset_Handler)
-/* Size of the stack section at the end of CM0+ SRAM */
+/* The size of the stack section at the end of CM0+ SRAM */
STACK_SIZE = 0x1000;
/* Force symbol to be entered in the output file as an undefined symbol. Doing
@@ -63,9 +63,16 @@
* Your changes must be aligned with the corresponding memory regions for the CM4 core in 'xx_cm4_dual.ld',
* where 'xx' is the device group; for example, 'cy8c6xx7_cm4_dual.ld'.
*/
- public_ram (rw) : ORIGIN = 0x08000000, LENGTH = 0x800
ram (rwx) : ORIGIN = 0x08000800, LENGTH = 0x1F800
- flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x18000
+ flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x17E90
+ smif_struct (rx) : ORIGIN = 0x10017E90, LENGTH = 0x170
+
+ /* This is an unprotected public RAM region, with the placed .cy_sharedmem.
+ * This region is used to place objects that require full access from both cores.
+ * Uncomment the following line, define the region origin and length, and uncomment the placement of
+ * the .cy_sharedmem section below.
+ */
+ public_ram (rw) : ORIGIN = 0x08000000, LENGTH = 0x800
/* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
* You can assign sections to this memory region for only one of the cores.
@@ -165,6 +172,11 @@
KEEP(*(.eh_frame*))
} > flash
+ /* place SMIF config structures here */
+ .smif_struct ORIGIN(smif_struct) :
+ {
+ KEEP(*(.smif_struct)) /* keep my variable even if not referenced */
+ } > smif_struct
.ARM.extab :
{
@@ -216,16 +228,6 @@
__etext = . ;
- /* Set stack top to end of RAM, and stack limit move down by
- * size of stack_dummy section */
- __StackTop = ORIGIN(ram) + LENGTH(ram);
- __StackLimit = __StackTop - STACK_SIZE ;
- PROVIDE(__stack = __StackTop);
-
- .stackSpace (NOLOAD) : ALIGN(8)
- {
- . = . + STACK_SIZE ;
- } > ram
.ramVectors (NOLOAD) : ALIGN(8)
{
@@ -234,18 +236,10 @@
__ram_vectors_end__ = .;
} > ram
- /* Unprotected public RAM */
- .cy_sharedmem (NOLOAD):
- {
- . = ALIGN(4);
- __public_ram_start__ = .;
- KEEP(*(.cy_sharedmem))
- . = ALIGN(4);
- __public_ram_end__ = .;
- } > public_ram
- .data __ram_vectors_end__ : AT (__etext)
+ .data __ram_vectors_end__ :
{
+ . = ALIGN(4);
__data_start__ = .;
*(vtable)
@@ -279,7 +273,12 @@
__data_end__ = .;
- } > ram
+ } > ram AT>flash
+
+
+ /* Check if code and .data region exceeds FLASH image limit */
+ __FlashImageSize = __etext - ORIGIN(flash) + SIZEOF(.data);
+ ASSERT( __FlashImageSize <= BOOTLOADER_SIZE, "Resulting image does not fit into MCUboot flash region")
/* Place variables in the section that should not be initialized during the
@@ -313,17 +312,49 @@
__bss_end__ = .;
} > ram
+
.heap (NOLOAD):
{
__HeapBase = .;
__end__ = .;
end = __end__;
KEEP(*(.heap*))
- . = ORIGIN(ram) + LENGTH(ram);
+ . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
__HeapLimit = .;
} > ram
+ /* To use unprotected public RAM, uncomment the following .cy_sharedmem section placement.*/
+ /*
+ .cy_sharedmem (NOLOAD):
+ {
+ . = ALIGN(4);
+ __public_ram_start__ = .;
+ KEEP(*(.cy_sharedmem))
+ . = ALIGN(4);
+ __public_ram_end__ = .;
+ } > public_ram
+ */
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (NOLOAD):
+ {
+ KEEP(*(.stack*))
+ } > ram
+
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(ram) + LENGTH(ram);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+
+
/* Emulated EEPROM Flash area */
.cy_em_eeprom :
{
@@ -369,9 +400,11 @@
/* Places the code in the Execute in Place (XIP) section. See the smif driver
* documentation for details.
*/
- .cy_xip :
+ cy_xip :
{
+ __cy_xip_start = .;
KEEP(*(.cy_xip))
+ __cy_xip_end = .;
} > xip
diff --git a/boot/cypress/MCUBootApp/MCUBootApp_CM0P_Debug.launch b/boot/cypress/MCUBootApp/MCUBootApp_CM0P_Debug.launch
deleted file mode 100644
index c23487b..0000000
--- a/boot/cypress/MCUBootApp/MCUBootApp_CM0P_Debug.launch
+++ /dev/null
@@ -1,62 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="false"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="true"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="false"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
-<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="true"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${cy_tools_path:openocd}/bin/openocd"/>
-<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-s "${cy_tools_path:openocd}/scripts" -s "${workspace_loc}/boot/cypress" -c "source [find interface/kitprog3.cfg]" -c "source [find target/psoc6_2m.cfg]" -c "puts stderr {Started by GNU MCU Eclipse}""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666"/>
-<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value=""/>
-<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value=""/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value="./out/PSOC_062_2M/Debug/MCUBootApp.elf"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
-<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="false"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value=""/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value="./out/PSOC_062_2M/Debug/MCUBootApp.elf"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
-<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cy_sdk_install_dir}/tools/gcc-7.2.1-1.0/bin/arm-none-eabi-gdb${cy_exe_platform_ext}"/>
-<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
-<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="0"/>
-<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
-<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
-<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="boot/cypress/MCUBootApp/out/PSOC_062_2M/Debug/MCUBootApp.elf"/>
-<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="cy_mcuboot"/>
-<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
-<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
-<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
-<listEntry value="/cy_mcuboot"/>
-</listAttribute>
-<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
-<listEntry value="4"/>
-</listAttribute>
-<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="Context string"> <memoryBlockExpression address="268566528" label="0x10020000"/> <memoryBlockExpression address="268632064" label="0x10030000"/> </memoryBlockExpressionList> "/>
-<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
-</launchConfiguration>
diff --git a/boot/cypress/MCUBootApp/MCUBootApp_CM33.ld b/boot/cypress/MCUBootApp/MCUBootApp_CM33.ld
new file mode 100644
index 0000000..e98f9e5
--- /dev/null
+++ b/boot/cypress/MCUBootApp/MCUBootApp_CM33.ld
@@ -0,0 +1,494 @@
+/***************************************************************************//**
+* \file cyw20829_ns.ld
+* \version 1.0.0
+*
+* Linker file for the GNU C compiler.
+*
+* The main purpose of the linker script is to describe how the sections in the
+* input files should be mapped into the output file, and to control the memory
+* layout of the output file.
+*
+* \note The entry point location is fixed and starts at 0x10000000. The valid
+* application image should be placed there.
+*
+* \note The linker files included with the PDL template projects must be generic
+* and handle all common use cases. Your project may not use every section
+* defined in the linker files. In that case you may see warnings during the
+* build process. In your project, you can simply comment out or remove the
+* relevant code in the linker file.
+*
+********************************************************************************
+* \copyright
+* Copyright 2016-2020 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+GROUP(-lgcc -lc -lnosys )
+SEARCH_DIR(.)
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+ENTRY(Reset_Handler)
+
+/* The size of the stack section at the end of CM33 SRAM */
+STACK_SIZE = 0x2400;
+
+FLASH_START_ADDR_SAHB = 0x60000000;
+FLASH_START_ADDR_CBUS = 0x08000000;
+RAM_START_ADDR_SAHB = 0x20000000;
+RAM_START_ADDR_CBUS = 0x04000000;
+RAM_END_ADDR_SAHB = 0x20020000; /* 128K */
+RAM_END_ADDR_CBUS = 0x04020000; /* 128K */
+FLASH_END_ADDR_SAHB = 0x60080000; /* 512K */
+
+BOOTSTRAP_OFFSET_FLASH = 0x00000050; /* toc2=0x10, l1_desc=0x1C, sign_header=0x20, padding=0x4 (encrypted data should be aligned to 0x10 boundary) */
+BOOTSTRAP_OFFSET_RAM = 0x0001E000; /* was 0x00004000 Modify this value to change the size of Bootstrap code + Data */
+APPCODE_OFFSET_FLASH = 0x00002200;
+
+RAMVECTORS_ALIGNMENT = 512;
+
+/* Memory reserved for Bootstrap code and data */
+BOOTSTRAP_SIZE = RAM_END_ADDR_SAHB - RAM_START_ADDR_SAHB - BOOTSTRAP_OFFSET_RAM; /* 0x00002000 */
+/* vma for bootstrap code region */
+CODE_VMA = RAM_START_ADDR_CBUS + BOOTSTRAP_OFFSET_RAM; /* 0x0401E000 */
+/* lma for bootstrap code region */
+CODE_LMA = FLASH_START_ADDR_SAHB + BOOTSTRAP_OFFSET_FLASH; /* 0x6000004C */
+/* Maximum bootstrap code + data size */
+CODE_BS_SIZE = BOOTSTRAP_SIZE; /* 8KB */
+/* vma for bootstrap data region */
+DATA_BS_VMA = RAM_START_ADDR_SAHB + BOOTSTRAP_OFFSET_RAM; /* 0x2001E000 */
+/* vma for bootstrap and app data region */
+DATA_VMA = RAM_START_ADDR_SAHB; /* 0x20000000 */
+/* vma for appCodeRam region */
+DATA_CBUS_VMA = RAM_START_ADDR_CBUS; /* 0x04000000 */
+/* lma for bootstrap and app data region */
+DATA_LMA = CODE_LMA + CODE_BS_SIZE; /* 0x6000204C */
+/* data size */
+DATA_SIZE = RAM_END_ADDR_SAHB - DATA_VMA - BOOTSTRAP_SIZE; /* 0x1E000 */
+/* vma for application XIP region */
+XIP_VMA = FLASH_START_ADDR_CBUS + APPCODE_OFFSET_FLASH; /* 0x08002200 */
+/* lma for application XIP region */
+XIP_LMA = FLASH_START_ADDR_SAHB + APPCODE_OFFSET_FLASH; /* 0x60002200 */
+/* size of XIP region */
+XIP_SIZE = FLASH_END_ADDR_SAHB - XIP_LMA;
+/* Total size of SRAM */
+RAM_SIZE = RAM_END_ADDR_SAHB - RAM_START_ADDR_SAHB; /* 0x00020000 */
+/* Size of Bootstrap data is kept same as BOOTSTRAP_SIZE */
+DATA_BS_SIZE = BOOTSTRAP_SIZE;
+
+/* Force symbol to be entered in the output file as an undefined symbol. Doing
+* this may, for example, trigger linking of additional modules from standard
+* libraries. You may list several symbols for each EXTERN, and you may use
+* EXTERN multiple times. This command has the same effect as the -u command-line
+* option.
+*/
+EXTERN(Reset_Handler)
+
+/* The MEMORY section below describes the location and size of blocks of memory in the target.
+* Use this section to specify the memory regions available for allocation.
+*/
+MEMORY
+{
+ /* The ram and flash regions control RAM and flash memory allocation for the CM33 core.
+ */
+ code (rx) : ORIGIN = CODE_VMA, LENGTH = CODE_BS_SIZE
+ bsData (rwx) : ORIGIN = DATA_BS_VMA, LENGTH = DATA_BS_SIZE
+ appCodeRam (rx) : ORIGIN = DATA_CBUS_VMA, LENGTH = DATA_SIZE
+ data (rwx) : ORIGIN = DATA_VMA, LENGTH = DATA_SIZE
+ xip (rx) : ORIGIN = XIP_VMA, LENGTH = XIP_SIZE
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ * Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ * __exidx_start
+ * __exidx_end
+ * __copy_table_start__
+ * __copy_table_end__
+ * __zero_table_start__
+ * __zero_table_end__
+ * __etext
+ * __data_start__
+ * __preinit_array_start
+ * __preinit_array_end
+ * __init_array_start
+ * __init_array_end
+ * __fini_array_start
+ * __fini_array_end
+ * __data_end__
+ * __bss_start__
+ * __bss_end__
+ * __end__
+ * end
+ * __HeapLimit
+ * __StackLimit
+ * __StackTop
+ * __stack
+ * __Vectors_End
+ * __Vectors_Size
+ */
+
+SECTIONS
+{
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy RAM_START_ADDR_SAHB (NOLOAD):
+ {
+ __StackLimit = .;
+ KEEP(*(.stack*))
+ . = STACK_SIZE;
+ __StackTop = .;
+ } > data
+
+PROVIDE(__stack = __StackTop);
+
+ __ramVectors_vma__ = ALIGN(RAMVECTORS_ALIGNMENT);
+
+ .ramVectors __ramVectors_vma__ (NOLOAD):
+ {
+ __ram_vectors_start__ = .;
+ KEEP(*(.ram_vectors))
+ . = ALIGN(4);
+ __ram_vectors_end__ = .;
+ } > data
+
+ __appTextRam_vma__ = (__ram_vectors_end__ - RAM_START_ADDR_SAHB) + RAM_START_ADDR_CBUS;
+ __appTextRam_lma__ = (__zero_table_end__ - FLASH_START_ADDR_CBUS) + FLASH_START_ADDR_SAHB;
+ __ezerotable = __zero_table_end__;
+
+ .appTextRam __appTextRam_vma__ : AT (__appTextRam_lma__)
+ {
+ . = ALIGN(4);
+ __app_text_ram_begin__ = .;
+ KEEP(*(.cy_ramfunc*))
+ . = ALIGN(4);
+
+ *cy_smif.o(.text*)
+ *cy_smif_memslot.o(.text*)
+ *cy_smif_sfdp.o(.text*)
+ *cy_gpio.o(.text*)
+ *cy_smif_hybrid_sect.o(.text*)
+
+ . = ALIGN(4);
+ __app_text_ram_end__ = .;
+
+ } > appCodeRam
+
+ __data_vma__ = (__app_text_ram_end__ - RAM_START_ADDR_CBUS) + RAM_START_ADDR_SAHB;
+ __data_lma__ = (__app_text_ram_end__ - __app_text_ram_begin__) + __appTextRam_lma__;
+ __etext = __data_lma__ - FLASH_START_ADDR_SAHB + FLASH_START_ADDR_CBUS;
+
+ .data __data_vma__ : AT (__data_lma__)
+ {
+ __data_start__ = .;
+
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ . = ALIGN(4);
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+
+ __data_end__ = .;
+
+ } > data
+
+ /* Check if data is exceeding the flash size */
+ ASSERT((__data_lma__ + (__data_end__ - __data_start__)) <= FLASH_END_ADDR_SAHB, "data section exceeds Flash size !")
+
+ /* Place variables in the section that should not be initialized during the
+ * device startup.
+ */
+ .noinit (NOLOAD) : ALIGN(8)
+ {
+ KEEP(*(.noinit))
+ } > data
+
+ /* The uninitialized global or static variables are placed in this section.
+ *
+ * The NOLOAD attribute tells linker that .bss section does not consume
+ * any space in the image. The NOLOAD attribute changes the .bss type to
+ * NOBITS, and that makes linker to A) not allocate section in memory, and
+ * A) put information to clear the section with all zeros during application
+ * loading.
+ *
+ * Without the NOLOAD attribute, the .bss section might get PROGBITS type.
+ * This makes linker to A) allocate zeroed section in memory, and B) copy
+ * this section to RAM during application loading.
+ */
+ .bss (NOLOAD):
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > data
+
+ /* Use ramining RAM for Heap */
+ __heap_size__ = (RAM_SIZE - ((__bss_end__ - RAM_START_ADDR_SAHB) + (RAM_END_ADDR_CBUS - __bootstrapText_vma__)) - 4);
+
+ .heap (NOLOAD):
+ {
+ . = ALIGN(8);
+ __HeapBase = .;
+ __end1__ = .;
+ end = __end1__;
+ KEEP(*(.heap*))
+ . += __heap_size__;
+ __HeapLimit = .;
+ } > data
+
+ __bootstrapText_vma__ = ORIGIN(code);
+ __bootstrapText_lma__ = CODE_LMA;
+
+ /* Cortex-M33 bootstrap code area */
+ .bootstrapText __bootstrapText_vma__ : AT (__bootstrapText_lma__)
+ {
+ /* Cortex-M33 code vector table */
+ . = ALIGN(4);
+ __bootstrapText_begin = .;
+
+ __Vectors = . ;
+ KEEP(*(.vectors))
+ . = ALIGN(4);
+ __Vectors_End = .;
+ __Vectors_Size = __Vectors_End - __Vectors;
+ __end__ = .;
+
+ . = ALIGN(4);
+
+ /* startup code */
+ *ns_start_cyw20829.o(.text*)
+ *ns_system_cyw20829.o(.text*)
+
+ /* drivers */
+ *cy_device.o(.text*)
+ *cy_btss.o(.text*)
+ *cy_sysclk_v2.o(.text*)
+ *cy_syspm_v2.o(.text*)
+ *cy_sysint_v2.o(.text*)
+ *cy_syslib*.o(.text*)
+ *ppu_v1.o(.text*)
+ *cy_mpc.o(.text*)
+ *cy_pd_ppu.o(.text*)
+ *cy_smif.o(.text*)
+ *cy_smif_memslot.o(.text*)
+ *cy_smif_sfdp.o(.text*)
+ *cy_gpio.o(.text*)
+ *cyhal_system.o(.text*)
+ *lib_a-memset.o(.text*)
+ *lib_a-memcpy-stub.o(.text*)
+
+ KEEP(*(.cy_l1func*))
+
+ . = ALIGN(4);
+ __bootstrapText_end = .;
+ } > code
+
+ __bootstrap_zerotable_lma__ = (CODE_LMA + (__bootstrapText_end - __bootstrapText_begin));
+
+ .bootstrapzero.table : AT (__bootstrap_zerotable_lma__)
+ {
+ . = ALIGN(4);
+ __bootstrapzero_table_start__ = .;
+ LONG (__bootstrap_bss_start__)
+ LONG ((__bootstrap_bss_end__ - __bootstrap_bss_start__)/4)
+ . = ALIGN(4);
+ __bootstrapzero_table_end__ = .;
+ } > code
+
+ __bootstrapData_vma__ = ((__bootstrapzero_table_end__ - RAM_START_ADDR_CBUS) + RAM_START_ADDR_SAHB);
+ __bootstrapData_lma__ = (__bootstrap_zerotable_lma__ + (__bootstrapzero_table_end__ - __bootstrapzero_table_start__));
+
+ .bootstrapData __bootstrapData_vma__ : AT (__bootstrapData_lma__)
+ {
+ __bootstrapData_start__ = .;
+ . = ALIGN(4);
+
+ /* startup code */
+ *ns_start_cyw20829.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *ns_system_cyw20829.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+
+ /* drivers */
+ *cy_device.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_btss.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_sysclk_v2.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_syspm_v2.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_sysint_v2.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_syslib.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *ppu_v1.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_mpc.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_pd_ppu.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_smif.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_smif_memslot.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_smif_sfdp.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cy_gpio.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cycfg_qspi_memslot.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *cyhal_system.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *lib_a-memset.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *lib_a-memcpy-stub.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+
+ KEEP(*(.cy_l1data*))
+
+ . = ALIGN(4);
+
+ __bootstrapData_end__ = .;
+ __bootstrap_size_end__ = .;
+ } > bsData
+
+ .bootstrapBss (NOLOAD):
+ {
+ . = ALIGN(4);
+ __bootstrap_bss_start__ = .;
+
+ /* startup code */
+ *ns_start_cyw20829.o(.bss* COMMON)
+ *ns_system_cyw20829.o(.bss* COMMON)
+
+ /* drivers */
+ *cy_device.o(.bss* COMMON)
+ *cy_btss.o(.bss* COMMON)
+ *cy_sysclk_v2.o(.bss* COMMON)
+ *cy_syspm_v2.o(.bss* COMMON)
+ *cy_sysint_v2.o(.bss* COMMON)
+ *cy_syslib.o(.bss* COMMON)
+ *ppu_v1.o(.bss* COMMON)
+ *cy_mpc.o(.bss* COMMON)
+ *cy_pd_ppu.o(.bss* COMMON)
+ *cy_smif.o(.bss* COMMON)
+ *cy_smif_memslot.o(.bss* COMMON)
+ *cy_smif_sfdp.o(.bss* COMMON)
+ *cy_gpio.o(.bss* COMMON)
+ *lib_a-memset.o(.bss* COMMON)
+ *lib_a-memcpy-stub.o(.bss* COMMON)
+ KEEP(*(.cy_l1bss*))
+
+ . = ALIGN(4);
+ __bootstrap_bss_end__ = .;
+ } > bsData
+
+ /* Check if bootstrap code + data exceeds RAM limit */
+ ASSERT(__bootstrap_bss_end__ < RAM_END_ADDR_SAHB, "bootstrap region exceeds RAM size !")
+
+ __app_text_vma__ = ORIGIN(xip);
+ __app_text_lma__ = XIP_LMA;
+
+ /* Cortex-M33 application flash area */
+ .appText (__app_text_vma__) : AT (__app_text_lma__)
+ {
+ /* Cortex-M33 flash vector table */
+ . = ALIGN(4);
+ __text_begin = .;
+
+ *(EXCLUDE_FILE(*cy_smif.o *cy_smif_memslot.o *cy_smif_sfdp.o *cy_gpio.o *cy_smif_hybrid_sect.o) .text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* Read-only code (constants). */
+ *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+
+ KEEP(*(.eh_frame*))
+ . = ALIGN(4);
+ __text_end = .;
+
+ } > xip
+
+
+ .copy.table : AT (__app_text_lma__ + (__text_end - __text_begin))
+ {
+ . = ALIGN(4);
+ __copy_table_start__ = .;
+
+ /* Copy data section to RAM */
+ LONG (__etext) /* From */
+ LONG (__data_start__) /* To */
+ LONG ((__data_end__ - __data_start__)/4) /* Size */
+
+ /* Copy appTextRam section to RAM */
+ LONG (__ezerotable) /* From */
+ LONG (__ram_vectors_end__) /* To */
+ LONG ((__app_text_ram_end__ - __app_text_ram_begin__)/4) /* Size */
+
+ . = ALIGN(4);
+ __copy_table_end__ = .;
+ } > xip
+
+
+
+ .ARM.extab : AT (__app_text_lma__ + (__text_end - __text_begin) + (__copy_table_end__ - __copy_table_start__))
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > xip
+
+ __exidx_start = .;
+
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > xip
+ __exidx_end = .;
+
+
+ /* To clear multiple BSS sections,
+ * uncomment .zero.table section and,
+ * define __STARTUP_CLEAR_BSS_MULTIPLE in CAT1B devices */
+ .zero.table : AT (__exidx_end - __app_text_vma__ + __app_text_lma__)
+ {
+ . = ALIGN(4);
+ __zero_table_start__ = .;
+ LONG (__bss_start__)
+ LONG ((__bss_end__ - __bss_start__)/4)
+
+ . = ALIGN(4);
+ __zero_table_end__ = .;
+ } > xip
+}
+
+/* start of bootstrap code sahb address */
+__bootstrap_start_addr__ = RAM_START_ADDR_SAHB + BOOTSTRAP_OFFSET_RAM;
+/* bootstrap size */
+__bootstrap_size__ = __bootstrap_size_end__ - __bootstrap_start_addr__;
diff --git a/boot/cypress/MCUBootApp/config/custom_debug_uart_cfg.h b/boot/cypress/MCUBootApp/config/custom_debug_uart_cfg.h
new file mode 100644
index 0000000..9d99c58
--- /dev/null
+++ b/boot/cypress/MCUBootApp/config/custom_debug_uart_cfg.h
@@ -0,0 +1,41 @@
+/********************************************************************************
+* Copyright 2021 Infineon Technologies AG
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+********************************************************************************/
+
+#if !defined(CUSTOM_DEBUG_UART_CFG_H)
+#define CUSTOM_DEBUG_UART_CFG_H
+
+#if defined(USE_CUSTOM_DEBUG_UART)
+
+/* Define SCB which will be used as UART. */
+#define CUSTOM_UART_HW SCB1
+
+/* Define SCB number which will be used as UART.
+ * It is 'x' in SCBx
+ * */
+#define CUSTOM_UART_SCB_NUMBER 1
+
+#define CUSTOM_UART_PORT 10
+
+/* define RX pin */
+#define CUSTOM_UART_RX_PIN 0
+
+/* define TX pin */
+#define CUSTOM_UART_TX_PIN 1
+
+#endif /* defined(USE_CUSTOM_DEBUG_UART) */
+
+#endif /* CUSTOM_DEBUG_UART_CFG_H */
diff --git a/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h b/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h
index eeb15bc..c2b2348 100644
--- a/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h
+++ b/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h
@@ -22,7 +22,7 @@
/* Default maximum number of flash sectors per image slot; change
* as desirable. */
#ifndef MCUBOOT_MAX_IMG_SECTORS
-#define MCUBOOT_MAX_IMG_SECTORS 128u
+#define MCUBOOT_MAX_IMG_SECTORS 128U
#endif
/*
@@ -39,6 +39,8 @@
// #define MCUBOOT_SIGN_EC
+//#define MCUBOOT_OVERWRITE_ONLY 1
+
/*
* Upgrade mode
*
@@ -52,10 +54,18 @@
/* #define MCUBOOT_OVERWRITE_ONLY_FAST */
#else
/* Using SWAP w Scratch by default.
- * Comment/Uncomment which is needed. */
-#define MCUBOOT_SWAP_USING_SCRATCH 1
-/* #define MCUBOOT_SWAP_USING_MOVE 1 */
-#define MCUBOOT_SWAP_USING_STATUS 1
+ * Uncomment which is needed. */
+#define MCUBOOT_SWAP_USING_SCRATCH 1
+/* #define MCUBOOT_SWAP_USING_MOVE 1 */
+#define MCUBOOT_SWAP_USING_STATUS 1
+#endif
+
+/* This definition is used in boot_copy_region function to define
+ * minimum size of data chunk to be copied. This most likely is equal
+ * to erase size of target hardware.
+ */
+#ifndef MCUBOOT_PLATFORM_CHUNK_SIZE
+#define MCUBOOT_PLATFORM_CHUNK_SIZE 4096U
#endif
/*
@@ -94,6 +104,12 @@
#endif
/*
+ * Currently there is no configuration option, for this platform,
+ * that enables the system specific mcumgr commands in mcuboot
+ */
+#define MCUBOOT_PERUSER_MGMT_GROUP_ENABLED 0
+
+/*
* Logging
*/
@@ -151,7 +167,30 @@
#ifdef ENC_IMG
#define MCUBOOT_ENC_IMAGES
#define MCUBOOT_ENCRYPT_EC256
-#define NUM_ECC_BYTES (256 / 8)
#endif /* ENC_IMG */
+/*
+ * No direct idle call implemented
+ */
+#define MCUBOOT_CPU_IDLE() \
+ do { \
+ } while (0)
+
+/*
+ * Do not save ENCTLV by default
+ */
+//#define MCUBOOT_SWAP_SAVE_ENCTLV 1
+
+/* INFO: Misc functionality defines */
+/*
+#define MCUBOOT_HW_KEY
+#define MCUBOOT_HW_ROLLBACK_PROT
+#define MCUBOOT_MEASURED_BOOT
+#define MCUBOOT_DATA_SHARING
+*/
+/* Use basic fault injection hardening profile */
+//#define MCUBOOT_FIH_PROFILE_LOW
+
+//#define MCUBOOT_FIH_PROFILE_MEDIUM
+
#endif /* MCUBOOT_CONFIG_H */
diff --git a/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_logging.h b/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_logging.h
index 8a91f3f..9869e33 100644
--- a/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_logging.h
+++ b/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_logging.h
@@ -28,6 +28,7 @@
#ifndef MCUBOOT_LOGGING_H
#define MCUBOOT_LOGGING_H
+#include <stdbool.h>
#include <stdio.h>
#define MCUBOOT_LOG_LEVEL_OFF 0
@@ -46,17 +47,23 @@
#define MCUBOOT_LOG_LEVEL MCUBOOT_LOG_LEVEL_INFO
#endif
+#ifdef __BOOTSIM__
int sim_log_enabled(int level);
+#else
+static inline int sim_log_enabled(int level) {
+ (void)level;
+ return 1;
+}
+#endif
-#define sim_log_enabled(x) 1
#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_ERROR
#define MCUBOOT_LOG_ERR(_fmt, ...) \
do { \
- if (sim_log_enabled(MCUBOOT_LOG_LEVEL_ERROR)) { \
- fprintf(stderr, "[ERR] " _fmt "\n\r", ##__VA_ARGS__); \
+ if (sim_log_enabled(MCUBOOT_LOG_LEVEL_ERROR) != 0) { \
+ (void)fprintf(stderr, "[ERR] " _fmt "\n\r", ##__VA_ARGS__); \
} \
- } while (0)
+ } while ((bool)0)
#else
#define MCUBOOT_LOG_ERR(...) IGNORE(__VA_ARGS__)
#endif
@@ -64,10 +71,10 @@
#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_WARNING
#define MCUBOOT_LOG_WRN(_fmt, ...) \
do { \
- if (sim_log_enabled(MCUBOOT_LOG_LEVEL_WARNING)) { \
- fprintf(stderr, "[WRN] " _fmt "\n\r", ##__VA_ARGS__); \
+ if (sim_log_enabled(MCUBOOT_LOG_LEVEL_WARNING) != 0) { \
+ (void)fprintf(stderr, "[WRN] " _fmt "\n\r", ##__VA_ARGS__); \
} \
- } while (0)
+ } while ((bool)0)
#else
#define MCUBOOT_LOG_WRN(...) IGNORE(__VA_ARGS__)
#endif
@@ -75,10 +82,10 @@
#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_INFO
#define MCUBOOT_LOG_INF(_fmt, ...) \
do { \
- if (sim_log_enabled(MCUBOOT_LOG_LEVEL_INFO)) { \
- fprintf(stderr, "[INF] " _fmt "\n\r", ##__VA_ARGS__); \
+ if (sim_log_enabled(MCUBOOT_LOG_LEVEL_INFO) != 0) { \
+ (void)fprintf(stderr, "[INF] " _fmt "\n\r", ##__VA_ARGS__); \
} \
- } while (0)
+ } while ((bool)0)
#else
#define MCUBOOT_LOG_INF(...) IGNORE(__VA_ARGS__)
#endif
@@ -86,10 +93,10 @@
#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_DEBUG
#define MCUBOOT_LOG_DBG(_fmt, ...) \
do { \
- if (sim_log_enabled(MCUBOOT_LOG_LEVEL_DEBUG)) { \
- fprintf(stderr, "[DBG] " _fmt "\n\r", ##__VA_ARGS__); \
+ if (sim_log_enabled(MCUBOOT_LOG_LEVEL_DEBUG) != 0) { \
+ (void)fprintf(stderr, "[DBG] " _fmt "\n\r", ##__VA_ARGS__); \
} \
- } while (0)
+ } while ((bool)0)
#else
#define MCUBOOT_LOG_DBG(...) IGNORE(__VA_ARGS__)
#endif
diff --git a/boot/cypress/MCUBootApp/config/mcuboot_crypto_acc_config.h b/boot/cypress/MCUBootApp/config/mcuboot_crypto_acc_config.h
index b172740..c64be77 100644
--- a/boot/cypress/MCUBootApp/config/mcuboot_crypto_acc_config.h
+++ b/boot/cypress/MCUBootApp/config/mcuboot_crypto_acc_config.h
@@ -23,6 +23,13 @@
#ifndef MCUBOOT_MBEDTLS_DEVICE_H
#define MCUBOOT_MBEDTLS_DEVICE_H
+#ifdef CYW20829
+
+/* Only SHA256 is accelerated by Cryptolite */
+#define MBEDTLS_SHA256_ALT
+
+#else
+
/* Currently this target supports SHA1 */
// #define MBEDTLS_SHA1_C
@@ -51,4 +58,6 @@
#define MBEDTLS_ECDSA_SIGN_ALT
#define MBEDTLS_ECDSA_VERIFY_ALT
+#endif /* CYW20829 */
+
#endif /* MCUBOOT_MBEDTLS_DEVICE_H */
diff --git a/boot/cypress/MCUBootApp/config/mcuboot_crypto_config.h b/boot/cypress/MCUBootApp/config/mcuboot_crypto_config.h
index efb1bda..05b29ea 100644
--- a/boot/cypress/MCUBootApp/config/mcuboot_crypto_config.h
+++ b/boot/cypress/MCUBootApp/config/mcuboot_crypto_config.h
@@ -1607,30 +1607,6 @@
//#define MBEDTLS_SSL_PROTO_SSL3
/**
- * \def MBEDTLS_SSL_PROTO_TLS1
- *
- * Enable support for TLS 1.0.
- *
- * Requires: MBEDTLS_MD5_C
- * MBEDTLS_SHA1_C
- *
- * Comment this macro to disable support for TLS 1.0
- */
-#define MBEDTLS_SSL_PROTO_TLS1
-
-/**
- * \def MBEDTLS_SSL_PROTO_TLS1_1
- *
- * Enable support for TLS 1.1 (and DTLS 1.0 if DTLS is enabled).
- *
- * Requires: MBEDTLS_MD5_C
- * MBEDTLS_SHA1_C
- *
- * Comment this macro to disable support for TLS 1.1 / DTLS 1.0
- */
-#define MBEDTLS_SSL_PROTO_TLS1_1
-
-/**
* \def MBEDTLS_SSL_PROTO_TLS1_2
*
* Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled).
@@ -1762,15 +1738,6 @@
#define MBEDTLS_SSL_SERVER_NAME_INDICATION
/**
- * \def MBEDTLS_SSL_TRUNCATED_HMAC
- *
- * Enable support for RFC 6066 truncated HMAC in SSL.
- *
- * Comment this macro to disable support for truncated HMAC in SSL
- */
-#define MBEDTLS_SSL_TRUNCATED_HMAC
-
-/**
* \def MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
*
* Fallback to old (pre-2.7), non-conforming implementation of the truncated
@@ -2980,6 +2947,7 @@
* This module is required for the SSL/TLS 1.2 PRF function.
*/
#define MBEDTLS_SHA256_C
+#define MBEDTLS_SHA224_C
/**
* \def MBEDTLS_SHA512_C
diff --git a/boot/cypress/MCUBootApp/cy_security_cnt.c b/boot/cypress/MCUBootApp/cy_security_cnt.c
index 81aa54e..d658345 100644
--- a/boot/cypress/MCUBootApp/cy_security_cnt.c
+++ b/boot/cypress/MCUBootApp/cy_security_cnt.c
@@ -14,8 +14,12 @@
* limitations under the License.
*/
-#include "bootutil/security_cnt.h"
+#if defined MCUBootApp && defined MCUBOOT_HW_ROLLBACK_PROT
+
#include <stdint.h>
+#include <string.h>
+#include "bootutil/security_cnt.h"
+#include "cy_security_cnt_platform.h"
fih_int
boot_nv_security_counter_init(void)
@@ -25,20 +29,27 @@
}
fih_int
-boot_nv_security_counter_get(uint32_t image_id, fih_int *security_cnt)
+boot_nv_security_counter_get(uint32_t image_id, fih_uint *security_cnt)
{
(void)image_id;
- *security_cnt = 30;
+ fih_int fih_ret = FIH_FAILURE;
- return 0;
+ if (NULL != security_cnt) {
+ FIH_CALL(platform_security_counter_get, fih_ret, security_cnt);
+ }
+
+ FIH_RET(fih_ret);
}
int32_t
-boot_nv_security_counter_update(uint32_t image_id, uint32_t img_security_cnt)
+boot_nv_security_counter_update(uint32_t image_id, uint32_t img_security_cnt, void * custom_data)
{
(void)image_id;
- (void)img_security_cnt;
+
+ int32_t rc = platform_security_counter_update(img_security_cnt, (uint8_t *)custom_data);
/* Do nothing. */
- return 0;
+ return rc;
}
+
+#endif /* defined MCUBootApp && defined MCUBOOT_HW_ROLLBACK_PROT */
diff --git a/boot/cypress/MCUBootApp/cy_serial_flash_prog.c b/boot/cypress/MCUBootApp/cy_serial_flash_prog.c
index 512df93..8bf7d8e 100644
--- a/boot/cypress/MCUBootApp/cy_serial_flash_prog.c
+++ b/boot/cypress/MCUBootApp/cy_serial_flash_prog.c
@@ -42,6 +42,10 @@
extern "C" {
#endif
+#ifdef CY_BOOT_USE_EXTERNAL_FLASH
+
+extern const cy_stc_smif_block_config_t smifBlockConfig;
+
typedef struct
{
const cy_stc_smif_block_config_t * smifCfg; /* Pointer to SMIF top-level configuration */
@@ -64,7 +68,11 @@
CY_SECTION(".cy_sflash_user_data") __attribute__( (used) )
/* const stc_smif_ipblocks_arr_t smifIpBlocksArr = {&smifBlockConfig_sfdp, 0x00000000}; */
/* if used zero-pointer to config, DAP link will use hardcoded config for CY8CPROTO-062-4343W */
-const stc_smif_ipblocks_arr_t smifIpBlocksArr = {0x00000000, 0x00000000};
+static const stc_smif_ipblocks_arr_t smifIpBlocksArr =
+{
+ .smifCfg = &smifBlockConfig,
+ .null_t = 0x00000000
+};
/**
* This data is used to populate the table of contents part 2. When present, it is used by the boot
@@ -75,7 +83,7 @@
* or by running 'cymcuelftool -S' to recompute the checksum.
*/
CY_SECTION(".cy_toc_part2") __attribute__( (used) )
-const uint32_t cyToc[128] =
+static const uint32_t cyToc[128] =
{
0x200-4, /* Offset=0x0000: Object Size, bytes */
0x01211220, /* Offset=0x0004: Magic Number (TOC Part 2, ID) */
@@ -93,6 +101,8 @@
/** \} group_serial_flash_variables */
+#endif /* CY_BOOT_USE_EXTERNAL_FLASH */
+
#if defined(__cplusplus)
}
#endif
diff --git a/boot/cypress/MCUBootApp/keys.c b/boot/cypress/MCUBootApp/keys.c
index 4dbd5af..a3d00a2 100644
--- a/boot/cypress/MCUBootApp/keys.c
+++ b/boot/cypress/MCUBootApp/keys.c
@@ -55,6 +55,7 @@
*
********************************************************************************/
#include <bootutil/sign_key.h>
+#include <bootutil/enc_key.h>
#include <mcuboot_config/mcuboot_config.h>
#if !defined(MCUBOOT_HW_KEY)
@@ -175,7 +176,7 @@
const int bootutil_key_cnt = 1;
#endif /* !MCUBOOT_HW_KEY */
-unsigned char enc_priv_key[] = {
+static const unsigned char enc_priv_key[] = {
0x30, 0x81, 0x87, 0x02, 0x01, 0x00, 0x30, 0x13, 0x06, 0x07, 0x2a, 0x86,
0x48, 0xce, 0x3d, 0x02, 0x01, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d,
0x03, 0x01, 0x07, 0x04, 0x6d, 0x30, 0x6b, 0x02, 0x01, 0x01, 0x04, 0x20,
diff --git a/boot/cypress/MCUBootApp/libs.mk b/boot/cypress/MCUBootApp/libs.mk
index 3fe8220..da58c88 100644
--- a/boot/cypress/MCUBootApp/libs.mk
+++ b/boot/cypress/MCUBootApp/libs.mk
@@ -26,71 +26,74 @@
################################################################################
# PDL library
################################################################################
+
PDL_VERSION = 121
THIS_APP_PATH = $(PRJ_DIR)/libs
MBEDTLS_PATH = $(PRJ_DIR)/../../ext
-# Add platform folder to build
-SOURCES_PLATFORM += $(wildcard $(PRJ_DIR)/platforms/*.c)
+# Add watchdog folder to build
SOURCES_WATCHDOG := $(wildcard $(THIS_APP_PATH)/watchdog/*.c)
# Add retartget IO implementation using pdl
-SOURCES_RETARGET_IO_PDL += $(wildcard $(THIS_APP_PATH)/retarget_io_pdl/*.c)
+SOURCES_RETARGET_IO_PDL := $(PLATFORM_SOURCES_RETARGET_IO_PDL)
# Collect dirrectories containing headers for PLATFORM
-INCLUDE_RETARGET_IO_PDL += $(THIS_APP_PATH)/retarget_io_pdl
+INCLUDE_RETARGET_IO_PDL := $(PLATFORM_INCLUDE_RETARGET_IO_PDL)
# PSOC6HAL source files
-SOURCES_HAL += $(THIS_APP_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/cyhal_crypto_common.c
-SOURCES_HAL += $(THIS_APP_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/cyhal_hwmgr.c
+SOURCES_HAL_MCUB := $(PLATFORM_SOURCES_HAL_MCUB)
+
+# PSOC6HAL include dirs
+INCLUDE_DIRS_HAL_MCUB := $(PLATFORM_INCLUDE_DIRS_HAL_MCUB)
# MbedTLS source files
SOURCES_MBEDTLS := $(wildcard $(MBEDTLS_PATH)/mbedtls/library/*.c)
-SOURCES_MBEDTLS += $(wildcard $(MBEDTLS_PATH)/mbedtls/crypto/library/*.c)
# Collected source files for libraries
-SOURCES_LIBS += $(SOURCES_HAL)
SOURCES_LIBS += $(SOURCES_MBEDTLS)
SOURCES_LIBS += $(SOURCES_WATCHDOG)
-SOURCES_LIBS += $(SOURCES_PLATFORM)
+
+# Collect source files for platform dependent libraries
+SOURCES_LIBS += $(SOURCES_HAL_MCUB)
SOURCES_LIBS += $(SOURCES_RETARGET_IO_PDL)
-# Include platforms folder
-INCLUDE_DIRS_PLATFORM := $(PRJ_DIR)/platforms
-
-# needed for Crypto HW Acceleration and headers inclusion, do not use for peripherals
-# peripherals should be accessed
-INCLUDE_DIRS_HAL := $(THIS_APP_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include
-INCLUDE_DIRS_HAL += $(THIS_APP_PATH)/psoc6hal/include
-INCLUDE_DIRS_HAL += $(THIS_APP_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include/pin_packages
-
-# MbedTLS related include directories
-INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/include
-INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/include/mbedtls
-INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/crypto/include
-INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/crypto/include/mbedtls
-
# Watchdog related includes
INCLUDE_DIRS_WATCHDOG := $(THIS_APP_PATH)/watchdog
+# MbedTLS related include directories
+INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/include
+INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/include/mbedtls
+INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/include/psa
+INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/library
+
# Collected include directories for libraries
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_HAL))
INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_WATCHDOG))
INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_MBEDTLS))
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_RETARGET_IO_PDL))
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_PLATFORM))
-################################################################################
-# mbedTLS hardware acceleration settings
-################################################################################
-ifeq ($(USE_CRYPTO_HW), 1)
-# cy-mbedtls-acceleration related include directories
-INCLUDE_DIRS_MBEDTLS_MXCRYPTO := $(THIS_APP_PATH)/cy-mbedtls-acceleration/mbedtls_MXCRYPTO
-# Collect source files for MbedTLS acceleration
-SOURCES_MBEDTLS_MXCRYPTO := $(wildcard $(THIS_APP_PATH)/cy-mbedtls-acceleration/mbedtls_MXCRYPTO/*.c)
-#
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_MBEDTLS_MXCRYPTO))
-# Collected source files for libraries
-SOURCES_LIBS += $(SOURCES_MBEDTLS_MXCRYPTO)
+# Collect platform dependent include dirs
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_HAL_MCUB))
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_RETARGET_IO_PDL))
+
+###############################################################################
+# Print debug information about all settings used and/or set in this file
+ifeq ($(VERBOSE), 1)
+$(info #### libs.mk ####)
+$(info INCLUDE_DIRS_HAL_MCUB <-> $(INCLUDE_DIRS_HAL_MCUB))
+$(info INCLUDE_DIRS_LIBS --> $(INCLUDE_DIRS_LIBS))
+$(info INCLUDE_DIRS_MBEDTLS <-> $(INCLUDE_DIRS_MBEDTLS))
+$(info INCLUDE_DIRS_WATCHDOG <-> $(INCLUDE_DIRS_WATCHDOG))
+$(info INCLUDE_RETARGET_IO_PDL <-> $(INCLUDE_RETARGET_IO_PDL))
+$(info MBEDTLS_PATH <-- $(MBEDTLS_PATH))
+$(info PLATFORM_INCLUDE_DIRS_HAL_MCUB <-- $(PLATFORM_INCLUDE_DIRS_HAL_MCUB))
+$(info PLATFORM_INCLUDE_RETARGET_IO_PDL <-- $(PLATFORM_INCLUDE_RETARGET_IO_PDL))
+$(info PLATFORM_SOURCES_HAL_MCUB <-- $(PLATFORM_SOURCES_HAL_MCUB))
+$(info PLATFORM_SOURCES_RETARGET_IO_PDL <-- $(PLATFORM_SOURCES_RETARGET_IO_PDL))
+$(info PRJ_DIR <-- $(PRJ_DIR))
+$(info SOURCES_HAL_MCUB <-> $(SOURCES_HAL_MCUB))
+$(info SOURCES_LIBS --> $(SOURCES_LIBS))
+$(info SOURCES_MBEDTLS <-> $(SOURCES_MBEDTLS))
+$(info SOURCES_RETARGET_IO_PDL <-> $(SOURCES_RETARGET_IO_PDL))
+$(info SOURCES_WATCHDOG <-> $(SOURCES_WATCHDOG))
+$(info THIS_APP_PATH <-- $(THIS_APP_PATH))
endif
diff --git a/boot/cypress/MCUBootApp/main.c b/boot/cypress/MCUBootApp/main.c
index dee1e1a..6097173 100644
--- a/boot/cypress/MCUBootApp/main.c
+++ b/boot/cypress/MCUBootApp/main.c
@@ -17,16 +17,28 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
+#include <inttypes.h>
+#include <stdbool.h>
+
/* Cypress pdl headers */
#include "cy_pdl.h"
-#include "cy_retarget_io_pdl.h"
-#include "cy_result.h"
+#ifdef CYW20829
+#include "cy_retarget_io.h"
+#include "cybsp.h"
+#include "cyhal_wdt.h"
+#include "cyw_20829_utils.h"
+#include "cy_service_app.h"
+#else
+#include "cy_retarget_io_pdl.h"
#include "cycfg_clocks.h"
#include "cycfg_peripherals.h"
-#include "cycfg_pins.h"
+#endif /* CYW20829 */
#include "flash_qspi.h"
+
+#include "cycfg_pins.h"
+#include "cy_result.h"
#include "sysflash/sysflash.h"
#include "flash_map_backend/flash_map_backend.h"
@@ -40,137 +52,261 @@
#include "watchdog.h"
+#define CY_RSLT_MODULE_MCUBOOTAPP 0x500U
+#define CY_RSLT_MODULE_MCUBOOTAPP_MAIN 0x51U
+
+/** General module error */
+#define MCUBOOTAPP_RSLT_ERR \
+ (CY_RSLT_CREATE_EX(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_MCUBOOTAPP, CY_RSLT_MODULE_MCUBOOTAPP_MAIN, 0))
+
/* WDT time out for reset mode, in milliseconds. */
#define WDT_TIME_OUT_MS 4000
-/* Define pins for UART debug output */
-#define CYBSP_UART_ENABLED 1U
-#define CYBSP_UART_HW SCB5
-#define CYBSP_UART_IRQ scb_5_interrupt_IRQn
-
#ifdef CY_BOOT_USE_EXTERNAL_FLASH
/* Choose SMIF slot number (slave select).
* Acceptable values are:
* 0 - SMIF disabled (no external memory);
* 1, 2, 3 or 4 - slave select line memory module is connected to.
*/
-uint32_t smif_id = 1; /* Assume SlaveSelect_0 is used for External Memory */
-#endif
+#define SMIF_ID (1U) /* Assume SlaveSelect_0 is used for External Memory */
+#endif /* CY_BOOT_USE_EXTERNAL_FLASH */
+#define BOOT_MSG_FINISH "MCUBoot Bootloader finished.\n" \
+ "Deinitializing hardware..."
-void hw_deinit(void);
+static void hw_deinit(void);
-static void do_boot(struct boot_rsp *rsp)
+static inline __attribute__((always_inline))
+fih_uint calc_app_addr(uintptr_t flash_base, const struct boot_rsp *rsp)
{
- uint32_t app_addr = 0;
+ return fih_uint_encode(flash_base +
+ rsp->br_image_off +
+ rsp->br_hdr->ih_hdr_size);
+}
- app_addr = (rsp->br_image_off + rsp->br_hdr->ih_hdr_size);
+#ifdef CYW20829
- BOOT_LOG_INF("Starting User Application on CM4 (wait)...");
- BOOT_LOG_INF("Start Address: 0x%08lx", app_addr);
- BOOT_LOG_INF("Deinitializing hardware...");
+#if defined(CY_BOOT_USE_EXTERNAL_FLASH) && !defined(MCUBOOT_ENC_IMAGES_XIP)
+CY_RAMFUNC_BEGIN /* SMIF will be deinitialized in this case! */
+#else
+inline __attribute__((always_inline))
+#endif /* defined(CY_BOOT_USE_EXTERNAL_FLASH) && !defined(MCUBOOT_ENC_IMAGES_XIP) */
+__NO_RETURN
+static void cyw20829_launch_app(fih_uint app_addr, uint32_t *key, uint32_t *iv)
+{
+#if defined(CY_BOOT_USE_EXTERNAL_FLASH) && !defined(MCUBOOT_ENC_IMAGES_XIP)
+ qspi_deinit(SMIF_ID);
+#endif /* defined(CY_BOOT_USE_EXTERNAL_FLASH) && !defined(MCUBOOT_ENC_IMAGES_XIP) */
+ cyw20829_RunApp(app_addr, key, iv);
+}
+#if defined(CY_BOOT_USE_EXTERNAL_FLASH) && !defined(MCUBOOT_ENC_IMAGES_XIP)
+CY_RAMFUNC_END /* SMIF will be deinitialized in this case! */
+#endif /* defined(CY_BOOT_USE_EXTERNAL_FLASH) && !defined(MCUBOOT_ENC_IMAGES_XIP) */
- cy_retarget_io_wait_tx_complete(CYBSP_UART_HW, 10);
+#endif /* CYW20829 */
- hw_deinit();
+static bool do_boot(struct boot_rsp *rsp)
+{
+ uintptr_t flash_base = 0;
- Cy_SysEnableCM4(app_addr);
+#ifdef CYW20829
+ uint32_t *key = NULL;
+ uint32_t *iv = NULL;
+#endif /* CYW20829 */
+
+ if (rsp != NULL) {
+ int rc = flash_device_base(rsp->br_flash_dev_id, &flash_base);
+
+ if (0 == rc) {
+ fih_uint app_addr = calc_app_addr(flash_base, rsp);
+
+ BOOT_LOG_INF("Starting User Application (wait)...");
+ if (IS_ENCRYPTED(rsp->br_hdr)) {
+ BOOT_LOG_DBG(" * User application is encrypted");
+ }
+ BOOT_LOG_INF("Start slot Address: 0x%08" PRIx32, (uint32_t)fih_uint_decode(app_addr));
+
+ rc = flash_device_base(rsp->br_flash_dev_id, &flash_base);
+ if ((rc != 0) || fih_uint_not_eq(calc_app_addr(flash_base, rsp), app_addr)) {
+ return false;
+ }
+
+#ifdef CYW20829
+#ifdef MCUBOOT_ENC_IMAGES_XIP
+ if (IS_ENCRYPTED(rsp->br_hdr)) {
+ key = rsp->xip_key;
+ iv = rsp->xip_iv;
+ } else {
+ BOOT_LOG_ERR("User image is not encrypted, while MCUBootApp is compiled with encryption support.");
+ return false;
+ }
+#endif /* MCUBOOT_ENC_IMAGES_XIP */
+ /* This function does not return */
+ BOOT_LOG_INF(BOOT_MSG_FINISH);
+ hw_deinit();
+ cyw20829_launch_app(app_addr, key, iv);
+#else
+ /* This function turns on CM4 and returns */
+ BOOT_LOG_INF(BOOT_MSG_FINISH);
+
+ hw_deinit();
+#ifdef USE_XIP
+ BOOT_LOG_DBG("XIP: Switch to SMIF XIP mode");
+ qspi_set_mode(CY_SMIF_MEMORY);
+#endif
+ Cy_SysEnableCM4(fih_uint_decode(app_addr));
+ return true;
+#endif /* CYW20829 */
+ } else {
+ BOOT_LOG_ERR("Flash device ID not found");
+ return false;
+ }
+ }
+
+ return false;
}
int main(void)
{
struct boot_rsp rsp;
- cy_rslt_t rc = CY_RSLT_TYPE_ERROR;
+ cy_rslt_t rc = MCUBOOTAPP_RSLT_ERR;
bool boot_succeeded = false;
fih_int fih_rc = FIH_FAILURE;
+#ifdef CYW20829
+ rc = cybsp_init();
+ if (rc != CY_RSLT_SUCCESS) {
+ CY_ASSERT((bool)0);
+ /* Loop forever... */
+ while (true) {
+ __WFI();
+ }
+ }
+#else
SystemInit();
- //init_cycfg_clocks();
init_cycfg_peripherals();
init_cycfg_pins();
+#endif /* CYW20829 */
+ /* enable interrupts */
+ __enable_irq();
- /* Certain PSoC 6 devices enable CM4 by default at startup. It must be
+ /* Certain PSoC 6 devices enable CM4 by default at startup. It must be
* either disabled or enabled & running a valid application for flash write
* to work from CM0+. Since flash write may happen in boot_go() for updating
* the image before this bootloader app can enable CM4 in do_boot(), we need
* to keep CM4 disabled. Note that debugging of CM4 is not supported when it
* is disabled.
*/
- #if defined(CY_DEVICE_PSOC6ABLE2)
- if (CY_SYS_CM4_STATUS_ENABLED == Cy_SysGetCM4Status())
- {
+#ifndef CYW20829
+#if defined(CY_DEVICE_PSOC6ABLE2)
+ if (CY_SYS_CM4_STATUS_ENABLED == Cy_SysGetCM4Status()) {
Cy_SysDisableCM4();
}
- #endif /* #if defined(CY_DEVICE_PSOC6ABLE2) */
-
- /* enable interrupts */
- __enable_irq();
+#endif /* defined(CY_DEVICE_PSOC6ABLE2) */
/* Initialize retarget-io to use the debug UART port (CYBSP_UART_HW) */
- rc = cy_retarget_io_pdl_init(115200u);
-
- if (rc != CY_RSLT_SUCCESS)
- {
- CY_ASSERT(0);
+ rc = cy_retarget_io_pdl_init(CY_RETARGET_IO_BAUDRATE);
+#else
+ /* Initialize retarget-io to use the debug UART port */
+ rc = cy_retarget_io_init(CYBSP_DEBUG_UART_TX,
+ CYBSP_DEBUG_UART_RX,
+ CY_RETARGET_IO_BAUDRATE);
+#endif /* CYW20829 */
+ if (rc != CY_RSLT_SUCCESS) {
+ CY_ASSERT((bool)0);
+ /* Loop forever... */
+ while (true) {
+ __WFI();
+ }
}
BOOT_LOG_INF("MCUBoot Bootloader Started");
#ifdef CY_BOOT_USE_EXTERNAL_FLASH
- rc = CY_SMIF_CMD_NOT_FOUND;
+ {
+ cy_en_smif_status_t qspi_status = qspi_init_sfdp(SMIF_ID);
- rc = qspi_init_sfdp(smif_id);
- if (rc == CY_SMIF_SUCCESS)
- {
- BOOT_LOG_INF("External Memory initialized w/ SFDP.");
+ if (CY_SMIF_SUCCESS == qspi_status) {
+ rc = CY_RSLT_SUCCESS;
+ BOOT_LOG_INF("External Memory initialized w/ SFDP.");
+ } else {
+ rc = MCUBOOTAPP_RSLT_ERR;
+ BOOT_LOG_ERR("External Memory initialization w/ SFDP FAILED: 0x%08" PRIx32, (uint32_t)qspi_status);
+ }
}
- else
- {
- BOOT_LOG_ERR("External Memory initialization w/ SFDP FAILED: 0x%02x", (int)rc);
- }
- if (CY_SMIF_SUCCESS == rc)
-#endif
- {
+ if (CY_RSLT_SUCCESS == rc)
+#endif /* CY_BOOT_USE_EXTERNAL_FLASH */
+ {
+#if defined(CYW20829) && defined(MCUBOOT_HW_ROLLBACK_PROT)
+ /* Check service application completion status */
+ if (check_service_app_status() != 0) {
+ BOOT_LOG_ERR("Service application failed");
+ CY_ASSERT((bool)0);
+ /* Loop forever... */
+ while (true) {
+ __WFI();
+ }
+ }
+#endif /* CYW20829 && MCUBOOT_HW_ROLLBACK_PROT */
+
+ (void)memset(&rsp, 0, sizeof(rsp));
FIH_CALL(boot_go, fih_rc, &rsp);
- if (fih_eq(fih_rc, FIH_SUCCESS))
- {
+ if (true == fih_eq(fih_rc, FIH_SUCCESS)) {
BOOT_LOG_INF("User Application validated successfully");
/* initialize watchdog timer. it should be updated from user app
* to mark successful start up of this app. if the watchdog is not updated,
* reset will be initiated by watchdog timer and swap revert operation started
* to roll back to operable image.
*/
- cy_wdg_init(WDT_TIME_OUT_MS);
- do_boot(&rsp);
- boot_succeeded = true;
- }
- else
- {
- BOOT_LOG_INF("MCUBoot Bootloader found none of bootable images");
+#ifdef CYW20829
+ cyhal_wdt_t *cyw20829_wdt = NULL;
+
+ rc = cyhal_wdt_init(cyw20829_wdt, WDT_TIME_OUT_MS);
+#else
+ rc = cy_wdg_init(WDT_TIME_OUT_MS);
+#endif /* CYW20829 */
+ if (CY_RSLT_SUCCESS == rc) {
+
+ boot_succeeded = do_boot(&rsp);
+
+ if (!boot_succeeded) {
+ BOOT_LOG_ERR("Boot of next app failed");
+ }
+ } else {
+ BOOT_LOG_ERR("Failed to init WDT");
+ }
+ } else {
+ BOOT_LOG_ERR("MCUBoot Bootloader found none of bootable images");
}
}
- while (1)
- {
+ while (true) {
if (boot_succeeded) {
- Cy_SysPm_CpuEnterDeepSleep(CY_SYSPM_WAIT_FOR_INTERRUPT);
- }
- else {
+ (void)Cy_SysPm_CpuEnterDeepSleep(CY_SYSPM_WAIT_FOR_INTERRUPT);
+ } else {
__WFI();
}
}
-
- return 0;
}
-void hw_deinit(void)
+static void hw_deinit(void)
{
+#ifdef CYW20829
+ /* Flush the TX buffer, need to be fixed in retarget_io */
+ Cy_SysLib_Delay(50);
+
+ cy_retarget_io_deinit();
+ cy_wdg_stop();
+ cy_wdg_free();
+ /* Note: qspi_deinit() is called (if needed) in cyw20829_launch_app() above */
+#else
+ cy_retarget_io_wait_tx_complete(CYBSP_UART_HW, 10);
cy_retarget_io_pdl_deinit();
Cy_GPIO_Port_Deinit(CYBSP_UART_RX_PORT);
Cy_GPIO_Port_Deinit(CYBSP_UART_TX_PORT);
-
-#ifdef CY_BOOT_USE_EXTERNAL_FLASH
- qspi_deinit(smif_id);
-#endif
+#if defined(CY_BOOT_USE_EXTERNAL_FLASH) && !defined(MCUBOOT_ENC_IMAGES_XIP) && !defined(USE_XIP)
+ qspi_deinit(SMIF_ID);
+#endif /* defined(CY_BOOT_USE_EXTERNAL_FLASH) && !defined(MCUBOOT_ENC_IMAGES_XIP) */
+#endif /* CYW20829 */
}
diff --git a/boot/cypress/MCUBootApp/sysflash/sysflash.h b/boot/cypress/MCUBootApp/sysflash/sysflash.h
deleted file mode 100644
index 961e74e..0000000
--- a/boot/cypress/MCUBootApp/sysflash/sysflash.h
+++ /dev/null
@@ -1,186 +0,0 @@
-/* Manual version of auto-generated version. */
-
-#ifndef SYSFLASH_H
-#define SYSFLASH_H
-
-#include <stdint.h>
-#include "cy_syslib.h"
-
-#define FLASH_AREA_BOOTLOADER (0)
-#define FLASH_AREA_IMAGE_0 (1u)
-#define FLASH_AREA_IMAGE_1 (2u)
-#define FLASH_AREA_IMAGE_SCRATCH (3u)
-#define FLASH_AREA_IMAGE_2 (5u)
-#define FLASH_AREA_IMAGE_3 (6u)
-#define FLASH_AREA_IMAGE_SWAP_STATUS (7u)
-
-/* it is related to multi-image case */
-#define FLASH_AREA_IMAGE_IDX_1 (0u)
-#define FLASH_AREA_IMAGE_IDX_2 (1u)
-
-/* This defines if External Flash (SMIF) will be used for Upgrade Slots */
-/* #define CY_BOOT_USE_EXTERNAL_FLASH */
-
-/* use PDL-defined offset or one from SMFI config */
-#define CY_SMIF_BASE_MEM_OFFSET (0x18000000)
-
-#define CY_FLASH_ALIGN (CY_FLASH_SIZEOF_ROW)
-#define CY_FLASH_DEVICE_BASE (CY_FLASH_BASE)
-
-#ifndef CY_BOOT_SCRATCH_SIZE
-#ifndef CY_BOOT_USE_EXTERNAL_FLASH
-#define CY_BOOT_SCRATCH_SIZE (0x1000u)
-#else /* CY_BOOT_USE_EXTERNAL_FLASH */
-#define CY_BOOT_SCRATCH_SIZE (0x80000)
-#endif /* CY_BOOT_USE_EXTERNAL_FLASH */
-#endif /* CY_BOOT_SCRATCH_SIZE */
-
-#ifndef CY_BOOT_SWAP_STATUS_SIZE
-#define CY_BOOT_SWAP_STATUS_SIZE (BOOT_SWAP_STATUS_SZ_PRIM + BOOT_SWAP_STATUS_SZ_SEC)
-#endif
-
-#ifndef CY_BOOT_BOOTLOADER_SIZE
-#define CY_BOOT_BOOTLOADER_SIZE (0x18000)
-#endif
-
-/* Sizes of CY_BOOT_IMAGE_1_SIZE and CY_BOOT_IMAGE_2_SIZE
- * can be defined from build system. Use default values otherwise
-*/
-#ifndef CY_BOOT_USE_EXTERNAL_FLASH
-#ifndef CY_BOOT_IMAGE_1_SIZE
-#define CY_BOOT_IMAGE_1_SIZE (0x10000)
-#endif /* CY_BOOT_IMAGE_1_SIZE */
-#if (MCUBOOT_IMAGE_NUMBER == 2)
-#ifndef CY_BOOT_IMAGE_2_SIZE
-#define CY_BOOT_IMAGE_2_SIZE (0x20000)
-#endif /* CY_BOOT_IMAGE_2_SIZE */
-#endif /* (MCUBOOT_IMAGE_NUMBER == 2) */
-#else /* CY_BOOT_USE_EXTERNAL_FLASH */
-#ifndef CY_BOOT_IMAGE_1_SIZE
-#define CY_BOOT_IMAGE_1_SIZE (0xC0000)
-#endif /* CY_BOOT_IMAGE_1_SIZE */
-#if (MCUBOOT_IMAGE_NUMBER == 2)
-#ifndef CY_BOOT_IMAGE_2_SIZE
-#define CY_BOOT_IMAGE_2_SIZE (0xC0000)
-#endif /* CY_BOOT_IMAGE_2_SIZE */
-#endif /* (MCUBOOT_IMAGE_NUMBER == 2) */
-#endif /* CY_BOOT_USE_EXTERNAL_FLASH */
-
-#ifndef CY_BOOT_PRIMARY_1_SIZE
-#define CY_BOOT_PRIMARY_1_SIZE CY_BOOT_IMAGE_1_SIZE
-#endif
-
-#ifndef CY_BOOT_SECONDARY_1_SIZE
-#define CY_BOOT_SECONDARY_1_SIZE CY_BOOT_IMAGE_1_SIZE
-#endif
-
-#if (MCUBOOT_IMAGE_NUMBER == 2) /* if dual-image */
-#ifndef CY_BOOT_PRIMARY_2_SIZE
-#define CY_BOOT_PRIMARY_2_SIZE CY_BOOT_IMAGE_2_SIZE
-#endif
-
-#ifndef CY_BOOT_SECONDARY_2_SIZE
-#define CY_BOOT_SECONDARY_2_SIZE CY_BOOT_IMAGE_2_SIZE
-#endif
-#endif
-
-#ifndef CY_BOOT_EXTERNAL_FLASH_SECONDARY_1_OFFSET
-#define CY_BOOT_EXTERNAL_FLASH_SECONDARY_1_OFFSET (0x0u)
-#endif
-
-#ifndef CY_BOOT_EXTERNAL_FLASH_SECONDARY_2_OFFSET
-#define CY_BOOT_EXTERNAL_FLASH_SECONDARY_2_OFFSET (0x240000u)
-#endif
-
-#ifndef CY_BOOT_EXTERNAL_FLASH_SCRATCH_OFFSET
-#define CY_BOOT_EXTERNAL_FLASH_SCRATCH_OFFSET (0x440000u)
-#endif
-
-#ifndef CY_BOOT_SECONDARY_1_EXT_MEM_OFFSET
-#define CY_BOOT_SECONDARY_1_EXT_MEM_OFFSET (CY_SMIF_BASE_MEM_OFFSET + CY_BOOT_EXTERNAL_FLASH_SECONDARY_1_OFFSET)
-#endif
-
-#ifndef CY_BOOT_SECONDARY_2_EXT_MEM_OFFSET
-#define CY_BOOT_SECONDARY_2_EXT_MEM_OFFSET (CY_SMIF_BASE_MEM_OFFSET + CY_BOOT_EXTERNAL_FLASH_SECONDARY_2_OFFSET)
-#endif
-
-#define BOOT_MAX_SWAP_STATUS_SECTORS (64)
-
-#if (MCUBOOT_IMAGE_NUMBER == 1)
-#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? \
- FLASH_AREA_IMAGE_0 : \
- FLASH_AREA_IMAGE_0)
-#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? \
- FLASH_AREA_IMAGE_1 : \
- FLASH_AREA_IMAGE_1)
-
-#elif (MCUBOOT_IMAGE_NUMBER == 2)
-
-#ifndef CY_FLASH_MAP_EXT_DESC
-#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? \
- FLASH_AREA_IMAGE_0 : \
- ((x) == 1) ? \
- FLASH_AREA_IMAGE_2 : \
- 255)
-#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? \
- FLASH_AREA_IMAGE_1 : \
- ((x) == 1) ? \
- FLASH_AREA_IMAGE_3 : \
- 255)
-#else
-__STATIC_INLINE uint8_t FLASH_AREA_IMAGE_PRIMARY(uint32_t areaID)
-{
- uint8_t result;
-
- if (0U == areaID)
- {
- result = FLASH_AREA_IMAGE_0;
- }
- else
- if (1U == areaID)
- {
- result = FLASH_AREA_IMAGE_2;
- }
- else
- {
- result = 0xFF;
- }
-
- return result;
-}
-
-__STATIC_INLINE uint8_t FLASH_AREA_IMAGE_SECONDARY(uint32_t areaID)
-{
- uint8_t result;
-
- if (0U == areaID)
- {
- result = FLASH_AREA_IMAGE_1;
- }
- else
- if (1U == areaID)
- {
- result = FLASH_AREA_IMAGE_3;
- }
- else
- {
- result = 0xFF;
- }
-
- return result;
-}
-#endif
-#endif
-
-// #else
-// #warning "Image slot and flash area mapping is not defined"
-// #endif
-
-#define CY_IMG_HDR_SIZE 0x400
-
-#ifndef CY_FLASH_MAP_EXT_DESC
-/* Uncomment in case you want to use separately defined table of flash area descriptors */
-/* #define CY_FLASH_MAP_EXT_DESC */
-#endif
-
-#endif /* SYSFLASH_H */