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Andrzej Puzdrowski9a605b62020-03-16 13:34:30 +01001/*
2 * Copyright (c) 2020 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
Piotr Mienkowskia5046692020-04-02 01:41:54 +02007#include <arch/arm/aarch32/cortex_m/cmsis.h>
Andrzej Puzdrowski9a605b62020-03-16 13:34:30 +01008
9void cleanup_arm_nvic(void) {
10 /* Allow any pending interrupts to be recognized */
11 __ISB();
12 __disable_irq();
13
14 /* Disable NVIC interrupts */
Kumar Gala0813efe2020-05-27 12:25:41 -050015 for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {
Andrzej Puzdrowski9a605b62020-03-16 13:34:30 +010016 NVIC->ICER[i] = 0xFFFFFFFF;
17 }
18 /* Clear pending NVIC interrupts */
Kumar Gala0813efe2020-05-27 12:25:41 -050019 for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICPR); i++) {
Andrzej Puzdrowski9a605b62020-03-16 13:34:30 +010020 NVIC->ICPR[i] = 0xFFFFFFFF;
21 }
22}
Ioannis Glaropoulos70af7082020-10-22 15:14:48 +020023
24__weak void z_arm_clear_arm_mpu_config(void)
25{
26 int i;
27
28 int num_regions =
29 ((MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos);
30
31 for (i = 0; i < num_regions; i++) {
32 ARM_MPU_ClrRegion(i);
33 }
34}