Dovhal Artem (CSUKR CSS ICW SW FW 1) | f7a3d1b | 2022-04-01 15:07:37 +0000 | [diff] [blame^] | 1 | #ifndef PLATFORM_H |
| 2 | #define PLATFORM_H |
| 3 | |
| 4 | #ifdef CYW20829 |
| 5 | #include <inttypes.h> |
| 6 | |
| 7 | #include "cybsp.h" |
| 8 | #include "cycfg_pins.h" |
| 9 | #include "cyhal_wdt.h" |
| 10 | #else |
| 11 | #include "system_psoc6.h" |
| 12 | #endif /* CYW20829 */ |
| 13 | |
| 14 | #include <stdio.h> |
| 15 | |
| 16 | #include "cy_pdl.h" |
| 17 | #ifdef APP_CM0P |
| 18 | #include "cycfg_peripherals.h" |
| 19 | #include "cycfg_pins.h" |
| 20 | #include "cy_retarget_io_pdl.h" |
| 21 | #else |
| 22 | #include "cyhal.h" |
| 23 | #include "cy_retarget_io.h" |
| 24 | |
| 25 | #endif /* APP_CM0P */ |
| 26 | #include "watchdog.h" |
| 27 | |
| 28 | #if defined(CY_BOOT_USE_EXTERNAL_FLASH) || defined(CYW20829) |
| 29 | #include "flash_qspi.h" |
| 30 | #endif /* defined(CY_BOOT_USE_EXTERNAL_FLASH) || defined(CYW20829) */ |
| 31 | |
| 32 | #ifdef BOOT_IMAGE |
| 33 | #define IMAGE_TYPE "BOOT" |
| 34 | #define BLINK_PERIOD (1000u) |
| 35 | #define GREETING_MESSAGE_INFO "[BlinkyApp] Red led blinks with 1 sec period\r\n" |
| 36 | #elif defined(UPGRADE_IMAGE) |
| 37 | #define IMAGE_TYPE "UPGRADE" |
| 38 | #define BLINK_PERIOD (250u) |
| 39 | #define GREETING_MESSAGE_INFO "[BlinkyApp] Red led blinks with 0.25 sec period\r\n" |
| 40 | #else |
| 41 | #error "[BlinkyApp] Please specify type of image: -DBOOT_IMAGE or -DUPGRADE_IMAGE\r\n" |
| 42 | #endif /* BOOT_IMAGE */ |
| 43 | |
| 44 | #define GREETING_MESSAGE_VER "[BlinkyApp] Version:" |
| 45 | |
| 46 | #define WATCHDOG_FREE_MESSAGE "[BlinkyApp] Turn off watchdog timer\r\n" |
| 47 | |
| 48 | #define SMIF_ID (1U) /* Assume SlaveSelect_0 is used for External Memory */ |
| 49 | |
| 50 | static const char* core33_message ="CM33"; |
| 51 | static const char* core0p_message ="CM0P"; |
| 52 | static const char* core4_message ="CM4"; |
| 53 | |
| 54 | #if defined(__cplusplus) |
| 55 | extern "C" { |
| 56 | #endif /* defined(__cplusplus) */ |
| 57 | |
| 58 | static inline const char* test_app_init_hardware(void) |
| 59 | { |
| 60 | const char* detect_core_message = NULL; |
| 61 | (void) core33_message; |
| 62 | (void) core0p_message; |
| 63 | (void) core4_message; |
| 64 | cy_rslt_t res = CY_RSLT_TYPE_ERROR; |
| 65 | |
| 66 | const cy_stc_gpio_pin_config_t LED_config = { |
| 67 | .outVal = 1, |
| 68 | .driveMode = CY_GPIO_DM_STRONG_IN_OFF, |
| 69 | .hsiom = HSIOM_SEL_GPIO, |
| 70 | .intEdge = CY_GPIO_INTR_DISABLE, |
| 71 | .intMask = 0UL, |
| 72 | .vtrip = CY_GPIO_VTRIP_CMOS, |
| 73 | .slewRate = CY_GPIO_SLEW_FAST, |
| 74 | .driveSel = CY_GPIO_DRIVE_FULL, |
| 75 | .vregEn = 0UL, |
| 76 | .ibufMode = 0UL, |
| 77 | .vtripSel = 0UL, |
| 78 | .vrefSel = 0UL, |
| 79 | .vohSel = 0UL, |
| 80 | }; |
| 81 | |
| 82 | #ifdef CYW20829 |
| 83 | cybsp_init(); |
| 84 | #elif defined APP_CM0P |
| 85 | init_cycfg_peripherals(); |
| 86 | init_cycfg_pins(); |
| 87 | #endif /* CYW20829 */ |
| 88 | |
| 89 | /* enable interrupts */ |
| 90 | __enable_irq(); |
| 91 | |
| 92 | /* Initialize led port */ |
| 93 | Cy_GPIO_Pin_Init(LED_PORT, LED_PIN, &LED_config); |
| 94 | |
| 95 | /* Initialize retarget-io to use the debug UART port */ |
| 96 | #ifdef APP_CM0P |
| 97 | res = cy_retarget_io_pdl_init(CY_RETARGET_IO_BAUDRATE); |
| 98 | #else |
| 99 | res = cy_retarget_io_init(CY_DEBUG_UART_TX, CY_DEBUG_UART_RX, CY_RETARGET_IO_BAUDRATE); |
| 100 | #endif /* APP_CM0P */ |
| 101 | |
| 102 | if (res != CY_RSLT_SUCCESS) { |
| 103 | CY_ASSERT(0); |
| 104 | /* Loop forever... */ |
| 105 | for (;;) { |
| 106 | } |
| 107 | } |
| 108 | |
| 109 | printf("\n===========================\r\n"); |
| 110 | printf("%s %s\r\n", GREETING_MESSAGE_VER, IMG_VER_MSG); |
| 111 | |
| 112 | #ifdef CYW20829 |
| 113 | detect_core_message = core33_message; |
| 114 | |
| 115 | printf("===========================\r\n"); |
| 116 | |
| 117 | cy_en_smif_status_t rc = CY_SMIF_CMD_NOT_FOUND; |
| 118 | cyhal_wdt_t *cyw20829_wdt = NULL; |
| 119 | |
| 120 | rc = qspi_init_sfdp(SMIF_ID); |
| 121 | if (CY_SMIF_SUCCESS == rc) { |
| 122 | printf("[BlinkyApp] External Memory initialized w/ SFDP. \r\n"); |
| 123 | } else { |
| 124 | printf("[BlinkyApp] External Memory initialization w/ SFDP FAILED: 0x%" PRIx32 " \r\n", (uint32_t)rc); |
| 125 | } |
| 126 | |
| 127 | /* Disable watchdog timer to mark successful start up of application. */ |
| 128 | cyhal_wdt_free(cyw20829_wdt); |
| 129 | |
| 130 | #else |
| 131 | /* Determine on which core this app is running by polling CPUSS_IDENTITY register. |
| 132 | * This register contains bits field [8:11]. This field specifies the bus master |
| 133 | * identifier of the transfer that reads the register. |
| 134 | */ |
| 135 | #ifdef APP_CM0P |
| 136 | |
| 137 | en_prot_master_t core = _FLD2VAL(CPUSS_IDENTITY_MS, CPUSS->IDENTITY); |
| 138 | |
| 139 | if (CPUSS_MS_ID_CM4 == core) { |
| 140 | printf("\n[BlinkyApp] is compiled for CM0P core, started on CM4 instead. Execution Halted.\n"); |
| 141 | CY_ASSERT(0); |
| 142 | } |
| 143 | else if (CPUSS_MS_ID_CM0 == core) { |
| 144 | detect_core_message = core0p_message; |
| 145 | } |
| 146 | else |
| 147 | #endif /* APP_CM0P */ |
| 148 | { |
| 149 | detect_core_message = core4_message; |
| 150 | } |
| 151 | printf("===========================\r\n"); |
| 152 | cy_wdg_free(); |
| 153 | #endif /* CYW20829 */ |
| 154 | printf("[BlinkyApp] GPIO initialized \r\n"); |
| 155 | printf("[BlinkyApp] UART initialized \r\n"); |
| 156 | printf("[BlinkyApp] Retarget I/O set to 115200 baudrate \r\n"); |
| 157 | printf(WATCHDOG_FREE_MESSAGE); |
| 158 | |
| 159 | return(detect_core_message); |
| 160 | } |
| 161 | |
| 162 | #if defined(__cplusplus) |
| 163 | } |
| 164 | #endif /* defined(__cplusplus) */ |
| 165 | |
| 166 | #endif /* PLATFORM_H */ |