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Sandrine Bailleux3cd87d72018-10-09 11:12:55 +02001/*
Antonio Nino Diaz9c9f92c2019-03-13 13:57:39 +00002 * Copyright (c) 2018-2019, Arm Limited. All rights reserved.
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef __PLATFORM_H__
8#define __PLATFORM_H__
9
10#include <stdint.h>
11#include <timer.h>
12#include <xlat_tables_v2.h>
13
14#define PLAT_PSCI_DUMMY_STATE_ID 0xF
15
16#define PWR_STATE_INIT_INDEX (-1)
17
18#define INIT_PWR_LEVEL_INDEX(array_name) \
19 do { \
20 unsigned int var; \
21 assert(ARRAY_SIZE(array_name) == (PLAT_MAX_PWR_LEVEL + 1)); \
22 for (var = 0; var <= PLAT_MAX_PWR_LEVEL; var++) \
23 array_name[var] = PWR_STATE_INIT_INDEX; \
24 } while (0)
25
26/*
27 * The platform structure to represent the valid local power state
28 * properties for a particular affinity level. The platform needs to
29 * export the array of valid local low power states for each affinity level
30 * it supports which can be queried by TFTF tests to construct the required
31 * composite power state.
32 *
33 * TODO: Currently the power levels are identity mapped to affinity level in
34 * TFTF which need to be decoupled.
35 */
36typedef struct plat_state_prop {
37 /*
38 * This field has a value in the increasing order of the suspend
39 * depth. Deeper the suspend state, higher the value.
40 */
41 unsigned int suspend_depth;
42 /* The local state ID for the idle state at this level. */
43 unsigned int state_ID;
44 /* Flag which indicates whether is a retention or power down state */
45 unsigned int is_pwrdown;
46} plat_state_prop_t;
47
48void tftf_plat_arch_setup(void);
49void tftf_early_platform_setup(void);
50void tftf_platform_setup(void);
51
52void tftf_plat_enable_mmu(void);
53void tftf_plat_configure_mmu(void);
54
55void tftf_platform_end(void);
56void tftf_platform_watchdog_set(void);
57void tftf_platform_watchdog_reset(void);
58
Antonio Nino Diaz1cf45c92018-10-15 09:03:43 +010059/* Helper that returns a linear core ID from a MPID */
60unsigned int platform_get_core_pos(u_register_t mpid);
61
62/* Crash console functions */
63int plat_crash_console_init(void);
64int plat_crash_console_putc(int c);
65int plat_crash_console_flush(void);
66
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020067/* Gets a handle for the initialised IO entity */
68void plat_get_nvm_handle(uintptr_t *handle);
69
Antonio Nino Diaz9c9f92c2019-03-13 13:57:39 +000070/* Initialize and get a pointer to a uint64_t[2] array with a 128-key */
71uint64_t *plat_init_apiakey(void);
72
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020073/*
74 * Returns the platform topology description array. The size of this
75 * array should be PLATFORM_NUM_AFFS - PLATFORM_CORE_COUNT + 1.
76 */
77const unsigned char *tftf_plat_get_pwr_domain_tree_desc(void);
78
79/*
80 * Function to query the MPIDR of a CPU identified by 'core_pos' which is
81 * the number returned by platform_get_core() API.
82 * In case the CPU is absent, then this API returns INVALID_MPID. This
83 * function will be queried only during topology setup in TFTF and thereafter
84 * the internal node data will be used to get the MPIDR corresponding
85 * to the 'core_pos'.
86 */
87uint64_t tftf_plat_get_mpidr(unsigned int core_pos);
88
89/*
90 * Get the state property array for all the valid states from platform for
91 * a specified 'level'. The array is expected to be NULL terminated after the
92 * last entry.
93 */
94const plat_state_prop_t *plat_get_state_prop(unsigned int level);
95
96/*
97 * Initialises state info data structures for generating various combinations
98 * of state ID's. It also calls tftf_detect_pstate_format() which detects the
99 * PSTATE format accepted by EL3 firmware.
100 * This function needs to be invoked once during cold boot prior to the
101 * invocation of any PSCI power state helper functions.
102 */
103void tftf_init_pstate_framework(void);
104
105/*
106 * This function is used to generate all possible combinations of composite
107 * state ID's possible for a given set of power states at each level.
108 * Ex: If a system implements 4 levels and each level has 3 local power states.
109 * Then, the total combinations of composite power down states possible are:
110 * 3 * 3 * 3 * 3 = 81
111 *
112 * A single call to set_next_state_id_pointers(), sets pointer to pstate_id_idx
113 * at all levels for a possible combination out of 81.
114 *
115 * A caller can confirm when all combinations are completed by checking if
116 * pwr_lvel_state_indexes for power_level 0 is PWR_STATE_INIT_INDEX
117 */
118void tftf_set_next_state_id_idx(unsigned int power_level,
119 unsigned int pstate_id_idx[]);
120
121/*
122 * This function sets the index for the next state ID of the given power level
123 */
124void tftf_set_next_local_state_id_idx(unsigned int power_level,
125 unsigned int pstate_id_idx[]);
126
127/*
128 * This function sets the index corresponding to the deepest power state at
129 * a given power level.
130 */
131void tftf_set_deepest_pstate_idx(unsigned int power_level,
132 unsigned int pstate_id_idx[]);
133
134/*
135 * Helper function to get the state ID, state type, power level in power_state
136 * parameter of CPU_SUSPEND. The generated values are based on the
137 * pstate_id_idx values of a core.
138 *
139 * This helper expects a valid pstate_id_idx till the max valid levels
140 * and it detects the max valid level to be terminated by PWR_STATE_INIT value
141 *
142 * It returns the expected PSCI return value of a suspend request
143 */
144int tftf_get_pstate_vars(unsigned int *test_power_level,
145 unsigned int *test_suspend_type,
146 unsigned int *suspend_state_id,
147 unsigned int pstate_id_idx[]);
148
149/*
150 * This function gets the platform specific timer driver information and
151 * initialises platform specific drivers.
152 * Returns 0 on success.
153 */
154int plat_initialise_timer_ops(const plat_timer_t **timer_ops);
155
156struct mem_region {
157 uintptr_t addr;
158 size_t size;
159};
160
161typedef struct mem_region mem_region_t;
162
163/*******************************************************************************
164 * Optional functions. A default, weak implementation of those functions is
165 * provided, it may be overridden by platform code.
166 ******************************************************************************/
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200167unsigned long platform_get_stack(unsigned long mpidr);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200168/*
169 * plat_get_prot_regions: It returns a pointer to a
170 * set of regions used to test mem_protect_check.
171 * The number of elements are stored in the variable
172 * pointed by nelem.
173 */
174const mem_region_t *plat_get_prot_regions(int *nelem);
175
176void tftf_plat_reset(void);
177
178const mmap_region_t *tftf_platform_get_mmap(void);
179
180/*
181 * Return an IO device handle and specification which can be used
182 * to access an image. Use this to enforce platform load policy.
183 */
184int plat_get_image_source(unsigned int image_id,
185 uintptr_t *dev_handle,
186 uintptr_t *image_spec);
187
188void plat_fwu_io_setup(void);
189
190#endif /* __PLATFORM_H__ */