| Andre Przywara | 589aaba | 2022-08-19 11:00:37 +0100 | [diff] [blame] | 1 | /* |
| Boyan Karatotev | 270d5c5 | 2025-02-11 14:41:18 +0000 | [diff] [blame] | 2 | * Copyright (c) 2017-2025, Arm Limited and Contributors. All rights reserved. |
| Andre Przywara | 589aaba | 2022-08-19 11:00:37 +0100 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | /* GICv3 with ITS configuration */ |
| 8 | |
| Boyan Karatotev | 270d5c5 | 2025-02-11 14:41:18 +0000 | [diff] [blame] | 9 | #include "fvp-base-gicv23-interrupts.dtsi" |
| 10 | |
| Andre Przywara | 589aaba | 2022-08-19 11:00:37 +0100 | [diff] [blame] | 11 | / { |
| 12 | gic: interrupt-controller@2f000000 { |
| 13 | compatible = "arm,gic-v3"; |
| 14 | #interrupt-cells = <3>; |
| 15 | #address-cells = <1>; |
| 16 | #size-cells = <1>; |
| 17 | ranges = <0x0 0x0 0x2f000000 0x100000>; |
| 18 | interrupt-controller; |
| 19 | reg = <0x0 0x2f000000 0 0x10000>, // GICD |
| 20 | <0x0 0x2f100000 0 0x200000>, // GICR |
| 21 | <0x0 0x2c000000 0 0x2000>, // GICC |
| 22 | <0x0 0x2c010000 0 0x2000>, // GICH |
| 23 | <0x0 0x2c02f000 0 0x2000>; // GICV |
| 24 | interrupts = <1 9 4>; |
| 25 | |
| 26 | its: msi-controller@2f020000 { |
| 27 | compatible = "arm,gic-v3-its"; |
| 28 | msi-controller; |
| 29 | #msi-cells = <1>; |
| 30 | reg = <0x20000 0x20000>; // GITS |
| 31 | }; |
| 32 | }; |
| 33 | }; |