blob: a3f1ac9a2664c8c14ccb8bac350ecb97ad0391f1 [file] [log] [blame]
Yann Gautier513b5cc2021-06-23 15:14:43 +02001// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2/*
Yann Gautier86d91be2024-05-22 15:28:23 +02003 * Copyright (c) 2024-2025, STMicroelectronics - All Rights Reserved
Yann Gautier513b5cc2021-06-23 15:14:43 +02004 */
5
6#include <common/tbbr/tbbr_img_def.h>
7
8#include <platform_def.h>
9
10/dts-v1/;
11
12/ {
13 dtb-registry {
14 compatible = "fconf,dyn_cfg-dtb_registry";
15
16 hw-config {
17 load-address = <0x0 STM32MP_HW_CONFIG_BASE>;
18 max-size = <STM32MP_HW_CONFIG_MAX_SIZE>;
19 id = <HW_CONFIG_ID>;
20 };
21
22 nt_fw {
23 load-address = <0x0 STM32MP_BL33_BASE>;
24 max-size = <STM32MP_BL33_MAX_SIZE>;
25 id = <BL33_IMAGE_ID>;
26 };
27
Yann Gautiera370c852024-05-23 17:21:44 +020028 soc_fw {
29 load-address = <0x0 STM32MP_SYSRAM_BASE>;
30 max-size = <STM32MP_BL31_SIZE>;
31 id = <BL31_IMAGE_ID>;
32 };
33
Maxime Méré27dd11d2024-10-02 18:24:40 +020034 soc_fw-config {
35 id = <SOC_FW_CONFIG_ID>;
36 };
37
Yann Gautier513b5cc2021-06-23 15:14:43 +020038 tos_fw {
39 id = <BL32_IMAGE_ID>;
40 };
41 };
Yann Gautier86d91be2024-05-22 15:28:23 +020042
43 st-mem-firewall {
44 compatible = "st,stm32mp2-mem-firewall";
45 #address-cells = <2>;
46 #size-cells = <2>;
47 };
Yann Gautier513b5cc2021-06-23 15:14:43 +020048};