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Galanakis, Minos41f85972019-09-30 15:56:40 +01001#################
2Integration guide
3#################
Gyorgy Szingdb9783c2019-04-17 21:08:48 +02004The purpose of this document is to provide a guide on how to integrate TF-M
5with other hardware platforms and operating systems.
6
7*****************
8How to build TF-M
9*****************
10Follow the :doc:`Build instructions <tfm_build_instruction>`.
11
12********************************************************
13How to export files for building non-secure applications
14********************************************************
15Explained in the :doc:`Build instructions <tfm_build_instruction>`.
16
17*************************
18How to add a new platform
19*************************
20The hardware platforms currently supported are:
21
22- Soft Macro Model (SMM) Cortex-M33 SSE-200 subsystem for MPS2+ (AN521)
23- Cortex-M23 IoT Kit subsystem for MPS2+ (AN519)
Marton Berke8aae06f2019-11-25 16:46:12 +010024- Arm SSE-123 Example Subsystem for MPS2+ (AN539)
Mark Horvath9a5a9b92019-11-29 15:57:55 +010025- Cortex-M55 SSE-300 subsystem for MPS2+ FVP
Jamie Foxb8a92702019-06-05 17:19:31 +010026- Musca-A test chip board (Cortex-M33 SSE-200 subsystem)
Gyorgy Szingdb9783c2019-04-17 21:08:48 +020027- Musca-B1 test chip board (Cortex-M33 SSE-200 subsystem)
Marton Berke8aae06f2019-11-25 16:46:12 +010028- Musca-S1 test chip board (Cortex-M33 SSE-200 subsystem)
Kevin Peng0a142112018-09-21 10:42:22 +080029- CoreLink SSE-200 Subsystem for MPS3 (AN524)
Marton Berkee9803662019-11-11 14:11:05 +010030- DesignStart FPGA on Cloud: Cortex-M33 based platform (SSE-200_AWS)
Gyorgy Szingdb9783c2019-04-17 21:08:48 +020031
32The files related to the supported platforms are contained under the
33``platform`` subfolder. The platform specific files are under
34``platform/ext/target``, which is organised by boards
35(e.g. ``platform/ext/target/mps2``), while the folder ``platform/ext/common``
36is used to store source and header files which are platform generic.
37
38More information about subsystems supported by the MPS2+ board can be found in:
39`MPS2+ homepage <https://developer.arm.com/products/system-design/development-boards/fpga-prototyping-boards/mps2>`__
40
Jamie Foxb8a92702019-06-05 17:19:31 +010041More information about the Musca-A test chip board can be found in:
Gyorgy Szingdb9783c2019-04-17 21:08:48 +020042`Musca-A homepage <https://developer.arm.com/products/system-design/development-boards/iot-test-chips-and-boards/musca-a-test-chip-board>`__
43
44More information about the Musca-B1 test chip board can be found in:
45`Musca-B1 homepage <https://www.arm.com/products/development-tools/development-boards/musca-b1-iot>`__
46
Marton Berke8aae06f2019-11-25 16:46:12 +010047More information about the Musca-S1 test chip board can be found in:
48`Musca-S1 homepage <https://www.arm.com/company/news/2019/05/arm-demonstrates-new-iot-test-chip-and-board>`__
49
Kevin Peng0a142112018-09-21 10:42:22 +080050More information about subsystems supported by the MPS3 board can be found in:
51`MPS3 homepage <https://www.arm.com/products/development-tools/development-boards/mps3>`__
52
Marton Berkee9803662019-11-11 14:11:05 +010053More information about the SSE-200_AWS platform can be found in:
54`SSE-200_AWS product page <https://aws.amazon.com/marketplace/pp/ARM-DesignStart-FPGA-on-Cloud-Cortex-M33-based-pla/B082DMMTLW>`__
55
Gyorgy Szingdb9783c2019-04-17 21:08:48 +020056Generic drivers and startup/scatter files
57=========================================
58The addition of a new platform means the creation of a new subfolder inside
59``target/<board_name>`` to provide an implementation of the drivers currently
60used by TF-M, in particular MPC, PPC, and USART drivers. In addition to the
61drivers, startup and scatter files need to be provided for the supported
62toolchains.
63
64There are also board specific drivers which are used by the board
65platform to interact with the external world, for example during tests, that
66have to be provided, e.g. to blink LEDs or count time in the MPS2 board.
67
68.. Note::
69
Kevin Pengc6d74502020-03-04 16:55:37 +080070 Currently ITS, PS and BL2 bootloader use different flash interface
Gyorgy Szingdb9783c2019-04-17 21:08:48 +020071
72Target configuration files
73==========================
74Inside the base root folder of the selected target, each implementation has to
75provide its own copy of ``target_cfg.c/.h``. This file has target specific
76configuration functions and settings that are called by the TF-M during the
77platform configuration step during TF-M boot. Examples of the configurations
78performed during this phase are the MPC configuration, the SAU configuration,
79or eventually PPC configuration if supported by the hardware platform.
80Similarly, the ``uart_stdout.c`` is used to provide functions needed to redirect
81the stdout on UART (this is currently used by TF-M to log messages).
82
83Platform retarget files
84=======================
85An important part that each new platform has to provide is the set of retarget
86files which are contained inside the ``retarget`` folder. These files define the
87peripheral base addresses for the platform, both for the secure and non-secure
88aliases (when available), and bind those addresses to the base addresses used by
89the devices available in the hardware platform.
90
91***************************
92How to integrate another OS
93***************************
94To work with TF-M, the OS needs to support the Armv8-M architecture and, in
95particular, it needs to be able to run in the non-secure world. More
96information about OS migration to the Armv8-M architecture can be found in the
97:doc:`OS requirements <os_migration_guide_armv8m>`. Depending upon the system
98configuration this may require configuring drivers to use appropriate address
99ranges.
100
101Interface with TF-M
102===================
103The files needed for the interface with TF-M are exported at the
104``<build_dir>/install/export/tfm`` path. The NS side is only allowed to call
105TF-M secure functions (veneers) from the NS Thread mode. For this reason, the
106API is a collection of functions in the ``<build_dir>/install/export/tfm/inc``
Kevin Pengc6d74502020-03-04 16:55:37 +0800107directory. For example, the interface for the Protected Storage (PS) service
108is described in the file ``psa_ps_api.h`` as a collection of functions that
Gyorgy Szingdb9783c2019-04-17 21:08:48 +0200109call service veneer functions. This API is a wrapper for the secure veneers,
110and returns the return value from the service to the caller.
111
Kevin Pengc6d74502020-03-04 16:55:37 +0800112The protected storage service uses a numerical ID, to identify the clients that
113use the service. For details see
Gyorgy Szingdb9783c2019-04-17 21:08:48 +0200114:doc:`ns client identification documentation <tfm_ns_client_identification>`.
115
116Interface with non-secure world regression tests
117================================================
118A non-secure application that wants to run the non-secure regression tests
119needs to call the ``tfm_non_secure_client_run_tests()``. This function is
120exported into the header file ``test_framework_integ_test.h`` inside the
121``<build_dir>/install`` folder structure in the test specific files,
122i.e. ``<build_dir>/install/export/tfm/test/inc``. The non-secure regression
123tests are precompiled and delivered as a static library which is available in
124``<build_dir>/install/export/tfm/test/lib``, so that the non-secure application
125needs to link against the library to be able to invoke the
Kevin Pengc6d74502020-03-04 16:55:37 +0800126``tfm_non_secure_client_run_tests()`` function. The PS non-secure side
Gyorgy Szingdb9783c2019-04-17 21:08:48 +0200127regression tests rely on some OS functionality e.g. threads, mutexes etc. These
128functions comply with CMSIS RTOS2 standard and have been exported as thin
129wrappers defined in ``os_wrapper.h`` contained in
130``<build_dir>/install/export/tfm/test/inc``. OS needs to provide the
131implementation of these wrappers to be able to run the tests.
132
133NS client Identification
134========================
135See
136:doc:`ns client identification documentation <tfm_ns_client_identification>`.
137
Mate Toth-Pal12d7a182019-04-28 14:05:21 +0200138*********************
139Non-secure interrupts
140*********************
141Non-secure interrupts are allowed to preempt Secure thread mode.
142With the current implementation, a NSPE task can spoof the identity of another
143NSPE task. This is an issue only when NSPE has provisions for task isolation.
144Note, that ``AIRCR.PRIS`` is still set to restrict the priority range available
145to NS interrupts to the lower half of available priorities so that it wouldn't
146be possible for any non-secure interrupt to preempt a higher-priority secure
147interrupt.
148
Gyorgy Szingdb9783c2019-04-17 21:08:48 +0200149--------------
150
Kevin Pengc6d74502020-03-04 16:55:37 +0800151*Copyright (c) 2017-2020, Arm Limited. All rights reserved.*