Use RevC model for AArch32 GICv2 run configuration
Updated script to use RevC model for running AArch32 GICv2
configuration.
As this RevC model is not available publicly, the Open CI environment
continues to use the RevB model for running AArch32 GICv2
configuration.
Change-Id: I537eca748a1266eb1968dd2b417d8eb16eec2ea4
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
diff --git a/model/base-aemva-common.sh b/model/base-aemva-common.sh
index d1ac356..01b6b20 100644
--- a/model/base-aemva-common.sh
+++ b/model/base-aemva-common.sh
@@ -58,6 +58,13 @@
# Enable SMMUv3 functionality
reset_var has_smmuv3_params
+# Layout of MPIDR. 0=AFF0 is CPUID, 1=AFF1 is CPUID
+reset_var mpidr_layout
+
+# Sets the MPIDR.MT bit. Setting this to true hints the cluster
+# is multi-threading compatible
+reset_var supports_multi_threading
+
source "$ci_root/model/fvp_common.sh"
#------------ Common configuration --------------
@@ -137,6 +144,10 @@
${gicv3_ext_interrupt_range+-C cluster0.gicv3.extended-interrupt-range-support=$gicv3_ext_interrupt_range}
+${mpidr_layout+-C cluster0.mpidr_layout=$mpidr_layout}
+
+${supports_multi_threading+-C cluster0.supports_multi_threading=$supports_multi_threading}
+
EOF
if [ "$has_smmuv3_params" = "1" ]; then
@@ -235,6 +246,10 @@
${restriction_on_speculative_execution+-C cluster1.restriction_on_speculative_execution=$restriction_on_speculative_execution}
${gicv3_ext_interrupt_range+-C cluster1.gicv3.extended-interrupt-range-support=$gicv3_ext_interrupt_range}
+
+${mpidr_layout+-C cluster1.mpidr_layout=$mpidr_layout}
+
+${supports_multi_threading+-C cluster1.supports_multi_threading=$supports_multi_threading}
EOF
# Parameters to select architecture version