Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 1 | // SPDX-FileCopyrightText: Copyright 2023-2024 Arm Limited and/or its affiliates <open-source-office@arm.com> |
| 2 | // SPDX-License-Identifier: MIT OR Apache-2.0 |
| 3 | |
| 4 | //! # Peripheral Access Crate fro Arm Fixed Virtual Platform |
| 5 | //! |
| 6 | //! The crate provides access to the peripherals of [Arm Fixed Virtual Platform](https://developer.arm.com/Tools%20and%20Software/Fixed%20Virtual%20Platforms). |
| 7 | |
| 8 | #![no_std] |
| 9 | |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 10 | use core::{ |
| 11 | marker::PhantomData, |
| 12 | ops::{Deref, DerefMut}, |
| 13 | }; |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 14 | |
| 15 | use spin::mutex::Mutex; |
| 16 | |
| 17 | use arm_gic::GICDRegisters; |
| 18 | use arm_pl011::PL011Registers; |
| 19 | use arm_sp805::SP805Registers; |
| 20 | |
| 21 | /// UART0 - PL011 |
| 22 | pub struct UART0 { |
| 23 | _marker: PhantomData<*const ()>, |
| 24 | } |
| 25 | |
| 26 | impl UART0 { |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 27 | pub const PTR: *mut PL011Registers = 0x1c09_0000 as *mut _; |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 28 | } |
| 29 | |
| 30 | impl Deref for UART0 { |
| 31 | type Target = PL011Registers; |
| 32 | |
| 33 | #[inline(always)] |
| 34 | fn deref(&self) -> &Self::Target { |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 35 | // SAFETY: Self::PTR points to a valid peripheral register block on the Arm FVP platform. |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 36 | unsafe { &*Self::PTR } |
| 37 | } |
| 38 | } |
| 39 | |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 40 | impl DerefMut for UART0 { |
| 41 | #[inline(always)] |
| 42 | fn deref_mut(&mut self) -> &mut Self::Target { |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 43 | // SAFETY: Self::PTR points to a valid peripheral register block on the Arm FVP platform. |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 44 | unsafe { &mut *Self::PTR } |
| 45 | } |
| 46 | } |
| 47 | |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 48 | // SAFETY: The peripheral is accessible from any core/thread. |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 49 | unsafe impl Send for UART0 {} |
| 50 | |
| 51 | /// UART1 - PL011 |
| 52 | pub struct UART1 { |
| 53 | _marker: PhantomData<*const ()>, |
| 54 | } |
| 55 | |
| 56 | impl UART1 { |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 57 | pub const PTR: *mut PL011Registers = 0x1c0a_0000 as *mut _; |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 58 | } |
| 59 | |
| 60 | impl Deref for UART1 { |
| 61 | type Target = PL011Registers; |
| 62 | |
| 63 | #[inline(always)] |
| 64 | fn deref(&self) -> &Self::Target { |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 65 | // SAFETY: Self::PTR points to a valid peripheral register block on the Arm FVP platform. |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 66 | unsafe { &*Self::PTR } |
| 67 | } |
| 68 | } |
| 69 | |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 70 | impl DerefMut for UART1 { |
| 71 | #[inline(always)] |
| 72 | fn deref_mut(&mut self) -> &mut Self::Target { |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 73 | // SAFETY: Self::PTR points to a valid peripheral register block on the Arm FVP platform. |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 74 | unsafe { &mut *Self::PTR } |
| 75 | } |
| 76 | } |
| 77 | |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 78 | // SAFETY: The peripheral is accessible from any core/thread. |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 79 | unsafe impl Send for UART1 {} |
| 80 | |
| 81 | /// UART2 - PL011 |
| 82 | pub struct UART2 { |
| 83 | _marker: PhantomData<*const ()>, |
| 84 | } |
| 85 | |
| 86 | impl UART2 { |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 87 | pub const PTR: *mut PL011Registers = 0x1c0b_0000 as *mut _; |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 88 | } |
| 89 | |
| 90 | impl Deref for UART2 { |
| 91 | type Target = PL011Registers; |
| 92 | |
| 93 | #[inline(always)] |
| 94 | fn deref(&self) -> &Self::Target { |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 95 | // SAFETY: Self::PTR points to a valid peripheral register block on the Arm FVP platform. |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 96 | unsafe { &*Self::PTR } |
| 97 | } |
| 98 | } |
| 99 | |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 100 | impl DerefMut for UART2 { |
| 101 | #[inline(always)] |
| 102 | fn deref_mut(&mut self) -> &mut Self::Target { |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 103 | // SAFETY: Self::PTR points to a valid peripheral register block on the Arm FVP platform. |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 104 | unsafe { &mut *Self::PTR } |
| 105 | } |
| 106 | } |
| 107 | |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 108 | // SAFETY: The peripheral is accessible from any core/thread. |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 109 | unsafe impl Send for UART2 {} |
| 110 | |
| 111 | /// UART3 - PL011 |
| 112 | pub struct UART3 { |
| 113 | _marker: PhantomData<*const ()>, |
| 114 | } |
| 115 | |
| 116 | impl UART3 { |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 117 | pub const PTR: *mut PL011Registers = 0x1c0c_0000 as *mut _; |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 118 | } |
| 119 | |
| 120 | impl Deref for UART3 { |
| 121 | type Target = PL011Registers; |
| 122 | |
| 123 | #[inline(always)] |
| 124 | fn deref(&self) -> &Self::Target { |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 125 | // SAFETY: Self::PTR points to a valid peripheral register block on the Arm FVP platform. |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 126 | unsafe { &*Self::PTR } |
| 127 | } |
| 128 | } |
| 129 | |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 130 | impl DerefMut for UART3 { |
| 131 | #[inline(always)] |
| 132 | fn deref_mut(&mut self) -> &mut Self::Target { |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 133 | // SAFETY: Self::PTR points to a valid peripheral register block on the Arm FVP platform. |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 134 | unsafe { &mut *Self::PTR } |
| 135 | } |
| 136 | } |
| 137 | |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 138 | // SAFETY: The peripheral is accessible from any core/thread. |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 139 | unsafe impl Send for UART3 {} |
| 140 | |
| 141 | /// Watchdog - SP805 |
| 142 | #[allow(clippy::upper_case_acronyms)] |
| 143 | pub struct WATCHDOG { |
| 144 | _marker: PhantomData<*const ()>, |
| 145 | } |
| 146 | |
| 147 | impl WATCHDOG { |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 148 | pub const PTR: *mut SP805Registers = 0x1c0f_0000 as *mut _; |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 149 | } |
| 150 | |
| 151 | impl Deref for WATCHDOG { |
| 152 | type Target = SP805Registers; |
| 153 | |
| 154 | #[inline(always)] |
| 155 | fn deref(&self) -> &Self::Target { |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 156 | // SAFETY: Self::PTR points to a valid peripheral register block on the Arm FVP platform. |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 157 | unsafe { &*Self::PTR } |
| 158 | } |
| 159 | } |
| 160 | |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 161 | impl DerefMut for WATCHDOG { |
| 162 | #[inline(always)] |
| 163 | fn deref_mut(&mut self) -> &mut Self::Target { |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 164 | // SAFETY: Self::PTR points to a valid peripheral register block on the Arm FVP platform. |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 165 | unsafe { &mut *Self::PTR } |
| 166 | } |
| 167 | } |
| 168 | |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 169 | // SAFETY: The peripheral is accessible from any core/thread. |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 170 | unsafe impl Send for WATCHDOG {} |
| 171 | |
| 172 | /// GIC Distributor |
| 173 | #[allow(clippy::upper_case_acronyms)] |
| 174 | pub struct GICD { |
| 175 | _marker: PhantomData<*const ()>, |
| 176 | } |
| 177 | |
| 178 | impl GICD { |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 179 | pub const PTR: *mut GICDRegisters = 0x2f00_0000 as *mut _; |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 180 | } |
| 181 | |
| 182 | impl Deref for GICD { |
| 183 | type Target = GICDRegisters; |
| 184 | |
| 185 | #[inline(always)] |
| 186 | fn deref(&self) -> &Self::Target { |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 187 | // SAFETY: Self::PTR points to a valid peripheral register block on the Arm FVP platform. |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 188 | unsafe { &*Self::PTR } |
| 189 | } |
| 190 | } |
| 191 | |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 192 | impl DerefMut for GICD { |
| 193 | #[inline(always)] |
| 194 | fn deref_mut(&mut self) -> &mut Self::Target { |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 195 | // SAFETY: Self::PTR points to a valid peripheral register block on the Arm FVP platform. |
Imre Kis | 7c36bde | 2024-09-26 11:20:06 +0200 | [diff] [blame] | 196 | unsafe { &mut *Self::PTR } |
| 197 | } |
| 198 | } |
| 199 | |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 200 | // SAFETY: The peripheral is accessible from any core/thread. |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 201 | unsafe impl Send for GICD {} |
| 202 | |
| 203 | static PERIPHERALS_TAKEN: Mutex<bool> = Mutex::new(false); |
| 204 | |
| 205 | /// FVP peripherals |
| 206 | #[allow(non_snake_case)] |
| 207 | pub struct Peripherals { |
| 208 | pub UART0: UART0, |
| 209 | pub UART1: UART1, |
| 210 | pub UART2: UART2, |
| 211 | pub UART3: UART3, |
| 212 | pub WATCHDOG: WATCHDOG, |
| 213 | pub GICD: GICD, |
| 214 | } |
| 215 | |
| 216 | impl Peripherals { |
| 217 | /// Take the peripherals once |
| 218 | pub fn take() -> Option<Self> { |
| 219 | if !*PERIPHERALS_TAKEN.lock() { |
Imre Kis | 75a4354 | 2024-10-02 14:11:25 +0200 | [diff] [blame^] | 220 | // SAFETY: PERIPHERALS_TAKEN ensures that this is only called once. |
Imre Kis | 9c084c0 | 2024-08-14 15:53:45 +0200 | [diff] [blame] | 221 | Some(unsafe { Self::steal() }) |
| 222 | } else { |
| 223 | None |
| 224 | } |
| 225 | } |
| 226 | |
| 227 | /// Unsafe version of take() |
| 228 | /// |
| 229 | /// # Safety |
| 230 | /// The caller has to ensure that each peripheral is only used once. |
| 231 | pub unsafe fn steal() -> Self { |
| 232 | *PERIPHERALS_TAKEN.lock() = true; |
| 233 | |
| 234 | Peripherals { |
| 235 | UART0: UART0 { |
| 236 | _marker: PhantomData, |
| 237 | }, |
| 238 | UART1: UART1 { |
| 239 | _marker: PhantomData, |
| 240 | }, |
| 241 | UART2: UART2 { |
| 242 | _marker: PhantomData, |
| 243 | }, |
| 244 | UART3: UART3 { |
| 245 | _marker: PhantomData, |
| 246 | }, |
| 247 | WATCHDOG: WATCHDOG { |
| 248 | _marker: PhantomData, |
| 249 | }, |
| 250 | GICD: GICD { |
| 251 | _marker: PhantomData, |
| 252 | }, |
| 253 | } |
| 254 | } |
| 255 | } |