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Stephan Gerholddddba192021-12-01 20:01:11 +01001/*
Stephan Gerhold01ba69c2022-09-17 18:21:20 +02002 * Copyright (c) 2021-2022, Stephan Gerhold <stephan@gerhold.net>
Stephan Gerholddddba192021-12-01 20:01:11 +01003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
Stephan Gerhold01ba69c2022-09-17 18:21:20 +02008#include <arch_helpers.h>
Stephan Gerholddddba192021-12-01 20:01:11 +01009#include <common/debug.h>
Stephan Gerholda758c0b2021-12-01 20:04:44 +010010#include <drivers/arm/gicv2.h>
Stephan Gerholddddba192021-12-01 20:01:11 +010011#include <drivers/delay_timer.h>
12#include <lib/mmio.h>
13#include <lib/psci/psci.h>
14#include <plat/common/platform.h>
15
16#include <msm8916_mmap.h>
Stephan Gerholda758c0b2021-12-01 20:04:44 +010017#include "msm8916_pm.h"
18
Stephan Gerhold1d7ed582022-09-16 10:45:19 +020019/*
20 * On platforms with two clusters the index of the APCS memory region is swapped
21 * compared to the MPIDR cluster affinity level: APCS cluster 0 manages CPUs
22 * with cluster affinity level 1, while APCS cluster 1 manages CPUs with level 0.
23 *
24 * On platforms with a single cluster there is only one APCS memory region.
25 */
26#if PLATFORM_CLUSTER_COUNT == 2
27#define MPIDR_APCS_CLUSTER(mpidr) !MPIDR_AFFLVL1_VAL(mpidr)
28#else
29#define MPIDR_APCS_CLUSTER(mpidr) 0
30#endif
31
Stephan Gerholda758c0b2021-12-01 20:04:44 +010032static int msm8916_pwr_domain_on(u_register_t mpidr)
33{
Stephan Gerhold1d7ed582022-09-16 10:45:19 +020034 msm8916_cpu_boot(APCS_ALIAS_ACS(MPIDR_APCS_CLUSTER(mpidr),
35 MPIDR_AFFLVL0_VAL(mpidr)));
Stephan Gerholda758c0b2021-12-01 20:04:44 +010036 return PSCI_E_SUCCESS;
37}
38
39static void msm8916_pwr_domain_on_finish(const psci_power_state_t *target_state)
40{
41 gicv2_pcpu_distif_init();
42 gicv2_cpuif_enable();
43}
Stephan Gerholddddba192021-12-01 20:01:11 +010044
45static void __dead2 msm8916_system_reset(void)
46{
47 mmio_write_32(MPM_PS_HOLD, 0);
48 mdelay(1000);
49
50 ERROR("PSCI: System reset failed\n");
51 panic();
52}
53
54static const plat_psci_ops_t msm8916_psci_ops = {
Stephan Gerholda758c0b2021-12-01 20:04:44 +010055 .pwr_domain_on = msm8916_pwr_domain_on,
56 .pwr_domain_on_finish = msm8916_pwr_domain_on_finish,
Stephan Gerholddddba192021-12-01 20:01:11 +010057 .system_off = msm8916_system_reset,
58 .system_reset = msm8916_system_reset,
59};
60
61/* Defined and used in msm8916_helpers.S */
62extern uintptr_t msm8916_entry_point;
63
64int plat_setup_psci_ops(uintptr_t sec_entrypoint,
65 const plat_psci_ops_t **psci_ops)
66{
Stephan Gerhold01ba69c2022-09-17 18:21:20 +020067 /*
68 * The entry point is read with caches off (and even from two different
69 * physical addresses when read through the "boot remapper"), so make
70 * sure it is flushed to memory.
71 */
Stephan Gerholddddba192021-12-01 20:01:11 +010072 msm8916_entry_point = sec_entrypoint;
Stephan Gerhold01ba69c2022-09-17 18:21:20 +020073 flush_dcache_range((uintptr_t)&msm8916_entry_point, sizeof(uintptr_t));
74
Stephan Gerholddddba192021-12-01 20:01:11 +010075 *psci_ops = &msm8916_psci_ops;
76 return 0;
77}