Radoslaw Biernacki | 558a6f4 | 2018-05-17 22:52:49 +0200 | [diff] [blame] | 1 | # |
Marcin Juszkiewicz | c681d02 | 2023-05-10 10:03:01 +0200 | [diff] [blame] | 2 | # Copyright (c) 2019-2023, Linaro Limited and Contributors. All rights reserved. |
Radoslaw Biernacki | 558a6f4 | 2018-05-17 22:52:49 +0200 | [diff] [blame] | 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
Marcin Juszkiewicz | 886688d | 2023-07-24 21:08:16 +0200 | [diff] [blame] | 7 | PLAT_QEMU_PATH := plat/qemu/qemu_sbsa |
| 8 | PLAT_QEMU_COMMON_PATH := plat/qemu/common |
| 9 | |
Marcin Juszkiewicz | a63cdc7 | 2023-07-24 20:56:29 +0200 | [diff] [blame] | 10 | include plat/qemu/common/common.mk |
Chris Kay | 1fa05da | 2021-09-28 15:52:14 +0100 | [diff] [blame] | 11 | |
Radoslaw Biernacki | 558a6f4 | 2018-05-17 22:52:49 +0200 | [diff] [blame] | 12 | CRASH_REPORTING := 1 |
| 13 | |
Masahisa Kojima | 6a2426a | 2020-06-11 21:46:44 +0900 | [diff] [blame] | 14 | ifeq (${SPM_MM},1) |
| 15 | NEED_BL32 := yes |
| 16 | EL3_EXCEPTION_HANDLING := 1 |
| 17 | GICV2_G0_FOR_EL3 := 1 |
| 18 | endif |
| 19 | |
Radoslaw Biernacki | 558a6f4 | 2018-05-17 22:52:49 +0200 | [diff] [blame] | 20 | # Enable new version of image loading on QEMU platforms |
| 21 | LOAD_IMAGE_V2 := 1 |
| 22 | |
Chen Baozi | 226f4c8 | 2023-02-22 06:58:39 +0000 | [diff] [blame] | 23 | CTX_INCLUDE_AARCH32_REGS := 0 |
| 24 | ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1) |
| 25 | $(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled") |
| 26 | endif |
| 27 | |
Radoslaw Biernacki | 558a6f4 | 2018-05-17 22:52:49 +0200 | [diff] [blame] | 28 | ifeq ($(NEED_BL32),yes) |
| 29 | $(eval $(call add_define,QEMU_LOAD_BL32)) |
| 30 | endif |
| 31 | |
Chen Baozi | 226f4c8 | 2023-02-22 06:58:39 +0000 | [diff] [blame] | 32 | # Treating this as a memory-constrained port for now |
| 33 | USE_COHERENT_MEM := 0 |
| 34 | |
| 35 | # This can be overridden depending on CPU(s) used in the QEMU image |
| 36 | HW_ASSISTED_COHERENCY := 1 |
| 37 | |
Marcin Juszkiewicz | 71f5359 | 2023-07-24 21:18:51 +0200 | [diff] [blame^] | 38 | BL2_SOURCES += $(LIBFDT_SRCS) |
Radoslaw Biernacki | 558a6f4 | 2018-05-17 22:52:49 +0200 | [diff] [blame] | 39 | |
Alexei Fedorov | a6ea06f | 2020-03-23 18:45:17 +0000 | [diff] [blame] | 40 | # Include GICv3 driver files |
| 41 | include drivers/arm/gic/v3/gicv3.mk |
| 42 | |
| 43 | QEMU_GIC_SOURCES := ${GICV3_SOURCES} \ |
Marcin Juszkiewicz | 1e67b1b | 2023-05-15 11:07:54 +0200 | [diff] [blame] | 44 | plat/common/plat_gicv3.c |
Radoslaw Biernacki | 558a6f4 | 2018-05-17 22:52:49 +0200 | [diff] [blame] | 45 | |
Chen Baozi | 226f4c8 | 2023-02-22 06:58:39 +0000 | [diff] [blame] | 46 | BL31_SOURCES += ${QEMU_CPU_LIBS} \ |
Andrew Walbran | 61cbd41 | 2020-01-15 14:18:04 +0000 | [diff] [blame] | 47 | lib/semihosting/semihosting.c \ |
| 48 | lib/semihosting/${ARCH}/semihosting_call.S \ |
Radoslaw Biernacki | 558a6f4 | 2018-05-17 22:52:49 +0200 | [diff] [blame] | 49 | plat/common/plat_psci_common.c \ |
Marcin Juszkiewicz | 1e67b1b | 2023-05-15 11:07:54 +0200 | [diff] [blame] | 50 | ${PLAT_QEMU_PATH}/sbsa_gic.c \ |
Graeme Gregory | 2fb5ed4 | 2020-08-28 18:03:35 +0100 | [diff] [blame] | 51 | ${PLAT_QEMU_PATH}/sbsa_pm.c \ |
Marcin Juszkiewicz | c681d02 | 2023-05-10 10:03:01 +0200 | [diff] [blame] | 52 | ${PLAT_QEMU_PATH}/sbsa_sip_svc.c \ |
Graeme Gregory | 5565ede | 2020-08-28 16:37:02 +0100 | [diff] [blame] | 53 | ${PLAT_QEMU_PATH}/sbsa_topology.c \ |
Radoslaw Biernacki | 558a6f4 | 2018-05-17 22:52:49 +0200 | [diff] [blame] | 54 | ${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \ |
| 55 | ${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \ |
Masahisa Kojima | 74c87a4 | 2020-09-23 16:52:59 +0900 | [diff] [blame] | 56 | common/fdt_fixup.c \ |
Radoslaw Biernacki | 558a6f4 | 2018-05-17 22:52:49 +0200 | [diff] [blame] | 57 | ${QEMU_GIC_SOURCES} |
Chris Kay | 1fa05da | 2021-09-28 15:52:14 +0100 | [diff] [blame] | 58 | |
| 59 | BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} |
| 60 | |
Masahisa Kojima | 6a2426a | 2020-06-11 21:46:44 +0900 | [diff] [blame] | 61 | ifeq (${SPM_MM},1) |
| 62 | BL31_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_spm.c |
| 63 | endif |
Radoslaw Biernacki | 558a6f4 | 2018-05-17 22:52:49 +0200 | [diff] [blame] | 64 | |
| 65 | SEPARATE_CODE_AND_RODATA := 1 |
| 66 | ENABLE_STACK_PROTECTOR := 0 |
Radoslaw Biernacki | 558a6f4 | 2018-05-17 22:52:49 +0200 | [diff] [blame] | 67 | |
| 68 | MULTI_CONSOLE_API := 1 |
| 69 | |
| 70 | # Disable the PSCI platform compatibility layer |
| 71 | ENABLE_PLAT_COMPAT := 0 |
| 72 | |
| 73 | # Use known base for UEFI if not given from command line |
| 74 | # By default BL33 is at FLASH1 base |
| 75 | PRELOADED_BL33_BASE ?= 0x10000000 |
| 76 | |
| 77 | # Qemu SBSA plafrom only support SEC_SRAM |
| 78 | BL32_RAM_LOCATION_ID = SEC_SRAM_ID |
| 79 | $(eval $(call add_define,BL32_RAM_LOCATION_ID)) |
| 80 | |
Andrew Walbran | 74464d5 | 2020-01-15 14:11:31 +0000 | [diff] [blame] | 81 | # Don't have the Linux kernel as a BL33 image by default |
| 82 | ARM_LINUX_KERNEL_AS_BL33 := 0 |
| 83 | $(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) |
| 84 | $(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) |
| 85 | |
| 86 | ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE |
| 87 | $(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) |
| 88 | |
Marcin Juszkiewicz | 9bff7ce | 2022-11-16 14:47:51 +0100 | [diff] [blame] | 89 | # Later QEMU versions support SME and SVE. |
Jayanth Dodderi Chidanand | fc259b6 | 2023-03-31 10:42:10 +0100 | [diff] [blame] | 90 | ENABLE_SVE_FOR_NS := 2 |
| 91 | ENABLE_SME_FOR_NS := 2 |
Marcin Juszkiewicz | c598692 | 2023-02-14 09:27:59 +0100 | [diff] [blame] | 92 | |
| 93 | # QEMU 7.2+ has support for FGT and Linux needs it enabled to boot on max |
| 94 | ENABLE_FEAT_FGT := 2 |