blob: 748584284dce13657684faad9eaebd9ada3a0bed [file] [log] [blame]
Olivier Deprez8597a8c2022-07-20 17:37:23 +02001# Copyright (c) 2021-2022, Arm Limited. All rights reserved.
Usama Arif6ec0c652021-04-09 17:07:41 +01002#
3# SPDX-License-Identifier: BSD-3-Clause
4#
5
Chris Kay1fa05da2021-09-28 15:52:14 +01006include common/fdt_wrappers.mk
7
Rupinderjit Singheebd2c32022-04-04 17:28:41 +01008ifeq ($(shell expr $(TARGET_PLATFORM) \<= 2), 0)
9 $(error TARGET_PLATFORM must be less than or equal to 2)
Usama Arif6ec0c652021-04-09 17:07:41 +010010endif
11
Olivier Deprez8597a8c2022-07-20 17:37:23 +020012$(eval $(call add_define,TARGET_PLATFORM))
13
Usama Arif6ec0c652021-04-09 17:07:41 +010014CSS_LOAD_SCP_IMAGES := 1
15
16CSS_USE_SCMI_SDS_DRIVER := 1
17
18RAS_EXTENSION := 0
19
20SDEI_SUPPORT := 0
21
22EL3_EXCEPTION_HANDLING := 0
23
24HANDLE_EA_EL3_FIRST := 0
25
26# System coherency is managed in hardware
27HW_ASSISTED_COHERENCY := 1
28
29# When building for systems with hardware-assisted coherency, there's no need to
30# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
31USE_COHERENT_MEM := 0
32
33GIC_ENABLE_V4_EXTN := 1
34
35# GIC-600 configuration
36GICV3_SUPPORT_GIC600 := 1
37
Usama Arif10198ea2021-08-20 20:53:34 +010038# Enable SVE
39ENABLE_SVE_FOR_NS := 1
40ENABLE_SVE_FOR_SWD := 1
Usama Arif6ec0c652021-04-09 17:07:41 +010041
Davidson K59da2072021-10-13 18:49:41 +053042# enable trace buffer control registers access to NS by default
43ENABLE_TRBE_FOR_NS := 1
44
45# enable trace system registers access to NS by default
46ENABLE_SYS_REG_TRACE_FOR_NS := 1
47
48# enable trace filter control registers access to NS by default
49ENABLE_TRF_FOR_NS := 1
50
Usama Arif6ec0c652021-04-09 17:07:41 +010051# Include GICv3 driver files
52include drivers/arm/gic/v3/gicv3.mk
53
54ENT_GIC_SOURCES := ${GICV3_SOURCES} \
55 plat/common/plat_gicv3.c \
56 plat/arm/common/arm_gicv3.c
57
58override NEED_BL2U := no
59
60override ARM_PLAT_MT := 1
61
62TC_BASE = plat/arm/board/tc
63
64PLAT_INCLUDES += -I${TC_BASE}/include/
65
Usama Arif6ec0c652021-04-09 17:07:41 +010066# CPU libraries for TARGET_PLATFORM=0
67ifeq (${TARGET_PLATFORM}, 0)
Rupinderjit Singheebd2c32022-04-04 17:28:41 +010068TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \
69 lib/cpus/aarch64/cortex_a710.S \
Usama Arif6ec0c652021-04-09 17:07:41 +010070 lib/cpus/aarch64/cortex_x2.S
71endif
72
73# CPU libraries for TARGET_PLATFORM=1
74ifeq (${TARGET_PLATFORM}, 1)
Rupinderjit Singheebd2c32022-04-04 17:28:41 +010075TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \
Rupinderjit Singhc58b9a82022-08-23 11:55:27 +010076 lib/cpus/aarch64/cortex_a715.S \
77 lib/cpus/aarch64/cortex_x3.S
Usama Arif6ec0c652021-04-09 17:07:41 +010078endif
79
Rupinderjit Singheebd2c32022-04-04 17:28:41 +010080# CPU libraries for TARGET_PLATFORM=2
81ifeq (${TARGET_PLATFORM}, 2)
82TC_CPU_SOURCES += lib/cpus/aarch64/cortex_hayes.S \
Harrison Mutai8c87bec2022-10-03 12:48:35 +010083 lib/cpus/aarch64/cortex_hunter.S \
84 lib/cpus/aarch64/cortex_hunter_elp_arm.S
Rupinderjit Singheebd2c32022-04-04 17:28:41 +010085endif
86
Usama Arif6ec0c652021-04-09 17:07:41 +010087INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c
88
89PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \
90 ${TC_BASE}/include/tc_helpers.S
91
92BL1_SOURCES += ${INTERCONNECT_SOURCES} \
93 ${TC_CPU_SOURCES} \
94 ${TC_BASE}/tc_trusted_boot.c \
95 ${TC_BASE}/tc_err.c \
96 drivers/arm/sbsa/sbsa.c
97
98
99BL2_SOURCES += ${TC_BASE}/tc_security.c \
100 ${TC_BASE}/tc_err.c \
101 ${TC_BASE}/tc_trusted_boot.c \
Usama Arif34a87d72021-08-17 17:57:10 +0100102 ${TC_BASE}/tc_bl2_setup.c \
Usama Arif6ec0c652021-04-09 17:07:41 +0100103 lib/utils/mem_region.c \
104 drivers/arm/tzc/tzc400.c \
105 plat/arm/common/arm_tzc400.c \
106 plat/arm/common/arm_nor_psci_mem_protect.c
107
108BL31_SOURCES += ${INTERCONNECT_SOURCES} \
109 ${TC_CPU_SOURCES} \
110 ${ENT_GIC_SOURCES} \
111 ${TC_BASE}/tc_bl31_setup.c \
112 ${TC_BASE}/tc_topology.c \
Usama Arif34a87d72021-08-17 17:57:10 +0100113 lib/fconf/fconf.c \
114 lib/fconf/fconf_dyn_cfg_getter.c \
Usama Arif6ec0c652021-04-09 17:07:41 +0100115 drivers/cfi/v2m/v2m_flash.c \
116 lib/utils/mem_region.c \
117 plat/arm/common/arm_nor_psci_mem_protect.c
118
Chris Kay1fa05da2021-09-28 15:52:14 +0100119BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
120
Usama Arif6ec0c652021-04-09 17:07:41 +0100121# Add the FDT_SOURCES and options for Dynamic Config
122FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \
123 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts
124FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
125TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
126
127# Add the FW_CONFIG to FIP and specify the same to certtool
128$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
129# Add the TB_FW_CONFIG to FIP and specify the same to certtool
130$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
131
132ifeq (${SPD},spmd)
133ifeq ($(ARM_SPMC_MANIFEST_DTS),)
134ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_manifest.dts
135endif
136
137FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
138TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
139
140# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
141$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG}))
142endif
143
144#Device tree
145TC_HW_CONFIG_DTS := fdts/tc.dts
146TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
147FDT_SOURCES += ${TC_HW_CONFIG_DTS}
148$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS)))
149
150# Add the HW_CONFIG to FIP and specify the same to certtool
151$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG}))
152
153override CTX_INCLUDE_AARCH32_REGS := 0
154
155override CTX_INCLUDE_PAUTH_REGS := 1
156
157override ENABLE_SPE_FOR_LOWER_ELS := 0
158
159override ENABLE_AMU := 1
Chris Kayc19a82b2021-05-18 18:49:51 +0100160override ENABLE_AMU_AUXILIARY_COUNTERS := 1
161override ENABLE_AMU_FCONF := 1
162
163override ENABLE_MPMM := 1
164override ENABLE_MPMM_FCONF := 1
Usama Arif6ec0c652021-04-09 17:07:41 +0100165
166include plat/arm/common/arm_common.mk
167include plat/arm/css/common/css_common.mk
168include plat/arm/soc/common/soc_css.mk
169include plat/arm/board/common/board_common.mk