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Jayanth Dodderi Chidanand6a0da732022-01-17 18:57:17 +00001#
Govindraj Rajaf5211422023-08-17 10:41:48 -05002# Copyright (c) 2022-2023, Arm Limited. All rights reserved.
Jayanth Dodderi Chidanand6a0da732022-01-17 18:57:17 +00003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Govindraj Rajaf5211422023-08-17 10:41:48 -05007# This file lists all of the architectural features, and initializes
8# and enables them based on the configured architecture version.
9
10# This file follows the following format:
11# - By default disable any mandatory features.
12# - Then Enable mandatory feature if applicable to an Arch Version.
13# - Disable or enable any optional feature this would be enabled/disabled if needed by platform.
14
15#
16################################################################################
17# Set mandatory features by default to zero.
18################################################################################
19#
20
21#----
22# 8.1
23#----
24
25# Flag to enable access to Privileged Access Never bit of PSTATE.
26ENABLE_FEAT_PAN := 0
27
28# Flag to enable Virtualization Host Extensions.
29ENABLE_FEAT_VHE := 0
30
31#----
32# 8.2
33#----
34
35# Enable RAS Support.
36ENABLE_FEAT_RAS := 0
37
38#----
Govindraj Rajaf5211422023-08-17 10:41:48 -050039# 8.4
40#----
41
42# Flag to enable Secure EL-2 feature.
43ENABLE_FEAT_SEL2 := 0
44
Govindraj Rajaf5211422023-08-17 10:41:48 -050045# By default, disable trace filter control register access to lower non-secure
46# exception levels, i.e. NS-EL2, or NS-EL1 if NS-EL2 is implemented, but
47# trace filter control register access is unused if FEAT_TRF is implemented.
48ENABLE_TRF_FOR_NS := 0
49
50# Flag to enable Data Independent Timing instructions.
51ENABLE_FEAT_DIT := 0
52
53#----
54# 8.5
55#----
56
57# Flag to enable access to the Random Number Generator registers.
58ENABLE_FEAT_RNG := 0
59
60# Flag to enable Speculation Barrier Instruction.
61ENABLE_FEAT_SB := 0
62
Govindraj Rajaf5211422023-08-17 10:41:48 -050063#----
64# 8.6
65#----
66
67# Flag to enable access to the CNTPOFF_EL2 register.
68ENABLE_FEAT_ECV := 0
69
70# Flag to enable access to the HDFGRTR_EL2 register.
71ENABLE_FEAT_FGT := 0
72
73#----
74# 8.7
75#----
76
77# Flag to enable access to the HCRX_EL2 register by setting SCR_EL3.HXEn.
78ENABLE_FEAT_HCX := 0
79
80#----
81# 8.9
82#----
83
84# Flag to enable access to TCR2 (FEAT_TCR2).
85ENABLE_FEAT_TCR2 := 0
86
87#
88################################################################################
89# Enable Mandatory features based on Arch versions.
90################################################################################
91#
Jayanth Dodderi Chidanand6a0da732022-01-17 18:57:17 +000092
93# Enable the features which are mandatory from ARCH version 8.1 and upwards.
94ifeq "8.1" "$(word 1, $(sort 8.1 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
Govindraj Rajaf5211422023-08-17 10:41:48 -050095ENABLE_FEAT_PAN := 1
96ENABLE_FEAT_VHE := 1
Jayanth Dodderi Chidanand6a0da732022-01-17 18:57:17 +000097endif
98
Manish Pandey9202d512023-02-13 12:39:17 +000099# Enable the features which are mandatory from ARCH version 8.2 and upwards.
100ifeq "8.2" "$(word 1, $(sort 8.2 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
Govindraj Rajaf5211422023-08-17 10:41:48 -0500101ENABLE_FEAT_RAS := 1
Manish Pandey9202d512023-02-13 12:39:17 +0000102endif
103
Jayanth Dodderi Chidanand6a0da732022-01-17 18:57:17 +0000104# Enable the features which are mandatory from ARCH version 8.4 and upwards.
105ifeq "8.4" "$(word 1, $(sort 8.4 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
Govindraj Rajaf5211422023-08-17 10:41:48 -0500106ENABLE_FEAT_SEL2 := 1
Govindraj Rajaf5211422023-08-17 10:41:48 -0500107ENABLE_TRF_FOR_NS := 1
108ENABLE_FEAT_DIT := 1
Jayanth Dodderi Chidanand6a0da732022-01-17 18:57:17 +0000109endif
110
111# Enable the features which are mandatory from ARCH version 8.5 and upwards.
112ifeq "8.5" "$(word 1, $(sort 8.5 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
Govindraj Rajaf5211422023-08-17 10:41:48 -0500113ENABLE_FEAT_RNG := 1
114ENABLE_FEAT_SB := 1
115
116# Enable Memory tagging, Branch Target Identification for aarch64 only.
117ifeq ($(ARCH), aarch64)
118 mem_tag_arch_support := yes
119endif #(ARCH=aarch64)
120
Jayanth Dodderi Chidanand6a0da732022-01-17 18:57:17 +0000121endif
122
123# Enable the features which are mandatory from ARCH version 8.6 and upwards.
124ifeq "8.6" "$(word 1, $(sort 8.6 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
Govindraj Rajaf5211422023-08-17 10:41:48 -0500125ENABLE_FEAT_ECV := 1
126ENABLE_FEAT_FGT := 1
Jayanth Dodderi Chidanand6a0da732022-01-17 18:57:17 +0000127endif
128
129# Enable the features which are mandatory from ARCH version 8.7 and upwards.
130ifeq "8.7" "$(word 1, $(sort 8.7 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
Govindraj Rajaf5211422023-08-17 10:41:48 -0500131ENABLE_FEAT_HCX := 1
Jayanth Dodderi Chidanand6a0da732022-01-17 18:57:17 +0000132endif
Govindraj Rajaf5211422023-08-17 10:41:48 -0500133
134# Enable the features which are mandatory from ARCH version 8.9 and upwards.
135ifeq "8.9" "$(word 1, $(sort 8.9 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
136ENABLE_FEAT_TCR2 := 1
137endif
138
139#
140################################################################################
141# Optional Features defaulted to 0 or 2, if they are not enabled from
142# build option. Can also be disabled or enabled by platform if needed.
143################################################################################
144#
145
146#----
147# 8.0
148#----
149
150# Flag to enable CSV2_2 extension.
151ENABLE_FEAT_CSV2_2 ?= 0
152
153# By default, disable access of trace system registers from NS lower
154# ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused if
155# system register trace is implemented. This feature is available if
156# trace unit such as ETMv4.x, This feature is OPTIONAL and is only
157# permitted in Armv8 implementations.
158ENABLE_SYS_REG_TRACE_FOR_NS ?= 0
159
160#----
161# 8.2
162#----
163
164# Build option to enable/disable the Statistical Profiling Extension,
165# keep it enabled by default for AArch64.
166ifeq (${ARCH},aarch64)
Govindraj Raja1ca73b42023-09-20 15:31:45 -0500167 ENABLE_SPE_FOR_NS ?= 2
Govindraj Rajaf5211422023-08-17 10:41:48 -0500168else ifeq (${ARCH},aarch32)
Govindraj Raja1ca73b42023-09-20 15:31:45 -0500169 ifdef ENABLE_SPE_FOR_NS
170 $(error ENABLE_SPE_FOR_NS is not supported for AArch32)
171 else
172 ENABLE_SPE_FOR_NS := 0
173 endif
Govindraj Rajaf5211422023-08-17 10:41:48 -0500174endif
175
176# Enable SVE for non-secure world by default.
177ifeq (${ARCH},aarch64)
Govindraj Raja1ca73b42023-09-20 15:31:45 -0500178 ENABLE_SVE_FOR_NS ?= 2
Govindraj Rajaf5211422023-08-17 10:41:48 -0500179# SVE is only supported on AArch64 so disable it on AArch32.
180else ifeq (${ARCH},aarch32)
Govindraj Raja1ca73b42023-09-20 15:31:45 -0500181 ifdef ENABLE_SVE_FOR_NS
182 $(error ENABLE_SVE_FOR_NS is not supported for AArch32)
183 else
184 ENABLE_SVE_FOR_NS := 0
185 endif
Govindraj Rajaf5211422023-08-17 10:41:48 -0500186endif
187
188#----
Govindraj Raja35472702023-09-20 14:32:24 -0500189# 8.3
190#----
191
192# Flag to enable Pointer Authentication. Internal flag not meant for
193# direct setting. Use BRANCH_PROTECTION to enable PAUTH.
194ENABLE_PAUTH ?= 0
195
196# Include pointer authentication (ARMv8.3-PAuth) registers in cpu context. This
197# must be set to 1 if the platform wants to use this feature in the Secure
198# world. It is not necessary for use in the Non-secure world.
199CTX_INCLUDE_PAUTH_REGS ?= 0
200
201#----
Govindraj Rajaf5211422023-08-17 10:41:48 -0500202# 8.4
203#----
204
205# Feature flags for supporting Activity monitor extensions.
206ENABLE_FEAT_AMU ?= 0
207ENABLE_AMU_AUXILIARY_COUNTERS ?= 0
208ENABLE_AMU_FCONF ?= 0
209AMU_RESTRICT_COUNTERS ?= 0
210
211# Build option to enable MPAM for lower ELs.
Arvind Ram Prakashedebefb2023-10-11 12:10:56 -0500212# Enabling it by default
213ifeq (${ARCH},aarch64)
214 ENABLE_FEAT_MPAM ?= 2
215else ifeq (${ARCH},aarch32)
216 ifdef ENABLE_FEAT_MPAM
217 $(error ENABLE_FEAT_MPAM is not supported for AArch32)
218 else
219 ENABLE_FEAT_MPAM := 0
220 endif
221endif
Govindraj Rajaf5211422023-08-17 10:41:48 -0500222
Govindraj Raja8b2048c2023-09-19 08:43:16 -0500223# Include nested virtualization control (Armv8.4-NV) registers in cpu context.
224# This must be set to 1 if architecture implements Nested Virtualization
225# Extension and platform wants to use this feature in the Secure world.
226CTX_INCLUDE_NEVE_REGS ?= 0
227
Govindraj Rajaf5211422023-08-17 10:41:48 -0500228#----
229# 8.5
230#----
231
232# Flag to enable support for EL3 trapping of reads of the RNDR and RNDRRS
233# registers, by setting SCR_EL3.TRNDR.
234ENABLE_FEAT_RNG_TRAP ?= 0
235
236# Include Memory Tagging Extension registers in cpu context. This must be set
237# to 1 if the platform wants to use this feature in the Secure world and MTE is
238# enabled at ELX.
239CTX_INCLUDE_MTE_REGS ?= 0
240
Govindraj Raja35472702023-09-20 14:32:24 -0500241# Flag to enable Branch Target Identification.
242# Internal flag not meant for direct setting.
243# Use BRANCH_PROTECTION to enable BTI.
244ENABLE_BTI ?= 0
245
Govindraj Rajaf5211422023-08-17 10:41:48 -0500246#----
247# 8.6
248#----
249
250# Flag to enable AMUv1p1 extension.
251ENABLE_FEAT_AMUv1p1 ?= 0
252
253# Flag to enable delayed trapping of WFE instruction (FEAT_TWED).
254ENABLE_FEAT_TWED ?= 0
255
256# In v8.6+ platforms with delayed trapping of WFE being supported
257# via FEAT_TWED, this flag takes the delay value to be set in the
258# SCR_EL3.TWEDEL(4bit) field, when FEAT_TWED is implemented.
259# By default it takes 0, and need to be updated by the platforms.
260TWED_DELAY ?= 0
261
262# Disable MTPMU if FEAT_MTPMU is supported.
263DISABLE_MTPMU ?= 0
264
265#----
266# 8.9
267#----
268
269# Flag to enable NoTagAccess memory region attribute for stage 2 of translation.
270ENABLE_FEAT_MTE_PERM ?= 0
271
272# Flag to enable access to Stage 2 Permission Indirection (FEAT_S2PIE).
273ENABLE_FEAT_S2PIE ?= 0
274
275# Flag to enable access to Stage 1 Permission Indirection (FEAT_S1PIE).
276ENABLE_FEAT_S1PIE ?= 0
277
278# Flag to enable access to Stage 2 Permission Overlay (FEAT_S2POE).
279ENABLE_FEAT_S2POE ?= 0
280
281# Flag to enable access to Stage 1 Permission Overlay (FEAT_S1POE).
282ENABLE_FEAT_S1POE ?= 0
283
284#----
285# 9.0
286#----
287
288# Flag to enable Realm Management Extension (FEAT_RME).
289ENABLE_RME ?= 0
290
291# Scalable Matrix Extension for non-secure world.
292ENABLE_SME_FOR_NS ?= 0
293
294# Scalable Vector Extension for secure world.
295ENABLE_SVE_FOR_SWD ?= 0
296
297# By default, disable access of trace buffer control registers from NS
298# lower ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused
299# if FEAT_TRBE is implemented.
300# Note FEAT_TRBE is only supported on AArch64 - therefore do not enable in
301# AArch32.
302ifeq (${ARCH},aarch64)
Govindraj Raja1ca73b42023-09-20 15:31:45 -0500303 ENABLE_TRBE_FOR_NS ?= 0
Govindraj Rajaf5211422023-08-17 10:41:48 -0500304else ifeq (${ARCH},aarch32)
Govindraj Raja1ca73b42023-09-20 15:31:45 -0500305 ifdef ENABLE_TRBE_FOR_NS
306 $(error ENABLE_TRBE_FOR_NS is not supported for AArch32)
307 else
308 ENABLE_TRBE_FOR_NS := 0
309 endif
Govindraj Rajaf5211422023-08-17 10:41:48 -0500310endif
311
312#----
313# 9.2
314#----
315
316# Scalable Matrix Extension version 2 for non-secure world.
317ENABLE_SME2_FOR_NS ?= 0
318
319# Scalable Matrix Extension for secure world.
320ENABLE_SME_FOR_SWD ?= 0
321
322# By default, disable access to branch record buffer control registers from NS
323# lower ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused
324# if FEAT_BRBE is implemented.
325ENABLE_BRBE_FOR_NS ?= 0
326
327#----
328#9.4
329#----
330
331# Flag to enable access to Guarded Control Stack (FEAT_GCS).
332ENABLE_FEAT_GCS ?= 0