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Sandrine Bailleux3cd87d72018-10-09 11:12:55 +02001/*
Soby Mathew2c2810f2024-11-15 17:11:24 +00002 * Copyright (c) 2018-2024, Arm Limited. All rights reserved.
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch_helpers.h>
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +02008#include <debug.h>
Antonio Nino Diaz09a00ef2019-01-11 13:12:58 +00009#include <drivers/arm/sp805.h>
10#include <drivers/console.h>
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020011#include <platform.h>
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020012#include <xlat_tables_v2.h>
13
14/*
15 * The following platform functions are all weakly defined. They provide typical
16 * implementations that may be re-used by multiple platforms but may also be
17 * overridden by a platform if required.
18 */
19
20#pragma weak tftf_platform_end
21#pragma weak tftf_platform_watchdog_set
22#pragma weak tftf_platform_watchdog_reset
23#pragma weak tftf_plat_configure_mmu
24#pragma weak tftf_plat_enable_mmu
25#pragma weak tftf_plat_reset
26#pragma weak plat_get_prot_regions
Soby Mathew2c2810f2024-11-15 17:11:24 +000027#pragma weak plat_pcie_get_info_table
Maheedhar Bollapalli1e4f7a02025-02-14 10:40:56 +053028#pragma weak plat_get_invalid_addr
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020029
30#if IMAGE_TFTF
31
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010032#define IMAGE_TEXT_BASE TFTF_BASE
33IMPORT_SYM(uintptr_t, __TEXT_END__, IMAGE_TEXT_END);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020034
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010035#define IMAGE_RODATA_BASE IMAGE_TEXT_END
36IMPORT_SYM(uintptr_t, __RODATA_END__, IMAGE_RODATA_END);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020037
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010038#define IMAGE_RW_BASE IMAGE_RODATA_END
39IMPORT_SYM(uintptr_t, __TFTF_END__, IMAGE_RW_END);
40
41IMPORT_SYM(uintptr_t, __COHERENT_RAM_START__, COHERENT_RAM_START);
42IMPORT_SYM(uintptr_t, __COHERENT_RAM_END__, COHERENT_RAM_END);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020043
44#elif IMAGE_NS_BL1U
45
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010046#define IMAGE_TEXT_BASE NS_BL1U_BASE
47IMPORT_SYM(uintptr_t, __TEXT_END__, IMAGE_TEXT_END);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020048
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010049#define IMAGE_RODATA_BASE IMAGE_TEXT_END
50IMPORT_SYM(uintptr_t, __RODATA_END__, IMAGE_RODATA_END);
51
52#define IMAGE_RW_BASE NS_BL1U_RW_BASE
53IMPORT_SYM(uintptr_t, __NS_BL1U_RAM_END__, IMAGE_RW_END);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020054
55#elif IMAGE_NS_BL2U
56
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010057#define IMAGE_TEXT_BASE NS_BL2U_BASE
58IMPORT_SYM(uintptr_t, __TEXT_END__, IMAGE_TEXT_END);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020059
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010060#define IMAGE_RODATA_BASE IMAGE_TEXT_END
61IMPORT_SYM(uintptr_t, __RODATA_END__, IMAGE_RODATA_END);
62
63#define IMAGE_RW_BASE IMAGE_RODATA_END
64IMPORT_SYM(uintptr_t, __NS_BL2U_END__, IMAGE_RW_END_UNALIGNED);
65#define IMAGE_RW_END round_up(IMAGE_RW_END_UNALIGNED, PAGE_SIZE)
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020066
67#endif
68
69void tftf_platform_end(void)
70{
71 /*
72 * Send EOT (End Of Transmission) on the UART.
73 * This can be used to shutdown a software model.
74 */
75 static const char ascii_eot = 4;
76 console_putc(ascii_eot);
77}
78
79void tftf_platform_watchdog_set(void)
80{
81 /* Placeholder function which should be redefined by each platform */
82}
83
84void tftf_platform_watchdog_reset(void)
85{
86 /* Placeholder function which should be redefined by each platform */
87}
88
89void tftf_plat_configure_mmu(void)
90{
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010091 /* Code */
92 mmap_add_region(IMAGE_TEXT_BASE, IMAGE_TEXT_BASE,
Alexei Fedorovdf954c92020-06-17 15:37:17 +010093 IMAGE_TEXT_END - IMAGE_TEXT_BASE, MT_CODE | MT_NS);
Ambroise Vincentee3e7cd2019-07-03 16:44:49 +010094
95 /* RO data */
96 mmap_add_region(IMAGE_RODATA_BASE, IMAGE_RODATA_BASE,
Alexei Fedorovdf954c92020-06-17 15:37:17 +010097 IMAGE_RODATA_END - IMAGE_RODATA_BASE, MT_RO_DATA | MT_NS);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +020098
99 /* Data + BSS */
100 mmap_add_region(IMAGE_RW_BASE, IMAGE_RW_BASE,
Alexei Fedorovdf954c92020-06-17 15:37:17 +0100101 IMAGE_RW_END - IMAGE_RW_BASE, MT_RW_DATA | MT_NS);
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200102
103#if IMAGE_TFTF
104 mmap_add_region(COHERENT_RAM_START, COHERENT_RAM_START,
105 COHERENT_RAM_END - COHERENT_RAM_START,
106 MT_DEVICE | MT_RW | MT_NS);
107#endif
108
109 mmap_add(tftf_platform_get_mmap());
110 init_xlat_tables();
111
112 tftf_plat_enable_mmu();
113}
114
115void tftf_plat_enable_mmu(void)
116{
Deepika Bhavnanic249d5e2020-02-06 16:29:45 -0600117#ifdef __aarch64__
Sandrine Bailleux3cd87d72018-10-09 11:12:55 +0200118 if (IS_IN_EL1())
119 enable_mmu_el1(0);
120 else if (IS_IN_EL2())
121 enable_mmu_el2(0);
122 else
123 panic();
124#else
125 if (IS_IN_HYP())
126 enable_mmu_hyp(0);
127 else
128 enable_mmu_svc_mon(0);
129#endif
130}
131
132void tftf_plat_reset(void)
133{
134 /*
135 * SP805 peripheral interrupt is not serviced in TFTF. The reset signal
136 * generated by it is used to reset the platform.
137 */
138 sp805_wdog_start(1);
139
140 /*
141 * Reset might take some execution cycles, Depending on the ratio between
142 * CPU clock frequency and Watchdog clock frequency
143 */
144 while (1)
145 ;
146}
147
148const mem_region_t *plat_get_prot_regions(int *nelem)
149{
150 *nelem = 0;
151 return NULL;
152}
Soby Mathew2c2810f2024-11-15 17:11:24 +0000153
154const struct pcie_info_table *plat_pcie_get_info_table(void)
155{
156 return NULL;
157}
Maheedhar Bollapalli1e4f7a02025-02-14 10:40:56 +0530158
159uintptr_t plat_get_invalid_addr(void)
160{
161 return (uintptr_t)0x0;
162}