blob: 9daf6f043066b91c358a0991ac551a612e198f2a [file] [log] [blame]
Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley97043ac2014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley97043ac2014-04-09 13:14:54 +010033#include <assert.h>
34#include <bl_common.h>
35#include <context.h>
Jeenu Viswambharancaa84932014-02-06 10:36:15 +000036#include <context_mgmt.h>
Dan Handley35e98e52014-04-09 13:13:04 +010037#include <debug.h>
Dan Handley5f0cdb02014-05-14 17:44:19 +010038#include <platform.h>
Andrew Thoelke167a9352014-06-04 21:10:52 +010039#include <string.h>
Dan Handley35e98e52014-04-09 13:13:04 +010040#include "psci_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010041
Achin Gupta607084e2014-02-09 18:24:19 +000042/*
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000043 * SPD power management operations, expected to be supplied by the registered
44 * SPD on successful SP initialization
Achin Gupta607084e2014-02-09 18:24:19 +000045 */
Dan Handleyfb037bf2014-04-10 15:37:22 +010046const spd_pm_ops_t *psci_spd_pm;
Achin Gupta607084e2014-02-09 18:24:19 +000047
Achin Gupta4f6ad662013-10-25 09:08:21 +010048/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +010049 * Grand array that holds the platform's topology information for state
50 * management of affinity instances. Each node (aff_map_node) in the array
51 * corresponds to an affinity instance e.g. cluster, cpu within an mpidr
52 ******************************************************************************/
Dan Handleyfb037bf2014-04-10 15:37:22 +010053aff_map_node_t psci_aff_map[PSCI_NUM_AFFS]
Achin Gupta4f6ad662013-10-25 09:08:21 +010054__attribute__ ((section("tzfw_coherent_mem")));
55
56/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +010057 * Pointer to functions exported by the platform to complete power mgmt. ops
58 ******************************************************************************/
Dan Handley625de1d2014-04-23 13:47:06 +010059const plat_pm_ops_t *psci_plat_pm_ops;
Achin Gupta4f6ad662013-10-25 09:08:21 +010060
61/*******************************************************************************
Achin Guptaa45e3972013-12-05 15:10:48 +000062 * Routine to return the maximum affinity level to traverse to after a cpu has
63 * been physically powered up. It is expected to be called immediately after
Achin Gupta776b68a2014-07-25 14:52:47 +010064 * reset from assembler code.
Achin Guptaa45e3972013-12-05 15:10:48 +000065 ******************************************************************************/
Achin Gupta776b68a2014-07-25 14:52:47 +010066int get_power_on_target_afflvl()
Achin Guptaa45e3972013-12-05 15:10:48 +000067{
Vikram Kanigiri759ec932014-04-01 19:26:26 +010068 int afflvl;
Achin Guptaa45e3972013-12-05 15:10:48 +000069
Achin Gupta776b68a2014-07-25 14:52:47 +010070#if DEBUG
71 unsigned int state;
72 aff_map_node_t *node;
73
Achin Guptaa45e3972013-12-05 15:10:48 +000074 /* Retrieve our node from the topology tree */
Achin Gupta776b68a2014-07-25 14:52:47 +010075 node = psci_get_aff_map_node(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
76 MPIDR_AFFLVL0);
Achin Guptaa45e3972013-12-05 15:10:48 +000077 assert(node);
78
79 /*
Achin Gupta776b68a2014-07-25 14:52:47 +010080 * Sanity check the state of the cpu. It should be either suspend or "on
81 * pending"
Achin Guptaa45e3972013-12-05 15:10:48 +000082 */
Achin Gupta75f73672013-12-05 16:33:10 +000083 state = psci_get_state(node);
Achin Gupta776b68a2014-07-25 14:52:47 +010084 assert(state == PSCI_STATE_SUSPEND || state == PSCI_STATE_ON_PENDING);
85#endif
Achin Guptaa45e3972013-12-05 15:10:48 +000086
Achin Gupta776b68a2014-07-25 14:52:47 +010087 /*
88 * Assume that this cpu was suspended and retrieve its target affinity
89 * level. If it is invalid then it could only have been turned off
90 * earlier. get_max_afflvl() will return the highest affinity level a
91 * cpu can be turned off to.
92 */
93 afflvl = psci_get_suspend_afflvl();
94 if (afflvl == PSCI_INVALID_DATA)
95 afflvl = get_max_afflvl();
96 return afflvl;
Achin Guptaa45e3972013-12-05 15:10:48 +000097}
98
99/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100100 * Simple routine to retrieve the maximum affinity level supported by the
101 * platform and check that it makes sense.
102 ******************************************************************************/
Juan Castillo4f2104f2014-06-13 17:05:10 +0100103int get_max_afflvl(void)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100104{
105 int aff_lvl;
106
107 aff_lvl = plat_get_max_afflvl();
108 assert(aff_lvl <= MPIDR_MAX_AFFLVL && aff_lvl >= MPIDR_AFFLVL0);
109
110 return aff_lvl;
111}
112
113/*******************************************************************************
114 * Simple routine to set the id of an affinity instance at a given level in the
115 * mpidr.
116 ******************************************************************************/
117unsigned long mpidr_set_aff_inst(unsigned long mpidr,
118 unsigned char aff_inst,
119 int aff_lvl)
120{
121 unsigned long aff_shift;
122
123 assert(aff_lvl <= MPIDR_AFFLVL3);
124
125 /*
126 * Decide the number of bits to shift by depending upon
127 * the affinity level
128 */
129 aff_shift = get_afflvl_shift(aff_lvl);
130
131 /* Clear the existing affinity instance & set the new one*/
132 mpidr &= ~(MPIDR_AFFLVL_MASK << aff_shift);
133 mpidr |= aff_inst << aff_shift;
134
135 return mpidr;
136}
137
138/*******************************************************************************
Achin Gupta0959db52013-12-02 17:33:04 +0000139 * This function sanity checks a range of affinity levels.
140 ******************************************************************************/
141int psci_check_afflvl_range(int start_afflvl, int end_afflvl)
142{
143 /* Sanity check the parameters passed */
144 if (end_afflvl > MPIDR_MAX_AFFLVL)
145 return PSCI_E_INVALID_PARAMS;
146
147 if (start_afflvl < MPIDR_AFFLVL0)
148 return PSCI_E_INVALID_PARAMS;
149
150 if (end_afflvl < start_afflvl)
151 return PSCI_E_INVALID_PARAMS;
152
153 return PSCI_E_SUCCESS;
154}
155
156/*******************************************************************************
157 * This function is passed an array of pointers to affinity level nodes in the
158 * topology tree for an mpidr. It picks up locks for each affinity level bottom
159 * up in the range specified.
160 ******************************************************************************/
Andrew Thoelke56378aa2014-06-09 12:44:21 +0100161void psci_acquire_afflvl_locks(int start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000162 int end_afflvl,
Dan Handleyfb037bf2014-04-10 15:37:22 +0100163 mpidr_aff_map_nodes_t mpidr_nodes)
Achin Gupta0959db52013-12-02 17:33:04 +0000164{
165 int level;
166
167 for (level = start_afflvl; level <= end_afflvl; level++) {
168 if (mpidr_nodes[level] == NULL)
169 continue;
Andrew Thoelke634ec6c2014-06-09 12:54:15 +0100170 bakery_lock_get(&mpidr_nodes[level]->lock);
Achin Gupta0959db52013-12-02 17:33:04 +0000171 }
172}
173
174/*******************************************************************************
175 * This function is passed an array of pointers to affinity level nodes in the
176 * topology tree for an mpidr. It releases the lock for each affinity level top
177 * down in the range specified.
178 ******************************************************************************/
Andrew Thoelke56378aa2014-06-09 12:44:21 +0100179void psci_release_afflvl_locks(int start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000180 int end_afflvl,
Dan Handleyfb037bf2014-04-10 15:37:22 +0100181 mpidr_aff_map_nodes_t mpidr_nodes)
Achin Gupta0959db52013-12-02 17:33:04 +0000182{
183 int level;
184
185 for (level = end_afflvl; level >= start_afflvl; level--) {
186 if (mpidr_nodes[level] == NULL)
187 continue;
Andrew Thoelke634ec6c2014-06-09 12:54:15 +0100188 bakery_lock_release(&mpidr_nodes[level]->lock);
Achin Gupta0959db52013-12-02 17:33:04 +0000189 }
190}
191
192/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100193 * Simple routine to determine whether an affinity instance at a given level
194 * in an mpidr exists or not.
195 ******************************************************************************/
196int psci_validate_mpidr(unsigned long mpidr, int level)
197{
Dan Handleyfb037bf2014-04-10 15:37:22 +0100198 aff_map_node_t *node;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100199
200 node = psci_get_aff_map_node(mpidr, level);
201 if (node && (node->state & PSCI_AFF_PRESENT))
202 return PSCI_E_SUCCESS;
203 else
204 return PSCI_E_INVALID_PARAMS;
205}
206
207/*******************************************************************************
Andrew Thoelke167a9352014-06-04 21:10:52 +0100208 * This function determines the full entrypoint information for the requested
209 * PSCI entrypoint on power on/resume and saves this in the non-secure CPU
210 * cpu_context, ready for when the core boots.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100211 ******************************************************************************/
Andrew Thoelke167a9352014-06-04 21:10:52 +0100212int psci_save_ns_entry(uint64_t mpidr,
213 uint64_t entrypoint, uint64_t context_id,
214 uint32_t ns_scr_el3, uint32_t ns_sctlr_el1)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100215{
Andrew Thoelke167a9352014-06-04 21:10:52 +0100216 uint32_t ep_attr, mode, sctlr, daif, ee;
217 entry_point_info_t ep;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100218
Andrew Thoelke167a9352014-06-04 21:10:52 +0100219 sctlr = ns_scr_el3 & SCR_HCE_BIT ? read_sctlr_el2() : ns_sctlr_el1;
220 ee = 0;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100221
Andrew Thoelke167a9352014-06-04 21:10:52 +0100222 ep_attr = NON_SECURE | EP_ST_DISABLE;
223 if (sctlr & SCTLR_EE_BIT) {
224 ep_attr |= EP_EE_BIG;
225 ee = 1;
226 }
227 SET_PARAM_HEAD(&ep, PARAM_EP, VERSION_1, ep_attr);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100228
Andrew Thoelke167a9352014-06-04 21:10:52 +0100229 ep.pc = entrypoint;
230 memset(&ep.args, 0, sizeof(ep.args));
231 ep.args.arg0 = context_id;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100232
233 /*
234 * Figure out whether the cpu enters the non-secure address space
235 * in aarch32 or aarch64
236 */
Andrew Thoelke167a9352014-06-04 21:10:52 +0100237 if (ns_scr_el3 & SCR_RW_BIT) {
Achin Gupta4f6ad662013-10-25 09:08:21 +0100238
239 /*
240 * Check whether a Thumb entry point has been provided for an
241 * aarch64 EL
242 */
243 if (entrypoint & 0x1)
244 return PSCI_E_INVALID_PARAMS;
245
Andrew Thoelke167a9352014-06-04 21:10:52 +0100246 mode = ns_scr_el3 & SCR_HCE_BIT ? MODE_EL2 : MODE_EL1;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100247
Andrew Thoelke167a9352014-06-04 21:10:52 +0100248 ep.spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100249 } else {
250
Andrew Thoelke167a9352014-06-04 21:10:52 +0100251 mode = ns_scr_el3 & SCR_HCE_BIT ? MODE32_hyp : MODE32_svc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100252
253 /*
254 * TODO: Choose async. exception bits if HYP mode is not
255 * implemented according to the values of SCR.{AW, FW} bits
256 */
Vikram Kanigiri23ff9ba2014-05-13 14:42:08 +0100257 daif = DAIF_ABT_BIT | DAIF_IRQ_BIT | DAIF_FIQ_BIT;
258
Andrew Thoelke167a9352014-06-04 21:10:52 +0100259 ep.spsr = SPSR_MODE32(mode, entrypoint & 0x1, ee, daif);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100260 }
261
Andrew Thoelke167a9352014-06-04 21:10:52 +0100262 /* initialise an entrypoint to set up the CPU context */
263 cm_init_context(mpidr, &ep);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100264
Andrew Thoelke167a9352014-06-04 21:10:52 +0100265 return PSCI_E_SUCCESS;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100266}
267
268/*******************************************************************************
Achin Gupta75f73672013-12-05 16:33:10 +0000269 * This function takes a pointer to an affinity node in the topology tree and
270 * returns its state. State of a non-leaf node needs to be calculated.
271 ******************************************************************************/
Dan Handleyfb037bf2014-04-10 15:37:22 +0100272unsigned short psci_get_state(aff_map_node_t *node)
Achin Gupta75f73672013-12-05 16:33:10 +0000273{
274 assert(node->level >= MPIDR_AFFLVL0 && node->level <= MPIDR_MAX_AFFLVL);
275
276 /* A cpu node just contains the state which can be directly returned */
277 if (node->level == MPIDR_AFFLVL0)
278 return (node->state >> PSCI_STATE_SHIFT) & PSCI_STATE_MASK;
279
280 /*
281 * For an affinity level higher than a cpu, the state has to be
282 * calculated. It depends upon the value of the reference count
283 * which is managed by each node at the next lower affinity level
284 * e.g. for a cluster, each cpu increments/decrements the reference
285 * count. If the reference count is 0 then the affinity level is
286 * OFF else ON.
287 */
288 if (node->ref_count)
289 return PSCI_STATE_ON;
290 else
291 return PSCI_STATE_OFF;
292}
293
294/*******************************************************************************
295 * This function takes a pointer to an affinity node in the topology tree and
296 * a target state. State of a non-leaf node needs to be converted to a reference
297 * count. State of a leaf node can be set directly.
298 ******************************************************************************/
Dan Handleyfb037bf2014-04-10 15:37:22 +0100299void psci_set_state(aff_map_node_t *node, unsigned short state)
Achin Gupta75f73672013-12-05 16:33:10 +0000300{
301 assert(node->level >= MPIDR_AFFLVL0 && node->level <= MPIDR_MAX_AFFLVL);
302
303 /*
304 * For an affinity level higher than a cpu, the state is used
305 * to decide whether the reference count is incremented or
306 * decremented. Entry into the ON_PENDING state does not have
307 * effect.
308 */
309 if (node->level > MPIDR_AFFLVL0) {
310 switch (state) {
311 case PSCI_STATE_ON:
312 node->ref_count++;
313 break;
314 case PSCI_STATE_OFF:
315 case PSCI_STATE_SUSPEND:
316 node->ref_count--;
317 break;
318 case PSCI_STATE_ON_PENDING:
319 /*
320 * An affinity level higher than a cpu will not undergo
321 * a state change when it is about to be turned on
322 */
323 return;
324 default:
325 assert(0);
326 }
327 } else {
328 node->state &= ~(PSCI_STATE_MASK << PSCI_STATE_SHIFT);
329 node->state |= (state & PSCI_STATE_MASK) << PSCI_STATE_SHIFT;
330 }
331}
332
333/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100334 * An affinity level could be on, on_pending, suspended or off. These are the
Achin Gupta3140a9e2013-12-02 16:23:12 +0000335 * logical states it can be in. Physically either it is off or on. When it is in
336 * the state on_pending then it is about to be turned on. It is not possible to
Achin Gupta4f6ad662013-10-25 09:08:21 +0100337 * tell whether that's actually happenned or not. So we err on the side of
338 * caution & treat the affinity level as being turned off.
339 ******************************************************************************/
Dan Handleyfb037bf2014-04-10 15:37:22 +0100340unsigned short psci_get_phys_state(aff_map_node_t *node)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100341{
Achin Gupta75f73672013-12-05 16:33:10 +0000342 unsigned int state;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100343
Achin Gupta75f73672013-12-05 16:33:10 +0000344 state = psci_get_state(node);
345 return get_phys_state(state);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100346}
347
348/*******************************************************************************
Achin Gupta0959db52013-12-02 17:33:04 +0000349 * This function takes an array of pointers to affinity instance nodes in the
350 * topology tree and calls the physical power on handler for the corresponding
351 * affinity levels
352 ******************************************************************************/
Dan Handleyfb037bf2014-04-10 15:37:22 +0100353static int psci_call_power_on_handlers(mpidr_aff_map_nodes_t mpidr_nodes,
Achin Gupta0959db52013-12-02 17:33:04 +0000354 int start_afflvl,
355 int end_afflvl,
Andrew Thoelke56378aa2014-06-09 12:44:21 +0100356 afflvl_power_on_finisher_t *pon_handlers)
Achin Gupta0959db52013-12-02 17:33:04 +0000357{
358 int rc = PSCI_E_INVALID_PARAMS, level;
Dan Handleyfb037bf2014-04-10 15:37:22 +0100359 aff_map_node_t *node;
Achin Gupta0959db52013-12-02 17:33:04 +0000360
361 for (level = end_afflvl; level >= start_afflvl; level--) {
362 node = mpidr_nodes[level];
363 if (node == NULL)
364 continue;
365
366 /*
367 * If we run into any trouble while powering up an
368 * affinity instance, then there is no recovery path
369 * so simply return an error and let the caller take
370 * care of the situation.
371 */
Andrew Thoelke56378aa2014-06-09 12:44:21 +0100372 rc = pon_handlers[level](node);
Achin Gupta0959db52013-12-02 17:33:04 +0000373 if (rc != PSCI_E_SUCCESS)
374 break;
375 }
376
377 return rc;
378}
379
380/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100381 * Generic handler which is called when a cpu is physically powered on. It
Achin Gupta0959db52013-12-02 17:33:04 +0000382 * traverses through all the affinity levels performing generic, architectural,
Achin Gupta4f6ad662013-10-25 09:08:21 +0100383 * platform setup and state management e.g. for a cluster that's been powered
384 * on, it will call the platform specific code which will enable coherency at
385 * the interconnect level. For a cpu it could mean turning on the MMU etc.
386 *
Achin Gupta0959db52013-12-02 17:33:04 +0000387 * The state of all the relevant affinity levels is changed after calling the
388 * affinity level specific handlers as their actions would depend upon the state
389 * the affinity level is exiting from.
390 *
391 * The affinity level specific handlers are called in descending order i.e. from
392 * the highest to the lowest affinity level implemented by the platform because
393 * to turn on affinity level X it is neccesary to turn on affinity level X + 1
394 * first.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100395 ******************************************************************************/
Andrew Thoelke56378aa2014-06-09 12:44:21 +0100396void psci_afflvl_power_on_finish(int start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000397 int end_afflvl,
Dan Handleyfb037bf2014-04-10 15:37:22 +0100398 afflvl_power_on_finisher_t *pon_handlers)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100399{
Dan Handleyfb037bf2014-04-10 15:37:22 +0100400 mpidr_aff_map_nodes_t mpidr_nodes;
Achin Gupta0959db52013-12-02 17:33:04 +0000401 int rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100402
Achin Gupta4f6ad662013-10-25 09:08:21 +0100403 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000404 * Collect the pointers to the nodes in the topology tree for
405 * each affinity instance in the mpidr. If this function does
406 * not return successfully then either the mpidr or the affinity
407 * levels are incorrect. Either case is an irrecoverable error.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100408 */
Andrew Thoelke56378aa2014-06-09 12:44:21 +0100409 rc = psci_get_aff_map_nodes(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
Achin Gupta0959db52013-12-02 17:33:04 +0000410 start_afflvl,
411 end_afflvl,
412 mpidr_nodes);
James Morrissey40a6f642014-02-10 14:24:36 +0000413 if (rc != PSCI_E_SUCCESS)
414 panic();
Achin Gupta4f6ad662013-10-25 09:08:21 +0100415
416 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000417 * This function acquires the lock corresponding to each affinity
418 * level so that by the time all locks are taken, the system topology
419 * is snapshot and state management can be done safely.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100420 */
Andrew Thoelke56378aa2014-06-09 12:44:21 +0100421 psci_acquire_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000422 end_afflvl,
423 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100424
425 /* Perform generic, architecture and platform specific handling */
Achin Gupta0959db52013-12-02 17:33:04 +0000426 rc = psci_call_power_on_handlers(mpidr_nodes,
427 start_afflvl,
428 end_afflvl,
Andrew Thoelke56378aa2014-06-09 12:44:21 +0100429 pon_handlers);
James Morrissey40a6f642014-02-10 14:24:36 +0000430 if (rc != PSCI_E_SUCCESS)
431 panic();
Achin Gupta4f6ad662013-10-25 09:08:21 +0100432
433 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000434 * This loop releases the lock corresponding to each affinity level
435 * in the reverse order to which they were acquired.
436 */
Andrew Thoelke56378aa2014-06-09 12:44:21 +0100437 psci_release_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000438 end_afflvl,
439 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100440}
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000441
442/*******************************************************************************
443 * This function initializes the set of hooks that PSCI invokes as part of power
444 * management operation. The power management hooks are expected to be provided
445 * by the SPD, after it finishes all its initialization
446 ******************************************************************************/
Dan Handleyfb037bf2014-04-10 15:37:22 +0100447void psci_register_spd_pm_hook(const spd_pm_ops_t *pm)
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000448{
449 psci_spd_pm = pm;
450}
Juan Castillod5f13092014-08-12 11:17:06 +0100451
452/*******************************************************************************
453 * This function prints the state of all affinity instances present in the
454 * system
455 ******************************************************************************/
456void psci_print_affinity_map(void)
457{
458#if LOG_LEVEL >= LOG_LEVEL_INFO
459 aff_map_node_t *node;
460 unsigned int idx;
461 /* This array maps to the PSCI_STATE_X definitions in psci.h */
462 static const char *psci_state_str[] = {
463 "ON",
464 "OFF",
465 "ON_PENDING",
466 "SUSPEND"
467 };
468
469 INFO("PSCI Affinity Map:\n");
470 for (idx = 0; idx < PSCI_NUM_AFFS ; idx++) {
471 node = &psci_aff_map[idx];
472 if (!(node->state & PSCI_AFF_PRESENT)) {
473 continue;
474 }
475 INFO(" AffInst: Level %u, MPID 0x%lx, State %s\n",
476 node->level, node->mpidr,
477 psci_state_str[psci_get_state(node)]);
478 }
479#endif
480}