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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Masahiro Yamada0fc50a82018-02-01 18:42:24 +09002 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-arm82cb2c12017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
7#include <arch.h>
Andrew Thoelke0a30cf52014-03-18 13:46:55 +00008#include <asm_macros.S>
Julius Werner17cd67d2017-09-18 16:49:48 -07009#include <console.h>
Dan Handley5f0cdb02014-05-14 17:44:19 +010010#include <platform_def.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010011
Achin Gupta4f6ad662013-10-25 09:08:21 +010012 .weak plat_report_exception
Soby Mathewc67b09b2014-07-14 16:57:23 +010013 .weak plat_crash_console_init
14 .weak plat_crash_console_putc
Antonio Nino Diaz801cf932017-02-17 17:11:27 +000015 .weak plat_crash_console_flush
Soby Mathew24fb8382014-08-14 12:22:32 +010016 .weak plat_reset_handler
Soby Mathewadd40352014-08-14 12:49:05 +010017 .weak plat_disable_acp
Juan Castilloe3f67122015-10-05 16:59:38 +010018 .weak bl1_plat_prepare_exit
Antonio Nino Diaz1c3ea102016-02-01 13:57:25 +000019 .weak plat_panic_handler
Jeenu Viswambharan64ee2632018-04-27 15:17:03 +010020 .weak bl31_plat_enable_mmu
21 .weak bl32_plat_enable_mmu
Achin Gupta4f6ad662013-10-25 09:08:21 +010022
Jeenu Viswambharanb56dc2a2018-05-17 09:52:36 +010023 .weak plat_handle_uncontainable_ea
24
Soby Mathew5c8babc2015-07-13 16:26:11 +010025#if !ENABLE_PLAT_COMPAT
26 .globl platform_get_core_pos
27
28#define MPIDR_RES_BIT_MASK 0xff000000
29
30 /* ------------------------------------------------------------------
31 * int platform_get_core_pos(int mpidr)
32 * Returns the CPU index of the CPU specified by mpidr. This is
33 * defined when platform compatibility is disabled to enable Trusted
34 * Firmware components like SPD using the old platform API to work.
35 * This API is deprecated and it assumes that the mpidr specified is
36 * that of a valid and present CPU. Instead, plat_my_core_pos()
37 * should be used for CPU index of the current CPU and
38 * plat_core_pos_by_mpidr() should be used for CPU index of a
39 * CPU specified by its mpidr.
40 * ------------------------------------------------------------------
41 */
42func_deprecated platform_get_core_pos
43 bic x0, x0, #MPIDR_RES_BIT_MASK
44 mrs x1, mpidr_el1
45 bic x1, x1, #MPIDR_RES_BIT_MASK
46 cmp x0, x1
47 beq plat_my_core_pos
48 b platform_core_pos_helper
49endfunc_deprecated platform_get_core_pos
50#endif
51
Achin Gupta4f6ad662013-10-25 09:08:21 +010052 /* -----------------------------------------------------
Achin Gupta4f6ad662013-10-25 09:08:21 +010053 * Placeholder function which should be redefined by
54 * each platform.
55 * -----------------------------------------------------
56 */
Andrew Thoelke0a30cf52014-03-18 13:46:55 +000057func plat_report_exception
Achin Gupta4f6ad662013-10-25 09:08:21 +010058 ret
Kévin Petit8b779622015-03-24 14:03:57 +000059endfunc plat_report_exception
Soby Mathewc67b09b2014-07-14 16:57:23 +010060
Julius Werner17cd67d2017-09-18 16:49:48 -070061#if MULTI_CONSOLE_API
Soby Mathewc67b09b2014-07-14 16:57:23 +010062 /* -----------------------------------------------------
Julius Werner17cd67d2017-09-18 16:49:48 -070063 * int plat_crash_console_init(void)
64 * Use normal console by default. Switch it to crash
65 * mode so serial consoles become active again.
66 * NOTE: This default implementation will only work for
67 * crashes that occur after a normal console (marked
68 * valid for the crash state) has been registered with
69 * the console framework. To debug crashes that occur
70 * earlier, the platform has to override these functions
71 * with an implementation that initializes a console
72 * driver with hardcoded parameters. See
73 * docs/porting-guide.rst for more information.
74 * -----------------------------------------------------
75 */
76func plat_crash_console_init
77#if defined(IMAGE_BL1)
78 /*
79 * BL1 code can possibly crash so early that the data segment is not yet
80 * accessible. Don't risk undefined behavior by trying to run the normal
81 * console framework. Platforms that want to debug BL1 will need to
82 * override this with custom functions that can run from registers only.
83 */
84 mov x0, #0
85 ret
86#else /* IMAGE_BL1 */
87 mov x3, x30
88 mov x0, #CONSOLE_FLAG_CRASH
89 bl console_switch_state
90 mov x0, #1
91 ret x3
92#endif
93endfunc plat_crash_console_init
94
95 /* -----------------------------------------------------
96 * void plat_crash_console_putc(int character)
97 * Output through the normal console by default.
98 * -----------------------------------------------------
99 */
100func plat_crash_console_putc
101 b console_putc
102endfunc plat_crash_console_putc
103
104 /* -----------------------------------------------------
105 * void plat_crash_console_flush(void)
106 * Flush normal console by default.
107 * -----------------------------------------------------
108 */
109func plat_crash_console_flush
110 b console_flush
111endfunc plat_crash_console_flush
112
113#else /* MULTI_CONSOLE_API */
114
115 /* -----------------------------------------------------
116 * In the old API these are all no-op stubs that need to
117 * be overridden by the platform to be useful.
Soby Mathewc67b09b2014-07-14 16:57:23 +0100118 * -----------------------------------------------------
119 */
120func plat_crash_console_init
121 mov x0, #0
122 ret
Kévin Petit8b779622015-03-24 14:03:57 +0000123endfunc plat_crash_console_init
Soby Mathewc67b09b2014-07-14 16:57:23 +0100124
Soby Mathewc67b09b2014-07-14 16:57:23 +0100125func plat_crash_console_putc
126 ret
Kévin Petit8b779622015-03-24 14:03:57 +0000127endfunc plat_crash_console_putc
Soby Mathew24fb8382014-08-14 12:22:32 +0100128
Antonio Nino Diaz801cf932017-02-17 17:11:27 +0000129func plat_crash_console_flush
130 ret
131endfunc plat_crash_console_flush
Julius Werner17cd67d2017-09-18 16:49:48 -0700132#endif
Antonio Nino Diaz801cf932017-02-17 17:11:27 +0000133
134 /* -----------------------------------------------------
135 * Placeholder function which should be redefined by
Masahiro Yamada240b3142016-09-24 18:07:46 +0900136 * each platform. This function should preserve x19 - x29.
Soby Mathew24fb8382014-08-14 12:22:32 +0100137 * -----------------------------------------------------
138 */
139func plat_reset_handler
140 ret
Kévin Petit8b779622015-03-24 14:03:57 +0000141endfunc plat_reset_handler
Soby Mathewadd40352014-08-14 12:49:05 +0100142
143 /* -----------------------------------------------------
144 * Placeholder function which should be redefined by
145 * each platform. This function is allowed to use
146 * registers x0 - x17.
147 * -----------------------------------------------------
148 */
149func plat_disable_acp
150 ret
Kévin Petit8b779622015-03-24 14:03:57 +0000151endfunc plat_disable_acp
Juan Castilloe3f67122015-10-05 16:59:38 +0100152
153 /* -----------------------------------------------------
Sandrine Bailleux862b5dc2015-11-10 15:01:57 +0000154 * void bl1_plat_prepare_exit(entry_point_info_t *ep_info);
Juan Castilloe3f67122015-10-05 16:59:38 +0100155 * Called before exiting BL1. Default: do nothing
156 * -----------------------------------------------------
157 */
158func bl1_plat_prepare_exit
159 ret
160endfunc bl1_plat_prepare_exit
Juan Castillo40fc6cd2015-09-25 15:41:14 +0100161
162 /* -----------------------------------------------------
Antonio Nino Diaz1c3ea102016-02-01 13:57:25 +0000163 * void plat_panic_handler(void) __dead2;
164 * Endless loop by default.
165 * -----------------------------------------------------
166 */
167func plat_panic_handler
Sandrine Bailleux8c9e1af2016-08-18 09:24:40 +0100168 wfi
Antonio Nino Diaz1c3ea102016-02-01 13:57:25 +0000169 b plat_panic_handler
170endfunc plat_panic_handler
Jeenu Viswambharan64ee2632018-04-27 15:17:03 +0100171
172 /* -----------------------------------------------------
173 * void bl31_plat_enable_mmu(uint32_t flags);
174 *
175 * Enable MMU in BL31.
176 * -----------------------------------------------------
177 */
178func bl31_plat_enable_mmu
179 b enable_mmu_direct_el3
180endfunc bl31_plat_enable_mmu
181
182 /* -----------------------------------------------------
183 * void bl32_plat_enable_mmu(uint32_t flags);
184 *
185 * Enable MMU in BL32.
186 * -----------------------------------------------------
187 */
188func bl32_plat_enable_mmu
189 b enable_mmu_direct_el1
190endfunc bl32_plat_enable_mmu
Jeenu Viswambharanb56dc2a2018-05-17 09:52:36 +0100191
192
193 /* -----------------------------------------------------
194 * Platform handler for Uncontainable External Abort.
195 *
196 * x0: EA reason
197 * x1: EA syndrome
198 * -----------------------------------------------------
199 */
200func plat_handle_uncontainable_ea
201 b report_unhandled_exception
202endfunc plat_handle_uncontainable_ea