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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 650abfe4d5a56136e0aab3bd3a4c5835bdb1846d / . / ARM.CMSIS.pdsc
blob: 40dff1c5215861f008c2cd0dc36ac4e3aa4c45d8 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
Joachim Krecha33860c2016-11-09 22:25:55 +0100[diff] [blame]7 <!-- <license>license.txt</license> -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Jonatan Antonif71f6cf2017-07-17 16:59:57 +0200[diff] [blame]11 <release version="5.0.2-dev5">
12 CMSIS-Core(M):
13 - Added MPU Management Functions for CM0+/3/4/7
14 </release>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]15 <release version="5.0.2-dev4">
16 CMSIS Device:
17 - Added OS Tick API
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]18 - Added IRQ Controller API
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]19 </release>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]20 <release version="5.0.2-dev3">
21 CMSIS-Core_A:
22 - Added ARM Compiler 6 support
23 - Updated Cortex-A core functions
24 - Updated Startup and System files
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]25 CMSIS-RTOS2:
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]26 - API 2.1.1 (see revision history for details)
27 - RTX 5.2.0 (see revision history for details)
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]28 </release>
Robert Rostoharbb902b42017-04-03 14:06:24 +0200[diff] [blame]29 <release version="5.0.2-dev2">
30 CMSIS-RTOS2:
31 - RTX 5.1.1 (see revision history for details)
32 </release>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]33 <release version="5.0.2-dev1">
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]34 CMSIS-Core_A:
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]35 - Added Cortex-A core support, ARMCC specific:
36 - Core specific register definitions
37 - Generic Interrupt Controller functions
38 - Generic Timer functions
39 - L1 and L2 Cache functions
40 - MMU functions
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]41 - Added ARMCA5, ARMCA7 and ARMCA9 devices
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]42 - Added Startup, System and MMU configuration files
43 </release>
Martin Güntherc5e87e52017-02-13 16:03:07 +0100[diff] [blame]44 <release version="5.0.2-dev0">
45 CMSIS-Core: 5.0.2 (see revision history for details)
46 - Added macros __UNALIGNED_UINT16_READ, __UNALIGNED_UINT16_WRITE
47 - Added macros __UNALIGNED_UINT32_READ, __UNALIGNED_UINT32_WRITE
48 - Set macro __UNALIGNED_UINT32 to deprecated
49 </release>
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]50 <release version="5.0.1" date="2017-02-03">
51 Package Description:
52 - added taxonomy for Cclass RTOS
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]53 CMSIS-RTOS2:
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]54 - API 2.1 (see revision history for details)
55 - RTX 5.1.0 (see revision history for details)
56 CMSIS-Core: 5.0.1 (see revision history for details)
57 - Added __PACKED_STRUCT macro
58 - Added uVisior support
59 - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
60 - Updated template for secure main function (main_s.c)
61 - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
62 CMSIS-DSP: 1.5.1 (see revision history for details)
63 - added ARMv8M DSP libraries.
64 CMSIS-PACK:1.4.9 (see revision history for details)
65 - added Pack Index File specification and schema file
Martin Güntherd1060532016-11-15 09:43:43 +0100[diff] [blame]66 </release>
Joachim Krechc45bb4a2016-11-11 11:01:22 +0100[diff] [blame]67 <release version="5.0.0" date="2016-11-11">
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]68 Changed open source license to Apache 2.0
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]69 CMSIS_Core:
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]70 - Added support for Cortex-M23 and Cortex-M33.
71 - Added ARMv8-M device configurations for mainline and baseline.
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]72 - Added CMSE support and thread context management for TrustZone for ARMv8-M
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]73 - Added cmsis_compiler.h to unify compiler behaviour.
74 - Updated function SCB_EnableICache (for Cortex-M7).
75 - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
76 CMSIS-RTOS:
77 - bug fix in RTX 4.82 (see revision history for details)
78 CMSIS-RTOS2:
79 - new API including compatibility layer to CMSIS-RTOS
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]80 - reference implementation based on RTX5
81 - supports all Cortex-M variants including TrustZone for ARMv8-M
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame]82 CMSIS-SVD:
83 - reworked SVD format documentation
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]84 - removed SVD file database documentation as SVD files are distributed in packs
85 - updated SVDConv for Win32 and Linux
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]86 CMSIS-DSP:
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]87 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
88 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]89 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]90 <release version="4.5.0" date="2015-10-28">
91 - CMSIS-Core 4.30.0 (see revision history for details)
92 - CMSIS-DAP 1.1.0 (unchanged)
93 - CMSIS-Driver 2.04.0 (see revision history for details)
94 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
95 - CMSIS-PACK 1.4.1 (see revision history for details)
96 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
97 - CMSIS-SVD 1.3.1 (see revision history for details)
98 </release>
99 <release version="4.4.0" date="2015-09-11">
100 - CMSIS-Core 4.20 (see revision history for details)
101 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
102 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
103 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
104 - CMSIS-RTOS
105 -- API 1.02 (unchanged)
106 -- RTX 4.79 (see revision history for details)
107 - CMSIS-SVD 1.3.0 (see revision history for details)
108 - CMSIS-DAP 1.1.0 (extended with SWO support)
109 </release>
110 <release version="4.3.0" date="2015-03-20">
111 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
112 - CMSIS-DSP 1.4.5 (see revision history for details)
113 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
114 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
115 - CMSIS-RTOS
116 -- API 1.02 (unchanged)
117 -- RTX 4.78 (see revision history for details)
118 - CMSIS-SVD 1.2 (unchanged)
119 </release>
120 <release version="4.2.0" date="2014-09-24">
121 Adding Cortex-M7 support
122 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
123 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
124 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
125 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
126 - CMSIS-RTOS RTX 4.75 (see revision history for details)
127 </release>
128 <release version="4.1.1" date="2014-06-30">
129 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
130 </release>
131 <release version="4.1.0" date="2014-06-12">
132 - CMSIS-Driver 2.02 (incompatible update)
133 - CMSIS-Pack 1.3 (see revision history for details)
134 - CMSIS-DSP 1.4.2 (unchanged)
135 - CMSIS-Core 3.30 (unchanged)
136 - CMSIS-RTOS RTX 4.74 (unchanged)
137 - CMSIS-RTOS API 1.02 (unchanged)
138 - CMSIS-SVD 1.10 (unchanged)
139 PACK:
140 - removed G++ specific files from PACK
141 - added Component Startup variant "C Startup"
142 - added Pack Checking Utility
143 - updated conditions to reflect tool-chain dependency
144 - added Taxonomy for Graphics
145 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
146 </release>
147 <release version="4.0.0">
148 - CMSIS-Driver 2.00 Preliminary (incompatible update)
149 - CMSIS-Pack 1.1 Preliminary
150 - CMSIS-DSP 1.4.2 (see revision history for details)
151 - CMSIS-Core 3.30 (see revision history for details)
152 - CMSIS-RTOS RTX 4.74 (see revision history for details)
153 - CMSIS-RTOS API 1.02 (unchanged)
154 - CMSIS-SVD 1.10 (unchanged)
155 </release>
156 <release version="3.20.4">
157 - CMSIS-RTOS 4.74 (see revision history for details)
158 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
159 </release>
160 <release version="3.20.3">
161 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
162 - CMSIS-RTOS 4.73 (see revision history for details)
163 </release>
164 <release version="3.20.2">
165 - CMSIS-Pack documentation has been added
166 - CMSIS-Drivers header and documentation have been added to PACK
167 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
168 </release>
169 <release version="3.20.1">
170 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
171 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
172 </release>
173 <release version="3.20.0">
174 The software portions that are deployed in the application program are now under a BSD license which allows usage
175 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
176 The individual components have been update as listed below:
177 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
178 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
179 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
180 - CMSIS-SVD is unchanged.
181 </release>
182 </releases>
183
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]184 <taxonomy>
185 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
186 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
187 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
188 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
189 <description Cclass="File System">File Drive Support and File System</description>
190 <description Cclass="Graphics">Graphical User Interface</description>
191 <description Cclass="Network">Network Stack using Internet Protocols</description>
192 <description Cclass="USB">Universal Serial Bus Stack</description>
Joachim Krech2384b8a2017-02-02 15:58:30 +0100[diff] [blame]193 <description Cclass="Compiler">Compiler Software Extensions</description>
Joachim Krech62838c82017-02-02 15:54:57 +0100[diff] [blame]194 <description Cclass="RTOS">Real-time Operating System</description>
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]195 </taxonomy>
196
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]197 <devices>
198 <!-- ****************************** Cortex-M0 ****************************** -->
199 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]200 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]201 <description>
202The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
203- simple, easy-to-use programmers model
204- highly efficient ultra-low power operation
205- excellent code density
206- deterministic, high-performance interrupt handling
207- upward compatibility with the rest of the Cortex-M processor family.
208 </description>
209 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
210 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
211 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
212 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
213
214 <device Dname="ARMCM0">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]215 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]216 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
217 </device>
218 </family>
219
220 <!-- ****************************** Cortex-M0P ****************************** -->
221 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]222 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]223 <description>
224The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
225- simple, easy-to-use programmers model
226- highly efficient ultra-low power operation
227- excellent code density
228- deterministic, high-performance interrupt handling
229- upward compatibility with the rest of the Cortex-M processor family.
230 </description>
231 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
232 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
233 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
234 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
235
236 <device Dname="ARMCM0P">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]237 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]238 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
239 </device>
240 </family>
241
242 <!-- ****************************** Cortex-M3 ****************************** -->
243 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]244 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]245 <description>
246The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
247- simple, easy-to-use programmers model
248- highly efficient ultra-low power operation
249- excellent code density
250- deterministic, high-performance interrupt handling
251- upward compatibility with the rest of the Cortex-M processor family.
252 </description>
253 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
254 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
255 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
256 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
257
258 <device Dname="ARMCM3">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]259 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]260 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
261 </device>
262 </family>
263
264 <!-- ****************************** Cortex-M4 ****************************** -->
265 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]266 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]267 <description>
268The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
269- simple, easy-to-use programmers model
270- highly efficient ultra-low power operation
271- excellent code density
272- deterministic, high-performance interrupt handling
273- upward compatibility with the rest of the Cortex-M processor family.
274 </description>
275 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
276 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
277 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
278 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
279
280 <device Dname="ARMCM4">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]281 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]282 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
283 </device>
284
285 <device Dname="ARMCM4_FP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]286 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]287 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
288 </device>
289 </family>
290
291 <!-- ****************************** Cortex-M7 ****************************** -->
292 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]293 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]294 <description>
Martin Güntheraa246272016-11-15 16:01:05 +0100[diff] [blame]295The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]296- simple, easy-to-use programmers model
297- highly efficient ultra-low power operation
298- excellent code density
299- deterministic, high-performance interrupt handling
300- upward compatibility with the rest of the Cortex-M processor family.
301 </description>
302 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
303 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
304 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
305 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
306
307 <device Dname="ARMCM7">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]308 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]309 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
310 </device>
311
312 <device Dname="ARMCM7_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]313 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]314 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
315 </device>
316
317 <device Dname="ARMCM7_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]318 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]319 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
320 </device>
321 </family>
322
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]323 <!-- ****************************** Cortex-M23 ********************** -->
324 <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
325 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
326 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]327The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]328It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]329Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]330 </description>
331 <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]332 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
333 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]334 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]335 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]336 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
337
338 <device Dname="ARMCM23">
339 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
340 <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
341 </device>
342
343 <device Dname="ARMCM23_TZ">
344 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
345 <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
346 </device>
347 </family>
348
349 <!-- ****************************** Cortex-M33 ****************************** -->
350 <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
351 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
352 <description>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]353The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]354class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]355 </description>
356 <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]357 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
358 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]359 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]360 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
361 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]362
363 <device Dname="ARMCM33">
364 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]365 <description>
366 no DSP Instructions, no Floating Point Unit, no TrustZone
367 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]368 <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
369 </device>
370
371 <device Dname="ARMCM33_TZ">
372 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]373 <description>
374 no DSP Instructions, no Floating Point Unit, TrustZone
375 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]376 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
377 </device>
378
379 <device Dname="ARMCM33_DSP_FP">
380 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]381 <description>
382 DSP Instructions, Single Precision Floating Point Unit, no TrustZone
383 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]384 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
385 </device>
386
387 <device Dname="ARMCM33_DSP_FP_TZ">
388 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]389 <description>
390 DSP Instructions, Single Precision Floating Point Unit, TrustZone
391 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]392 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
393 </device>
394 </family>
395
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]396 <!-- ****************************** ARMSC000 ****************************** -->
397 <family Dfamily="ARM SC000" Dvendor="ARM:82">
398 <description>
399The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
400- simple, easy-to-use programmers model
401- highly efficient ultra-low power operation
402- excellent code density
403- deterministic, high-performance interrupt handling
404 </description>
405 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
406 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
407 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
408 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
409
410 <device Dname="ARMSC000">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]411 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]412 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
413 </device>
414 </family>
415
416 <!-- ****************************** ARMSC300 ****************************** -->
417 <family Dfamily="ARM SC300" Dvendor="ARM:82">
418 <description>
419The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
420- simple, easy-to-use programmers model
421- highly efficient ultra-low power operation
422- excellent code density
423- deterministic, high-performance interrupt handling
424 </description>
425 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
426 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
427 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
428 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
429
430 <device Dname="ARMSC300">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]431 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]432 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
433 </device>
434 </family>
435
436 <!-- ****************************** ARMv8-M Baseline ********************** -->
437 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
438 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
439 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]440ARMv8-M Baseline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]441 </description>
442 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]443 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
444 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]445 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]446 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]447 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
448
449 <device Dname="ARMv8MBL">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]450 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]451 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
452 </device>
453 </family>
454
455 <!-- ****************************** ARMv8-M Mainline ****************************** -->
456 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
457 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
458 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]459ARMv8-M Mainline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]460 </description>
461 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]462 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
463 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]464 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]465 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]466 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
467
468 <device Dname="ARMv8MML">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]469 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]470 <description>
471 no DSP Instructions, no Floating Point Unit, TrustZone
472 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]473 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
474 </device>
475
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]476 <device Dname="ARMv8MML_DSP">
477 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]478 <description>
479 DSP Instructions, no Floating Point Unit, TrustZone
480 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]481 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]482 </device>
483
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]484 <device Dname="ARMv8MML_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]485 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]486 <description>
487 no DSP Instructions, Single Precision Floating Point Unit, TrustZone
488 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]489 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
490 </device>
491
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]492 <device Dname="ARMv8MML_DSP_SP">
493 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]494 <description>
495 DSP Instructions, Single Precision Floating Point Unit, TrustZone
496 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]497 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]498 </device>
499
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]500 <device Dname="ARMv8MML_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]501 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]502 <description>
503 no DSP Instructions, Double Precision Floating Point Unit, TrustZone
504 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]505 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
506 </device>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]507
508 <device Dname="ARMv8MML_DSP_DP">
509 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]510 <description>
511 DSP Instructions, Double Precision Floating Point Unit, TrustZone
512 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]513 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]514 </device>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]515 </family>
516
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]517 <!-- ****************************** Cortex-A5 ****************************** -->
518 <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
519 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
520 <description>
521The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
522virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
523ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
524 </description>
525
526 <device Dname="ARMCA5">
527 <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
528 <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
529 </device>
530 </family>
531
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]532 <!-- ****************************** Cortex-A7 ****************************** -->
533 <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
534 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
535 <description>
536The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
537The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
538an optional integrated GIC, and an optional L2 cache controller.
539 </description>
540
541 <device Dname="ARMCA7">
542 <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
543 <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
544 </device>
545 </family>
546
547 <!-- ****************************** Cortex-A9 ****************************** -->
548 <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]549 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]550 <description>
551The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
552The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
553and 8-bit Java bytecodes in Jazelle state.
554 </description>
555
556 <device Dname="ARMCA9">
557 <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
558 <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
559 </device>
560 </family>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]561 </devices>
562
563
564 <apis>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]565 <!-- CMSIS Device API -->
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]566 <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
567 <description>Device interrupt controller interface</description>
568 <files>
569 <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
570 </files>
571 </api>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]572 <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
Robert Rostoharaeb6dd52017-06-09 14:17:43 +0200[diff] [blame]573 <description>RTOS Kernel system tick timer interface</description>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]574 <files>
575 <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
576 </files>
577 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]578 <!-- CMSIS-RTOS API -->
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]579 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]580 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
581 <files>
582 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
583 </files>
584 </api>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]585 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.1" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]586 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
587 <files>
588 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
Robert Rostohar0a364052017-01-25 12:35:54 +0100[diff] [blame]589 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]590 </files>
591 </api>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]592 <!-- CMSIS Driver API -->
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]593 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]594 <description>USART Driver API for Cortex-M</description>
595 <files>
596 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
597 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
598 </files>
599 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]600 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]601 <description>SPI Driver API for Cortex-M</description>
602 <files>
603 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
604 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
605 </files>
606 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]607 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]608 <description>SAI Driver API for Cortex-M</description>
609 <files>
610 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
611 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
612 </files>
613 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]614 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]615 <description>I2C Driver API for Cortex-M</description>
616 <files>
617 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
618 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
619 </files>
620 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]621 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]622 <description>CAN Driver API for Cortex-M</description>
623 <files>
624 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
625 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
626 </files>
627 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]628 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]629 <description>Flash Driver API for Cortex-M</description>
630 <files>
631 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
632 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
633 </files>
634 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]635 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]636 <description>MCI Driver API for Cortex-M</description>
637 <files>
638 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
639 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
640 </files>
641 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]642 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]643 <description>NAND Flash Driver API for Cortex-M</description>
644 <files>
645 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
646 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
647 </files>
648 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]649 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]650 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
651 <files>
652 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
653 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
654 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
655 </files>
656 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]657 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]658 <description>Ethernet MAC Driver API for Cortex-M</description>
659 <files>
660 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
661 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
662 </files>
663 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]664 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]665 <description>Ethernet PHY Driver API for Cortex-M</description>
666 <files>
667 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
668 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
669 </files>
670 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]671 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]672 <description>USB Device Driver API for Cortex-M</description>
673 <files>
674 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
675 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
676 </files>
677 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]678 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]679 <description>USB Host Driver API for Cortex-M</description>
680 <files>
681 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
682 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
683 </files>
684 </api>
685 </apis>
686
687 <!-- conditions are dependency rules that can apply to a component or an individual file -->
688 <conditions>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]689 <!-- compiler -->
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]690 <condition id="ARMCC6">
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]691 <accept Tcompiler="ARMCC" Toptions="AC6"/>
692 <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]693 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]694 <condition id="ARMCC5">
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]695 <require Tcompiler="ARMCC" Toptions="AC5"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]696 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]697 <condition id="ARMCC">
698 <require Tcompiler="ARMCC"/>
699 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]700 <condition id="GCC">
701 <require Tcompiler="GCC"/>
702 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]703 <condition id="IAR">
704 <require Tcompiler="IAR"/>
705 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]706 <condition id="ARMCC GCC">
707 <accept Tcompiler="ARMCC"/>
708 <accept Tcompiler="GCC"/>
709 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]710 <condition id="ARMCC GCC IAR">
711 <accept Tcompiler="ARMCC"/>
712 <accept Tcompiler="GCC"/>
713 <accept Tcompiler="IAR"/>
714 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]715
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]716 <!-- ARM architecture -->
717 <condition id="ARMv6-M Device">
718 <description>ARMv6-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]719 <accept Dcore="Cortex-M0"/>
720 <accept Dcore="Cortex-M0+"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]721 <accept Dcore="SC000"/>
722 </condition>
723 <condition id="ARMv7-M Device">
724 <description>ARMv7-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]725 <accept Dcore="Cortex-M3"/>
726 <accept Dcore="Cortex-M4"/>
727 <accept Dcore="Cortex-M7"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]728 <accept Dcore="SC300"/>
729 </condition>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]730 <condition id="ARMv8-M Device">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]731 <description>ARMv8-M architecture based device</description>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]732 <accept Dcore="ARMV8MBL"/>
733 <accept Dcore="ARMV8MML"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]734 <accept Dcore="Cortex-M23"/>
735 <accept Dcore="Cortex-M33"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]736 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]737 <condition id="ARMv8-M TZ Device">
738 <description>ARMv8-M architecture based device with TrustZone</description>
739 <require condition="ARMv8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]740 <require Dtz="TZ"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]741 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]742 <condition id="ARMv6_7-M Device">
743 <description>ARMv6_7-M architecture based device</description>
744 <accept condition="ARMv6-M Device"/>
745 <accept condition="ARMv7-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]746 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]747 <condition id="ARMv6_7_8-M Device">
748 <description>ARMv6_7_8-M architecture based device</description>
749 <accept condition="ARMv6-M Device"/>
750 <accept condition="ARMv7-M Device"/>
751 <accept condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]752 </condition>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]753 <condition id="ARMv7-A Device">
754 <description>ARMv7-A architecture based device</description>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]755 <accept Dcore="Cortex-A5"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]756 <accept Dcore="Cortex-A7"/>
757 <accept Dcore="Cortex-A9"/>
758 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]759
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]760 <!-- ARM core -->
761 <condition id="CM0">
762 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
763 <accept Dcore="Cortex-M0"/>
764 <accept Dcore="Cortex-M0+"/>
765 <accept Dcore="SC000"/>
766 </condition>
767 <condition id="CM3">
768 <description>Cortex-M3 or SC300 processor based device</description>
769 <accept Dcore="Cortex-M3"/>
770 <accept Dcore="SC300"/>
771 </condition>
772 <condition id="CM4">
773 <description>Cortex-M4 processor based device</description>
774 <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
775 </condition>
776 <condition id="CM4_FP">
777 <description>Cortex-M4 processor based device using Floating Point Unit</description>
778 <require Dcore="Cortex-M4" Dfpu="FPU"/>
779 </condition>
780 <condition id="CM7">
781 <description>Cortex-M7 processor based device</description>
782 <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
783 </condition>
784 <condition id="CM7_FP">
785 <description>Cortex-M7 processor based device using Floating Point Unit</description>
786 <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
787 <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
788 </condition>
789 <condition id="CM7_SP">
790 <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
791 <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
792 </condition>
793 <condition id="CM7_DP">
794 <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
795 <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
796 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]797 <condition id="CM23">
798 <description>Cortex-M23 processor based device</description>
799 <require Dcore="Cortex-M23"/>
800 </condition>
801 <condition id="CM33">
802 <description>Cortex-M33 processor based device</description>
803 <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
804 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]805 <condition id="CM33_FP">
806 <description>Cortex-M33 processor based device using Floating Point Unit</description>
807 <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
808 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]809 <condition id="ARMv8MBL">
810 <description>ARMv8-M Baseline processor based device</description>
811 <require Dcore="ARMV8MBL"/>
812 </condition>
813 <condition id="ARMv8MML">
814 <description>ARMv8-M Mainline processor based device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]815 <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
816 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]817 <condition id="ARMv8MML_FP">
818 <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
819 <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
820 <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]821 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]822
823 <condition id="CM33_NODSP_NOFPU">
824 <description>CM33, no DSP, no FPU</description>
825 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
826 </condition>
827 <condition id="CM33_DSP_NOFPU">
828 <description>CM33, DSP, no FPU</description>
829 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
830 </condition>
831 <condition id="CM33_NODSP_SP">
832 <description>CM33, no DSP, SP FPU</description>
833 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
834 </condition>
835 <condition id="CM33_DSP_SP">
836 <description>CM33, DSP, SP FPU</description>
837 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
838 </condition>
839
840 <condition id="ARMv8MML_NODSP_NOFPU">
841 <description>ARMv8MML, no DSP, no FPU</description>
842 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
843 </condition>
844 <condition id="ARMv8MML_DSP_NOFPU">
845 <description>ARMv8MML, DSP, no FPU</description>
846 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
847 </condition>
848 <condition id="ARMv8MML_NODSP_SP">
849 <description>ARMv8MML, no DSP, SP FPU</description>
850 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]851 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]852 <condition id="ARMv8MML_DSP_SP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]853 <description>ARMv8MML, DSP, SP FPU</description>
854 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]855 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]856
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]857 <condition id="CA5_CA9">
858 <description>Cortex-A5 or Cortex-A9 processor based device</description>
859 <accept Dcore="Cortex-A5"/>
860 <accept Dcore="Cortex-A9"/>
861 </condition>
862
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame^]863 <condition id="CA7">
864 <description>Cortex-A7 processor based device</description>
865 <accept Dcore="Cortex-A7"/>
866 </condition>
867
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]868 <!-- ARMCC compiler -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]869 <condition id="CA_ARMCC5">
870 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]871 <require condition="ARMv7-A Device"/>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]872 <require condition="ARMCC5"/>
Jonatan Antoni41e74d52017-04-21 14:42:00 +0200[diff] [blame]873 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]874 <condition id="CA_ARMCC6">
Jonatan Antoni41e74d52017-04-21 14:42:00 +0200[diff] [blame]875 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
876 <require condition="ARMv7-A Device"/>
877 <require condition="ARMCC6"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]878 </condition>
879
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]880 <condition id="CM0_ARMCC">
881 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
882 <require condition="CM0"/>
883 <require Tcompiler="ARMCC"/>
884 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]885 <condition id="CM0_LE_ARMCC">
886 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]887 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]888 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]889 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]890 <condition id="CM0_BE_ARMCC">
891 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]892 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]893 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]894 </condition>
895
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]896 <condition id="CM3_ARMCC">
897 <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
898 <require condition="CM3"/>
899 <require Tcompiler="ARMCC"/>
900 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]901 <condition id="CM3_LE_ARMCC">
902 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]903 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]904 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]905 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]906 <condition id="CM3_BE_ARMCC">
907 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]908 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]909 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]910 </condition>
911
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]912 <condition id="CM4_ARMCC">
913 <description>Cortex-M4 processor based device for the ARM Compiler</description>
914 <require condition="CM4"/>
915 <require Tcompiler="ARMCC"/>
916 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]917 <condition id="CM4_LE_ARMCC">
918 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]919 <require condition="CM4_ARMCC"/>
920 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]921 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]922 <condition id="CM4_BE_ARMCC">
923 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]924 <require condition="CM4_ARMCC"/>
925 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]926 </condition>
927
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]928 <condition id="CM4_FP_ARMCC">
929 <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
930 <require condition="CM4_FP"/>
931 <require Tcompiler="ARMCC"/>
932 </condition>
933 <condition id="CM4_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]934 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]935 <require condition="CM4_FP_ARMCC"/>
936 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]937 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]938 <condition id="CM4_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]939 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]940 <require condition="CM4_FP_ARMCC"/>
941 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]942 </condition>
943
944 <!-- XMC 4000 Series devices from Infineon require a special library -->
945 <condition id="CM4_LE_ARMCC_STD">
946 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
947 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
948 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
949 <require Tcompiler="ARMCC"/>
950 </condition>
951 <condition id="CM4_LE_ARMCC_IFX">
952 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
953 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
954 <require Tcompiler="ARMCC"/>
955 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]956 <condition id="CM4_FP_LE_ARMCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]957 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
958 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
959 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
960 <require Tcompiler="ARMCC"/>
961 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]962 <condition id="CM4_FP_LE_ARMCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]963 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
964 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
965 <require Tcompiler="ARMCC"/>
966 </condition>
967
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]968 <condition id="CM7_ARMCC">
969 <description>Cortex-M7 processor based device for the ARM Compiler</description>
970 <require condition="CM7"/>
971 <require Tcompiler="ARMCC"/>
972 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]973 <condition id="CM7_LE_ARMCC">
974 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]975 <require condition="CM7_ARMCC"/>
976 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]977 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]978 <condition id="CM7_BE_ARMCC">
979 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]980 <require condition="CM7_ARMCC"/>
981 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]982 </condition>
983
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]984 <condition id="CM7_FP_ARMCC">
985 <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
986 <require condition="CM7_FP"/>
987 <require Tcompiler="ARMCC"/>
988 </condition>
989 <condition id="CM7_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]990 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]991 <require condition="CM7_FP_ARMCC"/>
992 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]993 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]994 <condition id="CM7_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]995 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]996 <require condition="CM7_FP_ARMCC"/>
997 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]998 </condition>
999
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1000 <condition id="CM7_SP_ARMCC">
1001 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1002 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1003 <require Tcompiler="ARMCC"/>
1004 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1005 <condition id="CM7_SP_LE_ARMCC">
1006 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1007 <require condition="CM7_SP_ARMCC"/>
1008 <require Dendian="Little-endian"/>
1009 </condition>
1010 <condition id="CM7_SP_BE_ARMCC">
1011 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1012 <require condition="CM7_SP_ARMCC"/>
1013 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1014 </condition>
1015
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1016 <condition id="CM7_DP_ARMCC">
1017 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1018 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1019 <require Tcompiler="ARMCC"/>
1020 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1021 <condition id="CM7_DP_LE_ARMCC">
1022 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1023 <require condition="CM7_DP_ARMCC"/>
1024 <require Dendian="Little-endian"/>
1025 </condition>
1026 <condition id="CM7_DP_BE_ARMCC">
1027 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1028 <require condition="CM7_DP_ARMCC"/>
1029 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1030 </condition>
1031
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1032 <condition id="CM23_ARMCC">
1033 <description>Cortex-M23 processor based device for the ARM Compiler</description>
1034 <require condition="CM23"/>
1035 <require Tcompiler="ARMCC"/>
1036 </condition>
1037 <condition id="CM23_LE_ARMCC">
1038 <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1039 <require condition="CM23_ARMCC"/>
1040 <require Dendian="Little-endian"/>
1041 </condition>
1042 <condition id="CM23_BE_ARMCC">
1043 <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1044 <require condition="CM23_ARMCC"/>
1045 <require Dendian="Big-endian"/>
1046 </condition>
1047
1048 <condition id="CM33_ARMCC">
1049 <description>Cortex-M33 processor based device for the ARM Compiler</description>
1050 <require condition="CM33"/>
1051 <require Tcompiler="ARMCC"/>
1052 </condition>
1053 <condition id="CM33_LE_ARMCC">
1054 <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1055 <require condition="CM33_ARMCC"/>
1056 <require Dendian="Little-endian"/>
1057 </condition>
1058 <condition id="CM33_BE_ARMCC">
1059 <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1060 <require condition="CM33_ARMCC"/>
1061 <require Dendian="Big-endian"/>
1062 </condition>
1063
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1064 <condition id="CM33_FP_ARMCC">
1065 <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1066 <require condition="CM33_FP"/>
1067 <require Tcompiler="ARMCC"/>
1068 </condition>
1069 <condition id="CM33_FP_LE_ARMCC">
1070 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1071 <require condition="CM33_FP_ARMCC"/>
1072 <require Dendian="Little-endian"/>
1073 </condition>
1074 <condition id="CM33_FP_BE_ARMCC">
1075 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1076 <require condition="CM33_FP_ARMCC"/>
1077 <require Dendian="Big-endian"/>
1078 </condition>
1079
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1080 <condition id="CM33_NODSP_NOFPU_ARMCC">
1081 <description>CM33, no DSP, no FPU, ARM Compiler</description>
1082 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1083 <require Tcompiler="ARMCC"/>
1084 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1085 <condition id="CM33_DSP_NOFPU_ARMCC">
1086 <description>CM33, DSP, no FPU, ARM Compiler</description>
1087 <require condition="CM33_DSP_NOFPU"/>
1088 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1089 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1090 <condition id="CM33_NODSP_SP_ARMCC">
1091 <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1092 <require condition="CM33_NODSP_SP"/>
1093 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1094 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1095 <condition id="CM33_DSP_SP_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1096 <description>CM33, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1097 <require condition="CM33_DSP_SP"/>
1098 <require Tcompiler="ARMCC"/>
1099 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1100 <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1101 <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1102 <require condition="CM33_NODSP_NOFPU_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1103 <require Dendian="Little-endian"/>
1104 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1105 <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1106 <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1107 <require condition="CM33_DSP_NOFPU_ARMCC"/>
1108 <require Dendian="Little-endian"/>
1109 </condition>
1110 <condition id="CM33_NODSP_SP_LE_ARMCC">
1111 <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1112 <require condition="CM33_NODSP_SP_ARMCC"/>
1113 <require Dendian="Little-endian"/>
1114 </condition>
1115 <condition id="CM33_DSP_SP_LE_ARMCC">
1116 <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1117 <require condition="CM33_DSP_SP_ARMCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1118 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1119 </condition>
1120
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1121 <condition id="ARMv8MBL_ARMCC">
1122 <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1123 <require condition="ARMv8MBL"/>
1124 <require Tcompiler="ARMCC"/>
1125 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1126 <condition id="ARMv8MBL_LE_ARMCC">
1127 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1128 <require condition="ARMv8MBL_ARMCC"/>
1129 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1130 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1131 <condition id="ARMv8MBL_BE_ARMCC">
1132 <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1133 <require condition="ARMv8MBL_ARMCC"/>
1134 <require Dendian="Big-endian"/>
1135 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1136
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1137 <condition id="ARMv8MML_ARMCC">
1138 <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1139 <require condition="ARMv8MML"/>
1140 <require Tcompiler="ARMCC"/>
1141 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1142 <condition id="ARMv8MML_LE_ARMCC">
1143 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1144 <require condition="ARMv8MML_ARMCC"/>
1145 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1146 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1147 <condition id="ARMv8MML_BE_ARMCC">
1148 <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1149 <require condition="ARMv8MML_ARMCC"/>
1150 <require Dendian="Big-endian"/>
1151 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1152
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1153 <condition id="ARMv8MML_FP_ARMCC">
1154 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1155 <require condition="ARMv8MML_FP"/>
1156 <require Tcompiler="ARMCC"/>
1157 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1158 <condition id="ARMv8MML_FP_LE_ARMCC">
1159 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1160 <require condition="ARMv8MML_FP_ARMCC"/>
1161 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1162 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1163 <condition id="ARMv8MML_FP_BE_ARMCC">
1164 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1165 <require condition="ARMv8MML_FP_ARMCC"/>
1166 <require Dendian="Big-endian"/>
1167 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1168
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1169 <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1170 <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1171 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1172 <require Tcompiler="ARMCC"/>
1173 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1174 <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1175 <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1176 <require condition="ARMv8MML_DSP_NOFPU"/>
1177 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1178 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1179 <condition id="ARMv8MML_NODSP_SP_ARMCC">
1180 <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1181 <require condition="ARMv8MML_NODSP_SP"/>
1182 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1183 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1184 <condition id="ARMv8MML_DSP_SP_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1185 <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1186 <require condition="ARMv8MML_DSP_SP"/>
1187 <require Tcompiler="ARMCC"/>
1188 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1189 <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1190 <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1191 <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1192 <require Dendian="Little-endian"/>
1193 </condition>
1194 <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1195 <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1196 <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1197 <require Dendian="Little-endian"/>
1198 </condition>
1199 <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1200 <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1201 <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1202 <require Dendian="Little-endian"/>
1203 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1204 <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1205 <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1206 <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1207 <require Dendian="Little-endian"/>
1208 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1209
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1210 <!-- GCC compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1211 <condition id="CA_GCC">
1212 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1213 <require condition="ARMv7-A Device"/>
1214 <require Tcompiler="GCC"/>
1215 </condition>
1216
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1217 <condition id="CM0_GCC">
1218 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1219 <require condition="CM0"/>
1220 <require Tcompiler="GCC"/>
1221 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1222 <condition id="CM0_LE_GCC">
1223 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1224 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1225 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1226 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1227 <condition id="CM0_BE_GCC">
1228 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1229 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1230 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1231 </condition>
1232
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1233 <condition id="CM3_GCC">
1234 <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1235 <require condition="CM3"/>
1236 <require Tcompiler="GCC"/>
1237 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1238 <condition id="CM3_LE_GCC">
1239 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1240 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1241 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1242 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1243 <condition id="CM3_BE_GCC">
1244 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1245 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1246 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1247 </condition>
1248
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1249 <condition id="CM4_GCC">
1250 <description>Cortex-M4 processor based device for the GCC Compiler</description>
1251 <require condition="CM4"/>
1252 <require Tcompiler="GCC"/>
1253 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1254 <condition id="CM4_LE_GCC">
1255 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1256 <require condition="CM4_GCC"/>
1257 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1258 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1259 <condition id="CM4_BE_GCC">
1260 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1261 <require condition="CM4_GCC"/>
1262 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1263 </condition>
1264
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1265 <condition id="CM4_FP_GCC">
1266 <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1267 <require condition="CM4_FP"/>
1268 <require Tcompiler="GCC"/>
1269 </condition>
1270 <condition id="CM4_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1271 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1272 <require condition="CM4_FP_GCC"/>
1273 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1274 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1275 <condition id="CM4_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1276 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1277 <require condition="CM4_FP_GCC"/>
1278 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1279 </condition>
1280
1281 <!-- XMC 4000 Series devices from Infineon require a special library -->
1282 <condition id="CM4_LE_GCC_STD">
1283 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1284 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1285 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1286 <require Tcompiler="GCC"/>
1287 </condition>
1288 <condition id="CM4_LE_GCC_IFX">
1289 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1290 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1291 <require Tcompiler="GCC"/>
1292 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1293 <condition id="CM4_FP_LE_GCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1294 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1295 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1296 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1297 <require Tcompiler="GCC"/>
1298 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1299 <condition id="CM4_FP_LE_GCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1300 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1301 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1302 <require Tcompiler="GCC"/>
1303 </condition>
1304
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1305 <condition id="CM7_GCC">
1306 <description>Cortex-M7 processor based device for the GCC Compiler</description>
1307 <require condition="CM7"/>
1308 <require Tcompiler="GCC"/>
1309 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1310 <condition id="CM7_LE_GCC">
1311 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1312 <require condition="CM7_GCC"/>
1313 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1314 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1315 <condition id="CM7_BE_GCC">
1316 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1317 <require condition="CM7_GCC"/>
1318 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1319 </condition>
1320
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1321 <condition id="CM7_FP_GCC">
1322 <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1323 <require condition="CM7_FP"/>
1324 <require Tcompiler="GCC"/>
1325 </condition>
1326 <condition id="CM7_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1327 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1328 <require condition="CM7_FP_GCC"/>
1329 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1330 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1331 <condition id="CM7_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1332 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1333 <require condition="CM7_FP_GCC"/>
1334 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1335 </condition>
1336
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1337 <condition id="CM7_SP_GCC">
1338 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1339 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1340 <require Tcompiler="GCC"/>
1341 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1342 <condition id="CM7_SP_LE_GCC">
1343 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1344 <require condition="CM7_SP_GCC"/>
1345 <require Dendian="Little-endian"/>
1346 </condition>
1347 <condition id="CM7_SP_BE_GCC">
1348 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1349 <require condition="CM7_SP_GCC"/>
1350 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1351 </condition>
1352
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1353 <condition id="CM7_DP_GCC">
1354 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1355 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1356 <require Tcompiler="GCC"/>
1357 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1358 <condition id="CM7_DP_LE_GCC">
1359 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1360 <require condition="CM7_DP_GCC"/>
1361 <require Dendian="Little-endian"/>
1362 </condition>
1363 <condition id="CM7_DP_BE_GCC">
1364 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1365 <require condition="CM7_DP_GCC"/>
1366 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1367 </condition>
1368
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1369 <condition id="CM23_GCC">
1370 <description>Cortex-M23 processor based device for the GCC Compiler</description>
1371 <require condition="CM23"/>
1372 <require Tcompiler="GCC"/>
1373 </condition>
1374 <condition id="CM23_LE_GCC">
1375 <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1376 <require condition="CM23_GCC"/>
1377 <require Dendian="Little-endian"/>
1378 </condition>
1379 <condition id="CM23_BE_GCC">
1380 <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1381 <require condition="CM23_GCC"/>
1382 <require Dendian="Big-endian"/>
1383 </condition>
1384
1385 <condition id="CM33_GCC">
1386 <description>Cortex-M33 processor based device for the GCC Compiler</description>
1387 <require condition="CM33"/>
1388 <require Tcompiler="GCC"/>
1389 </condition>
1390 <condition id="CM33_LE_GCC">
1391 <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1392 <require condition="CM33_GCC"/>
1393 <require Dendian="Little-endian"/>
1394 </condition>
1395 <condition id="CM33_BE_GCC">
1396 <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1397 <require condition="CM33_GCC"/>
1398 <require Dendian="Big-endian"/>
1399 </condition>
1400
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1401 <condition id="CM33_FP_GCC">
1402 <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1403 <require condition="CM33_FP"/>
1404 <require Tcompiler="GCC"/>
1405 </condition>
1406 <condition id="CM33_FP_LE_GCC">
1407 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1408 <require condition="CM33_FP_GCC"/>
1409 <require Dendian="Little-endian"/>
1410 </condition>
1411 <condition id="CM33_FP_BE_GCC">
1412 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1413 <require condition="CM33_FP_GCC"/>
1414 <require Dendian="Big-endian"/>
1415 </condition>
1416
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1417 <condition id="CM33_NODSP_NOFPU_GCC">
1418 <description>CM33, no DSP, no FPU, GCC Compiler</description>
1419 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1420 <require Tcompiler="GCC"/>
1421 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1422 <condition id="CM33_DSP_NOFPU_GCC">
1423 <description>CM33, DSP, no FPU, GCC Compiler</description>
1424 <require condition="CM33_DSP_NOFPU"/>
1425 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1426 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1427 <condition id="CM33_NODSP_SP_GCC">
1428 <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1429 <require condition="CM33_NODSP_SP"/>
1430 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1431 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1432 <condition id="CM33_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1433 <description>CM33, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1434 <require condition="CM33_DSP_SP"/>
1435 <require Tcompiler="GCC"/>
1436 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1437 <condition id="CM33_NODSP_NOFPU_LE_GCC">
1438 <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1439 <require condition="CM33_NODSP_NOFPU_GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1440 <require Dendian="Little-endian"/>
1441 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1442 <condition id="CM33_DSP_NOFPU_LE_GCC">
1443 <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1444 <require condition="CM33_DSP_NOFPU_GCC"/>
1445 <require Dendian="Little-endian"/>
1446 </condition>
1447 <condition id="CM33_NODSP_SP_LE_GCC">
1448 <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1449 <require condition="CM33_NODSP_SP_GCC"/>
1450 <require Dendian="Little-endian"/>
1451 </condition>
1452 <condition id="CM33_DSP_SP_LE_GCC">
1453 <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1454 <require condition="CM33_DSP_SP_GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1455 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1456 </condition>
1457
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1458 <condition id="ARMv8MBL_GCC">
1459 <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1460 <require condition="ARMv8MBL"/>
1461 <require Tcompiler="GCC"/>
1462 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1463 <condition id="ARMv8MBL_LE_GCC">
1464 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1465 <require condition="ARMv8MBL_GCC"/>
1466 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1467 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1468 <condition id="ARMv8MBL_BE_GCC">
1469 <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1470 <require condition="ARMv8MBL_GCC"/>
1471 <require Dendian="Big-endian"/>
1472 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1473
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1474 <condition id="ARMv8MML_GCC">
1475 <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1476 <require condition="ARMv8MML"/>
1477 <require Tcompiler="GCC"/>
1478 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1479 <condition id="ARMv8MML_LE_GCC">
1480 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1481 <require condition="ARMv8MML_GCC"/>
1482 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1483 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1484 <condition id="ARMv8MML_BE_GCC">
1485 <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1486 <require condition="ARMv8MML_GCC"/>
1487 <require Dendian="Big-endian"/>
1488 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1489
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1490 <condition id="ARMv8MML_FP_GCC">
1491 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1492 <require condition="ARMv8MML_FP"/>
1493 <require Tcompiler="GCC"/>
1494 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1495 <condition id="ARMv8MML_FP_LE_GCC">
1496 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1497 <require condition="ARMv8MML_FP_GCC"/>
1498 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1499 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1500 <condition id="ARMv8MML_FP_BE_GCC">
1501 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1502 <require condition="ARMv8MML_FP_GCC"/>
1503 <require Dendian="Big-endian"/>
1504 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1505
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1506 <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1507 <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1508 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1509 <require Tcompiler="GCC"/>
1510 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1511 <condition id="ARMv8MML_DSP_NOFPU_GCC">
1512 <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1513 <require condition="ARMv8MML_DSP_NOFPU"/>
1514 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1515 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1516 <condition id="ARMv8MML_NODSP_SP_GCC">
1517 <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1518 <require condition="ARMv8MML_NODSP_SP"/>
1519 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1520 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1521 <condition id="ARMv8MML_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1522 <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1523 <require condition="ARMv8MML_DSP_SP"/>
1524 <require Tcompiler="GCC"/>
1525 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1526 <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1527 <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1528 <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1529 <require Dendian="Little-endian"/>
1530 </condition>
1531 <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1532 <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1533 <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1534 <require Dendian="Little-endian"/>
1535 </condition>
1536 <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1537 <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1538 <require condition="ARMv8MML_NODSP_SP_GCC"/>
1539 <require Dendian="Little-endian"/>
1540 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1541 <condition id="ARMv8MML_DSP_SP_LE_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1542 <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1543 <require condition="ARMv8MML_DSP_SP_GCC"/>
1544 <require Dendian="Little-endian"/>
1545 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1546
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1547 <!-- IAR compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1548 <condition id="CA_IAR">
1549 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1550 <require condition="ARMv7-A Device"/>
1551 <require Tcompiler="IAR"/>
1552 </condition>
1553
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1554 <condition id="CM0_IAR">
1555 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1556 <require condition="CM0"/>
1557 <require Tcompiler="IAR"/>
1558 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1559 <condition id="CM0_LE_IAR">
1560 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1561 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1562 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1563 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1564 <condition id="CM0_BE_IAR">
1565 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1566 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1567 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1568 </condition>
1569
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1570 <condition id="CM3_IAR">
1571 <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1572 <require condition="CM3"/>
1573 <require Tcompiler="IAR"/>
1574 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1575 <condition id="CM3_LE_IAR">
1576 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1577 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1578 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1579 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1580 <condition id="CM3_BE_IAR">
1581 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1582 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1583 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1584 </condition>
1585
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1586 <condition id="CM4_IAR">
1587 <description>Cortex-M4 processor based device for the IAR Compiler</description>
1588 <require condition="CM4"/>
1589 <require Tcompiler="IAR"/>
1590 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1591 <condition id="CM4_LE_IAR">
1592 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1593 <require condition="CM4_IAR"/>
1594 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1595 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1596 <condition id="CM4_BE_IAR">
1597 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1598 <require condition="CM4_IAR"/>
1599 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1600 </condition>
1601
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1602 <condition id="CM4_FP_IAR">
1603 <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1604 <require condition="CM4_FP"/>
1605 <require Tcompiler="IAR"/>
1606 </condition>
1607 <condition id="CM4_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1608 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1609 <require condition="CM4_FP_IAR"/>
1610 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1611 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1612 <condition id="CM4_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1613 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1614 <require condition="CM4_FP_IAR"/>
1615 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1616 </condition>
1617
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1618 <condition id="CM7_IAR">
1619 <description>Cortex-M7 processor based device for the IAR Compiler</description>
1620 <require condition="CM7"/>
1621 <require Tcompiler="IAR"/>
1622 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1623 <condition id="CM7_LE_IAR">
1624 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1625 <require condition="CM7_IAR"/>
1626 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1627 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1628 <condition id="CM7_BE_IAR">
1629 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1630 <require condition="CM7_IAR"/>
1631 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1632 </condition>
1633
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1634 <condition id="CM7_FP_IAR">
1635 <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1636 <require condition="CM7_FP"/>
1637 <require Tcompiler="IAR"/>
1638 </condition>
1639 <condition id="CM7_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1640 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1641 <require condition="CM7_FP_IAR"/>
1642 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1643 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1644 <condition id="CM7_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1645 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1646 <require condition="CM7_FP_IAR"/>
1647 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1648 </condition>
1649
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1650 <condition id="CM7_SP_IAR">
1651 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1652 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1653 <require Tcompiler="IAR"/>
1654 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1655 <condition id="CM7_SP_LE_IAR">
1656 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1657 <require condition="CM7_SP_IAR"/>
1658 <require Dendian="Little-endian"/>
1659 </condition>
1660 <condition id="CM7_SP_BE_IAR">
1661 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1662 <require condition="CM7_SP_IAR"/>
1663 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1664 </condition>
1665
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1666 <condition id="CM7_DP_IAR">
1667 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1668 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1669 <require Tcompiler="IAR"/>
1670 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1671 <condition id="CM7_DP_LE_IAR">
1672 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1673 <require condition="CM7_DP_IAR"/>
1674 <require Dendian="Little-endian"/>
1675 </condition>
1676 <condition id="CM7_DP_BE_IAR">
1677 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1678 <require condition="CM7_DP_IAR"/>
1679 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1680 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1681
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1682 <!-- conditions selecting single devices and CMSIS Core -->
1683 <!-- used for component startup, GCC version is used for C-Startup -->
1684 <condition id="ARMCM0 CMSIS">
1685 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1686 <require Dvendor="ARM:82" Dname="ARMCM0"/>
1687 <require Cclass="CMSIS" Cgroup="CORE"/>
1688 </condition>
1689 <condition id="ARMCM0 CMSIS GCC">
1690 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1691 <require condition="ARMCM0 CMSIS"/>
1692 <require condition="GCC"/>
1693 </condition>
1694
1695 <condition id="ARMCM0+ CMSIS">
1696 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1697 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1698 <require Cclass="CMSIS" Cgroup="CORE"/>
1699 </condition>
1700 <condition id="ARMCM0+ CMSIS GCC">
1701 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1702 <require condition="ARMCM0+ CMSIS"/>
1703 <require condition="GCC"/>
1704 </condition>
1705
1706 <condition id="ARMCM3 CMSIS">
1707 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1708 <require Dvendor="ARM:82" Dname="ARMCM3"/>
1709 <require Cclass="CMSIS" Cgroup="CORE"/>
1710 </condition>
1711 <condition id="ARMCM3 CMSIS GCC">
1712 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1713 <require condition="ARMCM3 CMSIS"/>
1714 <require condition="GCC"/>
1715 </condition>
1716
1717 <condition id="ARMCM4 CMSIS">
1718 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1719 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1720 <require Cclass="CMSIS" Cgroup="CORE"/>
1721 </condition>
1722 <condition id="ARMCM4 CMSIS GCC">
1723 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1724 <require condition="ARMCM4 CMSIS"/>
1725 <require condition="GCC"/>
1726 </condition>
1727
1728 <condition id="ARMCM7 CMSIS">
1729 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1730 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1731 <require Cclass="CMSIS" Cgroup="CORE"/>
1732 </condition>
1733 <condition id="ARMCM7 CMSIS GCC">
1734 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1735 <require condition="ARMCM7 CMSIS"/>
1736 <require condition="GCC"/>
1737 </condition>
1738
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1739 <condition id="ARMCM23 CMSIS">
1740 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1741 <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1742 <require Cclass="CMSIS" Cgroup="CORE"/>
1743 </condition>
1744 <condition id="ARMCM23 CMSIS GCC">
1745 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1746 <require condition="ARMCM23 CMSIS"/>
1747 <require condition="GCC"/>
1748 </condition>
1749
1750 <condition id="ARMCM33 CMSIS">
1751 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1752 <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1753 <require Cclass="CMSIS" Cgroup="CORE"/>
1754 </condition>
1755 <condition id="ARMCM33 CMSIS GCC">
1756 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1757 <require condition="ARMCM33 CMSIS"/>
1758 <require condition="GCC"/>
1759 </condition>
1760
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1761 <condition id="ARMSC000 CMSIS">
1762 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1763 <require Dvendor="ARM:82" Dname="ARMSC000"/>
1764 <require Cclass="CMSIS" Cgroup="CORE"/>
1765 </condition>
1766 <condition id="ARMSC000 CMSIS GCC">
1767 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1768 <require condition="ARMSC000 CMSIS"/>
1769 <require condition="GCC"/>
1770 </condition>
1771
1772 <condition id="ARMSC300 CMSIS">
1773 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1774 <require Dvendor="ARM:82" Dname="ARMSC300"/>
1775 <require Cclass="CMSIS" Cgroup="CORE"/>
1776 </condition>
1777 <condition id="ARMSC300 CMSIS GCC">
1778 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1779 <require condition="ARMSC300 CMSIS"/>
1780 <require condition="GCC"/>
1781 </condition>
1782
1783 <condition id="ARMv8MBL CMSIS">
1784 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1785 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1786 <require Cclass="CMSIS" Cgroup="CORE"/>
1787 </condition>
1788 <condition id="ARMv8MBL CMSIS GCC">
1789 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1790 <require condition="ARMv8MBL CMSIS"/>
1791 <require condition="GCC"/>
1792 </condition>
1793
1794 <condition id="ARMv8MML CMSIS">
1795 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1796 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1797 <require Cclass="CMSIS" Cgroup="CORE"/>
1798 </condition>
1799 <condition id="ARMv8MML CMSIS GCC">
1800 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1801 <require condition="ARMv8MML CMSIS"/>
1802 <require condition="GCC"/>
1803 </condition>
1804
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1805 <condition id="ARMCA5 CMSIS">
1806 <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1807 <require Dvendor="ARM:82" Dname="ARMCA5"/>
1808 <require Cclass="CMSIS" Cgroup="CORE"/>
1809 </condition>
1810
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1811 <condition id="ARMCA7 CMSIS">
1812 <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1813 <require Dvendor="ARM:82" Dname="ARMCA7"/>
1814 <require Cclass="CMSIS" Cgroup="CORE"/>
1815 </condition>
1816
1817 <condition id="ARMCA9 CMSIS">
1818 <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1819 <require Dvendor="ARM:82" Dname="ARMCA9"/>
1820 <require Cclass="CMSIS" Cgroup="CORE"/>
1821 </condition>
1822
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1823 <!-- CMSIS DSP -->
1824 <condition id="CMSIS DSP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1825 <description>Components required for DSP</description>
1826 <require condition="ARMv6_7_8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1827 <require condition="ARMCC GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1828 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1829 </condition>
1830
1831 <!-- RTOS RTX -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1832 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1833 <description>Components required for RTOS RTX</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1834 <require condition="ARMv6_7-M Device"/>
1835 <require condition="ARMCC GCC IAR"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1836 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1837 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1838 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1839 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1840 <description>Components required for RTOS RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1841 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]1842 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1843 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1844 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1845 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1846 <description>Components required for RTOS2 RTX5</description>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]1847 <require condition="ARMv6_7_8-M Device"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1848 <require condition="ARMCC GCC IAR"/>
1849 <require Cclass="CMSIS" Cgroup="CORE"/>
1850 <require Cclass="Device" Cgroup="Startup"/>
1851 </condition>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]1852 <condition id="RTOS2 RTX5 v7-A">
1853 <description>Components required for RTOS2 RTX5 v7-A</description>
1854 <require condition="ARMv7-A Device"/>
1855 <require condition="ARMCC GCC IAR"/>
1856 <require Cclass="CMSIS" Cgroup="CORE"/>
1857 <require Cclass="Device" Cgroup="Startup"/>
1858 <require Cclass="Device" Cgroup="OS Tick"/>
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]1859 <require Cclass="Device" Cgroup="IRQ Controller"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]1860 </condition>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1861 <condition id="RTOS2 RTX5 Lib">
1862 <description>Components required for RTOS2 RTX5 Library</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1863 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]1864 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1865 <require Cclass="CMSIS" Cgroup="CORE"/>
1866 <require Cclass="Device" Cgroup="Startup"/>
1867 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1868 <condition id="RTOS2 RTX5 NS">
1869 <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1870 <require condition="ARMv8-M TZ Device"/>
1871 <require condition="ARMCC GCC"/>
1872 <require Cclass="CMSIS" Cgroup="CORE"/>
1873 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1874 </condition>
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]1875
1876 <!-- OS Tick -->
1877 <condition id="OS Tick PTIM">
1878 <description>Components required for OS Tick Private Timer</description>
1879 <require condition="CA5_CA9"/>
1880 <require Cclass="Device" Cgroup="IRQ Controller"/>
1881 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1882
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame^]1883 <condition id="OS Tick GTIM">
1884 <description>Components required for OS Tick Generic Physical Timer</description>
1885 <require condition="CA7"/>
1886 <require Cclass="Device" Cgroup="IRQ Controller"/>
1887 </condition>
1888
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1889 </conditions>
1890
1891 <components>
1892 <!-- CMSIS-Core component -->
Joachim Krech8cd76b42017-02-03 15:18:56 +0100[diff] [blame]1893 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.1" condition="ARMv6_7_8-M Device" >
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1894 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1895 <files>
1896 <!-- CPU independent -->
1897 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1898 <file category="include" name="CMSIS/Include/"/>
Robert Rostoharb2e07162016-11-04 10:43:56 +0100[diff] [blame]1899 <file category="header" name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]1900 <!-- Code template -->
Robert Rostohar0e71e882016-11-16 19:03:44 +0100[diff] [blame]1901 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c" version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
Robert Rostohar71f4dcf2016-11-16 19:06:01 +0100[diff] [blame]1902 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1903 </files>
1904 </component>
1905
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1906 <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.0" condition="ARMv7-A Device" >
1907 <description>CMSIS-CORE for Cortex-A</description>
1908 <files>
1909 <!-- CPU independent -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1910 <file category="doc" name="CMSIS/Documentation/Core_A/html/index.html"/>
brondanib6bdb2c2017-03-02 16:15:52 +0100[diff] [blame]1911 <file category="include" name="CMSIS/Core_A/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1912 </files>
1913 </component>
1914
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1915 <!-- CMSIS-Startup components -->
1916 <!-- Cortex-M0 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1917 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1918 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1919 <files>
1920 <!-- include folder / device header file -->
1921 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1922 <!-- startup / system file -->
1923 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1924 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1925 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1926 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1927 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1928 </files>
1929 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1930 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1931 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1932 <files>
1933 <!-- include folder / device header file -->
1934 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1935 <!-- startup / system file -->
1936 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1937 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1938 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1939 </files>
1940 </component>
1941
1942 <!-- Cortex-M0+ -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1943 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1944 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1945 <files>
1946 <!-- include folder / device header file -->
1947 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1948 <!-- startup / system file -->
1949 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1950 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1951 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1952 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1953 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1954 </files>
1955 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1956 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1957 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1958 <files>
1959 <!-- include folder / device header file -->
1960 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1961 <!-- startup / system file -->
1962 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1963 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1964 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1965 </files>
1966 </component>
1967
1968 <!-- Cortex-M3 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1969 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1970 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1971 <files>
1972 <!-- include folder / device header file -->
1973 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1974 <!-- startup / system file -->
1975 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1976 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1977 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1978 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1979 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1980 </files>
1981 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1982 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1983 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1984 <files>
1985 <!-- include folder / device header file -->
1986 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1987 <!-- startup / system file -->
1988 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1989 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1990 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1991 </files>
1992 </component>
1993
1994 <!-- Cortex-M4 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1995 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1996 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1997 <files>
1998 <!-- include folder / device header file -->
1999 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2000 <!-- startup / system file -->
2001 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2002 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2003 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2004 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2005 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
2006 </files>
2007 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2008 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2009 <description>System and Startup for Generic ARM Cortex-M4 device</description>
2010 <files>
2011 <!-- include folder / device header file -->
2012 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2013 <!-- startup / system file -->
2014 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2015 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2016 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
2017 </files>
2018 </component>
2019
2020 <!-- Cortex-M7 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2021 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2022 <description>System and Startup for Generic ARM Cortex-M7 device</description>
2023 <files>
2024 <!-- include folder / device header file -->
2025 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
2026 <!-- startup / system file -->
2027 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2028 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2029 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2030 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2031 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
2032 </files>
2033 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2034 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2035 <description>System and Startup for Generic ARM Cortex-M7 device</description>
2036 <files>
2037 <!-- include folder / device header file -->
2038 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
2039 <!-- startup / system file -->
2040 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2041 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2042 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
2043 </files>
2044 </component>
2045
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2046 <!-- Cortex-M23 -->
2047 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS">
2048 <description>System and Startup for Generic ARM Cortex-M23 device</description>
2049 <files>
2050 <!-- include folder / device header file -->
2051 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2052 <!-- startup / system file -->
2053 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2054 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2055 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2056 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2057 <!-- SAU configuration -->
2058 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2059 </files>
2060 </component>
2061 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2062 <description>System and Startup for Generic ARM Cortex-M23 device</description>
2063 <files>
2064 <!-- include folder / device header file -->
2065 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2066 <!-- startup / system file -->
2067 <file category="sourceC" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2068 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2069 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
2070 <!-- SAU configuration -->
2071 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2072 </files>
2073 </component>
2074
2075 <!-- Cortex-M33 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2076 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2077 <description>System and Startup for Generic ARM Cortex-M33 device</description>
2078 <files>
2079 <!-- include folder / device header file -->
2080 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2081 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2082 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
2083 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
2084 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2085 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2086 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2087 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2088 </files>
2089 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2090 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2091 <description>System and Startup for Generic ARM Cortex-M33 device</description>
2092 <files>
2093 <!-- include folder / device header file -->
2094 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2095 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2096 <file category="sourceC" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
2097 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2098 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2099 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2100 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2101 </files>
2102 </component>
2103
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2104 <!-- Cortex-SC000 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2105 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2106 <description>System and Startup for Generic ARM SC000 device</description>
2107 <files>
2108 <!-- include folder / device header file -->
2109 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2110 <!-- startup / system file -->
2111 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2112 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2113 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2114 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2115 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2116 </files>
2117 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2118 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2119 <description>System and Startup for Generic ARM SC000 device</description>
2120 <files>
2121 <!-- include folder / device header file -->
2122 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2123 <!-- startup / system file -->
2124 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2125 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2126 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2127 </files>
2128 </component>
2129
2130 <!-- Cortex-SC300 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2131 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2132 <description>System and Startup for Generic ARM SC300 device</description>
2133 <files>
2134 <!-- include folder / device header file -->
2135 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2136 <!-- startup / system file -->
2137 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2138 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2139 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2140 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2141 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2142 </files>
2143 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2144 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2145 <description>System and Startup for Generic ARM SC300 device</description>
2146 <files>
2147 <!-- include folder / device header file -->
2148 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2149 <!-- startup / system file -->
2150 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2151 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2152 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2153 </files>
2154 </component>
2155
2156 <!-- ARMv8MBL -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2157 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2158 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2159 <files>
2160 <!-- include folder / device header file -->
2161 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2162 <!-- startup / system file -->
2163 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2164 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2165 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2166 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2167 <!-- SAU configuration -->
2168 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2169 </files>
2170 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2171 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2172 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2173 <files>
2174 <!-- include folder / device header file -->
2175 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2176 <!-- startup / system file -->
2177 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2178 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2179 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2180 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2181 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2182 </files>
2183 </component>
2184
2185 <!-- ARMv8MML -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2186 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2187 <description>System and Startup for Generic ARM ARMv8MML device</description>
2188 <files>
2189 <!-- include folder / device header file -->
2190 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
2191 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2192 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2193 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2194 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2195 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2196 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2197 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2198 </files>
2199 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2200 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2201 <description>System and Startup for Generic ARM ARMv8MML device</description>
2202 <files>
2203 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2204 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2205 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2206 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2207 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2208 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2209 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2210 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2211 </files>
2212 </component>
2213
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2214 <!-- Cortex-A5 -->
2215 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA5 CMSIS">
2216 <description>System and Startup for Generic ARM Cortex-A5 device</description>
2217 <files>
2218 <!-- include folder / device header file -->
2219 <file category="include" name="Device/ARM/ARMCA5/Include/"/>
2220 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2221 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2222 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2223 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2224 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2225 <file category="sourceC" name="Device/ARM/ARMCA5/Source/system_ARMCA5.c" version="1.0.0" attr="config"/>
2226 <file category="sourceC" name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c" version="1.0.0" attr="config"/>
2227 <file category="header" name="Device/ARM/ARMCA5/Include/system_ARMCA5.h" version="1.0.0" attr="config"/>
2228 <file category="header" name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h" version="1.0.0" attr="config"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2229
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2230 </files>
2231 </component>
2232
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2233 <!-- Cortex-A7 -->
2234 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA7 CMSIS">
2235 <description>System and Startup for Generic ARM Cortex-A7 device</description>
2236 <files>
2237 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2238 <file category="include" name="Device/ARM/ARMCA7/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2239 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2240 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2241 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2242 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2243 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2244 <file category="sourceC" name="Device/ARM/ARMCA7/Source/system_ARMCA7.c" version="1.0.0" attr="config"/>
2245 <file category="sourceC" name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2246 <file category="header" name="Device/ARM/ARMCA7/Include/system_ARMCA7.h" version="1.0.0" attr="config"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2247 <file category="header" name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2248 </files>
2249 </component>
2250
2251 <!-- Cortex-A9 -->
2252 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA9 CMSIS">
2253 <description>System and Startup for Generic ARM Cortex-A9 device</description>
2254 <files>
2255 <!-- include folder / device header file -->
2256 <file category="include" name="Device/ARM/ARMCA9/Include/"/>
2257 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2258 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2259 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2260 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2261 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2262 <file category="sourceC" name="Device/ARM/ARMCA9/Source/system_ARMCA9.c" version="1.0.0" attr="config"/>
2263 <file category="sourceC" name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2264 <file category="header" name="Device/ARM/ARMCA9/Include/system_ARMCA9.h" version="1.0.0" attr="config"/>
2265 <file category="header" name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2266 </files>
2267 </component>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2268
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2269 <!-- IRQ Controller -->
2270 <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2271 <description>IRQ Controller implementation using GIC</description>
2272 <files>
2273 <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2274 </files>
2275 </component>
2276
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]2277 <!-- OS Tick -->
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2278 <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]2279 <description>OS Tick implementation using Private Timer</description>
2280 <files>
2281 <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2282 </files>
2283 </component>
2284
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame^]2285 <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick GTIM">
2286 <description>OS Tick implementation using Generic Physical Timer</description>
2287 <files>
2288 <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2289 </files>
2290 </component>
2291
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2292 <!-- CMSIS-DSP component -->
Martin Günther1b4ba8f2017-02-02 14:38:48 +0100[diff] [blame]2293 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.1" condition="CMSIS DSP">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2294 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2295 <files>
2296 <!-- CPU independent -->
2297 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2298 <file category="header" name="CMSIS/Include/arm_math.h"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2299
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2300 <!-- CPU and Compiler dependent -->
2301 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2302 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2303 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2304 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2305 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2306 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2307 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2308 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2309 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2310 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2311 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2312 <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2313 <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2314 <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2315 <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2316
2317 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2318 <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2319 <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2320 <file category="library" condition="CM33_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2321 <file category="library" condition="CM33_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2322 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2323 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2324 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2325 <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2326 <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2327 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2328 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2329
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2330 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2331 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2332 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2333 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2334 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2335 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2336 <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2337 <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2338
2339 <file category="library" condition="CM23_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2340 <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2341 <file category="library" condition="CM33_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2342 <file category="library" condition="CM33_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2343 <file category="library" condition="CM33_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2344 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2345 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2346 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2347 <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2348 <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2349 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2350 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2351
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2352 </files>
2353 </component>
2354
2355 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]2356 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0.0" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2357 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2358 <RTE_Components_h>
2359 <!-- the following content goes into file 'RTE_Components.h' -->
2360 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2361 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2362 </RTE_Components_h>
2363 <files>
2364 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]2365 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2366 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2367 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2368
2369 <!-- RTX templates -->
2370 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2371 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2372 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2373 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2374 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2375 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2376 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2377 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2378 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2379 <!-- tool-chain specific template file -->
2380 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2381 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2382 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2383
2384 <!-- CPU and Compiler dependent -->
2385 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2386 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2387 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2388 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2389 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2390 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2391 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2392 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2393 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2394 <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2395 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2396 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2397 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2398 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2399 <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2400 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2401 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2402 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2403 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2404 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2405 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2406 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2407 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2408 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2409 <file category="library" condition="CM4_FP_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2410 <file category="library" condition="CM4_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2411 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2412 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2413 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2414 <file category="library" condition="CM7_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2415 <!-- IAR -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2416 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2417 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2418 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2419 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2420 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2421 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2422 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2423 <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2424 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2425 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2426 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2427 <file category="library" condition="CM7_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2428 </files>
2429 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2430
2431 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]2432 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.0" Capiversion="1.0.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2433 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2434 <RTE_Components_h>
2435 <!-- the following content goes into file 'RTE_Components.h' -->
2436 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2437 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
2438 </RTE_Components_h>
2439 <files>
2440 <!-- RTX header file -->
2441 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2442 <!-- RTX compatibility module for API V1 -->
2443 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2444 </files>
2445 </component>
2446
2447 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]2448 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2449 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2450 <RTE_Components_h>
2451 <!-- the following content goes into file 'RTE_Components.h' -->
2452 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2453 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2454 </RTE_Components_h>
2455 <files>
2456 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2457 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2458
2459 <!-- RTX header files -->
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2460 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2461
2462 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2463 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2464 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2465
2466 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2467 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2468 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2469 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2470 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2471 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2472 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2473 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2474 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Jonatan Antoni1f9190f2017-03-13 10:46:34 +0100[diff] [blame]2475 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="2.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2476 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2477
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2478 <!-- RTX library configuration -->
2479 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2480
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2481 <!-- RTX libraries (CPU and Compiler dependent) -->
2482 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2483 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
2484 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2485 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2486 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
2487 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2488 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2489 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2490 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2491 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2492 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2493 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2494 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
2495 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2496 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2497 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2498 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2499 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2500 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2501 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2502 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2503 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2504 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2505 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2506 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2507 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2508 <!-- IAR -->
2509 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2510 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2511 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2512 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2513 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2514 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2515 </files>
2516 </component>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]2517 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2518 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2519 <RTE_Components_h>
2520 <!-- the following content goes into file 'RTE_Components.h' -->
2521 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2522 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2523 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2524 </RTE_Components_h>
2525 <files>
2526 <!-- RTX documentation -->
2527 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2528
2529 <!-- RTX header files -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2530 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2531
2532 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2533 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2534 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2535
2536 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2537 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2538 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2539 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2540 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2541 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2542 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2543 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2544 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2545 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2546
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2547 <!-- RTX library configuration -->
2548 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2549
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2550 <!-- RTX libraries (CPU and Compiler dependent) -->
2551 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2552 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2553 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2554 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2555 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2556 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2557 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2558 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2559 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2560 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2561 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2562 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2563 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2564 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2565 </files>
2566 </component>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]2567 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2568 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2569 <RTE_Components_h>
2570 <!-- the following content goes into file 'RTE_Components.h' -->
2571 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2572 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2573 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2574 </RTE_Components_h>
2575 <files>
2576 <!-- RTX documentation -->
2577 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2578
2579 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2580 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2581
2582 <!-- RTX configuration -->
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2583 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2584 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2585
2586 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2587 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2588 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2589 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2590 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2591 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2592 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2593 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2594 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2595 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2596
2597 <!-- RTX sources (core) -->
2598 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2599 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2600 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2601 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2602 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2603 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2604 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2605 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2606 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2607 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2608 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2609 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2610 <!-- RTX sources (library configuration) -->
2611 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2612 <!-- RTX sources (handlers ARMCC) -->
2613 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
2614 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
2615 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
2616 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
2617 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
2618 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2619 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
2620 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
2621 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2622 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
2623 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
2624 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
2625 <!-- RTX sources (handlers GCC) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2626 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S" condition="CM0_GCC"/>
2627 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM3_GCC"/>
2628 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM4_GCC"/>
2629 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM4_FP_GCC"/>
2630 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM7_GCC"/>
2631 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM7_FP_GCC"/>
2632 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
2633 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
2634 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2635 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
2636 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
2637 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2638 <!-- RTX sources (handlers IAR) -->
2639 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s" condition="CM0_IAR"/>
2640 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM3_IAR"/>
2641 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM4_IAR"/>
2642 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM4_FP_IAR"/>
2643 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM7_IAR"/>
2644 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM7_FP_IAR"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2645 <!-- OS Tick (SysTick) -->
2646 <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2647 </files>
2648 </component>
2649 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 v7-A">
2650 <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2651 <RTE_Components_h>
2652 <!-- the following content goes into file 'RTE_Components.h' -->
2653 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2654 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
2655 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
2656 </RTE_Components_h>
2657 <files>
2658 <!-- RTX documentation -->
2659 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2660
2661 <!-- RTX header files -->
2662 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2663
2664 <!-- RTX configuration -->
2665 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2666 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
2667
2668 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/handlers.c" version="5.1.0"/>
2669
2670 <!-- RTX templates -->
2671 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2672 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2673 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2674 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2675 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2676 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2677 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2678 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2679 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2680
2681 <!-- RTX sources (core) -->
2682 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2683 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2684 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2685 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2686 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2687 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2688 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2689 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2690 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2691 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2692 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2693 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2694 <!-- RTX sources (library configuration) -->
2695 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2696 <!-- RTX sources (handlers ARMCC) -->
2697 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s" condition="CA_ARMCC5"/>
2698 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_ARMCC6"/>
2699 <!-- RTX sources (handlers GCC) -->
2700 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_GCC"/>
2701 <!-- RTX sources (handlers IAR) -->
2702 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s" condition="CA_IAR"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2703 </files>
2704 </component>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]2705 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2706 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2707 <RTE_Components_h>
2708 <!-- the following content goes into file 'RTE_Components.h' -->
2709 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2710 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2711 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2712 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2713 </RTE_Components_h>
2714 <files>
2715 <!-- RTX documentation -->
2716 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2717
2718 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2719 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2720
2721 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2722 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2723 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2724
2725 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2726 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2727 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2728 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2729 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2730 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2731 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2732 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2733 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2734 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2735
2736 <!-- RTX sources (core) -->
2737 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2738 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2739 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2740 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2741 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2742 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2743 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2744 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2745 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2746 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2747 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2748 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2749 <!-- RTX sources (library configuration) -->
2750 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2751 <!-- RTX sources (ARMCC handlers) -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2752 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
2753 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
2754 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2755 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
2756 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
2757 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
2758 <!-- RTX sources (GCC handlers) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2759 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="CM23_GCC"/>
2760 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="CM33_GCC"/>
2761 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2762 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="ARMv8MBL_GCC"/>
2763 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="ARMv8MML_GCC"/>
2764 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2765 <!-- OS Tick (SysTick) -->
2766 <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2767 </files>
2768 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2769
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2770 </components>
2771
2772 <boards>
2773 <board name="uVision Simulator" vendor="Keil">
2774 <description>uVision Simulator</description>
2775 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2776 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2777 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2778 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2779 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2780 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2781 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2782 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2783 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2784 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2785 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2786 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2787 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
Joachim Krech4a03e6d2017-02-06 13:17:39 +0100[diff] [blame]2788 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2789 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2790 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2791 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2792 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2793 </board>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2794 </boards>
2795
2796 <examples>
2797 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2798 <description>DSP_Lib Class Marks example</description>
2799 <board name="uVision Simulator" vendor="Keil"/>
2800 <project>
2801 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2802 </project>
2803 <attributes>
2804 <component Cclass="CMSIS" Cgroup="CORE"/>
2805 <component Cclass="CMSIS" Cgroup="DSP"/>
2806 <component Cclass="Device" Cgroup="Startup"/>
2807 <category>Getting Started</category>
2808 </attributes>
2809 </example>
2810
2811 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2812 <description>DSP_Lib Convolution example</description>
2813 <board name="uVision Simulator" vendor="Keil"/>
2814 <project>
2815 <environment name="uv" load="arm_convolution_example.uvprojx"/>
2816 </project>
2817 <attributes>
2818 <component Cclass="CMSIS" Cgroup="CORE"/>
2819 <component Cclass="CMSIS" Cgroup="DSP"/>
2820 <component Cclass="Device" Cgroup="Startup"/>
2821 <category>Getting Started</category>
2822 </attributes>
2823 </example>
2824
2825 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2826 <description>DSP_Lib Dotproduct example</description>
2827 <board name="uVision Simulator" vendor="Keil"/>
2828 <project>
2829 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2830 </project>
2831 <attributes>
2832 <component Cclass="CMSIS" Cgroup="CORE"/>
2833 <component Cclass="CMSIS" Cgroup="DSP"/>
2834 <component Cclass="Device" Cgroup="Startup"/>
2835 <category>Getting Started</category>
2836 </attributes>
2837 </example>
2838
2839 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2840 <description>DSP_Lib FFT Bin example</description>
2841 <board name="uVision Simulator" vendor="Keil"/>
2842 <project>
2843 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2844 </project>
2845 <attributes>
2846 <component Cclass="CMSIS" Cgroup="CORE"/>
2847 <component Cclass="CMSIS" Cgroup="DSP"/>
2848 <component Cclass="Device" Cgroup="Startup"/>
2849 <category>Getting Started</category>
2850 </attributes>
2851 </example>
2852
2853 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2854 <description>DSP_Lib FIR example</description>
2855 <board name="uVision Simulator" vendor="Keil"/>
2856 <project>
2857 <environment name="uv" load="arm_fir_example.uvprojx"/>
2858 </project>
2859 <attributes>
2860 <component Cclass="CMSIS" Cgroup="CORE"/>
2861 <component Cclass="CMSIS" Cgroup="DSP"/>
2862 <component Cclass="Device" Cgroup="Startup"/>
2863 <category>Getting Started</category>
2864 </attributes>
2865 </example>
2866
2867 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2868 <description>DSP_Lib Graphic Equalizer example</description>
2869 <board name="uVision Simulator" vendor="Keil"/>
2870 <project>
2871 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2872 </project>
2873 <attributes>
2874 <component Cclass="CMSIS" Cgroup="CORE"/>
2875 <component Cclass="CMSIS" Cgroup="DSP"/>
2876 <component Cclass="Device" Cgroup="Startup"/>
2877 <category>Getting Started</category>
2878 </attributes>
2879 </example>
2880
2881 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2882 <description>DSP_Lib Linear Interpolation example</description>
2883 <board name="uVision Simulator" vendor="Keil"/>
2884 <project>
2885 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2886 </project>
2887 <attributes>
2888 <component Cclass="CMSIS" Cgroup="CORE"/>
2889 <component Cclass="CMSIS" Cgroup="DSP"/>
2890 <component Cclass="Device" Cgroup="Startup"/>
2891 <category>Getting Started</category>
2892 </attributes>
2893 </example>
2894
2895 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2896 <description>DSP_Lib Matrix example</description>
2897 <board name="uVision Simulator" vendor="Keil"/>
2898 <project>
2899 <environment name="uv" load="arm_matrix_example.uvprojx"/>
2900 </project>
2901 <attributes>
2902 <component Cclass="CMSIS" Cgroup="CORE"/>
2903 <component Cclass="CMSIS" Cgroup="DSP"/>
2904 <component Cclass="Device" Cgroup="Startup"/>
2905 <category>Getting Started</category>
2906 </attributes>
2907 </example>
2908
2909 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2910 <description>DSP_Lib Signal Convergence example</description>
2911 <board name="uVision Simulator" vendor="Keil"/>
2912 <project>
2913 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2914 </project>
2915 <attributes>
2916 <component Cclass="CMSIS" Cgroup="CORE"/>
2917 <component Cclass="CMSIS" Cgroup="DSP"/>
2918 <component Cclass="Device" Cgroup="Startup"/>
2919 <category>Getting Started</category>
2920 </attributes>
2921 </example>
2922
2923 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2924 <description>DSP_Lib Sinus/Cosinus example</description>
2925 <board name="uVision Simulator" vendor="Keil"/>
2926 <project>
2927 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2928 </project>
2929 <attributes>
2930 <component Cclass="CMSIS" Cgroup="CORE"/>
2931 <component Cclass="CMSIS" Cgroup="DSP"/>
2932 <component Cclass="Device" Cgroup="Startup"/>
2933 <category>Getting Started</category>
2934 </attributes>
2935 </example>
2936
2937 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2938 <description>DSP_Lib Variance example</description>
2939 <board name="uVision Simulator" vendor="Keil"/>
2940 <project>
2941 <environment name="uv" load="arm_variance_example.uvprojx"/>
2942 </project>
2943 <attributes>
2944 <component Cclass="CMSIS" Cgroup="CORE"/>
2945 <component Cclass="CMSIS" Cgroup="DSP"/>
2946 <component Cclass="Device" Cgroup="Startup"/>
2947 <category>Getting Started</category>
2948 </attributes>
2949 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2950
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2951 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2952 <description>CMSIS-RTOS2 Blinky example</description>
2953 <board name="uVision Simulator" vendor="Keil"/>
2954 <project>
2955 <environment name="uv" load="Blinky.uvprojx"/>
2956 </project>
2957 <attributes>
2958 <component Cclass="CMSIS" Cgroup="CORE"/>
2959 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2960 <component Cclass="Device" Cgroup="Startup"/>
2961 <category>Getting Started</category>
2962 </attributes>
2963 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2964
Robert Rostohare13e4702016-11-07 15:23:44 +0100[diff] [blame]2965 <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
Matthias Hertel4b70ae42016-11-07 14:14:59 +0100[diff] [blame]2966 <description>CMSIS-RTOS2 mixed API v1 and v2</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2967 <board name="uVision Simulator" vendor="Keil"/>
2968 <project>
2969 <environment name="uv" load="Blinky.uvprojx"/>
2970 </project>
2971 <attributes>
2972 <component Cclass="CMSIS" Cgroup="CORE"/>
2973 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2974 <component Cclass="Device" Cgroup="Startup"/>
2975 <category>Getting Started</category>
2976 </attributes>
2977 </example>
2978
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]2979 <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]2980 <description>Bare-metal secure/non-secure example without RTOS</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2981 <board name="uVision Simulator" vendor="Keil"/>
2982 <project>
2983 <environment name="uv" load="NoRTOS.uvmpw"/>
2984 </project>
2985 <attributes>
2986 <component Cclass="CMSIS" Cgroup="CORE"/>
2987 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2988 <component Cclass="Device" Cgroup="Startup"/>
2989 <category>Getting Started</category>
2990 </attributes>
2991 </example>
2992
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]2993 <example name="TrustZone for ARMv8-M RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]2994 <description>Secure/non-secure RTOS example with thread context management</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2995 <board name="uVision Simulator" vendor="Keil"/>
2996 <project>
2997 <environment name="uv" load="RTOS.uvmpw"/>
2998 </project>
2999 <attributes>
3000 <component Cclass="CMSIS" Cgroup="CORE"/>
3001 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3002 <component Cclass="Device" Cgroup="Startup"/>
3003 <category>Getting Started</category>
3004 </attributes>
3005 </example>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3006
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]3007 <example name="TrustZone for ARMv8-M RTOS Security Tests" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3008 <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3009 <board name="uVision Simulator" vendor="Keil"/>
3010 <project>
3011 <environment name="uv" load="RTOS_Faults.uvmpw"/>
3012 </project>
3013 <attributes>
3014 <component Cclass="CMSIS" Cgroup="CORE"/>
3015 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3016 <component Cclass="Device" Cgroup="Startup"/>
3017 <category>Getting Started</category>
3018 </attributes>
3019 </example>
3020
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]3021 </examples>
3022
3023</package>