TrustedFirmware Git Browser
Code Review Sign In
review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 71f4dcf9e4e0ffcc30811c48ffa6b755b10aef8f / . / ARM.CMSIS.pdsc
blob: bbce70e022892a2ed60001220478d1802eec2403 [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
Joachim Krecha33860c2016-11-09 22:25:55 +0100[diff] [blame]7 <!-- <license>license.txt</license> -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Martin Güntherd1060532016-11-15 09:43:43 +0100[diff] [blame]11 <release version="5.0.1-dev0">
12 CMSIS_Core:
13 - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
Robert Rostohar0e71e882016-11-16 19:03:44 +0100[diff] [blame]14 - Updated template for secure main function (main_s.c)
Robert Rostohar71f4dcf2016-11-16 19:06:01 +0100[diff] [blame^]15 - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
Robert Rostoharbecc1a62016-11-16 18:55:33 +0100[diff] [blame]16 CMSIS-RTOS2:
17 - RTX 5.0.1 (see revision history for details)
Martin Güntherd1060532016-11-15 09:43:43 +0100[diff] [blame]18 </release>
Joachim Krechc45bb4a2016-11-11 11:01:22 +0100[diff] [blame]19 <release version="5.0.0" date="2016-11-11">
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]20 Changed open source license to Apache 2.0
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]21 CMSIS_Core:
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]22 - Added support for Cortex-M23 and Cortex-M33.
23 - Added ARMv8-M device configurations for mainline and baseline.
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]24 - Added CMSE support and thread context management for TrustZone for ARMv8-M
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]25 - Added cmsis_compiler.h to unify compiler behaviour.
26 - Updated function SCB_EnableICache (for Cortex-M7).
27 - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
28 CMSIS-RTOS:
29 - bug fix in RTX 4.82 (see revision history for details)
30 CMSIS-RTOS2:
31 - new API including compatibility layer to CMSIS-RTOS
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]32 - reference implementation based on RTX5
33 - supports all Cortex-M variants including TrustZone for ARMv8-M
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame]34 CMSIS-SVD:
35 - reworked SVD format documentation
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]36 - removed SVD file database documentation as SVD files are distributed in packs
37 - updated SVDConv for Win32 and Linux
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]38 CMSIS-DSP:
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]39 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
40 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]41 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]42 <release version="4.5.0" date="2015-10-28">
43 - CMSIS-Core 4.30.0 (see revision history for details)
44 - CMSIS-DAP 1.1.0 (unchanged)
45 - CMSIS-Driver 2.04.0 (see revision history for details)
46 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
47 - CMSIS-PACK 1.4.1 (see revision history for details)
48 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
49 - CMSIS-SVD 1.3.1 (see revision history for details)
50 </release>
51 <release version="4.4.0" date="2015-09-11">
52 - CMSIS-Core 4.20 (see revision history for details)
53 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
54 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
55 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
56 - CMSIS-RTOS
57 -- API 1.02 (unchanged)
58 -- RTX 4.79 (see revision history for details)
59 - CMSIS-SVD 1.3.0 (see revision history for details)
60 - CMSIS-DAP 1.1.0 (extended with SWO support)
61 </release>
62 <release version="4.3.0" date="2015-03-20">
63 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
64 - CMSIS-DSP 1.4.5 (see revision history for details)
65 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
66 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
67 - CMSIS-RTOS
68 -- API 1.02 (unchanged)
69 -- RTX 4.78 (see revision history for details)
70 - CMSIS-SVD 1.2 (unchanged)
71 </release>
72 <release version="4.2.0" date="2014-09-24">
73 Adding Cortex-M7 support
74 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
75 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
76 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
77 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
78 - CMSIS-RTOS RTX 4.75 (see revision history for details)
79 </release>
80 <release version="4.1.1" date="2014-06-30">
81 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
82 </release>
83 <release version="4.1.0" date="2014-06-12">
84 - CMSIS-Driver 2.02 (incompatible update)
85 - CMSIS-Pack 1.3 (see revision history for details)
86 - CMSIS-DSP 1.4.2 (unchanged)
87 - CMSIS-Core 3.30 (unchanged)
88 - CMSIS-RTOS RTX 4.74 (unchanged)
89 - CMSIS-RTOS API 1.02 (unchanged)
90 - CMSIS-SVD 1.10 (unchanged)
91 PACK:
92 - removed G++ specific files from PACK
93 - added Component Startup variant "C Startup"
94 - added Pack Checking Utility
95 - updated conditions to reflect tool-chain dependency
96 - added Taxonomy for Graphics
97 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
98 </release>
99 <release version="4.0.0">
100 - CMSIS-Driver 2.00 Preliminary (incompatible update)
101 - CMSIS-Pack 1.1 Preliminary
102 - CMSIS-DSP 1.4.2 (see revision history for details)
103 - CMSIS-Core 3.30 (see revision history for details)
104 - CMSIS-RTOS RTX 4.74 (see revision history for details)
105 - CMSIS-RTOS API 1.02 (unchanged)
106 - CMSIS-SVD 1.10 (unchanged)
107 </release>
108 <release version="3.20.4">
109 - CMSIS-RTOS 4.74 (see revision history for details)
110 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
111 </release>
112 <release version="3.20.3">
113 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
114 - CMSIS-RTOS 4.73 (see revision history for details)
115 </release>
116 <release version="3.20.2">
117 - CMSIS-Pack documentation has been added
118 - CMSIS-Drivers header and documentation have been added to PACK
119 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
120 </release>
121 <release version="3.20.1">
122 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
123 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
124 </release>
125 <release version="3.20.0">
126 The software portions that are deployed in the application program are now under a BSD license which allows usage
127 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
128 The individual components have been update as listed below:
129 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
130 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
131 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
132 - CMSIS-SVD is unchanged.
133 </release>
134 </releases>
135
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]136 <taxonomy>
137 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
138 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
139 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
140 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
141 <description Cclass="File System">File Drive Support and File System</description>
142 <description Cclass="Graphics">Graphical User Interface</description>
143 <description Cclass="Network">Network Stack using Internet Protocols</description>
144 <description Cclass="USB">Universal Serial Bus Stack</description>
145 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
146 </taxonomy>
147
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]148 <devices>
149 <!-- ****************************** Cortex-M0 ****************************** -->
150 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]151 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]152 <description>
153The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
154- simple, easy-to-use programmers model
155- highly efficient ultra-low power operation
156- excellent code density
157- deterministic, high-performance interrupt handling
158- upward compatibility with the rest of the Cortex-M processor family.
159 </description>
160 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
161 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
162 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
163 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
164
165 <device Dname="ARMCM0">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]166 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]167 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
168 </device>
169 </family>
170
171 <!-- ****************************** Cortex-M0P ****************************** -->
172 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]173 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]174 <description>
175The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
176- simple, easy-to-use programmers model
177- highly efficient ultra-low power operation
178- excellent code density
179- deterministic, high-performance interrupt handling
180- upward compatibility with the rest of the Cortex-M processor family.
181 </description>
182 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
183 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
184 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
185 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
186
187 <device Dname="ARMCM0P">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]188 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]189 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
190 </device>
191 </family>
192
193 <!-- ****************************** Cortex-M3 ****************************** -->
194 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]195 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]196 <description>
197The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
198- simple, easy-to-use programmers model
199- highly efficient ultra-low power operation
200- excellent code density
201- deterministic, high-performance interrupt handling
202- upward compatibility with the rest of the Cortex-M processor family.
203 </description>
204 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
205 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
206 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
207 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
208
209 <device Dname="ARMCM3">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]210 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]211 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
212 </device>
213 </family>
214
215 <!-- ****************************** Cortex-M4 ****************************** -->
216 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]217 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]218 <description>
219The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
220- simple, easy-to-use programmers model
221- highly efficient ultra-low power operation
222- excellent code density
223- deterministic, high-performance interrupt handling
224- upward compatibility with the rest of the Cortex-M processor family.
225 </description>
226 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
227 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
228 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
229 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
230
231 <device Dname="ARMCM4">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]232 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]233 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
234 </device>
235
236 <device Dname="ARMCM4_FP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]237 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]238 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
239 </device>
240 </family>
241
242 <!-- ****************************** Cortex-M7 ****************************** -->
243 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]244 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]245 <description>
Martin Güntheraa246272016-11-15 16:01:05 +0100[diff] [blame]246The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]247- simple, easy-to-use programmers model
248- highly efficient ultra-low power operation
249- excellent code density
250- deterministic, high-performance interrupt handling
251- upward compatibility with the rest of the Cortex-M processor family.
252 </description>
253 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
254 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
255 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
256 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
257
258 <device Dname="ARMCM7">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]259 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]260 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
261 </device>
262
263 <device Dname="ARMCM7_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]264 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]265 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
266 </device>
267
268 <device Dname="ARMCM7_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]269 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]270 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
271 </device>
272 </family>
273
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]274 <!-- ****************************** Cortex-M23 ********************** -->
275 <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
276 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
277 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]278The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
279It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
280Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]281 </description>
282 <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]283 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
284 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]285 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]286 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]287 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
288
289 <device Dname="ARMCM23">
290 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
291 <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
292 </device>
293
294 <device Dname="ARMCM23_TZ">
295 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
296 <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
297 </device>
298 </family>
299
300 <!-- ****************************** Cortex-M33 ****************************** -->
301 <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
302 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
303 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]304The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
305class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]306 </description>
307 <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]308 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
309 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]310 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]311 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
312 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]313
314 <device Dname="ARMCM33">
315 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
316 <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
317 </device>
318
319 <device Dname="ARMCM33_TZ">
320 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
321 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
322 </device>
323
324 <device Dname="ARMCM33_DSP_FP">
325 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
326 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
327 </device>
328
329 <device Dname="ARMCM33_DSP_FP_TZ">
330 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
331 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
332 </device>
333 </family>
334
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]335 <!-- ****************************** ARMSC000 ****************************** -->
336 <family Dfamily="ARM SC000" Dvendor="ARM:82">
337 <description>
338The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
339- simple, easy-to-use programmers model
340- highly efficient ultra-low power operation
341- excellent code density
342- deterministic, high-performance interrupt handling
343 </description>
344 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
345 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
346 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
347 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
348
349 <device Dname="ARMSC000">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]350 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]351 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
352 </device>
353 </family>
354
355 <!-- ****************************** ARMSC300 ****************************** -->
356 <family Dfamily="ARM SC300" Dvendor="ARM:82">
357 <description>
358The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
359- simple, easy-to-use programmers model
360- highly efficient ultra-low power operation
361- excellent code density
362- deterministic, high-performance interrupt handling
363 </description>
364 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
365 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
366 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
367 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
368
369 <device Dname="ARMSC300">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]370 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]371 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
372 </device>
373 </family>
374
375 <!-- ****************************** ARMv8-M Baseline ********************** -->
376 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
377 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
378 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]379ARMv8-M Baseline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]380 </description>
381 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]382 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
383 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]384 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]385 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]386 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
387
388 <device Dname="ARMv8MBL">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]389 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]390 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
391 </device>
392 </family>
393
394 <!-- ****************************** ARMv8-M Mainline ****************************** -->
395 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
396 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
397 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]398ARMv8-M Mainline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]399 </description>
400 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]401 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
402 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]403 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]404 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]405 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
406
407 <device Dname="ARMv8MML">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]408 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]409 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
410 </device>
411
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]412 <device Dname="ARMv8MML_DSP">
413 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]414 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]415 </device>
416
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]417 <device Dname="ARMv8MML_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]418 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]419 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
420 </device>
421
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]422 <device Dname="ARMv8MML_DSP_SP">
423 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]424 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]425 </device>
426
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]427 <device Dname="ARMv8MML_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]428 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]429 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
430 </device>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]431
432 <device Dname="ARMv8MML_DSP_DP">
433 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]434 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]435 </device>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]436 </family>
437
438 </devices>
439
440
441 <apis>
442 <!-- CMSIS-RTOS API -->
443 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
444 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
445 <files>
446 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
447 </files>
448 </api>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]449 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]450 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
451 <files>
452 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
453 </files>
454 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]455 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
456 <description>USART Driver API for Cortex-M</description>
457 <files>
458 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
459 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
460 </files>
461 </api>
462 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
463 <description>SPI Driver API for Cortex-M</description>
464 <files>
465 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
466 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
467 </files>
468 </api>
469 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
470 <description>SAI Driver API for Cortex-M</description>
471 <files>
472 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
473 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
474 </files>
475 </api>
476 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
477 <description>I2C Driver API for Cortex-M</description>
478 <files>
479 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
480 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
481 </files>
482 </api>
483 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
484 <description>CAN Driver API for Cortex-M</description>
485 <files>
486 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
487 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
488 </files>
489 </api>
490 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
491 <description>Flash Driver API for Cortex-M</description>
492 <files>
493 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
494 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
495 </files>
496 </api>
497 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
498 <description>MCI Driver API for Cortex-M</description>
499 <files>
500 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
501 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
502 </files>
503 </api>
504 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
505 <description>NAND Flash Driver API for Cortex-M</description>
506 <files>
507 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
508 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
509 </files>
510 </api>
511 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
512 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
513 <files>
514 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
515 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
516 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
517 </files>
518 </api>
519 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
520 <description>Ethernet MAC Driver API for Cortex-M</description>
521 <files>
522 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
523 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
524 </files>
525 </api>
526 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
527 <description>Ethernet PHY Driver API for Cortex-M</description>
528 <files>
529 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
530 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
531 </files>
532 </api>
533 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
534 <description>USB Device Driver API for Cortex-M</description>
535 <files>
536 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
537 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
538 </files>
539 </api>
540 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
541 <description>USB Host Driver API for Cortex-M</description>
542 <files>
543 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
544 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
545 </files>
546 </api>
547 </apis>
548
549 <!-- conditions are dependency rules that can apply to a component or an individual file -->
550 <conditions>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]551 <!-- compiler -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]552 <condition id="ARMCC">
553 <require Tcompiler="ARMCC"/>
554 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]555 <condition id="GCC">
556 <require Tcompiler="GCC"/>
557 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]558 <condition id="IAR">
559 <require Tcompiler="IAR"/>
560 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]561 <condition id="ARMCC GCC">
562 <accept Tcompiler="ARMCC"/>
563 <accept Tcompiler="GCC"/>
564 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]565 <condition id="ARMCC GCC IAR">
566 <accept Tcompiler="ARMCC"/>
567 <accept Tcompiler="GCC"/>
568 <accept Tcompiler="IAR"/>
569 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]570
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]571 <!-- ARM architecture -->
572 <condition id="ARMv6-M Device">
573 <description>ARMv6-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]574 <accept Dcore="Cortex-M0"/>
575 <accept Dcore="Cortex-M0+"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]576 <accept Dcore="SC000"/>
577 </condition>
578 <condition id="ARMv7-M Device">
579 <description>ARMv7-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]580 <accept Dcore="Cortex-M3"/>
581 <accept Dcore="Cortex-M4"/>
582 <accept Dcore="Cortex-M7"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]583 <accept Dcore="SC300"/>
584 </condition>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]585 <condition id="ARMv8-M Device">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]586 <description>ARMv8-M architecture based device</description>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]587 <accept Dcore="ARMV8MBL"/>
588 <accept Dcore="ARMV8MML"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]589 <accept Dcore="Cortex-M23"/>
590 <accept Dcore="Cortex-M33"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]591 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]592 <condition id="ARMv8-M TZ Device">
593 <description>ARMv8-M architecture based device with TrustZone</description>
594 <require condition="ARMv8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]595 <require Dtz="TZ"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]596 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]597 <condition id="ARMv6_7-M Device">
598 <description>ARMv6_7-M architecture based device</description>
599 <accept condition="ARMv6-M Device"/>
600 <accept condition="ARMv7-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]601 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]602 <condition id="ARMv6_7_8-M Device">
603 <description>ARMv6_7_8-M architecture based device</description>
604 <accept condition="ARMv6-M Device"/>
605 <accept condition="ARMv7-M Device"/>
606 <accept condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]607 </condition>
608
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]609 <!-- ARM core -->
610 <condition id="CM0">
611 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
612 <accept Dcore="Cortex-M0"/>
613 <accept Dcore="Cortex-M0+"/>
614 <accept Dcore="SC000"/>
615 </condition>
616 <condition id="CM3">
617 <description>Cortex-M3 or SC300 processor based device</description>
618 <accept Dcore="Cortex-M3"/>
619 <accept Dcore="SC300"/>
620 </condition>
621 <condition id="CM4">
622 <description>Cortex-M4 processor based device</description>
623 <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
624 </condition>
625 <condition id="CM4_FP">
626 <description>Cortex-M4 processor based device using Floating Point Unit</description>
627 <require Dcore="Cortex-M4" Dfpu="FPU"/>
628 </condition>
629 <condition id="CM7">
630 <description>Cortex-M7 processor based device</description>
631 <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
632 </condition>
633 <condition id="CM7_FP">
634 <description>Cortex-M7 processor based device using Floating Point Unit</description>
635 <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
636 <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
637 </condition>
638 <condition id="CM7_SP">
639 <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
640 <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
641 </condition>
642 <condition id="CM7_DP">
643 <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
644 <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
645 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]646 <condition id="CM23">
647 <description>Cortex-M23 processor based device</description>
648 <require Dcore="Cortex-M23"/>
649 </condition>
650 <condition id="CM33">
651 <description>Cortex-M33 processor based device</description>
652 <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
653 </condition>
654 <condition id="CM33_DSP">
655 <description>Cortex-M33 processor based device with DSP extension</description>
656 <require Dcore="Cortex-M33" Dfpu="NO_FPU" Ddsp="DSP"/>
657 </condition>
658 <condition id="CM33_FP">
659 <description>Cortex-M33 processor based device using Floating Point Unit</description>
660 <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
661 </condition>
662 <condition id="CM33_SP">
663 <description>Cortex-M33 processor based device using Floating Point Unit (SP)</description>
664 <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="NO_DSP"/>
665 </condition>
666 <condition id="CM33_DSP_SP">
667 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP)</description>
668 <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="DSP"/>
669 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]670 <condition id="ARMv8MBL">
671 <description>ARMv8-M Baseline processor based device</description>
672 <require Dcore="ARMV8MBL"/>
673 </condition>
674 <condition id="ARMv8MML">
675 <description>ARMv8-M Mainline processor based device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]676 <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
677 </condition>
678 <condition id="ARMv8MML_DSP">
679 <description>ARMv8-M Mainline processor based device with DSP extension</description>
680 <require Dcore="ARMV8MML" Dfpu="NO_FPU" Ddsp="DSP"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]681 </condition>
682 <condition id="ARMv8MML_FP">
683 <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
684 <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
685 <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]686 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]687 <condition id="ARMv8MML_SP">
688 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP)</description>
689 <require Dcore="ARMV8MML" Dfpu="SP_FPU"/>
690 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]691 <condition id="ARMv8MML_DSP_SP">
692 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP)</description>
693 <require Dcore="ARMV8MML" Dfpu="SP_FPU" Ddsp="DSP"/>
694 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]695 <condition id="ARMv8MML_DP">
696 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP)</description>
697 <require Dcore="ARMV8MML" Dfpu="DP_FPU"/>
698 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]699 <condition id="ARMv8MML_DSP_DP">
700 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP)</description>
701 <require Dcore="ARMV8MML" Dfpu="DP_FPU" Ddsp="DSP"/>
702 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]703
704 <!-- ARMCC compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]705 <condition id="CM0_ARMCC">
706 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
707 <require condition="CM0"/>
708 <require Tcompiler="ARMCC"/>
709 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]710 <condition id="CM0_LE_ARMCC">
711 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]712 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]713 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]714 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]715 <condition id="CM0_BE_ARMCC">
716 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]717 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]718 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]719 </condition>
720
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]721 <condition id="CM3_ARMCC">
722 <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
723 <require condition="CM3"/>
724 <require Tcompiler="ARMCC"/>
725 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]726 <condition id="CM3_LE_ARMCC">
727 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]728 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]729 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]730 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]731 <condition id="CM3_BE_ARMCC">
732 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]733 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]734 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]735 </condition>
736
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]737 <condition id="CM4_ARMCC">
738 <description>Cortex-M4 processor based device for the ARM Compiler</description>
739 <require condition="CM4"/>
740 <require Tcompiler="ARMCC"/>
741 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]742 <condition id="CM4_LE_ARMCC">
743 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]744 <require condition="CM4_ARMCC"/>
745 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]746 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]747 <condition id="CM4_BE_ARMCC">
748 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]749 <require condition="CM4_ARMCC"/>
750 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]751 </condition>
752
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]753 <condition id="CM4_FP_ARMCC">
754 <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
755 <require condition="CM4_FP"/>
756 <require Tcompiler="ARMCC"/>
757 </condition>
758 <condition id="CM4_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]759 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]760 <require condition="CM4_FP_ARMCC"/>
761 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]762 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]763 <condition id="CM4_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]764 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]765 <require condition="CM4_FP_ARMCC"/>
766 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]767 </condition>
768
769 <!-- XMC 4000 Series devices from Infineon require a special library -->
770 <condition id="CM4_LE_ARMCC_STD">
771 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
772 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
773 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
774 <require Tcompiler="ARMCC"/>
775 </condition>
776 <condition id="CM4_LE_ARMCC_IFX">
777 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
778 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
779 <require Tcompiler="ARMCC"/>
780 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]781 <condition id="CM4_FP_LE_ARMCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]782 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
783 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
784 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
785 <require Tcompiler="ARMCC"/>
786 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]787 <condition id="CM4_FP_LE_ARMCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]788 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
789 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
790 <require Tcompiler="ARMCC"/>
791 </condition>
792
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]793 <condition id="CM7_ARMCC">
794 <description>Cortex-M7 processor based device for the ARM Compiler</description>
795 <require condition="CM7"/>
796 <require Tcompiler="ARMCC"/>
797 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]798 <condition id="CM7_LE_ARMCC">
799 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]800 <require condition="CM7_ARMCC"/>
801 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]802 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]803 <condition id="CM7_BE_ARMCC">
804 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]805 <require condition="CM7_ARMCC"/>
806 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]807 </condition>
808
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]809 <condition id="CM7_FP_ARMCC">
810 <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
811 <require condition="CM7_FP"/>
812 <require Tcompiler="ARMCC"/>
813 </condition>
814 <condition id="CM7_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]815 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]816 <require condition="CM7_FP_ARMCC"/>
817 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]818 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]819 <condition id="CM7_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]820 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]821 <require condition="CM7_FP_ARMCC"/>
822 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]823 </condition>
824
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]825 <condition id="CM7_SP_ARMCC">
826 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
827 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]828 <require Tcompiler="ARMCC"/>
829 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]830 <condition id="CM7_SP_LE_ARMCC">
831 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
832 <require condition="CM7_SP_ARMCC"/>
833 <require Dendian="Little-endian"/>
834 </condition>
835 <condition id="CM7_SP_BE_ARMCC">
836 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
837 <require condition="CM7_SP_ARMCC"/>
838 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]839 </condition>
840
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]841 <condition id="CM7_DP_ARMCC">
842 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
843 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]844 <require Tcompiler="ARMCC"/>
845 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]846 <condition id="CM7_DP_LE_ARMCC">
847 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
848 <require condition="CM7_DP_ARMCC"/>
849 <require Dendian="Little-endian"/>
850 </condition>
851 <condition id="CM7_DP_BE_ARMCC">
852 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
853 <require condition="CM7_DP_ARMCC"/>
854 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]855 </condition>
856
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]857 <condition id="CM23_ARMCC">
858 <description>Cortex-M23 processor based device for the ARM Compiler</description>
859 <require condition="CM23"/>
860 <require Tcompiler="ARMCC"/>
861 </condition>
862 <condition id="CM23_LE_ARMCC">
863 <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
864 <require condition="CM23_ARMCC"/>
865 <require Dendian="Little-endian"/>
866 </condition>
867 <condition id="CM23_BE_ARMCC">
868 <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
869 <require condition="CM23_ARMCC"/>
870 <require Dendian="Big-endian"/>
871 </condition>
872
873 <condition id="CM33_ARMCC">
874 <description>Cortex-M33 processor based device for the ARM Compiler</description>
875 <require condition="CM33"/>
876 <require Tcompiler="ARMCC"/>
877 </condition>
878 <condition id="CM33_LE_ARMCC">
879 <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
880 <require condition="CM33_ARMCC"/>
881 <require Dendian="Little-endian"/>
882 </condition>
883 <condition id="CM33_BE_ARMCC">
884 <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
885 <require condition="CM33_ARMCC"/>
886 <require Dendian="Big-endian"/>
887 </condition>
888
889 <condition id="CM33_DSP_ARMCC">
890 <description>Cortex-M33 processor based device with DSP extension for the ARM Compiler</description>
891 <require condition="CM33_DSP"/>
892 <require Tcompiler="ARMCC"/>
893 </condition>
894 <condition id="CM33_DSP_LE_ARMCC">
895 <description>Cortex-M33 processor based device with DSP extension in little endian mode for the ARM Compiler</description>
896 <require condition="CM33_DSP_ARMCC"/>
897 <require Dendian="Little-endian"/>
898 </condition>
899 <condition id="CM33_DSP_BE_ARMCC">
900 <description>Cortex-M33 processor based device with DSP extension in big endian mode for the ARM Compiler</description>
901 <require condition="CM33_DSP_ARMCC"/>
902 <require Dendian="Big-endian"/>
903 </condition>
904
905 <condition id="CM33_FP_ARMCC">
906 <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
907 <require condition="CM33_FP"/>
908 <require Tcompiler="ARMCC"/>
909 </condition>
910 <condition id="CM33_FP_LE_ARMCC">
911 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
912 <require condition="CM33_FP_ARMCC"/>
913 <require Dendian="Little-endian"/>
914 </condition>
915 <condition id="CM33_FP_BE_ARMCC">
916 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
917 <require condition="CM33_FP_ARMCC"/>
918 <require Dendian="Big-endian"/>
919 </condition>
920
921 <condition id="CM33_SP_ARMCC">
922 <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
923 <require condition="CM33_SP"/>
924 <require Tcompiler="ARMCC"/>
925 </condition>
926 <condition id="CM33_SP_LE_ARMCC">
927 <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
928 <require condition="CM33_SP_ARMCC"/>
929 <require Dendian="Little-endian"/>
930 </condition>
931 <condition id="CM33_SP_BE_ARMCC">
932 <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
933 <require condition="CM33_SP_ARMCC"/>
934 <require Dendian="Big-endian"/>
935 </condition>
936
937 <condition id="CM33_DSP_SP_ARMCC">
938 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
939 <require condition="CM33_DSP_SP"/>
940 <require Tcompiler="ARMCC"/>
941 </condition>
942 <condition id="CM33_DSP_SP_LE_ARMCC">
943 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
944 <require condition="CM33_DSP_SP_ARMCC"/>
945 <require Dendian="Little-endian"/>
946 </condition>
947 <condition id="CM33_DSP_SP_BE_ARMCC">
948 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
949 <require condition="CM33_DSP_SP_ARMCC"/>
950 <require Dendian="Big-endian"/>
951 </condition>
952
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]953 <condition id="ARMv8MBL_ARMCC">
954 <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
955 <require condition="ARMv8MBL"/>
956 <require Tcompiler="ARMCC"/>
957 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]958 <condition id="ARMv8MBL_LE_ARMCC">
959 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]960 <require condition="ARMv8MBL_ARMCC"/>
961 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]962 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]963 <condition id="ARMv8MBL_BE_ARMCC">
964 <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
965 <require condition="ARMv8MBL_ARMCC"/>
966 <require Dendian="Big-endian"/>
967 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]968
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]969 <condition id="ARMv8MML_ARMCC">
970 <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
971 <require condition="ARMv8MML"/>
972 <require Tcompiler="ARMCC"/>
973 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]974 <condition id="ARMv8MML_LE_ARMCC">
975 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]976 <require condition="ARMv8MML_ARMCC"/>
977 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]978 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]979 <condition id="ARMv8MML_BE_ARMCC">
980 <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
981 <require condition="ARMv8MML_ARMCC"/>
982 <require Dendian="Big-endian"/>
983 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]984
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]985 <condition id="ARMv8MML_DSP_ARMCC">
986 <description>ARMv8-M Mainline processor based device with DSP extension for the ARM Compiler</description>
987 <require condition="ARMv8MML_DSP"/>
988 <require Tcompiler="ARMCC"/>
989 </condition>
990 <condition id="ARMv8MML_DSP_LE_ARMCC">
991 <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the ARM Compiler</description>
992 <require condition="ARMv8MML_DSP_ARMCC"/>
993 <require Dendian="Little-endian"/>
994 </condition>
995 <condition id="ARMv8MML_DSP_BE_ARMCC">
996 <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the ARM Compiler</description>
997 <require condition="ARMv8MML_DSP_ARMCC"/>
998 <require Dendian="Big-endian"/>
999 </condition>
1000
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1001 <condition id="ARMv8MML_FP_ARMCC">
1002 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1003 <require condition="ARMv8MML_FP"/>
1004 <require Tcompiler="ARMCC"/>
1005 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1006 <condition id="ARMv8MML_FP_LE_ARMCC">
1007 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1008 <require condition="ARMv8MML_FP_ARMCC"/>
1009 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1010 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1011 <condition id="ARMv8MML_FP_BE_ARMCC">
1012 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1013 <require condition="ARMv8MML_FP_ARMCC"/>
1014 <require Dendian="Big-endian"/>
1015 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1016
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1017 <condition id="ARMv8MML_SP_ARMCC">
1018 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1019 <require condition="ARMv8MML_SP"/>
1020 <require Tcompiler="ARMCC"/>
1021 </condition>
1022 <condition id="ARMv8MML_SP_LE_ARMCC">
1023 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1024 <require condition="ARMv8MML_SP_ARMCC"/>
1025 <require Dendian="Little-endian"/>
1026 </condition>
1027 <condition id="ARMv8MML_SP_BE_ARMCC">
1028 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1029 <require condition="ARMv8MML_SP_ARMCC"/>
1030 <require Dendian="Big-endian"/>
1031 </condition>
1032
1033 <condition id="ARMv8MML_DSP_SP_ARMCC">
1034 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
1035 <require condition="ARMv8MML_DSP_SP"/>
1036 <require Tcompiler="ARMCC"/>
1037 </condition>
1038 <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1039 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1040 <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1041 <require Dendian="Little-endian"/>
1042 </condition>
1043 <condition id="ARMv8MML_DSP_SP_BE_ARMCC">
1044 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1045 <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1046 <require Dendian="Big-endian"/>
1047 </condition>
1048
1049 <condition id="ARMv8MML_DP_ARMCC">
1050 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1051 <require condition="ARMv8MML_DP"/>
1052 <require Tcompiler="ARMCC"/>
1053 </condition>
1054 <condition id="ARMv8MML_DP_LE_ARMCC">
1055 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1056 <require condition="ARMv8MML_DP_ARMCC"/>
1057 <require Dendian="Little-endian"/>
1058 </condition>
1059 <condition id="ARMv8MML_DP_BE_ARMCC">
1060 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1061 <require condition="ARMv8MML_DP_ARMCC"/>
1062 <require Dendian="Big-endian"/>
1063 </condition>
1064
1065 <condition id="ARMv8MML_DSP_DP_ARMCC">
1066 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the ARM Compiler</description>
1067 <require condition="ARMv8MML_DSP_DP"/>
1068 <require Tcompiler="ARMCC"/>
1069 </condition>
1070 <condition id="ARMv8MML_DSP_DP_LE_ARMCC">
1071 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1072 <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1073 <require Dendian="Little-endian"/>
1074 </condition>
1075 <condition id="ARMv8MML_DSP_DP_BE_ARMCC">
1076 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1077 <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1078 <require Dendian="Big-endian"/>
1079 </condition>
1080
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1081 <!-- GCC compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1082 <condition id="CM0_GCC">
1083 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1084 <require condition="CM0"/>
1085 <require Tcompiler="GCC"/>
1086 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1087 <condition id="CM0_LE_GCC">
1088 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1089 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1090 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1091 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1092 <condition id="CM0_BE_GCC">
1093 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1094 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1095 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1096 </condition>
1097
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1098 <condition id="CM3_GCC">
1099 <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1100 <require condition="CM3"/>
1101 <require Tcompiler="GCC"/>
1102 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1103 <condition id="CM3_LE_GCC">
1104 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1105 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1106 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1107 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1108 <condition id="CM3_BE_GCC">
1109 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1110 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1111 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1112 </condition>
1113
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1114 <condition id="CM4_GCC">
1115 <description>Cortex-M4 processor based device for the GCC Compiler</description>
1116 <require condition="CM4"/>
1117 <require Tcompiler="GCC"/>
1118 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1119 <condition id="CM4_LE_GCC">
1120 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1121 <require condition="CM4_GCC"/>
1122 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1123 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1124 <condition id="CM4_BE_GCC">
1125 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1126 <require condition="CM4_GCC"/>
1127 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1128 </condition>
1129
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1130 <condition id="CM4_FP_GCC">
1131 <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1132 <require condition="CM4_FP"/>
1133 <require Tcompiler="GCC"/>
1134 </condition>
1135 <condition id="CM4_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1136 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1137 <require condition="CM4_FP_GCC"/>
1138 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1139 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1140 <condition id="CM4_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1141 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1142 <require condition="CM4_FP_GCC"/>
1143 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1144 </condition>
1145
1146 <!-- XMC 4000 Series devices from Infineon require a special library -->
1147 <condition id="CM4_LE_GCC_STD">
1148 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1149 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1150 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1151 <require Tcompiler="GCC"/>
1152 </condition>
1153 <condition id="CM4_LE_GCC_IFX">
1154 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1155 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1156 <require Tcompiler="GCC"/>
1157 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1158 <condition id="CM4_FP_LE_GCC_STD">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1159 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1160 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1161 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1162 <require Tcompiler="GCC"/>
1163 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1164 <condition id="CM4_FP_LE_GCC_IFX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1165 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1166 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1167 <require Tcompiler="GCC"/>
1168 </condition>
1169
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1170 <condition id="CM7_GCC">
1171 <description>Cortex-M7 processor based device for the GCC Compiler</description>
1172 <require condition="CM7"/>
1173 <require Tcompiler="GCC"/>
1174 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1175 <condition id="CM7_LE_GCC">
1176 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1177 <require condition="CM7_GCC"/>
1178 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1179 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1180 <condition id="CM7_BE_GCC">
1181 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1182 <require condition="CM7_GCC"/>
1183 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1184 </condition>
1185
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1186 <condition id="CM7_FP_GCC">
1187 <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1188 <require condition="CM7_FP"/>
1189 <require Tcompiler="GCC"/>
1190 </condition>
1191 <condition id="CM7_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1192 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1193 <require condition="CM7_FP_GCC"/>
1194 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1195 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1196 <condition id="CM7_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1197 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1198 <require condition="CM7_FP_GCC"/>
1199 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1200 </condition>
1201
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1202 <condition id="CM7_SP_GCC">
1203 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1204 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1205 <require Tcompiler="GCC"/>
1206 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1207 <condition id="CM7_SP_LE_GCC">
1208 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1209 <require condition="CM7_SP_GCC"/>
1210 <require Dendian="Little-endian"/>
1211 </condition>
1212 <condition id="CM7_SP_BE_GCC">
1213 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1214 <require condition="CM7_SP_GCC"/>
1215 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1216 </condition>
1217
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1218 <condition id="CM7_DP_GCC">
1219 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1220 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1221 <require Tcompiler="GCC"/>
1222 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1223 <condition id="CM7_DP_LE_GCC">
1224 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1225 <require condition="CM7_DP_GCC"/>
1226 <require Dendian="Little-endian"/>
1227 </condition>
1228 <condition id="CM7_DP_BE_GCC">
1229 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1230 <require condition="CM7_DP_GCC"/>
1231 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1232 </condition>
1233
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1234 <condition id="CM23_GCC">
1235 <description>Cortex-M23 processor based device for the GCC Compiler</description>
1236 <require condition="CM23"/>
1237 <require Tcompiler="GCC"/>
1238 </condition>
1239 <condition id="CM23_LE_GCC">
1240 <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1241 <require condition="CM23_GCC"/>
1242 <require Dendian="Little-endian"/>
1243 </condition>
1244 <condition id="CM23_BE_GCC">
1245 <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1246 <require condition="CM23_GCC"/>
1247 <require Dendian="Big-endian"/>
1248 </condition>
1249
1250 <condition id="CM33_GCC">
1251 <description>Cortex-M33 processor based device for the GCC Compiler</description>
1252 <require condition="CM33"/>
1253 <require Tcompiler="GCC"/>
1254 </condition>
1255 <condition id="CM33_LE_GCC">
1256 <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1257 <require condition="CM33_GCC"/>
1258 <require Dendian="Little-endian"/>
1259 </condition>
1260 <condition id="CM33_BE_GCC">
1261 <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1262 <require condition="CM33_GCC"/>
1263 <require Dendian="Big-endian"/>
1264 </condition>
1265
1266 <condition id="CM33_DSP_GCC">
1267 <description>Cortex-M33 processor based device with DSP extension for the GCC Compiler</description>
1268 <require condition="CM33_DSP"/>
1269 <require Tcompiler="GCC"/>
1270 </condition>
1271 <condition id="CM33_DSP_LE_GCC">
1272 <description>Cortex-M33 processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1273 <require condition="CM33_DSP_GCC"/>
1274 <require Dendian="Little-endian"/>
1275 </condition>
1276 <condition id="CM33_DSP_BE_GCC">
1277 <description>Cortex-M33 processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1278 <require condition="CM33_DSP_GCC"/>
1279 <require Dendian="Big-endian"/>
1280 </condition>
1281
1282 <condition id="CM33_FP_GCC">
1283 <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1284 <require condition="CM33_FP"/>
1285 <require Tcompiler="GCC"/>
1286 </condition>
1287 <condition id="CM33_FP_LE_GCC">
1288 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1289 <require condition="CM33_FP_GCC"/>
1290 <require Dendian="Little-endian"/>
1291 </condition>
1292 <condition id="CM33_FP_BE_GCC">
1293 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1294 <require condition="CM33_FP_GCC"/>
1295 <require Dendian="Big-endian"/>
1296 </condition>
1297
1298 <condition id="CM33_SP_GCC">
1299 <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1300 <require condition="CM33_SP"/>
1301 <require Tcompiler="GCC"/>
1302 </condition>
1303 <condition id="CM33_SP_LE_GCC">
1304 <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1305 <require condition="CM33_SP_GCC"/>
1306 <require Dendian="Little-endian"/>
1307 </condition>
1308 <condition id="CM33_SP_BE_GCC">
1309 <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1310 <require condition="CM33_SP_GCC"/>
1311 <require Dendian="Big-endian"/>
1312 </condition>
1313
1314 <condition id="CM33_DSP_SP_GCC">
1315 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1316 <require condition="CM33_DSP_SP"/>
1317 <require Tcompiler="GCC"/>
1318 </condition>
1319 <condition id="CM33_DSP_SP_LE_GCC">
1320 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1321 <require condition="CM33_DSP_SP_GCC"/>
1322 <require Dendian="Little-endian"/>
1323 </condition>
1324 <condition id="CM33_DSP_SP_BE_GCC">
1325 <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1326 <require condition="CM33_DSP_SP_GCC"/>
1327 <require Dendian="Big-endian"/>
1328 </condition>
1329
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1330 <condition id="ARMv8MBL_GCC">
1331 <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1332 <require condition="ARMv8MBL"/>
1333 <require Tcompiler="GCC"/>
1334 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1335 <condition id="ARMv8MBL_LE_GCC">
1336 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1337 <require condition="ARMv8MBL_GCC"/>
1338 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1339 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1340 <condition id="ARMv8MBL_BE_GCC">
1341 <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1342 <require condition="ARMv8MBL_GCC"/>
1343 <require Dendian="Big-endian"/>
1344 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1345
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1346 <condition id="ARMv8MML_GCC">
1347 <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1348 <require condition="ARMv8MML"/>
1349 <require Tcompiler="GCC"/>
1350 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1351 <condition id="ARMv8MML_LE_GCC">
1352 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1353 <require condition="ARMv8MML_GCC"/>
1354 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1355 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1356 <condition id="ARMv8MML_BE_GCC">
1357 <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1358 <require condition="ARMv8MML_GCC"/>
1359 <require Dendian="Big-endian"/>
1360 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1361
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1362 <condition id="ARMv8MML_DSP_GCC">
1363 <description>ARMv8-M Mainline processor based device with DSP extension for the GCC Compiler</description>
1364 <require condition="ARMv8MML_DSP"/>
1365 <require Tcompiler="GCC"/>
1366 </condition>
1367 <condition id="ARMv8MML_DSP_LE_GCC">
1368 <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1369 <require condition="ARMv8MML_DSP_GCC"/>
1370 <require Dendian="Little-endian"/>
1371 </condition>
1372 <condition id="ARMv8MML_DSP_BE_GCC">
1373 <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1374 <require condition="ARMv8MML_DSP_GCC"/>
1375 <require Dendian="Big-endian"/>
1376 </condition>
1377
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1378 <condition id="ARMv8MML_FP_GCC">
1379 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1380 <require condition="ARMv8MML_FP"/>
1381 <require Tcompiler="GCC"/>
1382 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1383 <condition id="ARMv8MML_FP_LE_GCC">
1384 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1385 <require condition="ARMv8MML_FP_GCC"/>
1386 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1387 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1388 <condition id="ARMv8MML_FP_BE_GCC">
1389 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1390 <require condition="ARMv8MML_FP_GCC"/>
1391 <require Dendian="Big-endian"/>
1392 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1393
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1394 <condition id="ARMv8MML_SP_GCC">
1395 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1396 <require condition="ARMv8MML_SP"/>
1397 <require Tcompiler="GCC"/>
1398 </condition>
1399 <condition id="ARMv8MML_SP_LE_GCC">
1400 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1401 <require condition="ARMv8MML_SP_GCC"/>
1402 <require Dendian="Little-endian"/>
1403 </condition>
1404 <condition id="ARMv8MML_SP_BE_GCC">
1405 <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1406 <require condition="ARMv8MML_SP_GCC"/>
1407 <require Dendian="Big-endian"/>
1408 </condition>
1409
1410 <condition id="ARMv8MML_DSP_SP_GCC">
1411 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1412 <require condition="ARMv8MML_DSP_SP"/>
1413 <require Tcompiler="GCC"/>
1414 </condition>
1415 <condition id="ARMv8MML_DSP_SP_LE_GCC">
1416 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1417 <require condition="ARMv8MML_DSP_SP_GCC"/>
1418 <require Dendian="Little-endian"/>
1419 </condition>
1420 <condition id="ARMv8MML_DSP_SP_BE_GCC">
1421 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1422 <require condition="ARMv8MML_DSP_SP_GCC"/>
1423 <require Dendian="Big-endian"/>
1424 </condition>
1425
1426 <condition id="ARMv8MML_DP_GCC">
1427 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1428 <require condition="ARMv8MML_DP"/>
1429 <require Tcompiler="GCC"/>
1430 </condition>
1431 <condition id="ARMv8MML_DP_LE_GCC">
1432 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1433 <require condition="ARMv8MML_DP_GCC"/>
1434 <require Dendian="Little-endian"/>
1435 </condition>
1436 <condition id="ARMv8MML_DP_BE_GCC">
1437 <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1438 <require condition="ARMv8MML_DP_GCC"/>
1439 <require Dendian="Big-endian"/>
1440 </condition>
1441
1442 <condition id="ARMv8MML_DSP_DP_GCC">
1443 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the GCC Compiler</description>
1444 <require condition="ARMv8MML_DSP_DP"/>
1445 <require Tcompiler="GCC"/>
1446 </condition>
1447 <condition id="ARMv8MML_DSP_DP_LE_GCC">
1448 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1449 <require condition="ARMv8MML_DSP_DP_GCC"/>
1450 <require Dendian="Little-endian"/>
1451 </condition>
1452 <condition id="ARMv8MML_DSP_DP_BE_GCC">
1453 <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1454 <require condition="ARMv8MML_DSP_DP_GCC"/>
1455 <require Dendian="Big-endian"/>
1456 </condition>
1457
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1458 <!-- IAR compiler -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1459 <condition id="CM0_IAR">
1460 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1461 <require condition="CM0"/>
1462 <require Tcompiler="IAR"/>
1463 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1464 <condition id="CM0_LE_IAR">
1465 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1466 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1467 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1468 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1469 <condition id="CM0_BE_IAR">
1470 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1471 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1472 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1473 </condition>
1474
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1475 <condition id="CM3_IAR">
1476 <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1477 <require condition="CM3"/>
1478 <require Tcompiler="IAR"/>
1479 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1480 <condition id="CM3_LE_IAR">
1481 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1482 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1483 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1484 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1485 <condition id="CM3_BE_IAR">
1486 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1487 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1488 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1489 </condition>
1490
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1491 <condition id="CM4_IAR">
1492 <description>Cortex-M4 processor based device for the IAR Compiler</description>
1493 <require condition="CM4"/>
1494 <require Tcompiler="IAR"/>
1495 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1496 <condition id="CM4_LE_IAR">
1497 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1498 <require condition="CM4_IAR"/>
1499 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1500 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1501 <condition id="CM4_BE_IAR">
1502 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1503 <require condition="CM4_IAR"/>
1504 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1505 </condition>
1506
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1507 <condition id="CM4_FP_IAR">
1508 <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1509 <require condition="CM4_FP"/>
1510 <require Tcompiler="IAR"/>
1511 </condition>
1512 <condition id="CM4_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1513 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1514 <require condition="CM4_FP_IAR"/>
1515 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1516 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1517 <condition id="CM4_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1518 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1519 <require condition="CM4_FP_IAR"/>
1520 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1521 </condition>
1522
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1523 <condition id="CM7_IAR">
1524 <description>Cortex-M7 processor based device for the IAR Compiler</description>
1525 <require condition="CM7"/>
1526 <require Tcompiler="IAR"/>
1527 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1528 <condition id="CM7_LE_IAR">
1529 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1530 <require condition="CM7_IAR"/>
1531 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1532 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1533 <condition id="CM7_BE_IAR">
1534 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1535 <require condition="CM7_IAR"/>
1536 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1537 </condition>
1538
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1539 <condition id="CM7_FP_IAR">
1540 <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1541 <require condition="CM7_FP"/>
1542 <require Tcompiler="IAR"/>
1543 </condition>
1544 <condition id="CM7_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1545 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1546 <require condition="CM7_FP_IAR"/>
1547 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1548 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1549 <condition id="CM7_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1550 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1551 <require condition="CM7_FP_IAR"/>
1552 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1553 </condition>
1554
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1555 <condition id="CM7_SP_IAR">
1556 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1557 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1558 <require Tcompiler="IAR"/>
1559 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1560 <condition id="CM7_SP_LE_IAR">
1561 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1562 <require condition="CM7_SP_IAR"/>
1563 <require Dendian="Little-endian"/>
1564 </condition>
1565 <condition id="CM7_SP_BE_IAR">
1566 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1567 <require condition="CM7_SP_IAR"/>
1568 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1569 </condition>
1570
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1571 <condition id="CM7_DP_IAR">
1572 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1573 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1574 <require Tcompiler="IAR"/>
1575 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1576 <condition id="CM7_DP_LE_IAR">
1577 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1578 <require condition="CM7_DP_IAR"/>
1579 <require Dendian="Little-endian"/>
1580 </condition>
1581 <condition id="CM7_DP_BE_IAR">
1582 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1583 <require condition="CM7_DP_IAR"/>
1584 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1585 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1586
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1587 <!-- conditions selecting single devices and CMSIS Core -->
1588 <!-- used for component startup, GCC version is used for C-Startup -->
1589 <condition id="ARMCM0 CMSIS">
1590 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1591 <require Dvendor="ARM:82" Dname="ARMCM0"/>
1592 <require Cclass="CMSIS" Cgroup="CORE"/>
1593 </condition>
1594 <condition id="ARMCM0 CMSIS GCC">
1595 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1596 <require condition="ARMCM0 CMSIS"/>
1597 <require condition="GCC"/>
1598 </condition>
1599
1600 <condition id="ARMCM0+ CMSIS">
1601 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1602 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1603 <require Cclass="CMSIS" Cgroup="CORE"/>
1604 </condition>
1605 <condition id="ARMCM0+ CMSIS GCC">
1606 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1607 <require condition="ARMCM0+ CMSIS"/>
1608 <require condition="GCC"/>
1609 </condition>
1610
1611 <condition id="ARMCM3 CMSIS">
1612 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1613 <require Dvendor="ARM:82" Dname="ARMCM3"/>
1614 <require Cclass="CMSIS" Cgroup="CORE"/>
1615 </condition>
1616 <condition id="ARMCM3 CMSIS GCC">
1617 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1618 <require condition="ARMCM3 CMSIS"/>
1619 <require condition="GCC"/>
1620 </condition>
1621
1622 <condition id="ARMCM4 CMSIS">
1623 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1624 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1625 <require Cclass="CMSIS" Cgroup="CORE"/>
1626 </condition>
1627 <condition id="ARMCM4 CMSIS GCC">
1628 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1629 <require condition="ARMCM4 CMSIS"/>
1630 <require condition="GCC"/>
1631 </condition>
1632
1633 <condition id="ARMCM7 CMSIS">
1634 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1635 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1636 <require Cclass="CMSIS" Cgroup="CORE"/>
1637 </condition>
1638 <condition id="ARMCM7 CMSIS GCC">
1639 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1640 <require condition="ARMCM7 CMSIS"/>
1641 <require condition="GCC"/>
1642 </condition>
1643
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1644 <condition id="ARMCM23 CMSIS">
1645 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1646 <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1647 <require Cclass="CMSIS" Cgroup="CORE"/>
1648 </condition>
1649 <condition id="ARMCM23 CMSIS GCC">
1650 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1651 <require condition="ARMCM23 CMSIS"/>
1652 <require condition="GCC"/>
1653 </condition>
1654
1655 <condition id="ARMCM33 CMSIS">
1656 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1657 <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1658 <require Cclass="CMSIS" Cgroup="CORE"/>
1659 </condition>
1660 <condition id="ARMCM33 CMSIS GCC">
1661 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1662 <require condition="ARMCM33 CMSIS"/>
1663 <require condition="GCC"/>
1664 </condition>
1665
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1666 <condition id="ARMSC000 CMSIS">
1667 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1668 <require Dvendor="ARM:82" Dname="ARMSC000"/>
1669 <require Cclass="CMSIS" Cgroup="CORE"/>
1670 </condition>
1671 <condition id="ARMSC000 CMSIS GCC">
1672 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1673 <require condition="ARMSC000 CMSIS"/>
1674 <require condition="GCC"/>
1675 </condition>
1676
1677 <condition id="ARMSC300 CMSIS">
1678 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1679 <require Dvendor="ARM:82" Dname="ARMSC300"/>
1680 <require Cclass="CMSIS" Cgroup="CORE"/>
1681 </condition>
1682 <condition id="ARMSC300 CMSIS GCC">
1683 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1684 <require condition="ARMSC300 CMSIS"/>
1685 <require condition="GCC"/>
1686 </condition>
1687
1688 <condition id="ARMv8MBL CMSIS">
1689 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1690 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1691 <require Cclass="CMSIS" Cgroup="CORE"/>
1692 </condition>
1693 <condition id="ARMv8MBL CMSIS GCC">
1694 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1695 <require condition="ARMv8MBL CMSIS"/>
1696 <require condition="GCC"/>
1697 </condition>
1698
1699 <condition id="ARMv8MML CMSIS">
1700 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1701 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1702 <require Cclass="CMSIS" Cgroup="CORE"/>
1703 </condition>
1704 <condition id="ARMv8MML CMSIS GCC">
1705 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1706 <require condition="ARMv8MML CMSIS"/>
1707 <require condition="GCC"/>
1708 </condition>
1709
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1710 <!-- CMSIS DSP -->
1711 <condition id="CMSIS DSP">
1712 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1713 <require condition="ARMv6_7-M Device"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1714 <require Cclass="CMSIS" Cgroup="CORE"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1715 <require condition="ARMCC GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1716 </condition>
1717
1718 <!-- RTOS RTX -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1719 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1720 <description>Components required for RTOS RTX</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1721 <require condition="ARMv6_7-M Device"/>
1722 <require condition="ARMCC GCC IAR"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1723 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1724 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1725 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1726 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1727 <description>Components required for RTOS RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1728 <require condition="ARMv6_7_8-M Device"/>
1729 <require condition="ARMCC GCC"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1730 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1731 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1732 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1733 <description>Components required for RTOS2 RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1734 <require condition="ARMv6_7_8-M Device"/>
1735 <require condition="ARMCC GCC"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1736 <require Cclass="CMSIS" Cgroup="CORE"/>
1737 <require Cclass="Device" Cgroup="Startup"/>
1738 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1739 <condition id="RTOS2 RTX5 NS">
1740 <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1741 <require condition="ARMv8-M TZ Device"/>
1742 <require condition="ARMCC GCC"/>
1743 <require Cclass="CMSIS" Cgroup="CORE"/>
1744 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1745 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1746
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1747 </conditions>
1748
1749 <components>
1750 <!-- CMSIS-Core component -->
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1751 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="ARMv6_7_8-M Device" >
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1752 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1753 <files>
1754 <!-- CPU independent -->
1755 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1756 <file category="include" name="CMSIS/Include/"/>
Robert Rostoharb2e07162016-11-04 10:43:56 +0100[diff] [blame]1757 <file category="header" name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]1758 <!-- Code template -->
Robert Rostohar0e71e882016-11-16 19:03:44 +0100[diff] [blame]1759 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c" version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
Robert Rostohar71f4dcf2016-11-16 19:06:01 +0100[diff] [blame^]1760 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1761 </files>
1762 </component>
1763
1764 <!-- CMSIS-Startup components -->
1765 <!-- Cortex-M0 -->
1766 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1767 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1768 <files>
1769 <!-- include folder / device header file -->
1770 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1771 <!-- startup / system file -->
1772 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1773 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1774 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1775 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1776 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1777 </files>
1778 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1779 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1780 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1781 <files>
1782 <!-- include folder / device header file -->
1783 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1784 <!-- startup / system file -->
1785 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1786 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1787 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1788 </files>
1789 </component>
1790
1791 <!-- Cortex-M0+ -->
1792 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1793 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1794 <files>
1795 <!-- include folder / device header file -->
1796 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1797 <!-- startup / system file -->
1798 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1799 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1800 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1801 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1802 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1803 </files>
1804 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1805 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1806 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1807 <files>
1808 <!-- include folder / device header file -->
1809 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1810 <!-- startup / system file -->
1811 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1812 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1813 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1814 </files>
1815 </component>
1816
1817 <!-- Cortex-M3 -->
1818 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1819 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1820 <files>
1821 <!-- include folder / device header file -->
1822 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1823 <!-- startup / system file -->
1824 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1825 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1826 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1827 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1828 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1829 </files>
1830 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1831 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1832 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1833 <files>
1834 <!-- include folder / device header file -->
1835 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1836 <!-- startup / system file -->
1837 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1838 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1839 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1840 </files>
1841 </component>
1842
1843 <!-- Cortex-M4 -->
1844 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1845 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1846 <files>
1847 <!-- include folder / device header file -->
1848 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1849 <!-- startup / system file -->
1850 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1851 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1852 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1853 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1854 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1855 </files>
1856 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1857 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1858 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1859 <files>
1860 <!-- include folder / device header file -->
1861 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1862 <!-- startup / system file -->
1863 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1864 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1865 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1866 </files>
1867 </component>
1868
1869 <!-- Cortex-M7 -->
1870 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1871 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1872 <files>
1873 <!-- include folder / device header file -->
1874 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1875 <!-- startup / system file -->
1876 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1877 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1878 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1879 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1880 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1881 </files>
1882 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1883 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1884 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1885 <files>
1886 <!-- include folder / device header file -->
1887 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1888 <!-- startup / system file -->
1889 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1890 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1891 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1892 </files>
1893 </component>
1894
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1895 <!-- Cortex-M23 -->
1896 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS">
1897 <description>System and Startup for Generic ARM Cortex-M23 device</description>
1898 <files>
1899 <!-- include folder / device header file -->
1900 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
1901 <!-- startup / system file -->
1902 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1903 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1904 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1905 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1906 <!-- SAU configuration -->
1907 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1908 </files>
1909 </component>
1910 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1911 <description>System and Startup for Generic ARM Cortex-M23 device</description>
1912 <files>
1913 <!-- include folder / device header file -->
1914 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
1915 <!-- startup / system file -->
1916 <file category="sourceC" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1917 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1918 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
1919 <!-- SAU configuration -->
1920 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1921 </files>
1922 </component>
1923
1924 <!-- Cortex-M33 -->
1925 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCM33 CMSIS">
1926 <description>System and Startup for Generic ARM Cortex-M33 device</description>
1927 <files>
1928 <!-- include folder / device header file -->
1929 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
1930 <!-- startup / system file -->
1931 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
1932 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
1933 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1934 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1935 <!-- SAU configuration -->
1936 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1937 </files>
1938 </component>
1939 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM33 CMSIS GCC">
1940 <description>System and Startup for Generic ARM Cortex-M33 device</description>
1941 <files>
1942 <!-- include folder / device header file -->
1943 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
1944 <!-- startup / system file -->
1945 <file category="sourceC" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
1946 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1947 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
1948 <!-- SAU configuration -->
1949 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1950 </files>
1951 </component>
1952
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1953 <!-- Cortex-SC000 -->
1954 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1955 <description>System and Startup for Generic ARM SC000 device</description>
1956 <files>
1957 <!-- include folder / device header file -->
1958 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1959 <!-- startup / system file -->
1960 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1961 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1962 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1963 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1964 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1965 </files>
1966 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1967 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1968 <description>System and Startup for Generic ARM SC000 device</description>
1969 <files>
1970 <!-- include folder / device header file -->
1971 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1972 <!-- startup / system file -->
1973 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1974 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1975 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1976 </files>
1977 </component>
1978
1979 <!-- Cortex-SC300 -->
1980 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1981 <description>System and Startup for Generic ARM SC300 device</description>
1982 <files>
1983 <!-- include folder / device header file -->
1984 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1985 <!-- startup / system file -->
1986 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1987 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1988 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1989 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1990 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1991 </files>
1992 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1993 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1994 <description>System and Startup for Generic ARM SC300 device</description>
1995 <files>
1996 <!-- include folder / device header file -->
1997 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1998 <!-- startup / system file -->
1999 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2000 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2001 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2002 </files>
2003 </component>
2004
2005 <!-- ARMv8MBL -->
2006 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2007 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2008 <files>
2009 <!-- include folder / device header file -->
2010 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2011 <!-- startup / system file -->
2012 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2013 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2014 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2015 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2016 <!-- SAU configuration -->
2017 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2018 </files>
2019 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2020 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2021 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2022 <files>
2023 <!-- include folder / device header file -->
2024 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2025 <!-- startup / system file -->
2026 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2027 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2028 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2029 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2030 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2031 </files>
2032 </component>
2033
2034 <!-- ARMv8MML -->
2035 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
2036 <description>System and Startup for Generic ARM ARMv8MML device</description>
2037 <files>
2038 <!-- include folder / device header file -->
2039 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
2040 <!-- startup / system file -->
2041 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2042 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2043 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2044 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2045 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2046 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2047 </files>
2048 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2049 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2050 <description>System and Startup for Generic ARM ARMv8MML device</description>
2051 <files>
2052 <!-- include folder / device header file -->
2053 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
2054 <!-- startup / system file -->
2055 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2056 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2057 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2058 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2059 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2060 </files>
2061 </component>
2062
2063
2064 <!-- CMSIS-DSP component -->
2065 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
2066 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2067 <files>
2068 <!-- CPU independent -->
2069 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2070 <file category="header" name="CMSIS/Include/arm_math.h"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2071
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2072 <!-- CPU and Compiler dependent -->
2073 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2074 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2075 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2076 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2077 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2078 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2079 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2080 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2081 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2082 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2083 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2084 <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2085 <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2086 <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2087 <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2088<!--
2089 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2090 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2091 <file category="library" condition="CM33_DSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2092 <file category="library" condition="CM33_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2093 <file category="library" condition="CM33_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2094 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2095 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2096 <file category="library" condition="ARMv8MML_DSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2097 <file category="library" condition="ARMv8MML_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2098 <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2099-->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2100 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2101 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2102 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2103 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2104 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2105 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2106 <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2107 <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2108<!--
2109 <file category="library" condition="CM23_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2110 <file category="library" condition="CM33_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2111 <file category="library" condition="CM33_DSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2112 <file category="library" condition="CM33_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2113 <file category="library" condition="CM33_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2114 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2115 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2116 <file category="library" condition="ARMv8MML_DSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2117 <file category="library" condition="ARMv8MML_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2118 <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2119-->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2120 </files>
2121 </component>
2122
2123 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2124 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2125 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2126 <RTE_Components_h>
2127 <!-- the following content goes into file 'RTE_Components.h' -->
2128 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2129 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2130 </RTE_Components_h>
2131 <files>
2132 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]2133 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2134 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2135 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2136
2137 <!-- RTX templates -->
2138 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2139 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2140 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2141 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2142 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2143 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2144 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2145 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2146 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2147 <!-- tool-chain specific template file -->
2148 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2149 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2150 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2151
2152 <!-- CPU and Compiler dependent -->
2153 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2154 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2155 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2156 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2157 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2158 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2159 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2160 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2161 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2162 <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2163 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2164 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2165 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2166 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2167 <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2168 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2169 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2170 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2171 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2172 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2173 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2174 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2175 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2176 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2177 <file category="library" condition="CM4_FP_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2178 <file category="library" condition="CM4_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2179 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2180 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2181 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2182 <file category="library" condition="CM7_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2183 <!-- IAR -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2184 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2185 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2186 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2187 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2188 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2189 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2190 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2191 <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2192 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2193 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2194 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2195 <file category="library" condition="CM7_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2196 </files>
2197 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2198
2199 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostoharbecc1a62016-11-16 18:55:33 +0100[diff] [blame]2200 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.1" Capiversion="1.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2201 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2202 <RTE_Components_h>
2203 <!-- the following content goes into file 'RTE_Components.h' -->
2204 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2205 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
2206 </RTE_Components_h>
2207 <files>
2208 <!-- RTX header file -->
2209 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2210 <!-- RTX compatibility module for API V1 -->
2211 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2212 </files>
2213 </component>
2214
2215 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostoharbecc1a62016-11-16 18:55:33 +0100[diff] [blame]2216 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.0.1" Capiversion="2.0" condition="RTOS2 RTX5">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2217 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2218 <RTE_Components_h>
2219 <!-- the following content goes into file 'RTE_Components.h' -->
2220 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2221 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2222 </RTE_Components_h>
2223 <files>
2224 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2225 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2226
2227 <!-- RTX header files -->
Robert Rostohareefdc5a2016-07-05 07:25:38 +0200[diff] [blame]2228 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2229 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2230
2231 <!-- RTX configuration -->
2232 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2233
2234 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2235 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2236 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2237 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2238 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2239 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2240 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2241 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2242 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2243 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2244
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2245 <!-- RTX libraries (CPU and Compiler dependent) -->
2246 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2247 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
2248 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2249 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2250 <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
2251 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2252 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2253 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2254 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2255 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2256 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2257 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2258 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
2259 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2260 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2261 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2262 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2263 <file category="library" condition="CM4_FP_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2264 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2265 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2266 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2267 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2268 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2269 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2270 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2271 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2272 </files>
2273 </component>
Robert Rostoharbecc1a62016-11-16 18:55:33 +0100[diff] [blame]2274 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.0.1" Capiversion="2.0" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2275 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2276 <RTE_Components_h>
2277 <!-- the following content goes into file 'RTE_Components.h' -->
2278 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2279 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2280 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2281 </RTE_Components_h>
2282 <files>
2283 <!-- RTX documentation -->
2284 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2285
2286 <!-- RTX header files -->
2287 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2288 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2289
2290 <!-- RTX configuration -->
2291 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2292
2293 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2294 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2295 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2296 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2297 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2298 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2299 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2300 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2301 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2302 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2303
2304 <!-- RTX libraries (CPU and Compiler dependent) -->
2305 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2306 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2307 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2308 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2309 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2310 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2311 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2312 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2313 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2314 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2315 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2316 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2317 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2318 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2319 </files>
2320 </component>
Robert Rostoharbecc1a62016-11-16 18:55:33 +0100[diff] [blame]2321 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.0.1" Capiversion="2.0" condition="RTOS2 RTX5">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2322 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2323 <RTE_Components_h>
2324 <!-- the following content goes into file 'RTE_Components.h' -->
2325 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2326 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2327 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2328 </RTE_Components_h>
2329 <files>
2330 <!-- RTX documentation -->
2331 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2332
2333 <!-- RTX header files -->
2334 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2335 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2336
2337 <!-- RTX configuration -->
2338 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2339
2340 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2341 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2342 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2343 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2344 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2345 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2346 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2347 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2348 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2349 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2350
2351 <!-- RTX sources (core) -->
2352 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2353 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2354 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2355 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2356 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2357 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2358 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2359 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2360 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2361 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2362 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2363 <!-- RTX sources (handlers ARMCC) -->
2364 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
2365 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
2366 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
2367 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
2368 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
2369 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2370 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
2371 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
2372 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2373 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
2374 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
2375 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
2376 <!-- RTX sources (handlers GCC) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2377 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S" condition="CM0_GCC"/>
2378 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM3_GCC"/>
2379 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM4_GCC"/>
2380 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM4_FP_GCC"/>
2381 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM7_GCC"/>
2382 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM7_FP_GCC"/>
2383 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
2384 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
2385 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2386 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
2387 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
2388 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2389 </files>
2390 </component>
Robert Rostoharbecc1a62016-11-16 18:55:33 +0100[diff] [blame]2391 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.0.1" Capiversion="2.0" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2392 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2393 <RTE_Components_h>
2394 <!-- the following content goes into file 'RTE_Components.h' -->
2395 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2396 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2397 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2398 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2399 </RTE_Components_h>
2400 <files>
2401 <!-- RTX documentation -->
2402 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2403
2404 <!-- RTX header files -->
2405 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2406 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2407
2408 <!-- RTX configuration -->
2409 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2410
2411 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2412 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2413 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2414 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2415 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2416 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2417 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2418 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2419 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.0" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2420 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2421
2422 <!-- RTX sources (core) -->
2423 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2424 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2425 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2426 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2427 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2428 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2429 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2430 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2431 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2432 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2433 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2434 <!-- RTX sources (ARMCC handlers) -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2435 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
2436 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
2437 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2438 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
2439 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
2440 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
2441 <!-- RTX sources (GCC handlers) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2442 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="CM23_GCC"/>
2443 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="CM33_GCC"/>
2444 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2445 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="ARMv8MBL_GCC"/>
2446 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="ARMv8MML_GCC"/>
2447 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2448 </files>
2449 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2450
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2451 </components>
2452
2453 <boards>
2454 <board name="uVision Simulator" vendor="Keil">
2455 <description>uVision Simulator</description>
2456 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2457 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2458 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2459 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2460 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2461 </board>
2462 </boards>
2463
2464 <examples>
2465 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2466 <description>DSP_Lib Class Marks example</description>
2467 <board name="uVision Simulator" vendor="Keil"/>
2468 <project>
2469 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2470 </project>
2471 <attributes>
2472 <component Cclass="CMSIS" Cgroup="CORE"/>
2473 <component Cclass="CMSIS" Cgroup="DSP"/>
2474 <component Cclass="Device" Cgroup="Startup"/>
2475 <category>Getting Started</category>
2476 </attributes>
2477 </example>
2478
2479 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2480 <description>DSP_Lib Convolution example</description>
2481 <board name="uVision Simulator" vendor="Keil"/>
2482 <project>
2483 <environment name="uv" load="arm_convolution_example.uvprojx"/>
2484 </project>
2485 <attributes>
2486 <component Cclass="CMSIS" Cgroup="CORE"/>
2487 <component Cclass="CMSIS" Cgroup="DSP"/>
2488 <component Cclass="Device" Cgroup="Startup"/>
2489 <category>Getting Started</category>
2490 </attributes>
2491 </example>
2492
2493 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2494 <description>DSP_Lib Dotproduct example</description>
2495 <board name="uVision Simulator" vendor="Keil"/>
2496 <project>
2497 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2498 </project>
2499 <attributes>
2500 <component Cclass="CMSIS" Cgroup="CORE"/>
2501 <component Cclass="CMSIS" Cgroup="DSP"/>
2502 <component Cclass="Device" Cgroup="Startup"/>
2503 <category>Getting Started</category>
2504 </attributes>
2505 </example>
2506
2507 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2508 <description>DSP_Lib FFT Bin example</description>
2509 <board name="uVision Simulator" vendor="Keil"/>
2510 <project>
2511 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2512 </project>
2513 <attributes>
2514 <component Cclass="CMSIS" Cgroup="CORE"/>
2515 <component Cclass="CMSIS" Cgroup="DSP"/>
2516 <component Cclass="Device" Cgroup="Startup"/>
2517 <category>Getting Started</category>
2518 </attributes>
2519 </example>
2520
2521 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2522 <description>DSP_Lib FIR example</description>
2523 <board name="uVision Simulator" vendor="Keil"/>
2524 <project>
2525 <environment name="uv" load="arm_fir_example.uvprojx"/>
2526 </project>
2527 <attributes>
2528 <component Cclass="CMSIS" Cgroup="CORE"/>
2529 <component Cclass="CMSIS" Cgroup="DSP"/>
2530 <component Cclass="Device" Cgroup="Startup"/>
2531 <category>Getting Started</category>
2532 </attributes>
2533 </example>
2534
2535 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2536 <description>DSP_Lib Graphic Equalizer example</description>
2537 <board name="uVision Simulator" vendor="Keil"/>
2538 <project>
2539 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2540 </project>
2541 <attributes>
2542 <component Cclass="CMSIS" Cgroup="CORE"/>
2543 <component Cclass="CMSIS" Cgroup="DSP"/>
2544 <component Cclass="Device" Cgroup="Startup"/>
2545 <category>Getting Started</category>
2546 </attributes>
2547 </example>
2548
2549 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2550 <description>DSP_Lib Linear Interpolation example</description>
2551 <board name="uVision Simulator" vendor="Keil"/>
2552 <project>
2553 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2554 </project>
2555 <attributes>
2556 <component Cclass="CMSIS" Cgroup="CORE"/>
2557 <component Cclass="CMSIS" Cgroup="DSP"/>
2558 <component Cclass="Device" Cgroup="Startup"/>
2559 <category>Getting Started</category>
2560 </attributes>
2561 </example>
2562
2563 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2564 <description>DSP_Lib Matrix example</description>
2565 <board name="uVision Simulator" vendor="Keil"/>
2566 <project>
2567 <environment name="uv" load="arm_matrix_example.uvprojx"/>
2568 </project>
2569 <attributes>
2570 <component Cclass="CMSIS" Cgroup="CORE"/>
2571 <component Cclass="CMSIS" Cgroup="DSP"/>
2572 <component Cclass="Device" Cgroup="Startup"/>
2573 <category>Getting Started</category>
2574 </attributes>
2575 </example>
2576
2577 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2578 <description>DSP_Lib Signal Convergence example</description>
2579 <board name="uVision Simulator" vendor="Keil"/>
2580 <project>
2581 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2582 </project>
2583 <attributes>
2584 <component Cclass="CMSIS" Cgroup="CORE"/>
2585 <component Cclass="CMSIS" Cgroup="DSP"/>
2586 <component Cclass="Device" Cgroup="Startup"/>
2587 <category>Getting Started</category>
2588 </attributes>
2589 </example>
2590
2591 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2592 <description>DSP_Lib Sinus/Cosinus example</description>
2593 <board name="uVision Simulator" vendor="Keil"/>
2594 <project>
2595 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2596 </project>
2597 <attributes>
2598 <component Cclass="CMSIS" Cgroup="CORE"/>
2599 <component Cclass="CMSIS" Cgroup="DSP"/>
2600 <component Cclass="Device" Cgroup="Startup"/>
2601 <category>Getting Started</category>
2602 </attributes>
2603 </example>
2604
2605 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2606 <description>DSP_Lib Variance example</description>
2607 <board name="uVision Simulator" vendor="Keil"/>
2608 <project>
2609 <environment name="uv" load="arm_variance_example.uvprojx"/>
2610 </project>
2611 <attributes>
2612 <component Cclass="CMSIS" Cgroup="CORE"/>
2613 <component Cclass="CMSIS" Cgroup="DSP"/>
2614 <component Cclass="Device" Cgroup="Startup"/>
2615 <category>Getting Started</category>
2616 </attributes>
2617 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2618
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2619 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2620 <description>CMSIS-RTOS2 Blinky example</description>
2621 <board name="uVision Simulator" vendor="Keil"/>
2622 <project>
2623 <environment name="uv" load="Blinky.uvprojx"/>
2624 </project>
2625 <attributes>
2626 <component Cclass="CMSIS" Cgroup="CORE"/>
2627 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2628 <component Cclass="Device" Cgroup="Startup"/>
2629 <category>Getting Started</category>
2630 </attributes>
2631 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2632
Robert Rostohare13e4702016-11-07 15:23:44 +0100[diff] [blame]2633 <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
Matthias Hertel4b70ae42016-11-07 14:14:59 +0100[diff] [blame]2634 <description>CMSIS-RTOS2 mixed API v1 and v2</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2635 <board name="uVision Simulator" vendor="Keil"/>
2636 <project>
2637 <environment name="uv" load="Blinky.uvprojx"/>
2638 </project>
2639 <attributes>
2640 <component Cclass="CMSIS" Cgroup="CORE"/>
2641 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2642 <component Cclass="Device" Cgroup="Startup"/>
2643 <category>Getting Started</category>
2644 </attributes>
2645 </example>
2646
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]2647 <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]2648 <description>Bare-metal secure/non-secure example without RTOS</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2649 <board name="uVision Simulator" vendor="Keil"/>
2650 <project>
2651 <environment name="uv" load="NoRTOS.uvmpw"/>
2652 </project>
2653 <attributes>
2654 <component Cclass="CMSIS" Cgroup="CORE"/>
2655 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2656 <component Cclass="Device" Cgroup="Startup"/>
2657 <category>Getting Started</category>
2658 </attributes>
2659 </example>
2660
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]2661 <example name="TrustZone for ARMv8-M RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]2662 <description>Secure/non-secure RTOS example with thread context management</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2663 <board name="uVision Simulator" vendor="Keil"/>
2664 <project>
2665 <environment name="uv" load="RTOS.uvmpw"/>
2666 </project>
2667 <attributes>
2668 <component Cclass="CMSIS" Cgroup="CORE"/>
2669 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2670 <component Cclass="Device" Cgroup="Startup"/>
2671 <category>Getting Started</category>
2672 </attributes>
2673 </example>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2674
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]2675 <example name="TrustZone for ARMv8-M RTOS Security Tests" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2676 <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2677 <board name="uVision Simulator" vendor="Keil"/>
2678 <project>
2679 <environment name="uv" load="RTOS_Faults.uvmpw"/>
2680 </project>
2681 <attributes>
2682 <component Cclass="CMSIS" Cgroup="CORE"/>
2683 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2684 <component Cclass="Device" Cgroup="Startup"/>
2685 <category>Getting Started</category>
2686 </attributes>
2687 </example>
2688
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2689 </examples>
2690
2691</package>